1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 13 14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X][Y]; 25 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute parallel for collapse(2) 30 for(int i = 0; i < X; i++) { 31 for(int j = 0; j < Y; j++) { 32 a[i][j] = (T)0; 33 } 34 } 35 36 // discard loop variables not needed here 37 38 39 return a[0][0]; 40 } 41 }; 42 43 int teams_template_struct(void) { 44 SS<int, 123, 456> V; 45 return V.foo(); 46 47 } 48 #endif // CK1 49 50 // Test host codegen. 51 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 52 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 53 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 54 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 55 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 56 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 57 58 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 59 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 61 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 62 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 64 #ifdef CK2 65 66 template <typename T, int n, int m> 67 int tmain(T argc) { 68 T a[n][m]; 69 #pragma omp target 70 #pragma omp teams distribute parallel for collapse(2) 71 for(int i = 0; i < n; i++) { 72 for(int j = 0; j < m; j++) { 73 a[i][j] = (T)0; 74 } 75 } 76 return 0; 77 } 78 79 int main (int argc, char **argv) { 80 int n = 100; 81 int m = 2; 82 int a[n][m]; 83 #pragma omp target 84 #pragma omp teams distribute parallel for collapse(2) 85 for(int i = 0; i < n; i++) { 86 for(int j = 0; j < m; j++) { 87 a[i][j] = 0; 88 } 89 } 90 return tmain<int, 10, 2>(argc); 91 } 92 93 94 95 96 97 98 99 100 // discard loop variables not needed here 101 102 103 #endif // CK2 104 #endif // #ifndef HEADER 105 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 106 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 107 // CHECK1-NEXT: entry: 108 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 109 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]]) 110 // CHECK1-NEXT: ret i32 [[CALL]] 111 // 112 // 113 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 114 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 115 // CHECK1-NEXT: entry: 116 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 117 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 118 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 119 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 120 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 121 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 122 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 123 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 124 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 125 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 126 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 127 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 128 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 129 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 130 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8 131 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 132 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 133 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 134 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 135 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088) 136 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 137 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 138 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 139 // CHECK1: omp_offload.failed: 140 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 141 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 142 // CHECK1: omp_offload.cont: 143 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 144 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0 145 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0 146 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 147 // CHECK1-NEXT: ret i32 [[TMP9]] 148 // 149 // 150 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 151 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 152 // CHECK1-NEXT: entry: 153 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 154 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 155 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 156 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 157 // CHECK1-NEXT: ret void 158 // 159 // 160 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 161 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 162 // CHECK1-NEXT: entry: 163 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 164 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 165 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 166 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 168 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 169 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 171 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 172 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 173 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 174 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 175 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 176 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 177 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 178 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 179 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 180 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 181 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 182 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 183 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 184 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 185 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 186 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 187 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 188 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 189 // CHECK1: cond.true: 190 // CHECK1-NEXT: br label [[COND_END:%.*]] 191 // CHECK1: cond.false: 192 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 193 // CHECK1-NEXT: br label [[COND_END]] 194 // CHECK1: cond.end: 195 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 196 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 197 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 198 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 199 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 200 // CHECK1: omp.inner.for.cond: 201 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 202 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 203 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 204 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 205 // CHECK1: omp.inner.for.body: 206 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 207 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 208 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 209 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 210 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 211 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 212 // CHECK1: omp.inner.for.inc: 213 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 214 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 215 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 216 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 217 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 218 // CHECK1: omp.inner.for.end: 219 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 220 // CHECK1: omp.loop.exit: 221 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 222 // CHECK1-NEXT: ret void 223 // 224 // 225 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 226 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 227 // CHECK1-NEXT: entry: 228 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 229 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 230 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 231 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 232 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 233 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 236 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 237 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 238 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 239 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 243 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 244 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 245 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 246 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 247 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 248 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 249 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 250 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 251 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 252 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 253 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 254 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 255 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 256 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 257 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 258 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 259 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 260 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 261 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 262 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 263 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 264 // CHECK1: cond.true: 265 // CHECK1-NEXT: br label [[COND_END:%.*]] 266 // CHECK1: cond.false: 267 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 268 // CHECK1-NEXT: br label [[COND_END]] 269 // CHECK1: cond.end: 270 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 271 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 272 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 273 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 274 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 275 // CHECK1: omp.inner.for.cond: 276 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 277 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 278 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 279 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 280 // CHECK1: omp.inner.for.body: 281 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 282 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 283 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 284 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 285 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 286 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 287 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 288 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456 289 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456 290 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 291 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 292 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 293 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 294 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 295 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 296 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 297 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 298 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 299 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 300 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 301 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 302 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 303 // CHECK1: omp.body.continue: 304 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 305 // CHECK1: omp.inner.for.inc: 306 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 307 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 308 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 309 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 310 // CHECK1: omp.inner.for.end: 311 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 312 // CHECK1: omp.loop.exit: 313 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 314 // CHECK1-NEXT: ret void 315 // 316 // 317 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 318 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 319 // CHECK1-NEXT: entry: 320 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 321 // CHECK1-NEXT: ret void 322 // 323 // 324 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv 325 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 326 // CHECK2-NEXT: entry: 327 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 328 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]]) 329 // CHECK2-NEXT: ret i32 [[CALL]] 330 // 331 // 332 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 333 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 334 // CHECK2-NEXT: entry: 335 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 336 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 337 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 338 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 339 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 340 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 341 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 342 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 343 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 344 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 345 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 346 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 347 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 348 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 349 // CHECK2-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8 350 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 351 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8 352 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 353 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 354 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088) 355 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 356 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 357 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 358 // CHECK2: omp_offload.failed: 359 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 360 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 361 // CHECK2: omp_offload.cont: 362 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 363 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0 364 // CHECK2-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0 365 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 366 // CHECK2-NEXT: ret i32 [[TMP9]] 367 // 368 // 369 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 370 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 371 // CHECK2-NEXT: entry: 372 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 373 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 374 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 375 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 376 // CHECK2-NEXT: ret void 377 // 378 // 379 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 380 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 381 // CHECK2-NEXT: entry: 382 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 383 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 384 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 385 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 386 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 387 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 388 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 389 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 390 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 391 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 392 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 393 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4 394 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 395 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 396 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 397 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 398 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 399 // CHECK2-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 400 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 401 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 402 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 403 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 404 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 405 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 406 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 407 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 408 // CHECK2: cond.true: 409 // CHECK2-NEXT: br label [[COND_END:%.*]] 410 // CHECK2: cond.false: 411 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 412 // CHECK2-NEXT: br label [[COND_END]] 413 // CHECK2: cond.end: 414 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 415 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 416 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 417 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 418 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 419 // CHECK2: omp.inner.for.cond: 420 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 421 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 422 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 423 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 424 // CHECK2: omp.inner.for.body: 425 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 426 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 427 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 428 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 429 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 430 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 431 // CHECK2: omp.inner.for.inc: 432 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 433 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 434 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 435 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 436 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 437 // CHECK2: omp.inner.for.end: 438 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 439 // CHECK2: omp.loop.exit: 440 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 441 // CHECK2-NEXT: ret void 442 // 443 // 444 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 445 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 446 // CHECK2-NEXT: entry: 447 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 448 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 449 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 450 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 451 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 452 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 453 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 454 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 455 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 456 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 457 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 458 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 459 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 460 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4 461 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 462 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 463 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 464 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 465 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 466 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 467 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 468 // CHECK2-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 469 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 470 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 471 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 472 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 473 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 474 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 475 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 476 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 477 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 478 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 479 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 480 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 481 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 482 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 483 // CHECK2: cond.true: 484 // CHECK2-NEXT: br label [[COND_END:%.*]] 485 // CHECK2: cond.false: 486 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 487 // CHECK2-NEXT: br label [[COND_END]] 488 // CHECK2: cond.end: 489 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 490 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 491 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 492 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 493 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 494 // CHECK2: omp.inner.for.cond: 495 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 496 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 497 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 498 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 499 // CHECK2: omp.inner.for.body: 500 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 501 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 502 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 503 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 504 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 505 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 506 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 507 // CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456 508 // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456 509 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 510 // CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 511 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 512 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 513 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 514 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 515 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 516 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 517 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 518 // CHECK2-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 519 // CHECK2-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 520 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 521 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 522 // CHECK2: omp.body.continue: 523 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 524 // CHECK2: omp.inner.for.inc: 525 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 526 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 527 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 528 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 529 // CHECK2: omp.inner.for.end: 530 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 531 // CHECK2: omp.loop.exit: 532 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 533 // CHECK2-NEXT: ret void 534 // 535 // 536 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 537 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 538 // CHECK2-NEXT: entry: 539 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 540 // CHECK2-NEXT: ret void 541 // 542 // 543 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 544 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 545 // CHECK3-NEXT: entry: 546 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 547 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]]) 548 // CHECK3-NEXT: ret i32 [[CALL]] 549 // 550 // 551 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 552 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 553 // CHECK3-NEXT: entry: 554 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 555 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 556 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 557 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 558 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 559 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 560 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 561 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 562 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 563 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 564 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 565 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 566 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 567 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 568 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4 569 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 570 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 571 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 572 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 573 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088) 574 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 575 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 576 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 577 // CHECK3: omp_offload.failed: 578 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 579 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 580 // CHECK3: omp_offload.cont: 581 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 582 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0 583 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0 584 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 585 // CHECK3-NEXT: ret i32 [[TMP9]] 586 // 587 // 588 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 589 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 590 // CHECK3-NEXT: entry: 591 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 592 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 593 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 594 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 595 // CHECK3-NEXT: ret void 596 // 597 // 598 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 599 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 600 // CHECK3-NEXT: entry: 601 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 602 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 603 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 604 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 605 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 606 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 607 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 608 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 609 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 610 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 611 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 612 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 613 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 614 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 615 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 616 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 617 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 618 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 619 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 620 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 621 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 622 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 623 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 624 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 625 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 626 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 627 // CHECK3: cond.true: 628 // CHECK3-NEXT: br label [[COND_END:%.*]] 629 // CHECK3: cond.false: 630 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 631 // CHECK3-NEXT: br label [[COND_END]] 632 // CHECK3: cond.end: 633 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 634 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 635 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 636 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 637 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 638 // CHECK3: omp.inner.for.cond: 639 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 640 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 641 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 642 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 643 // CHECK3: omp.inner.for.body: 644 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 645 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 646 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 647 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 648 // CHECK3: omp.inner.for.inc: 649 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 650 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 651 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 652 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 653 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 654 // CHECK3: omp.inner.for.end: 655 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 656 // CHECK3: omp.loop.exit: 657 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 658 // CHECK3-NEXT: ret void 659 // 660 // 661 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 662 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 663 // CHECK3-NEXT: entry: 664 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 665 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 666 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 667 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 668 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 669 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 670 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 671 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 672 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 673 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 674 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 675 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 676 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 677 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 678 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 679 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 680 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 681 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 682 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 683 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 684 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 685 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 686 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 687 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 688 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 689 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 690 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 691 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 692 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 693 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 694 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 695 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 696 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 697 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 698 // CHECK3: cond.true: 699 // CHECK3-NEXT: br label [[COND_END:%.*]] 700 // CHECK3: cond.false: 701 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 702 // CHECK3-NEXT: br label [[COND_END]] 703 // CHECK3: cond.end: 704 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 705 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 706 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 707 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 708 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 709 // CHECK3: omp.inner.for.cond: 710 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 711 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 712 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 713 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 714 // CHECK3: omp.inner.for.body: 715 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 716 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 717 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 718 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 719 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 720 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 721 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 722 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456 723 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 724 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 725 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 726 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 727 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 728 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 729 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 730 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]] 731 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 732 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 733 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 734 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 735 // CHECK3: omp.body.continue: 736 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 737 // CHECK3: omp.inner.for.inc: 738 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 739 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 740 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 741 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 742 // CHECK3: omp.inner.for.end: 743 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 744 // CHECK3: omp.loop.exit: 745 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 746 // CHECK3-NEXT: ret void 747 // 748 // 749 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 750 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 751 // CHECK3-NEXT: entry: 752 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 753 // CHECK3-NEXT: ret void 754 // 755 // 756 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv 757 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 758 // CHECK4-NEXT: entry: 759 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 760 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]]) 761 // CHECK4-NEXT: ret i32 [[CALL]] 762 // 763 // 764 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 765 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 766 // CHECK4-NEXT: entry: 767 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 768 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 769 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 770 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 771 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 772 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 773 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 774 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 775 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 776 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 777 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 778 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 779 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 780 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 781 // CHECK4-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4 782 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 783 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4 784 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 785 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 786 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088) 787 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 788 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 789 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 790 // CHECK4: omp_offload.failed: 791 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 792 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 793 // CHECK4: omp_offload.cont: 794 // CHECK4-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 795 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0 796 // CHECK4-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0 797 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 798 // CHECK4-NEXT: ret i32 [[TMP9]] 799 // 800 // 801 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 802 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 803 // CHECK4-NEXT: entry: 804 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 805 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 806 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 807 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 808 // CHECK4-NEXT: ret void 809 // 810 // 811 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 812 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 813 // CHECK4-NEXT: entry: 814 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 815 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 816 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 817 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 818 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 819 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 820 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 821 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 822 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 823 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 824 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 825 // CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4 826 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 827 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 828 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 829 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 830 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 831 // CHECK4-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 832 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 833 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 834 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 835 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 836 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 837 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 838 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 839 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 840 // CHECK4: cond.true: 841 // CHECK4-NEXT: br label [[COND_END:%.*]] 842 // CHECK4: cond.false: 843 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 844 // CHECK4-NEXT: br label [[COND_END]] 845 // CHECK4: cond.end: 846 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 847 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 848 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 849 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 850 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 851 // CHECK4: omp.inner.for.cond: 852 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 853 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 854 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 855 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 856 // CHECK4: omp.inner.for.body: 857 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 858 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 859 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 860 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 861 // CHECK4: omp.inner.for.inc: 862 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 863 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 864 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 865 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 866 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 867 // CHECK4: omp.inner.for.end: 868 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 869 // CHECK4: omp.loop.exit: 870 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 871 // CHECK4-NEXT: ret void 872 // 873 // 874 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 875 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 876 // CHECK4-NEXT: entry: 877 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 878 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 879 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 880 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 881 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 882 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 883 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 884 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 885 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 886 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 887 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 888 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 889 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 890 // CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4 891 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 892 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 893 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 894 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 895 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 896 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 897 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 898 // CHECK4-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 899 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 900 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 901 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 902 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 903 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 904 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 905 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 906 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 907 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 908 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 909 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 910 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 911 // CHECK4: cond.true: 912 // CHECK4-NEXT: br label [[COND_END:%.*]] 913 // CHECK4: cond.false: 914 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 915 // CHECK4-NEXT: br label [[COND_END]] 916 // CHECK4: cond.end: 917 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 918 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 919 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 920 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 921 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 922 // CHECK4: omp.inner.for.cond: 923 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 924 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 925 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 926 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 927 // CHECK4: omp.inner.for.body: 928 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 929 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 930 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 931 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 932 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 933 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 934 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 935 // CHECK4-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456 936 // CHECK4-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 937 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 938 // CHECK4-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 939 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 940 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 941 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 942 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 943 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]] 944 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 945 // CHECK4-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 946 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 947 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 948 // CHECK4: omp.body.continue: 949 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 950 // CHECK4: omp.inner.for.inc: 951 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 952 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 953 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 954 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 955 // CHECK4: omp.inner.for.end: 956 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 957 // CHECK4: omp.loop.exit: 958 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 959 // CHECK4-NEXT: ret void 960 // 961 // 962 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 963 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 964 // CHECK4-NEXT: entry: 965 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 966 // CHECK4-NEXT: ret void 967 // 968 // 969 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 970 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 971 // CHECK5-NEXT: entry: 972 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 973 // CHECK5-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]]) 974 // CHECK5-NEXT: ret i32 [[CALL]] 975 // 976 // 977 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 978 // CHECK5-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 979 // CHECK5-NEXT: entry: 980 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 981 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 982 // CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4 983 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 984 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 985 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 986 // CHECK5-NEXT: br label [[FOR_COND:%.*]] 987 // CHECK5: for.cond: 988 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 989 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 990 // CHECK5-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END9:%.*]] 991 // CHECK5: for.body: 992 // CHECK5-NEXT: store i32 0, i32* [[J]], align 4 993 // CHECK5-NEXT: br label [[FOR_COND2:%.*]] 994 // CHECK5: for.cond2: 995 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[J]], align 4 996 // CHECK5-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64 997 // CHECK5-NEXT: [[CMP3:%.*]] = icmp slt i64 [[CONV]], 456 998 // CHECK5-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END:%.*]] 999 // CHECK5: for.body4: 1000 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1001 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1002 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64 1003 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 1004 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[J]], align 4 1005 // CHECK5-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP3]] to i64 1006 // CHECK5-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM5]] 1007 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX6]], align 4 1008 // CHECK5-NEXT: br label [[FOR_INC:%.*]] 1009 // CHECK5: for.inc: 1010 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[J]], align 4 1011 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1012 // CHECK5-NEXT: store i32 [[INC]], i32* [[J]], align 4 1013 // CHECK5-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP2:![0-9]+]] 1014 // CHECK5: for.end: 1015 // CHECK5-NEXT: br label [[FOR_INC7:%.*]] 1016 // CHECK5: for.inc7: 1017 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 1018 // CHECK5-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP5]], 1 1019 // CHECK5-NEXT: store i32 [[INC8]], i32* [[I]], align 4 1020 // CHECK5-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1021 // CHECK5: for.end9: 1022 // CHECK5-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1023 // CHECK5-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A10]], i64 0, i64 0 1024 // CHECK5-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX11]], i64 0, i64 0 1025 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4 1026 // CHECK5-NEXT: ret i32 [[TMP6]] 1027 // 1028 // 1029 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1030 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 1031 // CHECK6-NEXT: entry: 1032 // CHECK6-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1033 // CHECK6-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]]) 1034 // CHECK6-NEXT: ret i32 [[CALL]] 1035 // 1036 // 1037 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1038 // CHECK6-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1039 // CHECK6-NEXT: entry: 1040 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1041 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 1042 // CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4 1043 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1044 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1045 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 1046 // CHECK6-NEXT: br label [[FOR_COND:%.*]] 1047 // CHECK6: for.cond: 1048 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1049 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 1050 // CHECK6-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END9:%.*]] 1051 // CHECK6: for.body: 1052 // CHECK6-NEXT: store i32 0, i32* [[J]], align 4 1053 // CHECK6-NEXT: br label [[FOR_COND2:%.*]] 1054 // CHECK6: for.cond2: 1055 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[J]], align 4 1056 // CHECK6-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64 1057 // CHECK6-NEXT: [[CMP3:%.*]] = icmp slt i64 [[CONV]], 456 1058 // CHECK6-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END:%.*]] 1059 // CHECK6: for.body4: 1060 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1061 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1062 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64 1063 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 1064 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[J]], align 4 1065 // CHECK6-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP3]] to i64 1066 // CHECK6-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM5]] 1067 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX6]], align 4 1068 // CHECK6-NEXT: br label [[FOR_INC:%.*]] 1069 // CHECK6: for.inc: 1070 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[J]], align 4 1071 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1072 // CHECK6-NEXT: store i32 [[INC]], i32* [[J]], align 4 1073 // CHECK6-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP2:![0-9]+]] 1074 // CHECK6: for.end: 1075 // CHECK6-NEXT: br label [[FOR_INC7:%.*]] 1076 // CHECK6: for.inc7: 1077 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 1078 // CHECK6-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP5]], 1 1079 // CHECK6-NEXT: store i32 [[INC8]], i32* [[I]], align 4 1080 // CHECK6-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1081 // CHECK6: for.end9: 1082 // CHECK6-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1083 // CHECK6-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A10]], i64 0, i64 0 1084 // CHECK6-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX11]], i64 0, i64 0 1085 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4 1086 // CHECK6-NEXT: ret i32 [[TMP6]] 1087 // 1088 // 1089 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1090 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1091 // CHECK7-NEXT: entry: 1092 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1093 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]]) 1094 // CHECK7-NEXT: ret i32 [[CALL]] 1095 // 1096 // 1097 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1098 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1099 // CHECK7-NEXT: entry: 1100 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1101 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1102 // CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4 1103 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1104 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1105 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 1106 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 1107 // CHECK7: for.cond: 1108 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1109 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 1110 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END8:%.*]] 1111 // CHECK7: for.body: 1112 // CHECK7-NEXT: store i32 0, i32* [[J]], align 4 1113 // CHECK7-NEXT: br label [[FOR_COND2:%.*]] 1114 // CHECK7: for.cond2: 1115 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[J]], align 4 1116 // CHECK7-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64 1117 // CHECK7-NEXT: [[CMP3:%.*]] = icmp slt i64 [[CONV]], 456 1118 // CHECK7-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END:%.*]] 1119 // CHECK7: for.body4: 1120 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1121 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1122 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP2]] 1123 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[J]], align 4 1124 // CHECK7-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP3]] 1125 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX5]], align 4 1126 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 1127 // CHECK7: for.inc: 1128 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[J]], align 4 1129 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1130 // CHECK7-NEXT: store i32 [[INC]], i32* [[J]], align 4 1131 // CHECK7-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP3:![0-9]+]] 1132 // CHECK7: for.end: 1133 // CHECK7-NEXT: br label [[FOR_INC6:%.*]] 1134 // CHECK7: for.inc6: 1135 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 1136 // CHECK7-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP5]], 1 1137 // CHECK7-NEXT: store i32 [[INC7]], i32* [[I]], align 4 1138 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 1139 // CHECK7: for.end8: 1140 // CHECK7-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1141 // CHECK7-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A9]], i32 0, i32 0 1142 // CHECK7-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX10]], i32 0, i32 0 1143 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4 1144 // CHECK7-NEXT: ret i32 [[TMP6]] 1145 // 1146 // 1147 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1148 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 1149 // CHECK8-NEXT: entry: 1150 // CHECK8-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1151 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]]) 1152 // CHECK8-NEXT: ret i32 [[CALL]] 1153 // 1154 // 1155 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1156 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1157 // CHECK8-NEXT: entry: 1158 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1159 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1160 // CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4 1161 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1162 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1163 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 1164 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 1165 // CHECK8: for.cond: 1166 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 1167 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 1168 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END8:%.*]] 1169 // CHECK8: for.body: 1170 // CHECK8-NEXT: store i32 0, i32* [[J]], align 4 1171 // CHECK8-NEXT: br label [[FOR_COND2:%.*]] 1172 // CHECK8: for.cond2: 1173 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[J]], align 4 1174 // CHECK8-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64 1175 // CHECK8-NEXT: [[CMP3:%.*]] = icmp slt i64 [[CONV]], 456 1176 // CHECK8-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END:%.*]] 1177 // CHECK8: for.body4: 1178 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1179 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 1180 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP2]] 1181 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[J]], align 4 1182 // CHECK8-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP3]] 1183 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX5]], align 4 1184 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 1185 // CHECK8: for.inc: 1186 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[J]], align 4 1187 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1188 // CHECK8-NEXT: store i32 [[INC]], i32* [[J]], align 4 1189 // CHECK8-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP3:![0-9]+]] 1190 // CHECK8: for.end: 1191 // CHECK8-NEXT: br label [[FOR_INC6:%.*]] 1192 // CHECK8: for.inc6: 1193 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 1194 // CHECK8-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP5]], 1 1195 // CHECK8-NEXT: store i32 [[INC7]], i32* [[I]], align 4 1196 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 1197 // CHECK8: for.end8: 1198 // CHECK8-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1199 // CHECK8-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A9]], i32 0, i32 0 1200 // CHECK8-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX10]], i32 0, i32 0 1201 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4 1202 // CHECK8-NEXT: ret i32 [[TMP6]] 1203 // 1204 // 1205 // CHECK9-LABEL: define {{[^@]+}}@main 1206 // CHECK9-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1207 // CHECK9-NEXT: entry: 1208 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1209 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1210 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 1211 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1212 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 1213 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1214 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1215 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 1216 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1217 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 1218 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1219 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1220 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1221 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 1222 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1223 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1224 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1225 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1226 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 1227 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1228 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1229 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 1230 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 1231 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4 1232 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1233 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1234 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4 1235 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 1236 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave() 1237 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8 1238 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 1239 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 1240 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1241 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 1242 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4 1243 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1244 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4 1245 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8 1246 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4 1247 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32* 1248 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4 1249 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8 1250 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 1251 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 1252 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1253 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1254 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP13]], align 8 1255 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1256 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1257 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP15]], align 8 1258 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1259 // CHECK9-NEXT: store i64 4, i64* [[TMP16]], align 8 1260 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1261 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8 1262 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1263 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 1264 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8 1265 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1266 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 1267 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8 1268 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 1269 // CHECK9-NEXT: store i64 4, i64* [[TMP22]], align 8 1270 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1271 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8 1272 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1273 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 1274 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP25]], align 8 1275 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1276 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 1277 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP27]], align 8 1278 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1279 // CHECK9-NEXT: store i64 8, i64* [[TMP28]], align 8 1280 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1281 // CHECK9-NEXT: store i8* null, i8** [[TMP29]], align 8 1282 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1283 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 1284 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8 1285 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1286 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i64* 1287 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP33]], align 8 1288 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 1289 // CHECK9-NEXT: store i64 8, i64* [[TMP34]], align 8 1290 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1291 // CHECK9-NEXT: store i8* null, i8** [[TMP35]], align 8 1292 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1293 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i32** 1294 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP37]], align 8 1295 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1296 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32** 1297 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP39]], align 8 1298 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 1299 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP40]], align 8 1300 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1301 // CHECK9-NEXT: store i8* null, i8** [[TMP41]], align 8 1302 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1303 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1304 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1305 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[N]], align 4 1306 // CHECK9-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_]], align 4 1307 // CHECK9-NEXT: [[TMP46:%.*]] = load i32, i32* [[M]], align 4 1308 // CHECK9-NEXT: store i32 [[TMP46]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1309 // CHECK9-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1310 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP47]], 0 1311 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1312 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64 1313 // CHECK9-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1314 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP48]], 0 1315 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1316 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1317 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]] 1318 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1319 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8 1320 // CHECK9-NEXT: [[TMP49:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8 1321 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP49]], 1 1322 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]]) 1323 // CHECK9-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, i32 5, i8** [[TMP42]], i8** [[TMP43]], i64* [[TMP44]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1324 // CHECK9-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0 1325 // CHECK9-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1326 // CHECK9: omp_offload.failed: 1327 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1328 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1329 // CHECK9: omp_offload.cont: 1330 // CHECK9-NEXT: [[TMP52:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1331 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 signext [[TMP52]]) 1332 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1333 // CHECK9-NEXT: [[TMP53:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1334 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP53]]) 1335 // CHECK9-NEXT: [[TMP54:%.*]] = load i32, i32* [[RETVAL]], align 4 1336 // CHECK9-NEXT: ret i32 [[TMP54]] 1337 // 1338 // 1339 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 1340 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1341 // CHECK9-NEXT: entry: 1342 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1343 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 1344 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1345 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1346 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1347 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1348 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 1349 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1350 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1351 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1352 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1353 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32* 1354 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1355 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1356 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1357 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 1358 // CHECK9-NEXT: ret void 1359 // 1360 // 1361 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1362 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1363 // CHECK9-NEXT: entry: 1364 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1365 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1366 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1367 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 1368 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1369 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1370 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1371 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1372 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1373 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1374 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1375 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1376 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1377 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1378 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1379 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 1380 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 1381 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1382 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1383 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 1384 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 1385 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1386 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1387 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1388 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 1389 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1390 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1391 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1392 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1393 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 1394 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1395 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1396 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1397 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1398 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1399 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1400 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1401 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1402 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1403 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1404 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1405 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1406 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1407 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1408 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1409 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1410 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1411 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1412 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1413 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4 1414 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1415 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1416 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1417 // CHECK9: land.lhs.true: 1418 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1419 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1420 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1421 // CHECK9: omp.precond.then: 1422 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 1423 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1424 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 1425 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1426 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1427 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1428 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1429 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1430 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1431 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1432 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 1433 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1434 // CHECK9: cond.true: 1435 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1436 // CHECK9-NEXT: br label [[COND_END:%.*]] 1437 // CHECK9: cond.false: 1438 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1439 // CHECK9-NEXT: br label [[COND_END]] 1440 // CHECK9: cond.end: 1441 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1442 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 1443 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 1444 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 1445 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1446 // CHECK9: omp.inner.for.cond: 1447 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1448 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1449 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 1450 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1451 // CHECK9: omp.inner.for.body: 1452 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 1453 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1454 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP22]], i32* [[TMP0]], i32* [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], i32* [[TMP4]]) 1455 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1456 // CHECK9: omp.inner.for.inc: 1457 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1458 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 1459 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]] 1460 // CHECK9-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 1461 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1462 // CHECK9: omp.inner.for.end: 1463 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1464 // CHECK9: omp.loop.exit: 1465 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1466 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1467 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 1468 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1469 // CHECK9: omp.precond.end: 1470 // CHECK9-NEXT: ret void 1471 // 1472 // 1473 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1474 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1475 // CHECK9-NEXT: entry: 1476 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1477 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1478 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1479 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1480 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1481 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 1482 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1483 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1484 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1485 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1486 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1487 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1488 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1489 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1490 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1491 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1492 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1493 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 1494 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 1495 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1496 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1497 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 1498 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 1499 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1500 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1501 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1502 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1503 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1504 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 1505 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1506 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1507 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1508 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1509 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 1510 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1511 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1512 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1513 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1514 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1515 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1516 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1517 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1518 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1519 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1520 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1521 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1522 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1523 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1524 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1525 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1526 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1527 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1528 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1529 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4 1530 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1531 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1532 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1533 // CHECK9: land.lhs.true: 1534 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1535 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1536 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1537 // CHECK9: omp.precond.then: 1538 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 1539 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1540 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 1541 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1542 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1543 // CHECK9-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_LB]], align 8 1544 // CHECK9-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_UB]], align 8 1545 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1546 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1547 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1548 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1549 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1550 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1551 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1552 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 1553 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1554 // CHECK9: cond.true: 1555 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1556 // CHECK9-NEXT: br label [[COND_END:%.*]] 1557 // CHECK9: cond.false: 1558 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1559 // CHECK9-NEXT: br label [[COND_END]] 1560 // CHECK9: cond.end: 1561 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 1562 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 1563 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 1564 // CHECK9-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 1565 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1566 // CHECK9: omp.inner.for.cond: 1567 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1568 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1569 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 1570 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1571 // CHECK9: omp.inner.for.body: 1572 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1573 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1574 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0 1575 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1576 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 1577 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 1578 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]] 1579 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 1580 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 1581 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 1582 // CHECK9-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4 1583 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1584 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1585 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1586 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0 1587 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 1588 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 1589 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 1590 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]] 1591 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1592 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0 1593 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 1594 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 1595 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 1596 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 1597 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]] 1598 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 1599 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 1600 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 1601 // CHECK9-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4 1602 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[I11]], align 4 1603 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64 1604 // CHECK9-NEXT: [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 1605 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP30]] 1606 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[J12]], align 4 1607 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64 1608 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]] 1609 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4 1610 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1611 // CHECK9: omp.body.continue: 1612 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1613 // CHECK9: omp.inner.for.inc: 1614 // CHECK9-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1615 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1 1616 // CHECK9-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8 1617 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1618 // CHECK9: omp.inner.for.end: 1619 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1620 // CHECK9: omp.loop.exit: 1621 // CHECK9-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1622 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1623 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1624 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1625 // CHECK9: omp.precond.end: 1626 // CHECK9-NEXT: ret void 1627 // 1628 // 1629 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1630 // CHECK9-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 1631 // CHECK9-NEXT: entry: 1632 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1633 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1634 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1635 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1636 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1637 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1638 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1639 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1640 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1641 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 1642 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8 1643 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1644 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 1645 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8 1646 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1647 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 1648 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1649 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1650 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20) 1651 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1652 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1653 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1654 // CHECK9: omp_offload.failed: 1655 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 1656 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1657 // CHECK9: omp_offload.cont: 1658 // CHECK9-NEXT: ret i32 0 1659 // 1660 // 1661 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 1662 // CHECK9-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1663 // CHECK9-NEXT: entry: 1664 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1665 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1666 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1667 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 1668 // CHECK9-NEXT: ret void 1669 // 1670 // 1671 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 1672 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1673 // CHECK9-NEXT: entry: 1674 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1675 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1676 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1677 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1678 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1679 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1680 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1681 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1682 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1683 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1684 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1685 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1686 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1687 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1688 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1689 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1690 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1691 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 1692 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1693 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1694 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1695 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1696 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1697 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1698 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1699 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1700 // CHECK9: cond.true: 1701 // CHECK9-NEXT: br label [[COND_END:%.*]] 1702 // CHECK9: cond.false: 1703 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1704 // CHECK9-NEXT: br label [[COND_END]] 1705 // CHECK9: cond.end: 1706 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1707 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1708 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1709 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1710 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1711 // CHECK9: omp.inner.for.cond: 1712 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1713 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1714 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1715 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1716 // CHECK9: omp.inner.for.body: 1717 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1718 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1719 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1720 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1721 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]]) 1722 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1723 // CHECK9: omp.inner.for.inc: 1724 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1725 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1726 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1727 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1728 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1729 // CHECK9: omp.inner.for.end: 1730 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1731 // CHECK9: omp.loop.exit: 1732 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1733 // CHECK9-NEXT: ret void 1734 // 1735 // 1736 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 1737 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1738 // CHECK9-NEXT: entry: 1739 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1740 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1741 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1742 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1743 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1744 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1745 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1746 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1747 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1748 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1749 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1750 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1751 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1752 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1753 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1754 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1755 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1756 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1757 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1758 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1759 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1760 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 1761 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1762 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1763 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1764 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 1765 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1766 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1767 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1768 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1769 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1770 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1771 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1772 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1773 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 1774 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1775 // CHECK9: cond.true: 1776 // CHECK9-NEXT: br label [[COND_END:%.*]] 1777 // CHECK9: cond.false: 1778 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1779 // CHECK9-NEXT: br label [[COND_END]] 1780 // CHECK9: cond.end: 1781 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1782 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1783 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1784 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1785 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1786 // CHECK9: omp.inner.for.cond: 1787 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1788 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1789 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1790 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1791 // CHECK9: omp.inner.for.body: 1792 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1793 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 1794 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1795 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1796 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1797 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1798 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1799 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2 1800 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2 1801 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 1802 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 1803 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 1804 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 1805 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1806 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1807 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1808 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 1809 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 1810 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 1811 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 1812 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1813 // CHECK9: omp.body.continue: 1814 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1815 // CHECK9: omp.inner.for.inc: 1816 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1817 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 1818 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 1819 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1820 // CHECK9: omp.inner.for.end: 1821 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1822 // CHECK9: omp.loop.exit: 1823 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1824 // CHECK9-NEXT: ret void 1825 // 1826 // 1827 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1828 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] { 1829 // CHECK9-NEXT: entry: 1830 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1831 // CHECK9-NEXT: ret void 1832 // 1833 // 1834 // CHECK10-LABEL: define {{[^@]+}}@main 1835 // CHECK10-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1836 // CHECK10-NEXT: entry: 1837 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1838 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1839 // CHECK10-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 1840 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4 1841 // CHECK10-NEXT: [[M:%.*]] = alloca i32, align 4 1842 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1843 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1844 // CHECK10-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 1845 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1846 // CHECK10-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 1847 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1848 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1849 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1850 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 1851 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1852 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1853 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1854 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1855 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 1856 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1857 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1858 // CHECK10-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 1859 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4 1860 // CHECK10-NEXT: store i32 2, i32* [[M]], align 4 1861 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1862 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1863 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4 1864 // CHECK10-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 1865 // CHECK10-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave() 1866 // CHECK10-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8 1867 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 1868 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 1869 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1870 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 1871 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4 1872 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1873 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4 1874 // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8 1875 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4 1876 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32* 1877 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4 1878 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8 1879 // CHECK10-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 1880 // CHECK10-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 1881 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1882 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1883 // CHECK10-NEXT: store i64 [[TMP7]], i64* [[TMP13]], align 8 1884 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1885 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1886 // CHECK10-NEXT: store i64 [[TMP7]], i64* [[TMP15]], align 8 1887 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1888 // CHECK10-NEXT: store i64 4, i64* [[TMP16]], align 8 1889 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1890 // CHECK10-NEXT: store i8* null, i8** [[TMP17]], align 8 1891 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1892 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 1893 // CHECK10-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8 1894 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1895 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 1896 // CHECK10-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8 1897 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 1898 // CHECK10-NEXT: store i64 4, i64* [[TMP22]], align 8 1899 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1900 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8 1901 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1902 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 1903 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP25]], align 8 1904 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1905 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 1906 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP27]], align 8 1907 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1908 // CHECK10-NEXT: store i64 8, i64* [[TMP28]], align 8 1909 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1910 // CHECK10-NEXT: store i8* null, i8** [[TMP29]], align 8 1911 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1912 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 1913 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8 1914 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1915 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i64* 1916 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP33]], align 8 1917 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 1918 // CHECK10-NEXT: store i64 8, i64* [[TMP34]], align 8 1919 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1920 // CHECK10-NEXT: store i8* null, i8** [[TMP35]], align 8 1921 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1922 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i32** 1923 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP37]], align 8 1924 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1925 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32** 1926 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP39]], align 8 1927 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 1928 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[TMP40]], align 8 1929 // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1930 // CHECK10-NEXT: store i8* null, i8** [[TMP41]], align 8 1931 // CHECK10-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1932 // CHECK10-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1933 // CHECK10-NEXT: [[TMP44:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1934 // CHECK10-NEXT: [[TMP45:%.*]] = load i32, i32* [[N]], align 4 1935 // CHECK10-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_]], align 4 1936 // CHECK10-NEXT: [[TMP46:%.*]] = load i32, i32* [[M]], align 4 1937 // CHECK10-NEXT: store i32 [[TMP46]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1938 // CHECK10-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1939 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP47]], 0 1940 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1941 // CHECK10-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64 1942 // CHECK10-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1943 // CHECK10-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP48]], 0 1944 // CHECK10-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1945 // CHECK10-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1946 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]] 1947 // CHECK10-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1948 // CHECK10-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8 1949 // CHECK10-NEXT: [[TMP49:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8 1950 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP49]], 1 1951 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]]) 1952 // CHECK10-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, i32 5, i8** [[TMP42]], i8** [[TMP43]], i64* [[TMP44]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1953 // CHECK10-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0 1954 // CHECK10-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1955 // CHECK10: omp_offload.failed: 1956 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1957 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1958 // CHECK10: omp_offload.cont: 1959 // CHECK10-NEXT: [[TMP52:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1960 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 signext [[TMP52]]) 1961 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1962 // CHECK10-NEXT: [[TMP53:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1963 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP53]]) 1964 // CHECK10-NEXT: [[TMP54:%.*]] = load i32, i32* [[RETVAL]], align 4 1965 // CHECK10-NEXT: ret i32 [[TMP54]] 1966 // 1967 // 1968 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 1969 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1970 // CHECK10-NEXT: entry: 1971 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1972 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 1973 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1974 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1975 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1976 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1977 // CHECK10-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 1978 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1979 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1980 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1981 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1982 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32* 1983 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1984 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1985 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1986 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 1987 // CHECK10-NEXT: ret void 1988 // 1989 // 1990 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1991 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1992 // CHECK10-NEXT: entry: 1993 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1994 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1995 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1996 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 1997 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1998 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1999 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2000 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 2001 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2002 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 2003 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2004 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 2005 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 2006 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2007 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4 2008 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 2009 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 2010 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 2011 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2012 // CHECK10-NEXT: [[I11:%.*]] = alloca i32, align 4 2013 // CHECK10-NEXT: [[J12:%.*]] = alloca i32, align 4 2014 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2015 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2016 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2017 // CHECK10-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 2018 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2019 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 2020 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2021 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2022 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 2023 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2024 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 2025 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2026 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2027 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2028 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 2029 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 2030 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2031 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2032 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2033 // CHECK10-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 2034 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2035 // CHECK10-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 2036 // CHECK10-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 2037 // CHECK10-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 2038 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 2039 // CHECK10-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 2040 // CHECK10-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 2041 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2042 // CHECK10-NEXT: store i32 0, i32* [[J]], align 4 2043 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2044 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 2045 // CHECK10-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 2046 // CHECK10: land.lhs.true: 2047 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2048 // CHECK10-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 2049 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 2050 // CHECK10: omp.precond.then: 2051 // CHECK10-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 2052 // CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2053 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 2054 // CHECK10-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 2055 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2056 // CHECK10-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2057 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2058 // CHECK10-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 2059 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2060 // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2061 // CHECK10-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 2062 // CHECK10-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2063 // CHECK10: cond.true: 2064 // CHECK10-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2065 // CHECK10-NEXT: br label [[COND_END:%.*]] 2066 // CHECK10: cond.false: 2067 // CHECK10-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2068 // CHECK10-NEXT: br label [[COND_END]] 2069 // CHECK10: cond.end: 2070 // CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 2071 // CHECK10-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 2072 // CHECK10-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 2073 // CHECK10-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 2074 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2075 // CHECK10: omp.inner.for.cond: 2076 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2077 // CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2078 // CHECK10-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 2079 // CHECK10-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2080 // CHECK10: omp.inner.for.body: 2081 // CHECK10-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 2082 // CHECK10-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2083 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP22]], i32* [[TMP0]], i32* [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], i32* [[TMP4]]) 2084 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2085 // CHECK10: omp.inner.for.inc: 2086 // CHECK10-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2087 // CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 2088 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]] 2089 // CHECK10-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 2090 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2091 // CHECK10: omp.inner.for.end: 2092 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2093 // CHECK10: omp.loop.exit: 2094 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2095 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2096 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2097 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2098 // CHECK10: omp.precond.end: 2099 // CHECK10-NEXT: ret void 2100 // 2101 // 2102 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2103 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2104 // CHECK10-NEXT: entry: 2105 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2106 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2107 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2108 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2109 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2110 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 2111 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2112 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 2113 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2114 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 2115 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2116 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 2117 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2118 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 2119 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 2120 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2121 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4 2122 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 2123 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 2124 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 2125 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2126 // CHECK10-NEXT: [[I11:%.*]] = alloca i32, align 4 2127 // CHECK10-NEXT: [[J12:%.*]] = alloca i32, align 4 2128 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2129 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2130 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2131 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2132 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2133 // CHECK10-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 2134 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2135 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 2136 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2137 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2138 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 2139 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2140 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 2141 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2142 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2143 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2144 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 2145 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 2146 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2147 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2148 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2149 // CHECK10-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 2150 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2151 // CHECK10-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 2152 // CHECK10-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 2153 // CHECK10-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 2154 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 2155 // CHECK10-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 2156 // CHECK10-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 2157 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2158 // CHECK10-NEXT: store i32 0, i32* [[J]], align 4 2159 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2160 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 2161 // CHECK10-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 2162 // CHECK10: land.lhs.true: 2163 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2164 // CHECK10-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 2165 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 2166 // CHECK10: omp.precond.then: 2167 // CHECK10-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 2168 // CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2169 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 2170 // CHECK10-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2171 // CHECK10-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2172 // CHECK10-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_LB]], align 8 2173 // CHECK10-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_UB]], align 8 2174 // CHECK10-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 2175 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2176 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2177 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2178 // CHECK10-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 2179 // CHECK10-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 2180 // CHECK10-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2181 // CHECK10-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 2182 // CHECK10-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2183 // CHECK10: cond.true: 2184 // CHECK10-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2185 // CHECK10-NEXT: br label [[COND_END:%.*]] 2186 // CHECK10: cond.false: 2187 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 2188 // CHECK10-NEXT: br label [[COND_END]] 2189 // CHECK10: cond.end: 2190 // CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 2191 // CHECK10-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 2192 // CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 2193 // CHECK10-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 2194 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2195 // CHECK10: omp.inner.for.cond: 2196 // CHECK10-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2197 // CHECK10-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 2198 // CHECK10-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 2199 // CHECK10-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2200 // CHECK10: omp.inner.for.body: 2201 // CHECK10-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2202 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2203 // CHECK10-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0 2204 // CHECK10-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 2205 // CHECK10-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 2206 // CHECK10-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 2207 // CHECK10-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]] 2208 // CHECK10-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 2209 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 2210 // CHECK10-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 2211 // CHECK10-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4 2212 // CHECK10-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2213 // CHECK10-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2214 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2215 // CHECK10-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0 2216 // CHECK10-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 2217 // CHECK10-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 2218 // CHECK10-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 2219 // CHECK10-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]] 2220 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2221 // CHECK10-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0 2222 // CHECK10-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 2223 // CHECK10-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 2224 // CHECK10-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 2225 // CHECK10-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 2226 // CHECK10-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]] 2227 // CHECK10-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 2228 // CHECK10-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 2229 // CHECK10-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 2230 // CHECK10-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4 2231 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[I11]], align 4 2232 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64 2233 // CHECK10-NEXT: [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 2234 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP30]] 2235 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[J12]], align 4 2236 // CHECK10-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64 2237 // CHECK10-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]] 2238 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4 2239 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2240 // CHECK10: omp.body.continue: 2241 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2242 // CHECK10: omp.inner.for.inc: 2243 // CHECK10-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2244 // CHECK10-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1 2245 // CHECK10-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8 2246 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2247 // CHECK10: omp.inner.for.end: 2248 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2249 // CHECK10: omp.loop.exit: 2250 // CHECK10-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2251 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 2252 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 2253 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2254 // CHECK10: omp.precond.end: 2255 // CHECK10-NEXT: ret void 2256 // 2257 // 2258 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 2259 // CHECK10-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 2260 // CHECK10-NEXT: entry: 2261 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2262 // CHECK10-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 2263 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2264 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2265 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2266 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2267 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2268 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2269 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2270 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 2271 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8 2272 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2273 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 2274 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8 2275 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2276 // CHECK10-NEXT: store i8* null, i8** [[TMP4]], align 8 2277 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2278 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2279 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20) 2280 // CHECK10-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2281 // CHECK10-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2282 // CHECK10-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2283 // CHECK10: omp_offload.failed: 2284 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 2285 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 2286 // CHECK10: omp_offload.cont: 2287 // CHECK10-NEXT: ret i32 0 2288 // 2289 // 2290 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 2291 // CHECK10-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2292 // CHECK10-NEXT: entry: 2293 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 2294 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 2295 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 2296 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 2297 // CHECK10-NEXT: ret void 2298 // 2299 // 2300 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 2301 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2302 // CHECK10-NEXT: entry: 2303 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2304 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2305 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 2306 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2307 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2308 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2309 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2310 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2311 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2312 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2313 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2314 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4 2315 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2316 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2317 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 2318 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 2319 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2320 // CHECK10-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 2321 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2322 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2323 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2324 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2325 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2326 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2327 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 2328 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2329 // CHECK10: cond.true: 2330 // CHECK10-NEXT: br label [[COND_END:%.*]] 2331 // CHECK10: cond.false: 2332 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2333 // CHECK10-NEXT: br label [[COND_END]] 2334 // CHECK10: cond.end: 2335 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2336 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2337 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2338 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2339 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2340 // CHECK10: omp.inner.for.cond: 2341 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2342 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2343 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2344 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2345 // CHECK10: omp.inner.for.body: 2346 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2347 // CHECK10-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2348 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2349 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2350 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]]) 2351 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2352 // CHECK10: omp.inner.for.inc: 2353 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2354 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2355 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2356 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2357 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2358 // CHECK10: omp.inner.for.end: 2359 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2360 // CHECK10: omp.loop.exit: 2361 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2362 // CHECK10-NEXT: ret void 2363 // 2364 // 2365 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 2366 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2367 // CHECK10-NEXT: entry: 2368 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2369 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2370 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2371 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2372 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 2373 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2374 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2375 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2376 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2377 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2378 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2379 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2380 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2381 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4 2382 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2383 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2384 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2385 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2386 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 2387 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 2388 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2389 // CHECK10-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 2390 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2391 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2392 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2393 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 2394 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2395 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 2396 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2397 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2398 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2399 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2400 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2401 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2402 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 2403 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2404 // CHECK10: cond.true: 2405 // CHECK10-NEXT: br label [[COND_END:%.*]] 2406 // CHECK10: cond.false: 2407 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2408 // CHECK10-NEXT: br label [[COND_END]] 2409 // CHECK10: cond.end: 2410 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2411 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2412 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2413 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2414 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2415 // CHECK10: omp.inner.for.cond: 2416 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2417 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2418 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2419 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2420 // CHECK10: omp.inner.for.body: 2421 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2422 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 2423 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 2424 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2425 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2426 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2427 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2428 // CHECK10-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2 2429 // CHECK10-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2 2430 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 2431 // CHECK10-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 2432 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 2433 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 2434 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2435 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 2436 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2437 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 2438 // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 2439 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 2440 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 2441 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2442 // CHECK10: omp.body.continue: 2443 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2444 // CHECK10: omp.inner.for.inc: 2445 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2446 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 2447 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 2448 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2449 // CHECK10: omp.inner.for.end: 2450 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2451 // CHECK10: omp.loop.exit: 2452 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2453 // CHECK10-NEXT: ret void 2454 // 2455 // 2456 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2457 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] { 2458 // CHECK10-NEXT: entry: 2459 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2460 // CHECK10-NEXT: ret void 2461 // 2462 // 2463 // CHECK11-LABEL: define {{[^@]+}}@main 2464 // CHECK11-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2465 // CHECK11-NEXT: entry: 2466 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2467 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2468 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 2469 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2470 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 2471 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2472 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2473 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 2474 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2475 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 2476 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2477 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2478 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2479 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 2480 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2481 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2482 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2483 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2484 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 2485 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2486 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2487 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 2488 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 2489 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4 2490 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2491 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4 2492 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2493 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 2494 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 2495 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 2496 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2497 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4 2498 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 2499 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 2500 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 2501 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4 2502 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4 2503 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4 2504 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 2505 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 2506 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 2507 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2508 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 2509 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP12]], align 4 2510 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2511 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 2512 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP14]], align 4 2513 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2514 // CHECK11-NEXT: store i64 4, i64* [[TMP15]], align 4 2515 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2516 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2517 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2518 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 2519 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4 2520 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2521 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 2522 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4 2523 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 2524 // CHECK11-NEXT: store i64 4, i64* [[TMP21]], align 4 2525 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2526 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 2527 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2528 // CHECK11-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32* 2529 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP24]], align 4 2530 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2531 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 2532 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP26]], align 4 2533 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2534 // CHECK11-NEXT: store i64 4, i64* [[TMP27]], align 4 2535 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2536 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4 2537 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2538 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2539 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4 2540 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2541 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 2542 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP32]], align 4 2543 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 2544 // CHECK11-NEXT: store i64 4, i64* [[TMP33]], align 4 2545 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2546 // CHECK11-NEXT: store i8* null, i8** [[TMP34]], align 4 2547 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2548 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32** 2549 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 4 2550 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2551 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32** 2552 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP38]], align 4 2553 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 2554 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP39]], align 4 2555 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2556 // CHECK11-NEXT: store i8* null, i8** [[TMP40]], align 4 2557 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2558 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2559 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2560 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[N]], align 4 2561 // CHECK11-NEXT: store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_]], align 4 2562 // CHECK11-NEXT: [[TMP45:%.*]] = load i32, i32* [[M]], align 4 2563 // CHECK11-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2564 // CHECK11-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2565 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP46]], 0 2566 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2567 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 2568 // CHECK11-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2569 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP47]], 0 2570 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 2571 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 2572 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 2573 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 2574 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8 2575 // CHECK11-NEXT: [[TMP48:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8 2576 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP48]], 1 2577 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]]) 2578 // CHECK11-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, i32 5, i8** [[TMP41]], i8** [[TMP42]], i64* [[TMP43]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2579 // CHECK11-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0 2580 // CHECK11-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2581 // CHECK11: omp_offload.failed: 2582 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2583 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2584 // CHECK11: omp_offload.cont: 2585 // CHECK11-NEXT: [[TMP51:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2586 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10ELi2EEiT_(i32 [[TMP51]]) 2587 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2588 // CHECK11-NEXT: [[TMP52:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2589 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP52]]) 2590 // CHECK11-NEXT: [[TMP53:%.*]] = load i32, i32* [[RETVAL]], align 4 2591 // CHECK11-NEXT: ret i32 [[TMP53]] 2592 // 2593 // 2594 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 2595 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2596 // CHECK11-NEXT: entry: 2597 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2598 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 2599 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2600 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 2601 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2602 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2603 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 2604 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2605 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 2606 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2607 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2608 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 2609 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2610 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 2611 // CHECK11-NEXT: ret void 2612 // 2613 // 2614 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2615 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2616 // CHECK11-NEXT: entry: 2617 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2618 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2619 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2620 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 2621 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2622 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 2623 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2624 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 2625 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2626 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 2627 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2628 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 2629 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 2630 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2631 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 2632 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 2633 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 2634 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 2635 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2636 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4 2637 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4 2638 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2639 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2640 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2641 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 2642 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2643 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 2644 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2645 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2646 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 2647 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2648 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 2649 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2650 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2651 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2652 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 2653 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 2654 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2655 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2656 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2657 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 2658 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2659 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 2660 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 2661 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 2662 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 2663 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 2664 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 2665 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2666 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4 2667 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2668 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 2669 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 2670 // CHECK11: land.lhs.true: 2671 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2672 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 2673 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 2674 // CHECK11: omp.precond.then: 2675 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 2676 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2677 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 2678 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 2679 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2680 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2681 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2682 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 2683 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2684 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2685 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 2686 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2687 // CHECK11: cond.true: 2688 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2689 // CHECK11-NEXT: br label [[COND_END:%.*]] 2690 // CHECK11: cond.false: 2691 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2692 // CHECK11-NEXT: br label [[COND_END]] 2693 // CHECK11: cond.end: 2694 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 2695 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 2696 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 2697 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 2698 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2699 // CHECK11: omp.inner.for.cond: 2700 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2701 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2702 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 2703 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2704 // CHECK11: omp.inner.for.body: 2705 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 2706 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32 2707 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2708 // CHECK11-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32 2709 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP24]], i32* [[TMP0]], i32* [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], i32* [[TMP4]]) 2710 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2711 // CHECK11: omp.inner.for.inc: 2712 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2713 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 2714 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]] 2715 // CHECK11-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 2716 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2717 // CHECK11: omp.inner.for.end: 2718 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2719 // CHECK11: omp.loop.exit: 2720 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2721 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 2722 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 2723 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2724 // CHECK11: omp.precond.end: 2725 // CHECK11-NEXT: ret void 2726 // 2727 // 2728 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2729 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2730 // CHECK11-NEXT: entry: 2731 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2732 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2733 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2734 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2735 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2736 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 2737 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2738 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 2739 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2740 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 2741 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2742 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 2743 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2744 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 2745 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 2746 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2747 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 2748 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 2749 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 2750 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 2751 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2752 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4 2753 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4 2754 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2755 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2756 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2757 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2758 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2759 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 2760 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2761 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 2762 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2763 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2764 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 2765 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2766 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 2767 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2768 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2769 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2770 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 2771 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 2772 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2773 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2774 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2775 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 2776 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2777 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 2778 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 2779 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 2780 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 2781 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 2782 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 2783 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2784 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4 2785 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2786 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 2787 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 2788 // CHECK11: land.lhs.true: 2789 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2790 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 2791 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 2792 // CHECK11: omp.precond.then: 2793 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 2794 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2795 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 2796 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2797 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP12]] to i64 2798 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2799 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP13]] to i64 2800 // CHECK11-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8 2801 // CHECK11-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8 2802 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 2803 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2804 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2805 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2806 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 2807 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 2808 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2809 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 2810 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2811 // CHECK11: cond.true: 2812 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2813 // CHECK11-NEXT: br label [[COND_END:%.*]] 2814 // CHECK11: cond.false: 2815 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 2816 // CHECK11-NEXT: br label [[COND_END]] 2817 // CHECK11: cond.end: 2818 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 2819 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 2820 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 2821 // CHECK11-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 2822 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2823 // CHECK11: omp.inner.for.cond: 2824 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2825 // CHECK11-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 2826 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 2827 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2828 // CHECK11: omp.inner.for.body: 2829 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2830 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2831 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 0 2832 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 2833 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]] 2834 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64 2835 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]] 2836 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1 2837 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]] 2838 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32 2839 // CHECK11-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4 2840 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2841 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2842 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2843 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 0 2844 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 2845 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]] 2846 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64 2847 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]] 2848 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2849 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 0 2850 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 2851 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]] 2852 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64 2853 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]] 2854 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]] 2855 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1 2856 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]] 2857 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32 2858 // CHECK11-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4 2859 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[I13]], align 4 2860 // CHECK11-NEXT: [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]] 2861 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP30]] 2862 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[J14]], align 4 2863 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP31]] 2864 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4 2865 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2866 // CHECK11: omp.body.continue: 2867 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2868 // CHECK11: omp.inner.for.inc: 2869 // CHECK11-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2870 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP32]], 1 2871 // CHECK11-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8 2872 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2873 // CHECK11: omp.inner.for.end: 2874 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2875 // CHECK11: omp.loop.exit: 2876 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2877 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 2878 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 2879 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2880 // CHECK11: omp.precond.end: 2881 // CHECK11-NEXT: ret void 2882 // 2883 // 2884 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 2885 // CHECK11-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 2886 // CHECK11-NEXT: entry: 2887 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2888 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 2889 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2890 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2891 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2892 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2893 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2894 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2895 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2896 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 2897 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4 2898 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2899 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 2900 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4 2901 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2902 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 2903 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2904 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2905 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20) 2906 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2907 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2908 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2909 // CHECK11: omp_offload.failed: 2910 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 2911 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2912 // CHECK11: omp_offload.cont: 2913 // CHECK11-NEXT: ret i32 0 2914 // 2915 // 2916 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 2917 // CHECK11-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2918 // CHECK11-NEXT: entry: 2919 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 2920 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 2921 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 2922 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 2923 // CHECK11-NEXT: ret void 2924 // 2925 // 2926 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 2927 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2928 // CHECK11-NEXT: entry: 2929 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2930 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2931 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 2932 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2933 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2934 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2935 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2936 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2937 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2938 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2939 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2940 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 2941 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2942 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2943 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 2944 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 2945 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2946 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 2947 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2948 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2949 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2950 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2951 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2952 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2953 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 2954 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2955 // CHECK11: cond.true: 2956 // CHECK11-NEXT: br label [[COND_END:%.*]] 2957 // CHECK11: cond.false: 2958 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2959 // CHECK11-NEXT: br label [[COND_END]] 2960 // CHECK11: cond.end: 2961 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2962 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2963 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2964 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2965 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2966 // CHECK11: omp.inner.for.cond: 2967 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2968 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2969 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2970 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2971 // CHECK11: omp.inner.for.body: 2972 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2973 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2974 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]]) 2975 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2976 // CHECK11: omp.inner.for.inc: 2977 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2978 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2979 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2980 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2981 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2982 // CHECK11: omp.inner.for.end: 2983 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2984 // CHECK11: omp.loop.exit: 2985 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2986 // CHECK11-NEXT: ret void 2987 // 2988 // 2989 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 2990 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2991 // CHECK11-NEXT: entry: 2992 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2993 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2994 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2995 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2996 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 2997 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2998 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2999 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3000 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3001 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3002 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3003 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3004 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3005 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 3006 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3007 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3008 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3009 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3010 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 3011 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 3012 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3013 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 3014 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3015 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3016 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3017 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3018 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3019 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3020 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3021 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3022 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3023 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3024 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 3025 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3026 // CHECK11: cond.true: 3027 // CHECK11-NEXT: br label [[COND_END:%.*]] 3028 // CHECK11: cond.false: 3029 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3030 // CHECK11-NEXT: br label [[COND_END]] 3031 // CHECK11: cond.end: 3032 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3033 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3034 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3035 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3036 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3037 // CHECK11: omp.inner.for.cond: 3038 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3039 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3040 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3041 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3042 // CHECK11: omp.inner.for.body: 3043 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3044 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 3045 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 3046 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3047 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3048 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3049 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3050 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2 3051 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 3052 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 3053 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 3054 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 3055 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 3056 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 3057 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]] 3058 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 3059 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 3060 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 3061 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3062 // CHECK11: omp.body.continue: 3063 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3064 // CHECK11: omp.inner.for.inc: 3065 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3066 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 3067 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 3068 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3069 // CHECK11: omp.inner.for.end: 3070 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3071 // CHECK11: omp.loop.exit: 3072 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3073 // CHECK11-NEXT: ret void 3074 // 3075 // 3076 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3077 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] { 3078 // CHECK11-NEXT: entry: 3079 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 3080 // CHECK11-NEXT: ret void 3081 // 3082 // 3083 // CHECK12-LABEL: define {{[^@]+}}@main 3084 // CHECK12-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3085 // CHECK12-NEXT: entry: 3086 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3087 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3088 // CHECK12-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 3089 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4 3090 // CHECK12-NEXT: [[M:%.*]] = alloca i32, align 4 3091 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3092 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3093 // CHECK12-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 3094 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3095 // CHECK12-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 3096 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 3097 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 3098 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 3099 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 3100 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3101 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3102 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3103 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3104 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 3105 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3106 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3107 // CHECK12-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 3108 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4 3109 // CHECK12-NEXT: store i32 2, i32* [[M]], align 4 3110 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3111 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4 3112 // CHECK12-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3113 // CHECK12-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 3114 // CHECK12-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 3115 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 3116 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3117 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4 3118 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 3119 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 3120 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 3121 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4 3122 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4 3123 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4 3124 // CHECK12-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 3125 // CHECK12-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 3126 // CHECK12-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 3127 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3128 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 3129 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP12]], align 4 3130 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3131 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 3132 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP14]], align 4 3133 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3134 // CHECK12-NEXT: store i64 4, i64* [[TMP15]], align 4 3135 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3136 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 3137 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3138 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 3139 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4 3140 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3141 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 3142 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4 3143 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3144 // CHECK12-NEXT: store i64 4, i64* [[TMP21]], align 4 3145 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3146 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4 3147 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3148 // CHECK12-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32* 3149 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP24]], align 4 3150 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3151 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 3152 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP26]], align 4 3153 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3154 // CHECK12-NEXT: store i64 4, i64* [[TMP27]], align 4 3155 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3156 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4 3157 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3158 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 3159 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4 3160 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3161 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 3162 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP32]], align 4 3163 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 3164 // CHECK12-NEXT: store i64 4, i64* [[TMP33]], align 4 3165 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3166 // CHECK12-NEXT: store i8* null, i8** [[TMP34]], align 4 3167 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3168 // CHECK12-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32** 3169 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 4 3170 // CHECK12-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3171 // CHECK12-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32** 3172 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP38]], align 4 3173 // CHECK12-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 3174 // CHECK12-NEXT: store i64 [[TMP10]], i64* [[TMP39]], align 4 3175 // CHECK12-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 3176 // CHECK12-NEXT: store i8* null, i8** [[TMP40]], align 4 3177 // CHECK12-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3178 // CHECK12-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3179 // CHECK12-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3180 // CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[N]], align 4 3181 // CHECK12-NEXT: store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_]], align 4 3182 // CHECK12-NEXT: [[TMP45:%.*]] = load i32, i32* [[M]], align 4 3183 // CHECK12-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3184 // CHECK12-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3185 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP46]], 0 3186 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3187 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 3188 // CHECK12-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3189 // CHECK12-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP47]], 0 3190 // CHECK12-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 3191 // CHECK12-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 3192 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 3193 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 3194 // CHECK12-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8 3195 // CHECK12-NEXT: [[TMP48:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8 3196 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP48]], 1 3197 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]]) 3198 // CHECK12-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, i32 5, i8** [[TMP41]], i8** [[TMP42]], i64* [[TMP43]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3199 // CHECK12-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0 3200 // CHECK12-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3201 // CHECK12: omp_offload.failed: 3202 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3203 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3204 // CHECK12: omp_offload.cont: 3205 // CHECK12-NEXT: [[TMP51:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3206 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10ELi2EEiT_(i32 [[TMP51]]) 3207 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3208 // CHECK12-NEXT: [[TMP52:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3209 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP52]]) 3210 // CHECK12-NEXT: [[TMP53:%.*]] = load i32, i32* [[RETVAL]], align 4 3211 // CHECK12-NEXT: ret i32 [[TMP53]] 3212 // 3213 // 3214 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 3215 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3216 // CHECK12-NEXT: entry: 3217 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3218 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 3219 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3220 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 3221 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3222 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3223 // CHECK12-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 3224 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3225 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 3226 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3227 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3228 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 3229 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3230 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 3231 // CHECK12-NEXT: ret void 3232 // 3233 // 3234 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 3235 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3236 // CHECK12-NEXT: entry: 3237 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3238 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3239 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3240 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 3241 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3242 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 3243 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3244 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 3245 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3246 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 3247 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3248 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 3249 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 3250 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3251 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4 3252 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 3253 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 3254 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 3255 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3256 // CHECK12-NEXT: [[I11:%.*]] = alloca i32, align 4 3257 // CHECK12-NEXT: [[J12:%.*]] = alloca i32, align 4 3258 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3259 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3260 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3261 // CHECK12-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 3262 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3263 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 3264 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3265 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3266 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 3267 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3268 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 3269 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3270 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3271 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3272 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 3273 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 3274 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3275 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 3276 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3277 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 3278 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3279 // CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 3280 // CHECK12-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3281 // CHECK12-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 3282 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 3283 // CHECK12-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 3284 // CHECK12-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 3285 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 3286 // CHECK12-NEXT: store i32 0, i32* [[J]], align 4 3287 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3288 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 3289 // CHECK12-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 3290 // CHECK12: land.lhs.true: 3291 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3292 // CHECK12-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 3293 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 3294 // CHECK12: omp.precond.then: 3295 // CHECK12-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 3296 // CHECK12-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3297 // CHECK12-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 3298 // CHECK12-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 3299 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3300 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3301 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 3302 // CHECK12-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 3303 // CHECK12-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 3304 // CHECK12-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3305 // CHECK12-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 3306 // CHECK12-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3307 // CHECK12: cond.true: 3308 // CHECK12-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3309 // CHECK12-NEXT: br label [[COND_END:%.*]] 3310 // CHECK12: cond.false: 3311 // CHECK12-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 3312 // CHECK12-NEXT: br label [[COND_END]] 3313 // CHECK12: cond.end: 3314 // CHECK12-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 3315 // CHECK12-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 3316 // CHECK12-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 3317 // CHECK12-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 3318 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3319 // CHECK12: omp.inner.for.cond: 3320 // CHECK12-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3321 // CHECK12-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 3322 // CHECK12-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 3323 // CHECK12-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3324 // CHECK12: omp.inner.for.body: 3325 // CHECK12-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 3326 // CHECK12-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32 3327 // CHECK12-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 3328 // CHECK12-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32 3329 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP24]], i32* [[TMP0]], i32* [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], i32* [[TMP4]]) 3330 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3331 // CHECK12: omp.inner.for.inc: 3332 // CHECK12-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3333 // CHECK12-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 3334 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]] 3335 // CHECK12-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 3336 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3337 // CHECK12: omp.inner.for.end: 3338 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3339 // CHECK12: omp.loop.exit: 3340 // CHECK12-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3341 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 3342 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 3343 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 3344 // CHECK12: omp.precond.end: 3345 // CHECK12-NEXT: ret void 3346 // 3347 // 3348 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3349 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3350 // CHECK12-NEXT: entry: 3351 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3352 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3353 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3354 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3355 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3356 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 3357 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3358 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 3359 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3360 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 3361 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3362 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 3363 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3364 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 3365 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 3366 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3367 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4 3368 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 3369 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 3370 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 3371 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3372 // CHECK12-NEXT: [[I13:%.*]] = alloca i32, align 4 3373 // CHECK12-NEXT: [[J14:%.*]] = alloca i32, align 4 3374 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3375 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3376 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3377 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3378 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3379 // CHECK12-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 3380 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3381 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 3382 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3383 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3384 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 3385 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3386 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 3387 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3388 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3389 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3390 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 3391 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 3392 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3393 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 3394 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3395 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 3396 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3397 // CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 3398 // CHECK12-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3399 // CHECK12-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 3400 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 3401 // CHECK12-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 3402 // CHECK12-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 3403 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 3404 // CHECK12-NEXT: store i32 0, i32* [[J]], align 4 3405 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3406 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 3407 // CHECK12-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 3408 // CHECK12: land.lhs.true: 3409 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3410 // CHECK12-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 3411 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 3412 // CHECK12: omp.precond.then: 3413 // CHECK12-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 3414 // CHECK12-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3415 // CHECK12-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 3416 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3417 // CHECK12-NEXT: [[CONV11:%.*]] = zext i32 [[TMP12]] to i64 3418 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3419 // CHECK12-NEXT: [[CONV12:%.*]] = zext i32 [[TMP13]] to i64 3420 // CHECK12-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8 3421 // CHECK12-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8 3422 // CHECK12-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 3423 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3424 // CHECK12-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3425 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 3426 // CHECK12-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 3427 // CHECK12-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3428 // CHECK12-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3429 // CHECK12-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 3430 // CHECK12-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3431 // CHECK12: cond.true: 3432 // CHECK12-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3433 // CHECK12-NEXT: br label [[COND_END:%.*]] 3434 // CHECK12: cond.false: 3435 // CHECK12-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3436 // CHECK12-NEXT: br label [[COND_END]] 3437 // CHECK12: cond.end: 3438 // CHECK12-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 3439 // CHECK12-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 3440 // CHECK12-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 3441 // CHECK12-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 3442 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3443 // CHECK12: omp.inner.for.cond: 3444 // CHECK12-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3445 // CHECK12-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3446 // CHECK12-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 3447 // CHECK12-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3448 // CHECK12: omp.inner.for.body: 3449 // CHECK12-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3450 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3451 // CHECK12-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 0 3452 // CHECK12-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 3453 // CHECK12-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]] 3454 // CHECK12-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64 3455 // CHECK12-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]] 3456 // CHECK12-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1 3457 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]] 3458 // CHECK12-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32 3459 // CHECK12-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4 3460 // CHECK12-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3461 // CHECK12-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3462 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3463 // CHECK12-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 0 3464 // CHECK12-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 3465 // CHECK12-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]] 3466 // CHECK12-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64 3467 // CHECK12-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]] 3468 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3469 // CHECK12-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 0 3470 // CHECK12-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 3471 // CHECK12-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]] 3472 // CHECK12-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64 3473 // CHECK12-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]] 3474 // CHECK12-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]] 3475 // CHECK12-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1 3476 // CHECK12-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]] 3477 // CHECK12-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32 3478 // CHECK12-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4 3479 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[I13]], align 4 3480 // CHECK12-NEXT: [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]] 3481 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP30]] 3482 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[J14]], align 4 3483 // CHECK12-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP31]] 3484 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4 3485 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3486 // CHECK12: omp.body.continue: 3487 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3488 // CHECK12: omp.inner.for.inc: 3489 // CHECK12-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3490 // CHECK12-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP32]], 1 3491 // CHECK12-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8 3492 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3493 // CHECK12: omp.inner.for.end: 3494 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3495 // CHECK12: omp.loop.exit: 3496 // CHECK12-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3497 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3498 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 3499 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 3500 // CHECK12: omp.precond.end: 3501 // CHECK12-NEXT: ret void 3502 // 3503 // 3504 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 3505 // CHECK12-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 3506 // CHECK12-NEXT: entry: 3507 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3508 // CHECK12-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 3509 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 3510 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 3511 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 3512 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3513 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3514 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3515 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3516 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 3517 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4 3518 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3519 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 3520 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4 3521 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3522 // CHECK12-NEXT: store i8* null, i8** [[TMP4]], align 4 3523 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3524 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3525 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20) 3526 // CHECK12-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3527 // CHECK12-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3528 // CHECK12-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3529 // CHECK12: omp_offload.failed: 3530 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 3531 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3532 // CHECK12: omp_offload.cont: 3533 // CHECK12-NEXT: ret i32 0 3534 // 3535 // 3536 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 3537 // CHECK12-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 3538 // CHECK12-NEXT: entry: 3539 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 3540 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 3541 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 3542 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 3543 // CHECK12-NEXT: ret void 3544 // 3545 // 3546 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 3547 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 3548 // CHECK12-NEXT: entry: 3549 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3550 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3551 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 3552 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3553 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3554 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3555 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3556 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3557 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3558 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3559 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3560 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4 3561 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3562 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3563 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 3564 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 3565 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3566 // CHECK12-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 3567 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3568 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3569 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3570 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3571 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3572 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3573 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 3574 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3575 // CHECK12: cond.true: 3576 // CHECK12-NEXT: br label [[COND_END:%.*]] 3577 // CHECK12: cond.false: 3578 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3579 // CHECK12-NEXT: br label [[COND_END]] 3580 // CHECK12: cond.end: 3581 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3582 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3583 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3584 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3585 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3586 // CHECK12: omp.inner.for.cond: 3587 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3588 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3589 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3590 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3591 // CHECK12: omp.inner.for.body: 3592 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3593 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3594 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]]) 3595 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3596 // CHECK12: omp.inner.for.inc: 3597 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3598 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3599 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3600 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3601 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3602 // CHECK12: omp.inner.for.end: 3603 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3604 // CHECK12: omp.loop.exit: 3605 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3606 // CHECK12-NEXT: ret void 3607 // 3608 // 3609 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 3610 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 3611 // CHECK12-NEXT: entry: 3612 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3613 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3614 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3615 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3616 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 3617 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3618 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3619 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3620 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3621 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3622 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3623 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3624 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3625 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4 3626 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3627 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3628 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3629 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3630 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 3631 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 3632 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3633 // CHECK12-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 3634 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3635 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3636 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3637 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3638 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3639 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3640 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3641 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3642 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3643 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3644 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 3645 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3646 // CHECK12: cond.true: 3647 // CHECK12-NEXT: br label [[COND_END:%.*]] 3648 // CHECK12: cond.false: 3649 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3650 // CHECK12-NEXT: br label [[COND_END]] 3651 // CHECK12: cond.end: 3652 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3653 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3654 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3655 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3656 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3657 // CHECK12: omp.inner.for.cond: 3658 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3659 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3660 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3661 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3662 // CHECK12: omp.inner.for.body: 3663 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3664 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 3665 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 3666 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3667 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3668 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3669 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3670 // CHECK12-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2 3671 // CHECK12-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 3672 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 3673 // CHECK12-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 3674 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 3675 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 3676 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 3677 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]] 3678 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 3679 // CHECK12-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 3680 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 3681 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3682 // CHECK12: omp.body.continue: 3683 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3684 // CHECK12: omp.inner.for.inc: 3685 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3686 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 3687 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 3688 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3689 // CHECK12: omp.inner.for.end: 3690 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3691 // CHECK12: omp.loop.exit: 3692 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3693 // CHECK12-NEXT: ret void 3694 // 3695 // 3696 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3697 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] { 3698 // CHECK12-NEXT: entry: 3699 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3700 // CHECK12-NEXT: ret void 3701 // 3702 // 3703 // CHECK13-LABEL: define {{[^@]+}}@main 3704 // CHECK13-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3705 // CHECK13-NEXT: entry: 3706 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3707 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3708 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3709 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 3710 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 3711 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3712 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3713 // CHECK13-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 3714 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3715 // CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4 3716 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3717 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3718 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3719 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 3720 // CHECK13-NEXT: store i32 2, i32* [[M]], align 4 3721 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3722 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3723 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4 3724 // CHECK13-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 3725 // CHECK13-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave() 3726 // CHECK13-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8 3727 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 3728 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 3729 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3730 // CHECK13-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 3731 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3732 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 3733 // CHECK13: for.cond: 3734 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 3735 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[N]], align 4 3736 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 3737 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END8:%.*]] 3738 // CHECK13: for.body: 3739 // CHECK13-NEXT: store i32 0, i32* [[J]], align 4 3740 // CHECK13-NEXT: br label [[FOR_COND1:%.*]] 3741 // CHECK13: for.cond1: 3742 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[J]], align 4 3743 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[M]], align 4 3744 // CHECK13-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]] 3745 // CHECK13-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END:%.*]] 3746 // CHECK13: for.body3: 3747 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4 3748 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 3749 // CHECK13-NEXT: [[TMP11:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 3750 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[TMP11]] 3751 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 3752 // CHECK13-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i64 3753 // CHECK13-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM4]] 3754 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX5]], align 4 3755 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 3756 // CHECK13: for.inc: 3757 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[J]], align 4 3758 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP13]], 1 3759 // CHECK13-NEXT: store i32 [[INC]], i32* [[J]], align 4 3760 // CHECK13-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP2:![0-9]+]] 3761 // CHECK13: for.end: 3762 // CHECK13-NEXT: br label [[FOR_INC6:%.*]] 3763 // CHECK13: for.inc6: 3764 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 3765 // CHECK13-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP14]], 1 3766 // CHECK13-NEXT: store i32 [[INC7]], i32* [[I]], align 4 3767 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3768 // CHECK13: for.end8: 3769 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3770 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 signext [[TMP15]]) 3771 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3772 // CHECK13-NEXT: [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3773 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP16]]) 3774 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 3775 // CHECK13-NEXT: ret i32 [[TMP17]] 3776 // 3777 // 3778 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 3779 // CHECK13-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 3780 // CHECK13-NEXT: entry: 3781 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3782 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 3783 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3784 // CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4 3785 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3786 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3787 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 3788 // CHECK13: for.cond: 3789 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 3790 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 3791 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END8:%.*]] 3792 // CHECK13: for.body: 3793 // CHECK13-NEXT: store i32 0, i32* [[J]], align 4 3794 // CHECK13-NEXT: br label [[FOR_COND1:%.*]] 3795 // CHECK13: for.cond1: 3796 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[J]], align 4 3797 // CHECK13-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP1]], 2 3798 // CHECK13-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END:%.*]] 3799 // CHECK13: for.body3: 3800 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 3801 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64 3802 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 3803 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[J]], align 4 3804 // CHECK13-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP3]] to i64 3805 // CHECK13-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM4]] 3806 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX5]], align 4 3807 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 3808 // CHECK13: for.inc: 3809 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[J]], align 4 3810 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 3811 // CHECK13-NEXT: store i32 [[INC]], i32* [[J]], align 4 3812 // CHECK13-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP5:![0-9]+]] 3813 // CHECK13: for.end: 3814 // CHECK13-NEXT: br label [[FOR_INC6:%.*]] 3815 // CHECK13: for.inc6: 3816 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3817 // CHECK13-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP5]], 1 3818 // CHECK13-NEXT: store i32 [[INC7]], i32* [[I]], align 4 3819 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 3820 // CHECK13: for.end8: 3821 // CHECK13-NEXT: ret i32 0 3822 // 3823 // 3824 // CHECK14-LABEL: define {{[^@]+}}@main 3825 // CHECK14-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3826 // CHECK14-NEXT: entry: 3827 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3828 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3829 // CHECK14-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3830 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4 3831 // CHECK14-NEXT: [[M:%.*]] = alloca i32, align 4 3832 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3833 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3834 // CHECK14-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 3835 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3836 // CHECK14-NEXT: [[J:%.*]] = alloca i32, align 4 3837 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3838 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3839 // CHECK14-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3840 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4 3841 // CHECK14-NEXT: store i32 2, i32* [[M]], align 4 3842 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3843 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3844 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4 3845 // CHECK14-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 3846 // CHECK14-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave() 3847 // CHECK14-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8 3848 // CHECK14-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 3849 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 3850 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3851 // CHECK14-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 3852 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 3853 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 3854 // CHECK14: for.cond: 3855 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 3856 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[N]], align 4 3857 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 3858 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END8:%.*]] 3859 // CHECK14: for.body: 3860 // CHECK14-NEXT: store i32 0, i32* [[J]], align 4 3861 // CHECK14-NEXT: br label [[FOR_COND1:%.*]] 3862 // CHECK14: for.cond1: 3863 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[J]], align 4 3864 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[M]], align 4 3865 // CHECK14-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]] 3866 // CHECK14-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END:%.*]] 3867 // CHECK14: for.body3: 3868 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4 3869 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 3870 // CHECK14-NEXT: [[TMP11:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 3871 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[TMP11]] 3872 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 3873 // CHECK14-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i64 3874 // CHECK14-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM4]] 3875 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX5]], align 4 3876 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 3877 // CHECK14: for.inc: 3878 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[J]], align 4 3879 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP13]], 1 3880 // CHECK14-NEXT: store i32 [[INC]], i32* [[J]], align 4 3881 // CHECK14-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP2:![0-9]+]] 3882 // CHECK14: for.end: 3883 // CHECK14-NEXT: br label [[FOR_INC6:%.*]] 3884 // CHECK14: for.inc6: 3885 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 3886 // CHECK14-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP14]], 1 3887 // CHECK14-NEXT: store i32 [[INC7]], i32* [[I]], align 4 3888 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3889 // CHECK14: for.end8: 3890 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3891 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 signext [[TMP15]]) 3892 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3893 // CHECK14-NEXT: [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3894 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP16]]) 3895 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 3896 // CHECK14-NEXT: ret i32 [[TMP17]] 3897 // 3898 // 3899 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 3900 // CHECK14-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 3901 // CHECK14-NEXT: entry: 3902 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3903 // CHECK14-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 3904 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3905 // CHECK14-NEXT: [[J:%.*]] = alloca i32, align 4 3906 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3907 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 3908 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 3909 // CHECK14: for.cond: 3910 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 3911 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 3912 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END8:%.*]] 3913 // CHECK14: for.body: 3914 // CHECK14-NEXT: store i32 0, i32* [[J]], align 4 3915 // CHECK14-NEXT: br label [[FOR_COND1:%.*]] 3916 // CHECK14: for.cond1: 3917 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[J]], align 4 3918 // CHECK14-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP1]], 2 3919 // CHECK14-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END:%.*]] 3920 // CHECK14: for.body3: 3921 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 3922 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP2]] to i64 3923 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 3924 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[J]], align 4 3925 // CHECK14-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP3]] to i64 3926 // CHECK14-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM4]] 3927 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX5]], align 4 3928 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 3929 // CHECK14: for.inc: 3930 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[J]], align 4 3931 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 3932 // CHECK14-NEXT: store i32 [[INC]], i32* [[J]], align 4 3933 // CHECK14-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP5:![0-9]+]] 3934 // CHECK14: for.end: 3935 // CHECK14-NEXT: br label [[FOR_INC6:%.*]] 3936 // CHECK14: for.inc6: 3937 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3938 // CHECK14-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP5]], 1 3939 // CHECK14-NEXT: store i32 [[INC7]], i32* [[I]], align 4 3940 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 3941 // CHECK14: for.end8: 3942 // CHECK14-NEXT: ret i32 0 3943 // 3944 // 3945 // CHECK15-LABEL: define {{[^@]+}}@main 3946 // CHECK15-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3947 // CHECK15-NEXT: entry: 3948 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3949 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3950 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 3951 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 3952 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 3953 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3954 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3955 // CHECK15-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 3956 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3957 // CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4 3958 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 3959 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3960 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 3961 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 3962 // CHECK15-NEXT: store i32 2, i32* [[M]], align 4 3963 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3964 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4 3965 // CHECK15-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3966 // CHECK15-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 3967 // CHECK15-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 3968 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 3969 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3970 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4 3971 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 3972 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 3973 // CHECK15: for.cond: 3974 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 3975 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4 3976 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], [[TMP5]] 3977 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END7:%.*]] 3978 // CHECK15: for.body: 3979 // CHECK15-NEXT: store i32 0, i32* [[J]], align 4 3980 // CHECK15-NEXT: br label [[FOR_COND1:%.*]] 3981 // CHECK15: for.cond1: 3982 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[J]], align 4 3983 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[M]], align 4 3984 // CHECK15-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 3985 // CHECK15-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END:%.*]] 3986 // CHECK15: for.body3: 3987 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3988 // CHECK15-NEXT: [[TMP9:%.*]] = mul nsw i32 [[TMP8]], [[TMP1]] 3989 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP9]] 3990 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[J]], align 4 3991 // CHECK15-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP10]] 3992 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX4]], align 4 3993 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 3994 // CHECK15: for.inc: 3995 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[J]], align 4 3996 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 3997 // CHECK15-NEXT: store i32 [[INC]], i32* [[J]], align 4 3998 // CHECK15-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP3:![0-9]+]] 3999 // CHECK15: for.end: 4000 // CHECK15-NEXT: br label [[FOR_INC5:%.*]] 4001 // CHECK15: for.inc5: 4002 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 4003 // CHECK15-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP12]], 1 4004 // CHECK15-NEXT: store i32 [[INC6]], i32* [[I]], align 4 4005 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 4006 // CHECK15: for.end7: 4007 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4008 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10ELi2EEiT_(i32 [[TMP13]]) 4009 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4010 // CHECK15-NEXT: [[TMP14:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4011 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP14]]) 4012 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[RETVAL]], align 4 4013 // CHECK15-NEXT: ret i32 [[TMP15]] 4014 // 4015 // 4016 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 4017 // CHECK15-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 4018 // CHECK15-NEXT: entry: 4019 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4020 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 4021 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4022 // CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4 4023 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4024 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 4025 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 4026 // CHECK15: for.cond: 4027 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 4028 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 4029 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END7:%.*]] 4030 // CHECK15: for.body: 4031 // CHECK15-NEXT: store i32 0, i32* [[J]], align 4 4032 // CHECK15-NEXT: br label [[FOR_COND1:%.*]] 4033 // CHECK15: for.cond1: 4034 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[J]], align 4 4035 // CHECK15-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP1]], 2 4036 // CHECK15-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END:%.*]] 4037 // CHECK15: for.body3: 4038 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 4039 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i32 0, i32 [[TMP2]] 4040 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[J]], align 4 4041 // CHECK15-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP3]] 4042 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX4]], align 4 4043 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 4044 // CHECK15: for.inc: 4045 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[J]], align 4 4046 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 4047 // CHECK15-NEXT: store i32 [[INC]], i32* [[J]], align 4 4048 // CHECK15-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP6:![0-9]+]] 4049 // CHECK15: for.end: 4050 // CHECK15-NEXT: br label [[FOR_INC5:%.*]] 4051 // CHECK15: for.inc5: 4052 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4053 // CHECK15-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP5]], 1 4054 // CHECK15-NEXT: store i32 [[INC6]], i32* [[I]], align 4 4055 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 4056 // CHECK15: for.end7: 4057 // CHECK15-NEXT: ret i32 0 4058 // 4059 // 4060 // CHECK16-LABEL: define {{[^@]+}}@main 4061 // CHECK16-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4062 // CHECK16-NEXT: entry: 4063 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4064 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4065 // CHECK16-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 4066 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4 4067 // CHECK16-NEXT: [[M:%.*]] = alloca i32, align 4 4068 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4069 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4070 // CHECK16-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 4071 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4072 // CHECK16-NEXT: [[J:%.*]] = alloca i32, align 4 4073 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4074 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4075 // CHECK16-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 4076 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4 4077 // CHECK16-NEXT: store i32 2, i32* [[M]], align 4 4078 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4079 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4 4080 // CHECK16-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 4081 // CHECK16-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 4082 // CHECK16-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 4083 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 4084 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 4085 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4 4086 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 4087 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 4088 // CHECK16: for.cond: 4089 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 4090 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4 4091 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], [[TMP5]] 4092 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END7:%.*]] 4093 // CHECK16: for.body: 4094 // CHECK16-NEXT: store i32 0, i32* [[J]], align 4 4095 // CHECK16-NEXT: br label [[FOR_COND1:%.*]] 4096 // CHECK16: for.cond1: 4097 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[J]], align 4 4098 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[M]], align 4 4099 // CHECK16-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 4100 // CHECK16-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END:%.*]] 4101 // CHECK16: for.body3: 4102 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4103 // CHECK16-NEXT: [[TMP9:%.*]] = mul nsw i32 [[TMP8]], [[TMP1]] 4104 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP9]] 4105 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[J]], align 4 4106 // CHECK16-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP10]] 4107 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX4]], align 4 4108 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 4109 // CHECK16: for.inc: 4110 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[J]], align 4 4111 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 4112 // CHECK16-NEXT: store i32 [[INC]], i32* [[J]], align 4 4113 // CHECK16-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP3:![0-9]+]] 4114 // CHECK16: for.end: 4115 // CHECK16-NEXT: br label [[FOR_INC5:%.*]] 4116 // CHECK16: for.inc5: 4117 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4 4118 // CHECK16-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP12]], 1 4119 // CHECK16-NEXT: store i32 [[INC6]], i32* [[I]], align 4 4120 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 4121 // CHECK16: for.end7: 4122 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4123 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10ELi2EEiT_(i32 [[TMP13]]) 4124 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4125 // CHECK16-NEXT: [[TMP14:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4126 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP14]]) 4127 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[RETVAL]], align 4 4128 // CHECK16-NEXT: ret i32 [[TMP15]] 4129 // 4130 // 4131 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 4132 // CHECK16-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 4133 // CHECK16-NEXT: entry: 4134 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4135 // CHECK16-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 4136 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4137 // CHECK16-NEXT: [[J:%.*]] = alloca i32, align 4 4138 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4139 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 4140 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 4141 // CHECK16: for.cond: 4142 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 4143 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 4144 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END7:%.*]] 4145 // CHECK16: for.body: 4146 // CHECK16-NEXT: store i32 0, i32* [[J]], align 4 4147 // CHECK16-NEXT: br label [[FOR_COND1:%.*]] 4148 // CHECK16: for.cond1: 4149 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[J]], align 4 4150 // CHECK16-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP1]], 2 4151 // CHECK16-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END:%.*]] 4152 // CHECK16: for.body3: 4153 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 4154 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i32 0, i32 [[TMP2]] 4155 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[J]], align 4 4156 // CHECK16-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP3]] 4157 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX4]], align 4 4158 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 4159 // CHECK16: for.inc: 4160 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[J]], align 4 4161 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 4162 // CHECK16-NEXT: store i32 [[INC]], i32* [[J]], align 4 4163 // CHECK16-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP6:![0-9]+]] 4164 // CHECK16: for.end: 4165 // CHECK16-NEXT: br label [[FOR_INC5:%.*]] 4166 // CHECK16: for.inc5: 4167 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4168 // CHECK16-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP5]], 1 4169 // CHECK16-NEXT: store i32 [[INC6]], i32* [[I]], align 4 4170 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 4171 // CHECK16: for.end7: 4172 // CHECK16-NEXT: ret i32 0 4173 // 4174