1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X][Y]; 25 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute parallel for collapse(2) 30 for(int i = 0; i < X; i++) { 31 for(int j = 0; j < Y; j++) { 32 a[i][j] = (T)0; 33 } 34 } 35 36 // discard loop variables not needed here 37 38 39 return a[0][0]; 40 } 41 }; 42 43 int teams_template_struct(void) { 44 SS<int, 123, 456> V; 45 return V.foo(); 46 47 } 48 #endif // CK1 49 50 // Test host codegen. 51 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 52 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 53 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 54 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 56 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 57 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 64 #ifdef CK2 65 66 template <typename T, int n, int m> 67 int tmain(T argc) { 68 T a[n][m]; 69 #pragma omp target 70 #pragma omp teams distribute parallel for collapse(2) 71 for(int i = 0; i < n; i++) { 72 for(int j = 0; j < m; j++) { 73 a[i][j] = (T)0; 74 } 75 } 76 return 0; 77 } 78 79 int main (int argc, char **argv) { 80 int n = 100; 81 int m = 2; 82 int a[n][m]; 83 #pragma omp target 84 #pragma omp teams distribute parallel for collapse(2) 85 for(int i = 0; i < n; i++) { 86 for(int j = 0; j < m; j++) { 87 a[i][j] = 0; 88 } 89 } 90 return tmain<int, 10, 2>(argc); 91 } 92 93 94 95 96 97 98 99 100 // discard loop variables not needed here 101 102 103 #endif // CK2 104 #endif // #ifndef HEADER 105 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 106 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 107 // CHECK1-NEXT: entry: 108 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 109 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 110 // CHECK1-NEXT: ret i32 [[CALL]] 111 // 112 // 113 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 114 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 115 // CHECK1-NEXT: entry: 116 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 117 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 118 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 119 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 120 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 121 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 122 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 123 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 124 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 125 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 126 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 127 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 128 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 129 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 130 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8 131 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 132 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 133 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 134 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 135 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088) 136 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 137 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 138 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 139 // CHECK1: omp_offload.failed: 140 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 141 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 142 // CHECK1: omp_offload.cont: 143 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 144 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0 145 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0 146 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 147 // CHECK1-NEXT: ret i32 [[TMP9]] 148 // 149 // 150 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 151 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 152 // CHECK1-NEXT: entry: 153 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 154 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 155 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 156 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 157 // CHECK1-NEXT: ret void 158 // 159 // 160 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 161 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 162 // CHECK1-NEXT: entry: 163 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 164 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 165 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 166 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 168 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 169 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 171 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 172 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 173 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 174 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 175 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 176 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 177 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 178 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 179 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 180 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 181 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 182 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 183 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 184 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 185 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 186 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 187 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 188 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 189 // CHECK1: cond.true: 190 // CHECK1-NEXT: br label [[COND_END:%.*]] 191 // CHECK1: cond.false: 192 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 193 // CHECK1-NEXT: br label [[COND_END]] 194 // CHECK1: cond.end: 195 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 196 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 197 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 198 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 199 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 200 // CHECK1: omp.inner.for.cond: 201 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 202 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 203 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 204 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 205 // CHECK1: omp.inner.for.body: 206 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 207 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 208 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 209 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 210 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 211 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 212 // CHECK1: omp.inner.for.inc: 213 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 214 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 215 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 216 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 217 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 218 // CHECK1: omp.inner.for.end: 219 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 220 // CHECK1: omp.loop.exit: 221 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 222 // CHECK1-NEXT: ret void 223 // 224 // 225 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 226 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 227 // CHECK1-NEXT: entry: 228 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 229 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 230 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 231 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 232 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 233 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 236 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 237 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 238 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 239 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 243 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 244 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 245 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 246 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 247 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 248 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 249 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 250 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 251 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 252 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 253 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 254 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 255 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 256 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 257 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 258 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 259 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 260 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 261 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 262 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 263 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 264 // CHECK1: cond.true: 265 // CHECK1-NEXT: br label [[COND_END:%.*]] 266 // CHECK1: cond.false: 267 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 268 // CHECK1-NEXT: br label [[COND_END]] 269 // CHECK1: cond.end: 270 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 271 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 272 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 273 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 274 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 275 // CHECK1: omp.inner.for.cond: 276 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 277 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 278 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 279 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 280 // CHECK1: omp.inner.for.body: 281 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 282 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 283 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 284 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 285 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 286 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 287 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 288 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456 289 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456 290 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 291 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 292 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 293 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 294 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 295 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 296 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 297 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 298 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 299 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 300 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 301 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 302 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 303 // CHECK1: omp.body.continue: 304 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 305 // CHECK1: omp.inner.for.inc: 306 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 307 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 308 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 309 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 310 // CHECK1: omp.inner.for.end: 311 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 312 // CHECK1: omp.loop.exit: 313 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 314 // CHECK1-NEXT: ret void 315 // 316 // 317 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 318 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 319 // CHECK1-NEXT: entry: 320 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 321 // CHECK1-NEXT: ret void 322 // 323 // 324 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv 325 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 326 // CHECK2-NEXT: entry: 327 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 328 // CHECK2-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 329 // CHECK2-NEXT: ret i32 [[CALL]] 330 // 331 // 332 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 333 // CHECK2-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 334 // CHECK2-NEXT: entry: 335 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 336 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 337 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 338 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 339 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 340 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 341 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 342 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 343 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 344 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 345 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 346 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 347 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 348 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 349 // CHECK2-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8 350 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 351 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8 352 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 353 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 354 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088) 355 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 356 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 357 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 358 // CHECK2: omp_offload.failed: 359 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 360 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 361 // CHECK2: omp_offload.cont: 362 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 363 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0 364 // CHECK2-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0 365 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 366 // CHECK2-NEXT: ret i32 [[TMP9]] 367 // 368 // 369 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 370 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 371 // CHECK2-NEXT: entry: 372 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 373 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 374 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 375 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 376 // CHECK2-NEXT: ret void 377 // 378 // 379 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 380 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 381 // CHECK2-NEXT: entry: 382 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 383 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 384 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 385 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 386 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 387 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 388 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 389 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 390 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 391 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 392 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 393 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4 394 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 395 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 396 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 397 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 398 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 399 // CHECK2-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 400 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 401 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 402 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 403 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 404 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 405 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 406 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 407 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 408 // CHECK2: cond.true: 409 // CHECK2-NEXT: br label [[COND_END:%.*]] 410 // CHECK2: cond.false: 411 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 412 // CHECK2-NEXT: br label [[COND_END]] 413 // CHECK2: cond.end: 414 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 415 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 416 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 417 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 418 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 419 // CHECK2: omp.inner.for.cond: 420 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 421 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 422 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 423 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 424 // CHECK2: omp.inner.for.body: 425 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 426 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 427 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 428 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 429 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 430 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 431 // CHECK2: omp.inner.for.inc: 432 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 433 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 434 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 435 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 436 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 437 // CHECK2: omp.inner.for.end: 438 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 439 // CHECK2: omp.loop.exit: 440 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 441 // CHECK2-NEXT: ret void 442 // 443 // 444 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 445 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 446 // CHECK2-NEXT: entry: 447 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 448 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 449 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 450 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 451 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 452 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 453 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 454 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 455 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 456 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 457 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 458 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 459 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 460 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4 461 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 462 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 463 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 464 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 465 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 466 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 467 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 468 // CHECK2-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 469 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 470 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 471 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 472 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 473 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 474 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 475 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 476 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 477 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 478 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 479 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 480 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 481 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 482 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 483 // CHECK2: cond.true: 484 // CHECK2-NEXT: br label [[COND_END:%.*]] 485 // CHECK2: cond.false: 486 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 487 // CHECK2-NEXT: br label [[COND_END]] 488 // CHECK2: cond.end: 489 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 490 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 491 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 492 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 493 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 494 // CHECK2: omp.inner.for.cond: 495 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 496 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 497 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 498 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 499 // CHECK2: omp.inner.for.body: 500 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 501 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 502 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 503 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 504 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 505 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 506 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 507 // CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456 508 // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456 509 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 510 // CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 511 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 512 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 513 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 514 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 515 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 516 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 517 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 518 // CHECK2-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 519 // CHECK2-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 520 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 521 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 522 // CHECK2: omp.body.continue: 523 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 524 // CHECK2: omp.inner.for.inc: 525 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 526 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 527 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 528 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 529 // CHECK2: omp.inner.for.end: 530 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 531 // CHECK2: omp.loop.exit: 532 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 533 // CHECK2-NEXT: ret void 534 // 535 // 536 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 537 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 538 // CHECK2-NEXT: entry: 539 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 540 // CHECK2-NEXT: ret void 541 // 542 // 543 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 544 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 545 // CHECK3-NEXT: entry: 546 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 547 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 548 // CHECK3-NEXT: ret i32 [[CALL]] 549 // 550 // 551 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 552 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 553 // CHECK3-NEXT: entry: 554 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 555 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 556 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 557 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 558 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 559 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 560 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 561 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 562 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 563 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 564 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 565 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 566 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 567 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 568 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4 569 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 570 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 571 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 572 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 573 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088) 574 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 575 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 576 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 577 // CHECK3: omp_offload.failed: 578 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 579 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 580 // CHECK3: omp_offload.cont: 581 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 582 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0 583 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0 584 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 585 // CHECK3-NEXT: ret i32 [[TMP9]] 586 // 587 // 588 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 589 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 590 // CHECK3-NEXT: entry: 591 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 592 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 593 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 594 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 595 // CHECK3-NEXT: ret void 596 // 597 // 598 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 599 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 600 // CHECK3-NEXT: entry: 601 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 602 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 603 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 604 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 605 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 606 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 607 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 608 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 609 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 610 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 611 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 612 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 613 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 614 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 615 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 616 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 617 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 618 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 619 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 620 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 621 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 622 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 623 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 624 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 625 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 626 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 627 // CHECK3: cond.true: 628 // CHECK3-NEXT: br label [[COND_END:%.*]] 629 // CHECK3: cond.false: 630 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 631 // CHECK3-NEXT: br label [[COND_END]] 632 // CHECK3: cond.end: 633 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 634 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 635 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 636 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 637 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 638 // CHECK3: omp.inner.for.cond: 639 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 640 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 641 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 642 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 643 // CHECK3: omp.inner.for.body: 644 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 645 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 646 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 647 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 648 // CHECK3: omp.inner.for.inc: 649 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 650 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 651 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 652 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 653 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 654 // CHECK3: omp.inner.for.end: 655 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 656 // CHECK3: omp.loop.exit: 657 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 658 // CHECK3-NEXT: ret void 659 // 660 // 661 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 662 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 663 // CHECK3-NEXT: entry: 664 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 665 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 666 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 667 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 668 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 669 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 670 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 671 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 672 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 673 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 674 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 675 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 676 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 677 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 678 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 679 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 680 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 681 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 682 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 683 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 684 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 685 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 686 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 687 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 688 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 689 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 690 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 691 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 692 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 693 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 694 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 695 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 696 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 697 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 698 // CHECK3: cond.true: 699 // CHECK3-NEXT: br label [[COND_END:%.*]] 700 // CHECK3: cond.false: 701 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 702 // CHECK3-NEXT: br label [[COND_END]] 703 // CHECK3: cond.end: 704 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 705 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 706 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 707 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 708 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 709 // CHECK3: omp.inner.for.cond: 710 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 711 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 712 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 713 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 714 // CHECK3: omp.inner.for.body: 715 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 716 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 717 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 718 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 719 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 720 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 721 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 722 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456 723 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 724 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 725 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 726 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 727 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 728 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 729 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 730 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]] 731 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 732 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 733 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 734 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 735 // CHECK3: omp.body.continue: 736 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 737 // CHECK3: omp.inner.for.inc: 738 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 739 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 740 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 741 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 742 // CHECK3: omp.inner.for.end: 743 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 744 // CHECK3: omp.loop.exit: 745 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 746 // CHECK3-NEXT: ret void 747 // 748 // 749 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 750 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 751 // CHECK3-NEXT: entry: 752 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 753 // CHECK3-NEXT: ret void 754 // 755 // 756 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv 757 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 758 // CHECK4-NEXT: entry: 759 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 760 // CHECK4-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 761 // CHECK4-NEXT: ret i32 [[CALL]] 762 // 763 // 764 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 765 // CHECK4-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 766 // CHECK4-NEXT: entry: 767 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 768 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 769 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 770 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 771 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 772 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 773 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 774 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 775 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 776 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 777 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 778 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 779 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 780 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 781 // CHECK4-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4 782 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 783 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4 784 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 785 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 786 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088) 787 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 788 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 789 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 790 // CHECK4: omp_offload.failed: 791 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 792 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 793 // CHECK4: omp_offload.cont: 794 // CHECK4-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 795 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0 796 // CHECK4-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0 797 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 798 // CHECK4-NEXT: ret i32 [[TMP9]] 799 // 800 // 801 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 802 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 803 // CHECK4-NEXT: entry: 804 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 805 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 806 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 807 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 808 // CHECK4-NEXT: ret void 809 // 810 // 811 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 812 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 813 // CHECK4-NEXT: entry: 814 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 815 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 816 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 817 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 818 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 819 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 820 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 821 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 822 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 823 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 824 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 825 // CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4 826 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 827 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 828 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 829 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 830 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 831 // CHECK4-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 832 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 833 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 834 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 835 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 836 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 837 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 838 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 839 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 840 // CHECK4: cond.true: 841 // CHECK4-NEXT: br label [[COND_END:%.*]] 842 // CHECK4: cond.false: 843 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 844 // CHECK4-NEXT: br label [[COND_END]] 845 // CHECK4: cond.end: 846 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 847 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 848 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 849 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 850 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 851 // CHECK4: omp.inner.for.cond: 852 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 853 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 854 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 855 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 856 // CHECK4: omp.inner.for.body: 857 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 858 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 859 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 860 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 861 // CHECK4: omp.inner.for.inc: 862 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 863 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 864 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 865 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 866 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 867 // CHECK4: omp.inner.for.end: 868 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 869 // CHECK4: omp.loop.exit: 870 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 871 // CHECK4-NEXT: ret void 872 // 873 // 874 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 875 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 876 // CHECK4-NEXT: entry: 877 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 878 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 879 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 880 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 881 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 882 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 883 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 884 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 885 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 886 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 887 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 888 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 889 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 890 // CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4 891 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 892 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 893 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 894 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 895 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 896 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 897 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 898 // CHECK4-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 899 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 900 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 901 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 902 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 903 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 904 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 905 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 906 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 907 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 908 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 909 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 910 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 911 // CHECK4: cond.true: 912 // CHECK4-NEXT: br label [[COND_END:%.*]] 913 // CHECK4: cond.false: 914 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 915 // CHECK4-NEXT: br label [[COND_END]] 916 // CHECK4: cond.end: 917 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 918 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 919 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 920 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 921 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 922 // CHECK4: omp.inner.for.cond: 923 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 924 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 925 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 926 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 927 // CHECK4: omp.inner.for.body: 928 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 929 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 930 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 931 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 932 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 933 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 934 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 935 // CHECK4-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456 936 // CHECK4-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 937 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 938 // CHECK4-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 939 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 940 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 941 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 942 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 943 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]] 944 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 945 // CHECK4-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 946 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 947 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 948 // CHECK4: omp.body.continue: 949 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 950 // CHECK4: omp.inner.for.inc: 951 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 952 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 953 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 954 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 955 // CHECK4: omp.inner.for.end: 956 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 957 // CHECK4: omp.loop.exit: 958 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 959 // CHECK4-NEXT: ret void 960 // 961 // 962 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 963 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 964 // CHECK4-NEXT: entry: 965 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 966 // CHECK4-NEXT: ret void 967 // 968 // 969 // CHECK9-LABEL: define {{[^@]+}}@main 970 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 971 // CHECK9-NEXT: entry: 972 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 973 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 974 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 975 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 976 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 977 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 978 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 979 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 980 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 981 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 982 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 983 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 984 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 985 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 986 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 987 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 988 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 989 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 990 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 991 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 992 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 993 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 994 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 995 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4 996 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 997 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 998 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4 999 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 1000 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave() 1001 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8 1002 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 1003 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 1004 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1005 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 1006 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4 1007 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1008 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4 1009 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8 1010 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4 1011 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32* 1012 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4 1013 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8 1014 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 1015 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 1016 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1017 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP12]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes to i8*), i64 40, i1 false) 1018 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1019 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64* 1020 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP14]], align 8 1021 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1022 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 1023 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP16]], align 8 1024 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1025 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8 1026 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1027 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 1028 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8 1029 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1030 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 1031 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8 1032 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1033 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1034 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1035 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64* 1036 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP24]], align 8 1037 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1038 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 1039 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP26]], align 8 1040 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1041 // CHECK9-NEXT: store i8* null, i8** [[TMP27]], align 8 1042 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1043 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 1044 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP29]], align 8 1045 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1046 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 1047 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8 1048 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1049 // CHECK9-NEXT: store i8* null, i8** [[TMP32]], align 8 1050 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1051 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32** 1052 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP34]], align 8 1053 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1054 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32** 1055 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 8 1056 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 1057 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP37]], align 8 1058 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1059 // CHECK9-NEXT: store i8* null, i8** [[TMP38]], align 8 1060 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1061 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1062 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1063 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[N]], align 4 1064 // CHECK9-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_]], align 4 1065 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 1066 // CHECK9-NEXT: store i32 [[TMP43]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1067 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1068 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP44]], 0 1069 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1070 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64 1071 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1072 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP45]], 0 1073 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1074 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1075 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]] 1076 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1077 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8 1078 // CHECK9-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8 1079 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP46]], 1 1080 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]]) 1081 // CHECK9-NEXT: [[TMP47:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, i32 5, i8** [[TMP39]], i8** [[TMP40]], i64* [[TMP41]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1082 // CHECK9-NEXT: [[TMP48:%.*]] = icmp ne i32 [[TMP47]], 0 1083 // CHECK9-NEXT: br i1 [[TMP48]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1084 // CHECK9: omp_offload.failed: 1085 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1086 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1087 // CHECK9: omp_offload.cont: 1088 // CHECK9-NEXT: [[TMP49:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1089 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP49]]) 1090 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1091 // CHECK9-NEXT: [[TMP50:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1092 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP50]]) 1093 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, i32* [[RETVAL]], align 4 1094 // CHECK9-NEXT: ret i32 [[TMP51]] 1095 // 1096 // 1097 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 1098 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1099 // CHECK9-NEXT: entry: 1100 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1101 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 1102 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1103 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1104 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1105 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1106 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 1107 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1108 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1109 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1110 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1111 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32* 1112 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1113 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1114 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1115 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 1116 // CHECK9-NEXT: ret void 1117 // 1118 // 1119 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1120 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1121 // CHECK9-NEXT: entry: 1122 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1123 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1124 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1125 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 1126 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1127 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1128 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1129 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1130 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1131 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1132 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1133 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1134 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1135 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1136 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1137 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 1138 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 1139 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1140 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1141 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 1142 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 1143 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1144 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1145 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1146 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 1147 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1148 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1149 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1150 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1151 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 1152 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1153 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1154 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1155 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1156 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1157 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1158 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1159 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1160 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1161 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1162 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1163 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1164 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1165 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1166 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1167 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1168 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1169 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1170 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1171 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4 1172 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1173 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1174 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1175 // CHECK9: land.lhs.true: 1176 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1177 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1178 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1179 // CHECK9: omp.precond.then: 1180 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 1181 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1182 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 1183 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1184 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1185 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1186 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1187 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1188 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1189 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1190 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 1191 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1192 // CHECK9: cond.true: 1193 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1194 // CHECK9-NEXT: br label [[COND_END:%.*]] 1195 // CHECK9: cond.false: 1196 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1197 // CHECK9-NEXT: br label [[COND_END]] 1198 // CHECK9: cond.end: 1199 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1200 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 1201 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 1202 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 1203 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1204 // CHECK9: omp.inner.for.cond: 1205 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1206 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1207 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 1208 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1209 // CHECK9: omp.inner.for.body: 1210 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 1211 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1212 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP22]], i32* [[TMP0]], i32* [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], i32* [[TMP4]]) 1213 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1214 // CHECK9: omp.inner.for.inc: 1215 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1216 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 1217 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]] 1218 // CHECK9-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 1219 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1220 // CHECK9: omp.inner.for.end: 1221 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1222 // CHECK9: omp.loop.exit: 1223 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1224 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1225 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 1226 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1227 // CHECK9: omp.precond.end: 1228 // CHECK9-NEXT: ret void 1229 // 1230 // 1231 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1232 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1233 // CHECK9-NEXT: entry: 1234 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1235 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1236 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1237 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1238 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1239 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 1240 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1241 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1242 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1243 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1244 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1245 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1246 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1247 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1248 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1249 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1250 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1251 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 1252 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 1253 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1254 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1255 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 1256 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 1257 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1258 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1259 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1260 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1261 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1262 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 1263 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1264 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1265 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1266 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1267 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 1268 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1269 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1270 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1271 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1272 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1273 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1274 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1275 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1276 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1277 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1278 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1279 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1280 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1281 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1282 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1283 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1284 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1285 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1286 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1287 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4 1288 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1289 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1290 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1291 // CHECK9: land.lhs.true: 1292 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1293 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1294 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1295 // CHECK9: omp.precond.then: 1296 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 1297 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1298 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 1299 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1300 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1301 // CHECK9-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_LB]], align 8 1302 // CHECK9-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_UB]], align 8 1303 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1304 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1305 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1306 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1307 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1308 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1309 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1310 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 1311 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1312 // CHECK9: cond.true: 1313 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1314 // CHECK9-NEXT: br label [[COND_END:%.*]] 1315 // CHECK9: cond.false: 1316 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1317 // CHECK9-NEXT: br label [[COND_END]] 1318 // CHECK9: cond.end: 1319 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 1320 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 1321 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 1322 // CHECK9-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 1323 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1324 // CHECK9: omp.inner.for.cond: 1325 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1326 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1327 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 1328 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1329 // CHECK9: omp.inner.for.body: 1330 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1331 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1332 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0 1333 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1334 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 1335 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 1336 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]] 1337 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 1338 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 1339 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 1340 // CHECK9-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4 1341 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1342 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1343 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1344 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0 1345 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 1346 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 1347 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 1348 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]] 1349 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1350 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0 1351 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 1352 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 1353 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 1354 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 1355 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]] 1356 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 1357 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 1358 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 1359 // CHECK9-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4 1360 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[I11]], align 4 1361 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64 1362 // CHECK9-NEXT: [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 1363 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP30]] 1364 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[J12]], align 4 1365 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64 1366 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]] 1367 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4 1368 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1369 // CHECK9: omp.body.continue: 1370 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1371 // CHECK9: omp.inner.for.inc: 1372 // CHECK9-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1373 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1 1374 // CHECK9-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8 1375 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1376 // CHECK9: omp.inner.for.end: 1377 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1378 // CHECK9: omp.loop.exit: 1379 // CHECK9-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1380 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1381 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1382 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1383 // CHECK9: omp.precond.end: 1384 // CHECK9-NEXT: ret void 1385 // 1386 // 1387 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1388 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1389 // CHECK9-NEXT: entry: 1390 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1391 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1392 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1393 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1394 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1395 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1396 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1397 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1398 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1399 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 1400 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8 1401 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1402 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 1403 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8 1404 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1405 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 1406 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1407 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1408 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20) 1409 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1410 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1411 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1412 // CHECK9: omp_offload.failed: 1413 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 1414 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1415 // CHECK9: omp_offload.cont: 1416 // CHECK9-NEXT: ret i32 0 1417 // 1418 // 1419 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 1420 // CHECK9-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1421 // CHECK9-NEXT: entry: 1422 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1423 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1424 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1425 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 1426 // CHECK9-NEXT: ret void 1427 // 1428 // 1429 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 1430 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1431 // CHECK9-NEXT: entry: 1432 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1433 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1434 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1435 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1436 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1437 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1438 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1439 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1440 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1441 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1442 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1443 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1444 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1445 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1446 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1447 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1448 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1449 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 1450 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1451 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1452 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1453 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1454 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1455 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1456 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1457 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1458 // CHECK9: cond.true: 1459 // CHECK9-NEXT: br label [[COND_END:%.*]] 1460 // CHECK9: cond.false: 1461 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1462 // CHECK9-NEXT: br label [[COND_END]] 1463 // CHECK9: cond.end: 1464 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1465 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1466 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1467 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1468 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1469 // CHECK9: omp.inner.for.cond: 1470 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1471 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1472 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1473 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1474 // CHECK9: omp.inner.for.body: 1475 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1476 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1477 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1478 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1479 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]]) 1480 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1481 // CHECK9: omp.inner.for.inc: 1482 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1483 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1484 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1485 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1486 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1487 // CHECK9: omp.inner.for.end: 1488 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1489 // CHECK9: omp.loop.exit: 1490 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1491 // CHECK9-NEXT: ret void 1492 // 1493 // 1494 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 1495 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1496 // CHECK9-NEXT: entry: 1497 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1498 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1499 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1500 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1501 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1502 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1503 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1504 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1505 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1506 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1507 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1508 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1509 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1510 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1511 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1512 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1513 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1514 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1515 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1516 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1517 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1518 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 1519 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1520 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1521 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1522 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 1523 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1524 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1525 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1526 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1527 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1528 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1529 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1530 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1531 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 1532 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1533 // CHECK9: cond.true: 1534 // CHECK9-NEXT: br label [[COND_END:%.*]] 1535 // CHECK9: cond.false: 1536 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1537 // CHECK9-NEXT: br label [[COND_END]] 1538 // CHECK9: cond.end: 1539 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1540 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1541 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1542 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1543 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1544 // CHECK9: omp.inner.for.cond: 1545 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1546 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1547 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1548 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1549 // CHECK9: omp.inner.for.body: 1550 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1551 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 1552 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1553 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1554 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1555 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1556 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1557 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2 1558 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2 1559 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 1560 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 1561 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 1562 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 1563 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1564 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1565 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1566 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 1567 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 1568 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 1569 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 1570 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1571 // CHECK9: omp.body.continue: 1572 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1573 // CHECK9: omp.inner.for.inc: 1574 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1575 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 1576 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 1577 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1578 // CHECK9: omp.inner.for.end: 1579 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1580 // CHECK9: omp.loop.exit: 1581 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1582 // CHECK9-NEXT: ret void 1583 // 1584 // 1585 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1586 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1587 // CHECK9-NEXT: entry: 1588 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1589 // CHECK9-NEXT: ret void 1590 // 1591 // 1592 // CHECK10-LABEL: define {{[^@]+}}@main 1593 // CHECK10-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1594 // CHECK10-NEXT: entry: 1595 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1596 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1597 // CHECK10-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 1598 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4 1599 // CHECK10-NEXT: [[M:%.*]] = alloca i32, align 4 1600 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1601 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1602 // CHECK10-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 1603 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1604 // CHECK10-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 1605 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1606 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1607 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1608 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 1609 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1610 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1611 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1612 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1613 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 1614 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1615 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1616 // CHECK10-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 1617 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4 1618 // CHECK10-NEXT: store i32 2, i32* [[M]], align 4 1619 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1620 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1621 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4 1622 // CHECK10-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 1623 // CHECK10-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave() 1624 // CHECK10-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8 1625 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 1626 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 1627 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1628 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 1629 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4 1630 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1631 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4 1632 // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8 1633 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4 1634 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32* 1635 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4 1636 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8 1637 // CHECK10-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 1638 // CHECK10-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 1639 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1640 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP12]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes to i8*), i64 40, i1 false) 1641 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1642 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64* 1643 // CHECK10-NEXT: store i64 [[TMP7]], i64* [[TMP14]], align 8 1644 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1645 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 1646 // CHECK10-NEXT: store i64 [[TMP7]], i64* [[TMP16]], align 8 1647 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1648 // CHECK10-NEXT: store i8* null, i8** [[TMP17]], align 8 1649 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1650 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 1651 // CHECK10-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8 1652 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1653 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 1654 // CHECK10-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8 1655 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1656 // CHECK10-NEXT: store i8* null, i8** [[TMP22]], align 8 1657 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1658 // CHECK10-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64* 1659 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP24]], align 8 1660 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1661 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 1662 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP26]], align 8 1663 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1664 // CHECK10-NEXT: store i8* null, i8** [[TMP27]], align 8 1665 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1666 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 1667 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP29]], align 8 1668 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1669 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 1670 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8 1671 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1672 // CHECK10-NEXT: store i8* null, i8** [[TMP32]], align 8 1673 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1674 // CHECK10-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32** 1675 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP34]], align 8 1676 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1677 // CHECK10-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32** 1678 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 8 1679 // CHECK10-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 1680 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[TMP37]], align 8 1681 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1682 // CHECK10-NEXT: store i8* null, i8** [[TMP38]], align 8 1683 // CHECK10-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1684 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1685 // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1686 // CHECK10-NEXT: [[TMP42:%.*]] = load i32, i32* [[N]], align 4 1687 // CHECK10-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_]], align 4 1688 // CHECK10-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 1689 // CHECK10-NEXT: store i32 [[TMP43]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1690 // CHECK10-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1691 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP44]], 0 1692 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1693 // CHECK10-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64 1694 // CHECK10-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1695 // CHECK10-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP45]], 0 1696 // CHECK10-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1697 // CHECK10-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1698 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]] 1699 // CHECK10-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1700 // CHECK10-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8 1701 // CHECK10-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8 1702 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP46]], 1 1703 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]]) 1704 // CHECK10-NEXT: [[TMP47:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, i32 5, i8** [[TMP39]], i8** [[TMP40]], i64* [[TMP41]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1705 // CHECK10-NEXT: [[TMP48:%.*]] = icmp ne i32 [[TMP47]], 0 1706 // CHECK10-NEXT: br i1 [[TMP48]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1707 // CHECK10: omp_offload.failed: 1708 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1709 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1710 // CHECK10: omp_offload.cont: 1711 // CHECK10-NEXT: [[TMP49:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1712 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP49]]) 1713 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1714 // CHECK10-NEXT: [[TMP50:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1715 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP50]]) 1716 // CHECK10-NEXT: [[TMP51:%.*]] = load i32, i32* [[RETVAL]], align 4 1717 // CHECK10-NEXT: ret i32 [[TMP51]] 1718 // 1719 // 1720 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 1721 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1722 // CHECK10-NEXT: entry: 1723 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1724 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 1725 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1726 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1727 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1728 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1729 // CHECK10-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 1730 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1731 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1732 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1733 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1734 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32* 1735 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1736 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1737 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1738 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 1739 // CHECK10-NEXT: ret void 1740 // 1741 // 1742 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1743 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1744 // CHECK10-NEXT: entry: 1745 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1746 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1747 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1748 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 1749 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1750 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1751 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1752 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1753 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1754 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1755 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1756 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1757 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1758 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1759 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4 1760 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 1761 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 1762 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1763 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1764 // CHECK10-NEXT: [[I11:%.*]] = alloca i32, align 4 1765 // CHECK10-NEXT: [[J12:%.*]] = alloca i32, align 4 1766 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1767 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1768 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1769 // CHECK10-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 1770 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1771 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1772 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1773 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1774 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 1775 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1776 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1777 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1778 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1779 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1780 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1781 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1782 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1783 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1784 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1785 // CHECK10-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1786 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1787 // CHECK10-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1788 // CHECK10-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1789 // CHECK10-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1790 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1791 // CHECK10-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1792 // CHECK10-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1793 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 1794 // CHECK10-NEXT: store i32 0, i32* [[J]], align 4 1795 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1796 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1797 // CHECK10-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1798 // CHECK10: land.lhs.true: 1799 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1800 // CHECK10-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1801 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1802 // CHECK10: omp.precond.then: 1803 // CHECK10-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 1804 // CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1805 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 1806 // CHECK10-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1807 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1808 // CHECK10-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1809 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1810 // CHECK10-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1811 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1812 // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1813 // CHECK10-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 1814 // CHECK10-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1815 // CHECK10: cond.true: 1816 // CHECK10-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1817 // CHECK10-NEXT: br label [[COND_END:%.*]] 1818 // CHECK10: cond.false: 1819 // CHECK10-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1820 // CHECK10-NEXT: br label [[COND_END]] 1821 // CHECK10: cond.end: 1822 // CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1823 // CHECK10-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 1824 // CHECK10-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 1825 // CHECK10-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 1826 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1827 // CHECK10: omp.inner.for.cond: 1828 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1829 // CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1830 // CHECK10-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 1831 // CHECK10-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1832 // CHECK10: omp.inner.for.body: 1833 // CHECK10-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 1834 // CHECK10-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1835 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP22]], i32* [[TMP0]], i32* [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], i32* [[TMP4]]) 1836 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1837 // CHECK10: omp.inner.for.inc: 1838 // CHECK10-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1839 // CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 1840 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]] 1841 // CHECK10-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 1842 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1843 // CHECK10: omp.inner.for.end: 1844 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1845 // CHECK10: omp.loop.exit: 1846 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1847 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1848 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 1849 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 1850 // CHECK10: omp.precond.end: 1851 // CHECK10-NEXT: ret void 1852 // 1853 // 1854 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 1855 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1856 // CHECK10-NEXT: entry: 1857 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1858 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1859 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1860 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1861 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1862 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 1863 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1864 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1865 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1866 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1867 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1868 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1869 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1870 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1871 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1872 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1873 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4 1874 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 1875 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 1876 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1877 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1878 // CHECK10-NEXT: [[I11:%.*]] = alloca i32, align 4 1879 // CHECK10-NEXT: [[J12:%.*]] = alloca i32, align 4 1880 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1881 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1882 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1883 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1884 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1885 // CHECK10-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 1886 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1887 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1888 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1889 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1890 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 1891 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1892 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1893 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1894 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1895 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1896 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1897 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1898 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1899 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1900 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1901 // CHECK10-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1902 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1903 // CHECK10-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1904 // CHECK10-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1905 // CHECK10-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1906 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1907 // CHECK10-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1908 // CHECK10-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1909 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 1910 // CHECK10-NEXT: store i32 0, i32* [[J]], align 4 1911 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1912 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1913 // CHECK10-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1914 // CHECK10: land.lhs.true: 1915 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1916 // CHECK10-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1917 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1918 // CHECK10: omp.precond.then: 1919 // CHECK10-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 1920 // CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1921 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 1922 // CHECK10-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1923 // CHECK10-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1924 // CHECK10-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_LB]], align 8 1925 // CHECK10-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_UB]], align 8 1926 // CHECK10-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1927 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1928 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1929 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1930 // CHECK10-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1931 // CHECK10-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1932 // CHECK10-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1933 // CHECK10-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 1934 // CHECK10-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1935 // CHECK10: cond.true: 1936 // CHECK10-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1937 // CHECK10-NEXT: br label [[COND_END:%.*]] 1938 // CHECK10: cond.false: 1939 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1940 // CHECK10-NEXT: br label [[COND_END]] 1941 // CHECK10: cond.end: 1942 // CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 1943 // CHECK10-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 1944 // CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 1945 // CHECK10-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 1946 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1947 // CHECK10: omp.inner.for.cond: 1948 // CHECK10-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1949 // CHECK10-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1950 // CHECK10-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 1951 // CHECK10-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1952 // CHECK10: omp.inner.for.body: 1953 // CHECK10-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1954 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1955 // CHECK10-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0 1956 // CHECK10-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1957 // CHECK10-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 1958 // CHECK10-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 1959 // CHECK10-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]] 1960 // CHECK10-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 1961 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 1962 // CHECK10-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 1963 // CHECK10-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4 1964 // CHECK10-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1965 // CHECK10-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1966 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1967 // CHECK10-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0 1968 // CHECK10-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 1969 // CHECK10-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 1970 // CHECK10-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 1971 // CHECK10-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]] 1972 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1973 // CHECK10-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0 1974 // CHECK10-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 1975 // CHECK10-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 1976 // CHECK10-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 1977 // CHECK10-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 1978 // CHECK10-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]] 1979 // CHECK10-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 1980 // CHECK10-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 1981 // CHECK10-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 1982 // CHECK10-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4 1983 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[I11]], align 4 1984 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64 1985 // CHECK10-NEXT: [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 1986 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP30]] 1987 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[J12]], align 4 1988 // CHECK10-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64 1989 // CHECK10-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]] 1990 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4 1991 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1992 // CHECK10: omp.body.continue: 1993 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1994 // CHECK10: omp.inner.for.inc: 1995 // CHECK10-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1996 // CHECK10-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1 1997 // CHECK10-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8 1998 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1999 // CHECK10: omp.inner.for.end: 2000 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2001 // CHECK10: omp.loop.exit: 2002 // CHECK10-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2003 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 2004 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 2005 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2006 // CHECK10: omp.precond.end: 2007 // CHECK10-NEXT: ret void 2008 // 2009 // 2010 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 2011 // CHECK10-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2012 // CHECK10-NEXT: entry: 2013 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2014 // CHECK10-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 2015 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2016 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2017 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2018 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2019 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2020 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2021 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2022 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 2023 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8 2024 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2025 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 2026 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8 2027 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2028 // CHECK10-NEXT: store i8* null, i8** [[TMP4]], align 8 2029 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2030 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2031 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20) 2032 // CHECK10-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2033 // CHECK10-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2034 // CHECK10-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2035 // CHECK10: omp_offload.failed: 2036 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 2037 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 2038 // CHECK10: omp_offload.cont: 2039 // CHECK10-NEXT: ret i32 0 2040 // 2041 // 2042 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 2043 // CHECK10-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2044 // CHECK10-NEXT: entry: 2045 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 2046 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 2047 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 2048 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 2049 // CHECK10-NEXT: ret void 2050 // 2051 // 2052 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 2053 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2054 // CHECK10-NEXT: entry: 2055 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2056 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2057 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 2058 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2059 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2060 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2061 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2062 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2063 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2064 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2065 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2066 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4 2067 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2068 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2069 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 2070 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 2071 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2072 // CHECK10-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 2073 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2074 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2075 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2076 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2077 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2078 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2079 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 2080 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2081 // CHECK10: cond.true: 2082 // CHECK10-NEXT: br label [[COND_END:%.*]] 2083 // CHECK10: cond.false: 2084 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2085 // CHECK10-NEXT: br label [[COND_END]] 2086 // CHECK10: cond.end: 2087 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2088 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2089 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2090 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2091 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2092 // CHECK10: omp.inner.for.cond: 2093 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2094 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2095 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2096 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2097 // CHECK10: omp.inner.for.body: 2098 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2099 // CHECK10-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2100 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2101 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2102 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]]) 2103 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2104 // CHECK10: omp.inner.for.inc: 2105 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2106 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2107 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2108 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2109 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2110 // CHECK10: omp.inner.for.end: 2111 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2112 // CHECK10: omp.loop.exit: 2113 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2114 // CHECK10-NEXT: ret void 2115 // 2116 // 2117 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 2118 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2119 // CHECK10-NEXT: entry: 2120 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2121 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2122 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2123 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2124 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 2125 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2126 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2127 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2128 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2129 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2130 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2131 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2132 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2133 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4 2134 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2135 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2136 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2137 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2138 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 2139 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 2140 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2141 // CHECK10-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 2142 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2143 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2144 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2145 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 2146 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2147 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 2148 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2149 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2150 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2151 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2152 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2153 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2154 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 2155 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2156 // CHECK10: cond.true: 2157 // CHECK10-NEXT: br label [[COND_END:%.*]] 2158 // CHECK10: cond.false: 2159 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2160 // CHECK10-NEXT: br label [[COND_END]] 2161 // CHECK10: cond.end: 2162 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2163 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2164 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2165 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2166 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2167 // CHECK10: omp.inner.for.cond: 2168 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2169 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2170 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2171 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2172 // CHECK10: omp.inner.for.body: 2173 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2174 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 2175 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 2176 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2177 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2178 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2179 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2180 // CHECK10-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2 2181 // CHECK10-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2 2182 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 2183 // CHECK10-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 2184 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 2185 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 2186 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2187 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 2188 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2189 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 2190 // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 2191 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 2192 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 2193 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2194 // CHECK10: omp.body.continue: 2195 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2196 // CHECK10: omp.inner.for.inc: 2197 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2198 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 2199 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 2200 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2201 // CHECK10: omp.inner.for.end: 2202 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2203 // CHECK10: omp.loop.exit: 2204 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2205 // CHECK10-NEXT: ret void 2206 // 2207 // 2208 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2209 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 2210 // CHECK10-NEXT: entry: 2211 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2212 // CHECK10-NEXT: ret void 2213 // 2214 // 2215 // CHECK11-LABEL: define {{[^@]+}}@main 2216 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2217 // CHECK11-NEXT: entry: 2218 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2219 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2220 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 2221 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2222 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 2223 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2224 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2225 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 2226 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2227 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 2228 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2229 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2230 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2231 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 2232 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2233 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2234 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2235 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2236 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 2237 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2238 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2239 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 2240 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 2241 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4 2242 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2243 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4 2244 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2245 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 2246 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 2247 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 2248 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2249 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4 2250 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 2251 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 2252 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 2253 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4 2254 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4 2255 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4 2256 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 2257 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 2258 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 2259 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2260 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes to i8*), i32 40, i1 false) 2261 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2262 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2263 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP13]], align 4 2264 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2265 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2266 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 2267 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2268 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2269 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2270 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 2271 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4 2272 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2273 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 2274 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4 2275 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2276 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 2277 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2278 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 2279 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4 2280 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2281 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 2282 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4 2283 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2284 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 2285 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2286 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 2287 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP28]], align 4 2288 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2289 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2290 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4 2291 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2292 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4 2293 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2294 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32** 2295 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP33]], align 4 2296 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2297 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32** 2298 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP35]], align 4 2299 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 2300 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP36]], align 4 2301 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2302 // CHECK11-NEXT: store i8* null, i8** [[TMP37]], align 4 2303 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2304 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2305 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2306 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4 2307 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[DOTCAPTURE_EXPR_]], align 4 2308 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[M]], align 4 2309 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2310 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2311 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP43]], 0 2312 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2313 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 2314 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2315 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP44]], 0 2316 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 2317 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 2318 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 2319 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 2320 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8 2321 // CHECK11-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8 2322 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP45]], 1 2323 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]]) 2324 // CHECK11-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, i32 5, i8** [[TMP38]], i8** [[TMP39]], i64* [[TMP40]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2325 // CHECK11-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 2326 // CHECK11-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2327 // CHECK11: omp_offload.failed: 2328 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2329 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2330 // CHECK11: omp_offload.cont: 2331 // CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2332 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP48]]) 2333 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2334 // CHECK11-NEXT: [[TMP49:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2335 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP49]]) 2336 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, i32* [[RETVAL]], align 4 2337 // CHECK11-NEXT: ret i32 [[TMP50]] 2338 // 2339 // 2340 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 2341 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2342 // CHECK11-NEXT: entry: 2343 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2344 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 2345 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2346 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 2347 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2348 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2349 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 2350 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2351 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 2352 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2353 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2354 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 2355 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2356 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 2357 // CHECK11-NEXT: ret void 2358 // 2359 // 2360 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2361 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2362 // CHECK11-NEXT: entry: 2363 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2364 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2365 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2366 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 2367 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2368 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 2369 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2370 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 2371 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2372 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 2373 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2374 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 2375 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 2376 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2377 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 2378 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 2379 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 2380 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 2381 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2382 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4 2383 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4 2384 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2385 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2386 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2387 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 2388 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2389 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 2390 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2391 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2392 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 2393 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2394 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 2395 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2396 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2397 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2398 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 2399 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 2400 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2401 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2402 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2403 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 2404 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2405 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 2406 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 2407 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 2408 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 2409 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 2410 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 2411 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2412 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4 2413 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2414 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 2415 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 2416 // CHECK11: land.lhs.true: 2417 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2418 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 2419 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 2420 // CHECK11: omp.precond.then: 2421 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 2422 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2423 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 2424 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 2425 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2426 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2427 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2428 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 2429 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2430 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2431 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 2432 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2433 // CHECK11: cond.true: 2434 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2435 // CHECK11-NEXT: br label [[COND_END:%.*]] 2436 // CHECK11: cond.false: 2437 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2438 // CHECK11-NEXT: br label [[COND_END]] 2439 // CHECK11: cond.end: 2440 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 2441 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 2442 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 2443 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 2444 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2445 // CHECK11: omp.inner.for.cond: 2446 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2447 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2448 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 2449 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2450 // CHECK11: omp.inner.for.body: 2451 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 2452 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32 2453 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 2454 // CHECK11-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32 2455 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP24]], i32* [[TMP0]], i32* [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], i32* [[TMP4]]) 2456 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2457 // CHECK11: omp.inner.for.inc: 2458 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2459 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 2460 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]] 2461 // CHECK11-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 2462 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2463 // CHECK11: omp.inner.for.end: 2464 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2465 // CHECK11: omp.loop.exit: 2466 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2467 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 2468 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 2469 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2470 // CHECK11: omp.precond.end: 2471 // CHECK11-NEXT: ret void 2472 // 2473 // 2474 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2475 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2476 // CHECK11-NEXT: entry: 2477 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2478 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2479 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2480 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2481 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2482 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 2483 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2484 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 2485 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2486 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 2487 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2488 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 2489 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2490 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 2491 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 2492 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2493 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 2494 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 2495 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 2496 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 2497 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2498 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4 2499 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4 2500 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2501 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2502 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2503 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2504 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2505 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 2506 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2507 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 2508 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2509 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2510 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 2511 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2512 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 2513 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2514 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2515 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2516 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 2517 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 2518 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2519 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2520 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2521 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 2522 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2523 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 2524 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 2525 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 2526 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 2527 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 2528 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 2529 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2530 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4 2531 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2532 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 2533 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 2534 // CHECK11: land.lhs.true: 2535 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2536 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 2537 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 2538 // CHECK11: omp.precond.then: 2539 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 2540 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2541 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 2542 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2543 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP12]] to i64 2544 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2545 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP13]] to i64 2546 // CHECK11-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8 2547 // CHECK11-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8 2548 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 2549 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2550 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2551 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2552 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 2553 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 2554 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2555 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 2556 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2557 // CHECK11: cond.true: 2558 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 2559 // CHECK11-NEXT: br label [[COND_END:%.*]] 2560 // CHECK11: cond.false: 2561 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 2562 // CHECK11-NEXT: br label [[COND_END]] 2563 // CHECK11: cond.end: 2564 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 2565 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 2566 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 2567 // CHECK11-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 2568 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2569 // CHECK11: omp.inner.for.cond: 2570 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2571 // CHECK11-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 2572 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 2573 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2574 // CHECK11: omp.inner.for.body: 2575 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2576 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2577 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 0 2578 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 2579 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]] 2580 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64 2581 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]] 2582 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1 2583 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]] 2584 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32 2585 // CHECK11-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4 2586 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2587 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2588 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2589 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 0 2590 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 2591 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]] 2592 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64 2593 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]] 2594 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2595 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 0 2596 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 2597 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]] 2598 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64 2599 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]] 2600 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]] 2601 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1 2602 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]] 2603 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32 2604 // CHECK11-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4 2605 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[I13]], align 4 2606 // CHECK11-NEXT: [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]] 2607 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP30]] 2608 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[J14]], align 4 2609 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP31]] 2610 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4 2611 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2612 // CHECK11: omp.body.continue: 2613 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2614 // CHECK11: omp.inner.for.inc: 2615 // CHECK11-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 2616 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP32]], 1 2617 // CHECK11-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8 2618 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2619 // CHECK11: omp.inner.for.end: 2620 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2621 // CHECK11: omp.loop.exit: 2622 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2623 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 2624 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 2625 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2626 // CHECK11: omp.precond.end: 2627 // CHECK11-NEXT: ret void 2628 // 2629 // 2630 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 2631 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2632 // CHECK11-NEXT: entry: 2633 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2634 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 2635 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2636 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2637 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2638 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2639 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2640 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2641 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2642 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 2643 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4 2644 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2645 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 2646 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4 2647 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2648 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 2649 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2650 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2651 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20) 2652 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2653 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2654 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2655 // CHECK11: omp_offload.failed: 2656 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 2657 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2658 // CHECK11: omp_offload.cont: 2659 // CHECK11-NEXT: ret i32 0 2660 // 2661 // 2662 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 2663 // CHECK11-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2664 // CHECK11-NEXT: entry: 2665 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 2666 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 2667 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 2668 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 2669 // CHECK11-NEXT: ret void 2670 // 2671 // 2672 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 2673 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2674 // CHECK11-NEXT: entry: 2675 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2676 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2677 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 2678 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2679 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2680 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2681 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2682 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2683 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2684 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2685 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2686 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 2687 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2688 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2689 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 2690 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 2691 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2692 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 2693 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2694 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2695 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2696 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2697 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2698 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2699 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 2700 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2701 // CHECK11: cond.true: 2702 // CHECK11-NEXT: br label [[COND_END:%.*]] 2703 // CHECK11: cond.false: 2704 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2705 // CHECK11-NEXT: br label [[COND_END]] 2706 // CHECK11: cond.end: 2707 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2708 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2709 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2710 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2711 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2712 // CHECK11: omp.inner.for.cond: 2713 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2714 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2715 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2716 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2717 // CHECK11: omp.inner.for.body: 2718 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2719 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2720 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]]) 2721 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2722 // CHECK11: omp.inner.for.inc: 2723 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2724 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2725 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2726 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2727 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2728 // CHECK11: omp.inner.for.end: 2729 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2730 // CHECK11: omp.loop.exit: 2731 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2732 // CHECK11-NEXT: ret void 2733 // 2734 // 2735 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 2736 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 2737 // CHECK11-NEXT: entry: 2738 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2739 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2740 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2741 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2742 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 2743 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2744 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2745 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2746 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2747 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2748 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2749 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2750 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2751 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 2752 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2753 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2754 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2755 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2756 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 2757 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 2758 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2759 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 2760 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2761 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2762 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2763 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2764 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2765 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2766 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2767 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2768 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2769 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2770 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 2771 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2772 // CHECK11: cond.true: 2773 // CHECK11-NEXT: br label [[COND_END:%.*]] 2774 // CHECK11: cond.false: 2775 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2776 // CHECK11-NEXT: br label [[COND_END]] 2777 // CHECK11: cond.end: 2778 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2779 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2780 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2781 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2782 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2783 // CHECK11: omp.inner.for.cond: 2784 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2785 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2786 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2787 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2788 // CHECK11: omp.inner.for.body: 2789 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2790 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 2791 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 2792 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2793 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2794 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2795 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2796 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2 2797 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 2798 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 2799 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 2800 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 2801 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 2802 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2803 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]] 2804 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 2805 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 2806 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 2807 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2808 // CHECK11: omp.body.continue: 2809 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2810 // CHECK11: omp.inner.for.inc: 2811 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2812 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 2813 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2814 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2815 // CHECK11: omp.inner.for.end: 2816 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2817 // CHECK11: omp.loop.exit: 2818 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2819 // CHECK11-NEXT: ret void 2820 // 2821 // 2822 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2823 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2824 // CHECK11-NEXT: entry: 2825 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2826 // CHECK11-NEXT: ret void 2827 // 2828 // 2829 // CHECK12-LABEL: define {{[^@]+}}@main 2830 // CHECK12-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2831 // CHECK12-NEXT: entry: 2832 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2833 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2834 // CHECK12-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 2835 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4 2836 // CHECK12-NEXT: [[M:%.*]] = alloca i32, align 4 2837 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2838 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2839 // CHECK12-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 2840 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2841 // CHECK12-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 2842 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2843 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2844 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2845 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 2846 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2847 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2848 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2849 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2850 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 2851 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2852 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2853 // CHECK12-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 2854 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4 2855 // CHECK12-NEXT: store i32 2, i32* [[M]], align 4 2856 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2857 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4 2858 // CHECK12-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2859 // CHECK12-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 2860 // CHECK12-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 2861 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 2862 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2863 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4 2864 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 2865 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 2866 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 2867 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4 2868 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4 2869 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4 2870 // CHECK12-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 2871 // CHECK12-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 2872 // CHECK12-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 2873 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2874 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes to i8*), i32 40, i1 false) 2875 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2876 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2877 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP13]], align 4 2878 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2879 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2880 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 2881 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2882 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 2883 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2884 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 2885 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4 2886 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2887 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 2888 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4 2889 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2890 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4 2891 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2892 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 2893 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4 2894 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2895 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 2896 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4 2897 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2898 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4 2899 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2900 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 2901 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP28]], align 4 2902 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2903 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2904 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4 2905 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2906 // CHECK12-NEXT: store i8* null, i8** [[TMP31]], align 4 2907 // CHECK12-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2908 // CHECK12-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32** 2909 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP33]], align 4 2910 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2911 // CHECK12-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32** 2912 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP35]], align 4 2913 // CHECK12-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 2914 // CHECK12-NEXT: store i64 [[TMP10]], i64* [[TMP36]], align 4 2915 // CHECK12-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2916 // CHECK12-NEXT: store i8* null, i8** [[TMP37]], align 4 2917 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2918 // CHECK12-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2919 // CHECK12-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2920 // CHECK12-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4 2921 // CHECK12-NEXT: store i32 [[TMP41]], i32* [[DOTCAPTURE_EXPR_]], align 4 2922 // CHECK12-NEXT: [[TMP42:%.*]] = load i32, i32* [[M]], align 4 2923 // CHECK12-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2924 // CHECK12-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2925 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP43]], 0 2926 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2927 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 2928 // CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2929 // CHECK12-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP44]], 0 2930 // CHECK12-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 2931 // CHECK12-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 2932 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 2933 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 2934 // CHECK12-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8 2935 // CHECK12-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8 2936 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP45]], 1 2937 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]]) 2938 // CHECK12-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, i32 5, i8** [[TMP38]], i8** [[TMP39]], i64* [[TMP40]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2939 // CHECK12-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 2940 // CHECK12-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2941 // CHECK12: omp_offload.failed: 2942 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2943 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2944 // CHECK12: omp_offload.cont: 2945 // CHECK12-NEXT: [[TMP48:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2946 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP48]]) 2947 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2948 // CHECK12-NEXT: [[TMP49:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2949 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP49]]) 2950 // CHECK12-NEXT: [[TMP50:%.*]] = load i32, i32* [[RETVAL]], align 4 2951 // CHECK12-NEXT: ret i32 [[TMP50]] 2952 // 2953 // 2954 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 2955 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2956 // CHECK12-NEXT: entry: 2957 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2958 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 2959 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2960 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 2961 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2962 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2963 // CHECK12-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 2964 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2965 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 2966 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2967 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2968 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 2969 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2970 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 2971 // CHECK12-NEXT: ret void 2972 // 2973 // 2974 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 2975 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2976 // CHECK12-NEXT: entry: 2977 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2978 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2979 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2980 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 2981 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2982 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 2983 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2984 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 2985 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2986 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 2987 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2988 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 2989 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 2990 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2991 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4 2992 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 2993 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 2994 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 2995 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2996 // CHECK12-NEXT: [[I11:%.*]] = alloca i32, align 4 2997 // CHECK12-NEXT: [[J12:%.*]] = alloca i32, align 4 2998 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2999 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3000 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3001 // CHECK12-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 3002 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3003 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 3004 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3005 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3006 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 3007 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3008 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 3009 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3010 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3011 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3012 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 3013 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 3014 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3015 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 3016 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3017 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 3018 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3019 // CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 3020 // CHECK12-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3021 // CHECK12-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 3022 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 3023 // CHECK12-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 3024 // CHECK12-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 3025 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 3026 // CHECK12-NEXT: store i32 0, i32* [[J]], align 4 3027 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3028 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 3029 // CHECK12-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 3030 // CHECK12: land.lhs.true: 3031 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3032 // CHECK12-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 3033 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 3034 // CHECK12: omp.precond.then: 3035 // CHECK12-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 3036 // CHECK12-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3037 // CHECK12-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 3038 // CHECK12-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 3039 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3040 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3041 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 3042 // CHECK12-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 3043 // CHECK12-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 3044 // CHECK12-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3045 // CHECK12-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 3046 // CHECK12-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3047 // CHECK12: cond.true: 3048 // CHECK12-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3049 // CHECK12-NEXT: br label [[COND_END:%.*]] 3050 // CHECK12: cond.false: 3051 // CHECK12-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 3052 // CHECK12-NEXT: br label [[COND_END]] 3053 // CHECK12: cond.end: 3054 // CHECK12-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 3055 // CHECK12-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 3056 // CHECK12-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 3057 // CHECK12-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 3058 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3059 // CHECK12: omp.inner.for.cond: 3060 // CHECK12-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3061 // CHECK12-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 3062 // CHECK12-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 3063 // CHECK12-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3064 // CHECK12: omp.inner.for.body: 3065 // CHECK12-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 3066 // CHECK12-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32 3067 // CHECK12-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 3068 // CHECK12-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32 3069 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP24]], i32* [[TMP0]], i32* [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], i32* [[TMP4]]) 3070 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3071 // CHECK12: omp.inner.for.inc: 3072 // CHECK12-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3073 // CHECK12-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 3074 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]] 3075 // CHECK12-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 3076 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3077 // CHECK12: omp.inner.for.end: 3078 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3079 // CHECK12: omp.loop.exit: 3080 // CHECK12-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3081 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 3082 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 3083 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 3084 // CHECK12: omp.precond.end: 3085 // CHECK12-NEXT: ret void 3086 // 3087 // 3088 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3089 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3090 // CHECK12-NEXT: entry: 3091 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3092 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3093 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3094 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3095 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3096 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 3097 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3098 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 3099 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3100 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 3101 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3102 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 3103 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3104 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 3105 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 3106 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3107 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4 3108 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 3109 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 3110 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 3111 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3112 // CHECK12-NEXT: [[I13:%.*]] = alloca i32, align 4 3113 // CHECK12-NEXT: [[J14:%.*]] = alloca i32, align 4 3114 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3115 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3116 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3117 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3118 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3119 // CHECK12-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 3120 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3121 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 3122 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3123 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3124 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 3125 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3126 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 3127 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3128 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3129 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3130 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 3131 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 3132 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3133 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 3134 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3135 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 3136 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3137 // CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 3138 // CHECK12-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3139 // CHECK12-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 3140 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 3141 // CHECK12-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 3142 // CHECK12-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 3143 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 3144 // CHECK12-NEXT: store i32 0, i32* [[J]], align 4 3145 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3146 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 3147 // CHECK12-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 3148 // CHECK12: land.lhs.true: 3149 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3150 // CHECK12-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 3151 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 3152 // CHECK12: omp.precond.then: 3153 // CHECK12-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 3154 // CHECK12-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3155 // CHECK12-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 3156 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3157 // CHECK12-NEXT: [[CONV11:%.*]] = zext i32 [[TMP12]] to i64 3158 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3159 // CHECK12-NEXT: [[CONV12:%.*]] = zext i32 [[TMP13]] to i64 3160 // CHECK12-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8 3161 // CHECK12-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8 3162 // CHECK12-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 3163 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3164 // CHECK12-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3165 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 3166 // CHECK12-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 3167 // CHECK12-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3168 // CHECK12-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3169 // CHECK12-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 3170 // CHECK12-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3171 // CHECK12: cond.true: 3172 // CHECK12-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 3173 // CHECK12-NEXT: br label [[COND_END:%.*]] 3174 // CHECK12: cond.false: 3175 // CHECK12-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3176 // CHECK12-NEXT: br label [[COND_END]] 3177 // CHECK12: cond.end: 3178 // CHECK12-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 3179 // CHECK12-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 3180 // CHECK12-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 3181 // CHECK12-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 3182 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3183 // CHECK12: omp.inner.for.cond: 3184 // CHECK12-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3185 // CHECK12-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3186 // CHECK12-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 3187 // CHECK12-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3188 // CHECK12: omp.inner.for.body: 3189 // CHECK12-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3190 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3191 // CHECK12-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 0 3192 // CHECK12-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 3193 // CHECK12-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]] 3194 // CHECK12-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64 3195 // CHECK12-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]] 3196 // CHECK12-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1 3197 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]] 3198 // CHECK12-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32 3199 // CHECK12-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4 3200 // CHECK12-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3201 // CHECK12-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3202 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3203 // CHECK12-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 0 3204 // CHECK12-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 3205 // CHECK12-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]] 3206 // CHECK12-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64 3207 // CHECK12-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]] 3208 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3209 // CHECK12-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 0 3210 // CHECK12-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 3211 // CHECK12-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]] 3212 // CHECK12-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64 3213 // CHECK12-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]] 3214 // CHECK12-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]] 3215 // CHECK12-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1 3216 // CHECK12-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]] 3217 // CHECK12-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32 3218 // CHECK12-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4 3219 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[I13]], align 4 3220 // CHECK12-NEXT: [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]] 3221 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP30]] 3222 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[J14]], align 4 3223 // CHECK12-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP31]] 3224 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4 3225 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3226 // CHECK12: omp.body.continue: 3227 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3228 // CHECK12: omp.inner.for.inc: 3229 // CHECK12-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 3230 // CHECK12-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP32]], 1 3231 // CHECK12-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8 3232 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3233 // CHECK12: omp.inner.for.end: 3234 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3235 // CHECK12: omp.loop.exit: 3236 // CHECK12-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3237 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3238 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 3239 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 3240 // CHECK12: omp.precond.end: 3241 // CHECK12-NEXT: ret void 3242 // 3243 // 3244 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 3245 // CHECK12-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3246 // CHECK12-NEXT: entry: 3247 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3248 // CHECK12-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 3249 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 3250 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 3251 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 3252 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3253 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3254 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3255 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3256 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 3257 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4 3258 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3259 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 3260 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4 3261 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3262 // CHECK12-NEXT: store i8* null, i8** [[TMP4]], align 4 3263 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3264 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3265 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20) 3266 // CHECK12-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3267 // CHECK12-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3268 // CHECK12-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3269 // CHECK12: omp_offload.failed: 3270 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 3271 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3272 // CHECK12: omp_offload.cont: 3273 // CHECK12-NEXT: ret i32 0 3274 // 3275 // 3276 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 3277 // CHECK12-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 3278 // CHECK12-NEXT: entry: 3279 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 3280 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 3281 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 3282 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 3283 // CHECK12-NEXT: ret void 3284 // 3285 // 3286 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 3287 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 3288 // CHECK12-NEXT: entry: 3289 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3290 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3291 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 3292 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3293 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3294 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3295 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3296 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3297 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3298 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3299 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3300 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4 3301 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3302 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3303 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 3304 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 3305 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3306 // CHECK12-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 3307 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3308 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3309 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3310 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3311 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3312 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3313 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 3314 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3315 // CHECK12: cond.true: 3316 // CHECK12-NEXT: br label [[COND_END:%.*]] 3317 // CHECK12: cond.false: 3318 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3319 // CHECK12-NEXT: br label [[COND_END]] 3320 // CHECK12: cond.end: 3321 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3322 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3323 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3324 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3325 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3326 // CHECK12: omp.inner.for.cond: 3327 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3328 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3329 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3330 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3331 // CHECK12: omp.inner.for.body: 3332 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3333 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3334 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]]) 3335 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3336 // CHECK12: omp.inner.for.inc: 3337 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3338 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3339 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3340 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3341 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3342 // CHECK12: omp.inner.for.end: 3343 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3344 // CHECK12: omp.loop.exit: 3345 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3346 // CHECK12-NEXT: ret void 3347 // 3348 // 3349 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 3350 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 3351 // CHECK12-NEXT: entry: 3352 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3353 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3354 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3355 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3356 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 3357 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3358 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3359 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3360 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3361 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3362 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3363 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3364 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3365 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4 3366 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3367 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3368 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3369 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3370 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 3371 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 3372 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3373 // CHECK12-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 3374 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3375 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3376 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3377 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3378 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3379 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3380 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3381 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3382 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3383 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3384 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 3385 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3386 // CHECK12: cond.true: 3387 // CHECK12-NEXT: br label [[COND_END:%.*]] 3388 // CHECK12: cond.false: 3389 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3390 // CHECK12-NEXT: br label [[COND_END]] 3391 // CHECK12: cond.end: 3392 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3393 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3394 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3395 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3396 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3397 // CHECK12: omp.inner.for.cond: 3398 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3399 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3400 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3401 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3402 // CHECK12: omp.inner.for.body: 3403 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3404 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 3405 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 3406 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3407 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3408 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3409 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3410 // CHECK12-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2 3411 // CHECK12-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 3412 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 3413 // CHECK12-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 3414 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 3415 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 3416 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 3417 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]] 3418 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 3419 // CHECK12-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 3420 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 3421 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3422 // CHECK12: omp.body.continue: 3423 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3424 // CHECK12: omp.inner.for.inc: 3425 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3426 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 3427 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 3428 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3429 // CHECK12: omp.inner.for.end: 3430 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3431 // CHECK12: omp.loop.exit: 3432 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3433 // CHECK12-NEXT: ret void 3434 // 3435 // 3436 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3437 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 3438 // CHECK12-NEXT: entry: 3439 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3440 // CHECK12-NEXT: ret void 3441 // 3442