1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X][Y]; 25 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute parallel for collapse(2) 30 for(int i = 0; i < X; i++) { 31 for(int j = 0; j < Y; j++) { 32 a[i][j] = (T)0; 33 } 34 } 35 36 // discard loop variables not needed here 37 38 39 return a[0][0]; 40 } 41 }; 42 43 int teams_template_struct(void) { 44 SS<int, 123, 456> V; 45 return V.foo(); 46 47 } 48 #endif // CK1 49 50 // Test host codegen. 51 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 52 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 53 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 54 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 56 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 57 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 64 #ifdef CK2 65 66 template <typename T, int n, int m> 67 int tmain(T argc) { 68 T a[n][m]; 69 #pragma omp target 70 #pragma omp teams distribute parallel for collapse(2) 71 for(int i = 0; i < n; i++) { 72 for(int j = 0; j < m; j++) { 73 a[i][j] = (T)0; 74 } 75 } 76 return 0; 77 } 78 79 int main (int argc, char **argv) { 80 int n = 100; 81 int m = 2; 82 int a[n][m]; 83 #pragma omp target 84 #pragma omp teams distribute parallel for collapse(2) 85 for(int i = 0; i < n; i++) { 86 for(int j = 0; j < m; j++) { 87 a[i][j] = 0; 88 } 89 } 90 return tmain<int, 10, 2>(argc); 91 } 92 93 94 95 96 97 98 99 100 // discard loop variables not needed here 101 102 103 #endif // CK2 104 #endif // #ifndef HEADER 105 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 106 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 107 // CHECK1-NEXT: entry: 108 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 109 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 110 // CHECK1-NEXT: ret i32 [[CALL]] 111 // 112 // 113 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 114 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 115 // CHECK1-NEXT: entry: 116 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 117 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 118 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 119 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 120 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 121 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 122 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 123 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 124 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 125 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 126 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 127 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 128 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 129 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 130 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8 131 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 132 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 133 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 134 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 135 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 136 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 137 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4 138 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 139 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4 140 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 141 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8 142 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 143 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8 144 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 145 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8 146 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 147 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8 148 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 149 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8 150 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 151 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8 152 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 153 // CHECK1-NEXT: store i64 56088, i64* [[TMP15]], align 8 154 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 155 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 156 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 157 // CHECK1: omp_offload.failed: 158 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 159 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 160 // CHECK1: omp_offload.cont: 161 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 162 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0 163 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0 164 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 165 // CHECK1-NEXT: ret i32 [[TMP18]] 166 // 167 // 168 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 169 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 170 // CHECK1-NEXT: entry: 171 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 172 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 173 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 174 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 175 // CHECK1-NEXT: ret void 176 // 177 // 178 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 179 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 180 // CHECK1-NEXT: entry: 181 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 182 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 183 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 184 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 185 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 186 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 187 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 188 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 193 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 194 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 195 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 196 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 197 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 198 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 199 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 200 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 201 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 202 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 203 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 204 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 205 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 206 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 207 // CHECK1: cond.true: 208 // CHECK1-NEXT: br label [[COND_END:%.*]] 209 // CHECK1: cond.false: 210 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 211 // CHECK1-NEXT: br label [[COND_END]] 212 // CHECK1: cond.end: 213 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 214 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 215 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 216 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 217 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 218 // CHECK1: omp.inner.for.cond: 219 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 220 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 221 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 222 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 223 // CHECK1: omp.inner.for.body: 224 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 225 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 226 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 227 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 228 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 229 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 230 // CHECK1: omp.inner.for.inc: 231 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 232 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 233 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 234 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 235 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 236 // CHECK1: omp.inner.for.end: 237 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 238 // CHECK1: omp.loop.exit: 239 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 240 // CHECK1-NEXT: ret void 241 // 242 // 243 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 244 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 245 // CHECK1-NEXT: entry: 246 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 247 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 248 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 249 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 250 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 251 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 252 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 253 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 254 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 255 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 256 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 257 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 258 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 259 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 260 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 261 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 262 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 263 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 264 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 265 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 266 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 267 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 268 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 269 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 270 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 271 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 272 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 273 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 274 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 275 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 276 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 277 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 278 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 279 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 280 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 281 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 282 // CHECK1: cond.true: 283 // CHECK1-NEXT: br label [[COND_END:%.*]] 284 // CHECK1: cond.false: 285 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 286 // CHECK1-NEXT: br label [[COND_END]] 287 // CHECK1: cond.end: 288 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 289 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 290 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 291 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 292 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 293 // CHECK1: omp.inner.for.cond: 294 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 295 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 296 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 297 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 298 // CHECK1: omp.inner.for.body: 299 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 300 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 301 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 302 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 303 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 304 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 305 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 306 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456 307 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456 308 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 309 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 310 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 311 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 312 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 313 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 314 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 315 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 316 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 317 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 318 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 319 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 320 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 321 // CHECK1: omp.body.continue: 322 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 323 // CHECK1: omp.inner.for.inc: 324 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 325 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 326 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 327 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 328 // CHECK1: omp.inner.for.end: 329 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 330 // CHECK1: omp.loop.exit: 331 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 332 // CHECK1-NEXT: ret void 333 // 334 // 335 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 336 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 337 // CHECK1-NEXT: entry: 338 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 339 // CHECK1-NEXT: ret void 340 // 341 // 342 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 343 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 344 // CHECK3-NEXT: entry: 345 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 346 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 347 // CHECK3-NEXT: ret i32 [[CALL]] 348 // 349 // 350 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 351 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 352 // CHECK3-NEXT: entry: 353 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 354 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 355 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 356 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 357 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 358 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 359 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 360 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 361 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 362 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 363 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 364 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 365 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 366 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 367 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4 368 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 369 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 370 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 371 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 372 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 373 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 374 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4 375 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 376 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4 377 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 378 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4 379 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 380 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4 381 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 382 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4 383 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 384 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4 385 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 386 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4 387 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 388 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4 389 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 390 // CHECK3-NEXT: store i64 56088, i64* [[TMP15]], align 8 391 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 392 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 393 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 394 // CHECK3: omp_offload.failed: 395 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 396 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 397 // CHECK3: omp_offload.cont: 398 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 399 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0 400 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0 401 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 402 // CHECK3-NEXT: ret i32 [[TMP18]] 403 // 404 // 405 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 406 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 407 // CHECK3-NEXT: entry: 408 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 409 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 410 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 411 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 412 // CHECK3-NEXT: ret void 413 // 414 // 415 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 416 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 417 // CHECK3-NEXT: entry: 418 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 419 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 420 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 421 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 422 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 423 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 424 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 425 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 426 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 427 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 428 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 429 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 430 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 431 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 432 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 433 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 434 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 435 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4 436 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 437 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 438 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 439 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 440 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 441 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 442 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 443 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 444 // CHECK3: cond.true: 445 // CHECK3-NEXT: br label [[COND_END:%.*]] 446 // CHECK3: cond.false: 447 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 448 // CHECK3-NEXT: br label [[COND_END]] 449 // CHECK3: cond.end: 450 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 451 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 452 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 453 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 454 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 455 // CHECK3: omp.inner.for.cond: 456 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 457 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 458 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 459 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 460 // CHECK3: omp.inner.for.body: 461 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 462 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 463 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 464 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 465 // CHECK3: omp.inner.for.inc: 466 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 467 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 468 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 469 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 470 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 471 // CHECK3: omp.inner.for.end: 472 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 473 // CHECK3: omp.loop.exit: 474 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 475 // CHECK3-NEXT: ret void 476 // 477 // 478 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 479 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 480 // CHECK3-NEXT: entry: 481 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 482 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 483 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 484 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 485 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 486 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 487 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 488 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 489 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 490 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 491 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 492 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 493 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 494 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 495 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 496 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 497 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 498 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 499 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 500 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 501 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 502 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 503 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 504 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 505 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 506 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 507 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 508 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 509 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 510 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 511 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 512 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 513 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 514 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 515 // CHECK3: cond.true: 516 // CHECK3-NEXT: br label [[COND_END:%.*]] 517 // CHECK3: cond.false: 518 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 519 // CHECK3-NEXT: br label [[COND_END]] 520 // CHECK3: cond.end: 521 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 522 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 523 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 524 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 525 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 526 // CHECK3: omp.inner.for.cond: 527 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 528 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 529 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 530 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 531 // CHECK3: omp.inner.for.body: 532 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 533 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 534 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 535 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 536 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 537 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 538 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 539 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456 540 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 541 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 542 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 543 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 544 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 545 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 546 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 547 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]] 548 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 549 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 550 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 551 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 552 // CHECK3: omp.body.continue: 553 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 554 // CHECK3: omp.inner.for.inc: 555 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 556 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 557 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 558 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 559 // CHECK3: omp.inner.for.end: 560 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 561 // CHECK3: omp.loop.exit: 562 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 563 // CHECK3-NEXT: ret void 564 // 565 // 566 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 567 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 568 // CHECK3-NEXT: entry: 569 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 570 // CHECK3-NEXT: ret void 571 // 572 // 573 // CHECK9-LABEL: define {{[^@]+}}@main 574 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 575 // CHECK9-NEXT: entry: 576 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 577 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 578 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 579 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 580 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 581 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 582 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 583 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 584 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 585 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 586 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 587 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 588 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 589 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 590 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 591 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 592 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 593 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 594 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 595 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 596 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 597 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 598 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 599 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4 600 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 601 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 602 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4 603 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 604 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave() 605 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8 606 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 607 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 608 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 609 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 610 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4 611 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 612 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4 613 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8 614 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4 615 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32* 616 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4 617 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8 618 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 619 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 620 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 621 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP12]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes to i8*), i64 40, i1 false) 622 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 623 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64* 624 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP14]], align 8 625 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 626 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 627 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP16]], align 8 628 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 629 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8 630 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 631 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 632 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8 633 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 634 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 635 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8 636 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 637 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 638 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 639 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64* 640 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP24]], align 8 641 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 642 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 643 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP26]], align 8 644 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 645 // CHECK9-NEXT: store i8* null, i8** [[TMP27]], align 8 646 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 647 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 648 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP29]], align 8 649 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 650 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 651 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8 652 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 653 // CHECK9-NEXT: store i8* null, i8** [[TMP32]], align 8 654 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 655 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32** 656 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP34]], align 8 657 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 658 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32** 659 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 8 660 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 661 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP37]], align 8 662 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 663 // CHECK9-NEXT: store i8* null, i8** [[TMP38]], align 8 664 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 665 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 666 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 667 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[N]], align 4 668 // CHECK9-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_]], align 4 669 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 670 // CHECK9-NEXT: store i32 [[TMP43]], i32* [[DOTCAPTURE_EXPR_3]], align 4 671 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 672 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP44]], 0 673 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 674 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64 675 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 676 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP45]], 0 677 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 678 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 679 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]] 680 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 681 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8 682 // CHECK9-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8 683 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP46]], 1 684 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 685 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 686 // CHECK9-NEXT: store i32 1, i32* [[TMP47]], align 4 687 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 688 // CHECK9-NEXT: store i32 5, i32* [[TMP48]], align 4 689 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 690 // CHECK9-NEXT: store i8** [[TMP39]], i8*** [[TMP49]], align 8 691 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 692 // CHECK9-NEXT: store i8** [[TMP40]], i8*** [[TMP50]], align 8 693 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 694 // CHECK9-NEXT: store i64* [[TMP41]], i64** [[TMP51]], align 8 695 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 696 // CHECK9-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP52]], align 8 697 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 698 // CHECK9-NEXT: store i8** null, i8*** [[TMP53]], align 8 699 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 700 // CHECK9-NEXT: store i8** null, i8*** [[TMP54]], align 8 701 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 702 // CHECK9-NEXT: store i64 [[ADD]], i64* [[TMP55]], align 8 703 // CHECK9-NEXT: [[TMP56:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 704 // CHECK9-NEXT: [[TMP57:%.*]] = icmp ne i32 [[TMP56]], 0 705 // CHECK9-NEXT: br i1 [[TMP57]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 706 // CHECK9: omp_offload.failed: 707 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 708 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 709 // CHECK9: omp_offload.cont: 710 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 711 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP58]]) 712 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 713 // CHECK9-NEXT: [[TMP59:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 714 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP59]]) 715 // CHECK9-NEXT: [[TMP60:%.*]] = load i32, i32* [[RETVAL]], align 4 716 // CHECK9-NEXT: ret i32 [[TMP60]] 717 // 718 // 719 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 720 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 721 // CHECK9-NEXT: entry: 722 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 723 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 724 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 725 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 726 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 727 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 728 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 729 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 730 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 731 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 732 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 733 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32* 734 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 735 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 736 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 737 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 738 // CHECK9-NEXT: ret void 739 // 740 // 741 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 742 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 743 // CHECK9-NEXT: entry: 744 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 745 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 746 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 747 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 748 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 749 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 750 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 751 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 752 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 753 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 754 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 755 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 756 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 757 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 758 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 759 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 760 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 761 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 762 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 763 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 764 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 765 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 766 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 767 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 768 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 769 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 770 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 771 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 772 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 773 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 774 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 775 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 776 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 777 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 778 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 779 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 780 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 781 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 782 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 783 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 784 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 785 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 786 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 787 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 788 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 789 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 790 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 791 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 792 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 793 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4 794 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 795 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 796 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 797 // CHECK9: land.lhs.true: 798 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 799 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 800 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 801 // CHECK9: omp.precond.then: 802 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 803 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 804 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 805 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 806 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 807 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 808 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 809 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 810 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 811 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 812 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 813 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 814 // CHECK9: cond.true: 815 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 816 // CHECK9-NEXT: br label [[COND_END:%.*]] 817 // CHECK9: cond.false: 818 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 819 // CHECK9-NEXT: br label [[COND_END]] 820 // CHECK9: cond.end: 821 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 822 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 823 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 824 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 825 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 826 // CHECK9: omp.inner.for.cond: 827 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 828 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 829 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 830 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 831 // CHECK9: omp.inner.for.body: 832 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 833 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 834 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP22]], i32* [[TMP0]], i32* [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], i32* [[TMP4]]) 835 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 836 // CHECK9: omp.inner.for.inc: 837 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 838 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 839 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]] 840 // CHECK9-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 841 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 842 // CHECK9: omp.inner.for.end: 843 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 844 // CHECK9: omp.loop.exit: 845 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 846 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 847 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 848 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 849 // CHECK9: omp.precond.end: 850 // CHECK9-NEXT: ret void 851 // 852 // 853 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 854 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 855 // CHECK9-NEXT: entry: 856 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 857 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 858 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 859 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 860 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 861 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 862 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 863 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 864 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 865 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 866 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 867 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 868 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 869 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 870 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 871 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 872 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 873 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 874 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 875 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 876 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 877 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 878 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 879 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 880 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 881 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 882 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 883 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 884 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 885 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 886 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 887 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 888 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 889 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 890 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 891 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 892 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 893 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 894 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 895 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 896 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 897 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 898 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 899 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 900 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 901 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 902 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 903 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 904 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 905 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 906 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 907 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 908 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 909 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4 910 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 911 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 912 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 913 // CHECK9: land.lhs.true: 914 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 915 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 916 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 917 // CHECK9: omp.precond.then: 918 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 919 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 920 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 921 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 922 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 923 // CHECK9-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_LB]], align 8 924 // CHECK9-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_UB]], align 8 925 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 926 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 927 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 928 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 929 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 930 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 931 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 932 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 933 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 934 // CHECK9: cond.true: 935 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 936 // CHECK9-NEXT: br label [[COND_END:%.*]] 937 // CHECK9: cond.false: 938 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 939 // CHECK9-NEXT: br label [[COND_END]] 940 // CHECK9: cond.end: 941 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 942 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 943 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 944 // CHECK9-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 945 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 946 // CHECK9: omp.inner.for.cond: 947 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 948 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 949 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 950 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 951 // CHECK9: omp.inner.for.body: 952 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 953 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 954 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0 955 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 956 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 957 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 958 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]] 959 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 960 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 961 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 962 // CHECK9-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4 963 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 964 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 965 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 966 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0 967 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 968 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 969 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 970 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]] 971 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 972 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0 973 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 974 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 975 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 976 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 977 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]] 978 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 979 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 980 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 981 // CHECK9-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4 982 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[I11]], align 4 983 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64 984 // CHECK9-NEXT: [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 985 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP30]] 986 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[J12]], align 4 987 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64 988 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]] 989 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4 990 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 991 // CHECK9: omp.body.continue: 992 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 993 // CHECK9: omp.inner.for.inc: 994 // CHECK9-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 995 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1 996 // CHECK9-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8 997 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 998 // CHECK9: omp.inner.for.end: 999 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1000 // CHECK9: omp.loop.exit: 1001 // CHECK9-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1002 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1003 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1004 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1005 // CHECK9: omp.precond.end: 1006 // CHECK9-NEXT: ret void 1007 // 1008 // 1009 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1010 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1011 // CHECK9-NEXT: entry: 1012 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1013 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1014 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1015 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1016 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1017 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1018 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1019 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1020 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1021 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 1022 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8 1023 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1024 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 1025 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8 1026 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1027 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 1028 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1029 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1030 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1031 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1032 // CHECK9-NEXT: store i32 1, i32* [[TMP7]], align 4 1033 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1034 // CHECK9-NEXT: store i32 1, i32* [[TMP8]], align 4 1035 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1036 // CHECK9-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8 1037 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1038 // CHECK9-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8 1039 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1040 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP11]], align 8 1041 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1042 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP12]], align 8 1043 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1044 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8 1045 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1046 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8 1047 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1048 // CHECK9-NEXT: store i64 20, i64* [[TMP15]], align 8 1049 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1050 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1051 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1052 // CHECK9: omp_offload.failed: 1053 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 1054 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1055 // CHECK9: omp_offload.cont: 1056 // CHECK9-NEXT: ret i32 0 1057 // 1058 // 1059 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 1060 // CHECK9-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1061 // CHECK9-NEXT: entry: 1062 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1063 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1064 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1065 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 1066 // CHECK9-NEXT: ret void 1067 // 1068 // 1069 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 1070 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1071 // CHECK9-NEXT: entry: 1072 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1073 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1074 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1075 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1076 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1077 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1078 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1079 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1080 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1081 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1082 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1083 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1084 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1085 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1086 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1087 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1088 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1089 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 1090 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1091 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1092 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1093 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1094 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1095 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1096 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1097 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1098 // CHECK9: cond.true: 1099 // CHECK9-NEXT: br label [[COND_END:%.*]] 1100 // CHECK9: cond.false: 1101 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1102 // CHECK9-NEXT: br label [[COND_END]] 1103 // CHECK9: cond.end: 1104 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1105 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1106 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1107 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1108 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1109 // CHECK9: omp.inner.for.cond: 1110 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1111 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1112 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1113 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1114 // CHECK9: omp.inner.for.body: 1115 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1116 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1117 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1118 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1119 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]]) 1120 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1121 // CHECK9: omp.inner.for.inc: 1122 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1123 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1124 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1125 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1126 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1127 // CHECK9: omp.inner.for.end: 1128 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1129 // CHECK9: omp.loop.exit: 1130 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1131 // CHECK9-NEXT: ret void 1132 // 1133 // 1134 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 1135 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1136 // CHECK9-NEXT: entry: 1137 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1138 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1139 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1140 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1141 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 1142 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1143 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1144 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1145 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1146 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1147 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1148 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1149 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1150 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1151 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1152 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1153 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1154 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1155 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 1156 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 1157 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1158 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 1159 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1160 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1161 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1162 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 1163 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1164 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1165 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1166 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1167 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1168 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1169 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1170 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1171 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 1172 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1173 // CHECK9: cond.true: 1174 // CHECK9-NEXT: br label [[COND_END:%.*]] 1175 // CHECK9: cond.false: 1176 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1177 // CHECK9-NEXT: br label [[COND_END]] 1178 // CHECK9: cond.end: 1179 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1180 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1181 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1182 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1183 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1184 // CHECK9: omp.inner.for.cond: 1185 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1186 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1187 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1188 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1189 // CHECK9: omp.inner.for.body: 1190 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1191 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 1192 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1193 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1194 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1195 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1196 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1197 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2 1198 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2 1199 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 1200 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 1201 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 1202 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[J]], align 4 1203 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1204 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1205 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1206 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 1207 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 1208 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 1209 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4 1210 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1211 // CHECK9: omp.body.continue: 1212 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1213 // CHECK9: omp.inner.for.inc: 1214 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1215 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 1216 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 1217 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1218 // CHECK9: omp.inner.for.end: 1219 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1220 // CHECK9: omp.loop.exit: 1221 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1222 // CHECK9-NEXT: ret void 1223 // 1224 // 1225 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1226 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1227 // CHECK9-NEXT: entry: 1228 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1229 // CHECK9-NEXT: ret void 1230 // 1231 // 1232 // CHECK11-LABEL: define {{[^@]+}}@main 1233 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1234 // CHECK11-NEXT: entry: 1235 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1236 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1237 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 1238 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 1239 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 1240 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 1241 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 1242 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 1243 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1244 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 1245 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 1246 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 1247 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 1248 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 1249 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1250 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1251 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1252 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1253 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 1254 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1255 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1256 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 1257 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 1258 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4 1259 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1260 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4 1261 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1262 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 1263 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 1264 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 1265 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 1266 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4 1267 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 1268 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 1269 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 1270 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4 1271 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4 1272 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4 1273 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 1274 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 1275 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 1276 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1277 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes to i8*), i32 40, i1 false) 1278 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1279 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 1280 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP13]], align 4 1281 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1282 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 1283 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 1284 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1285 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 1286 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1287 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 1288 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4 1289 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1290 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 1291 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4 1292 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1293 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 1294 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1295 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 1296 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4 1297 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1298 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 1299 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4 1300 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1301 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 1302 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1303 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 1304 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP28]], align 4 1305 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1306 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 1307 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4 1308 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1309 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4 1310 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1311 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32** 1312 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP33]], align 4 1313 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1314 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32** 1315 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP35]], align 4 1316 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 1317 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP36]], align 4 1318 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 1319 // CHECK11-NEXT: store i8* null, i8** [[TMP37]], align 4 1320 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1321 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1322 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1323 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4 1324 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[DOTCAPTURE_EXPR_]], align 4 1325 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[M]], align 4 1326 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1327 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1328 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP43]], 0 1329 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1330 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1331 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1332 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP44]], 0 1333 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 1334 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 1335 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 1336 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 1337 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8 1338 // CHECK11-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8 1339 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP45]], 1 1340 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1341 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1342 // CHECK11-NEXT: store i32 1, i32* [[TMP46]], align 4 1343 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1344 // CHECK11-NEXT: store i32 5, i32* [[TMP47]], align 4 1345 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1346 // CHECK11-NEXT: store i8** [[TMP38]], i8*** [[TMP48]], align 4 1347 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1348 // CHECK11-NEXT: store i8** [[TMP39]], i8*** [[TMP49]], align 4 1349 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1350 // CHECK11-NEXT: store i64* [[TMP40]], i64** [[TMP50]], align 4 1351 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1352 // CHECK11-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP51]], align 4 1353 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1354 // CHECK11-NEXT: store i8** null, i8*** [[TMP52]], align 4 1355 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1356 // CHECK11-NEXT: store i8** null, i8*** [[TMP53]], align 4 1357 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1358 // CHECK11-NEXT: store i64 [[ADD]], i64* [[TMP54]], align 8 1359 // CHECK11-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1360 // CHECK11-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 1361 // CHECK11-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1362 // CHECK11: omp_offload.failed: 1363 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1364 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1365 // CHECK11: omp_offload.cont: 1366 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1367 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP57]]) 1368 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1369 // CHECK11-NEXT: [[TMP58:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 1370 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP58]]) 1371 // CHECK11-NEXT: [[TMP59:%.*]] = load i32, i32* [[RETVAL]], align 4 1372 // CHECK11-NEXT: ret i32 [[TMP59]] 1373 // 1374 // 1375 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 1376 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1377 // CHECK11-NEXT: entry: 1378 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1379 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 1380 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1381 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1382 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1383 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1384 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 1385 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 1386 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 1387 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1388 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 1389 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 1390 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1391 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 1392 // CHECK11-NEXT: ret void 1393 // 1394 // 1395 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 1396 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1397 // CHECK11-NEXT: entry: 1398 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1399 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1400 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1401 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 1402 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1403 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1404 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1405 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1406 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1407 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1408 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1409 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1410 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1411 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1412 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1413 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 1414 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 1415 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1416 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1417 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4 1418 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4 1419 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1420 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1421 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1422 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 1423 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 1424 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 1425 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1426 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1427 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 1428 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 1429 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 1430 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1431 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1432 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1433 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1434 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1435 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1436 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1437 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1438 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1439 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1440 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1441 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1442 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1443 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1444 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1445 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1446 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 1447 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4 1448 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1449 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1450 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1451 // CHECK11: land.lhs.true: 1452 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1453 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1454 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1455 // CHECK11: omp.precond.then: 1456 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8 1457 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1458 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8 1459 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1460 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1461 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1462 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1463 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1464 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1465 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1466 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 1467 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1468 // CHECK11: cond.true: 1469 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1470 // CHECK11-NEXT: br label [[COND_END:%.*]] 1471 // CHECK11: cond.false: 1472 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1473 // CHECK11-NEXT: br label [[COND_END]] 1474 // CHECK11: cond.end: 1475 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1476 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8 1477 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 1478 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 1479 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1480 // CHECK11: omp.inner.for.cond: 1481 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1482 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1483 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 1484 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1485 // CHECK11: omp.inner.for.body: 1486 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8 1487 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32 1488 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8 1489 // CHECK11-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32 1490 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP24]], i32* [[TMP0]], i32* [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], i32* [[TMP4]]) 1491 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1492 // CHECK11: omp.inner.for.inc: 1493 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1494 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8 1495 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]] 1496 // CHECK11-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8 1497 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1498 // CHECK11: omp.inner.for.end: 1499 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1500 // CHECK11: omp.loop.exit: 1501 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1502 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 1503 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 1504 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1505 // CHECK11: omp.precond.end: 1506 // CHECK11-NEXT: ret void 1507 // 1508 // 1509 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 1510 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1511 // CHECK11-NEXT: entry: 1512 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1513 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1514 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1515 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1516 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1517 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 1518 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1519 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1520 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1521 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1522 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1523 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1524 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1525 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1526 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1527 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1528 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1529 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 1530 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 1531 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1532 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1533 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4 1534 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4 1535 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1536 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1537 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1538 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1539 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1540 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 1541 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 1542 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 1543 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1544 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1545 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 1546 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 1547 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 1548 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1549 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1550 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1551 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1552 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1553 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1554 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1555 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1556 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1557 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1558 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1559 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1560 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1561 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1562 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1563 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1564 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 1565 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4 1566 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1567 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1568 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1569 // CHECK11: land.lhs.true: 1570 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1571 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1572 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1573 // CHECK11: omp.precond.then: 1574 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 1575 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1576 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 1577 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1578 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP12]] to i64 1579 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1580 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP13]] to i64 1581 // CHECK11-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8 1582 // CHECK11-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8 1583 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1584 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1585 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1586 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1587 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1588 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1589 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1590 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 1591 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1592 // CHECK11: cond.true: 1593 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1594 // CHECK11-NEXT: br label [[COND_END:%.*]] 1595 // CHECK11: cond.false: 1596 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1597 // CHECK11-NEXT: br label [[COND_END]] 1598 // CHECK11: cond.end: 1599 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 1600 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 1601 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 1602 // CHECK11-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8 1603 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1604 // CHECK11: omp.inner.for.cond: 1605 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1606 // CHECK11-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1607 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 1608 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1609 // CHECK11: omp.inner.for.body: 1610 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1611 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1612 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 0 1613 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 1614 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]] 1615 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64 1616 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]] 1617 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1 1618 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]] 1619 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32 1620 // CHECK11-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4 1621 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1622 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1623 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1624 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 0 1625 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 1626 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]] 1627 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64 1628 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]] 1629 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1630 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 0 1631 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 1632 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]] 1633 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64 1634 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]] 1635 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]] 1636 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1 1637 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]] 1638 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32 1639 // CHECK11-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4 1640 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[I13]], align 4 1641 // CHECK11-NEXT: [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]] 1642 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP30]] 1643 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[J14]], align 4 1644 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP31]] 1645 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4 1646 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1647 // CHECK11: omp.body.continue: 1648 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1649 // CHECK11: omp.inner.for.inc: 1650 // CHECK11-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1651 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP32]], 1 1652 // CHECK11-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8 1653 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1654 // CHECK11: omp.inner.for.end: 1655 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1656 // CHECK11: omp.loop.exit: 1657 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1658 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1659 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1660 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1661 // CHECK11: omp.precond.end: 1662 // CHECK11-NEXT: ret void 1663 // 1664 // 1665 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1666 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1667 // CHECK11-NEXT: entry: 1668 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1669 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1670 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1671 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1672 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1673 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1674 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1675 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1676 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1677 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 1678 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4 1679 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1680 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 1681 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4 1682 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1683 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 1684 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1685 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1686 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1687 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1688 // CHECK11-NEXT: store i32 1, i32* [[TMP7]], align 4 1689 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1690 // CHECK11-NEXT: store i32 1, i32* [[TMP8]], align 4 1691 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1692 // CHECK11-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4 1693 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1694 // CHECK11-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4 1695 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1696 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP11]], align 4 1697 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1698 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP12]], align 4 1699 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1700 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 4 1701 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1702 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 4 1703 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1704 // CHECK11-NEXT: store i64 20, i64* [[TMP15]], align 8 1705 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1706 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1707 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1708 // CHECK11: omp_offload.failed: 1709 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 1710 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1711 // CHECK11: omp_offload.cont: 1712 // CHECK11-NEXT: ret i32 0 1713 // 1714 // 1715 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 1716 // CHECK11-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1717 // CHECK11-NEXT: entry: 1718 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 1719 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 1720 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 1721 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 1722 // CHECK11-NEXT: ret void 1723 // 1724 // 1725 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 1726 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1727 // CHECK11-NEXT: entry: 1728 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1729 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1730 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 1731 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1732 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1733 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1734 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1735 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1736 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1737 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1738 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1739 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1740 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1741 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1742 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 1743 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 1744 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1745 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4 1746 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1747 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1748 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1749 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1750 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1751 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1752 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1753 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1754 // CHECK11: cond.true: 1755 // CHECK11-NEXT: br label [[COND_END:%.*]] 1756 // CHECK11: cond.false: 1757 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1758 // CHECK11-NEXT: br label [[COND_END]] 1759 // CHECK11: cond.end: 1760 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1761 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1762 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1763 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1764 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1765 // CHECK11: omp.inner.for.cond: 1766 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1767 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1768 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1769 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1770 // CHECK11: omp.inner.for.body: 1771 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1772 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1773 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]]) 1774 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1775 // CHECK11: omp.inner.for.inc: 1776 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1777 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1778 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1779 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1780 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1781 // CHECK11: omp.inner.for.end: 1782 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1783 // CHECK11: omp.loop.exit: 1784 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1785 // CHECK11-NEXT: ret void 1786 // 1787 // 1788 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 1789 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1790 // CHECK11-NEXT: entry: 1791 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1792 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1793 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1794 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1795 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 1796 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1797 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1798 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1799 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1800 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1801 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1802 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1803 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1804 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1805 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1806 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1807 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1808 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1809 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 1810 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 1811 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1812 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 1813 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1814 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1815 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1816 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1817 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1818 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1819 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1820 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1821 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1822 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1823 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 1824 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1825 // CHECK11: cond.true: 1826 // CHECK11-NEXT: br label [[COND_END:%.*]] 1827 // CHECK11: cond.false: 1828 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1829 // CHECK11-NEXT: br label [[COND_END]] 1830 // CHECK11: cond.end: 1831 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1832 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1833 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1834 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1835 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1836 // CHECK11: omp.inner.for.cond: 1837 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1838 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1839 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1840 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1841 // CHECK11: omp.inner.for.body: 1842 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1843 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 1844 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1845 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1846 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1847 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1848 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1849 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2 1850 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 1851 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 1852 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 1853 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 1854 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 1855 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1856 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]] 1857 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4 1858 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]] 1859 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 1860 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1861 // CHECK11: omp.body.continue: 1862 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1863 // CHECK11: omp.inner.for.inc: 1864 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1865 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 1866 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1867 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1868 // CHECK11: omp.inner.for.end: 1869 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1870 // CHECK11: omp.loop.exit: 1871 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1872 // CHECK11-NEXT: ret void 1873 // 1874 // 1875 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1876 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 1877 // CHECK11-NEXT: entry: 1878 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 1879 // CHECK11-NEXT: ret void 1880 // 1881