1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 // Test host codegen. 6 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 7 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 9 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 10 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 12 13 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 14 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 16 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 17 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 19 #ifdef CK1 20 21 int a[100]; 22 23 int teams_argument_global(int n){ 24 int te = n / 128; 25 int th = 128; 26 // discard n_addr 27 28 #pragma omp target 29 #pragma omp teams distribute parallel for num_teams(te), thread_limit(th) 30 for(int i = 0; i < n; i++) { 31 a[i] = 0; 32 #pragma omp cancel for 33 } 34 35 #pragma omp target 36 {{{ 37 #pragma omp teams distribute parallel for 38 for(int i = 0; i < n; i++) { 39 a[i] = 0; 40 } 41 }}} 42 43 // outlined target regions 44 45 46 47 48 return a[0]; 49 } 50 51 #endif // CK1 52 53 // Test host codegen. 54 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 55 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 56 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 57 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 58 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 59 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 60 61 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 62 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 64 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 65 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 66 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 67 #ifdef CK2 68 69 int teams_local_arg(void) { 70 int n = 100; 71 int a[n]; 72 73 #pragma omp target 74 #pragma omp teams distribute parallel for 75 for(int i = 0; i < n; i++) { 76 a[i] = 0; 77 } 78 79 // outlined target region 80 81 82 return a[0]; 83 } 84 #endif // CK2 85 86 // Test host codegen. 87 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 88 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 89 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18 90 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 91 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 92 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20 93 94 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21 95 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 96 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK22 97 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23 98 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 99 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK24 100 #ifdef CK3 101 102 103 template <typename T, int X, long long Y> 104 struct SS{ 105 T a[X]; 106 float b; 107 int foo(void) { 108 109 #pragma omp target 110 #pragma omp teams distribute parallel for 111 for(int i = 0; i < X; i++) { 112 a[i] = (T)0; 113 } 114 115 // outlined target region 116 117 118 return a[0]; 119 } 120 }; 121 122 int teams_template_struct(void) { 123 SS<int, 123, 456> V; 124 return V.foo(); 125 126 } 127 #endif // CK3 128 129 // Test host codegen. 130 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK25 131 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 132 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK26 133 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK27 134 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 135 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK28 136 137 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29 138 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 139 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK30 140 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK31 141 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 142 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK32 143 144 #ifdef CK4 145 146 template <typename T, int n> 147 int tmain(T argc) { 148 T a[n]; 149 int te = n/128; 150 int th = 128; 151 #pragma omp target 152 #pragma omp teams distribute parallel for num_teams(te) thread_limit(th) 153 for(int i = 0; i < n; i++) { 154 a[i] = (T)0; 155 } 156 return 0; 157 } 158 159 int main (int argc, char **argv) { 160 int n = 100; 161 int a[n]; 162 #pragma omp target 163 #pragma omp teams distribute parallel for 164 for(int i = 0; i < n; i++) { 165 a[i] = 0; 166 } 167 return tmain<int, 10>(argc); 168 } 169 170 171 172 173 174 175 176 #endif // CK4 177 #endif 178 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 179 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 180 // CHECK1-NEXT: entry: 181 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 182 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4 183 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4 184 // CHECK1-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 185 // CHECK1-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 186 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 187 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 188 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 189 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 190 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 193 // CHECK1-NEXT: [[N_CASTED6:%.*]] = alloca i64, align 8 194 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8 195 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8 196 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8 197 // CHECK1-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 198 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 199 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 201 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 202 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 203 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 204 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4 205 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 206 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 207 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 208 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8 209 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 210 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 211 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 212 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8 213 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 214 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 215 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 216 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 217 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 218 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 219 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 220 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 221 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 222 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8 223 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 224 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 225 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 226 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 227 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8 228 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 229 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 230 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8 231 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 232 // CHECK1-NEXT: store i8* null, i8** [[TMP16]], align 8 233 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 234 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 235 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8 236 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 237 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 238 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8 239 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 240 // CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8 241 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 242 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 243 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8 244 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 245 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 246 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8 247 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 248 // CHECK1-NEXT: store i8* null, i8** [[TMP26]], align 8 249 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 250 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 251 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 252 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4 253 // CHECK1-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4 254 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 255 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0 256 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1 257 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1 258 // CHECK1-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 259 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 260 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1 261 // CHECK1-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64 262 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP33]]) 263 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 0) 264 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 265 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 266 // CHECK1: omp_offload.failed: 267 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 268 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 269 // CHECK1: omp_offload.cont: 270 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[N_ADDR]], align 4 271 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED6]] to i32* 272 // CHECK1-NEXT: store i32 [[TMP36]], i32* [[CONV7]], align 4 273 // CHECK1-NEXT: [[TMP37:%.*]] = load i64, i64* [[N_CASTED6]], align 8 274 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 275 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 276 // CHECK1-NEXT: store i64 [[TMP37]], i64* [[TMP39]], align 8 277 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 278 // CHECK1-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64* 279 // CHECK1-NEXT: store i64 [[TMP37]], i64* [[TMP41]], align 8 280 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 281 // CHECK1-NEXT: store i8* null, i8** [[TMP42]], align 8 282 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 283 // CHECK1-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to [100 x i32]** 284 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP44]], align 8 285 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 286 // CHECK1-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to [100 x i32]** 287 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP46]], align 8 288 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 289 // CHECK1-NEXT: store i8* null, i8** [[TMP47]], align 8 290 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 291 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 292 // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[N_ADDR]], align 4 293 // CHECK1-NEXT: store i32 [[TMP50]], i32* [[DOTCAPTURE_EXPR_12]], align 4 294 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 295 // CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP51]], 0 296 // CHECK1-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 297 // CHECK1-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1 298 // CHECK1-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4 299 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 300 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP52]], 1 301 // CHECK1-NEXT: [[TMP53:%.*]] = zext i32 [[ADD17]] to i64 302 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP53]]) 303 // CHECK1-NEXT: [[TMP54:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP48]], i8** [[TMP49]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 304 // CHECK1-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0 305 // CHECK1-NEXT: br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]] 306 // CHECK1: omp_offload.failed18: 307 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i64 [[TMP37]], [100 x i32]* @a) #[[ATTR2]] 308 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT19]] 309 // CHECK1: omp_offload.cont19: 310 // CHECK1-NEXT: [[TMP56:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 311 // CHECK1-NEXT: ret i32 [[TMP56]] 312 // 313 // 314 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28 315 // CHECK1-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 316 // CHECK1-NEXT: entry: 317 // CHECK1-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 318 // CHECK1-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 319 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 320 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 321 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 322 // CHECK1-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 323 // CHECK1-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 324 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 325 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 326 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 327 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 328 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32* 329 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 330 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 331 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8 332 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 333 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]]) 334 // CHECK1-NEXT: ret void 335 // 336 // 337 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 338 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 339 // CHECK1-NEXT: entry: 340 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 341 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 342 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 343 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 344 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 345 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 346 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 347 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 348 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 349 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 350 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 351 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 352 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 353 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 354 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 355 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 356 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 357 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 358 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 359 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 360 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 361 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 362 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 363 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 364 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 365 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 366 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 367 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 368 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 369 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 370 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 371 // CHECK1: omp.precond.then: 372 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 373 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 374 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 375 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 376 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 377 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 378 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 379 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 380 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 381 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 382 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 383 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 384 // CHECK1: cond.true: 385 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 386 // CHECK1-NEXT: br label [[COND_END:%.*]] 387 // CHECK1: cond.false: 388 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 389 // CHECK1-NEXT: br label [[COND_END]] 390 // CHECK1: cond.end: 391 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 392 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 393 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 394 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 395 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 396 // CHECK1: omp.inner.for.cond: 397 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 398 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 399 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 400 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 401 // CHECK1: omp.inner.for.body: 402 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 403 // CHECK1-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 404 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 405 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 406 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i32* [[TMP0]], [100 x i32]* [[TMP1]]) 407 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 408 // CHECK1: omp.inner.for.inc: 409 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 410 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 411 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 412 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 413 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 414 // CHECK1: omp.inner.for.end: 415 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 416 // CHECK1: omp.loop.exit: 417 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 418 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 419 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 420 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 421 // CHECK1: omp.precond.end: 422 // CHECK1-NEXT: ret void 423 // 424 // 425 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 426 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 427 // CHECK1-NEXT: entry: 428 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 429 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 430 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 431 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 432 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 433 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 434 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 435 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 436 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 437 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 438 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 439 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 440 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 441 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 442 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 443 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 444 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 445 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 446 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 447 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 448 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 449 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 450 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 451 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 452 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 453 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 454 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 455 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 456 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 457 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 458 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 459 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 460 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 461 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 462 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 463 // CHECK1: omp.precond.then: 464 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 465 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 466 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 467 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 468 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 469 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 470 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 471 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 472 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 473 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 474 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 475 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 476 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 477 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 478 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 479 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 480 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 481 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 482 // CHECK1: cond.true: 483 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 484 // CHECK1-NEXT: br label [[COND_END:%.*]] 485 // CHECK1: cond.false: 486 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 487 // CHECK1-NEXT: br label [[COND_END]] 488 // CHECK1: cond.end: 489 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 490 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 491 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 492 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 493 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 494 // CHECK1: omp.inner.for.cond: 495 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 496 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 497 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 498 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 499 // CHECK1: omp.inner.for.body: 500 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 501 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 502 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 503 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 504 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4 505 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 506 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 507 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 508 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 509 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 510 // CHECK1-NEXT: [[TMP21:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP20]], i32 2) 511 // CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 512 // CHECK1-NEXT: br i1 [[TMP22]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 513 // CHECK1: .cancel.exit: 514 // CHECK1-NEXT: br label [[CANCEL_EXIT:%.*]] 515 // CHECK1: .cancel.continue: 516 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 517 // CHECK1: omp.body.continue: 518 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 519 // CHECK1: omp.inner.for.inc: 520 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 521 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], 1 522 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 523 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 524 // CHECK1: omp.inner.for.end: 525 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 526 // CHECK1: omp.loop.exit: 527 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 528 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 529 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 530 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 531 // CHECK1: cancel.exit: 532 // CHECK1-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 533 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 534 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 535 // CHECK1-NEXT: br label [[CANCEL_CONT:%.*]] 536 // CHECK1: omp.precond.end: 537 // CHECK1-NEXT: br label [[CANCEL_CONT]] 538 // CHECK1: cancel.cont: 539 // CHECK1-NEXT: ret void 540 // 541 // 542 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 543 // CHECK1-SAME: (i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 544 // CHECK1-NEXT: entry: 545 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 546 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 547 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 548 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 549 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 550 // CHECK1-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 551 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [100 x i32]* [[TMP0]]) 552 // CHECK1-NEXT: ret void 553 // 554 // 555 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 556 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 557 // CHECK1-NEXT: entry: 558 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 559 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 560 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 561 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 562 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 563 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 564 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 565 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 566 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 567 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 568 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 569 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 570 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 571 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 572 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 573 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 574 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 575 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 576 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 577 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 578 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 579 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 580 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 581 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 582 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 583 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 584 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 585 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 586 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 587 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 588 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 589 // CHECK1: omp.precond.then: 590 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 591 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 592 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 593 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 594 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 595 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 596 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 597 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 598 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 599 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 600 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 601 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 602 // CHECK1: cond.true: 603 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 604 // CHECK1-NEXT: br label [[COND_END:%.*]] 605 // CHECK1: cond.false: 606 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 607 // CHECK1-NEXT: br label [[COND_END]] 608 // CHECK1: cond.end: 609 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 610 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 611 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 612 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 613 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 614 // CHECK1: omp.inner.for.cond: 615 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 616 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 617 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 618 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 619 // CHECK1: omp.inner.for.body: 620 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 621 // CHECK1-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 622 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 623 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 624 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i32* [[TMP0]], [100 x i32]* [[TMP1]]) 625 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 626 // CHECK1: omp.inner.for.inc: 627 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 628 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 629 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 630 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 631 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 632 // CHECK1: omp.inner.for.end: 633 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 634 // CHECK1: omp.loop.exit: 635 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 636 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 637 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 638 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 639 // CHECK1: omp.precond.end: 640 // CHECK1-NEXT: ret void 641 // 642 // 643 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 644 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 645 // CHECK1-NEXT: entry: 646 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 647 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 648 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 649 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 650 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 651 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 652 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 653 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 654 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 655 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 656 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 657 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 658 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 659 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 660 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 661 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 662 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 663 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 664 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 665 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 666 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 667 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 668 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 669 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 670 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 671 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 672 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 673 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 674 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 675 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 676 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 677 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 678 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 679 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 680 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 681 // CHECK1: omp.precond.then: 682 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 683 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 684 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 685 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 686 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 687 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 688 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 689 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 690 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 691 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 692 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 693 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 694 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 695 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 696 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 697 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 698 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 699 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 700 // CHECK1: cond.true: 701 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 702 // CHECK1-NEXT: br label [[COND_END:%.*]] 703 // CHECK1: cond.false: 704 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 705 // CHECK1-NEXT: br label [[COND_END]] 706 // CHECK1: cond.end: 707 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 708 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 709 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 710 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 711 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 712 // CHECK1: omp.inner.for.cond: 713 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 714 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 715 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 716 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 717 // CHECK1: omp.inner.for.body: 718 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 719 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 720 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 721 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 722 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4 723 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 724 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 725 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 726 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 727 // CHECK1: omp.body.continue: 728 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 729 // CHECK1: omp.inner.for.inc: 730 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 731 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 732 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 733 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 734 // CHECK1: omp.inner.for.end: 735 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 736 // CHECK1: omp.loop.exit: 737 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 738 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 739 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 740 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 741 // CHECK1: omp.precond.end: 742 // CHECK1-NEXT: ret void 743 // 744 // 745 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 746 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 747 // CHECK1-NEXT: entry: 748 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 749 // CHECK1-NEXT: ret void 750 // 751 // 752 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 753 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 754 // CHECK2-NEXT: entry: 755 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 756 // CHECK2-NEXT: [[TE:%.*]] = alloca i32, align 4 757 // CHECK2-NEXT: [[TH:%.*]] = alloca i32, align 4 758 // CHECK2-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 759 // CHECK2-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 760 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 761 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 762 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 763 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 764 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 765 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 766 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 767 // CHECK2-NEXT: [[N_CASTED6:%.*]] = alloca i64, align 8 768 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8 769 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8 770 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8 771 // CHECK2-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 772 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 773 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 774 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 775 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 776 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 777 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 778 // CHECK2-NEXT: store i32 128, i32* [[TH]], align 4 779 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 780 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 781 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 782 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8 783 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 784 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 785 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 786 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8 787 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 788 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 789 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 790 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 791 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 792 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 793 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 794 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 795 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 796 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8 797 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 798 // CHECK2-NEXT: store i8* null, i8** [[TMP11]], align 8 799 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 800 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 801 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8 802 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 803 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 804 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8 805 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 806 // CHECK2-NEXT: store i8* null, i8** [[TMP16]], align 8 807 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 808 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 809 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8 810 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 811 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 812 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8 813 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 814 // CHECK2-NEXT: store i8* null, i8** [[TMP21]], align 8 815 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 816 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 817 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8 818 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 819 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 820 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8 821 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 822 // CHECK2-NEXT: store i8* null, i8** [[TMP26]], align 8 823 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 824 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 825 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 826 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4 827 // CHECK2-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4 828 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 829 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0 830 // CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1 831 // CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1 832 // CHECK2-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 833 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 834 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1 835 // CHECK2-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64 836 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP33]]) 837 // CHECK2-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 0) 838 // CHECK2-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 839 // CHECK2-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 840 // CHECK2: omp_offload.failed: 841 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 842 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 843 // CHECK2: omp_offload.cont: 844 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[N_ADDR]], align 4 845 // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED6]] to i32* 846 // CHECK2-NEXT: store i32 [[TMP36]], i32* [[CONV7]], align 4 847 // CHECK2-NEXT: [[TMP37:%.*]] = load i64, i64* [[N_CASTED6]], align 8 848 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 849 // CHECK2-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 850 // CHECK2-NEXT: store i64 [[TMP37]], i64* [[TMP39]], align 8 851 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 852 // CHECK2-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64* 853 // CHECK2-NEXT: store i64 [[TMP37]], i64* [[TMP41]], align 8 854 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 855 // CHECK2-NEXT: store i8* null, i8** [[TMP42]], align 8 856 // CHECK2-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 857 // CHECK2-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to [100 x i32]** 858 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP44]], align 8 859 // CHECK2-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 860 // CHECK2-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to [100 x i32]** 861 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP46]], align 8 862 // CHECK2-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 863 // CHECK2-NEXT: store i8* null, i8** [[TMP47]], align 8 864 // CHECK2-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 865 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 866 // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[N_ADDR]], align 4 867 // CHECK2-NEXT: store i32 [[TMP50]], i32* [[DOTCAPTURE_EXPR_12]], align 4 868 // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 869 // CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP51]], 0 870 // CHECK2-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 871 // CHECK2-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1 872 // CHECK2-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4 873 // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 874 // CHECK2-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP52]], 1 875 // CHECK2-NEXT: [[TMP53:%.*]] = zext i32 [[ADD17]] to i64 876 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP53]]) 877 // CHECK2-NEXT: [[TMP54:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP48]], i8** [[TMP49]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 878 // CHECK2-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0 879 // CHECK2-NEXT: br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]] 880 // CHECK2: omp_offload.failed18: 881 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i64 [[TMP37]], [100 x i32]* @a) #[[ATTR2]] 882 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT19]] 883 // CHECK2: omp_offload.cont19: 884 // CHECK2-NEXT: [[TMP56:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 885 // CHECK2-NEXT: ret i32 [[TMP56]] 886 // 887 // 888 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28 889 // CHECK2-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 890 // CHECK2-NEXT: entry: 891 // CHECK2-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 892 // CHECK2-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 893 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 894 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 895 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 896 // CHECK2-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 897 // CHECK2-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 898 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 899 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 900 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 901 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 902 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32* 903 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 904 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 905 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8 906 // CHECK2-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 907 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]]) 908 // CHECK2-NEXT: ret void 909 // 910 // 911 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 912 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 913 // CHECK2-NEXT: entry: 914 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 915 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 916 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 917 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 918 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 919 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 920 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 921 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 922 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 923 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 924 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 925 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 926 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 927 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 928 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 929 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 930 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 931 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 932 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 933 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 934 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 935 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 936 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 937 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 938 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 939 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 940 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 941 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 942 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 943 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 944 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 945 // CHECK2: omp.precond.then: 946 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 947 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 948 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 949 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 950 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 951 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 952 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 953 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 954 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 955 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 956 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 957 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 958 // CHECK2: cond.true: 959 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 960 // CHECK2-NEXT: br label [[COND_END:%.*]] 961 // CHECK2: cond.false: 962 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 963 // CHECK2-NEXT: br label [[COND_END]] 964 // CHECK2: cond.end: 965 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 966 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 967 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 968 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 969 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 970 // CHECK2: omp.inner.for.cond: 971 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 972 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 973 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 974 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 975 // CHECK2: omp.inner.for.body: 976 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 977 // CHECK2-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 978 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 979 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 980 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i32* [[TMP0]], [100 x i32]* [[TMP1]]) 981 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 982 // CHECK2: omp.inner.for.inc: 983 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 984 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 985 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 986 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 987 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 988 // CHECK2: omp.inner.for.end: 989 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 990 // CHECK2: omp.loop.exit: 991 // CHECK2-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 992 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 993 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 994 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 995 // CHECK2: omp.precond.end: 996 // CHECK2-NEXT: ret void 997 // 998 // 999 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 1000 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1001 // CHECK2-NEXT: entry: 1002 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1003 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1004 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1005 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1006 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1007 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 1008 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1009 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1010 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1011 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1012 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1013 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1014 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1015 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1016 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1017 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 1018 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1019 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1020 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1021 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1022 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1023 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 1024 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1025 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 1026 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1027 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1028 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1029 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1030 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1031 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1032 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1033 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 1034 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1035 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1036 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1037 // CHECK2: omp.precond.then: 1038 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1039 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1040 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1041 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1042 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 1043 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1044 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 1045 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1046 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 1047 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1048 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1049 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1050 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1051 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1052 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1053 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1054 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1055 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1056 // CHECK2: cond.true: 1057 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1058 // CHECK2-NEXT: br label [[COND_END:%.*]] 1059 // CHECK2: cond.false: 1060 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1061 // CHECK2-NEXT: br label [[COND_END]] 1062 // CHECK2: cond.end: 1063 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1064 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1065 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1066 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1067 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1068 // CHECK2: omp.inner.for.cond: 1069 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1070 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1071 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1072 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1073 // CHECK2: omp.inner.for.body: 1074 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1075 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 1076 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1077 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 1078 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4 1079 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 1080 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 1081 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1082 // CHECK2-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1083 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1084 // CHECK2-NEXT: [[TMP21:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP20]], i32 2) 1085 // CHECK2-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1086 // CHECK2-NEXT: br i1 [[TMP22]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 1087 // CHECK2: .cancel.exit: 1088 // CHECK2-NEXT: br label [[CANCEL_EXIT:%.*]] 1089 // CHECK2: .cancel.continue: 1090 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1091 // CHECK2: omp.body.continue: 1092 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1093 // CHECK2: omp.inner.for.inc: 1094 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1095 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], 1 1096 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 1097 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1098 // CHECK2: omp.inner.for.end: 1099 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1100 // CHECK2: omp.loop.exit: 1101 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1102 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1103 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1104 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1105 // CHECK2: cancel.exit: 1106 // CHECK2-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1107 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 1108 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 1109 // CHECK2-NEXT: br label [[CANCEL_CONT:%.*]] 1110 // CHECK2: omp.precond.end: 1111 // CHECK2-NEXT: br label [[CANCEL_CONT]] 1112 // CHECK2: cancel.cont: 1113 // CHECK2-NEXT: ret void 1114 // 1115 // 1116 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 1117 // CHECK2-SAME: (i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1118 // CHECK2-NEXT: entry: 1119 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1120 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 1121 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1122 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 1123 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1124 // CHECK2-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 1125 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [100 x i32]* [[TMP0]]) 1126 // CHECK2-NEXT: ret void 1127 // 1128 // 1129 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1130 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1131 // CHECK2-NEXT: entry: 1132 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1133 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1134 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1135 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 1136 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1137 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1138 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1139 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1140 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1141 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1142 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1143 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1144 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1145 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 1146 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1147 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1148 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1149 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 1150 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1151 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 1152 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1153 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1154 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1155 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1156 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1157 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1158 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1159 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 1160 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1161 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1162 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1163 // CHECK2: omp.precond.then: 1164 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1165 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1166 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 1167 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1168 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1169 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1170 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1171 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1172 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1173 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1174 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1175 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1176 // CHECK2: cond.true: 1177 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1178 // CHECK2-NEXT: br label [[COND_END:%.*]] 1179 // CHECK2: cond.false: 1180 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1181 // CHECK2-NEXT: br label [[COND_END]] 1182 // CHECK2: cond.end: 1183 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1184 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1185 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1186 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1187 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1188 // CHECK2: omp.inner.for.cond: 1189 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1190 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1191 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1192 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1193 // CHECK2: omp.inner.for.body: 1194 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1195 // CHECK2-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 1196 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1197 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 1198 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i32* [[TMP0]], [100 x i32]* [[TMP1]]) 1199 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1200 // CHECK2: omp.inner.for.inc: 1201 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1202 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1203 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 1204 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1205 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1206 // CHECK2: omp.inner.for.end: 1207 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1208 // CHECK2: omp.loop.exit: 1209 // CHECK2-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1210 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1211 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1212 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1213 // CHECK2: omp.precond.end: 1214 // CHECK2-NEXT: ret void 1215 // 1216 // 1217 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1218 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1219 // CHECK2-NEXT: entry: 1220 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1221 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1222 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1223 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1224 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1225 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 1226 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1227 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1228 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1229 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1230 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1231 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1232 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1233 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1234 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1235 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 1236 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1237 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1238 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1239 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1240 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1241 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 1242 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1243 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 1244 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1245 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1246 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1247 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1248 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1249 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1250 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1251 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 1252 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1253 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1254 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1255 // CHECK2: omp.precond.then: 1256 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1257 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1258 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1259 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1260 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 1261 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1262 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 1263 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1264 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 1265 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1266 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1267 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1268 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1269 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1270 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1271 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1272 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1273 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1274 // CHECK2: cond.true: 1275 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1276 // CHECK2-NEXT: br label [[COND_END:%.*]] 1277 // CHECK2: cond.false: 1278 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1279 // CHECK2-NEXT: br label [[COND_END]] 1280 // CHECK2: cond.end: 1281 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1282 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1283 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1284 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1285 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1286 // CHECK2: omp.inner.for.cond: 1287 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1288 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1289 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1290 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1291 // CHECK2: omp.inner.for.body: 1292 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1293 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 1294 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1295 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 1296 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4 1297 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 1298 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 1299 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1300 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1301 // CHECK2: omp.body.continue: 1302 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1303 // CHECK2: omp.inner.for.inc: 1304 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1305 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 1306 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 1307 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1308 // CHECK2: omp.inner.for.end: 1309 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1310 // CHECK2: omp.loop.exit: 1311 // CHECK2-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1312 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1313 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1314 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1315 // CHECK2: omp.precond.end: 1316 // CHECK2-NEXT: ret void 1317 // 1318 // 1319 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1320 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 1321 // CHECK2-NEXT: entry: 1322 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 1323 // CHECK2-NEXT: ret void 1324 // 1325 // 1326 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1327 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1328 // CHECK3-NEXT: entry: 1329 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1330 // CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4 1331 // CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4 1332 // CHECK3-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 1333 // CHECK3-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 1334 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1335 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 1336 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 1337 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 1338 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1339 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1340 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1341 // CHECK3-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4 1342 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4 1343 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4 1344 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4 1345 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 1346 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 1347 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1348 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1349 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1350 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1351 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1352 // CHECK3-NEXT: store i32 128, i32* [[TH]], align 4 1353 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 1354 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4 1355 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4 1356 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 1357 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4 1358 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4 1359 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 1360 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4 1361 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4 1362 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1363 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 1364 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 1365 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1366 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 1367 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4 1368 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1369 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4 1370 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1371 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 1372 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4 1373 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1374 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 1375 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4 1376 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1377 // CHECK3-NEXT: store i8* null, i8** [[TMP16]], align 4 1378 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1379 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 1380 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4 1381 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1382 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 1383 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4 1384 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1385 // CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4 1386 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1387 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 1388 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4 1389 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1390 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 1391 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4 1392 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1393 // CHECK3-NEXT: store i8* null, i8** [[TMP26]], align 4 1394 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1395 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1396 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 1397 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4 1398 // CHECK3-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4 1399 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1400 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0 1401 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 1402 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 1403 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1404 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1405 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1 1406 // CHECK3-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64 1407 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP33]]) 1408 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 0) 1409 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1410 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1411 // CHECK3: omp_offload.failed: 1412 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 1413 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1414 // CHECK3: omp_offload.cont: 1415 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[N_ADDR]], align 4 1416 // CHECK3-NEXT: store i32 [[TMP36]], i32* [[N_CASTED4]], align 4 1417 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_CASTED4]], align 4 1418 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1419 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32* 1420 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[TMP39]], align 4 1421 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1422 // CHECK3-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i32* 1423 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[TMP41]], align 4 1424 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 1425 // CHECK3-NEXT: store i8* null, i8** [[TMP42]], align 4 1426 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1427 // CHECK3-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to [100 x i32]** 1428 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP44]], align 4 1429 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1430 // CHECK3-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to [100 x i32]** 1431 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP46]], align 4 1432 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 1433 // CHECK3-NEXT: store i8* null, i8** [[TMP47]], align 4 1434 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1435 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1436 // CHECK3-NEXT: [[TMP50:%.*]] = load i32, i32* [[N_ADDR]], align 4 1437 // CHECK3-NEXT: store i32 [[TMP50]], i32* [[DOTCAPTURE_EXPR_9]], align 4 1438 // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 1439 // CHECK3-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP51]], 0 1440 // CHECK3-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1441 // CHECK3-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1442 // CHECK3-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1443 // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1444 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP52]], 1 1445 // CHECK3-NEXT: [[TMP53:%.*]] = zext i32 [[ADD14]] to i64 1446 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP53]]) 1447 // CHECK3-NEXT: [[TMP54:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP48]], i8** [[TMP49]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1448 // CHECK3-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0 1449 // CHECK3-NEXT: br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 1450 // CHECK3: omp_offload.failed15: 1451 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i32 [[TMP37]], [100 x i32]* @a) #[[ATTR2]] 1452 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT16]] 1453 // CHECK3: omp_offload.cont16: 1454 // CHECK3-NEXT: [[TMP56:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 1455 // CHECK3-NEXT: ret i32 [[TMP56]] 1456 // 1457 // 1458 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28 1459 // CHECK3-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 1460 // CHECK3-NEXT: entry: 1461 // CHECK3-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 1462 // CHECK3-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 1463 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1464 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1465 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 1466 // CHECK3-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 1467 // CHECK3-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 1468 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1469 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1470 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1471 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 1472 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 1473 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1474 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]]) 1475 // CHECK3-NEXT: ret void 1476 // 1477 // 1478 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1479 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1480 // CHECK3-NEXT: entry: 1481 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1482 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1483 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1484 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1485 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1486 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1487 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1488 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1489 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1490 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1491 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1492 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1493 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1494 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1495 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1496 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1497 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1498 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1499 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1500 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1501 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1502 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1503 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1504 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1505 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1506 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1507 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1508 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1509 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1510 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1511 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1512 // CHECK3: omp.precond.then: 1513 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1514 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1515 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 1516 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1517 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1518 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1519 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1520 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1521 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1522 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1523 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1524 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1525 // CHECK3: cond.true: 1526 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1527 // CHECK3-NEXT: br label [[COND_END:%.*]] 1528 // CHECK3: cond.false: 1529 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1530 // CHECK3-NEXT: br label [[COND_END]] 1531 // CHECK3: cond.end: 1532 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1533 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1534 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1535 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1536 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1537 // CHECK3: omp.inner.for.cond: 1538 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1539 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1540 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1541 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1542 // CHECK3: omp.inner.for.body: 1543 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1544 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1545 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32* [[TMP0]], [100 x i32]* [[TMP1]]) 1546 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1547 // CHECK3: omp.inner.for.inc: 1548 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1549 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1550 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1551 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1552 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1553 // CHECK3: omp.inner.for.end: 1554 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1555 // CHECK3: omp.loop.exit: 1556 // CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1557 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1558 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1559 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1560 // CHECK3: omp.precond.end: 1561 // CHECK3-NEXT: ret void 1562 // 1563 // 1564 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1565 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1566 // CHECK3-NEXT: entry: 1567 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1568 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1569 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1570 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1571 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1572 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1573 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1574 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1575 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1576 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1577 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1578 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1579 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1580 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1581 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1582 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1583 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1584 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1585 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1586 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1587 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1588 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1589 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1590 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1591 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1592 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1593 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1594 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1595 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1596 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1597 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1598 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1599 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1600 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1601 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1602 // CHECK3: omp.precond.then: 1603 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1604 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1605 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1606 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1607 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1608 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4 1609 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1610 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1611 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1612 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1613 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1614 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1615 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1616 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1617 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1618 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1619 // CHECK3: cond.true: 1620 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1621 // CHECK3-NEXT: br label [[COND_END:%.*]] 1622 // CHECK3: cond.false: 1623 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1624 // CHECK3-NEXT: br label [[COND_END]] 1625 // CHECK3: cond.end: 1626 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1627 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1628 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1629 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1630 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1631 // CHECK3: omp.inner.for.cond: 1632 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1633 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1634 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1635 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1636 // CHECK3: omp.inner.for.body: 1637 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1638 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 1639 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1640 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1641 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4 1642 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP18]] 1643 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1644 // CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1645 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1646 // CHECK3-NEXT: [[TMP21:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP20]], i32 2) 1647 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1648 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 1649 // CHECK3: .cancel.exit: 1650 // CHECK3-NEXT: br label [[CANCEL_EXIT:%.*]] 1651 // CHECK3: .cancel.continue: 1652 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1653 // CHECK3: omp.body.continue: 1654 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1655 // CHECK3: omp.inner.for.inc: 1656 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1657 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], 1 1658 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1659 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1660 // CHECK3: omp.inner.for.end: 1661 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1662 // CHECK3: omp.loop.exit: 1663 // CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1664 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1665 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1666 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1667 // CHECK3: cancel.exit: 1668 // CHECK3-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1669 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 1670 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 1671 // CHECK3-NEXT: br label [[CANCEL_CONT:%.*]] 1672 // CHECK3: omp.precond.end: 1673 // CHECK3-NEXT: br label [[CANCEL_CONT]] 1674 // CHECK3: cancel.cont: 1675 // CHECK3-NEXT: ret void 1676 // 1677 // 1678 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 1679 // CHECK3-SAME: (i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1680 // CHECK3-NEXT: entry: 1681 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1682 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1683 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1684 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1685 // CHECK3-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1686 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP0]]) 1687 // CHECK3-NEXT: ret void 1688 // 1689 // 1690 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1691 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1692 // CHECK3-NEXT: entry: 1693 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1694 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1695 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1696 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1697 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1698 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1699 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1700 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1701 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1702 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1703 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1704 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1705 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1706 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1707 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1708 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1709 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1710 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1711 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1712 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1713 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1714 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1715 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1716 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1717 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1718 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1719 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1720 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1721 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1722 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1723 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1724 // CHECK3: omp.precond.then: 1725 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1726 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1727 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 1728 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1729 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1730 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1731 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1732 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1733 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1734 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1735 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1736 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1737 // CHECK3: cond.true: 1738 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1739 // CHECK3-NEXT: br label [[COND_END:%.*]] 1740 // CHECK3: cond.false: 1741 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1742 // CHECK3-NEXT: br label [[COND_END]] 1743 // CHECK3: cond.end: 1744 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1745 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1746 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1747 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1748 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1749 // CHECK3: omp.inner.for.cond: 1750 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1751 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1752 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1753 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1754 // CHECK3: omp.inner.for.body: 1755 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1756 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1757 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32* [[TMP0]], [100 x i32]* [[TMP1]]) 1758 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1759 // CHECK3: omp.inner.for.inc: 1760 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1761 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1762 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1763 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1764 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1765 // CHECK3: omp.inner.for.end: 1766 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1767 // CHECK3: omp.loop.exit: 1768 // CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1769 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1770 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1771 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1772 // CHECK3: omp.precond.end: 1773 // CHECK3-NEXT: ret void 1774 // 1775 // 1776 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 1777 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1778 // CHECK3-NEXT: entry: 1779 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1780 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1781 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1782 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1783 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1784 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1785 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1786 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1787 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1788 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1789 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1790 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1791 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1792 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1793 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1794 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1795 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1796 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1797 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1798 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1799 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1800 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1801 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1802 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1803 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1804 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1805 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1806 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1807 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1808 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1809 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1810 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1811 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1812 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1813 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1814 // CHECK3: omp.precond.then: 1815 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1816 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1817 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1818 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1819 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1820 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4 1821 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1822 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1823 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1824 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1825 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1826 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1827 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1828 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1829 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1830 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1831 // CHECK3: cond.true: 1832 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1833 // CHECK3-NEXT: br label [[COND_END:%.*]] 1834 // CHECK3: cond.false: 1835 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1836 // CHECK3-NEXT: br label [[COND_END]] 1837 // CHECK3: cond.end: 1838 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1839 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1840 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1841 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1842 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1843 // CHECK3: omp.inner.for.cond: 1844 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1845 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1846 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1847 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1848 // CHECK3: omp.inner.for.body: 1849 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1850 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 1851 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1852 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1853 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4 1854 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP18]] 1855 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1856 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1857 // CHECK3: omp.body.continue: 1858 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1859 // CHECK3: omp.inner.for.inc: 1860 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1861 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 1862 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1863 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1864 // CHECK3: omp.inner.for.end: 1865 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1866 // CHECK3: omp.loop.exit: 1867 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1868 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1869 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1870 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1871 // CHECK3: omp.precond.end: 1872 // CHECK3-NEXT: ret void 1873 // 1874 // 1875 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1876 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 1877 // CHECK3-NEXT: entry: 1878 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1879 // CHECK3-NEXT: ret void 1880 // 1881 // 1882 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1883 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1884 // CHECK4-NEXT: entry: 1885 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1886 // CHECK4-NEXT: [[TE:%.*]] = alloca i32, align 4 1887 // CHECK4-NEXT: [[TH:%.*]] = alloca i32, align 4 1888 // CHECK4-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 1889 // CHECK4-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 1890 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1891 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 1892 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 1893 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 1894 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1895 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1896 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1897 // CHECK4-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4 1898 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4 1899 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4 1900 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4 1901 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 1902 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 1903 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1904 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1905 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1906 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1907 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1908 // CHECK4-NEXT: store i32 128, i32* [[TH]], align 4 1909 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 1910 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4 1911 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4 1912 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 1913 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4 1914 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4 1915 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 1916 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4 1917 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4 1918 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1919 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 1920 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 1921 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1922 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 1923 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4 1924 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1925 // CHECK4-NEXT: store i8* null, i8** [[TMP11]], align 4 1926 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1927 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 1928 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4 1929 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1930 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 1931 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4 1932 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1933 // CHECK4-NEXT: store i8* null, i8** [[TMP16]], align 4 1934 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1935 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 1936 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4 1937 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1938 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 1939 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4 1940 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1941 // CHECK4-NEXT: store i8* null, i8** [[TMP21]], align 4 1942 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1943 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 1944 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4 1945 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1946 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 1947 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4 1948 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1949 // CHECK4-NEXT: store i8* null, i8** [[TMP26]], align 4 1950 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1951 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1952 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 1953 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4 1954 // CHECK4-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4 1955 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1956 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0 1957 // CHECK4-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 1958 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 1959 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1960 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1961 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1 1962 // CHECK4-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64 1963 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP33]]) 1964 // CHECK4-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 0) 1965 // CHECK4-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1966 // CHECK4-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1967 // CHECK4: omp_offload.failed: 1968 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 1969 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1970 // CHECK4: omp_offload.cont: 1971 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[N_ADDR]], align 4 1972 // CHECK4-NEXT: store i32 [[TMP36]], i32* [[N_CASTED4]], align 4 1973 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_CASTED4]], align 4 1974 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1975 // CHECK4-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32* 1976 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[TMP39]], align 4 1977 // CHECK4-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1978 // CHECK4-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i32* 1979 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[TMP41]], align 4 1980 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 1981 // CHECK4-NEXT: store i8* null, i8** [[TMP42]], align 4 1982 // CHECK4-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1983 // CHECK4-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to [100 x i32]** 1984 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP44]], align 4 1985 // CHECK4-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1986 // CHECK4-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to [100 x i32]** 1987 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP46]], align 4 1988 // CHECK4-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 1989 // CHECK4-NEXT: store i8* null, i8** [[TMP47]], align 4 1990 // CHECK4-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1991 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1992 // CHECK4-NEXT: [[TMP50:%.*]] = load i32, i32* [[N_ADDR]], align 4 1993 // CHECK4-NEXT: store i32 [[TMP50]], i32* [[DOTCAPTURE_EXPR_9]], align 4 1994 // CHECK4-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 1995 // CHECK4-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP51]], 0 1996 // CHECK4-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1997 // CHECK4-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1998 // CHECK4-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1999 // CHECK4-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 2000 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP52]], 1 2001 // CHECK4-NEXT: [[TMP53:%.*]] = zext i32 [[ADD14]] to i64 2002 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP53]]) 2003 // CHECK4-NEXT: [[TMP54:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP48]], i8** [[TMP49]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2004 // CHECK4-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0 2005 // CHECK4-NEXT: br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 2006 // CHECK4: omp_offload.failed15: 2007 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i32 [[TMP37]], [100 x i32]* @a) #[[ATTR2]] 2008 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT16]] 2009 // CHECK4: omp_offload.cont16: 2010 // CHECK4-NEXT: [[TMP56:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 2011 // CHECK4-NEXT: ret i32 [[TMP56]] 2012 // 2013 // 2014 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28 2015 // CHECK4-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 2016 // CHECK4-NEXT: entry: 2017 // CHECK4-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 2018 // CHECK4-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 2019 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2020 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 2021 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 2022 // CHECK4-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 2023 // CHECK4-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 2024 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2025 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 2026 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 2027 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 2028 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 2029 // CHECK4-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 2030 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]]) 2031 // CHECK4-NEXT: ret void 2032 // 2033 // 2034 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 2035 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 2036 // CHECK4-NEXT: entry: 2037 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2038 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2039 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2040 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 2041 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2042 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2043 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2044 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2045 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2046 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2047 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2048 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2049 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2050 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 2051 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2052 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2053 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2054 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 2055 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2056 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 2057 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 2058 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2059 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2060 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2061 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2062 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2063 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2064 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 2065 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2066 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2067 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2068 // CHECK4: omp.precond.then: 2069 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2070 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2071 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 2072 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2073 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2074 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2075 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2076 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2077 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2078 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2079 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2080 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2081 // CHECK4: cond.true: 2082 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2083 // CHECK4-NEXT: br label [[COND_END:%.*]] 2084 // CHECK4: cond.false: 2085 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2086 // CHECK4-NEXT: br label [[COND_END]] 2087 // CHECK4: cond.end: 2088 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2089 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2090 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2091 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2092 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2093 // CHECK4: omp.inner.for.cond: 2094 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2095 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2096 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2097 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2098 // CHECK4: omp.inner.for.body: 2099 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2100 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2101 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32* [[TMP0]], [100 x i32]* [[TMP1]]) 2102 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2103 // CHECK4: omp.inner.for.inc: 2104 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2105 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2106 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 2107 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2108 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2109 // CHECK4: omp.inner.for.end: 2110 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2111 // CHECK4: omp.loop.exit: 2112 // CHECK4-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2113 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2114 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2115 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 2116 // CHECK4: omp.precond.end: 2117 // CHECK4-NEXT: ret void 2118 // 2119 // 2120 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 2121 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 2122 // CHECK4-NEXT: entry: 2123 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2124 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2125 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2126 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2127 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2128 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 2129 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2130 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2131 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2132 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2133 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2134 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2135 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2136 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2137 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2138 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 2139 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2140 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2141 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2142 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2143 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2144 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 2145 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2146 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 2147 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 2148 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2149 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2150 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2151 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2152 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2153 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2154 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 2155 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2156 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2157 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2158 // CHECK4: omp.precond.then: 2159 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2160 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2161 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2162 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2163 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2164 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4 2165 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 2166 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2167 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2168 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2169 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2170 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2171 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2172 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2173 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2174 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2175 // CHECK4: cond.true: 2176 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2177 // CHECK4-NEXT: br label [[COND_END:%.*]] 2178 // CHECK4: cond.false: 2179 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2180 // CHECK4-NEXT: br label [[COND_END]] 2181 // CHECK4: cond.end: 2182 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2183 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2184 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2185 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2186 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2187 // CHECK4: omp.inner.for.cond: 2188 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2189 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2190 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2191 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2192 // CHECK4: omp.inner.for.body: 2193 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2194 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 2195 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2196 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2197 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4 2198 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP18]] 2199 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2200 // CHECK4-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2201 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2202 // CHECK4-NEXT: [[TMP21:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP20]], i32 2) 2203 // CHECK4-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2204 // CHECK4-NEXT: br i1 [[TMP22]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 2205 // CHECK4: .cancel.exit: 2206 // CHECK4-NEXT: br label [[CANCEL_EXIT:%.*]] 2207 // CHECK4: .cancel.continue: 2208 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2209 // CHECK4: omp.body.continue: 2210 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2211 // CHECK4: omp.inner.for.inc: 2212 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2213 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], 1 2214 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2215 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2216 // CHECK4: omp.inner.for.end: 2217 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2218 // CHECK4: omp.loop.exit: 2219 // CHECK4-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2220 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2221 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 2222 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 2223 // CHECK4: cancel.exit: 2224 // CHECK4-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2225 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 2226 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 2227 // CHECK4-NEXT: br label [[CANCEL_CONT:%.*]] 2228 // CHECK4: omp.precond.end: 2229 // CHECK4-NEXT: br label [[CANCEL_CONT]] 2230 // CHECK4: cancel.cont: 2231 // CHECK4-NEXT: ret void 2232 // 2233 // 2234 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 2235 // CHECK4-SAME: (i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 2236 // CHECK4-NEXT: entry: 2237 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2238 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 2239 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2240 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 2241 // CHECK4-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 2242 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP0]]) 2243 // CHECK4-NEXT: ret void 2244 // 2245 // 2246 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 2247 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 2248 // CHECK4-NEXT: entry: 2249 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2250 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2251 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2252 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 2253 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2254 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2255 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2256 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2257 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2258 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2259 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2260 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2261 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2262 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 2263 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2264 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2265 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2266 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 2267 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2268 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 2269 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 2270 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2271 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2272 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2273 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2274 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2275 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2276 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 2277 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2278 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2279 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2280 // CHECK4: omp.precond.then: 2281 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2282 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2283 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4 2284 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2285 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2286 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2287 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2288 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2289 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2290 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2291 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2292 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2293 // CHECK4: cond.true: 2294 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2295 // CHECK4-NEXT: br label [[COND_END:%.*]] 2296 // CHECK4: cond.false: 2297 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2298 // CHECK4-NEXT: br label [[COND_END]] 2299 // CHECK4: cond.end: 2300 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2301 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2302 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2303 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2304 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2305 // CHECK4: omp.inner.for.cond: 2306 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2307 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2308 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2309 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2310 // CHECK4: omp.inner.for.body: 2311 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2312 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2313 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32* [[TMP0]], [100 x i32]* [[TMP1]]) 2314 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2315 // CHECK4: omp.inner.for.inc: 2316 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2317 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2318 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 2319 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2320 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2321 // CHECK4: omp.inner.for.end: 2322 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2323 // CHECK4: omp.loop.exit: 2324 // CHECK4-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2325 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2326 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2327 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 2328 // CHECK4: omp.precond.end: 2329 // CHECK4-NEXT: ret void 2330 // 2331 // 2332 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 2333 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 2334 // CHECK4-NEXT: entry: 2335 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2336 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2337 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2338 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2339 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2340 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 2341 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2342 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2343 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2344 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2345 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2346 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2347 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2348 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2349 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2350 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 2351 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2352 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2353 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2354 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2355 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2356 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 2357 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2358 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 2359 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 2360 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2361 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2362 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2363 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2364 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2365 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2366 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 2367 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2368 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2369 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2370 // CHECK4: omp.precond.then: 2371 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2372 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2373 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2374 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2375 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2376 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4 2377 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 2378 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2379 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2380 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2381 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2382 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2383 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2384 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2385 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2386 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2387 // CHECK4: cond.true: 2388 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2389 // CHECK4-NEXT: br label [[COND_END:%.*]] 2390 // CHECK4: cond.false: 2391 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2392 // CHECK4-NEXT: br label [[COND_END]] 2393 // CHECK4: cond.end: 2394 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2395 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2396 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2397 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2398 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2399 // CHECK4: omp.inner.for.cond: 2400 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2401 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2402 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2403 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2404 // CHECK4: omp.inner.for.body: 2405 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2406 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 2407 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2408 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2409 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4 2410 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP18]] 2411 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2412 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2413 // CHECK4: omp.body.continue: 2414 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2415 // CHECK4: omp.inner.for.inc: 2416 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2417 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 2418 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2419 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2420 // CHECK4: omp.inner.for.end: 2421 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2422 // CHECK4: omp.loop.exit: 2423 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2424 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 2425 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 2426 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 2427 // CHECK4: omp.precond.end: 2428 // CHECK4-NEXT: ret void 2429 // 2430 // 2431 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2432 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 2433 // CHECK4-NEXT: entry: 2434 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 2435 // CHECK4-NEXT: ret void 2436 // 2437 // 2438 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 2439 // CHECK5-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 2440 // CHECK5-NEXT: entry: 2441 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2442 // CHECK5-NEXT: [[TE:%.*]] = alloca i32, align 4 2443 // CHECK5-NEXT: [[TH:%.*]] = alloca i32, align 4 2444 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2445 // CHECK5-NEXT: [[I1:%.*]] = alloca i32, align 4 2446 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2447 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 2448 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 2449 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 2450 // CHECK5-NEXT: store i32 128, i32* [[TH]], align 4 2451 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 2452 // CHECK5-NEXT: br label [[FOR_COND:%.*]] 2453 // CHECK5: for.cond: 2454 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2455 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2456 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]] 2457 // CHECK5-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2458 // CHECK5: for.body: 2459 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2460 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 2461 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM]] 2462 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2463 // CHECK5-NEXT: br label [[FOR_INC:%.*]] 2464 // CHECK5: for.inc: 2465 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 2466 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 2467 // CHECK5-NEXT: store i32 [[INC]], i32* [[I]], align 4 2468 // CHECK5-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2469 // CHECK5: for.end: 2470 // CHECK5-NEXT: store i32 0, i32* [[I1]], align 4 2471 // CHECK5-NEXT: br label [[FOR_COND2:%.*]] 2472 // CHECK5: for.cond2: 2473 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[I1]], align 4 2474 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 2475 // CHECK5-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP5]], [[TMP6]] 2476 // CHECK5-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]] 2477 // CHECK5: for.body4: 2478 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[I1]], align 4 2479 // CHECK5-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP7]] to i64 2480 // CHECK5-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM5]] 2481 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX6]], align 4 2482 // CHECK5-NEXT: br label [[FOR_INC7:%.*]] 2483 // CHECK5: for.inc7: 2484 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[I1]], align 4 2485 // CHECK5-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP8]], 1 2486 // CHECK5-NEXT: store i32 [[INC8]], i32* [[I1]], align 4 2487 // CHECK5-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]] 2488 // CHECK5: for.end9: 2489 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 2490 // CHECK5-NEXT: ret i32 [[TMP9]] 2491 // 2492 // 2493 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 2494 // CHECK6-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 2495 // CHECK6-NEXT: entry: 2496 // CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2497 // CHECK6-NEXT: [[TE:%.*]] = alloca i32, align 4 2498 // CHECK6-NEXT: [[TH:%.*]] = alloca i32, align 4 2499 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 2500 // CHECK6-NEXT: [[I1:%.*]] = alloca i32, align 4 2501 // CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2502 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 2503 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 2504 // CHECK6-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 2505 // CHECK6-NEXT: store i32 128, i32* [[TH]], align 4 2506 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 2507 // CHECK6-NEXT: br label [[FOR_COND:%.*]] 2508 // CHECK6: for.cond: 2509 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2510 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2511 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]] 2512 // CHECK6-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2513 // CHECK6: for.body: 2514 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2515 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 2516 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM]] 2517 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2518 // CHECK6-NEXT: br label [[FOR_INC:%.*]] 2519 // CHECK6: for.inc: 2520 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 2521 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 2522 // CHECK6-NEXT: store i32 [[INC]], i32* [[I]], align 4 2523 // CHECK6-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2524 // CHECK6: for.end: 2525 // CHECK6-NEXT: store i32 0, i32* [[I1]], align 4 2526 // CHECK6-NEXT: br label [[FOR_COND2:%.*]] 2527 // CHECK6: for.cond2: 2528 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[I1]], align 4 2529 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 2530 // CHECK6-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP5]], [[TMP6]] 2531 // CHECK6-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]] 2532 // CHECK6: for.body4: 2533 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[I1]], align 4 2534 // CHECK6-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP7]] to i64 2535 // CHECK6-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM5]] 2536 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX6]], align 4 2537 // CHECK6-NEXT: br label [[FOR_INC7:%.*]] 2538 // CHECK6: for.inc7: 2539 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[I1]], align 4 2540 // CHECK6-NEXT: [[INC8:%.*]] = add nsw i32 [[TMP8]], 1 2541 // CHECK6-NEXT: store i32 [[INC8]], i32* [[I1]], align 4 2542 // CHECK6-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]] 2543 // CHECK6: for.end9: 2544 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 2545 // CHECK6-NEXT: ret i32 [[TMP9]] 2546 // 2547 // 2548 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 2549 // CHECK7-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 2550 // CHECK7-NEXT: entry: 2551 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2552 // CHECK7-NEXT: [[TE:%.*]] = alloca i32, align 4 2553 // CHECK7-NEXT: [[TH:%.*]] = alloca i32, align 4 2554 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 2555 // CHECK7-NEXT: [[I1:%.*]] = alloca i32, align 4 2556 // CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2557 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 2558 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 2559 // CHECK7-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 2560 // CHECK7-NEXT: store i32 128, i32* [[TH]], align 4 2561 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 2562 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 2563 // CHECK7: for.cond: 2564 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2565 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2566 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]] 2567 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2568 // CHECK7: for.body: 2569 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2570 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP3]] 2571 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2572 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 2573 // CHECK7: for.inc: 2574 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 2575 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 2576 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 2577 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2578 // CHECK7: for.end: 2579 // CHECK7-NEXT: store i32 0, i32* [[I1]], align 4 2580 // CHECK7-NEXT: br label [[FOR_COND2:%.*]] 2581 // CHECK7: for.cond2: 2582 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[I1]], align 4 2583 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 2584 // CHECK7-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP5]], [[TMP6]] 2585 // CHECK7-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 2586 // CHECK7: for.body4: 2587 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[I1]], align 4 2588 // CHECK7-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP7]] 2589 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX5]], align 4 2590 // CHECK7-NEXT: br label [[FOR_INC6:%.*]] 2591 // CHECK7: for.inc6: 2592 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[I1]], align 4 2593 // CHECK7-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP8]], 1 2594 // CHECK7-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 2595 // CHECK7-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP5:![0-9]+]] 2596 // CHECK7: for.end8: 2597 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 2598 // CHECK7-NEXT: ret i32 [[TMP9]] 2599 // 2600 // 2601 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 2602 // CHECK8-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 2603 // CHECK8-NEXT: entry: 2604 // CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2605 // CHECK8-NEXT: [[TE:%.*]] = alloca i32, align 4 2606 // CHECK8-NEXT: [[TH:%.*]] = alloca i32, align 4 2607 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 2608 // CHECK8-NEXT: [[I1:%.*]] = alloca i32, align 4 2609 // CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2610 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 2611 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 2612 // CHECK8-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 2613 // CHECK8-NEXT: store i32 128, i32* [[TH]], align 4 2614 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 2615 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 2616 // CHECK8: for.cond: 2617 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2618 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2619 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]] 2620 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2621 // CHECK8: for.body: 2622 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2623 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP3]] 2624 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2625 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 2626 // CHECK8: for.inc: 2627 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 2628 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 2629 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 2630 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2631 // CHECK8: for.end: 2632 // CHECK8-NEXT: store i32 0, i32* [[I1]], align 4 2633 // CHECK8-NEXT: br label [[FOR_COND2:%.*]] 2634 // CHECK8: for.cond2: 2635 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[I1]], align 4 2636 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 2637 // CHECK8-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP5]], [[TMP6]] 2638 // CHECK8-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]] 2639 // CHECK8: for.body4: 2640 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[I1]], align 4 2641 // CHECK8-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP7]] 2642 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX5]], align 4 2643 // CHECK8-NEXT: br label [[FOR_INC6:%.*]] 2644 // CHECK8: for.inc6: 2645 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[I1]], align 4 2646 // CHECK8-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP8]], 1 2647 // CHECK8-NEXT: store i32 [[INC7]], i32* [[I1]], align 4 2648 // CHECK8-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP5:![0-9]+]] 2649 // CHECK8: for.end8: 2650 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 2651 // CHECK8-NEXT: ret i32 [[TMP9]] 2652 // 2653 // 2654 // CHECK9-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2655 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 2656 // CHECK9-NEXT: entry: 2657 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 2658 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2659 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2660 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2661 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 2662 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 2663 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 2664 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 2665 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2666 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2667 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2668 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 2669 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2670 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2671 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2672 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2673 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2674 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2675 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2676 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2677 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 2678 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 2679 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 2680 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2681 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 2682 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 2683 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2684 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 2685 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 2686 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2687 // CHECK9-NEXT: store i64 4, i64* [[TMP10]], align 8 2688 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2689 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 2690 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2691 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 2692 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 2693 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2694 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 2695 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 2696 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 2697 // CHECK9-NEXT: store i64 8, i64* [[TMP16]], align 8 2698 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2699 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8 2700 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2701 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 2702 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 2703 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2704 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 2705 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 2706 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2707 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 2708 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2709 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8 2710 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2711 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2712 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2713 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 2714 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 2715 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2716 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 2717 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2718 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2719 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2720 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2721 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 2722 // CHECK9-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 2723 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 2724 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2725 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 2726 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2727 // CHECK9: omp_offload.failed: 2728 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2729 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2730 // CHECK9: omp_offload.cont: 2731 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 2732 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2733 // CHECK9-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2734 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 2735 // CHECK9-NEXT: ret i32 [[TMP33]] 2736 // 2737 // 2738 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 2739 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2740 // CHECK9-NEXT: entry: 2741 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2742 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2743 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2744 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2745 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2746 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2747 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2748 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2749 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2750 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 2751 // CHECK9-NEXT: ret void 2752 // 2753 // 2754 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 2755 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2756 // CHECK9-NEXT: entry: 2757 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2758 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2759 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2760 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2761 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2762 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2763 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2764 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2765 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2766 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2767 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2768 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2769 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2770 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2771 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 2772 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2773 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2774 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2775 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2776 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2777 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2778 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2779 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2780 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2781 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2782 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2783 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2784 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2785 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2786 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2787 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 2788 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2789 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2790 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2791 // CHECK9: omp.precond.then: 2792 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2793 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2794 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 2795 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2796 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2797 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2798 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2799 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2800 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2801 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2802 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2803 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2804 // CHECK9: cond.true: 2805 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2806 // CHECK9-NEXT: br label [[COND_END:%.*]] 2807 // CHECK9: cond.false: 2808 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2809 // CHECK9-NEXT: br label [[COND_END]] 2810 // CHECK9: cond.end: 2811 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2812 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2813 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2814 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2815 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2816 // CHECK9: omp.inner.for.cond: 2817 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2818 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2819 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2820 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2821 // CHECK9: omp.inner.for.body: 2822 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2823 // CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 2824 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2825 // CHECK9-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 2826 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 2827 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2828 // CHECK9: omp.inner.for.inc: 2829 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2830 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2831 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 2832 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2833 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2834 // CHECK9: omp.inner.for.end: 2835 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2836 // CHECK9: omp.loop.exit: 2837 // CHECK9-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2838 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 2839 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 2840 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2841 // CHECK9: omp.precond.end: 2842 // CHECK9-NEXT: ret void 2843 // 2844 // 2845 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 2846 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2847 // CHECK9-NEXT: entry: 2848 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2849 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2850 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2851 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2852 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2853 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2854 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2855 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2856 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2857 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2858 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2859 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2860 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2861 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2862 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2863 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2864 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 2865 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2866 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2867 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2868 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2869 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2870 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2871 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2872 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2873 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2874 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2875 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2876 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2877 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2878 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2879 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2880 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2881 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2882 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 2883 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2884 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2885 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2886 // CHECK9: omp.precond.then: 2887 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2888 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2889 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2890 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2891 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 2892 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2893 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 2894 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2895 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 2896 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2897 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2898 // CHECK9-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2899 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 2900 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2901 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2902 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2903 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 2904 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2905 // CHECK9: cond.true: 2906 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2907 // CHECK9-NEXT: br label [[COND_END:%.*]] 2908 // CHECK9: cond.false: 2909 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2910 // CHECK9-NEXT: br label [[COND_END]] 2911 // CHECK9: cond.end: 2912 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 2913 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2914 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2915 // CHECK9-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 2916 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2917 // CHECK9: omp.inner.for.cond: 2918 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2919 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2920 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2921 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2922 // CHECK9: omp.inner.for.body: 2923 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2924 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2925 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2926 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 2927 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 2928 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2929 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 2930 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2931 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2932 // CHECK9: omp.body.continue: 2933 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2934 // CHECK9: omp.inner.for.inc: 2935 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2936 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 2937 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2938 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2939 // CHECK9: omp.inner.for.end: 2940 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2941 // CHECK9: omp.loop.exit: 2942 // CHECK9-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2943 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2944 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2945 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2946 // CHECK9: omp.precond.end: 2947 // CHECK9-NEXT: ret void 2948 // 2949 // 2950 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2951 // CHECK9-SAME: () #[[ATTR4:[0-9]+]] { 2952 // CHECK9-NEXT: entry: 2953 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2954 // CHECK9-NEXT: ret void 2955 // 2956 // 2957 // CHECK10-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2958 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 2959 // CHECK10-NEXT: entry: 2960 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4 2961 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2962 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2963 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2964 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 2965 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 2966 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 2967 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 2968 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2969 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2970 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2971 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4 2972 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2973 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2974 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2975 // CHECK10-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2976 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2977 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2978 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2979 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2980 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 2981 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 2982 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 2983 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2984 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 2985 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 2986 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2987 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 2988 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 2989 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2990 // CHECK10-NEXT: store i64 4, i64* [[TMP10]], align 8 2991 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2992 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 2993 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2994 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 2995 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 2996 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2997 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 2998 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 2999 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3000 // CHECK10-NEXT: store i64 8, i64* [[TMP16]], align 8 3001 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3002 // CHECK10-NEXT: store i8* null, i8** [[TMP17]], align 8 3003 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3004 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 3005 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 3006 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3007 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 3008 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 3009 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3010 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 3011 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3012 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8 3013 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3014 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3015 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3016 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 3017 // CHECK10-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 3018 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3019 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 3020 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3021 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3022 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3023 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3024 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 3025 // CHECK10-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 3026 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 3027 // CHECK10-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3028 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 3029 // CHECK10-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3030 // CHECK10: omp_offload.failed: 3031 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3032 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 3033 // CHECK10: omp_offload.cont: 3034 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 3035 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3036 // CHECK10-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3037 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 3038 // CHECK10-NEXT: ret i32 [[TMP33]] 3039 // 3040 // 3041 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 3042 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3043 // CHECK10-NEXT: entry: 3044 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3045 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3046 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3047 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3048 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3049 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3050 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3051 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3052 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3053 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 3054 // CHECK10-NEXT: ret void 3055 // 3056 // 3057 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 3058 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3059 // CHECK10-NEXT: entry: 3060 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3061 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3062 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3063 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3064 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3065 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3066 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3067 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3068 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3069 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3070 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3071 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3072 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3073 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3074 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 3075 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3076 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3077 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3078 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3079 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3080 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3081 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3082 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3083 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3084 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3085 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3086 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3087 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3088 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3089 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3090 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 3091 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3092 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3093 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3094 // CHECK10: omp.precond.then: 3095 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3096 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3097 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 3098 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3099 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3100 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3101 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3102 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3103 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3104 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3105 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3106 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3107 // CHECK10: cond.true: 3108 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3109 // CHECK10-NEXT: br label [[COND_END:%.*]] 3110 // CHECK10: cond.false: 3111 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3112 // CHECK10-NEXT: br label [[COND_END]] 3113 // CHECK10: cond.end: 3114 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3115 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3116 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3117 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3118 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3119 // CHECK10: omp.inner.for.cond: 3120 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3121 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3122 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3123 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3124 // CHECK10: omp.inner.for.body: 3125 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3126 // CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 3127 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3128 // CHECK10-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 3129 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 3130 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3131 // CHECK10: omp.inner.for.inc: 3132 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3133 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3134 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 3135 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3136 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3137 // CHECK10: omp.inner.for.end: 3138 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3139 // CHECK10: omp.loop.exit: 3140 // CHECK10-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3141 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 3142 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 3143 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 3144 // CHECK10: omp.precond.end: 3145 // CHECK10-NEXT: ret void 3146 // 3147 // 3148 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 3149 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3150 // CHECK10-NEXT: entry: 3151 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3152 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3153 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3154 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3155 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3156 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3157 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3158 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3159 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3160 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3161 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3162 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3163 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3164 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3165 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3166 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3167 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 3168 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3169 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3170 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3171 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3172 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3173 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3174 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3175 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3176 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3177 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3178 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3179 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3180 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3181 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3182 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3183 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3184 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3185 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 3186 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3187 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3188 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3189 // CHECK10: omp.precond.then: 3190 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3191 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3192 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3193 // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3194 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 3195 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3196 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 3197 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3198 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 3199 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3200 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3201 // CHECK10-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3202 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3203 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3204 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3205 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3206 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 3207 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3208 // CHECK10: cond.true: 3209 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3210 // CHECK10-NEXT: br label [[COND_END:%.*]] 3211 // CHECK10: cond.false: 3212 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3213 // CHECK10-NEXT: br label [[COND_END]] 3214 // CHECK10: cond.end: 3215 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 3216 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3217 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3218 // CHECK10-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3219 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3220 // CHECK10: omp.inner.for.cond: 3221 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3222 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3223 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 3224 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3225 // CHECK10: omp.inner.for.body: 3226 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3227 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3228 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3229 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 3230 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 3231 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 3232 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 3233 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3234 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3235 // CHECK10: omp.body.continue: 3236 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3237 // CHECK10: omp.inner.for.inc: 3238 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3239 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 3240 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 3241 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3242 // CHECK10: omp.inner.for.end: 3243 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3244 // CHECK10: omp.loop.exit: 3245 // CHECK10-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3246 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 3247 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 3248 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 3249 // CHECK10: omp.precond.end: 3250 // CHECK10-NEXT: ret void 3251 // 3252 // 3253 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3254 // CHECK10-SAME: () #[[ATTR4:[0-9]+]] { 3255 // CHECK10-NEXT: entry: 3256 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 3257 // CHECK10-NEXT: ret void 3258 // 3259 // 3260 // CHECK11-LABEL: define {{[^@]+}}@_Z15teams_local_argv 3261 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 3262 // CHECK11-NEXT: entry: 3263 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 3264 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3265 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3266 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3267 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 3268 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 3269 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 3270 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 3271 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3272 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3273 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3274 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 3275 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3276 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3277 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3278 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3279 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3280 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 3281 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 3282 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 3283 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 3284 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 3285 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3286 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 3287 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 3288 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3289 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 3290 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 3291 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3292 // CHECK11-NEXT: store i64 4, i64* [[TMP10]], align 4 3293 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3294 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 3295 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3296 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 3297 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 3298 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3299 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 3300 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 3301 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3302 // CHECK11-NEXT: store i64 4, i64* [[TMP16]], align 4 3303 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3304 // CHECK11-NEXT: store i8* null, i8** [[TMP17]], align 4 3305 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3306 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 3307 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 3308 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3309 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 3310 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 3311 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3312 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 3313 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3314 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4 3315 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3316 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3317 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3318 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 3319 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 3320 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3321 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 3322 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3323 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3324 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3325 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3326 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 3327 // CHECK11-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 3328 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 3329 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3330 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 3331 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3332 // CHECK11: omp_offload.failed: 3333 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3334 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 3335 // CHECK11: omp_offload.cont: 3336 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 3337 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3338 // CHECK11-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3339 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 3340 // CHECK11-NEXT: ret i32 [[TMP33]] 3341 // 3342 // 3343 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 3344 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3345 // CHECK11-NEXT: entry: 3346 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3347 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3348 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3349 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3350 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3351 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3352 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3353 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3354 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 3355 // CHECK11-NEXT: ret void 3356 // 3357 // 3358 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 3359 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3360 // CHECK11-NEXT: entry: 3361 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3362 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3363 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3364 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3365 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3366 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3367 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3368 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3369 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3370 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3371 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3372 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3373 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3374 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3375 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 3376 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3377 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3378 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3379 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3380 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3381 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3382 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3383 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3384 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3385 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3386 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3387 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3388 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3389 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3390 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3391 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 3392 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3393 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3394 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3395 // CHECK11: omp.precond.then: 3396 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3397 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3398 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 3399 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3400 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3401 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3402 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3403 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3404 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3405 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3406 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3407 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3408 // CHECK11: cond.true: 3409 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3410 // CHECK11-NEXT: br label [[COND_END:%.*]] 3411 // CHECK11: cond.false: 3412 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3413 // CHECK11-NEXT: br label [[COND_END]] 3414 // CHECK11: cond.end: 3415 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3416 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3417 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3418 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3419 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3420 // CHECK11: omp.inner.for.cond: 3421 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3422 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3423 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3424 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3425 // CHECK11: omp.inner.for.body: 3426 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3427 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3428 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 3429 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3430 // CHECK11: omp.inner.for.inc: 3431 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3432 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3433 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 3434 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3435 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3436 // CHECK11: omp.inner.for.end: 3437 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3438 // CHECK11: omp.loop.exit: 3439 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3440 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 3441 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 3442 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3443 // CHECK11: omp.precond.end: 3444 // CHECK11-NEXT: ret void 3445 // 3446 // 3447 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 3448 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3449 // CHECK11-NEXT: entry: 3450 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3451 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3452 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3453 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3454 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3455 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3456 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3457 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3458 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3459 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3460 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3461 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3462 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3463 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3464 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3465 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3466 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 3467 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3468 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3469 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3470 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3471 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3472 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3473 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3474 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3475 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3476 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3477 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3478 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3479 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3480 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3481 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3482 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3483 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3484 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 3485 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3486 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3487 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3488 // CHECK11: omp.precond.then: 3489 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3490 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3491 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3492 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3493 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3494 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 3495 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3496 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3497 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3498 // CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3499 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3500 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3501 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3502 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3503 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 3504 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3505 // CHECK11: cond.true: 3506 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3507 // CHECK11-NEXT: br label [[COND_END:%.*]] 3508 // CHECK11: cond.false: 3509 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3510 // CHECK11-NEXT: br label [[COND_END]] 3511 // CHECK11: cond.end: 3512 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 3513 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3514 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3515 // CHECK11-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3516 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3517 // CHECK11: omp.inner.for.cond: 3518 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3519 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3520 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 3521 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3522 // CHECK11: omp.inner.for.body: 3523 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3524 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3525 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3526 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3527 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 3528 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 3529 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3530 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3531 // CHECK11: omp.body.continue: 3532 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3533 // CHECK11: omp.inner.for.inc: 3534 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3535 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 3536 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3537 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3538 // CHECK11: omp.inner.for.end: 3539 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3540 // CHECK11: omp.loop.exit: 3541 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3542 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 3543 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 3544 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3545 // CHECK11: omp.precond.end: 3546 // CHECK11-NEXT: ret void 3547 // 3548 // 3549 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3550 // CHECK11-SAME: () #[[ATTR4:[0-9]+]] { 3551 // CHECK11-NEXT: entry: 3552 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 3553 // CHECK11-NEXT: ret void 3554 // 3555 // 3556 // CHECK12-LABEL: define {{[^@]+}}@_Z15teams_local_argv 3557 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 3558 // CHECK12-NEXT: entry: 3559 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4 3560 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3561 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3562 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3563 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 3564 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 3565 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 3566 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 3567 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3568 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3569 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3570 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4 3571 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3572 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3573 // CHECK12-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3574 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3575 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3576 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 3577 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 3578 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 3579 // CHECK12-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 3580 // CHECK12-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 3581 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3582 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 3583 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 3584 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3585 // CHECK12-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 3586 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 3587 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3588 // CHECK12-NEXT: store i64 4, i64* [[TMP10]], align 4 3589 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3590 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 3591 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3592 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 3593 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 3594 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3595 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 3596 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 3597 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3598 // CHECK12-NEXT: store i64 4, i64* [[TMP16]], align 4 3599 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3600 // CHECK12-NEXT: store i8* null, i8** [[TMP17]], align 4 3601 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3602 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 3603 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 3604 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3605 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 3606 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 3607 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3608 // CHECK12-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 3609 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3610 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4 3611 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3612 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3613 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3614 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 3615 // CHECK12-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 3616 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3617 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 3618 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3619 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3620 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3621 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3622 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 3623 // CHECK12-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 3624 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 3625 // CHECK12-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3626 // CHECK12-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 3627 // CHECK12-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3628 // CHECK12: omp_offload.failed: 3629 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3630 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3631 // CHECK12: omp_offload.cont: 3632 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 3633 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3634 // CHECK12-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3635 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 3636 // CHECK12-NEXT: ret i32 [[TMP33]] 3637 // 3638 // 3639 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 3640 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3641 // CHECK12-NEXT: entry: 3642 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3643 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3644 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3645 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3646 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3647 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3648 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3649 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3650 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 3651 // CHECK12-NEXT: ret void 3652 // 3653 // 3654 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 3655 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3656 // CHECK12-NEXT: entry: 3657 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3658 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3659 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3660 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3661 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3662 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3663 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3664 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3665 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3666 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3667 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3668 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3669 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3670 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3671 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 3672 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3673 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3674 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3675 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3676 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3677 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3678 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3679 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3680 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3681 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3682 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3683 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3684 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3685 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3686 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3687 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 3688 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3689 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3690 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3691 // CHECK12: omp.precond.then: 3692 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3693 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3694 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 3695 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3696 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3697 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3698 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3699 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3700 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3701 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3702 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3703 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3704 // CHECK12: cond.true: 3705 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3706 // CHECK12-NEXT: br label [[COND_END:%.*]] 3707 // CHECK12: cond.false: 3708 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3709 // CHECK12-NEXT: br label [[COND_END]] 3710 // CHECK12: cond.end: 3711 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3712 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3713 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3714 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3715 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3716 // CHECK12: omp.inner.for.cond: 3717 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3718 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3719 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3720 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3721 // CHECK12: omp.inner.for.body: 3722 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3723 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3724 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 3725 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3726 // CHECK12: omp.inner.for.inc: 3727 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3728 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3729 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 3730 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3731 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3732 // CHECK12: omp.inner.for.end: 3733 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3734 // CHECK12: omp.loop.exit: 3735 // CHECK12-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3736 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 3737 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 3738 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 3739 // CHECK12: omp.precond.end: 3740 // CHECK12-NEXT: ret void 3741 // 3742 // 3743 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3744 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3745 // CHECK12-NEXT: entry: 3746 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3747 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3748 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3749 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3750 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3751 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3752 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3753 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3754 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3755 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3756 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3757 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3758 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3759 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3760 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3761 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3762 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 3763 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3764 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3765 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3766 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3767 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3768 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3769 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3770 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3771 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3772 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3773 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3774 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3775 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3776 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3777 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3778 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3779 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3780 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 3781 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3782 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3783 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3784 // CHECK12: omp.precond.then: 3785 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3786 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3787 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3788 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3789 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3790 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 3791 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3792 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3793 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3794 // CHECK12-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3795 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3796 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3797 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3798 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3799 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 3800 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3801 // CHECK12: cond.true: 3802 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3803 // CHECK12-NEXT: br label [[COND_END:%.*]] 3804 // CHECK12: cond.false: 3805 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3806 // CHECK12-NEXT: br label [[COND_END]] 3807 // CHECK12: cond.end: 3808 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 3809 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3810 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3811 // CHECK12-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3812 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3813 // CHECK12: omp.inner.for.cond: 3814 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3815 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3816 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 3817 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3818 // CHECK12: omp.inner.for.body: 3819 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3820 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3821 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3822 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3823 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 3824 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 3825 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3826 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3827 // CHECK12: omp.body.continue: 3828 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3829 // CHECK12: omp.inner.for.inc: 3830 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3831 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 3832 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3833 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3834 // CHECK12: omp.inner.for.end: 3835 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3836 // CHECK12: omp.loop.exit: 3837 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3838 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 3839 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 3840 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 3841 // CHECK12: omp.precond.end: 3842 // CHECK12-NEXT: ret void 3843 // 3844 // 3845 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3846 // CHECK12-SAME: () #[[ATTR4:[0-9]+]] { 3847 // CHECK12-NEXT: entry: 3848 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3849 // CHECK12-NEXT: ret void 3850 // 3851 // 3852 // CHECK13-LABEL: define {{[^@]+}}@_Z15teams_local_argv 3853 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 3854 // CHECK13-NEXT: entry: 3855 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 3856 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3857 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3858 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3859 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 3860 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3861 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3862 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3863 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3864 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3865 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3866 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3867 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 3868 // CHECK13: for.cond: 3869 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3870 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 3871 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]] 3872 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3873 // CHECK13: for.body: 3874 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3875 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 3876 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 3877 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3878 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 3879 // CHECK13: for.inc: 3880 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 3881 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 3882 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 3883 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3884 // CHECK13: for.end: 3885 // CHECK13-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 3886 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4 3887 // CHECK13-NEXT: [[TMP8:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3888 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP8]]) 3889 // CHECK13-NEXT: ret i32 [[TMP7]] 3890 // 3891 // 3892 // CHECK14-LABEL: define {{[^@]+}}@_Z15teams_local_argv 3893 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 3894 // CHECK14-NEXT: entry: 3895 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4 3896 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3897 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3898 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3899 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4 3900 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3901 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3902 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3903 // CHECK14-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3904 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3905 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3906 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 3907 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 3908 // CHECK14: for.cond: 3909 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3910 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 3911 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]] 3912 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3913 // CHECK14: for.body: 3914 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3915 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 3916 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 3917 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3918 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 3919 // CHECK14: for.inc: 3920 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 3921 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 3922 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 3923 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3924 // CHECK14: for.end: 3925 // CHECK14-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 3926 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4 3927 // CHECK14-NEXT: [[TMP8:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3928 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP8]]) 3929 // CHECK14-NEXT: ret i32 [[TMP7]] 3930 // 3931 // 3932 // CHECK15-LABEL: define {{[^@]+}}@_Z15teams_local_argv 3933 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 3934 // CHECK15-NEXT: entry: 3935 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 3936 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3937 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3938 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3939 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 3940 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3941 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3942 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3943 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3944 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3945 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 3946 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 3947 // CHECK15: for.cond: 3948 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 3949 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 3950 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]] 3951 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3952 // CHECK15: for.body: 3953 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 3954 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]] 3955 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3956 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 3957 // CHECK15: for.inc: 3958 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3959 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 3960 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 3961 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3962 // CHECK15: for.end: 3963 // CHECK15-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 3964 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4 3965 // CHECK15-NEXT: [[TMP7:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3966 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP7]]) 3967 // CHECK15-NEXT: ret i32 [[TMP6]] 3968 // 3969 // 3970 // CHECK16-LABEL: define {{[^@]+}}@_Z15teams_local_argv 3971 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 3972 // CHECK16-NEXT: entry: 3973 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4 3974 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3975 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3976 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 3977 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4 3978 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3979 // CHECK16-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3980 // CHECK16-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3981 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3982 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3983 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 3984 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 3985 // CHECK16: for.cond: 3986 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 3987 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 3988 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]] 3989 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3990 // CHECK16: for.body: 3991 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 3992 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]] 3993 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3994 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 3995 // CHECK16: for.inc: 3996 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3997 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 3998 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 3999 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4000 // CHECK16: for.end: 4001 // CHECK16-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 4002 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4 4003 // CHECK16-NEXT: [[TMP7:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4004 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP7]]) 4005 // CHECK16-NEXT: ret i32 [[TMP6]] 4006 // 4007 // 4008 // CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4009 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] { 4010 // CHECK17-NEXT: entry: 4011 // CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4012 // CHECK17-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 4013 // CHECK17-NEXT: ret i32 [[CALL]] 4014 // 4015 // 4016 // CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4017 // CHECK17-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4018 // CHECK17-NEXT: entry: 4019 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4020 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 4021 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 4022 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 4023 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 4024 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4025 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4026 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4027 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4028 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 4029 // CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 4030 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4031 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 4032 // CHECK17-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 4033 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4034 // CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 8 4035 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4036 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4037 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 4038 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4039 // CHECK17-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 4040 // CHECK17-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4041 // CHECK17: omp_offload.failed: 4042 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 4043 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 4044 // CHECK17: omp_offload.cont: 4045 // CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4046 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 4047 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 4048 // CHECK17-NEXT: ret i32 [[TMP9]] 4049 // 4050 // 4051 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 4052 // CHECK17-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 4053 // CHECK17-NEXT: entry: 4054 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4055 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4056 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4057 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4058 // CHECK17-NEXT: ret void 4059 // 4060 // 4061 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 4062 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4063 // CHECK17-NEXT: entry: 4064 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4065 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4066 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4067 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4068 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 4069 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4070 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4071 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4072 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4073 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 4074 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4075 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4076 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4077 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4078 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4079 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4080 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4081 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4082 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4083 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4084 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4085 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4086 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4087 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4088 // CHECK17: cond.true: 4089 // CHECK17-NEXT: br label [[COND_END:%.*]] 4090 // CHECK17: cond.false: 4091 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4092 // CHECK17-NEXT: br label [[COND_END]] 4093 // CHECK17: cond.end: 4094 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4095 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4096 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4097 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4098 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4099 // CHECK17: omp.inner.for.cond: 4100 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4101 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4102 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4103 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4104 // CHECK17: omp.inner.for.body: 4105 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4106 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4107 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4108 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4109 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4110 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4111 // CHECK17: omp.inner.for.inc: 4112 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4113 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4114 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4115 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4116 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 4117 // CHECK17: omp.inner.for.end: 4118 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4119 // CHECK17: omp.loop.exit: 4120 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4121 // CHECK17-NEXT: ret void 4122 // 4123 // 4124 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1 4125 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4126 // CHECK17-NEXT: entry: 4127 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4128 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4129 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4130 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4131 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4132 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4133 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 4134 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4135 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4136 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4137 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4138 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 4139 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4140 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4141 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4142 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4143 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4144 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4145 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4146 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4147 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4148 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4149 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4150 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4151 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4152 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4153 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4154 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4155 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4156 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4157 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4158 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4159 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 4160 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4161 // CHECK17: cond.true: 4162 // CHECK17-NEXT: br label [[COND_END:%.*]] 4163 // CHECK17: cond.false: 4164 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4165 // CHECK17-NEXT: br label [[COND_END]] 4166 // CHECK17: cond.end: 4167 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4168 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4169 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4170 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4171 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4172 // CHECK17: omp.inner.for.cond: 4173 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4174 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4175 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4176 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4177 // CHECK17: omp.inner.for.body: 4178 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4179 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4180 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4181 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4182 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4183 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4184 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 4185 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4186 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4187 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4188 // CHECK17: omp.body.continue: 4189 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4190 // CHECK17: omp.inner.for.inc: 4191 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4192 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 4193 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4194 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 4195 // CHECK17: omp.inner.for.end: 4196 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4197 // CHECK17: omp.loop.exit: 4198 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4199 // CHECK17-NEXT: ret void 4200 // 4201 // 4202 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4203 // CHECK17-SAME: () #[[ATTR3:[0-9]+]] { 4204 // CHECK17-NEXT: entry: 4205 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 4206 // CHECK17-NEXT: ret void 4207 // 4208 // 4209 // CHECK18-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4210 // CHECK18-SAME: () #[[ATTR0:[0-9]+]] { 4211 // CHECK18-NEXT: entry: 4212 // CHECK18-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4213 // CHECK18-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 4214 // CHECK18-NEXT: ret i32 [[CALL]] 4215 // 4216 // 4217 // CHECK18-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4218 // CHECK18-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4219 // CHECK18-NEXT: entry: 4220 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4221 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 4222 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 4223 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 4224 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 4225 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4226 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4227 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4228 // CHECK18-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4229 // CHECK18-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 4230 // CHECK18-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 4231 // CHECK18-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4232 // CHECK18-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 4233 // CHECK18-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 4234 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4235 // CHECK18-NEXT: store i8* null, i8** [[TMP4]], align 8 4236 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4237 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4238 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 4239 // CHECK18-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4240 // CHECK18-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 4241 // CHECK18-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4242 // CHECK18: omp_offload.failed: 4243 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 4244 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 4245 // CHECK18: omp_offload.cont: 4246 // CHECK18-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4247 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 4248 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 4249 // CHECK18-NEXT: ret i32 [[TMP9]] 4250 // 4251 // 4252 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 4253 // CHECK18-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 4254 // CHECK18-NEXT: entry: 4255 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4256 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4257 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4258 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4259 // CHECK18-NEXT: ret void 4260 // 4261 // 4262 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined. 4263 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4264 // CHECK18-NEXT: entry: 4265 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4266 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4267 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4268 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4269 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 4270 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4271 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4272 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4273 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4274 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 4275 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4276 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4277 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4278 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4279 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4280 // CHECK18-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4281 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4282 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4283 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4284 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4285 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4286 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4287 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4288 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4289 // CHECK18: cond.true: 4290 // CHECK18-NEXT: br label [[COND_END:%.*]] 4291 // CHECK18: cond.false: 4292 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4293 // CHECK18-NEXT: br label [[COND_END]] 4294 // CHECK18: cond.end: 4295 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4296 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4297 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4298 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4299 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4300 // CHECK18: omp.inner.for.cond: 4301 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4302 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4303 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4304 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4305 // CHECK18: omp.inner.for.body: 4306 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4307 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4308 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4309 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4310 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4311 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4312 // CHECK18: omp.inner.for.inc: 4313 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4314 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4315 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4316 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4317 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 4318 // CHECK18: omp.inner.for.end: 4319 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4320 // CHECK18: omp.loop.exit: 4321 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4322 // CHECK18-NEXT: ret void 4323 // 4324 // 4325 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..1 4326 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4327 // CHECK18-NEXT: entry: 4328 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4329 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4330 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4331 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4332 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4333 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4334 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 4335 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4336 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4337 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4338 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4339 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 4340 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4341 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4342 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4343 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4344 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4345 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4346 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4347 // CHECK18-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4348 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4349 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4350 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4351 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4352 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4353 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4354 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4355 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4356 // CHECK18-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4357 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4358 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4359 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4360 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 4361 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4362 // CHECK18: cond.true: 4363 // CHECK18-NEXT: br label [[COND_END:%.*]] 4364 // CHECK18: cond.false: 4365 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4366 // CHECK18-NEXT: br label [[COND_END]] 4367 // CHECK18: cond.end: 4368 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4369 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4370 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4371 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4372 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4373 // CHECK18: omp.inner.for.cond: 4374 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4375 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4376 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4377 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4378 // CHECK18: omp.inner.for.body: 4379 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4380 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4381 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4382 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4383 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4384 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4385 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 4386 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4387 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4388 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4389 // CHECK18: omp.body.continue: 4390 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4391 // CHECK18: omp.inner.for.inc: 4392 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4393 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 4394 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4395 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 4396 // CHECK18: omp.inner.for.end: 4397 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4398 // CHECK18: omp.loop.exit: 4399 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4400 // CHECK18-NEXT: ret void 4401 // 4402 // 4403 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4404 // CHECK18-SAME: () #[[ATTR3:[0-9]+]] { 4405 // CHECK18-NEXT: entry: 4406 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1) 4407 // CHECK18-NEXT: ret void 4408 // 4409 // 4410 // CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4411 // CHECK19-SAME: () #[[ATTR0:[0-9]+]] { 4412 // CHECK19-NEXT: entry: 4413 // CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4414 // CHECK19-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 4415 // CHECK19-NEXT: ret i32 [[CALL]] 4416 // 4417 // 4418 // CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4419 // CHECK19-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4420 // CHECK19-NEXT: entry: 4421 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4422 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 4423 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 4424 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 4425 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 4426 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4427 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4428 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4429 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4430 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 4431 // CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 4432 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4433 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 4434 // CHECK19-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 4435 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4436 // CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4 4437 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4438 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4439 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 4440 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4441 // CHECK19-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 4442 // CHECK19-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4443 // CHECK19: omp_offload.failed: 4444 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 4445 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 4446 // CHECK19: omp_offload.cont: 4447 // CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4448 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 4449 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 4450 // CHECK19-NEXT: ret i32 [[TMP9]] 4451 // 4452 // 4453 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 4454 // CHECK19-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 4455 // CHECK19-NEXT: entry: 4456 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4457 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4458 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4459 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4460 // CHECK19-NEXT: ret void 4461 // 4462 // 4463 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 4464 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4465 // CHECK19-NEXT: entry: 4466 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4467 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4468 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4469 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4470 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 4471 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4472 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4473 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4474 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4475 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 4476 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4477 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4478 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4479 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4480 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4481 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4482 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4483 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4484 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4485 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4486 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4487 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4488 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4489 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4490 // CHECK19: cond.true: 4491 // CHECK19-NEXT: br label [[COND_END:%.*]] 4492 // CHECK19: cond.false: 4493 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4494 // CHECK19-NEXT: br label [[COND_END]] 4495 // CHECK19: cond.end: 4496 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4497 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4498 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4499 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4500 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4501 // CHECK19: omp.inner.for.cond: 4502 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4503 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4504 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4505 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4506 // CHECK19: omp.inner.for.body: 4507 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4508 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4509 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 4510 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4511 // CHECK19: omp.inner.for.inc: 4512 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4513 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4514 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4515 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4516 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 4517 // CHECK19: omp.inner.for.end: 4518 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4519 // CHECK19: omp.loop.exit: 4520 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4521 // CHECK19-NEXT: ret void 4522 // 4523 // 4524 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1 4525 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4526 // CHECK19-NEXT: entry: 4527 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4528 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4529 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4530 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4531 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4532 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4533 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 4534 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4535 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4536 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4537 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4538 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 4539 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4540 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4541 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4542 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4543 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4544 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4545 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4546 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4547 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4548 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4549 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 4550 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 4551 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4552 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4553 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4554 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4555 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4556 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4557 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 4558 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4559 // CHECK19: cond.true: 4560 // CHECK19-NEXT: br label [[COND_END:%.*]] 4561 // CHECK19: cond.false: 4562 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4563 // CHECK19-NEXT: br label [[COND_END]] 4564 // CHECK19: cond.end: 4565 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4566 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4567 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4568 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4569 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4570 // CHECK19: omp.inner.for.cond: 4571 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4572 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4573 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4574 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4575 // CHECK19: omp.inner.for.body: 4576 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4577 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4578 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4579 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4580 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4581 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4582 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 4583 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4584 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4585 // CHECK19: omp.body.continue: 4586 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4587 // CHECK19: omp.inner.for.inc: 4588 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4589 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 4590 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4591 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 4592 // CHECK19: omp.inner.for.end: 4593 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4594 // CHECK19: omp.loop.exit: 4595 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4596 // CHECK19-NEXT: ret void 4597 // 4598 // 4599 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4600 // CHECK19-SAME: () #[[ATTR3:[0-9]+]] { 4601 // CHECK19-NEXT: entry: 4602 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 4603 // CHECK19-NEXT: ret void 4604 // 4605 // 4606 // CHECK20-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4607 // CHECK20-SAME: () #[[ATTR0:[0-9]+]] { 4608 // CHECK20-NEXT: entry: 4609 // CHECK20-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4610 // CHECK20-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 4611 // CHECK20-NEXT: ret i32 [[CALL]] 4612 // 4613 // 4614 // CHECK20-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4615 // CHECK20-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4616 // CHECK20-NEXT: entry: 4617 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4618 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 4619 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 4620 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 4621 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 4622 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4623 // CHECK20-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4624 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4625 // CHECK20-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4626 // CHECK20-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 4627 // CHECK20-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 4628 // CHECK20-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4629 // CHECK20-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 4630 // CHECK20-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 4631 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4632 // CHECK20-NEXT: store i8* null, i8** [[TMP4]], align 4 4633 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4634 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4635 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 4636 // CHECK20-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4637 // CHECK20-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 4638 // CHECK20-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4639 // CHECK20: omp_offload.failed: 4640 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 4641 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 4642 // CHECK20: omp_offload.cont: 4643 // CHECK20-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4644 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 4645 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 4646 // CHECK20-NEXT: ret i32 [[TMP9]] 4647 // 4648 // 4649 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 4650 // CHECK20-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 4651 // CHECK20-NEXT: entry: 4652 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4653 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4654 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4655 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4656 // CHECK20-NEXT: ret void 4657 // 4658 // 4659 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined. 4660 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4661 // CHECK20-NEXT: entry: 4662 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4663 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4664 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4665 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4666 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 4667 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4668 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4669 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4670 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4671 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 4672 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4673 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4674 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4675 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4676 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4677 // CHECK20-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4678 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4679 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4680 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4681 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4682 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4683 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4684 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4685 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4686 // CHECK20: cond.true: 4687 // CHECK20-NEXT: br label [[COND_END:%.*]] 4688 // CHECK20: cond.false: 4689 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4690 // CHECK20-NEXT: br label [[COND_END]] 4691 // CHECK20: cond.end: 4692 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4693 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4694 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4695 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4696 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4697 // CHECK20: omp.inner.for.cond: 4698 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4699 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4700 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4701 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4702 // CHECK20: omp.inner.for.body: 4703 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4704 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4705 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 4706 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4707 // CHECK20: omp.inner.for.inc: 4708 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4709 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4710 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4711 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4712 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 4713 // CHECK20: omp.inner.for.end: 4714 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4715 // CHECK20: omp.loop.exit: 4716 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4717 // CHECK20-NEXT: ret void 4718 // 4719 // 4720 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..1 4721 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4722 // CHECK20-NEXT: entry: 4723 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4724 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4725 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4726 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4727 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4728 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4729 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 4730 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4731 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4732 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4733 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4734 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 4735 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4736 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4737 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4738 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4739 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4740 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4741 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4742 // CHECK20-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4743 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4744 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4745 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 4746 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 4747 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4748 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4749 // CHECK20-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4750 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4751 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4752 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4753 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 4754 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4755 // CHECK20: cond.true: 4756 // CHECK20-NEXT: br label [[COND_END:%.*]] 4757 // CHECK20: cond.false: 4758 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4759 // CHECK20-NEXT: br label [[COND_END]] 4760 // CHECK20: cond.end: 4761 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4762 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4763 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4764 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4765 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4766 // CHECK20: omp.inner.for.cond: 4767 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4768 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4769 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4770 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4771 // CHECK20: omp.inner.for.body: 4772 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4773 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4774 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4775 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4776 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4777 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4778 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 4779 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4780 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4781 // CHECK20: omp.body.continue: 4782 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4783 // CHECK20: omp.inner.for.inc: 4784 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4785 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 4786 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4787 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 4788 // CHECK20: omp.inner.for.end: 4789 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4790 // CHECK20: omp.loop.exit: 4791 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4792 // CHECK20-NEXT: ret void 4793 // 4794 // 4795 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4796 // CHECK20-SAME: () #[[ATTR3:[0-9]+]] { 4797 // CHECK20-NEXT: entry: 4798 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1) 4799 // CHECK20-NEXT: ret void 4800 // 4801 // 4802 // CHECK21-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4803 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] { 4804 // CHECK21-NEXT: entry: 4805 // CHECK21-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4806 // CHECK21-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 4807 // CHECK21-NEXT: ret i32 [[CALL]] 4808 // 4809 // 4810 // CHECK21-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4811 // CHECK21-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4812 // CHECK21-NEXT: entry: 4813 // CHECK21-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4814 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4 4815 // CHECK21-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4816 // CHECK21-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4817 // CHECK21-NEXT: store i32 0, i32* [[I]], align 4 4818 // CHECK21-NEXT: br label [[FOR_COND:%.*]] 4819 // CHECK21: for.cond: 4820 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 4821 // CHECK21-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 4822 // CHECK21-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4823 // CHECK21: for.body: 4824 // CHECK21-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4825 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 4826 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64 4827 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4828 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4829 // CHECK21-NEXT: br label [[FOR_INC:%.*]] 4830 // CHECK21: for.inc: 4831 // CHECK21-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 4832 // CHECK21-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 4833 // CHECK21-NEXT: store i32 [[INC]], i32* [[I]], align 4 4834 // CHECK21-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 4835 // CHECK21: for.end: 4836 // CHECK21-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4837 // CHECK21-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 4838 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 4839 // CHECK21-NEXT: ret i32 [[TMP3]] 4840 // 4841 // 4842 // CHECK22-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4843 // CHECK22-SAME: () #[[ATTR0:[0-9]+]] { 4844 // CHECK22-NEXT: entry: 4845 // CHECK22-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4846 // CHECK22-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 4847 // CHECK22-NEXT: ret i32 [[CALL]] 4848 // 4849 // 4850 // CHECK22-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4851 // CHECK22-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4852 // CHECK22-NEXT: entry: 4853 // CHECK22-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4854 // CHECK22-NEXT: [[I:%.*]] = alloca i32, align 4 4855 // CHECK22-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4856 // CHECK22-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4857 // CHECK22-NEXT: store i32 0, i32* [[I]], align 4 4858 // CHECK22-NEXT: br label [[FOR_COND:%.*]] 4859 // CHECK22: for.cond: 4860 // CHECK22-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 4861 // CHECK22-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 4862 // CHECK22-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4863 // CHECK22: for.body: 4864 // CHECK22-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4865 // CHECK22-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 4866 // CHECK22-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64 4867 // CHECK22-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4868 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4869 // CHECK22-NEXT: br label [[FOR_INC:%.*]] 4870 // CHECK22: for.inc: 4871 // CHECK22-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 4872 // CHECK22-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 4873 // CHECK22-NEXT: store i32 [[INC]], i32* [[I]], align 4 4874 // CHECK22-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 4875 // CHECK22: for.end: 4876 // CHECK22-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4877 // CHECK22-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 4878 // CHECK22-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 4879 // CHECK22-NEXT: ret i32 [[TMP3]] 4880 // 4881 // 4882 // CHECK23-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4883 // CHECK23-SAME: () #[[ATTR0:[0-9]+]] { 4884 // CHECK23-NEXT: entry: 4885 // CHECK23-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4886 // CHECK23-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 4887 // CHECK23-NEXT: ret i32 [[CALL]] 4888 // 4889 // 4890 // CHECK23-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4891 // CHECK23-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4892 // CHECK23-NEXT: entry: 4893 // CHECK23-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4894 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4 4895 // CHECK23-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4896 // CHECK23-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4897 // CHECK23-NEXT: store i32 0, i32* [[I]], align 4 4898 // CHECK23-NEXT: br label [[FOR_COND:%.*]] 4899 // CHECK23: for.cond: 4900 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 4901 // CHECK23-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 4902 // CHECK23-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4903 // CHECK23: for.body: 4904 // CHECK23-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4905 // CHECK23-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 4906 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP1]] 4907 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4908 // CHECK23-NEXT: br label [[FOR_INC:%.*]] 4909 // CHECK23: for.inc: 4910 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 4911 // CHECK23-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 4912 // CHECK23-NEXT: store i32 [[INC]], i32* [[I]], align 4 4913 // CHECK23-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4914 // CHECK23: for.end: 4915 // CHECK23-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4916 // CHECK23-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 4917 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 4918 // CHECK23-NEXT: ret i32 [[TMP3]] 4919 // 4920 // 4921 // CHECK24-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4922 // CHECK24-SAME: () #[[ATTR0:[0-9]+]] { 4923 // CHECK24-NEXT: entry: 4924 // CHECK24-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4925 // CHECK24-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 4926 // CHECK24-NEXT: ret i32 [[CALL]] 4927 // 4928 // 4929 // CHECK24-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4930 // CHECK24-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4931 // CHECK24-NEXT: entry: 4932 // CHECK24-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 4933 // CHECK24-NEXT: [[I:%.*]] = alloca i32, align 4 4934 // CHECK24-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 4935 // CHECK24-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 4936 // CHECK24-NEXT: store i32 0, i32* [[I]], align 4 4937 // CHECK24-NEXT: br label [[FOR_COND:%.*]] 4938 // CHECK24: for.cond: 4939 // CHECK24-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 4940 // CHECK24-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123 4941 // CHECK24-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4942 // CHECK24: for.body: 4943 // CHECK24-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4944 // CHECK24-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 4945 // CHECK24-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP1]] 4946 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4947 // CHECK24-NEXT: br label [[FOR_INC:%.*]] 4948 // CHECK24: for.inc: 4949 // CHECK24-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 4950 // CHECK24-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 4951 // CHECK24-NEXT: store i32 [[INC]], i32* [[I]], align 4 4952 // CHECK24-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4953 // CHECK24: for.end: 4954 // CHECK24-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4955 // CHECK24-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 4956 // CHECK24-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4 4957 // CHECK24-NEXT: ret i32 [[TMP3]] 4958 // 4959 // 4960 // CHECK25-LABEL: define {{[^@]+}}@main 4961 // CHECK25-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4962 // CHECK25-NEXT: entry: 4963 // CHECK25-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4964 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4965 // CHECK25-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 4966 // CHECK25-NEXT: [[N:%.*]] = alloca i32, align 4 4967 // CHECK25-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 4968 // CHECK25-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4969 // CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 4970 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 4971 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 4972 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 4973 // CHECK25-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 4974 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 4975 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4976 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4977 // CHECK25-NEXT: store i32 0, i32* [[RETVAL]], align 4 4978 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4979 // CHECK25-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 4980 // CHECK25-NEXT: store i32 100, i32* [[N]], align 4 4981 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4982 // CHECK25-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 4983 // CHECK25-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 4984 // CHECK25-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 4985 // CHECK25-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 4986 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 4987 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 4988 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 4989 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 4990 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 4991 // CHECK25-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 4992 // CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4993 // CHECK25-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 4994 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 4995 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4996 // CHECK25-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 4997 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 4998 // CHECK25-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4999 // CHECK25-NEXT: store i64 4, i64* [[TMP10]], align 8 5000 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5001 // CHECK25-NEXT: store i8* null, i8** [[TMP11]], align 8 5002 // CHECK25-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 5003 // CHECK25-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 5004 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 5005 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 5006 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 5007 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 5008 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 5009 // CHECK25-NEXT: store i64 8, i64* [[TMP16]], align 8 5010 // CHECK25-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 5011 // CHECK25-NEXT: store i8* null, i8** [[TMP17]], align 8 5012 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 5013 // CHECK25-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 5014 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 5015 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 5016 // CHECK25-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 5017 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 5018 // CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 5019 // CHECK25-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 5020 // CHECK25-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 5021 // CHECK25-NEXT: store i8* null, i8** [[TMP23]], align 8 5022 // CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5023 // CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5024 // CHECK25-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 5025 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 5026 // CHECK25-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 5027 // CHECK25-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5028 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 5029 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5030 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5031 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5032 // CHECK25-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5033 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 5034 // CHECK25-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 5035 // CHECK25-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 5036 // CHECK25-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5037 // CHECK25-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 5038 // CHECK25-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5039 // CHECK25: omp_offload.failed: 5040 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 5041 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 5042 // CHECK25: omp_offload.cont: 5043 // CHECK25-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 5044 // CHECK25-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP33]]) 5045 // CHECK25-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5046 // CHECK25-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 5047 // CHECK25-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 5048 // CHECK25-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4 5049 // CHECK25-NEXT: ret i32 [[TMP35]] 5050 // 5051 // 5052 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 5053 // CHECK25-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 5054 // CHECK25-NEXT: entry: 5055 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5056 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5057 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 5058 // CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 5059 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5060 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 5061 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 5062 // CHECK25-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5063 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 5064 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 5065 // CHECK25-NEXT: ret void 5066 // 5067 // 5068 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined. 5069 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5070 // CHECK25-NEXT: entry: 5071 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5072 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5073 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5074 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5075 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 5076 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5077 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 5078 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5079 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5080 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 5081 // CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5082 // CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5083 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5084 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5085 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4 5086 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5087 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5088 // CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5089 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5090 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 5091 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5092 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5093 // CHECK25-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 5094 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 5095 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 5096 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5097 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 5098 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5099 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5100 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5101 // CHECK25-NEXT: store i32 0, i32* [[I]], align 4 5102 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5103 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 5104 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5105 // CHECK25: omp.precond.then: 5106 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5107 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5108 // CHECK25-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 5109 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5110 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5111 // CHECK25-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5112 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 5113 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5114 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5115 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5116 // CHECK25-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 5117 // CHECK25-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5118 // CHECK25: cond.true: 5119 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5120 // CHECK25-NEXT: br label [[COND_END:%.*]] 5121 // CHECK25: cond.false: 5122 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5123 // CHECK25-NEXT: br label [[COND_END]] 5124 // CHECK25: cond.end: 5125 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 5126 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5127 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5128 // CHECK25-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 5129 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5130 // CHECK25: omp.inner.for.cond: 5131 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5132 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5133 // CHECK25-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 5134 // CHECK25-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5135 // CHECK25: omp.inner.for.body: 5136 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5137 // CHECK25-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 5138 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5139 // CHECK25-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 5140 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 5141 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5142 // CHECK25: omp.inner.for.inc: 5143 // CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5144 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5145 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 5146 // CHECK25-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5147 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 5148 // CHECK25: omp.inner.for.end: 5149 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5150 // CHECK25: omp.loop.exit: 5151 // CHECK25-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5152 // CHECK25-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 5153 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 5154 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 5155 // CHECK25: omp.precond.end: 5156 // CHECK25-NEXT: ret void 5157 // 5158 // 5159 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1 5160 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5161 // CHECK25-NEXT: entry: 5162 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5163 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5164 // CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5165 // CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5166 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5167 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5168 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 5169 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5170 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 5171 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5172 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5173 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 5174 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5175 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5176 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5177 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5178 // CHECK25-NEXT: [[I4:%.*]] = alloca i32, align 4 5179 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5180 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5181 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5182 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5183 // CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5184 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5185 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 5186 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5187 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5188 // CHECK25-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 5189 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 5190 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 5191 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5192 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 5193 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5194 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5195 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5196 // CHECK25-NEXT: store i32 0, i32* [[I]], align 4 5197 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5198 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 5199 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5200 // CHECK25: omp.precond.then: 5201 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5202 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5203 // CHECK25-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 5204 // CHECK25-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5205 // CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 5206 // CHECK25-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5207 // CHECK25-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 5208 // CHECK25-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5209 // CHECK25-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 5210 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5211 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5212 // CHECK25-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5213 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 5214 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5215 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5216 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5217 // CHECK25-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 5218 // CHECK25-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5219 // CHECK25: cond.true: 5220 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5221 // CHECK25-NEXT: br label [[COND_END:%.*]] 5222 // CHECK25: cond.false: 5223 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5224 // CHECK25-NEXT: br label [[COND_END]] 5225 // CHECK25: cond.end: 5226 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 5227 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5228 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5229 // CHECK25-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 5230 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5231 // CHECK25: omp.inner.for.cond: 5232 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5233 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5234 // CHECK25-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 5235 // CHECK25-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5236 // CHECK25: omp.inner.for.body: 5237 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5238 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 5239 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5240 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 5241 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 5242 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 5243 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 5244 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5245 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5246 // CHECK25: omp.body.continue: 5247 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5248 // CHECK25: omp.inner.for.inc: 5249 // CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5250 // CHECK25-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 5251 // CHECK25-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 5252 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 5253 // CHECK25: omp.inner.for.end: 5254 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5255 // CHECK25: omp.loop.exit: 5256 // CHECK25-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5257 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 5258 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 5259 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 5260 // CHECK25: omp.precond.end: 5261 // CHECK25-NEXT: ret void 5262 // 5263 // 5264 // CHECK25-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 5265 // CHECK25-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 5266 // CHECK25-NEXT: entry: 5267 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5268 // CHECK25-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 5269 // CHECK25-NEXT: [[TE:%.*]] = alloca i32, align 4 5270 // CHECK25-NEXT: [[TH:%.*]] = alloca i32, align 4 5271 // CHECK25-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 5272 // CHECK25-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 5273 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 5274 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 5275 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 5276 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 5277 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5278 // CHECK25-NEXT: store i32 0, i32* [[TE]], align 4 5279 // CHECK25-NEXT: store i32 128, i32* [[TH]], align 4 5280 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 5281 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 5282 // CHECK25-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 5283 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8 5284 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 5285 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 5286 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 5287 // CHECK25-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8 5288 // CHECK25-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5289 // CHECK25-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 5290 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 5291 // CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5292 // CHECK25-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 5293 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 5294 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5295 // CHECK25-NEXT: store i8* null, i8** [[TMP8]], align 8 5296 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 5297 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 5298 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 5299 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 5300 // CHECK25-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 5301 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 5302 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 5303 // CHECK25-NEXT: store i8* null, i8** [[TMP13]], align 8 5304 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 5305 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 5306 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8 5307 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 5308 // CHECK25-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 5309 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8 5310 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 5311 // CHECK25-NEXT: store i8* null, i8** [[TMP18]], align 8 5312 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5313 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5314 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 5315 // CHECK25-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 5316 // CHECK25-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 0) 5317 // CHECK25-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 5318 // CHECK25-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5319 // CHECK25: omp_offload.failed: 5320 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 5321 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 5322 // CHECK25: omp_offload.cont: 5323 // CHECK25-NEXT: ret i32 0 5324 // 5325 // 5326 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 5327 // CHECK25-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5328 // CHECK25-NEXT: entry: 5329 // CHECK25-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 5330 // CHECK25-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 5331 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5332 // CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 5333 // CHECK25-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 5334 // CHECK25-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 5335 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5336 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 5337 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 5338 // CHECK25-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5339 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 5340 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8 5341 // CHECK25-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 5342 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 5343 // CHECK25-NEXT: ret void 5344 // 5345 // 5346 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..2 5347 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5348 // CHECK25-NEXT: entry: 5349 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5350 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5351 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5352 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5353 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 5354 // CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5355 // CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5356 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5357 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5358 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 5359 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5360 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5361 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5362 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5363 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5364 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 5365 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5366 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5367 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5368 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5369 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5370 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5371 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5372 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5373 // CHECK25: cond.true: 5374 // CHECK25-NEXT: br label [[COND_END:%.*]] 5375 // CHECK25: cond.false: 5376 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5377 // CHECK25-NEXT: br label [[COND_END]] 5378 // CHECK25: cond.end: 5379 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5380 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5381 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5382 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5383 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5384 // CHECK25: omp.inner.for.cond: 5385 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5386 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5387 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5388 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5389 // CHECK25: omp.inner.for.body: 5390 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5391 // CHECK25-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5392 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5393 // CHECK25-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5394 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 5395 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5396 // CHECK25: omp.inner.for.inc: 5397 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5398 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5399 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5400 // CHECK25-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5401 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 5402 // CHECK25: omp.inner.for.end: 5403 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5404 // CHECK25: omp.loop.exit: 5405 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5406 // CHECK25-NEXT: ret void 5407 // 5408 // 5409 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..3 5410 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5411 // CHECK25-NEXT: entry: 5412 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5413 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5414 // CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5415 // CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5416 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5417 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5418 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 5419 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5420 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5421 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5422 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5423 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 5424 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5425 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5426 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5427 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5428 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5429 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5430 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5431 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5432 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5433 // CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5434 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5435 // CHECK25-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5436 // CHECK25-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5437 // CHECK25-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5438 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5439 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5440 // CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5441 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5442 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5443 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5444 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 5445 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5446 // CHECK25: cond.true: 5447 // CHECK25-NEXT: br label [[COND_END:%.*]] 5448 // CHECK25: cond.false: 5449 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5450 // CHECK25-NEXT: br label [[COND_END]] 5451 // CHECK25: cond.end: 5452 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 5453 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5454 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5455 // CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 5456 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5457 // CHECK25: omp.inner.for.cond: 5458 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5459 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5460 // CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5461 // CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5462 // CHECK25: omp.inner.for.body: 5463 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5464 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5465 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5466 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5467 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 5468 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 5469 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 5470 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5471 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5472 // CHECK25: omp.body.continue: 5473 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5474 // CHECK25: omp.inner.for.inc: 5475 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5476 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5477 // CHECK25-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5478 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 5479 // CHECK25: omp.inner.for.end: 5480 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5481 // CHECK25: omp.loop.exit: 5482 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5483 // CHECK25-NEXT: ret void 5484 // 5485 // 5486 // CHECK25-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5487 // CHECK25-SAME: () #[[ATTR5:[0-9]+]] { 5488 // CHECK25-NEXT: entry: 5489 // CHECK25-NEXT: call void @__tgt_register_requires(i64 1) 5490 // CHECK25-NEXT: ret void 5491 // 5492 // 5493 // CHECK26-LABEL: define {{[^@]+}}@main 5494 // CHECK26-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 5495 // CHECK26-NEXT: entry: 5496 // CHECK26-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5497 // CHECK26-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5498 // CHECK26-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 5499 // CHECK26-NEXT: [[N:%.*]] = alloca i32, align 4 5500 // CHECK26-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 5501 // CHECK26-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 5502 // CHECK26-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5503 // CHECK26-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 5504 // CHECK26-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 5505 // CHECK26-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 5506 // CHECK26-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 5507 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 5508 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5509 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5510 // CHECK26-NEXT: store i32 0, i32* [[RETVAL]], align 4 5511 // CHECK26-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5512 // CHECK26-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 5513 // CHECK26-NEXT: store i32 100, i32* [[N]], align 4 5514 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 5515 // CHECK26-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 5516 // CHECK26-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 5517 // CHECK26-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 5518 // CHECK26-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 5519 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 5520 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 5521 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 5522 // CHECK26-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 5523 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 5524 // CHECK26-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 5525 // CHECK26-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5526 // CHECK26-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 5527 // CHECK26-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 5528 // CHECK26-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5529 // CHECK26-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 5530 // CHECK26-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 5531 // CHECK26-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 5532 // CHECK26-NEXT: store i64 4, i64* [[TMP10]], align 8 5533 // CHECK26-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5534 // CHECK26-NEXT: store i8* null, i8** [[TMP11]], align 8 5535 // CHECK26-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 5536 // CHECK26-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 5537 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 5538 // CHECK26-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 5539 // CHECK26-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 5540 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 5541 // CHECK26-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 5542 // CHECK26-NEXT: store i64 8, i64* [[TMP16]], align 8 5543 // CHECK26-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 5544 // CHECK26-NEXT: store i8* null, i8** [[TMP17]], align 8 5545 // CHECK26-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 5546 // CHECK26-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 5547 // CHECK26-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 5548 // CHECK26-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 5549 // CHECK26-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 5550 // CHECK26-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 5551 // CHECK26-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 5552 // CHECK26-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 5553 // CHECK26-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 5554 // CHECK26-NEXT: store i8* null, i8** [[TMP23]], align 8 5555 // CHECK26-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5556 // CHECK26-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5557 // CHECK26-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 5558 // CHECK26-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 5559 // CHECK26-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 5560 // CHECK26-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5561 // CHECK26-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 5562 // CHECK26-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5563 // CHECK26-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5564 // CHECK26-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5565 // CHECK26-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5566 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 5567 // CHECK26-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 5568 // CHECK26-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 5569 // CHECK26-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5570 // CHECK26-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 5571 // CHECK26-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5572 // CHECK26: omp_offload.failed: 5573 // CHECK26-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 5574 // CHECK26-NEXT: br label [[OMP_OFFLOAD_CONT]] 5575 // CHECK26: omp_offload.cont: 5576 // CHECK26-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 5577 // CHECK26-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP33]]) 5578 // CHECK26-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5579 // CHECK26-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 5580 // CHECK26-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 5581 // CHECK26-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4 5582 // CHECK26-NEXT: ret i32 [[TMP35]] 5583 // 5584 // 5585 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 5586 // CHECK26-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 5587 // CHECK26-NEXT: entry: 5588 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5589 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5590 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 5591 // CHECK26-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 5592 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5593 // CHECK26-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 5594 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 5595 // CHECK26-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5596 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 5597 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 5598 // CHECK26-NEXT: ret void 5599 // 5600 // 5601 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined. 5602 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5603 // CHECK26-NEXT: entry: 5604 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5605 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5606 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5607 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5608 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 5609 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5610 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 5611 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5612 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5613 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 5614 // CHECK26-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5615 // CHECK26-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5616 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5617 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5618 // CHECK26-NEXT: [[I3:%.*]] = alloca i32, align 4 5619 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5620 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5621 // CHECK26-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5622 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5623 // CHECK26-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 5624 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5625 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5626 // CHECK26-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 5627 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 5628 // CHECK26-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 5629 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5630 // CHECK26-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 5631 // CHECK26-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5632 // CHECK26-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5633 // CHECK26-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5634 // CHECK26-NEXT: store i32 0, i32* [[I]], align 4 5635 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5636 // CHECK26-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 5637 // CHECK26-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5638 // CHECK26: omp.precond.then: 5639 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5640 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5641 // CHECK26-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 5642 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5643 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5644 // CHECK26-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5645 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 5646 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5647 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5648 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5649 // CHECK26-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 5650 // CHECK26-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5651 // CHECK26: cond.true: 5652 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5653 // CHECK26-NEXT: br label [[COND_END:%.*]] 5654 // CHECK26: cond.false: 5655 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5656 // CHECK26-NEXT: br label [[COND_END]] 5657 // CHECK26: cond.end: 5658 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 5659 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5660 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5661 // CHECK26-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 5662 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5663 // CHECK26: omp.inner.for.cond: 5664 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5665 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5666 // CHECK26-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 5667 // CHECK26-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5668 // CHECK26: omp.inner.for.body: 5669 // CHECK26-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5670 // CHECK26-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 5671 // CHECK26-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5672 // CHECK26-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 5673 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 5674 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5675 // CHECK26: omp.inner.for.inc: 5676 // CHECK26-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5677 // CHECK26-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5678 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 5679 // CHECK26-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5680 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 5681 // CHECK26: omp.inner.for.end: 5682 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5683 // CHECK26: omp.loop.exit: 5684 // CHECK26-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5685 // CHECK26-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 5686 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 5687 // CHECK26-NEXT: br label [[OMP_PRECOND_END]] 5688 // CHECK26: omp.precond.end: 5689 // CHECK26-NEXT: ret void 5690 // 5691 // 5692 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..1 5693 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5694 // CHECK26-NEXT: entry: 5695 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5696 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5697 // CHECK26-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5698 // CHECK26-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5699 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5700 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5701 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 5702 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5703 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 5704 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5705 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5706 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 5707 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5708 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5709 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5710 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5711 // CHECK26-NEXT: [[I4:%.*]] = alloca i32, align 4 5712 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5713 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5714 // CHECK26-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5715 // CHECK26-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5716 // CHECK26-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5717 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5718 // CHECK26-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 5719 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5720 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5721 // CHECK26-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 5722 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 5723 // CHECK26-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 5724 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5725 // CHECK26-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 5726 // CHECK26-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5727 // CHECK26-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5728 // CHECK26-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5729 // CHECK26-NEXT: store i32 0, i32* [[I]], align 4 5730 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5731 // CHECK26-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 5732 // CHECK26-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5733 // CHECK26: omp.precond.then: 5734 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5735 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5736 // CHECK26-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 5737 // CHECK26-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5738 // CHECK26-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 5739 // CHECK26-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5740 // CHECK26-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 5741 // CHECK26-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5742 // CHECK26-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 5743 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5744 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5745 // CHECK26-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5746 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 5747 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5748 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5749 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5750 // CHECK26-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 5751 // CHECK26-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5752 // CHECK26: cond.true: 5753 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5754 // CHECK26-NEXT: br label [[COND_END:%.*]] 5755 // CHECK26: cond.false: 5756 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5757 // CHECK26-NEXT: br label [[COND_END]] 5758 // CHECK26: cond.end: 5759 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 5760 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5761 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5762 // CHECK26-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 5763 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5764 // CHECK26: omp.inner.for.cond: 5765 // CHECK26-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5766 // CHECK26-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5767 // CHECK26-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 5768 // CHECK26-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5769 // CHECK26: omp.inner.for.body: 5770 // CHECK26-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5771 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 5772 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5773 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 5774 // CHECK26-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 5775 // CHECK26-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 5776 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 5777 // CHECK26-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5778 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5779 // CHECK26: omp.body.continue: 5780 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5781 // CHECK26: omp.inner.for.inc: 5782 // CHECK26-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5783 // CHECK26-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 5784 // CHECK26-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 5785 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 5786 // CHECK26: omp.inner.for.end: 5787 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5788 // CHECK26: omp.loop.exit: 5789 // CHECK26-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5790 // CHECK26-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 5791 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 5792 // CHECK26-NEXT: br label [[OMP_PRECOND_END]] 5793 // CHECK26: omp.precond.end: 5794 // CHECK26-NEXT: ret void 5795 // 5796 // 5797 // CHECK26-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 5798 // CHECK26-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 5799 // CHECK26-NEXT: entry: 5800 // CHECK26-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5801 // CHECK26-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 5802 // CHECK26-NEXT: [[TE:%.*]] = alloca i32, align 4 5803 // CHECK26-NEXT: [[TH:%.*]] = alloca i32, align 4 5804 // CHECK26-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 5805 // CHECK26-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 5806 // CHECK26-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 5807 // CHECK26-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 5808 // CHECK26-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 5809 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 5810 // CHECK26-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5811 // CHECK26-NEXT: store i32 0, i32* [[TE]], align 4 5812 // CHECK26-NEXT: store i32 128, i32* [[TH]], align 4 5813 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 5814 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 5815 // CHECK26-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 5816 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8 5817 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 5818 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 5819 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 5820 // CHECK26-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8 5821 // CHECK26-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5822 // CHECK26-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 5823 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 5824 // CHECK26-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5825 // CHECK26-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 5826 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 5827 // CHECK26-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5828 // CHECK26-NEXT: store i8* null, i8** [[TMP8]], align 8 5829 // CHECK26-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 5830 // CHECK26-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 5831 // CHECK26-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 5832 // CHECK26-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 5833 // CHECK26-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 5834 // CHECK26-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 5835 // CHECK26-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 5836 // CHECK26-NEXT: store i8* null, i8** [[TMP13]], align 8 5837 // CHECK26-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 5838 // CHECK26-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 5839 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8 5840 // CHECK26-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 5841 // CHECK26-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 5842 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8 5843 // CHECK26-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 5844 // CHECK26-NEXT: store i8* null, i8** [[TMP18]], align 8 5845 // CHECK26-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5846 // CHECK26-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5847 // CHECK26-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 5848 // CHECK26-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 5849 // CHECK26-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 0) 5850 // CHECK26-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 5851 // CHECK26-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5852 // CHECK26: omp_offload.failed: 5853 // CHECK26-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 5854 // CHECK26-NEXT: br label [[OMP_OFFLOAD_CONT]] 5855 // CHECK26: omp_offload.cont: 5856 // CHECK26-NEXT: ret i32 0 5857 // 5858 // 5859 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 5860 // CHECK26-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5861 // CHECK26-NEXT: entry: 5862 // CHECK26-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 5863 // CHECK26-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 5864 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5865 // CHECK26-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 5866 // CHECK26-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 5867 // CHECK26-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 5868 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5869 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 5870 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 5871 // CHECK26-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5872 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 5873 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8 5874 // CHECK26-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 5875 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 5876 // CHECK26-NEXT: ret void 5877 // 5878 // 5879 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..2 5880 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5881 // CHECK26-NEXT: entry: 5882 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5883 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5884 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5885 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5886 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 5887 // CHECK26-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5888 // CHECK26-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5889 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5890 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5891 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 5892 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5893 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5894 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5895 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5896 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5897 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 5898 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5899 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5900 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5901 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5902 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5903 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5904 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5905 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5906 // CHECK26: cond.true: 5907 // CHECK26-NEXT: br label [[COND_END:%.*]] 5908 // CHECK26: cond.false: 5909 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5910 // CHECK26-NEXT: br label [[COND_END]] 5911 // CHECK26: cond.end: 5912 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5913 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5914 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5915 // CHECK26-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5916 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5917 // CHECK26: omp.inner.for.cond: 5918 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5919 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5920 // CHECK26-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5921 // CHECK26-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5922 // CHECK26: omp.inner.for.body: 5923 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5924 // CHECK26-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5925 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5926 // CHECK26-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5927 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 5928 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5929 // CHECK26: omp.inner.for.inc: 5930 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5931 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5932 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5933 // CHECK26-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5934 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 5935 // CHECK26: omp.inner.for.end: 5936 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5937 // CHECK26: omp.loop.exit: 5938 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5939 // CHECK26-NEXT: ret void 5940 // 5941 // 5942 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..3 5943 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5944 // CHECK26-NEXT: entry: 5945 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5946 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5947 // CHECK26-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5948 // CHECK26-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5949 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5950 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5951 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 5952 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5953 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5954 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5955 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5956 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 5957 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5958 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5959 // CHECK26-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5960 // CHECK26-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5961 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5962 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5963 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5964 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5965 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5966 // CHECK26-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5967 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5968 // CHECK26-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5969 // CHECK26-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5970 // CHECK26-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5971 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5972 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5973 // CHECK26-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5974 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5975 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5976 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5977 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 5978 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5979 // CHECK26: cond.true: 5980 // CHECK26-NEXT: br label [[COND_END:%.*]] 5981 // CHECK26: cond.false: 5982 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5983 // CHECK26-NEXT: br label [[COND_END]] 5984 // CHECK26: cond.end: 5985 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 5986 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5987 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5988 // CHECK26-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 5989 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5990 // CHECK26: omp.inner.for.cond: 5991 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5992 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5993 // CHECK26-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5994 // CHECK26-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5995 // CHECK26: omp.inner.for.body: 5996 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5997 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5998 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5999 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6000 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 6001 // CHECK26-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 6002 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 6003 // CHECK26-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6004 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6005 // CHECK26: omp.body.continue: 6006 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6007 // CHECK26: omp.inner.for.inc: 6008 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6009 // CHECK26-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 6010 // CHECK26-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6011 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 6012 // CHECK26: omp.inner.for.end: 6013 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6014 // CHECK26: omp.loop.exit: 6015 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 6016 // CHECK26-NEXT: ret void 6017 // 6018 // 6019 // CHECK26-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 6020 // CHECK26-SAME: () #[[ATTR5:[0-9]+]] { 6021 // CHECK26-NEXT: entry: 6022 // CHECK26-NEXT: call void @__tgt_register_requires(i64 1) 6023 // CHECK26-NEXT: ret void 6024 // 6025 // 6026 // CHECK27-LABEL: define {{[^@]+}}@main 6027 // CHECK27-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 6028 // CHECK27-NEXT: entry: 6029 // CHECK27-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6030 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6031 // CHECK27-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 6032 // CHECK27-NEXT: [[N:%.*]] = alloca i32, align 4 6033 // CHECK27-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 6034 // CHECK27-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 6035 // CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 6036 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 6037 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 6038 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 6039 // CHECK27-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 6040 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 6041 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6042 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6043 // CHECK27-NEXT: store i32 0, i32* [[RETVAL]], align 4 6044 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6045 // CHECK27-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 6046 // CHECK27-NEXT: store i32 100, i32* [[N]], align 4 6047 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 6048 // CHECK27-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 6049 // CHECK27-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 6050 // CHECK27-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 6051 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 6052 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 6053 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 6054 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 6055 // CHECK27-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 6056 // CHECK27-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 6057 // CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6058 // CHECK27-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 6059 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 6060 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6061 // CHECK27-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 6062 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 6063 // CHECK27-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 6064 // CHECK27-NEXT: store i64 4, i64* [[TMP10]], align 4 6065 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6066 // CHECK27-NEXT: store i8* null, i8** [[TMP11]], align 4 6067 // CHECK27-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 6068 // CHECK27-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 6069 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 6070 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 6071 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 6072 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 6073 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 6074 // CHECK27-NEXT: store i64 4, i64* [[TMP16]], align 4 6075 // CHECK27-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 6076 // CHECK27-NEXT: store i8* null, i8** [[TMP17]], align 4 6077 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 6078 // CHECK27-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 6079 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 6080 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 6081 // CHECK27-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 6082 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 6083 // CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 6084 // CHECK27-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 6085 // CHECK27-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 6086 // CHECK27-NEXT: store i8* null, i8** [[TMP23]], align 4 6087 // CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6088 // CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6089 // CHECK27-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 6090 // CHECK27-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 6091 // CHECK27-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 6092 // CHECK27-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6093 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 6094 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6095 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6096 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6097 // CHECK27-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6098 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 6099 // CHECK27-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 6100 // CHECK27-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 6101 // CHECK27-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6102 // CHECK27-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 6103 // CHECK27-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6104 // CHECK27: omp_offload.failed: 6105 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 6106 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 6107 // CHECK27: omp_offload.cont: 6108 // CHECK27-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 6109 // CHECK27-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP33]]) 6110 // CHECK27-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 6111 // CHECK27-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 6112 // CHECK27-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 6113 // CHECK27-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4 6114 // CHECK27-NEXT: ret i32 [[TMP35]] 6115 // 6116 // 6117 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 6118 // CHECK27-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 6119 // CHECK27-NEXT: entry: 6120 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6121 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6122 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6123 // CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6124 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6125 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6126 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6127 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6128 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 6129 // CHECK27-NEXT: ret void 6130 // 6131 // 6132 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined. 6133 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6134 // CHECK27-NEXT: entry: 6135 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6136 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6137 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6138 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6139 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6140 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6141 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 6142 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6143 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6144 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 6145 // CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6146 // CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6147 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6148 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6149 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4 6150 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6151 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6152 // CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6153 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6154 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6155 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6156 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6157 // CHECK27-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6158 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 6159 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 6160 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6161 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 6162 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6163 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6164 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6165 // CHECK27-NEXT: store i32 0, i32* [[I]], align 4 6166 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6167 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 6168 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6169 // CHECK27: omp.precond.then: 6170 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6171 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6172 // CHECK27-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 6173 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6174 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6175 // CHECK27-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6176 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 6177 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6178 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6179 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6180 // CHECK27-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 6181 // CHECK27-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6182 // CHECK27: cond.true: 6183 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6184 // CHECK27-NEXT: br label [[COND_END:%.*]] 6185 // CHECK27: cond.false: 6186 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6187 // CHECK27-NEXT: br label [[COND_END]] 6188 // CHECK27: cond.end: 6189 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 6190 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6191 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6192 // CHECK27-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 6193 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6194 // CHECK27: omp.inner.for.cond: 6195 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6196 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6197 // CHECK27-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 6198 // CHECK27-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6199 // CHECK27: omp.inner.for.body: 6200 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6201 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6202 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 6203 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6204 // CHECK27: omp.inner.for.inc: 6205 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6206 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6207 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 6208 // CHECK27-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6209 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 6210 // CHECK27: omp.inner.for.end: 6211 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6212 // CHECK27: omp.loop.exit: 6213 // CHECK27-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6214 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 6215 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 6216 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 6217 // CHECK27: omp.precond.end: 6218 // CHECK27-NEXT: ret void 6219 // 6220 // 6221 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1 6222 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6223 // CHECK27-NEXT: entry: 6224 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6225 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6226 // CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6227 // CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6228 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6229 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6230 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6231 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6232 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 6233 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6234 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6235 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 6236 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6237 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6238 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6239 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6240 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4 6241 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6242 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6243 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6244 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6245 // CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6246 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6247 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6248 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6249 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6250 // CHECK27-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6251 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 6252 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 6253 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6254 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 6255 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6256 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6257 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6258 // CHECK27-NEXT: store i32 0, i32* [[I]], align 4 6259 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6260 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 6261 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6262 // CHECK27: omp.precond.then: 6263 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6264 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6265 // CHECK27-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 6266 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6267 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6268 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 6269 // CHECK27-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 6270 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6271 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6272 // CHECK27-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6273 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 6274 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6275 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6276 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6277 // CHECK27-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 6278 // CHECK27-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6279 // CHECK27: cond.true: 6280 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6281 // CHECK27-NEXT: br label [[COND_END:%.*]] 6282 // CHECK27: cond.false: 6283 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6284 // CHECK27-NEXT: br label [[COND_END]] 6285 // CHECK27: cond.end: 6286 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 6287 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6288 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6289 // CHECK27-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 6290 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6291 // CHECK27: omp.inner.for.cond: 6292 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6293 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6294 // CHECK27-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 6295 // CHECK27-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6296 // CHECK27: omp.inner.for.body: 6297 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6298 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 6299 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6300 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 6301 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 6302 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 6303 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6304 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6305 // CHECK27: omp.body.continue: 6306 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6307 // CHECK27: omp.inner.for.inc: 6308 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6309 // CHECK27-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 6310 // CHECK27-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 6311 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 6312 // CHECK27: omp.inner.for.end: 6313 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6314 // CHECK27: omp.loop.exit: 6315 // CHECK27-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6316 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 6317 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 6318 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 6319 // CHECK27: omp.precond.end: 6320 // CHECK27-NEXT: ret void 6321 // 6322 // 6323 // CHECK27-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 6324 // CHECK27-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 6325 // CHECK27-NEXT: entry: 6326 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6327 // CHECK27-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 6328 // CHECK27-NEXT: [[TE:%.*]] = alloca i32, align 4 6329 // CHECK27-NEXT: [[TH:%.*]] = alloca i32, align 4 6330 // CHECK27-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 6331 // CHECK27-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 6332 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 6333 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 6334 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 6335 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 6336 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6337 // CHECK27-NEXT: store i32 0, i32* [[TE]], align 4 6338 // CHECK27-NEXT: store i32 128, i32* [[TH]], align 4 6339 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 6340 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4 6341 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4 6342 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 6343 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4 6344 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4 6345 // CHECK27-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6346 // CHECK27-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 6347 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 6348 // CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6349 // CHECK27-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 6350 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 6351 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6352 // CHECK27-NEXT: store i8* null, i8** [[TMP8]], align 4 6353 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 6354 // CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 6355 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 6356 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 6357 // CHECK27-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 6358 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 6359 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 6360 // CHECK27-NEXT: store i8* null, i8** [[TMP13]], align 4 6361 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 6362 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 6363 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4 6364 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 6365 // CHECK27-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 6366 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4 6367 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 6368 // CHECK27-NEXT: store i8* null, i8** [[TMP18]], align 4 6369 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6370 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6371 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 6372 // CHECK27-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 6373 // CHECK27-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 0) 6374 // CHECK27-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 6375 // CHECK27-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6376 // CHECK27: omp_offload.failed: 6377 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 6378 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 6379 // CHECK27: omp_offload.cont: 6380 // CHECK27-NEXT: ret i32 0 6381 // 6382 // 6383 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 6384 // CHECK27-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6385 // CHECK27-NEXT: entry: 6386 // CHECK27-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 6387 // CHECK27-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 6388 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 6389 // CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 6390 // CHECK27-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 6391 // CHECK27-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 6392 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 6393 // CHECK27-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 6394 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 6395 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 6396 // CHECK27-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 6397 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 6398 // CHECK27-NEXT: ret void 6399 // 6400 // 6401 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..2 6402 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6403 // CHECK27-NEXT: entry: 6404 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6405 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6406 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 6407 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6408 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 6409 // CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6410 // CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6411 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6412 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6413 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 6414 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6415 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6416 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 6417 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 6418 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6419 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 6420 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6421 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6422 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6423 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6424 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6425 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6426 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 6427 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6428 // CHECK27: cond.true: 6429 // CHECK27-NEXT: br label [[COND_END:%.*]] 6430 // CHECK27: cond.false: 6431 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6432 // CHECK27-NEXT: br label [[COND_END]] 6433 // CHECK27: cond.end: 6434 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6435 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6436 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6437 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6438 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6439 // CHECK27: omp.inner.for.cond: 6440 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6441 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6442 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6443 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6444 // CHECK27: omp.inner.for.body: 6445 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6446 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6447 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 6448 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6449 // CHECK27: omp.inner.for.inc: 6450 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6451 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6452 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6453 // CHECK27-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6454 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 6455 // CHECK27: omp.inner.for.end: 6456 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6457 // CHECK27: omp.loop.exit: 6458 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6459 // CHECK27-NEXT: ret void 6460 // 6461 // 6462 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..3 6463 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6464 // CHECK27-NEXT: entry: 6465 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6466 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6467 // CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6468 // CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6469 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 6470 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6471 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 6472 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6473 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6474 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6475 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6476 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 6477 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6478 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6479 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6480 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6481 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 6482 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 6483 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6484 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 6485 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6486 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6487 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6488 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6489 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6490 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6491 // CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6492 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 6493 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6494 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6495 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 6496 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6497 // CHECK27: cond.true: 6498 // CHECK27-NEXT: br label [[COND_END:%.*]] 6499 // CHECK27: cond.false: 6500 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6501 // CHECK27-NEXT: br label [[COND_END]] 6502 // CHECK27: cond.end: 6503 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6504 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6505 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6506 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 6507 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6508 // CHECK27: omp.inner.for.cond: 6509 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6510 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6511 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6512 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6513 // CHECK27: omp.inner.for.body: 6514 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6515 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6516 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6517 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6518 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 6519 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 6520 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6521 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6522 // CHECK27: omp.body.continue: 6523 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6524 // CHECK27: omp.inner.for.inc: 6525 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6526 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 6527 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 6528 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 6529 // CHECK27: omp.inner.for.end: 6530 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6531 // CHECK27: omp.loop.exit: 6532 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 6533 // CHECK27-NEXT: ret void 6534 // 6535 // 6536 // CHECK27-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 6537 // CHECK27-SAME: () #[[ATTR5:[0-9]+]] { 6538 // CHECK27-NEXT: entry: 6539 // CHECK27-NEXT: call void @__tgt_register_requires(i64 1) 6540 // CHECK27-NEXT: ret void 6541 // 6542 // 6543 // CHECK28-LABEL: define {{[^@]+}}@main 6544 // CHECK28-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 6545 // CHECK28-NEXT: entry: 6546 // CHECK28-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6547 // CHECK28-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6548 // CHECK28-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 6549 // CHECK28-NEXT: [[N:%.*]] = alloca i32, align 4 6550 // CHECK28-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 6551 // CHECK28-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 6552 // CHECK28-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 6553 // CHECK28-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 6554 // CHECK28-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 6555 // CHECK28-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 6556 // CHECK28-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 6557 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 6558 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6559 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6560 // CHECK28-NEXT: store i32 0, i32* [[RETVAL]], align 4 6561 // CHECK28-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6562 // CHECK28-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 6563 // CHECK28-NEXT: store i32 100, i32* [[N]], align 4 6564 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 6565 // CHECK28-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 6566 // CHECK28-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 6567 // CHECK28-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 6568 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 6569 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 6570 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 6571 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 6572 // CHECK28-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 6573 // CHECK28-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 6574 // CHECK28-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6575 // CHECK28-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 6576 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 6577 // CHECK28-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6578 // CHECK28-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 6579 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 6580 // CHECK28-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 6581 // CHECK28-NEXT: store i64 4, i64* [[TMP10]], align 4 6582 // CHECK28-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6583 // CHECK28-NEXT: store i8* null, i8** [[TMP11]], align 4 6584 // CHECK28-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 6585 // CHECK28-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 6586 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 6587 // CHECK28-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 6588 // CHECK28-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 6589 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 6590 // CHECK28-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 6591 // CHECK28-NEXT: store i64 4, i64* [[TMP16]], align 4 6592 // CHECK28-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 6593 // CHECK28-NEXT: store i8* null, i8** [[TMP17]], align 4 6594 // CHECK28-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 6595 // CHECK28-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 6596 // CHECK28-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 6597 // CHECK28-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 6598 // CHECK28-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 6599 // CHECK28-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 6600 // CHECK28-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 6601 // CHECK28-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 6602 // CHECK28-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 6603 // CHECK28-NEXT: store i8* null, i8** [[TMP23]], align 4 6604 // CHECK28-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6605 // CHECK28-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6606 // CHECK28-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 6607 // CHECK28-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 6608 // CHECK28-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 6609 // CHECK28-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6610 // CHECK28-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 6611 // CHECK28-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6612 // CHECK28-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6613 // CHECK28-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6614 // CHECK28-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6615 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 6616 // CHECK28-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 6617 // CHECK28-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 6618 // CHECK28-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6619 // CHECK28-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 6620 // CHECK28-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6621 // CHECK28: omp_offload.failed: 6622 // CHECK28-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 6623 // CHECK28-NEXT: br label [[OMP_OFFLOAD_CONT]] 6624 // CHECK28: omp_offload.cont: 6625 // CHECK28-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 6626 // CHECK28-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP33]]) 6627 // CHECK28-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 6628 // CHECK28-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 6629 // CHECK28-NEXT: call void @llvm.stackrestore(i8* [[TMP34]]) 6630 // CHECK28-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4 6631 // CHECK28-NEXT: ret i32 [[TMP35]] 6632 // 6633 // 6634 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 6635 // CHECK28-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 6636 // CHECK28-NEXT: entry: 6637 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6638 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6639 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6640 // CHECK28-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6641 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6642 // CHECK28-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6643 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6644 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6645 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 6646 // CHECK28-NEXT: ret void 6647 // 6648 // 6649 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined. 6650 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6651 // CHECK28-NEXT: entry: 6652 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6653 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6654 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6655 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6656 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6657 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6658 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 6659 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6660 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6661 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 6662 // CHECK28-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6663 // CHECK28-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6664 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6665 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6666 // CHECK28-NEXT: [[I3:%.*]] = alloca i32, align 4 6667 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6668 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6669 // CHECK28-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6670 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6671 // CHECK28-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6672 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6673 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6674 // CHECK28-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6675 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 6676 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 6677 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6678 // CHECK28-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 6679 // CHECK28-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6680 // CHECK28-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6681 // CHECK28-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6682 // CHECK28-NEXT: store i32 0, i32* [[I]], align 4 6683 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6684 // CHECK28-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 6685 // CHECK28-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6686 // CHECK28: omp.precond.then: 6687 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6688 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6689 // CHECK28-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 6690 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6691 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6692 // CHECK28-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6693 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 6694 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6695 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6696 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6697 // CHECK28-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 6698 // CHECK28-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6699 // CHECK28: cond.true: 6700 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6701 // CHECK28-NEXT: br label [[COND_END:%.*]] 6702 // CHECK28: cond.false: 6703 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6704 // CHECK28-NEXT: br label [[COND_END]] 6705 // CHECK28: cond.end: 6706 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 6707 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6708 // CHECK28-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6709 // CHECK28-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 6710 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6711 // CHECK28: omp.inner.for.cond: 6712 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6713 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6714 // CHECK28-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 6715 // CHECK28-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6716 // CHECK28: omp.inner.for.body: 6717 // CHECK28-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6718 // CHECK28-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6719 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 6720 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6721 // CHECK28: omp.inner.for.inc: 6722 // CHECK28-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6723 // CHECK28-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6724 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 6725 // CHECK28-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6726 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 6727 // CHECK28: omp.inner.for.end: 6728 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6729 // CHECK28: omp.loop.exit: 6730 // CHECK28-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6731 // CHECK28-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 6732 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 6733 // CHECK28-NEXT: br label [[OMP_PRECOND_END]] 6734 // CHECK28: omp.precond.end: 6735 // CHECK28-NEXT: ret void 6736 // 6737 // 6738 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..1 6739 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6740 // CHECK28-NEXT: entry: 6741 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6742 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6743 // CHECK28-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6744 // CHECK28-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6745 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6746 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6747 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6748 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6749 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 6750 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6751 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6752 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 6753 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6754 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6755 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6756 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6757 // CHECK28-NEXT: [[I3:%.*]] = alloca i32, align 4 6758 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6759 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6760 // CHECK28-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6761 // CHECK28-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6762 // CHECK28-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6763 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6764 // CHECK28-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6765 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6766 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6767 // CHECK28-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6768 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 6769 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 6770 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6771 // CHECK28-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 6772 // CHECK28-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6773 // CHECK28-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6774 // CHECK28-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6775 // CHECK28-NEXT: store i32 0, i32* [[I]], align 4 6776 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6777 // CHECK28-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 6778 // CHECK28-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6779 // CHECK28: omp.precond.then: 6780 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6781 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6782 // CHECK28-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 6783 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6784 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6785 // CHECK28-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 6786 // CHECK28-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 6787 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6788 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6789 // CHECK28-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6790 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 6791 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6792 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6793 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6794 // CHECK28-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 6795 // CHECK28-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6796 // CHECK28: cond.true: 6797 // CHECK28-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6798 // CHECK28-NEXT: br label [[COND_END:%.*]] 6799 // CHECK28: cond.false: 6800 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6801 // CHECK28-NEXT: br label [[COND_END]] 6802 // CHECK28: cond.end: 6803 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 6804 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6805 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6806 // CHECK28-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 6807 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6808 // CHECK28: omp.inner.for.cond: 6809 // CHECK28-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6810 // CHECK28-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6811 // CHECK28-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 6812 // CHECK28-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6813 // CHECK28: omp.inner.for.body: 6814 // CHECK28-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6815 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 6816 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6817 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 6818 // CHECK28-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 6819 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 6820 // CHECK28-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6821 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6822 // CHECK28: omp.body.continue: 6823 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6824 // CHECK28: omp.inner.for.inc: 6825 // CHECK28-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6826 // CHECK28-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 6827 // CHECK28-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 6828 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 6829 // CHECK28: omp.inner.for.end: 6830 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6831 // CHECK28: omp.loop.exit: 6832 // CHECK28-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6833 // CHECK28-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 6834 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 6835 // CHECK28-NEXT: br label [[OMP_PRECOND_END]] 6836 // CHECK28: omp.precond.end: 6837 // CHECK28-NEXT: ret void 6838 // 6839 // 6840 // CHECK28-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 6841 // CHECK28-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 6842 // CHECK28-NEXT: entry: 6843 // CHECK28-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6844 // CHECK28-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 6845 // CHECK28-NEXT: [[TE:%.*]] = alloca i32, align 4 6846 // CHECK28-NEXT: [[TH:%.*]] = alloca i32, align 4 6847 // CHECK28-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 6848 // CHECK28-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 6849 // CHECK28-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 6850 // CHECK28-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 6851 // CHECK28-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 6852 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 6853 // CHECK28-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6854 // CHECK28-NEXT: store i32 0, i32* [[TE]], align 4 6855 // CHECK28-NEXT: store i32 128, i32* [[TH]], align 4 6856 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 6857 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4 6858 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4 6859 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 6860 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4 6861 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4 6862 // CHECK28-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6863 // CHECK28-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 6864 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 6865 // CHECK28-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6866 // CHECK28-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 6867 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 6868 // CHECK28-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6869 // CHECK28-NEXT: store i8* null, i8** [[TMP8]], align 4 6870 // CHECK28-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 6871 // CHECK28-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 6872 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 6873 // CHECK28-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 6874 // CHECK28-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 6875 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 6876 // CHECK28-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 6877 // CHECK28-NEXT: store i8* null, i8** [[TMP13]], align 4 6878 // CHECK28-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 6879 // CHECK28-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 6880 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4 6881 // CHECK28-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 6882 // CHECK28-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 6883 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4 6884 // CHECK28-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 6885 // CHECK28-NEXT: store i8* null, i8** [[TMP18]], align 4 6886 // CHECK28-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6887 // CHECK28-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6888 // CHECK28-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 6889 // CHECK28-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 6890 // CHECK28-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 0) 6891 // CHECK28-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 6892 // CHECK28-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6893 // CHECK28: omp_offload.failed: 6894 // CHECK28-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 6895 // CHECK28-NEXT: br label [[OMP_OFFLOAD_CONT]] 6896 // CHECK28: omp_offload.cont: 6897 // CHECK28-NEXT: ret i32 0 6898 // 6899 // 6900 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 6901 // CHECK28-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6902 // CHECK28-NEXT: entry: 6903 // CHECK28-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 6904 // CHECK28-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 6905 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 6906 // CHECK28-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 6907 // CHECK28-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 6908 // CHECK28-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 6909 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 6910 // CHECK28-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 6911 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 6912 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 6913 // CHECK28-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 6914 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 6915 // CHECK28-NEXT: ret void 6916 // 6917 // 6918 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..2 6919 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6920 // CHECK28-NEXT: entry: 6921 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6922 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6923 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 6924 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6925 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 6926 // CHECK28-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6927 // CHECK28-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6928 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6929 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6930 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 6931 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6932 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6933 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 6934 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 6935 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6936 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 6937 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6938 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6939 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6940 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6941 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6942 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6943 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 6944 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6945 // CHECK28: cond.true: 6946 // CHECK28-NEXT: br label [[COND_END:%.*]] 6947 // CHECK28: cond.false: 6948 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6949 // CHECK28-NEXT: br label [[COND_END]] 6950 // CHECK28: cond.end: 6951 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6952 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6953 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6954 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6955 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6956 // CHECK28: omp.inner.for.cond: 6957 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6958 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6959 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6960 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6961 // CHECK28: omp.inner.for.body: 6962 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6963 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6964 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 6965 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6966 // CHECK28: omp.inner.for.inc: 6967 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6968 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6969 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6970 // CHECK28-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6971 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 6972 // CHECK28: omp.inner.for.end: 6973 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6974 // CHECK28: omp.loop.exit: 6975 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6976 // CHECK28-NEXT: ret void 6977 // 6978 // 6979 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..3 6980 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6981 // CHECK28-NEXT: entry: 6982 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6983 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6984 // CHECK28-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6985 // CHECK28-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6986 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 6987 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6988 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 6989 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6990 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6991 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6992 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6993 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 6994 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6995 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6996 // CHECK28-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6997 // CHECK28-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6998 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 6999 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 7000 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7001 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7002 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7003 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7004 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 7005 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 7006 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7007 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7008 // CHECK28-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7009 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 7010 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7011 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7012 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 7013 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7014 // CHECK28: cond.true: 7015 // CHECK28-NEXT: br label [[COND_END:%.*]] 7016 // CHECK28: cond.false: 7017 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7018 // CHECK28-NEXT: br label [[COND_END]] 7019 // CHECK28: cond.end: 7020 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 7021 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7022 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7023 // CHECK28-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 7024 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7025 // CHECK28: omp.inner.for.cond: 7026 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7027 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7028 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 7029 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7030 // CHECK28: omp.inner.for.body: 7031 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7032 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 7033 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7034 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7035 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 7036 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 7037 // CHECK28-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7038 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7039 // CHECK28: omp.body.continue: 7040 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7041 // CHECK28: omp.inner.for.inc: 7042 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7043 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 7044 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 7045 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 7046 // CHECK28: omp.inner.for.end: 7047 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7048 // CHECK28: omp.loop.exit: 7049 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 7050 // CHECK28-NEXT: ret void 7051 // 7052 // 7053 // CHECK28-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 7054 // CHECK28-SAME: () #[[ATTR5:[0-9]+]] { 7055 // CHECK28-NEXT: entry: 7056 // CHECK28-NEXT: call void @__tgt_register_requires(i64 1) 7057 // CHECK28-NEXT: ret void 7058 // 7059 // 7060 // CHECK29-LABEL: define {{[^@]+}}@main 7061 // CHECK29-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 7062 // CHECK29-NEXT: entry: 7063 // CHECK29-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7064 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7065 // CHECK29-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 7066 // CHECK29-NEXT: [[N:%.*]] = alloca i32, align 4 7067 // CHECK29-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 7068 // CHECK29-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 7069 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4 7070 // CHECK29-NEXT: store i32 0, i32* [[RETVAL]], align 4 7071 // CHECK29-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7072 // CHECK29-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 7073 // CHECK29-NEXT: store i32 100, i32* [[N]], align 4 7074 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 7075 // CHECK29-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 7076 // CHECK29-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 7077 // CHECK29-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 7078 // CHECK29-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 7079 // CHECK29-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 7080 // CHECK29-NEXT: store i32 0, i32* [[I]], align 4 7081 // CHECK29-NEXT: br label [[FOR_COND:%.*]] 7082 // CHECK29: for.cond: 7083 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 7084 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 7085 // CHECK29-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]] 7086 // CHECK29-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 7087 // CHECK29: for.body: 7088 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 7089 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 7090 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 7091 // CHECK29-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7092 // CHECK29-NEXT: br label [[FOR_INC:%.*]] 7093 // CHECK29: for.inc: 7094 // CHECK29-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 7095 // CHECK29-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 7096 // CHECK29-NEXT: store i32 [[INC]], i32* [[I]], align 4 7097 // CHECK29-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 7098 // CHECK29: for.end: 7099 // CHECK29-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 7100 // CHECK29-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP7]]) 7101 // CHECK29-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 7102 // CHECK29-NEXT: [[TMP8:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 7103 // CHECK29-NEXT: call void @llvm.stackrestore(i8* [[TMP8]]) 7104 // CHECK29-NEXT: [[TMP9:%.*]] = load i32, i32* [[RETVAL]], align 4 7105 // CHECK29-NEXT: ret i32 [[TMP9]] 7106 // 7107 // 7108 // CHECK29-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 7109 // CHECK29-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 7110 // CHECK29-NEXT: entry: 7111 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7112 // CHECK29-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 7113 // CHECK29-NEXT: [[TE:%.*]] = alloca i32, align 4 7114 // CHECK29-NEXT: [[TH:%.*]] = alloca i32, align 4 7115 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4 7116 // CHECK29-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7117 // CHECK29-NEXT: store i32 0, i32* [[TE]], align 4 7118 // CHECK29-NEXT: store i32 128, i32* [[TH]], align 4 7119 // CHECK29-NEXT: store i32 0, i32* [[I]], align 4 7120 // CHECK29-NEXT: br label [[FOR_COND:%.*]] 7121 // CHECK29: for.cond: 7122 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 7123 // CHECK29-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 7124 // CHECK29-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 7125 // CHECK29: for.body: 7126 // CHECK29-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 7127 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64 7128 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 7129 // CHECK29-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7130 // CHECK29-NEXT: br label [[FOR_INC:%.*]] 7131 // CHECK29: for.inc: 7132 // CHECK29-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 7133 // CHECK29-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 7134 // CHECK29-NEXT: store i32 [[INC]], i32* [[I]], align 4 7135 // CHECK29-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 7136 // CHECK29: for.end: 7137 // CHECK29-NEXT: ret i32 0 7138 // 7139 // 7140 // CHECK30-LABEL: define {{[^@]+}}@main 7141 // CHECK30-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 7142 // CHECK30-NEXT: entry: 7143 // CHECK30-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7144 // CHECK30-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7145 // CHECK30-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 7146 // CHECK30-NEXT: [[N:%.*]] = alloca i32, align 4 7147 // CHECK30-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 7148 // CHECK30-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 7149 // CHECK30-NEXT: [[I:%.*]] = alloca i32, align 4 7150 // CHECK30-NEXT: store i32 0, i32* [[RETVAL]], align 4 7151 // CHECK30-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7152 // CHECK30-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 7153 // CHECK30-NEXT: store i32 100, i32* [[N]], align 4 7154 // CHECK30-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 7155 // CHECK30-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 7156 // CHECK30-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 7157 // CHECK30-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 7158 // CHECK30-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 7159 // CHECK30-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 7160 // CHECK30-NEXT: store i32 0, i32* [[I]], align 4 7161 // CHECK30-NEXT: br label [[FOR_COND:%.*]] 7162 // CHECK30: for.cond: 7163 // CHECK30-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 7164 // CHECK30-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 7165 // CHECK30-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]] 7166 // CHECK30-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 7167 // CHECK30: for.body: 7168 // CHECK30-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 7169 // CHECK30-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 7170 // CHECK30-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 7171 // CHECK30-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7172 // CHECK30-NEXT: br label [[FOR_INC:%.*]] 7173 // CHECK30: for.inc: 7174 // CHECK30-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 7175 // CHECK30-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 7176 // CHECK30-NEXT: store i32 [[INC]], i32* [[I]], align 4 7177 // CHECK30-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 7178 // CHECK30: for.end: 7179 // CHECK30-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 7180 // CHECK30-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP7]]) 7181 // CHECK30-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 7182 // CHECK30-NEXT: [[TMP8:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 7183 // CHECK30-NEXT: call void @llvm.stackrestore(i8* [[TMP8]]) 7184 // CHECK30-NEXT: [[TMP9:%.*]] = load i32, i32* [[RETVAL]], align 4 7185 // CHECK30-NEXT: ret i32 [[TMP9]] 7186 // 7187 // 7188 // CHECK30-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 7189 // CHECK30-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 7190 // CHECK30-NEXT: entry: 7191 // CHECK30-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7192 // CHECK30-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 7193 // CHECK30-NEXT: [[TE:%.*]] = alloca i32, align 4 7194 // CHECK30-NEXT: [[TH:%.*]] = alloca i32, align 4 7195 // CHECK30-NEXT: [[I:%.*]] = alloca i32, align 4 7196 // CHECK30-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7197 // CHECK30-NEXT: store i32 0, i32* [[TE]], align 4 7198 // CHECK30-NEXT: store i32 128, i32* [[TH]], align 4 7199 // CHECK30-NEXT: store i32 0, i32* [[I]], align 4 7200 // CHECK30-NEXT: br label [[FOR_COND:%.*]] 7201 // CHECK30: for.cond: 7202 // CHECK30-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 7203 // CHECK30-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 7204 // CHECK30-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 7205 // CHECK30: for.body: 7206 // CHECK30-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 7207 // CHECK30-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64 7208 // CHECK30-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 7209 // CHECK30-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7210 // CHECK30-NEXT: br label [[FOR_INC:%.*]] 7211 // CHECK30: for.inc: 7212 // CHECK30-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 7213 // CHECK30-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 7214 // CHECK30-NEXT: store i32 [[INC]], i32* [[I]], align 4 7215 // CHECK30-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 7216 // CHECK30: for.end: 7217 // CHECK30-NEXT: ret i32 0 7218 // 7219 // 7220 // CHECK31-LABEL: define {{[^@]+}}@main 7221 // CHECK31-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 7222 // CHECK31-NEXT: entry: 7223 // CHECK31-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7224 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7225 // CHECK31-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 7226 // CHECK31-NEXT: [[N:%.*]] = alloca i32, align 4 7227 // CHECK31-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 7228 // CHECK31-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 7229 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4 7230 // CHECK31-NEXT: store i32 0, i32* [[RETVAL]], align 4 7231 // CHECK31-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7232 // CHECK31-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 7233 // CHECK31-NEXT: store i32 100, i32* [[N]], align 4 7234 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 7235 // CHECK31-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 7236 // CHECK31-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 7237 // CHECK31-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 7238 // CHECK31-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 7239 // CHECK31-NEXT: store i32 0, i32* [[I]], align 4 7240 // CHECK31-NEXT: br label [[FOR_COND:%.*]] 7241 // CHECK31: for.cond: 7242 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 7243 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 7244 // CHECK31-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]] 7245 // CHECK31-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 7246 // CHECK31: for.body: 7247 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 7248 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]] 7249 // CHECK31-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7250 // CHECK31-NEXT: br label [[FOR_INC:%.*]] 7251 // CHECK31: for.inc: 7252 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 7253 // CHECK31-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 7254 // CHECK31-NEXT: store i32 [[INC]], i32* [[I]], align 4 7255 // CHECK31-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 7256 // CHECK31: for.end: 7257 // CHECK31-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 7258 // CHECK31-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP6]]) 7259 // CHECK31-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 7260 // CHECK31-NEXT: [[TMP7:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 7261 // CHECK31-NEXT: call void @llvm.stackrestore(i8* [[TMP7]]) 7262 // CHECK31-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 7263 // CHECK31-NEXT: ret i32 [[TMP8]] 7264 // 7265 // 7266 // CHECK31-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 7267 // CHECK31-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 7268 // CHECK31-NEXT: entry: 7269 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7270 // CHECK31-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 7271 // CHECK31-NEXT: [[TE:%.*]] = alloca i32, align 4 7272 // CHECK31-NEXT: [[TH:%.*]] = alloca i32, align 4 7273 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4 7274 // CHECK31-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7275 // CHECK31-NEXT: store i32 0, i32* [[TE]], align 4 7276 // CHECK31-NEXT: store i32 128, i32* [[TH]], align 4 7277 // CHECK31-NEXT: store i32 0, i32* [[I]], align 4 7278 // CHECK31-NEXT: br label [[FOR_COND:%.*]] 7279 // CHECK31: for.cond: 7280 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 7281 // CHECK31-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 7282 // CHECK31-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 7283 // CHECK31: for.body: 7284 // CHECK31-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 7285 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP1]] 7286 // CHECK31-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7287 // CHECK31-NEXT: br label [[FOR_INC:%.*]] 7288 // CHECK31: for.inc: 7289 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 7290 // CHECK31-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 7291 // CHECK31-NEXT: store i32 [[INC]], i32* [[I]], align 4 7292 // CHECK31-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 7293 // CHECK31: for.end: 7294 // CHECK31-NEXT: ret i32 0 7295 // 7296 // 7297 // CHECK32-LABEL: define {{[^@]+}}@main 7298 // CHECK32-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 7299 // CHECK32-NEXT: entry: 7300 // CHECK32-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7301 // CHECK32-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7302 // CHECK32-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 7303 // CHECK32-NEXT: [[N:%.*]] = alloca i32, align 4 7304 // CHECK32-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 7305 // CHECK32-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 7306 // CHECK32-NEXT: [[I:%.*]] = alloca i32, align 4 7307 // CHECK32-NEXT: store i32 0, i32* [[RETVAL]], align 4 7308 // CHECK32-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7309 // CHECK32-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 7310 // CHECK32-NEXT: store i32 100, i32* [[N]], align 4 7311 // CHECK32-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 7312 // CHECK32-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 7313 // CHECK32-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 7314 // CHECK32-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 7315 // CHECK32-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 7316 // CHECK32-NEXT: store i32 0, i32* [[I]], align 4 7317 // CHECK32-NEXT: br label [[FOR_COND:%.*]] 7318 // CHECK32: for.cond: 7319 // CHECK32-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 7320 // CHECK32-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 7321 // CHECK32-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]] 7322 // CHECK32-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 7323 // CHECK32: for.body: 7324 // CHECK32-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 7325 // CHECK32-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]] 7326 // CHECK32-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7327 // CHECK32-NEXT: br label [[FOR_INC:%.*]] 7328 // CHECK32: for.inc: 7329 // CHECK32-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 7330 // CHECK32-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 7331 // CHECK32-NEXT: store i32 [[INC]], i32* [[I]], align 4 7332 // CHECK32-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 7333 // CHECK32: for.end: 7334 // CHECK32-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 7335 // CHECK32-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP6]]) 7336 // CHECK32-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 7337 // CHECK32-NEXT: [[TMP7:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 7338 // CHECK32-NEXT: call void @llvm.stackrestore(i8* [[TMP7]]) 7339 // CHECK32-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 7340 // CHECK32-NEXT: ret i32 [[TMP8]] 7341 // 7342 // 7343 // CHECK32-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 7344 // CHECK32-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 7345 // CHECK32-NEXT: entry: 7346 // CHECK32-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7347 // CHECK32-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 7348 // CHECK32-NEXT: [[TE:%.*]] = alloca i32, align 4 7349 // CHECK32-NEXT: [[TH:%.*]] = alloca i32, align 4 7350 // CHECK32-NEXT: [[I:%.*]] = alloca i32, align 4 7351 // CHECK32-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7352 // CHECK32-NEXT: store i32 0, i32* [[TE]], align 4 7353 // CHECK32-NEXT: store i32 128, i32* [[TH]], align 4 7354 // CHECK32-NEXT: store i32 0, i32* [[I]], align 4 7355 // CHECK32-NEXT: br label [[FOR_COND:%.*]] 7356 // CHECK32: for.cond: 7357 // CHECK32-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 7358 // CHECK32-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10 7359 // CHECK32-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 7360 // CHECK32: for.body: 7361 // CHECK32-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 7362 // CHECK32-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP1]] 7363 // CHECK32-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7364 // CHECK32-NEXT: br label [[FOR_INC:%.*]] 7365 // CHECK32: for.inc: 7366 // CHECK32-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 7367 // CHECK32-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 7368 // CHECK32-NEXT: store i32 [[INC]], i32* [[I]], align 4 7369 // CHECK32-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 7370 // CHECK32: for.end: 7371 // CHECK32-NEXT: ret i32 0 7372 // 7373