1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK16 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var) 51 for (int i = 0; i < 2; ++i) { 52 vec[i] = t_var; 53 s_arr[i] = var; 54 } 55 return T(); 56 } 57 58 int main() { 59 static int svar; 60 volatile double g; 61 volatile double &g1 = g; 62 63 #ifdef LAMBDA 64 [&]() { 65 static float sfvar; 66 67 #pragma omp target 68 #pragma omp teams distribute lastprivate(g, g1, svar, sfvar) 69 for (int i = 0; i < 2; ++i) { 70 // loop variables 71 72 // init private variables 73 g = 1; 74 g1 = 1; 75 svar = 3; 76 sfvar = 4.0; 77 78 79 [&]() { 80 g = 2; 81 g1 = 2; 82 svar = 4; 83 sfvar = 8.0; 84 85 }(); 86 } 87 }(); 88 return 0; 89 #else 90 S<float> test; 91 int t_var = 0; 92 int vec[] = {1, 2}; 93 S<float> s_arr[] = {1, 2}; 94 S<float> &var = test; 95 96 #pragma omp target 97 #pragma omp teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var, svar) 98 for (int i = 0; i < 2; ++i) { 99 vec[i] = t_var; 100 s_arr[i] = var; 101 } 102 int i; 103 104 return tmain<int>(); 105 #endif 106 } 107 108 109 // skip loop variables 110 111 // copy from parameters to local address variables 112 113 // load content of local address variables 114 // the distribute loop 115 // assignment: vec[i] = t_var; 116 117 // assignment: s_arr[i] = var; 118 119 // lastprivates 120 121 122 // template tmain 123 124 125 126 // skip alloca of global_tid and bound_tid 127 // skip loop variables 128 129 // skip init of bound and global tid 130 // copy from parameters to local address variables 131 132 // load content of local address variables 133 // assignment: vec[i] = t_var; 134 135 // assignment: s_arr[i] = var; 136 137 // lastprivates 138 139 #endif 140 // CHECK1-LABEL: define {{[^@]+}}@main 141 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 142 // CHECK1-NEXT: entry: 143 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 144 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 145 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 146 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 147 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 148 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 149 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 150 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8 151 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 152 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 153 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 154 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 155 // CHECK1-NEXT: ret i32 0 156 // 157 // 158 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 159 // CHECK1-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 160 // CHECK1-NEXT: entry: 161 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 162 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 163 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 164 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 165 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 166 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 167 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 168 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 169 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 170 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 171 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 172 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 173 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 174 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 175 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 176 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 177 // CHECK1-NEXT: ret void 178 // 179 // 180 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 181 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 182 // CHECK1-NEXT: entry: 183 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 184 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 185 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 186 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 187 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 188 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 189 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 190 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 193 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 194 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 195 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 196 // CHECK1-NEXT: [[G2:%.*]] = alloca double, align 8 197 // CHECK1-NEXT: [[G13:%.*]] = alloca double, align 8 198 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca double*, align 8 199 // CHECK1-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 201 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 202 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 203 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 204 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 205 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 206 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 207 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 208 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 209 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 210 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 211 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 212 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 213 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 214 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 215 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 216 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 217 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 218 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 219 // CHECK1-NEXT: store double* [[G13]], double** [[_TMP4]], align 8 220 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 221 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 222 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 223 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 224 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 225 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 226 // CHECK1: cond.true: 227 // CHECK1-NEXT: br label [[COND_END:%.*]] 228 // CHECK1: cond.false: 229 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 230 // CHECK1-NEXT: br label [[COND_END]] 231 // CHECK1: cond.end: 232 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 233 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 234 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 235 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 236 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 237 // CHECK1: omp.inner.for.cond: 238 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 239 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 240 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 241 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 242 // CHECK1: omp.inner.for.body: 243 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 244 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 245 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 246 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 247 // CHECK1-NEXT: store double 1.000000e+00, double* [[G2]], align 8 248 // CHECK1-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 8 249 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP13]], align 8 250 // CHECK1-NEXT: store i32 3, i32* [[SVAR5]], align 4 251 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 252 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 253 // CHECK1-NEXT: store double* [[G2]], double** [[TMP14]], align 8 254 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 255 // CHECK1-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 8 256 // CHECK1-NEXT: store double* [[TMP16]], double** [[TMP15]], align 8 257 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 258 // CHECK1-NEXT: store i32* [[SVAR5]], i32** [[TMP17]], align 8 259 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 260 // CHECK1-NEXT: store float* [[SFVAR6]], float** [[TMP18]], align 8 261 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 262 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 263 // CHECK1: omp.body.continue: 264 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 265 // CHECK1: omp.inner.for.inc: 266 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 267 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 268 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 269 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 270 // CHECK1: omp.inner.for.end: 271 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 272 // CHECK1: omp.loop.exit: 273 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 274 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 275 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 276 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 277 // CHECK1: .omp.lastprivate.then: 278 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[G2]], align 8 279 // CHECK1-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 280 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP4]], align 8 281 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 8 282 // CHECK1-NEXT: store volatile double [[TMP24]], double* [[TMP4]], align 8 283 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR5]], align 4 284 // CHECK1-NEXT: store i32 [[TMP25]], i32* [[TMP2]], align 4 285 // CHECK1-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR6]], align 4 286 // CHECK1-NEXT: store float [[TMP26]], float* [[TMP3]], align 4 287 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 288 // CHECK1: .omp.lastprivate.done: 289 // CHECK1-NEXT: ret void 290 // 291 // 292 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 293 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 294 // CHECK1-NEXT: entry: 295 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 296 // CHECK1-NEXT: ret void 297 // 298 // 299 // CHECK2-LABEL: define {{[^@]+}}@main 300 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 301 // CHECK2-NEXT: entry: 302 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 303 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 304 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 305 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 306 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 307 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 308 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 309 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8 310 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 311 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 312 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 313 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 314 // CHECK2-NEXT: ret i32 0 315 // 316 // 317 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 318 // CHECK2-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 319 // CHECK2-NEXT: entry: 320 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 321 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 322 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 323 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 324 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 325 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 326 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 327 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 328 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 329 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 330 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 331 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 332 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 333 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 334 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 335 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 336 // CHECK2-NEXT: ret void 337 // 338 // 339 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 340 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 341 // CHECK2-NEXT: entry: 342 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 343 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 344 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 345 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 346 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 347 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 348 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 349 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 350 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 351 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 352 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 353 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 354 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 355 // CHECK2-NEXT: [[G2:%.*]] = alloca double, align 8 356 // CHECK2-NEXT: [[G13:%.*]] = alloca double, align 8 357 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca double*, align 8 358 // CHECK2-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 359 // CHECK2-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 360 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 361 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 362 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 363 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 364 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 365 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 366 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 367 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 368 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 369 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 370 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 371 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 372 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 373 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 374 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 375 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 376 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 377 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 378 // CHECK2-NEXT: store double* [[G13]], double** [[_TMP4]], align 8 379 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 380 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 381 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 382 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 383 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 384 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 385 // CHECK2: cond.true: 386 // CHECK2-NEXT: br label [[COND_END:%.*]] 387 // CHECK2: cond.false: 388 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 389 // CHECK2-NEXT: br label [[COND_END]] 390 // CHECK2: cond.end: 391 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 392 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 393 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 394 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 395 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 396 // CHECK2: omp.inner.for.cond: 397 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 398 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 399 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 400 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 401 // CHECK2: omp.inner.for.body: 402 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 403 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 404 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 405 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 406 // CHECK2-NEXT: store double 1.000000e+00, double* [[G2]], align 8 407 // CHECK2-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 8 408 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP13]], align 8 409 // CHECK2-NEXT: store i32 3, i32* [[SVAR5]], align 4 410 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 411 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 412 // CHECK2-NEXT: store double* [[G2]], double** [[TMP14]], align 8 413 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 414 // CHECK2-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 8 415 // CHECK2-NEXT: store double* [[TMP16]], double** [[TMP15]], align 8 416 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 417 // CHECK2-NEXT: store i32* [[SVAR5]], i32** [[TMP17]], align 8 418 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 419 // CHECK2-NEXT: store float* [[SFVAR6]], float** [[TMP18]], align 8 420 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 421 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 422 // CHECK2: omp.body.continue: 423 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 424 // CHECK2: omp.inner.for.inc: 425 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 426 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 427 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 428 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 429 // CHECK2: omp.inner.for.end: 430 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 431 // CHECK2: omp.loop.exit: 432 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 433 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 434 // CHECK2-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 435 // CHECK2-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 436 // CHECK2: .omp.lastprivate.then: 437 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[G2]], align 8 438 // CHECK2-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 439 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP4]], align 8 440 // CHECK2-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 8 441 // CHECK2-NEXT: store volatile double [[TMP24]], double* [[TMP4]], align 8 442 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR5]], align 4 443 // CHECK2-NEXT: store i32 [[TMP25]], i32* [[TMP2]], align 4 444 // CHECK2-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR6]], align 4 445 // CHECK2-NEXT: store float [[TMP26]], float* [[TMP3]], align 4 446 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 447 // CHECK2: .omp.lastprivate.done: 448 // CHECK2-NEXT: ret void 449 // 450 // 451 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 452 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 453 // CHECK2-NEXT: entry: 454 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 455 // CHECK2-NEXT: ret void 456 // 457 // 458 // CHECK3-LABEL: define {{[^@]+}}@main 459 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 460 // CHECK3-NEXT: entry: 461 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 462 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 463 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 464 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 465 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 466 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 467 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 468 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4 469 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 470 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 471 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 472 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 473 // CHECK3-NEXT: ret i32 0 474 // 475 // 476 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 477 // CHECK3-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 478 // CHECK3-NEXT: entry: 479 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 480 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 481 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 482 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 483 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 484 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 485 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 486 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 487 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 488 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 489 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 490 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 491 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 492 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 493 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 494 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 495 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 496 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8 497 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 498 // CHECK3-NEXT: [[TMP4:%.*]] = load double, double* [[TMP3]], align 4 499 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8 500 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 501 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 502 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 503 // CHECK3-NEXT: ret void 504 // 505 // 506 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 507 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 508 // CHECK3-NEXT: entry: 509 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 510 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 511 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 512 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 513 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 514 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 515 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 516 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 517 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 518 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 519 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 520 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 521 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 522 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 523 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 524 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 525 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 526 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 527 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 528 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 529 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 530 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 531 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 532 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 533 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 534 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 535 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 536 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 537 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 538 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 539 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 540 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 541 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 542 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 543 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 544 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 545 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 546 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 547 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 548 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 549 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 550 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 551 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 552 // CHECK3: cond.true: 553 // CHECK3-NEXT: br label [[COND_END:%.*]] 554 // CHECK3: cond.false: 555 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 556 // CHECK3-NEXT: br label [[COND_END]] 557 // CHECK3: cond.end: 558 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 559 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 560 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 561 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 562 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 563 // CHECK3: omp.inner.for.cond: 564 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 565 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 566 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 567 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 568 // CHECK3: omp.inner.for.body: 569 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 570 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 571 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 572 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 573 // CHECK3-NEXT: store double 1.000000e+00, double* [[G2]], align 8 574 // CHECK3-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 4 575 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP13]], align 4 576 // CHECK3-NEXT: store i32 3, i32* [[SVAR5]], align 4 577 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 578 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 579 // CHECK3-NEXT: store double* [[G2]], double** [[TMP14]], align 4 580 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 581 // CHECK3-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 4 582 // CHECK3-NEXT: store double* [[TMP16]], double** [[TMP15]], align 4 583 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 584 // CHECK3-NEXT: store i32* [[SVAR5]], i32** [[TMP17]], align 4 585 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 586 // CHECK3-NEXT: store float* [[SFVAR6]], float** [[TMP18]], align 4 587 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 588 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 589 // CHECK3: omp.body.continue: 590 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 591 // CHECK3: omp.inner.for.inc: 592 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 593 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 594 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 595 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 596 // CHECK3: omp.inner.for.end: 597 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 598 // CHECK3: omp.loop.exit: 599 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 600 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 601 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 602 // CHECK3-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 603 // CHECK3: .omp.lastprivate.then: 604 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[G2]], align 8 605 // CHECK3-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 606 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP4]], align 4 607 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 4 608 // CHECK3-NEXT: store volatile double [[TMP24]], double* [[TMP4]], align 4 609 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR5]], align 4 610 // CHECK3-NEXT: store i32 [[TMP25]], i32* [[TMP2]], align 4 611 // CHECK3-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR6]], align 4 612 // CHECK3-NEXT: store float [[TMP26]], float* [[TMP3]], align 4 613 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 614 // CHECK3: .omp.lastprivate.done: 615 // CHECK3-NEXT: ret void 616 // 617 // 618 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 619 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 620 // CHECK3-NEXT: entry: 621 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 622 // CHECK3-NEXT: ret void 623 // 624 // 625 // CHECK4-LABEL: define {{[^@]+}}@main 626 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 627 // CHECK4-NEXT: entry: 628 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 629 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 630 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 631 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 632 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 633 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 634 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 635 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4 636 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 637 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 638 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 639 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 640 // CHECK4-NEXT: ret i32 0 641 // 642 // 643 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 644 // CHECK4-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 645 // CHECK4-NEXT: entry: 646 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 647 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 648 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 649 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 650 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 651 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 652 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 653 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 654 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 655 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 656 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 657 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 658 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 659 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 660 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 661 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 662 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 663 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8 664 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 665 // CHECK4-NEXT: [[TMP4:%.*]] = load double, double* [[TMP3]], align 4 666 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8 667 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 668 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 669 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 670 // CHECK4-NEXT: ret void 671 // 672 // 673 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 674 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 675 // CHECK4-NEXT: entry: 676 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 677 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 678 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 679 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 680 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 681 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 682 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 683 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 684 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 685 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 686 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 687 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 688 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 689 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 690 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 691 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 692 // CHECK4-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 693 // CHECK4-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 694 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 695 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 696 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 697 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 698 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 699 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 700 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 701 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 702 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 703 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 704 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 705 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 706 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 707 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 708 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 709 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 710 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 711 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 712 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 713 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 714 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 715 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 716 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 717 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 718 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 719 // CHECK4: cond.true: 720 // CHECK4-NEXT: br label [[COND_END:%.*]] 721 // CHECK4: cond.false: 722 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 723 // CHECK4-NEXT: br label [[COND_END]] 724 // CHECK4: cond.end: 725 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 726 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 727 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 728 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 729 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 730 // CHECK4: omp.inner.for.cond: 731 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 732 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 733 // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 734 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 735 // CHECK4: omp.inner.for.body: 736 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 737 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 738 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 739 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 740 // CHECK4-NEXT: store double 1.000000e+00, double* [[G2]], align 8 741 // CHECK4-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 4 742 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP13]], align 4 743 // CHECK4-NEXT: store i32 3, i32* [[SVAR5]], align 4 744 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 745 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 746 // CHECK4-NEXT: store double* [[G2]], double** [[TMP14]], align 4 747 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 748 // CHECK4-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 4 749 // CHECK4-NEXT: store double* [[TMP16]], double** [[TMP15]], align 4 750 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 751 // CHECK4-NEXT: store i32* [[SVAR5]], i32** [[TMP17]], align 4 752 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 753 // CHECK4-NEXT: store float* [[SFVAR6]], float** [[TMP18]], align 4 754 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 755 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 756 // CHECK4: omp.body.continue: 757 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 758 // CHECK4: omp.inner.for.inc: 759 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 760 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 761 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 762 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 763 // CHECK4: omp.inner.for.end: 764 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 765 // CHECK4: omp.loop.exit: 766 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 767 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 768 // CHECK4-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 769 // CHECK4-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 770 // CHECK4: .omp.lastprivate.then: 771 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[G2]], align 8 772 // CHECK4-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 773 // CHECK4-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP4]], align 4 774 // CHECK4-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 4 775 // CHECK4-NEXT: store volatile double [[TMP24]], double* [[TMP4]], align 4 776 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR5]], align 4 777 // CHECK4-NEXT: store i32 [[TMP25]], i32* [[TMP2]], align 4 778 // CHECK4-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR6]], align 4 779 // CHECK4-NEXT: store float [[TMP26]], float* [[TMP3]], align 4 780 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 781 // CHECK4: .omp.lastprivate.done: 782 // CHECK4-NEXT: ret void 783 // 784 // 785 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 786 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 787 // CHECK4-NEXT: entry: 788 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 789 // CHECK4-NEXT: ret void 790 // 791 // 792 // CHECK5-LABEL: define {{[^@]+}}@main 793 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 794 // CHECK5-NEXT: entry: 795 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 796 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 797 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 798 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 799 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 800 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 801 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 802 // CHECK5-NEXT: store double* [[G]], double** [[TMP0]], align 8 803 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 804 // CHECK5-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 805 // CHECK5-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 806 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 807 // CHECK5-NEXT: ret i32 0 808 // 809 // 810 // CHECK6-LABEL: define {{[^@]+}}@main 811 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 812 // CHECK6-NEXT: entry: 813 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 814 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 815 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 8 816 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 817 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 818 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 8 819 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 820 // CHECK6-NEXT: store double* [[G]], double** [[TMP0]], align 8 821 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 822 // CHECK6-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 823 // CHECK6-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 824 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 825 // CHECK6-NEXT: ret i32 0 826 // 827 // 828 // CHECK7-LABEL: define {{[^@]+}}@main 829 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 830 // CHECK7-NEXT: entry: 831 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 832 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 833 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 834 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 835 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 836 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 837 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 838 // CHECK7-NEXT: store double* [[G]], double** [[TMP0]], align 4 839 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 840 // CHECK7-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 841 // CHECK7-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 842 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 843 // CHECK7-NEXT: ret i32 0 844 // 845 // 846 // CHECK8-LABEL: define {{[^@]+}}@main 847 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 848 // CHECK8-NEXT: entry: 849 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 850 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 851 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 4 852 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 853 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 854 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 4 855 // CHECK8-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 856 // CHECK8-NEXT: store double* [[G]], double** [[TMP0]], align 4 857 // CHECK8-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 858 // CHECK8-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 859 // CHECK8-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 860 // CHECK8-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]]) 861 // CHECK8-NEXT: ret i32 0 862 // 863 // 864 // CHECK9-LABEL: define {{[^@]+}}@main 865 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 866 // CHECK9-NEXT: entry: 867 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 868 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 869 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 870 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 871 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 872 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 873 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 874 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 875 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 876 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 877 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 878 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 879 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 880 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 881 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 882 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 883 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 884 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 885 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 886 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 887 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 888 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 889 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 890 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 891 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 892 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 893 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 894 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 895 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 896 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 897 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 898 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 899 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 900 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 901 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 902 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 903 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 904 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 905 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 906 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 907 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 908 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 909 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 910 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 911 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 912 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 913 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 914 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 915 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 916 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 917 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 918 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 919 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 920 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 921 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 922 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8 923 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 924 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 925 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 926 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 927 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 928 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 929 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 930 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8 931 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 932 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 933 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 934 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 935 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 936 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 937 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 938 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8 939 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 940 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 941 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 942 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 943 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 944 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 945 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 946 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8 947 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 948 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 949 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 950 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 951 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 952 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 953 // CHECK9: omp_offload.failed: 954 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 955 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 956 // CHECK9: omp_offload.cont: 957 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 958 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 959 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 960 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 961 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 962 // CHECK9: arraydestroy.body: 963 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 964 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 965 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 966 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 967 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 968 // CHECK9: arraydestroy.done3: 969 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 970 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 971 // CHECK9-NEXT: ret i32 [[TMP39]] 972 // 973 // 974 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 975 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 976 // CHECK9-NEXT: entry: 977 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 978 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 979 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 980 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 981 // CHECK9-NEXT: ret void 982 // 983 // 984 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 985 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 986 // CHECK9-NEXT: entry: 987 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 988 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 989 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 990 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 991 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 992 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 993 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 994 // CHECK9-NEXT: ret void 995 // 996 // 997 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 998 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 999 // CHECK9-NEXT: entry: 1000 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1001 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1002 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1003 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1004 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1005 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1006 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1007 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1008 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1009 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1010 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1011 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1012 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1013 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1014 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1015 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1016 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1017 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1018 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 1019 // CHECK9-NEXT: ret void 1020 // 1021 // 1022 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1023 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1024 // CHECK9-NEXT: entry: 1025 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1026 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1027 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1028 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1029 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1030 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1031 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1032 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1033 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1034 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1035 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1036 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1037 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1038 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1039 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1040 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1041 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 1042 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1043 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 1044 // CHECK9-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 1045 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1046 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1047 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1048 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1049 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1050 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1051 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1052 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1053 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1054 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1055 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1056 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1057 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1058 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1059 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1060 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1061 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1062 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1063 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 1064 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1065 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1066 // CHECK9: arrayctor.loop: 1067 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1068 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1069 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1070 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1071 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1072 // CHECK9: arrayctor.cont: 1073 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1074 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) 1075 // CHECK9-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 1076 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1077 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1078 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1079 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1080 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 1081 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1082 // CHECK9: cond.true: 1083 // CHECK9-NEXT: br label [[COND_END:%.*]] 1084 // CHECK9: cond.false: 1085 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1086 // CHECK9-NEXT: br label [[COND_END]] 1087 // CHECK9: cond.end: 1088 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 1089 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1090 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1091 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 1092 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1093 // CHECK9: omp.inner.for.cond: 1094 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1095 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1096 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 1097 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1098 // CHECK9: omp.inner.for.cond.cleanup: 1099 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1100 // CHECK9: omp.inner.for.body: 1101 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1102 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 1103 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1104 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1105 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4 1106 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1107 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 1108 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 1109 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4 1110 // CHECK9-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 1111 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 1112 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64 1113 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM9]] 1114 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8* 1115 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8* 1116 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false) 1117 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1118 // CHECK9: omp.body.continue: 1119 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1120 // CHECK9: omp.inner.for.inc: 1121 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1122 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 1123 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 1124 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1125 // CHECK9: omp.inner.for.end: 1126 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1127 // CHECK9: omp.loop.exit: 1128 // CHECK9-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1129 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1130 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1131 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1132 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 1133 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1134 // CHECK9: .omp.lastprivate.then: 1135 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 1136 // CHECK9-NEXT: store i32 [[TMP25]], i32* [[TMP1]], align 4 1137 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1138 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 1139 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false) 1140 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 1141 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 1142 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 1143 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP29]] 1144 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1145 // CHECK9: omp.arraycpy.body: 1146 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1147 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1148 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1149 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1150 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 1151 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1152 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1153 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 1154 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 1155 // CHECK9: omp.arraycpy.done13: 1156 // CHECK9-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 1157 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 1158 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 1159 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 1160 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 1161 // CHECK9-NEXT: store i32 [[TMP35]], i32* [[TMP4]], align 4 1162 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1163 // CHECK9: .omp.lastprivate.done: 1164 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1165 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 1166 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 1167 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1168 // CHECK9: arraydestroy.body: 1169 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1170 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1171 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1172 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 1173 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 1174 // CHECK9: arraydestroy.done15: 1175 // CHECK9-NEXT: ret void 1176 // 1177 // 1178 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1179 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1180 // CHECK9-NEXT: entry: 1181 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1182 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1183 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1184 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1185 // CHECK9-NEXT: ret void 1186 // 1187 // 1188 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1189 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 1190 // CHECK9-NEXT: entry: 1191 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1192 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1193 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1194 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1195 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1196 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1197 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1198 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1199 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1200 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1201 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1202 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1203 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1204 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1205 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1206 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1207 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1208 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1209 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1210 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1211 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1212 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1213 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1214 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1215 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1216 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1217 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1218 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1219 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1220 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1221 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1222 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1223 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1224 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1225 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1226 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1227 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1228 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1229 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1230 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1231 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1232 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1233 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1234 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1235 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1236 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1237 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1238 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1239 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1240 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1241 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1242 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1243 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1244 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8 1245 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1246 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1247 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1248 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1249 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1250 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1251 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1252 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8 1253 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1254 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1255 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1256 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1257 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1258 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1259 // CHECK9: omp_offload.failed: 1260 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1261 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1262 // CHECK9: omp_offload.cont: 1263 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1264 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1265 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1266 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1267 // CHECK9: arraydestroy.body: 1268 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1269 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1270 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1271 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1272 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1273 // CHECK9: arraydestroy.done2: 1274 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1275 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 1276 // CHECK9-NEXT: ret i32 [[TMP32]] 1277 // 1278 // 1279 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1280 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1281 // CHECK9-NEXT: entry: 1282 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1283 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1284 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1285 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1286 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1287 // CHECK9-NEXT: ret void 1288 // 1289 // 1290 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1291 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1292 // CHECK9-NEXT: entry: 1293 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1294 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1295 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1296 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1297 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1298 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1299 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1300 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1301 // CHECK9-NEXT: ret void 1302 // 1303 // 1304 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1305 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1306 // CHECK9-NEXT: entry: 1307 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1308 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1309 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1310 // CHECK9-NEXT: ret void 1311 // 1312 // 1313 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1314 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1315 // CHECK9-NEXT: entry: 1316 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1317 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1318 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1319 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1320 // CHECK9-NEXT: ret void 1321 // 1322 // 1323 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1324 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1325 // CHECK9-NEXT: entry: 1326 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1327 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1328 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1329 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1330 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1331 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1332 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 1333 // CHECK9-NEXT: ret void 1334 // 1335 // 1336 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1337 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1338 // CHECK9-NEXT: entry: 1339 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1340 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1341 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1342 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1343 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1344 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1345 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1346 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1347 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1348 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1349 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1350 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1351 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1352 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1353 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1354 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 1355 // CHECK9-NEXT: ret void 1356 // 1357 // 1358 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1359 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1360 // CHECK9-NEXT: entry: 1361 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1362 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1363 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1364 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1365 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1366 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1367 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1368 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1369 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1370 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1371 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1372 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1373 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1374 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1375 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1376 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1377 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1378 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 1379 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1380 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1381 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1382 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1383 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1384 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1385 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1386 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1387 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1388 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1389 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1390 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 1391 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1392 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1393 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1394 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1395 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 1396 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1397 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1398 // CHECK9: arrayctor.loop: 1399 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1400 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1401 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1402 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1403 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1404 // CHECK9: arrayctor.cont: 1405 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1406 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) 1407 // CHECK9-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 1408 // CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1409 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1410 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1411 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1412 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 1413 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1414 // CHECK9: cond.true: 1415 // CHECK9-NEXT: br label [[COND_END:%.*]] 1416 // CHECK9: cond.false: 1417 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1418 // CHECK9-NEXT: br label [[COND_END]] 1419 // CHECK9: cond.end: 1420 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 1421 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1422 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1423 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 1424 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1425 // CHECK9: omp.inner.for.cond: 1426 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1427 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1428 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 1429 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1430 // CHECK9: omp.inner.for.cond.cleanup: 1431 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1432 // CHECK9: omp.inner.for.body: 1433 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1434 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 1435 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1436 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1437 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4 1438 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 1439 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64 1440 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 1441 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 1442 // CHECK9-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 1443 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 1444 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64 1445 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 1446 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8* 1447 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8* 1448 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 4, i1 false) 1449 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1450 // CHECK9: omp.body.continue: 1451 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1452 // CHECK9: omp.inner.for.inc: 1453 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1454 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1 1455 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 1456 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1457 // CHECK9: omp.inner.for.end: 1458 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1459 // CHECK9: omp.loop.exit: 1460 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1461 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1462 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1463 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1464 // CHECK9-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1465 // CHECK9-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1466 // CHECK9: .omp.lastprivate.then: 1467 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4 1468 // CHECK9-NEXT: store i32 [[TMP24]], i32* [[TMP1]], align 4 1469 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1470 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 1471 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 8, i1 false) 1472 // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 1473 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 1474 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2 1475 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP28]] 1476 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1477 // CHECK9: omp.arraycpy.body: 1478 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1479 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1480 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1481 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1482 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false) 1483 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1484 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1485 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]] 1486 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 1487 // CHECK9: omp.arraycpy.done12: 1488 // CHECK9-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 1489 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 1490 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8* 1491 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 1492 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1493 // CHECK9: .omp.lastprivate.done: 1494 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1495 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 1496 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 1497 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1498 // CHECK9: arraydestroy.body: 1499 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1500 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1501 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1502 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1503 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1504 // CHECK9: arraydestroy.done14: 1505 // CHECK9-NEXT: ret void 1506 // 1507 // 1508 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1509 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1510 // CHECK9-NEXT: entry: 1511 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1512 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1513 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1514 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1515 // CHECK9-NEXT: ret void 1516 // 1517 // 1518 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1519 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1520 // CHECK9-NEXT: entry: 1521 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1522 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1523 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1524 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1525 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1526 // CHECK9-NEXT: ret void 1527 // 1528 // 1529 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1530 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1531 // CHECK9-NEXT: entry: 1532 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1533 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1534 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1535 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1536 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1537 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1538 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1539 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1540 // CHECK9-NEXT: ret void 1541 // 1542 // 1543 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1544 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1545 // CHECK9-NEXT: entry: 1546 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1547 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1548 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1549 // CHECK9-NEXT: ret void 1550 // 1551 // 1552 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1553 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1554 // CHECK9-NEXT: entry: 1555 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1556 // CHECK9-NEXT: ret void 1557 // 1558 // 1559 // CHECK10-LABEL: define {{[^@]+}}@main 1560 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1561 // CHECK10-NEXT: entry: 1562 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1563 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1564 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1565 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1566 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1567 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1568 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1569 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1570 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1571 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1572 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1573 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1574 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1575 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1576 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1577 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1578 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1579 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1580 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1581 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1582 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1583 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1584 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1585 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1586 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1587 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1588 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1589 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 1590 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 1591 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1592 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1593 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1594 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1595 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1596 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 1597 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1598 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1599 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1600 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1601 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1602 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1603 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1604 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1605 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1606 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 1607 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 1608 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1609 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8 1610 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1611 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1612 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1613 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1614 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 1615 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 1616 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1617 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 8 1618 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1619 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 1620 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 1621 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1622 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 1623 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 1624 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1625 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8 1626 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1627 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 1628 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 1629 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1630 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 1631 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 1632 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1633 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 8 1634 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1635 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1636 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1637 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1638 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 1639 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 1640 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1641 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 8 1642 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1643 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1644 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1645 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1646 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1647 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1648 // CHECK10: omp_offload.failed: 1649 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 1650 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1651 // CHECK10: omp_offload.cont: 1652 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 1653 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1654 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1655 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1656 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1657 // CHECK10: arraydestroy.body: 1658 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1659 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1660 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1661 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1662 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1663 // CHECK10: arraydestroy.done3: 1664 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1665 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 1666 // CHECK10-NEXT: ret i32 [[TMP39]] 1667 // 1668 // 1669 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1670 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1671 // CHECK10-NEXT: entry: 1672 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1673 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1674 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1675 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1676 // CHECK10-NEXT: ret void 1677 // 1678 // 1679 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1680 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1681 // CHECK10-NEXT: entry: 1682 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1683 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1684 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1685 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1686 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1687 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1688 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1689 // CHECK10-NEXT: ret void 1690 // 1691 // 1692 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 1693 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1694 // CHECK10-NEXT: entry: 1695 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1696 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1697 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1698 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1699 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1700 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1701 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1702 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1703 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1704 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1705 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1706 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1707 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1708 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1709 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1710 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1711 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1712 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1713 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 1714 // CHECK10-NEXT: ret void 1715 // 1716 // 1717 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1718 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1719 // CHECK10-NEXT: entry: 1720 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1721 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1722 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1723 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1724 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1725 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1726 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1727 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1728 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1729 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1730 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1731 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1732 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1733 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1734 // CHECK10-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1735 // CHECK10-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1736 // CHECK10-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 1737 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1738 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 1739 // CHECK10-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 1740 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1741 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1742 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1743 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1744 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1745 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1746 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1747 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1748 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1749 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1750 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1751 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1752 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1753 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1754 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1755 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1756 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1757 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1758 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 1759 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1760 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1761 // CHECK10: arrayctor.loop: 1762 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1763 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1764 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1765 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1766 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1767 // CHECK10: arrayctor.cont: 1768 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1769 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) 1770 // CHECK10-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 1771 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1772 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1773 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1774 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1775 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 1776 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1777 // CHECK10: cond.true: 1778 // CHECK10-NEXT: br label [[COND_END:%.*]] 1779 // CHECK10: cond.false: 1780 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1781 // CHECK10-NEXT: br label [[COND_END]] 1782 // CHECK10: cond.end: 1783 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 1784 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1785 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1786 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 1787 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1788 // CHECK10: omp.inner.for.cond: 1789 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1790 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1791 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 1792 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1793 // CHECK10: omp.inner.for.cond.cleanup: 1794 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1795 // CHECK10: omp.inner.for.body: 1796 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1797 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 1798 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1799 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1800 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4 1801 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1802 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 1803 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 1804 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4 1805 // CHECK10-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 1806 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 1807 // CHECK10-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64 1808 // CHECK10-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM9]] 1809 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8* 1810 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8* 1811 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false) 1812 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1813 // CHECK10: omp.body.continue: 1814 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1815 // CHECK10: omp.inner.for.inc: 1816 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1817 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 1818 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 1819 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1820 // CHECK10: omp.inner.for.end: 1821 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1822 // CHECK10: omp.loop.exit: 1823 // CHECK10-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1824 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1825 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1826 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1827 // CHECK10-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 1828 // CHECK10-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1829 // CHECK10: .omp.lastprivate.then: 1830 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 1831 // CHECK10-NEXT: store i32 [[TMP25]], i32* [[TMP1]], align 4 1832 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1833 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 1834 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false) 1835 // CHECK10-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 1836 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 1837 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 1838 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP29]] 1839 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1840 // CHECK10: omp.arraycpy.body: 1841 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1842 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1843 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1844 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1845 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 1846 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1847 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1848 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 1849 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 1850 // CHECK10: omp.arraycpy.done13: 1851 // CHECK10-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 1852 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 1853 // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 1854 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 1855 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 1856 // CHECK10-NEXT: store i32 [[TMP35]], i32* [[TMP4]], align 4 1857 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1858 // CHECK10: .omp.lastprivate.done: 1859 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1860 // CHECK10-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 1861 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 1862 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1863 // CHECK10: arraydestroy.body: 1864 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1865 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1866 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1867 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 1868 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 1869 // CHECK10: arraydestroy.done15: 1870 // CHECK10-NEXT: ret void 1871 // 1872 // 1873 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1874 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1875 // CHECK10-NEXT: entry: 1876 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1877 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1878 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1879 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1880 // CHECK10-NEXT: ret void 1881 // 1882 // 1883 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1884 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 1885 // CHECK10-NEXT: entry: 1886 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1887 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1888 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1889 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1890 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1891 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1892 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1893 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1894 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1895 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1896 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1897 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1898 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1899 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1900 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1901 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1902 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1903 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1904 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1905 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1906 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1907 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1908 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1909 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1910 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1911 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1912 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1913 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1914 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1915 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1916 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1917 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1918 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1919 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1920 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1921 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1922 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1923 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 1924 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1925 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1926 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1927 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1928 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1929 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1930 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1931 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 1932 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1933 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1934 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1935 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1936 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1937 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1938 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1939 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 8 1940 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1941 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1942 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1943 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1944 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1945 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1946 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1947 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 8 1948 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1949 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1950 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1951 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1952 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1953 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1954 // CHECK10: omp_offload.failed: 1955 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1956 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1957 // CHECK10: omp_offload.cont: 1958 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1959 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1960 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1961 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1962 // CHECK10: arraydestroy.body: 1963 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1964 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1965 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1966 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1967 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1968 // CHECK10: arraydestroy.done2: 1969 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1970 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 1971 // CHECK10-NEXT: ret i32 [[TMP32]] 1972 // 1973 // 1974 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1975 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1976 // CHECK10-NEXT: entry: 1977 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1978 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1979 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1980 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1981 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 1982 // CHECK10-NEXT: ret void 1983 // 1984 // 1985 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1986 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1987 // CHECK10-NEXT: entry: 1988 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1989 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1990 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1991 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1992 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1993 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1994 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1995 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 1996 // CHECK10-NEXT: ret void 1997 // 1998 // 1999 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2000 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2001 // CHECK10-NEXT: entry: 2002 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2003 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2004 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2005 // CHECK10-NEXT: ret void 2006 // 2007 // 2008 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2009 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2010 // CHECK10-NEXT: entry: 2011 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2012 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2013 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2014 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2015 // CHECK10-NEXT: ret void 2016 // 2017 // 2018 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2019 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2020 // CHECK10-NEXT: entry: 2021 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2022 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2023 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2024 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2025 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2026 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2027 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 2028 // CHECK10-NEXT: ret void 2029 // 2030 // 2031 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2032 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2033 // CHECK10-NEXT: entry: 2034 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2035 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2036 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2037 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2038 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2039 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2040 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2041 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2042 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2043 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2044 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2045 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2046 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2047 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2048 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2049 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 2050 // CHECK10-NEXT: ret void 2051 // 2052 // 2053 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2054 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2055 // CHECK10-NEXT: entry: 2056 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2057 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2058 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2059 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2060 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2061 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2062 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2063 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2064 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2065 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2066 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2067 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2068 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2069 // CHECK10-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2070 // CHECK10-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2071 // CHECK10-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2072 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2073 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 2074 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2075 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2076 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2077 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2078 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2079 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2080 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2081 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2082 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2083 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2084 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2085 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 2086 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2087 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2088 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2089 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2090 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2091 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2092 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2093 // CHECK10: arrayctor.loop: 2094 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2095 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2096 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2097 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2098 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2099 // CHECK10: arrayctor.cont: 2100 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2101 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) 2102 // CHECK10-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 2103 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2104 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2105 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2106 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2107 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 2108 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2109 // CHECK10: cond.true: 2110 // CHECK10-NEXT: br label [[COND_END:%.*]] 2111 // CHECK10: cond.false: 2112 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2113 // CHECK10-NEXT: br label [[COND_END]] 2114 // CHECK10: cond.end: 2115 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2116 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2117 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2118 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 2119 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2120 // CHECK10: omp.inner.for.cond: 2121 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2122 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2123 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2124 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2125 // CHECK10: omp.inner.for.cond.cleanup: 2126 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2127 // CHECK10: omp.inner.for.body: 2128 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2129 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 2130 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2131 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2132 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4 2133 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 2134 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64 2135 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 2136 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 2137 // CHECK10-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 2138 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 2139 // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64 2140 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 2141 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8* 2142 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8* 2143 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 4, i1 false) 2144 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2145 // CHECK10: omp.body.continue: 2146 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2147 // CHECK10: omp.inner.for.inc: 2148 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2149 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1 2150 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 2151 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2152 // CHECK10: omp.inner.for.end: 2153 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2154 // CHECK10: omp.loop.exit: 2155 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2156 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 2157 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 2158 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2159 // CHECK10-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 2160 // CHECK10-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2161 // CHECK10: .omp.lastprivate.then: 2162 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4 2163 // CHECK10-NEXT: store i32 [[TMP24]], i32* [[TMP1]], align 4 2164 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2165 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2166 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 8, i1 false) 2167 // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 2168 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 2169 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2 2170 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP28]] 2171 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2172 // CHECK10: omp.arraycpy.body: 2173 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2174 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2175 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2176 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2177 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false) 2178 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2179 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2180 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]] 2181 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 2182 // CHECK10: omp.arraycpy.done12: 2183 // CHECK10-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 2184 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 2185 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8* 2186 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 2187 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2188 // CHECK10: .omp.lastprivate.done: 2189 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 2190 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2191 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 2192 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2193 // CHECK10: arraydestroy.body: 2194 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2195 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2196 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2197 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2198 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2199 // CHECK10: arraydestroy.done14: 2200 // CHECK10-NEXT: ret void 2201 // 2202 // 2203 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2204 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2205 // CHECK10-NEXT: entry: 2206 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2207 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2208 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2209 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2210 // CHECK10-NEXT: ret void 2211 // 2212 // 2213 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2214 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2215 // CHECK10-NEXT: entry: 2216 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2217 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2218 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2219 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2220 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 2221 // CHECK10-NEXT: ret void 2222 // 2223 // 2224 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2225 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2226 // CHECK10-NEXT: entry: 2227 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2228 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2229 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2230 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2231 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2232 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2233 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2234 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2235 // CHECK10-NEXT: ret void 2236 // 2237 // 2238 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2239 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2240 // CHECK10-NEXT: entry: 2241 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2242 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2243 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2244 // CHECK10-NEXT: ret void 2245 // 2246 // 2247 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2248 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 2249 // CHECK10-NEXT: entry: 2250 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2251 // CHECK10-NEXT: ret void 2252 // 2253 // 2254 // CHECK11-LABEL: define {{[^@]+}}@main 2255 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2256 // CHECK11-NEXT: entry: 2257 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2258 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 2259 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 2260 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2261 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2262 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2263 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2264 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2265 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2266 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2267 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2268 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2269 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2270 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2271 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2272 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2273 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2274 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 2275 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2276 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2277 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2278 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2279 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2280 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2281 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2282 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2283 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2284 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2285 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2286 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2287 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2288 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2289 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2290 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2291 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2292 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2293 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2294 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2295 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2296 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2297 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2298 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2299 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 2300 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 2301 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2302 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 2303 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2304 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2305 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2306 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2307 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 2308 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 2309 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2310 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4 2311 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2312 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2313 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 2314 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2315 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 2316 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 2317 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2318 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4 2319 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2320 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2321 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 2322 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2323 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 2324 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 2325 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2326 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4 2327 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2328 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2329 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 2330 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2331 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 2332 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 2333 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2334 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4 2335 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2336 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2337 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2338 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2339 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2340 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2341 // CHECK11: omp_offload.failed: 2342 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 2343 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2344 // CHECK11: omp_offload.cont: 2345 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2346 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2347 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2348 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2349 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2350 // CHECK11: arraydestroy.body: 2351 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2352 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2353 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2354 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2355 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2356 // CHECK11: arraydestroy.done2: 2357 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2358 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 2359 // CHECK11-NEXT: ret i32 [[TMP39]] 2360 // 2361 // 2362 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2363 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2364 // CHECK11-NEXT: entry: 2365 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2366 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2367 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2368 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2369 // CHECK11-NEXT: ret void 2370 // 2371 // 2372 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2373 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2374 // CHECK11-NEXT: entry: 2375 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2376 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2377 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2378 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2379 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2380 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2381 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 2382 // CHECK11-NEXT: ret void 2383 // 2384 // 2385 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 2386 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 2387 // CHECK11-NEXT: entry: 2388 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2389 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2390 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2391 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2392 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 2393 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2394 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2395 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2396 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2397 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2398 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 2399 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2400 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2401 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2402 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 2403 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2404 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 2405 // CHECK11-NEXT: ret void 2406 // 2407 // 2408 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2409 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 2410 // CHECK11-NEXT: entry: 2411 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2412 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2413 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2414 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 2415 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2416 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2417 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 2418 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2419 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2420 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2421 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2422 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2423 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2424 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2425 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2426 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2427 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 2428 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2429 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 2430 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 2431 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2432 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2433 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2434 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2435 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 2436 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2437 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2438 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 2439 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2440 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 2441 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2442 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2443 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 2444 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 2445 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2446 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2447 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2448 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2449 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 2450 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2451 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2452 // CHECK11: arrayctor.loop: 2453 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2454 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2455 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2456 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2457 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2458 // CHECK11: arrayctor.cont: 2459 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2460 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) 2461 // CHECK11-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 2462 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2463 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2464 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2465 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2466 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 2467 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2468 // CHECK11: cond.true: 2469 // CHECK11-NEXT: br label [[COND_END:%.*]] 2470 // CHECK11: cond.false: 2471 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2472 // CHECK11-NEXT: br label [[COND_END]] 2473 // CHECK11: cond.end: 2474 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 2475 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2476 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2477 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 2478 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2479 // CHECK11: omp.inner.for.cond: 2480 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2481 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2482 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 2483 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2484 // CHECK11: omp.inner.for.cond.cleanup: 2485 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2486 // CHECK11: omp.inner.for.body: 2487 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2488 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 2489 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2490 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2491 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4 2492 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 2493 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP15]] 2494 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4 2495 // CHECK11-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 2496 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 2497 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP17]] 2498 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* 2499 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8* 2500 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false) 2501 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2502 // CHECK11: omp.body.continue: 2503 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2504 // CHECK11: omp.inner.for.inc: 2505 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2506 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1 2507 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 2508 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2509 // CHECK11: omp.inner.for.end: 2510 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2511 // CHECK11: omp.loop.exit: 2512 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2513 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2514 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2515 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2516 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2517 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2518 // CHECK11: .omp.lastprivate.then: 2519 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 2520 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[TMP1]], align 4 2521 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2522 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2523 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 8, i1 false) 2524 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 2525 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 2526 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 2527 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP29]] 2528 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2529 // CHECK11: omp.arraycpy.body: 2530 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2531 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2532 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2533 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2534 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false) 2535 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2536 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2537 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 2538 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 2539 // CHECK11: omp.arraycpy.done12: 2540 // CHECK11-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 2541 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 2542 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 2543 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) 2544 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 2545 // CHECK11-NEXT: store i32 [[TMP35]], i32* [[TMP4]], align 4 2546 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2547 // CHECK11: .omp.lastprivate.done: 2548 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 2549 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 2550 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 2551 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2552 // CHECK11: arraydestroy.body: 2553 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2554 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2555 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2556 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2557 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2558 // CHECK11: arraydestroy.done14: 2559 // CHECK11-NEXT: ret void 2560 // 2561 // 2562 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2563 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2564 // CHECK11-NEXT: entry: 2565 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2566 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2567 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2568 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2569 // CHECK11-NEXT: ret void 2570 // 2571 // 2572 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2573 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 2574 // CHECK11-NEXT: entry: 2575 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2576 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2577 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2578 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2579 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2580 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2581 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2582 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2583 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 2584 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 2585 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 2586 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2587 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 2588 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2589 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2590 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2591 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2592 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 2593 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2594 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 2595 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2596 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 2597 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 2598 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2599 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2600 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2601 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2602 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2603 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2604 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2605 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2606 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 2607 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2608 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2609 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2610 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2611 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2612 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2613 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 2614 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 2615 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2616 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2617 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2618 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2619 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2620 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2621 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 2622 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 2623 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2624 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 2625 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 2626 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2627 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 2628 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2629 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 2630 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 2631 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2632 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 2633 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 2634 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2635 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 2636 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2637 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2638 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2639 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2640 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 2641 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2642 // CHECK11: omp_offload.failed: 2643 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 2644 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2645 // CHECK11: omp_offload.cont: 2646 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2647 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2648 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2649 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2650 // CHECK11: arraydestroy.body: 2651 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2652 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2653 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2654 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2655 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2656 // CHECK11: arraydestroy.done2: 2657 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2658 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 2659 // CHECK11-NEXT: ret i32 [[TMP32]] 2660 // 2661 // 2662 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2663 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2664 // CHECK11-NEXT: entry: 2665 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2666 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2667 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2668 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2669 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2670 // CHECK11-NEXT: ret void 2671 // 2672 // 2673 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2674 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2675 // CHECK11-NEXT: entry: 2676 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2677 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2678 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2679 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2680 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2681 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2682 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2683 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2684 // CHECK11-NEXT: ret void 2685 // 2686 // 2687 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2688 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2689 // CHECK11-NEXT: entry: 2690 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2691 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2692 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2693 // CHECK11-NEXT: ret void 2694 // 2695 // 2696 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2697 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2698 // CHECK11-NEXT: entry: 2699 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2700 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2701 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2702 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2703 // CHECK11-NEXT: ret void 2704 // 2705 // 2706 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2707 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2708 // CHECK11-NEXT: entry: 2709 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2710 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2711 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2712 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2713 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2714 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2715 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2716 // CHECK11-NEXT: ret void 2717 // 2718 // 2719 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2720 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2721 // CHECK11-NEXT: entry: 2722 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2723 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2724 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2725 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2726 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2727 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2728 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2729 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2730 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2731 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2732 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2733 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2734 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 2735 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2736 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 2737 // CHECK11-NEXT: ret void 2738 // 2739 // 2740 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2741 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2742 // CHECK11-NEXT: entry: 2743 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2744 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2745 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2746 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 2747 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2748 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2749 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2750 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2751 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2752 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2753 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2754 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2755 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2756 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2757 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2758 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2759 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2760 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 2761 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2762 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2763 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2764 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2765 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 2766 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2767 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2768 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2769 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 2770 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2771 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2772 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 2773 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2774 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2775 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2776 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2777 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2778 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2779 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2780 // CHECK11: arrayctor.loop: 2781 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2782 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2783 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2784 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2785 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2786 // CHECK11: arrayctor.cont: 2787 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2788 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) 2789 // CHECK11-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 2790 // CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2791 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2792 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2793 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2794 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 2795 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2796 // CHECK11: cond.true: 2797 // CHECK11-NEXT: br label [[COND_END:%.*]] 2798 // CHECK11: cond.false: 2799 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2800 // CHECK11-NEXT: br label [[COND_END]] 2801 // CHECK11: cond.end: 2802 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2803 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2804 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2805 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 2806 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2807 // CHECK11: omp.inner.for.cond: 2808 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2809 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2810 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2811 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2812 // CHECK11: omp.inner.for.cond.cleanup: 2813 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2814 // CHECK11: omp.inner.for.body: 2815 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2816 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 2817 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2818 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2819 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4 2820 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 2821 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP14]] 2822 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 2823 // CHECK11-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 2824 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 2825 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP16]] 2826 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 2827 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8* 2828 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 4, i1 false) 2829 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2830 // CHECK11: omp.body.continue: 2831 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2832 // CHECK11: omp.inner.for.inc: 2833 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2834 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], 1 2835 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 2836 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2837 // CHECK11: omp.inner.for.end: 2838 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2839 // CHECK11: omp.loop.exit: 2840 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2841 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 2842 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 2843 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2844 // CHECK11-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 2845 // CHECK11-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2846 // CHECK11: .omp.lastprivate.then: 2847 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4 2848 // CHECK11-NEXT: store i32 [[TMP24]], i32* [[TMP1]], align 4 2849 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2850 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2851 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 8, i1 false) 2852 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 2853 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 2854 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 2855 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP28]] 2856 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2857 // CHECK11: omp.arraycpy.body: 2858 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2859 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2860 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2861 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2862 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false) 2863 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2864 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2865 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]] 2866 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 2867 // CHECK11: omp.arraycpy.done11: 2868 // CHECK11-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 2869 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 2870 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8* 2871 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false) 2872 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2873 // CHECK11: .omp.lastprivate.done: 2874 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 2875 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2876 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 2877 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2878 // CHECK11: arraydestroy.body: 2879 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2880 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2881 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2882 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2883 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2884 // CHECK11: arraydestroy.done13: 2885 // CHECK11-NEXT: ret void 2886 // 2887 // 2888 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2889 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2890 // CHECK11-NEXT: entry: 2891 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2892 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2893 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2894 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2895 // CHECK11-NEXT: ret void 2896 // 2897 // 2898 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2899 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2900 // CHECK11-NEXT: entry: 2901 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2902 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2903 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2904 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2905 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 2906 // CHECK11-NEXT: ret void 2907 // 2908 // 2909 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2910 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2911 // CHECK11-NEXT: entry: 2912 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2913 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2914 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2915 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2916 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2917 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2918 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2919 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2920 // CHECK11-NEXT: ret void 2921 // 2922 // 2923 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2924 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2925 // CHECK11-NEXT: entry: 2926 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2927 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2928 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2929 // CHECK11-NEXT: ret void 2930 // 2931 // 2932 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2933 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2934 // CHECK11-NEXT: entry: 2935 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2936 // CHECK11-NEXT: ret void 2937 // 2938 // 2939 // CHECK12-LABEL: define {{[^@]+}}@main 2940 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2941 // CHECK12-NEXT: entry: 2942 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2943 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 2944 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 2945 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2946 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2947 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2948 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2949 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2950 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2951 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2952 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2953 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2954 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2955 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2956 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2957 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2958 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2959 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 2960 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2961 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2962 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2963 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2964 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2965 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2966 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2967 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2968 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2969 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2970 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2971 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2972 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2973 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2974 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2975 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2976 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2977 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2978 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2979 // CHECK12-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2980 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2981 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2982 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2983 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2984 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 2985 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 2986 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2987 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4 2988 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2989 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2990 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2991 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2992 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 2993 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 2994 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2995 // CHECK12-NEXT: store i8* null, i8** [[TMP18]], align 4 2996 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2997 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2998 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 2999 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3000 // CHECK12-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 3001 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 3002 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3003 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4 3004 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3005 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 3006 // CHECK12-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 3007 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3008 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 3009 // CHECK12-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 3010 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3011 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4 3012 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3013 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 3014 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 3015 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3016 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 3017 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 3018 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 3019 // CHECK12-NEXT: store i8* null, i8** [[TMP33]], align 4 3020 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3021 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3022 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 3023 // CHECK12-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3024 // CHECK12-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 3025 // CHECK12-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3026 // CHECK12: omp_offload.failed: 3027 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 3028 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3029 // CHECK12: omp_offload.cont: 3030 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 3031 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3032 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3033 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3034 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3035 // CHECK12: arraydestroy.body: 3036 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3037 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3038 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3039 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3040 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3041 // CHECK12: arraydestroy.done2: 3042 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3043 // CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 3044 // CHECK12-NEXT: ret i32 [[TMP39]] 3045 // 3046 // 3047 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3048 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3049 // CHECK12-NEXT: entry: 3050 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3051 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3052 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3053 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3054 // CHECK12-NEXT: ret void 3055 // 3056 // 3057 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3058 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3059 // CHECK12-NEXT: entry: 3060 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3061 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3062 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3063 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3064 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3065 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3066 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3067 // CHECK12-NEXT: ret void 3068 // 3069 // 3070 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 3071 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 3072 // CHECK12-NEXT: entry: 3073 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3074 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3075 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3076 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3077 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3078 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3079 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3080 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3081 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3082 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3083 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3084 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3085 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3086 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3087 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3088 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3089 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 3090 // CHECK12-NEXT: ret void 3091 // 3092 // 3093 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 3094 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 3095 // CHECK12-NEXT: entry: 3096 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3097 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3098 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3099 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3100 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3101 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3102 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 3103 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3104 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3105 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3106 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3107 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3108 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3109 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3110 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3111 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3112 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 3113 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3114 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 3115 // CHECK12-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 3116 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3117 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3118 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3119 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3120 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3121 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3122 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3123 // CHECK12-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 3124 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3125 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3126 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3127 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3128 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 3129 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 3130 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3131 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3132 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3133 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3134 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3135 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3136 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3137 // CHECK12: arrayctor.loop: 3138 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3139 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3140 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3141 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3142 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3143 // CHECK12: arrayctor.cont: 3144 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3145 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) 3146 // CHECK12-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 3147 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3148 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3149 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3150 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3151 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 3152 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3153 // CHECK12: cond.true: 3154 // CHECK12-NEXT: br label [[COND_END:%.*]] 3155 // CHECK12: cond.false: 3156 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3157 // CHECK12-NEXT: br label [[COND_END]] 3158 // CHECK12: cond.end: 3159 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 3160 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3161 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3162 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 3163 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3164 // CHECK12: omp.inner.for.cond: 3165 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3166 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3167 // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 3168 // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3169 // CHECK12: omp.inner.for.cond.cleanup: 3170 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3171 // CHECK12: omp.inner.for.body: 3172 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3173 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 3174 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3175 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3176 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4 3177 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 3178 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP15]] 3179 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4 3180 // CHECK12-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3181 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 3182 // CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP17]] 3183 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* 3184 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8* 3185 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false) 3186 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3187 // CHECK12: omp.body.continue: 3188 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3189 // CHECK12: omp.inner.for.inc: 3190 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3191 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1 3192 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 3193 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3194 // CHECK12: omp.inner.for.end: 3195 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3196 // CHECK12: omp.loop.exit: 3197 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3198 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 3199 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 3200 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3201 // CHECK12-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3202 // CHECK12-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3203 // CHECK12: .omp.lastprivate.then: 3204 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 3205 // CHECK12-NEXT: store i32 [[TMP25]], i32* [[TMP1]], align 4 3206 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3207 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3208 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 8, i1 false) 3209 // CHECK12-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 3210 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 3211 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 3212 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP29]] 3213 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3214 // CHECK12: omp.arraycpy.body: 3215 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3216 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3217 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3218 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3219 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false) 3220 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3221 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3222 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 3223 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 3224 // CHECK12: omp.arraycpy.done12: 3225 // CHECK12-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3226 // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 3227 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 3228 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) 3229 // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 3230 // CHECK12-NEXT: store i32 [[TMP35]], i32* [[TMP4]], align 4 3231 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3232 // CHECK12: .omp.lastprivate.done: 3233 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3234 // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3235 // CHECK12-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 3236 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3237 // CHECK12: arraydestroy.body: 3238 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3239 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3240 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3241 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 3242 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 3243 // CHECK12: arraydestroy.done14: 3244 // CHECK12-NEXT: ret void 3245 // 3246 // 3247 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3248 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3249 // CHECK12-NEXT: entry: 3250 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3251 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3252 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3253 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3254 // CHECK12-NEXT: ret void 3255 // 3256 // 3257 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3258 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 3259 // CHECK12-NEXT: entry: 3260 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3261 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3262 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3263 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3264 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3265 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3266 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3267 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3268 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3269 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3270 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3271 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3272 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3273 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 3274 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3275 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3276 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3277 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 3278 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3279 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 3280 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3281 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 3282 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 3283 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3284 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3285 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3286 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3287 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3288 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3289 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3290 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3291 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 3292 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3293 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3294 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3295 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3296 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 3297 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3298 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 3299 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 3300 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3301 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3302 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3303 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3304 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 3305 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3306 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 3307 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 3308 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3309 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 3310 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 3311 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3312 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4 3313 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3314 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 3315 // CHECK12-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 3316 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3317 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 3318 // CHECK12-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 3319 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3320 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4 3321 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3322 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3323 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 3324 // CHECK12-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3325 // CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 3326 // CHECK12-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3327 // CHECK12: omp_offload.failed: 3328 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 3329 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3330 // CHECK12: omp_offload.cont: 3331 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3332 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3333 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3334 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3335 // CHECK12: arraydestroy.body: 3336 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3337 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3338 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3339 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3340 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3341 // CHECK12: arraydestroy.done2: 3342 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3343 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 3344 // CHECK12-NEXT: ret i32 [[TMP32]] 3345 // 3346 // 3347 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3348 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3349 // CHECK12-NEXT: entry: 3350 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3351 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3352 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3353 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3354 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 3355 // CHECK12-NEXT: ret void 3356 // 3357 // 3358 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3359 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3360 // CHECK12-NEXT: entry: 3361 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3362 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3363 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3364 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3365 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3366 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3367 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3368 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 3369 // CHECK12-NEXT: ret void 3370 // 3371 // 3372 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3373 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3374 // CHECK12-NEXT: entry: 3375 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3376 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3377 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3378 // CHECK12-NEXT: ret void 3379 // 3380 // 3381 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3382 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3383 // CHECK12-NEXT: entry: 3384 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3385 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3386 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3387 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3388 // CHECK12-NEXT: ret void 3389 // 3390 // 3391 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3392 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3393 // CHECK12-NEXT: entry: 3394 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3395 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3396 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3397 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3398 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3399 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3400 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3401 // CHECK12-NEXT: ret void 3402 // 3403 // 3404 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 3405 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3406 // CHECK12-NEXT: entry: 3407 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3408 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3409 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3410 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3411 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3412 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3413 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3414 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3415 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3416 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3417 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3418 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3419 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3420 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3421 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 3422 // CHECK12-NEXT: ret void 3423 // 3424 // 3425 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3426 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3427 // CHECK12-NEXT: entry: 3428 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3429 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3430 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3431 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3432 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3433 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3434 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3435 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3436 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3437 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3438 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3439 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3440 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3441 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3442 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3443 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 3444 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3445 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 3446 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3447 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3448 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3449 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3450 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3451 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3452 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3453 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3454 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3455 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3456 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3457 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 3458 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3459 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3460 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3461 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3462 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3463 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3464 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3465 // CHECK12: arrayctor.loop: 3466 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3467 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3468 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3469 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3470 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3471 // CHECK12: arrayctor.cont: 3472 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3473 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) 3474 // CHECK12-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 3475 // CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3476 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3477 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3478 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3479 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 3480 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3481 // CHECK12: cond.true: 3482 // CHECK12-NEXT: br label [[COND_END:%.*]] 3483 // CHECK12: cond.false: 3484 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3485 // CHECK12-NEXT: br label [[COND_END]] 3486 // CHECK12: cond.end: 3487 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3488 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3489 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3490 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 3491 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3492 // CHECK12: omp.inner.for.cond: 3493 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3494 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3495 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3496 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3497 // CHECK12: omp.inner.for.cond.cleanup: 3498 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3499 // CHECK12: omp.inner.for.body: 3500 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3501 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 3502 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3503 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3504 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4 3505 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 3506 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP14]] 3507 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 3508 // CHECK12-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 3509 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 3510 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP16]] 3511 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 3512 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8* 3513 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 4, i1 false) 3514 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3515 // CHECK12: omp.body.continue: 3516 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3517 // CHECK12: omp.inner.for.inc: 3518 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3519 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], 1 3520 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 3521 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3522 // CHECK12: omp.inner.for.end: 3523 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3524 // CHECK12: omp.loop.exit: 3525 // CHECK12-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3526 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 3527 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 3528 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3529 // CHECK12-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 3530 // CHECK12-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3531 // CHECK12: .omp.lastprivate.then: 3532 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4 3533 // CHECK12-NEXT: store i32 [[TMP24]], i32* [[TMP1]], align 4 3534 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3535 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3536 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 8, i1 false) 3537 // CHECK12-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 3538 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 3539 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 3540 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP28]] 3541 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3542 // CHECK12: omp.arraycpy.body: 3543 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3544 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3545 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3546 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3547 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false) 3548 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3549 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3550 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]] 3551 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 3552 // CHECK12: omp.arraycpy.done11: 3553 // CHECK12-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 3554 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 3555 // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8* 3556 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false) 3557 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3558 // CHECK12: .omp.lastprivate.done: 3559 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3560 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3561 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 3562 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3563 // CHECK12: arraydestroy.body: 3564 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3565 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3566 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3567 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 3568 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 3569 // CHECK12: arraydestroy.done13: 3570 // CHECK12-NEXT: ret void 3571 // 3572 // 3573 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3574 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3575 // CHECK12-NEXT: entry: 3576 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3577 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3578 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3579 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3580 // CHECK12-NEXT: ret void 3581 // 3582 // 3583 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3584 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3585 // CHECK12-NEXT: entry: 3586 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3587 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3588 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3589 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3590 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 3591 // CHECK12-NEXT: ret void 3592 // 3593 // 3594 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3595 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3596 // CHECK12-NEXT: entry: 3597 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3598 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3599 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3600 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3601 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3602 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3603 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3604 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3605 // CHECK12-NEXT: ret void 3606 // 3607 // 3608 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3609 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3610 // CHECK12-NEXT: entry: 3611 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3612 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3613 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3614 // CHECK12-NEXT: ret void 3615 // 3616 // 3617 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3618 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 3619 // CHECK12-NEXT: entry: 3620 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3621 // CHECK12-NEXT: ret void 3622 // 3623 // 3624 // CHECK13-LABEL: define {{[^@]+}}@main 3625 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 3626 // CHECK13-NEXT: entry: 3627 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3628 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 3629 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 3630 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3631 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3632 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3633 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3634 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3635 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 3636 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 3637 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3638 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 3639 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3640 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 3641 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3642 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3643 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3644 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3645 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3646 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3647 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3648 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3649 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3650 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3651 // CHECK13-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 3652 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3653 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 3654 // CHECK13-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 3655 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3656 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 3657 // CHECK13: for.cond: 3658 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 3659 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], 2 3660 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3661 // CHECK13: for.body: 3662 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 3663 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 3664 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 3665 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 3666 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4 3667 // CHECK13-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 3668 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3669 // CHECK13-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP8]] to i64 3670 // CHECK13-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM2]] 3671 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 3672 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 3673 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 3674 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 3675 // CHECK13: for.inc: 3676 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3677 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 3678 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 3679 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3680 // CHECK13: for.end: 3681 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 3682 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3683 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3684 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3685 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3686 // CHECK13: arraydestroy.body: 3687 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3688 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3689 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 3690 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3691 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3692 // CHECK13: arraydestroy.done5: 3693 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3694 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 3695 // CHECK13-NEXT: ret i32 [[TMP13]] 3696 // 3697 // 3698 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3699 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3700 // CHECK13-NEXT: entry: 3701 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3702 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3703 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3704 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3705 // CHECK13-NEXT: ret void 3706 // 3707 // 3708 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3709 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3710 // CHECK13-NEXT: entry: 3711 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3712 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3713 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3714 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3715 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3716 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3717 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3718 // CHECK13-NEXT: ret void 3719 // 3720 // 3721 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3722 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 3723 // CHECK13-NEXT: entry: 3724 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3725 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3726 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3727 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3728 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3729 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 3730 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3731 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 3732 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3733 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3734 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3735 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3736 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3737 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3738 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 3739 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3740 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 3741 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 3742 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3743 // CHECK13-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 3744 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3745 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3746 // CHECK13-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 3747 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3748 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 3749 // CHECK13: for.cond: 3750 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 3751 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], 2 3752 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3753 // CHECK13: for.body: 3754 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 3755 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 3756 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 3757 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 3758 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4 3759 // CHECK13-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 3760 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3761 // CHECK13-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP8]] to i64 3762 // CHECK13-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM2]] 3763 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX3]] to i8* 3764 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 3765 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 3766 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 3767 // CHECK13: for.inc: 3768 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3769 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 3770 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 3771 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3772 // CHECK13: for.end: 3773 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3774 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3775 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3776 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3777 // CHECK13: arraydestroy.body: 3778 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3779 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3780 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3781 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3782 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 3783 // CHECK13: arraydestroy.done4: 3784 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3785 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 3786 // CHECK13-NEXT: ret i32 [[TMP13]] 3787 // 3788 // 3789 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3790 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3791 // CHECK13-NEXT: entry: 3792 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3793 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3794 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3795 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3796 // CHECK13-NEXT: ret void 3797 // 3798 // 3799 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3800 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3801 // CHECK13-NEXT: entry: 3802 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3803 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3804 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3805 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3806 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 3807 // CHECK13-NEXT: ret void 3808 // 3809 // 3810 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3811 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3812 // CHECK13-NEXT: entry: 3813 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3814 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3815 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3816 // CHECK13-NEXT: ret void 3817 // 3818 // 3819 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3820 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3821 // CHECK13-NEXT: entry: 3822 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3823 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3824 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3825 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3826 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3827 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3828 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3829 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 3830 // CHECK13-NEXT: ret void 3831 // 3832 // 3833 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3834 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3835 // CHECK13-NEXT: entry: 3836 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3837 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3838 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3839 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3840 // CHECK13-NEXT: ret void 3841 // 3842 // 3843 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3844 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3845 // CHECK13-NEXT: entry: 3846 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3847 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3848 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3849 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3850 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3851 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3852 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 3853 // CHECK13-NEXT: ret void 3854 // 3855 // 3856 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3857 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3858 // CHECK13-NEXT: entry: 3859 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3860 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3861 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3862 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3863 // CHECK13-NEXT: ret void 3864 // 3865 // 3866 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3867 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3868 // CHECK13-NEXT: entry: 3869 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3870 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3871 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3872 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3873 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 3874 // CHECK13-NEXT: ret void 3875 // 3876 // 3877 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3878 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3879 // CHECK13-NEXT: entry: 3880 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3881 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3882 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3883 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3884 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3885 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3886 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3887 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3888 // CHECK13-NEXT: ret void 3889 // 3890 // 3891 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3892 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3893 // CHECK13-NEXT: entry: 3894 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3895 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3896 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3897 // CHECK13-NEXT: ret void 3898 // 3899 // 3900 // CHECK14-LABEL: define {{[^@]+}}@main 3901 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 3902 // CHECK14-NEXT: entry: 3903 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3904 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 3905 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 8 3906 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3907 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3908 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3909 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3910 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3911 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 3912 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 3913 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3914 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 3915 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3916 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 8 3917 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3918 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 3919 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3920 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3921 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3922 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3923 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3924 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3925 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3926 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3927 // CHECK14-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 3928 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3929 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 3930 // CHECK14-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 3931 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 3932 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 3933 // CHECK14: for.cond: 3934 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 3935 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], 2 3936 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3937 // CHECK14: for.body: 3938 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 3939 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 3940 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 3941 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 3942 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4 3943 // CHECK14-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 3944 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3945 // CHECK14-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP8]] to i64 3946 // CHECK14-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM2]] 3947 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX3]] to i8* 3948 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 3949 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 3950 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 3951 // CHECK14: for.inc: 3952 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3953 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 3954 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 3955 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3956 // CHECK14: for.end: 3957 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 3958 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3959 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3960 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3961 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3962 // CHECK14: arraydestroy.body: 3963 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3964 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3965 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 3966 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3967 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3968 // CHECK14: arraydestroy.done5: 3969 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3970 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 3971 // CHECK14-NEXT: ret i32 [[TMP13]] 3972 // 3973 // 3974 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3975 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3976 // CHECK14-NEXT: entry: 3977 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3978 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3979 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3980 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3981 // CHECK14-NEXT: ret void 3982 // 3983 // 3984 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3985 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3986 // CHECK14-NEXT: entry: 3987 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3988 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3989 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3990 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3991 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3992 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3993 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3994 // CHECK14-NEXT: ret void 3995 // 3996 // 3997 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3998 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 3999 // CHECK14-NEXT: entry: 4000 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4001 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4002 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4003 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4004 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4005 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 4006 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 4007 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 4008 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 4009 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4010 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 4011 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4012 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 4013 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 4014 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 4015 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 4016 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 4017 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 4018 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 4019 // CHECK14-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 4020 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 4021 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 4022 // CHECK14-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 4023 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 4024 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 4025 // CHECK14: for.cond: 4026 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 4027 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], 2 4028 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4029 // CHECK14: for.body: 4030 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 4031 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 4032 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 4033 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 4034 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4 4035 // CHECK14-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 4036 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4037 // CHECK14-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP8]] to i64 4038 // CHECK14-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM2]] 4039 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX3]] to i8* 4040 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 4041 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 4042 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 4043 // CHECK14: for.inc: 4044 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4045 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 4046 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 4047 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 4048 // CHECK14: for.end: 4049 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 4050 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4051 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 4052 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4053 // CHECK14: arraydestroy.body: 4054 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4055 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4056 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4057 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4058 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 4059 // CHECK14: arraydestroy.done4: 4060 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4061 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 4062 // CHECK14-NEXT: ret i32 [[TMP13]] 4063 // 4064 // 4065 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4066 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4067 // CHECK14-NEXT: entry: 4068 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4069 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4070 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4071 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4072 // CHECK14-NEXT: ret void 4073 // 4074 // 4075 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4076 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4077 // CHECK14-NEXT: entry: 4078 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4079 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4080 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4081 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4082 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 4083 // CHECK14-NEXT: ret void 4084 // 4085 // 4086 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4087 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4088 // CHECK14-NEXT: entry: 4089 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4090 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4091 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4092 // CHECK14-NEXT: ret void 4093 // 4094 // 4095 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4096 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4097 // CHECK14-NEXT: entry: 4098 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4099 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4100 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4101 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4102 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4103 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4104 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4105 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 4106 // CHECK14-NEXT: ret void 4107 // 4108 // 4109 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4110 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4111 // CHECK14-NEXT: entry: 4112 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4113 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4114 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4115 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4116 // CHECK14-NEXT: ret void 4117 // 4118 // 4119 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4120 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4121 // CHECK14-NEXT: entry: 4122 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4123 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4124 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4125 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4126 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4127 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4128 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 4129 // CHECK14-NEXT: ret void 4130 // 4131 // 4132 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4133 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4134 // CHECK14-NEXT: entry: 4135 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4136 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4137 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4138 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4139 // CHECK14-NEXT: ret void 4140 // 4141 // 4142 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4143 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4144 // CHECK14-NEXT: entry: 4145 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4146 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4147 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4148 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4149 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 4150 // CHECK14-NEXT: ret void 4151 // 4152 // 4153 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4154 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4155 // CHECK14-NEXT: entry: 4156 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4157 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4158 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4159 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4160 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4161 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4162 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4163 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4164 // CHECK14-NEXT: ret void 4165 // 4166 // 4167 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4168 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4169 // CHECK14-NEXT: entry: 4170 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4171 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4172 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4173 // CHECK14-NEXT: ret void 4174 // 4175 // 4176 // CHECK15-LABEL: define {{[^@]+}}@main 4177 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 4178 // CHECK15-NEXT: entry: 4179 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4180 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 4181 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 4182 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4183 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4184 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4185 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4186 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4187 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4188 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4189 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4190 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 4191 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4192 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 4193 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 4194 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4195 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4196 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4197 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4198 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 4199 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4200 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 4201 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4202 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4203 // CHECK15-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 4204 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4205 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4206 // CHECK15-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 4207 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 4208 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 4209 // CHECK15: for.cond: 4210 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 4211 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], 2 4212 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4213 // CHECK15: for.body: 4214 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 4215 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 4216 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP6]] 4217 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4 4218 // CHECK15-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 4219 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4220 // CHECK15-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP8]] 4221 // CHECK15-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8* 4222 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 4223 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 4224 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 4225 // CHECK15: for.inc: 4226 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4227 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 4228 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 4229 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4230 // CHECK15: for.end: 4231 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 4232 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4233 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4234 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4235 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4236 // CHECK15: arraydestroy.body: 4237 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4238 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4239 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 4240 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4241 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 4242 // CHECK15: arraydestroy.done4: 4243 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4244 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 4245 // CHECK15-NEXT: ret i32 [[TMP13]] 4246 // 4247 // 4248 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4249 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4250 // CHECK15-NEXT: entry: 4251 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4252 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4253 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4254 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 4255 // CHECK15-NEXT: ret void 4256 // 4257 // 4258 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4259 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4260 // CHECK15-NEXT: entry: 4261 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4262 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4263 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4264 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4265 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4266 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4267 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 4268 // CHECK15-NEXT: ret void 4269 // 4270 // 4271 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4272 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 4273 // CHECK15-NEXT: entry: 4274 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4275 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4276 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4277 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4278 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4279 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4280 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4281 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4282 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4283 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4284 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4285 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4286 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4287 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4288 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 4289 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4290 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 4291 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4292 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4293 // CHECK15-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 4294 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4295 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4296 // CHECK15-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 4297 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 4298 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 4299 // CHECK15: for.cond: 4300 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 4301 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], 2 4302 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4303 // CHECK15: for.body: 4304 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 4305 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 4306 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP6]] 4307 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4 4308 // CHECK15-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 4309 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4310 // CHECK15-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP8]] 4311 // CHECK15-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX2]] to i8* 4312 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 4313 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 4314 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 4315 // CHECK15: for.inc: 4316 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4317 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 4318 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 4319 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 4320 // CHECK15: for.end: 4321 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4322 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4323 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4324 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4325 // CHECK15: arraydestroy.body: 4326 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4327 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4328 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4329 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4330 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 4331 // CHECK15: arraydestroy.done3: 4332 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4333 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 4334 // CHECK15-NEXT: ret i32 [[TMP13]] 4335 // 4336 // 4337 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4338 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4339 // CHECK15-NEXT: entry: 4340 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4341 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4342 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4343 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4344 // CHECK15-NEXT: ret void 4345 // 4346 // 4347 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4348 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4349 // CHECK15-NEXT: entry: 4350 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4351 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4352 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4353 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4354 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 4355 // CHECK15-NEXT: ret void 4356 // 4357 // 4358 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4359 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4360 // CHECK15-NEXT: entry: 4361 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4362 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4363 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4364 // CHECK15-NEXT: ret void 4365 // 4366 // 4367 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4368 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4369 // CHECK15-NEXT: entry: 4370 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4371 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4372 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4373 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4374 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4375 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4376 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4377 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 4378 // CHECK15-NEXT: ret void 4379 // 4380 // 4381 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4382 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4383 // CHECK15-NEXT: entry: 4384 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4385 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4386 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4387 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4388 // CHECK15-NEXT: ret void 4389 // 4390 // 4391 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4392 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4393 // CHECK15-NEXT: entry: 4394 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4395 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4396 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4397 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4398 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4399 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4400 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4401 // CHECK15-NEXT: ret void 4402 // 4403 // 4404 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4405 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4406 // CHECK15-NEXT: entry: 4407 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4408 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4409 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4410 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4411 // CHECK15-NEXT: ret void 4412 // 4413 // 4414 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4415 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4416 // CHECK15-NEXT: entry: 4417 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4418 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4419 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4420 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4421 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 4422 // CHECK15-NEXT: ret void 4423 // 4424 // 4425 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4426 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4427 // CHECK15-NEXT: entry: 4428 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4429 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4430 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4431 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4432 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4433 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4434 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4435 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4436 // CHECK15-NEXT: ret void 4437 // 4438 // 4439 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4440 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4441 // CHECK15-NEXT: entry: 4442 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4443 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4444 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4445 // CHECK15-NEXT: ret void 4446 // 4447 // 4448 // CHECK16-LABEL: define {{[^@]+}}@main 4449 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 4450 // CHECK16-NEXT: entry: 4451 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4452 // CHECK16-NEXT: [[G:%.*]] = alloca double, align 8 4453 // CHECK16-NEXT: [[G1:%.*]] = alloca double*, align 4 4454 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4455 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4456 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4457 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4458 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4459 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4460 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4461 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4462 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 4463 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4464 // CHECK16-NEXT: store double* [[G]], double** [[G1]], align 4 4465 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 4466 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4467 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4468 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4469 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4470 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 4471 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4472 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 4473 // CHECK16-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4474 // CHECK16-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4475 // CHECK16-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 4476 // CHECK16-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4477 // CHECK16-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4478 // CHECK16-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 4479 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 4480 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 4481 // CHECK16: for.cond: 4482 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 4483 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], 2 4484 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4485 // CHECK16: for.body: 4486 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 4487 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 4488 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP6]] 4489 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4 4490 // CHECK16-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 4491 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4492 // CHECK16-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP8]] 4493 // CHECK16-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX2]] to i8* 4494 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 4495 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 4496 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 4497 // CHECK16: for.inc: 4498 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4499 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 4500 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 4501 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4502 // CHECK16: for.end: 4503 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 4504 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4505 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4506 // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4507 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4508 // CHECK16: arraydestroy.body: 4509 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4510 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4511 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 4512 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4513 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 4514 // CHECK16: arraydestroy.done4: 4515 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4516 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 4517 // CHECK16-NEXT: ret i32 [[TMP13]] 4518 // 4519 // 4520 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4521 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4522 // CHECK16-NEXT: entry: 4523 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4524 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4525 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4526 // CHECK16-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 4527 // CHECK16-NEXT: ret void 4528 // 4529 // 4530 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4531 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4532 // CHECK16-NEXT: entry: 4533 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4534 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4535 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4536 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4537 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4538 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4539 // CHECK16-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 4540 // CHECK16-NEXT: ret void 4541 // 4542 // 4543 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4544 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat { 4545 // CHECK16-NEXT: entry: 4546 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4547 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4548 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4549 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4550 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4551 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4552 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4553 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4554 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4555 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4556 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4557 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4558 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4559 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4560 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 4561 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4562 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 4563 // CHECK16-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4564 // CHECK16-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4565 // CHECK16-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 4566 // CHECK16-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4567 // CHECK16-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4568 // CHECK16-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 4569 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 4570 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 4571 // CHECK16: for.cond: 4572 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 4573 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], 2 4574 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4575 // CHECK16: for.body: 4576 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR]], align 4 4577 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4 4578 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP6]] 4579 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4 4580 // CHECK16-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 4581 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4582 // CHECK16-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP8]] 4583 // CHECK16-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX2]] to i8* 4584 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 4585 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 4586 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 4587 // CHECK16: for.inc: 4588 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4589 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 4590 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 4591 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 4592 // CHECK16: for.end: 4593 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4594 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4595 // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4596 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4597 // CHECK16: arraydestroy.body: 4598 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4599 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4600 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4601 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4602 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 4603 // CHECK16: arraydestroy.done3: 4604 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4605 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 4606 // CHECK16-NEXT: ret i32 [[TMP13]] 4607 // 4608 // 4609 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4610 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4611 // CHECK16-NEXT: entry: 4612 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4613 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4614 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4615 // CHECK16-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4616 // CHECK16-NEXT: ret void 4617 // 4618 // 4619 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4620 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4621 // CHECK16-NEXT: entry: 4622 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4623 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4624 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4625 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4626 // CHECK16-NEXT: store float 0.000000e+00, float* [[F]], align 4 4627 // CHECK16-NEXT: ret void 4628 // 4629 // 4630 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4631 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4632 // CHECK16-NEXT: entry: 4633 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4634 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4635 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4636 // CHECK16-NEXT: ret void 4637 // 4638 // 4639 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4640 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4641 // CHECK16-NEXT: entry: 4642 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4643 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4644 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4645 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4646 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4647 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4648 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4649 // CHECK16-NEXT: store float [[TMP0]], float* [[F]], align 4 4650 // CHECK16-NEXT: ret void 4651 // 4652 // 4653 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4654 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4655 // CHECK16-NEXT: entry: 4656 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4657 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4658 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4659 // CHECK16-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4660 // CHECK16-NEXT: ret void 4661 // 4662 // 4663 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4664 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4665 // CHECK16-NEXT: entry: 4666 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4667 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4668 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4669 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4670 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4671 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4672 // CHECK16-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4673 // CHECK16-NEXT: ret void 4674 // 4675 // 4676 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4677 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4678 // CHECK16-NEXT: entry: 4679 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4680 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4681 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4682 // CHECK16-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4683 // CHECK16-NEXT: ret void 4684 // 4685 // 4686 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4687 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4688 // CHECK16-NEXT: entry: 4689 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4690 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4691 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4692 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4693 // CHECK16-NEXT: store i32 0, i32* [[F]], align 4 4694 // CHECK16-NEXT: ret void 4695 // 4696 // 4697 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4698 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4699 // CHECK16-NEXT: entry: 4700 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4701 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4702 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4703 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4704 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4705 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4706 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4707 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4708 // CHECK16-NEXT: ret void 4709 // 4710 // 4711 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4712 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4713 // CHECK16-NEXT: entry: 4714 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4715 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4716 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4717 // CHECK16-NEXT: ret void 4718 // 4719