1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var) 51 for (int i = 0; i < 2; ++i) { 52 vec[i] = t_var; 53 s_arr[i] = var; 54 } 55 return T(); 56 } 57 58 int main() { 59 static int svar; 60 volatile double g; 61 volatile double &g1 = g; 62 63 #ifdef LAMBDA 64 [&]() { 65 static float sfvar; 66 67 #pragma omp target 68 #pragma omp teams distribute lastprivate(g, g1, svar, sfvar) 69 for (int i = 0; i < 2; ++i) { 70 // loop variables 71 72 // init private variables 73 g = 1; 74 g1 = 1; 75 svar = 3; 76 sfvar = 4.0; 77 78 79 [&]() { 80 g = 2; 81 g1 = 2; 82 svar = 4; 83 sfvar = 8.0; 84 85 }(); 86 } 87 }(); 88 return 0; 89 #else 90 S<float> test; 91 int t_var = 0; 92 int vec[] = {1, 2}; 93 S<float> s_arr[] = {1, 2}; 94 S<float> &var = test; 95 96 #pragma omp target 97 #pragma omp teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var, svar) 98 for (int i = 0; i < 2; ++i) { 99 vec[i] = t_var; 100 s_arr[i] = var; 101 } 102 int i; 103 104 return tmain<int>(); 105 #endif 106 } 107 108 109 // skip loop variables 110 111 // copy from parameters to local address variables 112 113 // load content of local address variables 114 // the distribute loop 115 // assignment: vec[i] = t_var; 116 117 // assignment: s_arr[i] = var; 118 119 // lastprivates 120 121 122 // template tmain 123 124 125 126 // skip alloca of global_tid and bound_tid 127 // skip loop variables 128 129 // skip init of bound and global tid 130 // copy from parameters to local address variables 131 132 // load content of local address variables 133 // assignment: vec[i] = t_var; 134 135 // assignment: s_arr[i] = var; 136 137 // lastprivates 138 139 #endif 140 // CHECK1-LABEL: define {{[^@]+}}@main 141 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 142 // CHECK1-NEXT: entry: 143 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 144 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 145 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 146 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 147 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 148 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 149 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 150 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8 151 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 152 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 153 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 154 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]]) 155 // CHECK1-NEXT: ret i32 0 156 // 157 // 158 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 159 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 160 // CHECK1-NEXT: entry: 161 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 162 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 163 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 164 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 165 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 166 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 167 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 168 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 169 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 170 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 171 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 172 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 173 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 174 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 175 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 176 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 177 // CHECK1-NEXT: ret void 178 // 179 // 180 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 181 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 182 // CHECK1-NEXT: entry: 183 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 184 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 185 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 186 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 187 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 188 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 189 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 190 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 193 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 194 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 195 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 196 // CHECK1-NEXT: [[G2:%.*]] = alloca double, align 8 197 // CHECK1-NEXT: [[G13:%.*]] = alloca double, align 8 198 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca double*, align 8 199 // CHECK1-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 201 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 202 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 203 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 204 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 205 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 206 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 207 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 208 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 209 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 210 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 211 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 212 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 213 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 214 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 215 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 216 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 217 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 218 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 219 // CHECK1-NEXT: store double* [[G13]], double** [[_TMP4]], align 8 220 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 221 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 222 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 223 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 224 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 225 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 226 // CHECK1: cond.true: 227 // CHECK1-NEXT: br label [[COND_END:%.*]] 228 // CHECK1: cond.false: 229 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 230 // CHECK1-NEXT: br label [[COND_END]] 231 // CHECK1: cond.end: 232 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 233 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 234 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 235 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 236 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 237 // CHECK1: omp.inner.for.cond: 238 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 239 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 240 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 241 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 242 // CHECK1: omp.inner.for.body: 243 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 244 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 245 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 246 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 247 // CHECK1-NEXT: store double 1.000000e+00, double* [[G2]], align 8 248 // CHECK1-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 8 249 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP13]], align 8 250 // CHECK1-NEXT: store i32 3, i32* [[SVAR5]], align 4 251 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 252 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 253 // CHECK1-NEXT: store double* [[G2]], double** [[TMP14]], align 8 254 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 255 // CHECK1-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 8 256 // CHECK1-NEXT: store double* [[TMP16]], double** [[TMP15]], align 8 257 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 258 // CHECK1-NEXT: store i32* [[SVAR5]], i32** [[TMP17]], align 8 259 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 260 // CHECK1-NEXT: store float* [[SFVAR6]], float** [[TMP18]], align 8 261 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef [[REF_TMP]]) 262 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 263 // CHECK1: omp.body.continue: 264 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 265 // CHECK1: omp.inner.for.inc: 266 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 267 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 268 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 269 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 270 // CHECK1: omp.inner.for.end: 271 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 272 // CHECK1: omp.loop.exit: 273 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 274 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 275 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 276 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 277 // CHECK1: .omp.lastprivate.then: 278 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[G2]], align 8 279 // CHECK1-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 280 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP4]], align 8 281 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 8 282 // CHECK1-NEXT: store volatile double [[TMP24]], double* [[TMP4]], align 8 283 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR5]], align 4 284 // CHECK1-NEXT: store i32 [[TMP25]], i32* [[TMP2]], align 4 285 // CHECK1-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR6]], align 4 286 // CHECK1-NEXT: store float [[TMP26]], float* [[TMP3]], align 4 287 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 288 // CHECK1: .omp.lastprivate.done: 289 // CHECK1-NEXT: ret void 290 // 291 // 292 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 293 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 294 // CHECK1-NEXT: entry: 295 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 296 // CHECK1-NEXT: ret void 297 // 298 // 299 // CHECK2-LABEL: define {{[^@]+}}@main 300 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 301 // CHECK2-NEXT: entry: 302 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 303 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 304 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 305 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 306 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 307 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 308 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 309 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8 310 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 311 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 312 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 313 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]]) 314 // CHECK2-NEXT: ret i32 0 315 // 316 // 317 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 318 // CHECK2-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 319 // CHECK2-NEXT: entry: 320 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 321 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 322 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 323 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 324 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 325 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 326 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 327 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 328 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 329 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 330 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 331 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 332 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 333 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 334 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 335 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 336 // CHECK2-NEXT: ret void 337 // 338 // 339 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 340 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 341 // CHECK2-NEXT: entry: 342 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 343 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 344 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 345 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 346 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 347 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 348 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 349 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 350 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 351 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 352 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 353 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 354 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 355 // CHECK2-NEXT: [[G2:%.*]] = alloca double, align 8 356 // CHECK2-NEXT: [[G13:%.*]] = alloca double, align 8 357 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca double*, align 8 358 // CHECK2-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 359 // CHECK2-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 360 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 361 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 362 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 363 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 364 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 365 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 366 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 367 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 368 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 369 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 370 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 371 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 372 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 373 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 374 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 375 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 376 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 377 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 378 // CHECK2-NEXT: store double* [[G13]], double** [[_TMP4]], align 8 379 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 380 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 381 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 382 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 383 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 384 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 385 // CHECK2: cond.true: 386 // CHECK2-NEXT: br label [[COND_END:%.*]] 387 // CHECK2: cond.false: 388 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 389 // CHECK2-NEXT: br label [[COND_END]] 390 // CHECK2: cond.end: 391 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 392 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 393 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 394 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 395 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 396 // CHECK2: omp.inner.for.cond: 397 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 398 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 399 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 400 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 401 // CHECK2: omp.inner.for.body: 402 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 403 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 404 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 405 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 406 // CHECK2-NEXT: store double 1.000000e+00, double* [[G2]], align 8 407 // CHECK2-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 8 408 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP13]], align 8 409 // CHECK2-NEXT: store i32 3, i32* [[SVAR5]], align 4 410 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 411 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 412 // CHECK2-NEXT: store double* [[G2]], double** [[TMP14]], align 8 413 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 414 // CHECK2-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 8 415 // CHECK2-NEXT: store double* [[TMP16]], double** [[TMP15]], align 8 416 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 417 // CHECK2-NEXT: store i32* [[SVAR5]], i32** [[TMP17]], align 8 418 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 419 // CHECK2-NEXT: store float* [[SFVAR6]], float** [[TMP18]], align 8 420 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef [[REF_TMP]]) 421 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 422 // CHECK2: omp.body.continue: 423 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 424 // CHECK2: omp.inner.for.inc: 425 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 426 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 427 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 428 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 429 // CHECK2: omp.inner.for.end: 430 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 431 // CHECK2: omp.loop.exit: 432 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 433 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 434 // CHECK2-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 435 // CHECK2-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 436 // CHECK2: .omp.lastprivate.then: 437 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[G2]], align 8 438 // CHECK2-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 439 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP4]], align 8 440 // CHECK2-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 8 441 // CHECK2-NEXT: store volatile double [[TMP24]], double* [[TMP4]], align 8 442 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR5]], align 4 443 // CHECK2-NEXT: store i32 [[TMP25]], i32* [[TMP2]], align 4 444 // CHECK2-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR6]], align 4 445 // CHECK2-NEXT: store float [[TMP26]], float* [[TMP3]], align 4 446 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 447 // CHECK2: .omp.lastprivate.done: 448 // CHECK2-NEXT: ret void 449 // 450 // 451 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 452 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 453 // CHECK2-NEXT: entry: 454 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 455 // CHECK2-NEXT: ret void 456 // 457 // 458 // CHECK3-LABEL: define {{[^@]+}}@main 459 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 460 // CHECK3-NEXT: entry: 461 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 462 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 463 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 464 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 465 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 466 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 467 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 468 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4 469 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 470 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 471 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 472 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]]) 473 // CHECK3-NEXT: ret i32 0 474 // 475 // 476 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 477 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 478 // CHECK3-NEXT: entry: 479 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 480 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 481 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 482 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 483 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 484 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 485 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 486 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 487 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 488 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 489 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 490 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 491 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 492 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 493 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 494 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 495 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 496 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8 497 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 498 // CHECK3-NEXT: [[TMP4:%.*]] = load double, double* [[TMP3]], align 4 499 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8 500 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 501 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 502 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 503 // CHECK3-NEXT: ret void 504 // 505 // 506 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 507 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 508 // CHECK3-NEXT: entry: 509 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 510 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 511 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 512 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 513 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 514 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 515 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 516 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 517 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 518 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 519 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 520 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 521 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 522 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 523 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 524 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 525 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 526 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 527 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 528 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 529 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 530 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 531 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 532 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 533 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 534 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 535 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 536 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 537 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 538 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 539 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 540 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 541 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 542 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 543 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 544 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 545 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 546 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 547 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 548 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 549 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 550 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 551 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 552 // CHECK3: cond.true: 553 // CHECK3-NEXT: br label [[COND_END:%.*]] 554 // CHECK3: cond.false: 555 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 556 // CHECK3-NEXT: br label [[COND_END]] 557 // CHECK3: cond.end: 558 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 559 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 560 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 561 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 562 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 563 // CHECK3: omp.inner.for.cond: 564 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 565 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 566 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 567 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 568 // CHECK3: omp.inner.for.body: 569 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 570 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 571 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 572 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 573 // CHECK3-NEXT: store double 1.000000e+00, double* [[G2]], align 8 574 // CHECK3-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 4 575 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP13]], align 4 576 // CHECK3-NEXT: store i32 3, i32* [[SVAR5]], align 4 577 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 578 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 579 // CHECK3-NEXT: store double* [[G2]], double** [[TMP14]], align 4 580 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 581 // CHECK3-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 4 582 // CHECK3-NEXT: store double* [[TMP16]], double** [[TMP15]], align 4 583 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 584 // CHECK3-NEXT: store i32* [[SVAR5]], i32** [[TMP17]], align 4 585 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 586 // CHECK3-NEXT: store float* [[SFVAR6]], float** [[TMP18]], align 4 587 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef [[REF_TMP]]) 588 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 589 // CHECK3: omp.body.continue: 590 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 591 // CHECK3: omp.inner.for.inc: 592 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 593 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 594 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 595 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 596 // CHECK3: omp.inner.for.end: 597 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 598 // CHECK3: omp.loop.exit: 599 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 600 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 601 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 602 // CHECK3-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 603 // CHECK3: .omp.lastprivate.then: 604 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[G2]], align 8 605 // CHECK3-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 606 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP4]], align 4 607 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 4 608 // CHECK3-NEXT: store volatile double [[TMP24]], double* [[TMP4]], align 4 609 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR5]], align 4 610 // CHECK3-NEXT: store i32 [[TMP25]], i32* [[TMP2]], align 4 611 // CHECK3-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR6]], align 4 612 // CHECK3-NEXT: store float [[TMP26]], float* [[TMP3]], align 4 613 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 614 // CHECK3: .omp.lastprivate.done: 615 // CHECK3-NEXT: ret void 616 // 617 // 618 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 619 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 620 // CHECK3-NEXT: entry: 621 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 622 // CHECK3-NEXT: ret void 623 // 624 // 625 // CHECK4-LABEL: define {{[^@]+}}@main 626 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 627 // CHECK4-NEXT: entry: 628 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 629 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 630 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 631 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 632 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 633 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 634 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 635 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4 636 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 637 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 638 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 639 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]]) 640 // CHECK4-NEXT: ret i32 0 641 // 642 // 643 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 644 // CHECK4-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 645 // CHECK4-NEXT: entry: 646 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 647 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 648 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 649 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 650 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 651 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 652 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 653 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 654 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 655 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 656 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 657 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 658 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 659 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 660 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 661 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 662 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 663 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8 664 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 665 // CHECK4-NEXT: [[TMP4:%.*]] = load double, double* [[TMP3]], align 4 666 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8 667 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 668 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 669 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 670 // CHECK4-NEXT: ret void 671 // 672 // 673 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 674 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 675 // CHECK4-NEXT: entry: 676 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 677 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 678 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 679 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 680 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 681 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 682 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 683 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 684 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 685 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 686 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 687 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 688 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 689 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 690 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 691 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 692 // CHECK4-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 693 // CHECK4-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 694 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 695 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 696 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 697 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 698 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 699 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 700 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 701 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 702 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 703 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 704 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 705 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 706 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 707 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 708 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 709 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 710 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 711 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 712 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 713 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 714 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 715 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 716 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 717 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 718 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 719 // CHECK4: cond.true: 720 // CHECK4-NEXT: br label [[COND_END:%.*]] 721 // CHECK4: cond.false: 722 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 723 // CHECK4-NEXT: br label [[COND_END]] 724 // CHECK4: cond.end: 725 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 726 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 727 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 728 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 729 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 730 // CHECK4: omp.inner.for.cond: 731 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 732 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 733 // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 734 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 735 // CHECK4: omp.inner.for.body: 736 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 737 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 738 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 739 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 740 // CHECK4-NEXT: store double 1.000000e+00, double* [[G2]], align 8 741 // CHECK4-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 4 742 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP13]], align 4 743 // CHECK4-NEXT: store i32 3, i32* [[SVAR5]], align 4 744 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 745 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 746 // CHECK4-NEXT: store double* [[G2]], double** [[TMP14]], align 4 747 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 748 // CHECK4-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 4 749 // CHECK4-NEXT: store double* [[TMP16]], double** [[TMP15]], align 4 750 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 751 // CHECK4-NEXT: store i32* [[SVAR5]], i32** [[TMP17]], align 4 752 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 753 // CHECK4-NEXT: store float* [[SFVAR6]], float** [[TMP18]], align 4 754 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef [[REF_TMP]]) 755 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 756 // CHECK4: omp.body.continue: 757 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 758 // CHECK4: omp.inner.for.inc: 759 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 760 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 761 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 762 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 763 // CHECK4: omp.inner.for.end: 764 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 765 // CHECK4: omp.loop.exit: 766 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]]) 767 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 768 // CHECK4-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 769 // CHECK4-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 770 // CHECK4: .omp.lastprivate.then: 771 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[G2]], align 8 772 // CHECK4-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 773 // CHECK4-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP4]], align 4 774 // CHECK4-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 4 775 // CHECK4-NEXT: store volatile double [[TMP24]], double* [[TMP4]], align 4 776 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR5]], align 4 777 // CHECK4-NEXT: store i32 [[TMP25]], i32* [[TMP2]], align 4 778 // CHECK4-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR6]], align 4 779 // CHECK4-NEXT: store float [[TMP26]], float* [[TMP3]], align 4 780 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 781 // CHECK4: .omp.lastprivate.done: 782 // CHECK4-NEXT: ret void 783 // 784 // 785 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 786 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 787 // CHECK4-NEXT: entry: 788 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 789 // CHECK4-NEXT: ret void 790 // 791 // 792 // CHECK9-LABEL: define {{[^@]+}}@main 793 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 794 // CHECK9-NEXT: entry: 795 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 796 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 797 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 798 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 799 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 800 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 801 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 802 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 803 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 804 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 805 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 806 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 807 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 808 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 809 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 810 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 811 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 812 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 813 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]]) 814 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 815 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 816 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 817 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 818 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 819 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 820 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 821 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 822 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 823 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 824 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 825 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 826 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 827 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 828 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 829 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 830 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 831 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 832 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 833 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 834 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 835 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 836 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 837 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 838 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 839 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 840 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 841 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 842 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 843 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 844 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 845 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 846 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 847 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 848 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 849 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 850 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8 851 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 852 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 853 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 854 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 855 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 856 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 857 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 858 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8 859 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 860 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 861 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 862 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 863 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 864 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 865 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 866 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8 867 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 868 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 869 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 870 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 871 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 872 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 873 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 874 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8 875 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 876 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 877 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 878 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 879 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 880 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 881 // CHECK9: omp_offload.failed: 882 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 883 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 884 // CHECK9: omp_offload.cont: 885 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 886 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 887 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 888 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 889 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 890 // CHECK9: arraydestroy.body: 891 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 892 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 893 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 894 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 895 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 896 // CHECK9: arraydestroy.done3: 897 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]] 898 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 899 // CHECK9-NEXT: ret i32 [[TMP39]] 900 // 901 // 902 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 903 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 904 // CHECK9-NEXT: entry: 905 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 906 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 907 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 908 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]]) 909 // CHECK9-NEXT: ret void 910 // 911 // 912 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 913 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 914 // CHECK9-NEXT: entry: 915 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 916 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 917 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 918 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 919 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 920 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 921 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]]) 922 // CHECK9-NEXT: ret void 923 // 924 // 925 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 926 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 927 // CHECK9-NEXT: entry: 928 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 929 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 930 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 931 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 932 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 933 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 934 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 935 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 936 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 937 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 938 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 939 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 940 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 941 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 942 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 943 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 944 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 945 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 946 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 947 // CHECK9-NEXT: ret void 948 // 949 // 950 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 951 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 952 // CHECK9-NEXT: entry: 953 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 954 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 955 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 956 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 957 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 958 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 959 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 960 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 961 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 962 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 963 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 964 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 965 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 966 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 967 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 968 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 969 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 970 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 971 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 972 // CHECK9-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 973 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 974 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 975 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 976 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 977 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 978 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 979 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 980 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 981 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 982 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 983 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 984 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 985 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 986 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 987 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 988 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 989 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 990 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 991 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 992 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 993 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 994 // CHECK9: arrayctor.loop: 995 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 996 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]]) 997 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 998 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 999 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1000 // CHECK9: arrayctor.cont: 1001 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1002 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR5]]) 1003 // CHECK9-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 1004 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1005 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1006 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1007 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1008 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 1009 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1010 // CHECK9: cond.true: 1011 // CHECK9-NEXT: br label [[COND_END:%.*]] 1012 // CHECK9: cond.false: 1013 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1014 // CHECK9-NEXT: br label [[COND_END]] 1015 // CHECK9: cond.end: 1016 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 1017 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1018 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1019 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 1020 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1021 // CHECK9: omp.inner.for.cond: 1022 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1023 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1024 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 1025 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1026 // CHECK9: omp.inner.for.cond.cleanup: 1027 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1028 // CHECK9: omp.inner.for.body: 1029 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1030 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 1031 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1032 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1033 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4 1034 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1035 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 1036 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 1037 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4 1038 // CHECK9-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 1039 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 1040 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64 1041 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM9]] 1042 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8* 1043 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8* 1044 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false) 1045 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1046 // CHECK9: omp.body.continue: 1047 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1048 // CHECK9: omp.inner.for.inc: 1049 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1050 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 1051 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 1052 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1053 // CHECK9: omp.inner.for.end: 1054 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1055 // CHECK9: omp.loop.exit: 1056 // CHECK9-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1057 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1058 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1059 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1060 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 1061 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1062 // CHECK9: .omp.lastprivate.then: 1063 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 1064 // CHECK9-NEXT: store i32 [[TMP25]], i32* [[TMP1]], align 4 1065 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1066 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 1067 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false) 1068 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 1069 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 1070 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 1071 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP29]] 1072 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1073 // CHECK9: omp.arraycpy.body: 1074 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1075 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1076 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1077 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1078 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 1079 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1080 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1081 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 1082 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 1083 // CHECK9: omp.arraycpy.done13: 1084 // CHECK9-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 1085 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 1086 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 1087 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 1088 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 1089 // CHECK9-NEXT: store i32 [[TMP35]], i32* [[TMP4]], align 4 1090 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1091 // CHECK9: .omp.lastprivate.done: 1092 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR5]]) #[[ATTR4]] 1093 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 1094 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 1095 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1096 // CHECK9: arraydestroy.body: 1097 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1098 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1099 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1100 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 1101 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 1102 // CHECK9: arraydestroy.done15: 1103 // CHECK9-NEXT: ret void 1104 // 1105 // 1106 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1107 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1108 // CHECK9-NEXT: entry: 1109 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1110 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1111 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1112 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]] 1113 // CHECK9-NEXT: ret void 1114 // 1115 // 1116 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1117 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 1118 // CHECK9-NEXT: entry: 1119 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1120 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1121 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1122 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1123 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1124 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1125 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1126 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1127 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1128 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1129 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1130 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1131 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]]) 1132 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1133 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1134 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1135 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1136 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1137 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1138 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1139 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1140 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1141 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1142 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1143 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1144 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1145 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1146 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1147 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1148 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1149 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1150 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1151 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1152 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1153 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1154 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1155 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1156 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1157 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1158 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1159 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1160 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1161 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1162 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1163 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1164 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1165 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1166 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1167 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1168 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1169 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1170 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1171 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1172 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8 1173 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1174 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1175 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1176 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1177 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1178 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1179 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1180 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8 1181 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1182 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1183 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1184 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1185 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1186 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1187 // CHECK9: omp_offload.failed: 1188 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1189 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1190 // CHECK9: omp_offload.cont: 1191 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1192 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1193 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1194 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1195 // CHECK9: arraydestroy.body: 1196 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1197 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1198 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1199 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1200 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1201 // CHECK9: arraydestroy.done2: 1202 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]] 1203 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 1204 // CHECK9-NEXT: ret i32 [[TMP32]] 1205 // 1206 // 1207 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1208 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1209 // CHECK9-NEXT: entry: 1210 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1211 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1212 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1213 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1214 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1215 // CHECK9-NEXT: ret void 1216 // 1217 // 1218 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1219 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1220 // CHECK9-NEXT: entry: 1221 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1222 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1223 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1224 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1225 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1226 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1227 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1228 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1229 // CHECK9-NEXT: ret void 1230 // 1231 // 1232 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1233 // CHECK9-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1234 // CHECK9-NEXT: entry: 1235 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1236 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1237 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1238 // CHECK9-NEXT: ret void 1239 // 1240 // 1241 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1242 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1243 // CHECK9-NEXT: entry: 1244 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1245 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1246 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1247 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]]) 1248 // CHECK9-NEXT: ret void 1249 // 1250 // 1251 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1252 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1253 // CHECK9-NEXT: entry: 1254 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1255 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1256 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1257 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1258 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1259 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1260 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef signext [[TMP0]]) 1261 // CHECK9-NEXT: ret void 1262 // 1263 // 1264 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1265 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1266 // CHECK9-NEXT: entry: 1267 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1268 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1269 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1270 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1271 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1272 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1273 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1274 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1275 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1276 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1277 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1278 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1279 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1280 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1281 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1282 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 1283 // CHECK9-NEXT: ret void 1284 // 1285 // 1286 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1287 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1288 // CHECK9-NEXT: entry: 1289 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1290 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1291 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1292 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1293 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1294 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1295 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1296 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1297 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1298 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1299 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1300 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1301 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1302 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1303 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1304 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1305 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1306 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 1307 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1308 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1309 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1310 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1311 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1312 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1313 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1314 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1315 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1316 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1317 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1318 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 1319 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1320 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1321 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1322 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1323 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 1324 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1325 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1326 // CHECK9: arrayctor.loop: 1327 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1328 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]]) 1329 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1330 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1331 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1332 // CHECK9: arrayctor.cont: 1333 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1334 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR5]]) 1335 // CHECK9-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 1336 // CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1337 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1338 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1339 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1340 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 1341 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1342 // CHECK9: cond.true: 1343 // CHECK9-NEXT: br label [[COND_END:%.*]] 1344 // CHECK9: cond.false: 1345 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1346 // CHECK9-NEXT: br label [[COND_END]] 1347 // CHECK9: cond.end: 1348 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 1349 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1350 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1351 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 1352 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1353 // CHECK9: omp.inner.for.cond: 1354 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1355 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1356 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 1357 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1358 // CHECK9: omp.inner.for.cond.cleanup: 1359 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1360 // CHECK9: omp.inner.for.body: 1361 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1362 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 1363 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1364 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1365 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4 1366 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 1367 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64 1368 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 1369 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 1370 // CHECK9-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 1371 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 1372 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64 1373 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 1374 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8* 1375 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8* 1376 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 4, i1 false) 1377 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1378 // CHECK9: omp.body.continue: 1379 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1380 // CHECK9: omp.inner.for.inc: 1381 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1382 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1 1383 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 1384 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1385 // CHECK9: omp.inner.for.end: 1386 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1387 // CHECK9: omp.loop.exit: 1388 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1389 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1390 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1391 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1392 // CHECK9-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1393 // CHECK9-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1394 // CHECK9: .omp.lastprivate.then: 1395 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4 1396 // CHECK9-NEXT: store i32 [[TMP24]], i32* [[TMP1]], align 4 1397 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1398 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 1399 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 8, i1 false) 1400 // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 1401 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 1402 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2 1403 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP28]] 1404 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1405 // CHECK9: omp.arraycpy.body: 1406 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1407 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1408 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1409 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1410 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false) 1411 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1412 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1413 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]] 1414 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 1415 // CHECK9: omp.arraycpy.done12: 1416 // CHECK9-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 1417 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 1418 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8* 1419 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 1420 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1421 // CHECK9: .omp.lastprivate.done: 1422 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR5]]) #[[ATTR4]] 1423 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 1424 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 1425 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1426 // CHECK9: arraydestroy.body: 1427 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1428 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1429 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1430 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1431 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1432 // CHECK9: arraydestroy.done14: 1433 // CHECK9-NEXT: ret void 1434 // 1435 // 1436 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1437 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1438 // CHECK9-NEXT: entry: 1439 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1440 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1441 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1442 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]] 1443 // CHECK9-NEXT: ret void 1444 // 1445 // 1446 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1447 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1448 // CHECK9-NEXT: entry: 1449 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1450 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1451 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1452 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1453 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1454 // CHECK9-NEXT: ret void 1455 // 1456 // 1457 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1458 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1459 // CHECK9-NEXT: entry: 1460 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1461 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1462 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1463 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1464 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1465 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1466 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1467 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1468 // CHECK9-NEXT: ret void 1469 // 1470 // 1471 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1472 // CHECK9-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1473 // CHECK9-NEXT: entry: 1474 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1475 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1476 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1477 // CHECK9-NEXT: ret void 1478 // 1479 // 1480 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1481 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1482 // CHECK9-NEXT: entry: 1483 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1484 // CHECK9-NEXT: ret void 1485 // 1486 // 1487 // CHECK10-LABEL: define {{[^@]+}}@main 1488 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1489 // CHECK10-NEXT: entry: 1490 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1491 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1492 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1493 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1494 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1495 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1496 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1497 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1498 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1499 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1500 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1501 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1502 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1503 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1504 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1505 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1506 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1507 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1508 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]]) 1509 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1510 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1511 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1512 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1513 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1514 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1515 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1516 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1517 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 1518 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 1519 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1520 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1521 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1522 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1523 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1524 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 1525 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1526 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1527 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1528 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1529 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1530 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1531 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1532 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1533 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1534 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 1535 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 1536 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1537 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8 1538 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1539 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1540 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1541 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1542 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 1543 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 1544 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1545 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 8 1546 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1547 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 1548 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 1549 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1550 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 1551 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 1552 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1553 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8 1554 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1555 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 1556 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 1557 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1558 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 1559 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 1560 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1561 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 8 1562 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1563 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1564 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1565 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1566 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 1567 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 1568 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1569 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 8 1570 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1571 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1572 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1573 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1574 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1575 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1576 // CHECK10: omp_offload.failed: 1577 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 1578 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1579 // CHECK10: omp_offload.cont: 1580 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1581 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1582 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1583 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1584 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1585 // CHECK10: arraydestroy.body: 1586 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1587 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1588 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1589 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1590 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1591 // CHECK10: arraydestroy.done3: 1592 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]] 1593 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 1594 // CHECK10-NEXT: ret i32 [[TMP39]] 1595 // 1596 // 1597 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1598 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1599 // CHECK10-NEXT: entry: 1600 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1601 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1602 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1603 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]]) 1604 // CHECK10-NEXT: ret void 1605 // 1606 // 1607 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1608 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1609 // CHECK10-NEXT: entry: 1610 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1611 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1612 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1613 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1614 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1615 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1616 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]]) 1617 // CHECK10-NEXT: ret void 1618 // 1619 // 1620 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 1621 // CHECK10-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1622 // CHECK10-NEXT: entry: 1623 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1624 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1625 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1626 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1627 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1628 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1629 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1630 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1631 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1632 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1633 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1634 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1635 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1636 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1637 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1638 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1639 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1640 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1641 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 1642 // CHECK10-NEXT: ret void 1643 // 1644 // 1645 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1646 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1647 // CHECK10-NEXT: entry: 1648 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1649 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1650 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1651 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1652 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1653 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1654 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1655 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1656 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1657 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1658 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1659 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1660 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1661 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1662 // CHECK10-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1663 // CHECK10-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1664 // CHECK10-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 1665 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1666 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 1667 // CHECK10-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 1668 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1669 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1670 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1671 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1672 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1673 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1674 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1675 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1676 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1677 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1678 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1679 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1680 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1681 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1682 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1683 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1684 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1685 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1686 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 1687 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1688 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1689 // CHECK10: arrayctor.loop: 1690 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1691 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]]) 1692 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1693 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1694 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1695 // CHECK10: arrayctor.cont: 1696 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1697 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR5]]) 1698 // CHECK10-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 1699 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1700 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1701 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1702 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1703 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 1704 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1705 // CHECK10: cond.true: 1706 // CHECK10-NEXT: br label [[COND_END:%.*]] 1707 // CHECK10: cond.false: 1708 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1709 // CHECK10-NEXT: br label [[COND_END]] 1710 // CHECK10: cond.end: 1711 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 1712 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1713 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1714 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 1715 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1716 // CHECK10: omp.inner.for.cond: 1717 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1718 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1719 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 1720 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1721 // CHECK10: omp.inner.for.cond.cleanup: 1722 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1723 // CHECK10: omp.inner.for.body: 1724 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1725 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 1726 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1727 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1728 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4 1729 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1730 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 1731 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 1732 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4 1733 // CHECK10-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 1734 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 1735 // CHECK10-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64 1736 // CHECK10-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM9]] 1737 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8* 1738 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8* 1739 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false) 1740 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1741 // CHECK10: omp.body.continue: 1742 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1743 // CHECK10: omp.inner.for.inc: 1744 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1745 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 1746 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 1747 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1748 // CHECK10: omp.inner.for.end: 1749 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1750 // CHECK10: omp.loop.exit: 1751 // CHECK10-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1752 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1753 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1754 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1755 // CHECK10-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 1756 // CHECK10-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1757 // CHECK10: .omp.lastprivate.then: 1758 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 1759 // CHECK10-NEXT: store i32 [[TMP25]], i32* [[TMP1]], align 4 1760 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1761 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 1762 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false) 1763 // CHECK10-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 1764 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 1765 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 1766 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP29]] 1767 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1768 // CHECK10: omp.arraycpy.body: 1769 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1770 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1771 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1772 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1773 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 1774 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1775 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1776 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 1777 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 1778 // CHECK10: omp.arraycpy.done13: 1779 // CHECK10-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 1780 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 1781 // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 1782 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 1783 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 1784 // CHECK10-NEXT: store i32 [[TMP35]], i32* [[TMP4]], align 4 1785 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1786 // CHECK10: .omp.lastprivate.done: 1787 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR5]]) #[[ATTR4]] 1788 // CHECK10-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 1789 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 1790 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1791 // CHECK10: arraydestroy.body: 1792 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1793 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1794 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1795 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 1796 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 1797 // CHECK10: arraydestroy.done15: 1798 // CHECK10-NEXT: ret void 1799 // 1800 // 1801 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1802 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1803 // CHECK10-NEXT: entry: 1804 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1805 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1806 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1807 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]] 1808 // CHECK10-NEXT: ret void 1809 // 1810 // 1811 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1812 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 1813 // CHECK10-NEXT: entry: 1814 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1815 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1816 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1817 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1818 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1819 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1820 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1821 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1822 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1823 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1824 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1825 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1826 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]]) 1827 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1828 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1829 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1830 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1831 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1832 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1833 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1834 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1835 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1836 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1837 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1838 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1839 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1840 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1841 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1842 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1843 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1844 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1845 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1846 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1847 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1848 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1849 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1850 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1851 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 1852 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1853 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1854 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1855 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1856 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1857 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1858 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1859 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 1860 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1861 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1862 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1863 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1864 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1865 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1866 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1867 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 8 1868 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1869 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1870 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1871 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1872 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1873 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1874 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1875 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 8 1876 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1877 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1878 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1879 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1880 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1881 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1882 // CHECK10: omp_offload.failed: 1883 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1884 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1885 // CHECK10: omp_offload.cont: 1886 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1887 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1888 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1889 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1890 // CHECK10: arraydestroy.body: 1891 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1892 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1893 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1894 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1895 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1896 // CHECK10: arraydestroy.done2: 1897 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]] 1898 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 1899 // CHECK10-NEXT: ret i32 [[TMP32]] 1900 // 1901 // 1902 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1903 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1904 // CHECK10-NEXT: entry: 1905 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1906 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1907 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1908 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1909 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 1910 // CHECK10-NEXT: ret void 1911 // 1912 // 1913 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1914 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1915 // CHECK10-NEXT: entry: 1916 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1917 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1918 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1919 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1920 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1921 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1922 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1923 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 1924 // CHECK10-NEXT: ret void 1925 // 1926 // 1927 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1928 // CHECK10-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1929 // CHECK10-NEXT: entry: 1930 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1931 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1932 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1933 // CHECK10-NEXT: ret void 1934 // 1935 // 1936 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1937 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1938 // CHECK10-NEXT: entry: 1939 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1940 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1941 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1942 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]]) 1943 // CHECK10-NEXT: ret void 1944 // 1945 // 1946 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1947 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1948 // CHECK10-NEXT: entry: 1949 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1950 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1951 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1952 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1953 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1954 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1955 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef signext [[TMP0]]) 1956 // CHECK10-NEXT: ret void 1957 // 1958 // 1959 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1960 // CHECK10-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1961 // CHECK10-NEXT: entry: 1962 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1963 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1964 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1965 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1966 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1967 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1968 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1969 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1970 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1971 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1972 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1973 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1974 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1975 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1976 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1977 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[CONV]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 1978 // CHECK10-NEXT: ret void 1979 // 1980 // 1981 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 1982 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1983 // CHECK10-NEXT: entry: 1984 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1985 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1986 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1987 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1988 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1989 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1990 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1991 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1992 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1993 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1994 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1995 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1996 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1997 // CHECK10-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1998 // CHECK10-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1999 // CHECK10-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2000 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2001 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 2002 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2003 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2004 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2005 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2006 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2007 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2008 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2009 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2010 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2011 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2012 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2013 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 2014 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2015 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2016 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2017 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2018 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2019 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2020 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2021 // CHECK10: arrayctor.loop: 2022 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2023 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]]) 2024 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2025 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2026 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2027 // CHECK10: arrayctor.cont: 2028 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2029 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR5]]) 2030 // CHECK10-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 2031 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2032 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2033 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2034 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2035 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 2036 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2037 // CHECK10: cond.true: 2038 // CHECK10-NEXT: br label [[COND_END:%.*]] 2039 // CHECK10: cond.false: 2040 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2041 // CHECK10-NEXT: br label [[COND_END]] 2042 // CHECK10: cond.end: 2043 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2044 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2045 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2046 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 2047 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2048 // CHECK10: omp.inner.for.cond: 2049 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2050 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2051 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2052 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2053 // CHECK10: omp.inner.for.cond.cleanup: 2054 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2055 // CHECK10: omp.inner.for.body: 2056 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2057 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 2058 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2059 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2060 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4 2061 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 2062 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64 2063 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 2064 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 2065 // CHECK10-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 2066 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 2067 // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64 2068 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 2069 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8* 2070 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8* 2071 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 4, i1 false) 2072 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2073 // CHECK10: omp.body.continue: 2074 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2075 // CHECK10: omp.inner.for.inc: 2076 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2077 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1 2078 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 2079 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2080 // CHECK10: omp.inner.for.end: 2081 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2082 // CHECK10: omp.loop.exit: 2083 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2084 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 2085 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 2086 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2087 // CHECK10-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 2088 // CHECK10-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2089 // CHECK10: .omp.lastprivate.then: 2090 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4 2091 // CHECK10-NEXT: store i32 [[TMP24]], i32* [[TMP1]], align 4 2092 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2093 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2094 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 8, i1 false) 2095 // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 2096 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 2097 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2 2098 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP28]] 2099 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2100 // CHECK10: omp.arraycpy.body: 2101 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2102 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2103 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2104 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2105 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false) 2106 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2107 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2108 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]] 2109 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 2110 // CHECK10: omp.arraycpy.done12: 2111 // CHECK10-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 2112 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 2113 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8* 2114 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 2115 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2116 // CHECK10: .omp.lastprivate.done: 2117 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR5]]) #[[ATTR4]] 2118 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2119 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 2120 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2121 // CHECK10: arraydestroy.body: 2122 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2123 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2124 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2125 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2126 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2127 // CHECK10: arraydestroy.done14: 2128 // CHECK10-NEXT: ret void 2129 // 2130 // 2131 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2132 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2133 // CHECK10-NEXT: entry: 2134 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2135 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2136 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2137 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]] 2138 // CHECK10-NEXT: ret void 2139 // 2140 // 2141 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2142 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2143 // CHECK10-NEXT: entry: 2144 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2145 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2146 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2147 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2148 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 2149 // CHECK10-NEXT: ret void 2150 // 2151 // 2152 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2153 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2154 // CHECK10-NEXT: entry: 2155 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2156 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2157 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2158 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2159 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2160 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2161 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2162 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2163 // CHECK10-NEXT: ret void 2164 // 2165 // 2166 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2167 // CHECK10-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2168 // CHECK10-NEXT: entry: 2169 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2170 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2171 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2172 // CHECK10-NEXT: ret void 2173 // 2174 // 2175 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2176 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 2177 // CHECK10-NEXT: entry: 2178 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2179 // CHECK10-NEXT: ret void 2180 // 2181 // 2182 // CHECK11-LABEL: define {{[^@]+}}@main 2183 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2184 // CHECK11-NEXT: entry: 2185 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2186 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 2187 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 2188 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2189 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2190 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2191 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2192 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2193 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2194 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2195 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2196 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2197 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2198 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2199 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2200 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2201 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2202 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 2203 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]]) 2204 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2205 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2206 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2207 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2208 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2209 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2210 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2211 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2212 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2213 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2214 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2215 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2216 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2217 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2218 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2219 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2220 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2221 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2222 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2223 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2224 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2225 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2226 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2227 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 2228 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 2229 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2230 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 2231 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2232 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2233 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2234 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2235 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 2236 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 2237 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2238 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4 2239 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2240 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2241 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 2242 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2243 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 2244 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 2245 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2246 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4 2247 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2248 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2249 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 2250 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2251 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 2252 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 2253 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2254 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4 2255 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2256 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2257 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 2258 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2259 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 2260 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 2261 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2262 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4 2263 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2264 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2265 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2266 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2267 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2268 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2269 // CHECK11: omp_offload.failed: 2270 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 2271 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2272 // CHECK11: omp_offload.cont: 2273 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2274 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2275 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2276 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2277 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2278 // CHECK11: arraydestroy.body: 2279 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2280 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2281 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2282 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2283 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2284 // CHECK11: arraydestroy.done2: 2285 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]] 2286 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 2287 // CHECK11-NEXT: ret i32 [[TMP39]] 2288 // 2289 // 2290 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2291 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2292 // CHECK11-NEXT: entry: 2293 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2294 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2295 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2296 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]]) 2297 // CHECK11-NEXT: ret void 2298 // 2299 // 2300 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2301 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2302 // CHECK11-NEXT: entry: 2303 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2304 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2305 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2306 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2307 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2308 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2309 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]]) 2310 // CHECK11-NEXT: ret void 2311 // 2312 // 2313 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 2314 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 2315 // CHECK11-NEXT: entry: 2316 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2317 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2318 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2319 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2320 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 2321 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2322 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2323 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2324 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2325 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2326 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 2327 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2328 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2329 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2330 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 2331 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2332 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 2333 // CHECK11-NEXT: ret void 2334 // 2335 // 2336 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2337 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 2338 // CHECK11-NEXT: entry: 2339 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2340 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2341 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2342 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 2343 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2344 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2345 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 2346 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2347 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2348 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2349 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2350 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2351 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2352 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2353 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2354 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2355 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 2356 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2357 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 2358 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 2359 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2360 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2361 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2362 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2363 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 2364 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2365 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2366 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 2367 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2368 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 2369 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2370 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2371 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 2372 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 2373 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2374 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2375 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2376 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2377 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 2378 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2379 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2380 // CHECK11: arrayctor.loop: 2381 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2382 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]]) 2383 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2384 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2385 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2386 // CHECK11: arrayctor.cont: 2387 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2388 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR5]]) 2389 // CHECK11-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 2390 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2391 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2392 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2393 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2394 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 2395 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2396 // CHECK11: cond.true: 2397 // CHECK11-NEXT: br label [[COND_END:%.*]] 2398 // CHECK11: cond.false: 2399 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2400 // CHECK11-NEXT: br label [[COND_END]] 2401 // CHECK11: cond.end: 2402 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 2403 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2404 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2405 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 2406 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2407 // CHECK11: omp.inner.for.cond: 2408 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2409 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2410 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 2411 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2412 // CHECK11: omp.inner.for.cond.cleanup: 2413 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2414 // CHECK11: omp.inner.for.body: 2415 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2416 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 2417 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2418 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2419 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4 2420 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 2421 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP15]] 2422 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4 2423 // CHECK11-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 2424 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 2425 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP17]] 2426 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* 2427 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8* 2428 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false) 2429 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2430 // CHECK11: omp.body.continue: 2431 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2432 // CHECK11: omp.inner.for.inc: 2433 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2434 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1 2435 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 2436 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2437 // CHECK11: omp.inner.for.end: 2438 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2439 // CHECK11: omp.loop.exit: 2440 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2441 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2442 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2443 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2444 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2445 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2446 // CHECK11: .omp.lastprivate.then: 2447 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 2448 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[TMP1]], align 4 2449 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2450 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2451 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 8, i1 false) 2452 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 2453 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 2454 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 2455 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP29]] 2456 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2457 // CHECK11: omp.arraycpy.body: 2458 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2459 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2460 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2461 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2462 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false) 2463 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2464 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2465 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 2466 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 2467 // CHECK11: omp.arraycpy.done12: 2468 // CHECK11-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 2469 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 2470 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 2471 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) 2472 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 2473 // CHECK11-NEXT: store i32 [[TMP35]], i32* [[TMP4]], align 4 2474 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2475 // CHECK11: .omp.lastprivate.done: 2476 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR5]]) #[[ATTR4]] 2477 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 2478 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 2479 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2480 // CHECK11: arraydestroy.body: 2481 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2482 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2483 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2484 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2485 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2486 // CHECK11: arraydestroy.done14: 2487 // CHECK11-NEXT: ret void 2488 // 2489 // 2490 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2491 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2492 // CHECK11-NEXT: entry: 2493 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2494 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2495 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2496 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]] 2497 // CHECK11-NEXT: ret void 2498 // 2499 // 2500 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2501 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 2502 // CHECK11-NEXT: entry: 2503 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2504 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2505 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2506 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2507 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2508 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2509 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2510 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2511 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 2512 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 2513 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 2514 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2515 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]]) 2516 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2517 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2518 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2519 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2520 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef 1) 2521 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2522 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2523 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2524 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 2525 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 2526 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2527 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2528 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2529 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2530 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2531 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2532 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2533 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2534 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 2535 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2536 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2537 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2538 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2539 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2540 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2541 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 2542 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 2543 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2544 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2545 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2546 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2547 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2548 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2549 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 2550 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 2551 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2552 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 2553 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 2554 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2555 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 2556 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2557 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 2558 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 2559 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2560 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 2561 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 2562 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2563 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 2564 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2565 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2566 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2567 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2568 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 2569 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2570 // CHECK11: omp_offload.failed: 2571 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 2572 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2573 // CHECK11: omp_offload.cont: 2574 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2575 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2576 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2577 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2578 // CHECK11: arraydestroy.body: 2579 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2580 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2581 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2582 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2583 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2584 // CHECK11: arraydestroy.done2: 2585 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]] 2586 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 2587 // CHECK11-NEXT: ret i32 [[TMP32]] 2588 // 2589 // 2590 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2591 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2592 // CHECK11-NEXT: entry: 2593 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2594 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2595 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2596 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2597 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2598 // CHECK11-NEXT: ret void 2599 // 2600 // 2601 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2602 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2603 // CHECK11-NEXT: entry: 2604 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2605 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2606 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2607 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2608 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2609 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2610 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2611 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2612 // CHECK11-NEXT: ret void 2613 // 2614 // 2615 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2616 // CHECK11-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2617 // CHECK11-NEXT: entry: 2618 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2619 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2620 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2621 // CHECK11-NEXT: ret void 2622 // 2623 // 2624 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2625 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2626 // CHECK11-NEXT: entry: 2627 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2628 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2629 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2630 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]]) 2631 // CHECK11-NEXT: ret void 2632 // 2633 // 2634 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2635 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2636 // CHECK11-NEXT: entry: 2637 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2638 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2639 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2640 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2641 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2642 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2643 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef [[TMP0]]) 2644 // CHECK11-NEXT: ret void 2645 // 2646 // 2647 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2648 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2649 // CHECK11-NEXT: entry: 2650 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2651 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2652 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2653 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2654 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2655 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2656 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2657 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2658 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2659 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2660 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2661 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2662 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 2663 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2664 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 2665 // CHECK11-NEXT: ret void 2666 // 2667 // 2668 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2669 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2670 // CHECK11-NEXT: entry: 2671 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2672 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2673 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2674 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 2675 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2676 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2677 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2678 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2679 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2680 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2681 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2682 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2683 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2684 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2685 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2686 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2687 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2688 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 2689 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2690 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2691 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2692 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2693 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 2694 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2695 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2696 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2697 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 2698 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2699 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2700 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 2701 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2702 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2703 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2704 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2705 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2706 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2707 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2708 // CHECK11: arrayctor.loop: 2709 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2710 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]]) 2711 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2712 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2713 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2714 // CHECK11: arrayctor.cont: 2715 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2716 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR5]]) 2717 // CHECK11-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 2718 // CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2719 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2720 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2721 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2722 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 2723 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2724 // CHECK11: cond.true: 2725 // CHECK11-NEXT: br label [[COND_END:%.*]] 2726 // CHECK11: cond.false: 2727 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2728 // CHECK11-NEXT: br label [[COND_END]] 2729 // CHECK11: cond.end: 2730 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2731 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2732 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2733 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 2734 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2735 // CHECK11: omp.inner.for.cond: 2736 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2737 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2738 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2739 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2740 // CHECK11: omp.inner.for.cond.cleanup: 2741 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2742 // CHECK11: omp.inner.for.body: 2743 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2744 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 2745 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2746 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2747 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4 2748 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 2749 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP14]] 2750 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 2751 // CHECK11-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 2752 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 2753 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP16]] 2754 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 2755 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8* 2756 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 4, i1 false) 2757 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2758 // CHECK11: omp.body.continue: 2759 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2760 // CHECK11: omp.inner.for.inc: 2761 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2762 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], 1 2763 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 2764 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2765 // CHECK11: omp.inner.for.end: 2766 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2767 // CHECK11: omp.loop.exit: 2768 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2769 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 2770 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 2771 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2772 // CHECK11-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 2773 // CHECK11-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2774 // CHECK11: .omp.lastprivate.then: 2775 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4 2776 // CHECK11-NEXT: store i32 [[TMP24]], i32* [[TMP1]], align 4 2777 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2778 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2779 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 8, i1 false) 2780 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 2781 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 2782 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 2783 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP28]] 2784 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2785 // CHECK11: omp.arraycpy.body: 2786 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2787 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2788 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2789 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2790 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false) 2791 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2792 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2793 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]] 2794 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 2795 // CHECK11: omp.arraycpy.done11: 2796 // CHECK11-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 2797 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 2798 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8* 2799 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false) 2800 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2801 // CHECK11: .omp.lastprivate.done: 2802 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR5]]) #[[ATTR4]] 2803 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2804 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 2805 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2806 // CHECK11: arraydestroy.body: 2807 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2808 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2809 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2810 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2811 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2812 // CHECK11: arraydestroy.done13: 2813 // CHECK11-NEXT: ret void 2814 // 2815 // 2816 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2817 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2818 // CHECK11-NEXT: entry: 2819 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2820 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2821 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2822 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]] 2823 // CHECK11-NEXT: ret void 2824 // 2825 // 2826 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2827 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2828 // CHECK11-NEXT: entry: 2829 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2830 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2831 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2832 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2833 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 2834 // CHECK11-NEXT: ret void 2835 // 2836 // 2837 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2838 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2839 // CHECK11-NEXT: entry: 2840 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2841 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2842 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2843 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2844 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2845 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2846 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2847 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2848 // CHECK11-NEXT: ret void 2849 // 2850 // 2851 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2852 // CHECK11-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2853 // CHECK11-NEXT: entry: 2854 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2855 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2856 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2857 // CHECK11-NEXT: ret void 2858 // 2859 // 2860 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2861 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2862 // CHECK11-NEXT: entry: 2863 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2864 // CHECK11-NEXT: ret void 2865 // 2866 // 2867 // CHECK12-LABEL: define {{[^@]+}}@main 2868 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2869 // CHECK12-NEXT: entry: 2870 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2871 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 2872 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 2873 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2874 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2875 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2876 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2877 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2878 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2879 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2880 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2881 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2882 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2883 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2884 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2885 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2886 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2887 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 2888 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[TEST]]) 2889 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2890 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2891 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2892 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2893 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2894 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2895 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2896 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2897 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2898 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2899 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2900 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2901 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2902 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2903 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2904 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2905 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2906 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2907 // CHECK12-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2908 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2909 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2910 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2911 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2912 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 2913 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 2914 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2915 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4 2916 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2917 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2918 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2919 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2920 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 2921 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 2922 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2923 // CHECK12-NEXT: store i8* null, i8** [[TMP18]], align 4 2924 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2925 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2926 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 2927 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2928 // CHECK12-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 2929 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 2930 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2931 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4 2932 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2933 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2934 // CHECK12-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 2935 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2936 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 2937 // CHECK12-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 2938 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2939 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4 2940 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2941 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2942 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 2943 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2944 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 2945 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 2946 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2947 // CHECK12-NEXT: store i8* null, i8** [[TMP33]], align 4 2948 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2949 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2950 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2951 // CHECK12-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2952 // CHECK12-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2953 // CHECK12-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2954 // CHECK12: omp_offload.failed: 2955 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 2956 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2957 // CHECK12: omp_offload.cont: 2958 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2959 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2960 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2961 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2962 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2963 // CHECK12: arraydestroy.body: 2964 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2965 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2966 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2967 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2968 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2969 // CHECK12: arraydestroy.done2: 2970 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[TEST]]) #[[ATTR4]] 2971 // CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 2972 // CHECK12-NEXT: ret i32 [[TMP39]] 2973 // 2974 // 2975 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2976 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2977 // CHECK12-NEXT: entry: 2978 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2979 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2980 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2981 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef [[THIS1]]) 2982 // CHECK12-NEXT: ret void 2983 // 2984 // 2985 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2986 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2987 // CHECK12-NEXT: entry: 2988 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2989 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2990 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2991 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2992 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2993 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2994 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef [[THIS1]], float noundef [[TMP0]]) 2995 // CHECK12-NEXT: ret void 2996 // 2997 // 2998 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 2999 // CHECK12-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 3000 // CHECK12-NEXT: entry: 3001 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3002 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3003 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3004 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3005 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3006 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3007 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3008 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3009 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3010 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3011 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3012 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3013 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3014 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3015 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3016 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3017 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 3018 // CHECK12-NEXT: ret void 3019 // 3020 // 3021 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 3022 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 3023 // CHECK12-NEXT: entry: 3024 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3025 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3026 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3027 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3028 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3029 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3030 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 3031 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3032 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3033 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3034 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3035 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3036 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3037 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3038 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3039 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3040 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 3041 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3042 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 3043 // CHECK12-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 3044 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3045 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3046 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3047 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3048 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3049 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3050 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3051 // CHECK12-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 3052 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3053 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3054 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3055 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3056 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 3057 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 3058 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3059 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3060 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3061 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3062 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3063 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3064 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3065 // CHECK12: arrayctor.loop: 3066 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3067 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[ARRAYCTOR_CUR]]) 3068 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3069 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3070 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3071 // CHECK12: arrayctor.cont: 3072 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3073 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef [[VAR5]]) 3074 // CHECK12-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 3075 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3076 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3077 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3078 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3079 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 3080 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3081 // CHECK12: cond.true: 3082 // CHECK12-NEXT: br label [[COND_END:%.*]] 3083 // CHECK12: cond.false: 3084 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3085 // CHECK12-NEXT: br label [[COND_END]] 3086 // CHECK12: cond.end: 3087 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 3088 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3089 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3090 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 3091 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3092 // CHECK12: omp.inner.for.cond: 3093 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3094 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3095 // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 3096 // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3097 // CHECK12: omp.inner.for.cond.cleanup: 3098 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3099 // CHECK12: omp.inner.for.body: 3100 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3101 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 3102 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3103 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3104 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4 3105 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 3106 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP15]] 3107 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4 3108 // CHECK12-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3109 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 3110 // CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP17]] 3111 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* 3112 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8* 3113 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false) 3114 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3115 // CHECK12: omp.body.continue: 3116 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3117 // CHECK12: omp.inner.for.inc: 3118 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3119 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1 3120 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 3121 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3122 // CHECK12: omp.inner.for.end: 3123 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3124 // CHECK12: omp.loop.exit: 3125 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3126 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 3127 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 3128 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3129 // CHECK12-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3130 // CHECK12-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3131 // CHECK12: .omp.lastprivate.then: 3132 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 3133 // CHECK12-NEXT: store i32 [[TMP25]], i32* [[TMP1]], align 4 3134 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3135 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3136 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 8, i1 false) 3137 // CHECK12-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 3138 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 3139 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 3140 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP29]] 3141 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3142 // CHECK12: omp.arraycpy.body: 3143 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3144 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3145 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3146 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3147 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false) 3148 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3149 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3150 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 3151 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 3152 // CHECK12: omp.arraycpy.done12: 3153 // CHECK12-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3154 // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 3155 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 3156 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) 3157 // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 3158 // CHECK12-NEXT: store i32 [[TMP35]], i32* [[TMP4]], align 4 3159 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3160 // CHECK12: .omp.lastprivate.done: 3161 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[VAR5]]) #[[ATTR4]] 3162 // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3163 // CHECK12-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 3164 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3165 // CHECK12: arraydestroy.body: 3166 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3167 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3168 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3169 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 3170 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 3171 // CHECK12: arraydestroy.done14: 3172 // CHECK12-NEXT: ret void 3173 // 3174 // 3175 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3176 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3177 // CHECK12-NEXT: entry: 3178 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3179 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3180 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3181 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef [[THIS1]]) #[[ATTR4]] 3182 // CHECK12-NEXT: ret void 3183 // 3184 // 3185 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3186 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 3187 // CHECK12-NEXT: entry: 3188 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3189 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3190 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3191 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3192 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3193 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3194 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3195 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3196 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3197 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3198 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3199 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3200 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[TEST]]) 3201 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 3202 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3203 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3204 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3205 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_BEGIN]], i32 noundef 1) 3206 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3207 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef [[ARRAYINIT_ELEMENT]], i32 noundef 2) 3208 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3209 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 3210 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 3211 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3212 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3213 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3214 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3215 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3216 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3217 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3218 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3219 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 3220 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3221 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3222 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3223 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3224 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 3225 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3226 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 3227 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 3228 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3229 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3230 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3231 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3232 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 3233 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3234 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 3235 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 3236 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3237 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 3238 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 3239 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3240 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4 3241 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3242 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 3243 // CHECK12-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 3244 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3245 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 3246 // CHECK12-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 3247 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3248 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4 3249 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3250 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3251 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 3252 // CHECK12-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3253 // CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 3254 // CHECK12-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3255 // CHECK12: omp_offload.failed: 3256 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 3257 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3258 // CHECK12: omp_offload.cont: 3259 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3260 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3261 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3262 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3263 // CHECK12: arraydestroy.body: 3264 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3265 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3266 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3267 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3268 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3269 // CHECK12: arraydestroy.done2: 3270 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[TEST]]) #[[ATTR4]] 3271 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 3272 // CHECK12-NEXT: ret i32 [[TMP32]] 3273 // 3274 // 3275 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3276 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3277 // CHECK12-NEXT: entry: 3278 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3279 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3280 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3281 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3282 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 3283 // CHECK12-NEXT: ret void 3284 // 3285 // 3286 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3287 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3288 // CHECK12-NEXT: entry: 3289 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3290 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3291 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3292 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3293 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3294 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3295 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3296 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 3297 // CHECK12-NEXT: ret void 3298 // 3299 // 3300 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3301 // CHECK12-SAME: (%struct.S* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3302 // CHECK12-NEXT: entry: 3303 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3304 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3305 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3306 // CHECK12-NEXT: ret void 3307 // 3308 // 3309 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3310 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3311 // CHECK12-NEXT: entry: 3312 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3313 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3314 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3315 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef [[THIS1]]) 3316 // CHECK12-NEXT: ret void 3317 // 3318 // 3319 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3320 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3321 // CHECK12-NEXT: entry: 3322 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3323 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3324 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3325 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3326 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3327 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3328 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef [[THIS1]], i32 noundef [[TMP0]]) 3329 // CHECK12-NEXT: ret void 3330 // 3331 // 3332 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 3333 // CHECK12-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3334 // CHECK12-NEXT: entry: 3335 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3336 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3337 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3338 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3339 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3340 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3341 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3342 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3343 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3344 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3345 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3346 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3347 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3348 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3349 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32* [[T_VAR_ADDR]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 3350 // CHECK12-NEXT: ret void 3351 // 3352 // 3353 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3354 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3355 // CHECK12-NEXT: entry: 3356 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3357 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3358 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3359 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3360 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3361 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3362 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3363 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3364 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3365 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3366 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3367 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3368 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3369 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3370 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3371 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 3372 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3373 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 3374 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3375 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3376 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3377 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3378 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3379 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3380 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3381 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3382 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3383 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3384 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3385 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 3386 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3387 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3388 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3389 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3390 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3391 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3392 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3393 // CHECK12: arrayctor.loop: 3394 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3395 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[ARRAYCTOR_CUR]]) 3396 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3397 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3398 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3399 // CHECK12: arrayctor.cont: 3400 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3401 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef [[VAR5]]) 3402 // CHECK12-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 3403 // CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3404 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3405 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3406 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3407 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 3408 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3409 // CHECK12: cond.true: 3410 // CHECK12-NEXT: br label [[COND_END:%.*]] 3411 // CHECK12: cond.false: 3412 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3413 // CHECK12-NEXT: br label [[COND_END]] 3414 // CHECK12: cond.end: 3415 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3416 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3417 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3418 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 3419 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3420 // CHECK12: omp.inner.for.cond: 3421 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3422 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3423 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3424 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3425 // CHECK12: omp.inner.for.cond.cleanup: 3426 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3427 // CHECK12: omp.inner.for.body: 3428 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3429 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 3430 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3431 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3432 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4 3433 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 3434 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP14]] 3435 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 3436 // CHECK12-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 3437 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 3438 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP16]] 3439 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 3440 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[TMP15]] to i8* 3441 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 4, i1 false) 3442 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3443 // CHECK12: omp.body.continue: 3444 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3445 // CHECK12: omp.inner.for.inc: 3446 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3447 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], 1 3448 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 3449 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3450 // CHECK12: omp.inner.for.end: 3451 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3452 // CHECK12: omp.loop.exit: 3453 // CHECK12-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3454 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 3455 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 3456 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3457 // CHECK12-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 3458 // CHECK12-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3459 // CHECK12: .omp.lastprivate.then: 3460 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4 3461 // CHECK12-NEXT: store i32 [[TMP24]], i32* [[TMP1]], align 4 3462 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3463 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3464 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 8, i1 false) 3465 // CHECK12-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 3466 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 3467 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 3468 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP28]] 3469 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3470 // CHECK12: omp.arraycpy.body: 3471 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3472 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3473 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3474 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3475 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false) 3476 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3477 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3478 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]] 3479 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 3480 // CHECK12: omp.arraycpy.done11: 3481 // CHECK12-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 3482 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 3483 // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8* 3484 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false) 3485 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3486 // CHECK12: .omp.lastprivate.done: 3487 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[VAR5]]) #[[ATTR4]] 3488 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3489 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 3490 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3491 // CHECK12: arraydestroy.body: 3492 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3493 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3494 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3495 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 3496 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 3497 // CHECK12: arraydestroy.done13: 3498 // CHECK12-NEXT: ret void 3499 // 3500 // 3501 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3502 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3503 // CHECK12-NEXT: entry: 3504 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3505 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3506 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3507 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef [[THIS1]]) #[[ATTR4]] 3508 // CHECK12-NEXT: ret void 3509 // 3510 // 3511 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3512 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3513 // CHECK12-NEXT: entry: 3514 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3515 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3516 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3517 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3518 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 3519 // CHECK12-NEXT: ret void 3520 // 3521 // 3522 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3523 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3524 // CHECK12-NEXT: entry: 3525 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3526 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3527 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3528 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3529 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3530 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3531 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3532 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3533 // CHECK12-NEXT: ret void 3534 // 3535 // 3536 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3537 // CHECK12-SAME: (%struct.S.0* noundef [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3538 // CHECK12-NEXT: entry: 3539 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3540 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3541 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3542 // CHECK12-NEXT: ret void 3543 // 3544 // 3545 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3546 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 3547 // CHECK12-NEXT: entry: 3548 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3549 // CHECK12-NEXT: ret void 3550 // 3551