1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X]; 25 float b; 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute 30 for(int i = 0; i < X; i++) { 31 a[i] = (T)0; 32 } 33 #pragma omp target 34 #pragma omp teams distribute dist_schedule(static) 35 for(int i = 0; i < X; i++) { 36 a[i] = (T)0; 37 } 38 #pragma omp target 39 #pragma omp teams distribute dist_schedule(static, X/2) 40 for(int i = 0; i < X; i++) { 41 a[i] = (T)0; 42 } 43 44 45 46 47 48 49 return a[0]; 50 } 51 }; 52 53 int teams_template_struct(void) { 54 SS<int, 123, 456> V; 55 return V.foo(); 56 57 } 58 #endif // CK1 59 60 // Test host codegen. 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 64 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 67 68 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 69 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 70 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 71 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 72 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 73 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 74 #ifdef CK2 75 76 template <typename T, int n> 77 int tmain(T argc) { 78 T a[n]; 79 #pragma omp target 80 #pragma omp teams distribute 81 for(int i = 0; i < n; i++) { 82 a[i] = (T)0; 83 } 84 #pragma omp target 85 #pragma omp teams distribute dist_schedule(static) 86 for(int i = 0; i < n; i++) { 87 a[i] = (T)0; 88 } 89 #pragma omp target 90 #pragma omp teams distribute dist_schedule(static, n) 91 for(int i = 0; i < n; i++) { 92 a[i] = (T)0; 93 } 94 return 0; 95 } 96 97 int main (int argc, char **argv) { 98 int n = 100; 99 int a[n]; 100 #pragma omp target 101 #pragma omp teams distribute 102 for(int i = 0; i < n; i++) { 103 a[i] = 0; 104 } 105 #pragma omp target 106 #pragma omp teams distribute dist_schedule(static) 107 for(int i = 0; i < n; i++) { 108 a[i] = 0; 109 } 110 #pragma omp target 111 #pragma omp teams distribute dist_schedule(static, n) 112 for(int i = 0; i < n; i++) { 113 a[i] = 0; 114 } 115 return tmain<int, 10>(argc); 116 } 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 #endif // CK2 133 #endif // #ifndef HEADER 134 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 135 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 136 // CHECK1-NEXT: entry: 137 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 138 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 139 // CHECK1-NEXT: ret i32 [[CALL]] 140 // 141 // 142 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 143 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 144 // CHECK1-NEXT: entry: 145 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 146 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 147 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 148 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 149 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 151 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 152 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 153 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 155 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 156 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 157 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 158 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 159 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 160 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 161 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 162 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 163 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 164 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 165 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 166 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 167 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 168 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 169 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 170 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 171 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 172 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 173 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 174 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 175 // CHECK1: omp_offload.failed: 176 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 177 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 178 // CHECK1: omp_offload.cont: 179 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 180 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 181 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 182 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 183 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 184 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 185 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 186 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 187 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 188 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 189 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 190 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 191 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 192 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 193 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 194 // CHECK1: omp_offload.failed7: 195 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]] 196 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 197 // CHECK1: omp_offload.cont8: 198 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 199 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 200 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 201 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 202 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 203 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 204 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 205 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 206 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 207 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 208 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 209 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 210 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 211 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 212 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 213 // CHECK1: omp_offload.failed14: 214 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]] 215 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] 216 // CHECK1: omp_offload.cont15: 217 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 218 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0 219 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 220 // CHECK1-NEXT: ret i32 [[TMP27]] 221 // 222 // 223 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 224 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 225 // CHECK1-NEXT: entry: 226 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 227 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 228 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 229 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 230 // CHECK1-NEXT: ret void 231 // 232 // 233 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 234 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 235 // CHECK1-NEXT: entry: 236 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 237 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 238 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 239 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 243 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 244 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 245 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 246 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 247 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 248 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 249 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 250 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 251 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 252 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 253 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 254 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 255 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 256 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 257 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 258 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 259 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 260 // CHECK1: cond.true: 261 // CHECK1-NEXT: br label [[COND_END:%.*]] 262 // CHECK1: cond.false: 263 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 264 // CHECK1-NEXT: br label [[COND_END]] 265 // CHECK1: cond.end: 266 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 267 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 268 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 269 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 270 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 271 // CHECK1: omp.inner.for.cond: 272 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 273 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 274 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 275 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 276 // CHECK1: omp.inner.for.body: 277 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 278 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 279 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 280 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 281 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 282 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 283 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 284 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 285 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 286 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 287 // CHECK1: omp.body.continue: 288 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 289 // CHECK1: omp.inner.for.inc: 290 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 291 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 292 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 293 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 294 // CHECK1: omp.inner.for.end: 295 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 296 // CHECK1: omp.loop.exit: 297 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 298 // CHECK1-NEXT: ret void 299 // 300 // 301 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 302 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 303 // CHECK1-NEXT: entry: 304 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 305 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 306 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 307 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 308 // CHECK1-NEXT: ret void 309 // 310 // 311 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 312 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 313 // CHECK1-NEXT: entry: 314 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 315 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 316 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 317 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 318 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 319 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 320 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 321 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 322 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 323 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 324 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 325 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 326 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 327 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 328 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 329 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 330 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 331 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 332 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 333 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 334 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 335 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 336 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 337 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 338 // CHECK1: cond.true: 339 // CHECK1-NEXT: br label [[COND_END:%.*]] 340 // CHECK1: cond.false: 341 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 342 // CHECK1-NEXT: br label [[COND_END]] 343 // CHECK1: cond.end: 344 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 345 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 346 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 347 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 348 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 349 // CHECK1: omp.inner.for.cond: 350 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 351 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 352 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 353 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 354 // CHECK1: omp.inner.for.body: 355 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 356 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 357 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 358 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 359 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 360 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 361 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 362 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 363 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 364 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 365 // CHECK1: omp.body.continue: 366 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 367 // CHECK1: omp.inner.for.inc: 368 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 369 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 370 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 371 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 372 // CHECK1: omp.inner.for.end: 373 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 374 // CHECK1: omp.loop.exit: 375 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 376 // CHECK1-NEXT: ret void 377 // 378 // 379 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 380 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 381 // CHECK1-NEXT: entry: 382 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 383 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 384 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 385 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 386 // CHECK1-NEXT: ret void 387 // 388 // 389 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 390 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 391 // CHECK1-NEXT: entry: 392 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 393 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 394 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 395 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 396 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 397 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 398 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 399 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 400 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 403 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 404 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 405 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 406 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 407 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 408 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 409 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 410 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 411 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 412 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 413 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 414 // CHECK1: omp.dispatch.cond: 415 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 416 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 417 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 418 // CHECK1: cond.true: 419 // CHECK1-NEXT: br label [[COND_END:%.*]] 420 // CHECK1: cond.false: 421 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 422 // CHECK1-NEXT: br label [[COND_END]] 423 // CHECK1: cond.end: 424 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 425 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 426 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 427 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 428 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 429 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 430 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 431 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 432 // CHECK1: omp.dispatch.body: 433 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 434 // CHECK1: omp.inner.for.cond: 435 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 436 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8 437 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 438 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 439 // CHECK1: omp.inner.for.body: 440 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 441 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 442 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 443 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8 444 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 445 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8 446 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 447 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 448 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8 449 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 450 // CHECK1: omp.body.continue: 451 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 452 // CHECK1: omp.inner.for.inc: 453 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 454 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 455 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 456 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 457 // CHECK1: omp.inner.for.end: 458 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 459 // CHECK1: omp.dispatch.inc: 460 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 461 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 462 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 463 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 464 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 465 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 466 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 467 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 468 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 469 // CHECK1: omp.dispatch.end: 470 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 471 // CHECK1-NEXT: ret void 472 // 473 // 474 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 475 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 476 // CHECK1-NEXT: entry: 477 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 478 // CHECK1-NEXT: ret void 479 // 480 // 481 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 482 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 483 // CHECK3-NEXT: entry: 484 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 485 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 486 // CHECK3-NEXT: ret i32 [[CALL]] 487 // 488 // 489 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 490 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 491 // CHECK3-NEXT: entry: 492 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 493 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 494 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 495 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 496 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 497 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 498 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 499 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 500 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 501 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 502 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 503 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 504 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 505 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 506 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 507 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 508 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 509 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 510 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 511 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 512 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 513 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 514 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 515 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 516 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 517 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 518 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 519 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 520 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 521 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 522 // CHECK3: omp_offload.failed: 523 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 524 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 525 // CHECK3: omp_offload.cont: 526 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 527 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 528 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 529 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 530 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 531 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 532 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 533 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 534 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 535 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 536 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 537 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 538 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 539 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 540 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 541 // CHECK3: omp_offload.failed7: 542 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]] 543 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 544 // CHECK3: omp_offload.cont8: 545 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 546 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 547 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 548 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 549 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 550 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 551 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 552 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 553 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 554 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 555 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 556 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 557 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 558 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 559 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 560 // CHECK3: omp_offload.failed14: 561 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]] 562 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] 563 // CHECK3: omp_offload.cont15: 564 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 565 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0 566 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 567 // CHECK3-NEXT: ret i32 [[TMP27]] 568 // 569 // 570 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 571 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 572 // CHECK3-NEXT: entry: 573 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 574 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 575 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 576 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 577 // CHECK3-NEXT: ret void 578 // 579 // 580 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 581 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 582 // CHECK3-NEXT: entry: 583 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 584 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 585 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 586 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 587 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 588 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 589 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 590 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 591 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 592 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 593 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 594 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 595 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 596 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 597 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 598 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 599 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 600 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 601 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 602 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 603 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 604 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 605 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 606 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 607 // CHECK3: cond.true: 608 // CHECK3-NEXT: br label [[COND_END:%.*]] 609 // CHECK3: cond.false: 610 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 611 // CHECK3-NEXT: br label [[COND_END]] 612 // CHECK3: cond.end: 613 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 614 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 615 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 616 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 617 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 618 // CHECK3: omp.inner.for.cond: 619 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 620 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 621 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 622 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 623 // CHECK3: omp.inner.for.body: 624 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 625 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 626 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 627 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 628 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 629 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 630 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 631 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 632 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 633 // CHECK3: omp.body.continue: 634 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 635 // CHECK3: omp.inner.for.inc: 636 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 637 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 638 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 639 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 640 // CHECK3: omp.inner.for.end: 641 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 642 // CHECK3: omp.loop.exit: 643 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 644 // CHECK3-NEXT: ret void 645 // 646 // 647 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 648 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 649 // CHECK3-NEXT: entry: 650 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 651 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 652 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 653 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 654 // CHECK3-NEXT: ret void 655 // 656 // 657 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 658 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 659 // CHECK3-NEXT: entry: 660 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 661 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 662 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 663 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 664 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 665 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 666 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 667 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 668 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 669 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 670 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 671 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 672 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 673 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 674 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 675 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 676 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 677 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 678 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 679 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 680 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 681 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 682 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 683 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 684 // CHECK3: cond.true: 685 // CHECK3-NEXT: br label [[COND_END:%.*]] 686 // CHECK3: cond.false: 687 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 688 // CHECK3-NEXT: br label [[COND_END]] 689 // CHECK3: cond.end: 690 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 691 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 692 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 693 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 694 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 695 // CHECK3: omp.inner.for.cond: 696 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 697 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 698 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 699 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 700 // CHECK3: omp.inner.for.body: 701 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 702 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 703 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 704 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 705 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 706 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 707 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 708 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 709 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 710 // CHECK3: omp.body.continue: 711 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 712 // CHECK3: omp.inner.for.inc: 713 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 714 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 715 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 716 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 717 // CHECK3: omp.inner.for.end: 718 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 719 // CHECK3: omp.loop.exit: 720 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 721 // CHECK3-NEXT: ret void 722 // 723 // 724 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 725 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 726 // CHECK3-NEXT: entry: 727 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 728 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 729 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 730 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 731 // CHECK3-NEXT: ret void 732 // 733 // 734 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 735 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 736 // CHECK3-NEXT: entry: 737 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 738 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 739 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 740 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 741 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 742 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 743 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 744 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 745 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 746 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 747 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 748 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 749 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 750 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 751 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 752 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 753 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 754 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 755 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 756 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 757 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 758 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 759 // CHECK3: omp.dispatch.cond: 760 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 761 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 762 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 763 // CHECK3: cond.true: 764 // CHECK3-NEXT: br label [[COND_END:%.*]] 765 // CHECK3: cond.false: 766 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 767 // CHECK3-NEXT: br label [[COND_END]] 768 // CHECK3: cond.end: 769 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 770 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 771 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 772 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 773 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 774 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 775 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 776 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 777 // CHECK3: omp.dispatch.body: 778 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 779 // CHECK3: omp.inner.for.cond: 780 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 781 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 782 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 783 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 784 // CHECK3: omp.inner.for.body: 785 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 786 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 787 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 788 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 789 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 790 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 791 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 792 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 793 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 794 // CHECK3: omp.body.continue: 795 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 796 // CHECK3: omp.inner.for.inc: 797 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 798 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 799 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 800 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 801 // CHECK3: omp.inner.for.end: 802 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 803 // CHECK3: omp.dispatch.inc: 804 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 805 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 806 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 807 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 808 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 809 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 810 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 811 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 812 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 813 // CHECK3: omp.dispatch.end: 814 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 815 // CHECK3-NEXT: ret void 816 // 817 // 818 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 819 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 820 // CHECK3-NEXT: entry: 821 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 822 // CHECK3-NEXT: ret void 823 // 824 // 825 // CHECK9-LABEL: define {{[^@]+}}@main 826 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 827 // CHECK9-NEXT: entry: 828 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 829 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 830 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 831 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 832 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 833 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 834 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 835 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 836 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 837 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 838 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 839 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 840 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 841 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 842 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 843 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 844 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 845 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 846 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 847 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 848 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 849 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 850 // CHECK9-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 851 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [3 x i8*], align 8 852 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [3 x i8*], align 8 853 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [3 x i8*], align 8 854 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [3 x i64], align 8 855 // CHECK9-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 856 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 857 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 858 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 859 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 860 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 861 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 862 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 863 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 864 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 865 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 866 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 867 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 868 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 869 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 870 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 871 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 872 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 873 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 874 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 875 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 876 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 877 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 878 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 879 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 880 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 881 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 882 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 883 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 884 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 885 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 886 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 887 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 888 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 889 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 890 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 891 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 892 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 893 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 894 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 895 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 896 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 897 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 898 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 899 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 900 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 901 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 902 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 903 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 904 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 905 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 906 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 907 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 908 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 909 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 910 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 911 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 912 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 913 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 914 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 915 // CHECK9-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 916 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 917 // CHECK9-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 918 // CHECK9: omp_offload.failed: 919 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 920 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 921 // CHECK9: omp_offload.cont: 922 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 923 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 924 // CHECK9-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 925 // CHECK9-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 926 // CHECK9-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 927 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 928 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 929 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 930 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 931 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 932 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 933 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 934 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 935 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 936 // CHECK9-NEXT: store i8* null, i8** [[TMP40]], align 8 937 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 938 // CHECK9-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 939 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 940 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 941 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 942 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 943 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 944 // CHECK9-NEXT: store i8* null, i8** [[TMP45]], align 8 945 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 946 // CHECK9-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 947 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 948 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 949 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 950 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 951 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 952 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 953 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 954 // CHECK9-NEXT: store i8* null, i8** [[TMP51]], align 8 955 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 956 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 957 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 958 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 959 // CHECK9-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 960 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 961 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 962 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 963 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 964 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 965 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 966 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 967 // CHECK9-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 968 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP58]]) 969 // CHECK9-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 970 // CHECK9-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 971 // CHECK9-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 972 // CHECK9: omp_offload.failed16: 973 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 974 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]] 975 // CHECK9: omp_offload.cont17: 976 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[N]], align 4 977 // CHECK9-NEXT: [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32* 978 // CHECK9-NEXT: store i32 [[TMP61]], i32* [[CONV19]], align 4 979 // CHECK9-NEXT: [[TMP62:%.*]] = load i64, i64* [[N_CASTED18]], align 8 980 // CHECK9-NEXT: [[TMP63:%.*]] = mul nuw i64 [[TMP1]], 4 981 // CHECK9-NEXT: [[TMP64:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES23]] to i8* 982 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP64]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.5 to i8*), i64 24, i1 false) 983 // CHECK9-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 984 // CHECK9-NEXT: [[TMP66:%.*]] = bitcast i8** [[TMP65]] to i64* 985 // CHECK9-NEXT: store i64 [[TMP62]], i64* [[TMP66]], align 8 986 // CHECK9-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 987 // CHECK9-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i64* 988 // CHECK9-NEXT: store i64 [[TMP62]], i64* [[TMP68]], align 8 989 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 990 // CHECK9-NEXT: store i8* null, i8** [[TMP69]], align 8 991 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 992 // CHECK9-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 993 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP71]], align 8 994 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 995 // CHECK9-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 996 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP73]], align 8 997 // CHECK9-NEXT: [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 998 // CHECK9-NEXT: store i8* null, i8** [[TMP74]], align 8 999 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 1000 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32** 1001 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP76]], align 8 1002 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 1003 // CHECK9-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32** 1004 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP78]], align 8 1005 // CHECK9-NEXT: [[TMP79:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 1006 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP79]], align 8 1007 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 1008 // CHECK9-NEXT: store i8* null, i8** [[TMP80]], align 8 1009 // CHECK9-NEXT: [[TMP81:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 1010 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 1011 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 1012 // CHECK9-NEXT: [[TMP84:%.*]] = load i32, i32* [[N]], align 4 1013 // CHECK9-NEXT: store i32 [[TMP84]], i32* [[DOTCAPTURE_EXPR_25]], align 4 1014 // CHECK9-NEXT: [[TMP85:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 1015 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP85]], 0 1016 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 1017 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 1018 // CHECK9-NEXT: store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4 1019 // CHECK9-NEXT: [[TMP86:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 1020 // CHECK9-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP86]], 1 1021 // CHECK9-NEXT: [[TMP87:%.*]] = zext i32 [[ADD30]] to i64 1022 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP87]]) 1023 // CHECK9-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP81]], i8** [[TMP82]], i64* [[TMP83]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1024 // CHECK9-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0 1025 // CHECK9-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]] 1026 // CHECK9: omp_offload.failed31: 1027 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP62]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 1028 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT32]] 1029 // CHECK9: omp_offload.cont32: 1030 // CHECK9-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1031 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP90]]) 1032 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1033 // CHECK9-NEXT: [[TMP91:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1034 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP91]]) 1035 // CHECK9-NEXT: [[TMP92:%.*]] = load i32, i32* [[RETVAL]], align 4 1036 // CHECK9-NEXT: ret i32 [[TMP92]] 1037 // 1038 // 1039 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100 1040 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1041 // CHECK9-NEXT: entry: 1042 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1043 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1044 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1045 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1046 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1047 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1048 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1049 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1050 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1051 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1052 // CHECK9-NEXT: ret void 1053 // 1054 // 1055 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1056 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1057 // CHECK9-NEXT: entry: 1058 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1059 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1060 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1061 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1062 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1063 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1064 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1065 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1066 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1067 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1068 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1069 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1070 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1071 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1072 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1073 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1074 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1075 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1076 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1077 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1078 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1079 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1080 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1081 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1082 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1083 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1084 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1085 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1086 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1087 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1088 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1089 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1090 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1091 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1092 // CHECK9: omp.precond.then: 1093 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1094 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1095 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1096 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1097 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1098 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1099 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1100 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1101 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1102 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1103 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1104 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1105 // CHECK9: cond.true: 1106 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1107 // CHECK9-NEXT: br label [[COND_END:%.*]] 1108 // CHECK9: cond.false: 1109 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1110 // CHECK9-NEXT: br label [[COND_END]] 1111 // CHECK9: cond.end: 1112 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1113 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1114 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1115 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1116 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1117 // CHECK9: omp.inner.for.cond: 1118 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1119 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1120 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1121 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1122 // CHECK9: omp.inner.for.body: 1123 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1124 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1125 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1126 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1127 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 1128 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1129 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1130 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1131 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1132 // CHECK9: omp.body.continue: 1133 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1134 // CHECK9: omp.inner.for.inc: 1135 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1136 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 1137 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1138 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1139 // CHECK9: omp.inner.for.end: 1140 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1141 // CHECK9: omp.loop.exit: 1142 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1143 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1144 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1145 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1146 // CHECK9: omp.precond.end: 1147 // CHECK9-NEXT: ret void 1148 // 1149 // 1150 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 1151 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1152 // CHECK9-NEXT: entry: 1153 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1154 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1155 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1156 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1157 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1158 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1159 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1160 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1161 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1162 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1163 // CHECK9-NEXT: ret void 1164 // 1165 // 1166 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1167 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1168 // CHECK9-NEXT: entry: 1169 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1170 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1171 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1172 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1173 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1174 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1175 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1176 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1177 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1178 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1179 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1180 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1181 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1182 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1183 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1184 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1185 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1186 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1187 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1188 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1189 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1190 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1191 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1192 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1193 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1194 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1195 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1196 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1197 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1198 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1199 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1200 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1201 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1202 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1203 // CHECK9: omp.precond.then: 1204 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1205 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1206 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1207 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1208 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1209 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1210 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1211 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1212 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1213 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1214 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1215 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1216 // CHECK9: cond.true: 1217 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1218 // CHECK9-NEXT: br label [[COND_END:%.*]] 1219 // CHECK9: cond.false: 1220 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1221 // CHECK9-NEXT: br label [[COND_END]] 1222 // CHECK9: cond.end: 1223 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1224 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1225 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1226 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1227 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1228 // CHECK9: omp.inner.for.cond: 1229 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1230 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1231 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1232 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1233 // CHECK9: omp.inner.for.body: 1234 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1235 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1236 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1237 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1238 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 1239 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1240 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1241 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1242 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1243 // CHECK9: omp.body.continue: 1244 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1245 // CHECK9: omp.inner.for.inc: 1246 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1247 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 1248 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1249 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1250 // CHECK9: omp.inner.for.end: 1251 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1252 // CHECK9: omp.loop.exit: 1253 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1254 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1255 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1256 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1257 // CHECK9: omp.precond.end: 1258 // CHECK9-NEXT: ret void 1259 // 1260 // 1261 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110 1262 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1263 // CHECK9-NEXT: entry: 1264 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1265 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1266 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1267 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1268 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1269 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1270 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1271 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1272 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1273 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1274 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1275 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1276 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1277 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1278 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1279 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 1280 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1281 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 1282 // CHECK9-NEXT: ret void 1283 // 1284 // 1285 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 1286 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1287 // CHECK9-NEXT: entry: 1288 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1289 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1290 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1291 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1292 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1293 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1294 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1295 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1296 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1297 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1298 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1299 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1300 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1301 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1302 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1303 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 1304 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1305 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1306 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1307 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1308 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1309 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1310 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1311 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1312 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1313 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1314 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1315 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1316 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1317 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1318 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1319 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1320 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1321 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1322 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1323 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1324 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1325 // CHECK9: omp.precond.then: 1326 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1327 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1328 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1329 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1330 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1331 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 1332 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1333 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1334 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 1335 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1336 // CHECK9: omp.dispatch.cond: 1337 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1338 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1339 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1340 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1341 // CHECK9: cond.true: 1342 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1343 // CHECK9-NEXT: br label [[COND_END:%.*]] 1344 // CHECK9: cond.false: 1345 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1346 // CHECK9-NEXT: br label [[COND_END]] 1347 // CHECK9: cond.end: 1348 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1349 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1350 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1351 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1352 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1353 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1354 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1355 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1356 // CHECK9: omp.dispatch.body: 1357 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1358 // CHECK9: omp.inner.for.cond: 1359 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1360 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 1361 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1362 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1363 // CHECK9: omp.inner.for.body: 1364 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1365 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1366 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1367 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !11 1368 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !11 1369 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 1370 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1371 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 1372 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1373 // CHECK9: omp.body.continue: 1374 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1375 // CHECK9: omp.inner.for.inc: 1376 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1377 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 1378 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1379 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1380 // CHECK9: omp.inner.for.end: 1381 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1382 // CHECK9: omp.dispatch.inc: 1383 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1384 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1385 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 1386 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 1387 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1388 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1389 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 1390 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 1391 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 1392 // CHECK9: omp.dispatch.end: 1393 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1394 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 1395 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 1396 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1397 // CHECK9: omp.precond.end: 1398 // CHECK9-NEXT: ret void 1399 // 1400 // 1401 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 1402 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1403 // CHECK9-NEXT: entry: 1404 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1405 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 1406 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1407 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1408 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1409 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1410 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 1411 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 1412 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 1413 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1414 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8 1415 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8 1416 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8 1417 // CHECK9-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 1418 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1419 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1420 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 1421 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 1422 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1423 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 1424 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 1425 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1426 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 1427 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1428 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1429 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1430 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1431 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1432 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1433 // CHECK9: omp_offload.failed: 1434 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]] 1435 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1436 // CHECK9: omp_offload.cont: 1437 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1438 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 1439 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 1440 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1441 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 1442 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 1443 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 1444 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 1445 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1446 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1447 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1448 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1449 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1450 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 1451 // CHECK9: omp_offload.failed5: 1452 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 1453 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 1454 // CHECK9: omp_offload.cont6: 1455 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 1456 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 1457 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 1458 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 1459 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 1460 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 1461 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 1462 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1463 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 1464 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 1465 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1466 // CHECK9-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1467 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1468 // CHECK9-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 1469 // CHECK9: omp_offload.failed11: 1470 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]] 1471 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT12]] 1472 // CHECK9: omp_offload.cont12: 1473 // CHECK9-NEXT: ret i32 0 1474 // 1475 // 1476 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79 1477 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1478 // CHECK9-NEXT: entry: 1479 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1480 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1481 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1482 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1483 // CHECK9-NEXT: ret void 1484 // 1485 // 1486 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 1487 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1488 // CHECK9-NEXT: entry: 1489 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1490 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1491 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1492 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1493 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1494 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1495 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1496 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1497 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1498 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1499 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1500 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1501 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1502 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1503 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1504 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1505 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1506 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1507 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1508 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1509 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1510 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1511 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1512 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1513 // CHECK9: cond.true: 1514 // CHECK9-NEXT: br label [[COND_END:%.*]] 1515 // CHECK9: cond.false: 1516 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1517 // CHECK9-NEXT: br label [[COND_END]] 1518 // CHECK9: cond.end: 1519 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1520 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1521 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1522 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1523 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1524 // CHECK9: omp.inner.for.cond: 1525 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1526 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1527 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1528 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1529 // CHECK9: omp.inner.for.body: 1530 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1531 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1532 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1533 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1534 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1535 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1536 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1537 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1538 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1539 // CHECK9: omp.body.continue: 1540 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1541 // CHECK9: omp.inner.for.inc: 1542 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1543 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1544 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1545 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1546 // CHECK9: omp.inner.for.end: 1547 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1548 // CHECK9: omp.loop.exit: 1549 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1550 // CHECK9-NEXT: ret void 1551 // 1552 // 1553 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 1554 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1555 // CHECK9-NEXT: entry: 1556 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1557 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1558 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1559 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1560 // CHECK9-NEXT: ret void 1561 // 1562 // 1563 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 1564 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1565 // CHECK9-NEXT: entry: 1566 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1567 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1568 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1569 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1570 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1571 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1572 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1573 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1574 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1575 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1576 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1577 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1578 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1579 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1580 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1581 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1582 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1583 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1584 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1585 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1586 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1587 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1588 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1589 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1590 // CHECK9: cond.true: 1591 // CHECK9-NEXT: br label [[COND_END:%.*]] 1592 // CHECK9: cond.false: 1593 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1594 // CHECK9-NEXT: br label [[COND_END]] 1595 // CHECK9: cond.end: 1596 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1597 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1598 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1599 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1600 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1601 // CHECK9: omp.inner.for.cond: 1602 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1603 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1604 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1605 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1606 // CHECK9: omp.inner.for.body: 1607 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1608 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1609 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1610 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1611 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1612 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1613 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1614 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1615 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1616 // CHECK9: omp.body.continue: 1617 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1618 // CHECK9: omp.inner.for.inc: 1619 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1620 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1621 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1622 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1623 // CHECK9: omp.inner.for.end: 1624 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1625 // CHECK9: omp.loop.exit: 1626 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1627 // CHECK9-NEXT: ret void 1628 // 1629 // 1630 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89 1631 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1632 // CHECK9-NEXT: entry: 1633 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1634 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1635 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1636 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1637 // CHECK9-NEXT: ret void 1638 // 1639 // 1640 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13 1641 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1642 // CHECK9-NEXT: entry: 1643 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1644 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1645 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1646 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1647 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1648 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1649 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1650 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1651 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1652 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1653 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1654 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1655 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1656 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1657 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1658 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1659 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1660 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1661 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1662 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1663 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 1664 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1665 // CHECK9: omp.dispatch.cond: 1666 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1667 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1668 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1669 // CHECK9: cond.true: 1670 // CHECK9-NEXT: br label [[COND_END:%.*]] 1671 // CHECK9: cond.false: 1672 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1673 // CHECK9-NEXT: br label [[COND_END]] 1674 // CHECK9: cond.end: 1675 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1676 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1677 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1678 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1679 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1680 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1681 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1682 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1683 // CHECK9: omp.dispatch.body: 1684 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1685 // CHECK9: omp.inner.for.cond: 1686 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1687 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 1688 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1689 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1690 // CHECK9: omp.inner.for.body: 1691 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1692 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1693 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1694 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 1695 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 1696 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1697 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1698 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 1699 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1700 // CHECK9: omp.body.continue: 1701 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1702 // CHECK9: omp.inner.for.inc: 1703 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1704 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1705 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1706 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 1707 // CHECK9: omp.inner.for.end: 1708 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1709 // CHECK9: omp.dispatch.inc: 1710 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1711 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1712 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1713 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 1714 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1715 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1716 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 1717 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 1718 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 1719 // CHECK9: omp.dispatch.end: 1720 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1721 // CHECK9-NEXT: ret void 1722 // 1723 // 1724 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1725 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1726 // CHECK9-NEXT: entry: 1727 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1728 // CHECK9-NEXT: ret void 1729 // 1730 // 1731 // CHECK11-LABEL: define {{[^@]+}}@main 1732 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1733 // CHECK11-NEXT: entry: 1734 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1735 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1736 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 1737 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 1738 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 1739 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 1740 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1741 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 1742 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 1743 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 1744 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 1745 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1746 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1747 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1748 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 1749 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 1750 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 1751 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 1752 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 1753 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 1754 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 1755 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1756 // CHECK11-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 1757 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [3 x i8*], align 4 1758 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [3 x i8*], align 4 1759 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [3 x i8*], align 4 1760 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [3 x i64], align 4 1761 // CHECK11-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 1762 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 1763 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 1764 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1765 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1766 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 1767 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 1768 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1769 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 1770 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 1771 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 1772 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 1773 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 1774 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 1775 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 1776 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 1777 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 1778 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1779 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 1780 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1781 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 1782 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 1783 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1784 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 1785 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 1786 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1787 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 1788 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1789 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 1790 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 1791 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1792 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 1793 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 1794 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1795 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 1796 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1797 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 1798 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 1799 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1800 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 1801 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 1802 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1803 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 1804 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1805 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 1806 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1807 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1808 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1809 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 1810 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 1811 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1812 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 1813 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1814 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1815 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1816 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1817 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 1818 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 1819 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 1820 // CHECK11-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1821 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 1822 // CHECK11-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1823 // CHECK11: omp_offload.failed: 1824 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1825 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1826 // CHECK11: omp_offload.cont: 1827 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 1828 // CHECK11-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 1829 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 1830 // CHECK11-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 1831 // CHECK11-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 1832 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 1833 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 1834 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 1835 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 1836 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 1837 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 1838 // CHECK11-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 1839 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 1840 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 1841 // CHECK11-NEXT: store i8* null, i8** [[TMP41]], align 4 1842 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 1843 // CHECK11-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 1844 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 1845 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 1846 // CHECK11-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 1847 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 1848 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 1849 // CHECK11-NEXT: store i8* null, i8** [[TMP46]], align 4 1850 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 1851 // CHECK11-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 1852 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 1853 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 1854 // CHECK11-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 1855 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 1856 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 1857 // CHECK11-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 1858 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 1859 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 1860 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 1861 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 1862 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 1863 // CHECK11-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 1864 // CHECK11-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 1865 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 1866 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 1867 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1868 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1869 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1870 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1871 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 1872 // CHECK11-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 1873 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP59]]) 1874 // CHECK11-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1875 // CHECK11-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 1876 // CHECK11-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 1877 // CHECK11: omp_offload.failed15: 1878 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 1879 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]] 1880 // CHECK11: omp_offload.cont16: 1881 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 1882 // CHECK11-NEXT: store i32 [[TMP62]], i32* [[N_CASTED17]], align 4 1883 // CHECK11-NEXT: [[TMP63:%.*]] = load i32, i32* [[N_CASTED17]], align 4 1884 // CHECK11-NEXT: [[TMP64:%.*]] = mul nuw i32 [[TMP0]], 4 1885 // CHECK11-NEXT: [[TMP65:%.*]] = sext i32 [[TMP64]] to i64 1886 // CHECK11-NEXT: [[TMP66:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES21]] to i8* 1887 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP66]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.5 to i8*), i32 24, i1 false) 1888 // CHECK11-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 1889 // CHECK11-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i32* 1890 // CHECK11-NEXT: store i32 [[TMP63]], i32* [[TMP68]], align 4 1891 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 1892 // CHECK11-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i32* 1893 // CHECK11-NEXT: store i32 [[TMP63]], i32* [[TMP70]], align 4 1894 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 1895 // CHECK11-NEXT: store i8* null, i8** [[TMP71]], align 4 1896 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 1897 // CHECK11-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 1898 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP73]], align 4 1899 // CHECK11-NEXT: [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 1900 // CHECK11-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32* 1901 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP75]], align 4 1902 // CHECK11-NEXT: [[TMP76:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 1903 // CHECK11-NEXT: store i8* null, i8** [[TMP76]], align 4 1904 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 1905 // CHECK11-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32** 1906 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP78]], align 4 1907 // CHECK11-NEXT: [[TMP79:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 1908 // CHECK11-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32** 1909 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP80]], align 4 1910 // CHECK11-NEXT: [[TMP81:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2 1911 // CHECK11-NEXT: store i64 [[TMP65]], i64* [[TMP81]], align 4 1912 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 1913 // CHECK11-NEXT: store i8* null, i8** [[TMP82]], align 4 1914 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 1915 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 1916 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 1917 // CHECK11-NEXT: [[TMP86:%.*]] = load i32, i32* [[N]], align 4 1918 // CHECK11-NEXT: store i32 [[TMP86]], i32* [[DOTCAPTURE_EXPR_23]], align 4 1919 // CHECK11-NEXT: [[TMP87:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 1920 // CHECK11-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP87]], 0 1921 // CHECK11-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 1922 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 1923 // CHECK11-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 1924 // CHECK11-NEXT: [[TMP88:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 1925 // CHECK11-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP88]], 1 1926 // CHECK11-NEXT: [[TMP89:%.*]] = zext i32 [[ADD28]] to i64 1927 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP89]]) 1928 // CHECK11-NEXT: [[TMP90:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP83]], i8** [[TMP84]], i64* [[TMP85]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1929 // CHECK11-NEXT: [[TMP91:%.*]] = icmp ne i32 [[TMP90]], 0 1930 // CHECK11-NEXT: br i1 [[TMP91]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 1931 // CHECK11: omp_offload.failed29: 1932 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP63]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 1933 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT30]] 1934 // CHECK11: omp_offload.cont30: 1935 // CHECK11-NEXT: [[TMP92:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1936 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP92]]) 1937 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1938 // CHECK11-NEXT: [[TMP93:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 1939 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP93]]) 1940 // CHECK11-NEXT: [[TMP94:%.*]] = load i32, i32* [[RETVAL]], align 4 1941 // CHECK11-NEXT: ret i32 [[TMP94]] 1942 // 1943 // 1944 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100 1945 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1946 // CHECK11-NEXT: entry: 1947 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1948 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1949 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1950 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1951 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 1952 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1953 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 1954 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1955 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 1956 // CHECK11-NEXT: ret void 1957 // 1958 // 1959 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 1960 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1961 // CHECK11-NEXT: entry: 1962 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1963 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1964 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1965 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1966 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1967 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1968 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1969 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1970 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1971 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1972 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1973 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1974 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1975 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1976 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 1977 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1978 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1979 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1980 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 1981 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1982 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1983 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 1984 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1985 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1986 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1987 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1988 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1989 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1990 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1991 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1992 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 1993 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1994 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1995 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1996 // CHECK11: omp.precond.then: 1997 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1998 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1999 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2000 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2001 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2002 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2003 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2004 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2005 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2006 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2007 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2008 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2009 // CHECK11: cond.true: 2010 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2011 // CHECK11-NEXT: br label [[COND_END:%.*]] 2012 // CHECK11: cond.false: 2013 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2014 // CHECK11-NEXT: br label [[COND_END]] 2015 // CHECK11: cond.end: 2016 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2017 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2018 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2019 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2020 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2021 // CHECK11: omp.inner.for.cond: 2022 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2023 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2024 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2025 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2026 // CHECK11: omp.inner.for.body: 2027 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2028 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2029 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2030 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2031 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2032 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 2033 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2034 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2035 // CHECK11: omp.body.continue: 2036 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2037 // CHECK11: omp.inner.for.inc: 2038 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2039 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2040 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2041 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2042 // CHECK11: omp.inner.for.end: 2043 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2044 // CHECK11: omp.loop.exit: 2045 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2046 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2047 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2048 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2049 // CHECK11: omp.precond.end: 2050 // CHECK11-NEXT: ret void 2051 // 2052 // 2053 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 2054 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2055 // CHECK11-NEXT: entry: 2056 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2057 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2058 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2059 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2060 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2061 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2062 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2063 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2064 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2065 // CHECK11-NEXT: ret void 2066 // 2067 // 2068 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2069 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2070 // CHECK11-NEXT: entry: 2071 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2072 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2073 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2074 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2075 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2076 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2077 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2078 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2079 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2080 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2081 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2082 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2083 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2084 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2085 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2086 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2087 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2088 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2089 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2090 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2091 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2092 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2093 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2094 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2095 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2096 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2097 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2098 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2099 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2100 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2101 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2102 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2103 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2104 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2105 // CHECK11: omp.precond.then: 2106 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2107 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2108 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2109 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2110 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2111 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2112 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2113 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2114 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2115 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2116 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2117 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2118 // CHECK11: cond.true: 2119 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2120 // CHECK11-NEXT: br label [[COND_END:%.*]] 2121 // CHECK11: cond.false: 2122 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2123 // CHECK11-NEXT: br label [[COND_END]] 2124 // CHECK11: cond.end: 2125 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2126 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2127 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2128 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2129 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2130 // CHECK11: omp.inner.for.cond: 2131 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2132 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2133 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2134 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2135 // CHECK11: omp.inner.for.body: 2136 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2137 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2138 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2139 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2140 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2141 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 2142 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2143 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2144 // CHECK11: omp.body.continue: 2145 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2146 // CHECK11: omp.inner.for.inc: 2147 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2148 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2149 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2150 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2151 // CHECK11: omp.inner.for.end: 2152 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2153 // CHECK11: omp.loop.exit: 2154 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2155 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2156 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2157 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2158 // CHECK11: omp.precond.end: 2159 // CHECK11-NEXT: ret void 2160 // 2161 // 2162 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110 2163 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2164 // CHECK11-NEXT: entry: 2165 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2166 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2167 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2168 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2169 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 2170 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2171 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2172 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2173 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2174 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2175 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2176 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2177 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2178 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2179 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2180 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 2181 // CHECK11-NEXT: ret void 2182 // 2183 // 2184 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 2185 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2186 // CHECK11-NEXT: entry: 2187 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2188 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2189 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2190 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2191 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2192 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2193 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2194 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2195 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2196 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2197 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2198 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2199 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2200 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2201 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2202 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2203 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2204 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2205 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2206 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2207 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2208 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2209 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2210 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2211 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2212 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2213 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2214 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2215 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2216 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2217 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2218 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2219 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2220 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2221 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2222 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2223 // CHECK11: omp.precond.then: 2224 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2225 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2226 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2227 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2228 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2229 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2230 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2231 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2232 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 2233 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2234 // CHECK11: omp.dispatch.cond: 2235 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2236 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2237 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2238 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2239 // CHECK11: cond.true: 2240 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2241 // CHECK11-NEXT: br label [[COND_END:%.*]] 2242 // CHECK11: cond.false: 2243 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2244 // CHECK11-NEXT: br label [[COND_END]] 2245 // CHECK11: cond.end: 2246 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2247 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2248 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2249 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2250 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2251 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2252 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2253 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2254 // CHECK11: omp.dispatch.body: 2255 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2256 // CHECK11: omp.inner.for.cond: 2257 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2258 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 2259 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2260 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2261 // CHECK11: omp.inner.for.body: 2262 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2263 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 2264 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2265 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12 2266 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 2267 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 2268 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 2269 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2270 // CHECK11: omp.body.continue: 2271 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2272 // CHECK11: omp.inner.for.inc: 2273 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2274 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 2275 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2276 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 2277 // CHECK11: omp.inner.for.end: 2278 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2279 // CHECK11: omp.dispatch.inc: 2280 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2281 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2282 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2283 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 2284 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2285 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2286 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 2287 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 2288 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 2289 // CHECK11: omp.dispatch.end: 2290 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2291 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 2292 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 2293 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2294 // CHECK11: omp.precond.end: 2295 // CHECK11-NEXT: ret void 2296 // 2297 // 2298 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 2299 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2300 // CHECK11-NEXT: entry: 2301 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2302 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 2303 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2304 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2305 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2306 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2307 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 2308 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 2309 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 2310 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2311 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4 2312 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4 2313 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4 2314 // CHECK11-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 2315 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2316 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2317 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 2318 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 2319 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2320 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 2321 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 2322 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2323 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 2324 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2325 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2326 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2327 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2328 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2329 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2330 // CHECK11: omp_offload.failed: 2331 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]] 2332 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2333 // CHECK11: omp_offload.cont: 2334 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2335 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 2336 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 2337 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2338 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 2339 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 2340 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 2341 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 2342 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2343 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2344 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2345 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2346 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2347 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 2348 // CHECK11: omp_offload.failed5: 2349 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 2350 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]] 2351 // CHECK11: omp_offload.cont6: 2352 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2353 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 2354 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 2355 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2356 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 2357 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 2358 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 2359 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 2360 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2361 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2362 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2363 // CHECK11-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2364 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2365 // CHECK11-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 2366 // CHECK11: omp_offload.failed11: 2367 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]] 2368 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT12]] 2369 // CHECK11: omp_offload.cont12: 2370 // CHECK11-NEXT: ret i32 0 2371 // 2372 // 2373 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79 2374 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2375 // CHECK11-NEXT: entry: 2376 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2377 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2378 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2379 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2380 // CHECK11-NEXT: ret void 2381 // 2382 // 2383 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 2384 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2385 // CHECK11-NEXT: entry: 2386 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2387 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2388 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2389 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2390 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2391 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2392 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2393 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2394 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2395 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2396 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2397 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2398 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2399 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2400 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2401 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2402 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2403 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2404 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2405 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2406 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2407 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2408 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2409 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2410 // CHECK11: cond.true: 2411 // CHECK11-NEXT: br label [[COND_END:%.*]] 2412 // CHECK11: cond.false: 2413 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2414 // CHECK11-NEXT: br label [[COND_END]] 2415 // CHECK11: cond.end: 2416 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2417 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2418 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2419 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2420 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2421 // CHECK11: omp.inner.for.cond: 2422 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2423 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2424 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2425 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2426 // CHECK11: omp.inner.for.body: 2427 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2428 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2429 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2430 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2431 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2432 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 2433 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2434 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2435 // CHECK11: omp.body.continue: 2436 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2437 // CHECK11: omp.inner.for.inc: 2438 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2439 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2440 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2441 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2442 // CHECK11: omp.inner.for.end: 2443 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2444 // CHECK11: omp.loop.exit: 2445 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2446 // CHECK11-NEXT: ret void 2447 // 2448 // 2449 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 2450 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2451 // CHECK11-NEXT: entry: 2452 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2453 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2454 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2455 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2456 // CHECK11-NEXT: ret void 2457 // 2458 // 2459 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 2460 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2461 // CHECK11-NEXT: entry: 2462 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2463 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2464 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2465 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2466 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2467 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2468 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2469 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2470 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2471 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2472 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2473 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2474 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2475 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2476 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2477 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2478 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2479 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2480 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2481 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2482 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2483 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2484 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2485 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2486 // CHECK11: cond.true: 2487 // CHECK11-NEXT: br label [[COND_END:%.*]] 2488 // CHECK11: cond.false: 2489 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2490 // CHECK11-NEXT: br label [[COND_END]] 2491 // CHECK11: cond.end: 2492 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2493 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2494 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2495 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2496 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2497 // CHECK11: omp.inner.for.cond: 2498 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2499 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2500 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2501 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2502 // CHECK11: omp.inner.for.body: 2503 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2504 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2505 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2506 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2507 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2508 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 2509 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2510 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2511 // CHECK11: omp.body.continue: 2512 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2513 // CHECK11: omp.inner.for.inc: 2514 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2515 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2516 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2517 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2518 // CHECK11: omp.inner.for.end: 2519 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2520 // CHECK11: omp.loop.exit: 2521 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2522 // CHECK11-NEXT: ret void 2523 // 2524 // 2525 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89 2526 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2527 // CHECK11-NEXT: entry: 2528 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2529 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2530 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2531 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2532 // CHECK11-NEXT: ret void 2533 // 2534 // 2535 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13 2536 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2537 // CHECK11-NEXT: entry: 2538 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2539 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2540 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2541 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2542 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2543 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2544 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2545 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2546 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2547 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2548 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2549 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2550 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2551 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2552 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2553 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2554 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2555 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2556 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2557 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2558 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 2559 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2560 // CHECK11: omp.dispatch.cond: 2561 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2562 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2563 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2564 // CHECK11: cond.true: 2565 // CHECK11-NEXT: br label [[COND_END:%.*]] 2566 // CHECK11: cond.false: 2567 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2568 // CHECK11-NEXT: br label [[COND_END]] 2569 // CHECK11: cond.end: 2570 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2571 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2572 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2573 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2574 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2575 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2576 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2577 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2578 // CHECK11: omp.dispatch.body: 2579 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2580 // CHECK11: omp.inner.for.cond: 2581 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2582 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 2583 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2584 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2585 // CHECK11: omp.inner.for.body: 2586 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2587 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2588 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2589 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 2590 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 2591 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 2592 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 2593 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2594 // CHECK11: omp.body.continue: 2595 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2596 // CHECK11: omp.inner.for.inc: 2597 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2598 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2599 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2600 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 2601 // CHECK11: omp.inner.for.end: 2602 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2603 // CHECK11: omp.dispatch.inc: 2604 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2605 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2606 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2607 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 2608 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2609 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2610 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 2611 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 2612 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 2613 // CHECK11: omp.dispatch.end: 2614 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2615 // CHECK11-NEXT: ret void 2616 // 2617 // 2618 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2619 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2620 // CHECK11-NEXT: entry: 2621 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2622 // CHECK11-NEXT: ret void 2623 // 2624