1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5 
6 // Test host codegen.
7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
13 
14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
20 #ifdef CK1
21 
22 template <typename T, int X, long long Y>
23 struct SS{
24   T a[X];
25   float b;
26   int foo(void) {
27 
28     #pragma omp target
29     #pragma omp teams distribute
30     for(int i = 0; i < X; i++) {
31       a[i] = (T)0;
32     }
33     #pragma omp target
34     #pragma omp teams distribute dist_schedule(static)
35     for(int i = 0; i < X; i++) {
36       a[i] = (T)0;
37     }
38     #pragma omp target
39     #pragma omp teams distribute dist_schedule(static, X/2)
40     for(int i = 0; i < X; i++) {
41       a[i] = (T)0;
42     }
43 
44 
45 
46 
47 
48 
49     return a[0];
50   }
51 };
52 
53 int teams_template_struct(void) {
54   SS<int, 123, 456> V;
55   return V.foo();
56 
57 }
58 #endif // CK1
59 
60 // Test host codegen.
61 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
62 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
63 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
64 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
65 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
66 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
67 
68 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
69 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
70 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
71 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
72 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
73 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
74 #ifdef CK2
75 
76 template <typename T, int n>
77 int tmain(T argc) {
78   T a[n];
79 #pragma omp target
80 #pragma omp teams distribute
81   for(int i = 0; i < n; i++) {
82     a[i] = (T)0;
83   }
84 #pragma omp target
85 #pragma omp teams distribute dist_schedule(static)
86   for(int i = 0; i < n; i++) {
87     a[i] = (T)0;
88   }
89 #pragma omp target
90 #pragma omp teams distribute dist_schedule(static, n)
91   for(int i = 0; i < n; i++) {
92     a[i] = (T)0;
93   }
94   return 0;
95 }
96 
97 int main (int argc, char **argv) {
98   int n = 100;
99   int a[n];
100 #pragma omp target
101 #pragma omp teams distribute
102   for(int i = 0; i < n; i++) {
103     a[i] = 0;
104   }
105 #pragma omp target
106 #pragma omp teams distribute dist_schedule(static)
107   for(int i = 0; i < n; i++) {
108     a[i] = 0;
109   }
110 #pragma omp target
111 #pragma omp teams distribute dist_schedule(static, n)
112   for(int i = 0; i < n; i++) {
113     a[i] = 0;
114   }
115   return tmain<int, 10>(argc);
116 }
117 
118 
119 
120 
121 
122 
123 
124 
125 
126 
127 
128 
129 
130 
131 
132 #endif // CK2
133 #endif // #ifndef HEADER
134 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
135 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
136 // CHECK1-NEXT:  entry:
137 // CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
138 // CHECK1-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
139 // CHECK1-NEXT:    ret i32 [[CALL]]
140 //
141 //
142 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
143 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
144 // CHECK1-NEXT:  entry:
145 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
146 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
147 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
148 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
149 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
150 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
151 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
152 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
153 // CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
154 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
155 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
156 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
157 // CHECK1-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
158 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
159 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
160 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
161 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
162 // CHECK1-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
163 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
164 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
165 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
166 // CHECK1-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
167 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
168 // CHECK1-NEXT:    store i8* null, i8** [[TMP4]], align 8
169 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
170 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
171 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
172 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
173 // CHECK1-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
174 // CHECK1-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
175 // CHECK1:       omp_offload.failed:
176 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
177 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
178 // CHECK1:       omp_offload.cont:
179 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
180 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
181 // CHECK1-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
182 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
183 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
184 // CHECK1-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
185 // CHECK1-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
186 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
187 // CHECK1-NEXT:    store i8* null, i8** [[TMP13]], align 8
188 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
189 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
190 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
191 // CHECK1-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
192 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
193 // CHECK1-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
194 // CHECK1:       omp_offload.failed7:
195 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]]
196 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
197 // CHECK1:       omp_offload.cont8:
198 // CHECK1-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
199 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
200 // CHECK1-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
201 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
202 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
203 // CHECK1-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
204 // CHECK1-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
205 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
206 // CHECK1-NEXT:    store i8* null, i8** [[TMP22]], align 8
207 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
208 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
209 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
210 // CHECK1-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
211 // CHECK1-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
212 // CHECK1-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
213 // CHECK1:       omp_offload.failed14:
214 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]]
215 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
216 // CHECK1:       omp_offload.cont15:
217 // CHECK1-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
218 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0
219 // CHECK1-NEXT:    [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
220 // CHECK1-NEXT:    ret i32 [[TMP27]]
221 //
222 //
223 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
224 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
225 // CHECK1-NEXT:  entry:
226 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
227 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
228 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
229 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
230 // CHECK1-NEXT:    ret void
231 //
232 //
233 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
234 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
235 // CHECK1-NEXT:  entry:
236 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
237 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
238 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
239 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
240 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
241 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
242 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
243 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
244 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
245 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
246 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
247 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
248 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
249 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
250 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
251 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
252 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
253 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
254 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
255 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
256 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
257 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
258 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
259 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
260 // CHECK1:       cond.true:
261 // CHECK1-NEXT:    br label [[COND_END:%.*]]
262 // CHECK1:       cond.false:
263 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
264 // CHECK1-NEXT:    br label [[COND_END]]
265 // CHECK1:       cond.end:
266 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
267 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
268 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
269 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
270 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
271 // CHECK1:       omp.inner.for.cond:
272 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
273 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
274 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
275 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
276 // CHECK1:       omp.inner.for.body:
277 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
278 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
279 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
280 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
281 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
282 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
283 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
284 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
285 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
286 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
287 // CHECK1:       omp.body.continue:
288 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
289 // CHECK1:       omp.inner.for.inc:
290 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
291 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
292 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
293 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
294 // CHECK1:       omp.inner.for.end:
295 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
296 // CHECK1:       omp.loop.exit:
297 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
298 // CHECK1-NEXT:    ret void
299 //
300 //
301 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33
302 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
303 // CHECK1-NEXT:  entry:
304 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
305 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
306 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
307 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
308 // CHECK1-NEXT:    ret void
309 //
310 //
311 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
312 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
313 // CHECK1-NEXT:  entry:
314 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
315 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
316 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
317 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
318 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
319 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
320 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
321 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
322 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
323 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
324 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
325 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
326 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
327 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
328 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
329 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
330 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
331 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
332 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
333 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
334 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
335 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
336 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
337 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
338 // CHECK1:       cond.true:
339 // CHECK1-NEXT:    br label [[COND_END:%.*]]
340 // CHECK1:       cond.false:
341 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
342 // CHECK1-NEXT:    br label [[COND_END]]
343 // CHECK1:       cond.end:
344 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
345 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
346 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
347 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
348 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
349 // CHECK1:       omp.inner.for.cond:
350 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
351 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
352 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
353 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
354 // CHECK1:       omp.inner.for.body:
355 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
356 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
357 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
358 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
359 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
360 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
361 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
362 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
363 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
364 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
365 // CHECK1:       omp.body.continue:
366 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
367 // CHECK1:       omp.inner.for.inc:
368 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
369 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
370 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
371 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
372 // CHECK1:       omp.inner.for.end:
373 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
374 // CHECK1:       omp.loop.exit:
375 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
376 // CHECK1-NEXT:    ret void
377 //
378 //
379 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38
380 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
381 // CHECK1-NEXT:  entry:
382 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
383 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
384 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
385 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
386 // CHECK1-NEXT:    ret void
387 //
388 //
389 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
390 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
391 // CHECK1-NEXT:  entry:
392 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
393 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
394 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
395 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
396 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
397 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
398 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
399 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
400 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
401 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
402 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
403 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
404 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
405 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
406 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
407 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
408 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
409 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
410 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
411 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
412 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
413 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
414 // CHECK1:       omp.dispatch.cond:
415 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
416 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
417 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
418 // CHECK1:       cond.true:
419 // CHECK1-NEXT:    br label [[COND_END:%.*]]
420 // CHECK1:       cond.false:
421 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
422 // CHECK1-NEXT:    br label [[COND_END]]
423 // CHECK1:       cond.end:
424 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
425 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
426 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
427 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
428 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
429 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
430 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
431 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
432 // CHECK1:       omp.dispatch.body:
433 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
434 // CHECK1:       omp.inner.for.cond:
435 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
436 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
437 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
438 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
439 // CHECK1:       omp.inner.for.body:
440 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
441 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
442 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
443 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
444 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
445 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
446 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
447 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
448 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
449 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
450 // CHECK1:       omp.body.continue:
451 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
452 // CHECK1:       omp.inner.for.inc:
453 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
454 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
455 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
456 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
457 // CHECK1:       omp.inner.for.end:
458 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
459 // CHECK1:       omp.dispatch.inc:
460 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
461 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
462 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
463 // CHECK1-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
464 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
465 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
466 // CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
467 // CHECK1-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
468 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
469 // CHECK1:       omp.dispatch.end:
470 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
471 // CHECK1-NEXT:    ret void
472 //
473 //
474 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
475 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
476 // CHECK1-NEXT:  entry:
477 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
478 // CHECK1-NEXT:    ret void
479 //
480 //
481 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv
482 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
483 // CHECK2-NEXT:  entry:
484 // CHECK2-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
485 // CHECK2-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
486 // CHECK2-NEXT:    ret i32 [[CALL]]
487 //
488 //
489 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
490 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
491 // CHECK2-NEXT:  entry:
492 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
493 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
494 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
495 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
496 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
497 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
498 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
499 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
500 // CHECK2-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
501 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
502 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
503 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
504 // CHECK2-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
505 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
506 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
507 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
508 // CHECK2-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
509 // CHECK2-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
510 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
511 // CHECK2-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
512 // CHECK2-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
513 // CHECK2-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
514 // CHECK2-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
515 // CHECK2-NEXT:    store i8* null, i8** [[TMP4]], align 8
516 // CHECK2-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
517 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
518 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
519 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
520 // CHECK2-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
521 // CHECK2-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
522 // CHECK2:       omp_offload.failed:
523 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
524 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
525 // CHECK2:       omp_offload.cont:
526 // CHECK2-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
527 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
528 // CHECK2-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
529 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
530 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
531 // CHECK2-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
532 // CHECK2-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
533 // CHECK2-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
534 // CHECK2-NEXT:    store i8* null, i8** [[TMP13]], align 8
535 // CHECK2-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
536 // CHECK2-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
537 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
538 // CHECK2-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
539 // CHECK2-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
540 // CHECK2-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
541 // CHECK2:       omp_offload.failed7:
542 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]]
543 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
544 // CHECK2:       omp_offload.cont8:
545 // CHECK2-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
546 // CHECK2-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
547 // CHECK2-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
548 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
549 // CHECK2-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
550 // CHECK2-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
551 // CHECK2-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
552 // CHECK2-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
553 // CHECK2-NEXT:    store i8* null, i8** [[TMP22]], align 8
554 // CHECK2-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
555 // CHECK2-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
556 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
557 // CHECK2-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
558 // CHECK2-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
559 // CHECK2-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
560 // CHECK2:       omp_offload.failed14:
561 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]]
562 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
563 // CHECK2:       omp_offload.cont15:
564 // CHECK2-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
565 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0
566 // CHECK2-NEXT:    [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
567 // CHECK2-NEXT:    ret i32 [[TMP27]]
568 //
569 //
570 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
571 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
572 // CHECK2-NEXT:  entry:
573 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
574 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
575 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
576 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
577 // CHECK2-NEXT:    ret void
578 //
579 //
580 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
581 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
582 // CHECK2-NEXT:  entry:
583 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
584 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
585 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
586 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
587 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
588 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
589 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
590 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
591 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
592 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
593 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
594 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
595 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
596 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
597 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
598 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
599 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
600 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
601 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
602 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
603 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
604 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
605 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
606 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
607 // CHECK2:       cond.true:
608 // CHECK2-NEXT:    br label [[COND_END:%.*]]
609 // CHECK2:       cond.false:
610 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
611 // CHECK2-NEXT:    br label [[COND_END]]
612 // CHECK2:       cond.end:
613 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
614 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
615 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
616 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
617 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
618 // CHECK2:       omp.inner.for.cond:
619 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
620 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
621 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
622 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
623 // CHECK2:       omp.inner.for.body:
624 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
625 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
626 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
627 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
628 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
629 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
630 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
631 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
632 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
633 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
634 // CHECK2:       omp.body.continue:
635 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
636 // CHECK2:       omp.inner.for.inc:
637 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
638 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
639 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
640 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
641 // CHECK2:       omp.inner.for.end:
642 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
643 // CHECK2:       omp.loop.exit:
644 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
645 // CHECK2-NEXT:    ret void
646 //
647 //
648 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33
649 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
650 // CHECK2-NEXT:  entry:
651 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
652 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
653 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
654 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
655 // CHECK2-NEXT:    ret void
656 //
657 //
658 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
659 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
660 // CHECK2-NEXT:  entry:
661 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
662 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
663 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
664 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
665 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
666 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
667 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
668 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
669 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
670 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
671 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
672 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
673 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
674 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
675 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
676 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
677 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
678 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
679 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
680 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
681 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
682 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
683 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
684 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
685 // CHECK2:       cond.true:
686 // CHECK2-NEXT:    br label [[COND_END:%.*]]
687 // CHECK2:       cond.false:
688 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
689 // CHECK2-NEXT:    br label [[COND_END]]
690 // CHECK2:       cond.end:
691 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
692 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
693 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
694 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
695 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
696 // CHECK2:       omp.inner.for.cond:
697 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
698 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
699 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
700 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
701 // CHECK2:       omp.inner.for.body:
702 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
703 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
704 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
705 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
706 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
707 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
708 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
709 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
710 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
711 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
712 // CHECK2:       omp.body.continue:
713 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
714 // CHECK2:       omp.inner.for.inc:
715 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
716 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
717 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
718 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
719 // CHECK2:       omp.inner.for.end:
720 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
721 // CHECK2:       omp.loop.exit:
722 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
723 // CHECK2-NEXT:    ret void
724 //
725 //
726 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38
727 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
728 // CHECK2-NEXT:  entry:
729 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
730 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
731 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
732 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
733 // CHECK2-NEXT:    ret void
734 //
735 //
736 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
737 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
738 // CHECK2-NEXT:  entry:
739 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
740 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
741 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
742 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
743 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
744 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
745 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
746 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
747 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
748 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
749 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
750 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
751 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
752 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
753 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
754 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
755 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
756 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
757 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
758 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
759 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
760 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
761 // CHECK2:       omp.dispatch.cond:
762 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
763 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
764 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
765 // CHECK2:       cond.true:
766 // CHECK2-NEXT:    br label [[COND_END:%.*]]
767 // CHECK2:       cond.false:
768 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
769 // CHECK2-NEXT:    br label [[COND_END]]
770 // CHECK2:       cond.end:
771 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
772 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
773 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
774 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
775 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
776 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
777 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
778 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
779 // CHECK2:       omp.dispatch.body:
780 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
781 // CHECK2:       omp.inner.for.cond:
782 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
783 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
784 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
785 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
786 // CHECK2:       omp.inner.for.body:
787 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
788 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
789 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
790 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
791 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
792 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
793 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
794 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
795 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
796 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
797 // CHECK2:       omp.body.continue:
798 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
799 // CHECK2:       omp.inner.for.inc:
800 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
801 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
802 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
803 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
804 // CHECK2:       omp.inner.for.end:
805 // CHECK2-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
806 // CHECK2:       omp.dispatch.inc:
807 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
808 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
809 // CHECK2-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
810 // CHECK2-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
811 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
812 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
813 // CHECK2-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
814 // CHECK2-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
815 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND]]
816 // CHECK2:       omp.dispatch.end:
817 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
818 // CHECK2-NEXT:    ret void
819 //
820 //
821 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
822 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
823 // CHECK2-NEXT:  entry:
824 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
825 // CHECK2-NEXT:    ret void
826 //
827 //
828 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
829 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
830 // CHECK3-NEXT:  entry:
831 // CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
832 // CHECK3-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
833 // CHECK3-NEXT:    ret i32 [[CALL]]
834 //
835 //
836 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
837 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
838 // CHECK3-NEXT:  entry:
839 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
840 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
841 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
842 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
843 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
844 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
845 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
846 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
847 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
848 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
849 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
850 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
851 // CHECK3-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
852 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
853 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
854 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
855 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
856 // CHECK3-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
857 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
858 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
859 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
860 // CHECK3-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
861 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
862 // CHECK3-NEXT:    store i8* null, i8** [[TMP4]], align 4
863 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
864 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
865 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
866 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
867 // CHECK3-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
868 // CHECK3-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
869 // CHECK3:       omp_offload.failed:
870 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
871 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
872 // CHECK3:       omp_offload.cont:
873 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
874 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
875 // CHECK3-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
876 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
877 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
878 // CHECK3-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
879 // CHECK3-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
880 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
881 // CHECK3-NEXT:    store i8* null, i8** [[TMP13]], align 4
882 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
883 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
884 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
885 // CHECK3-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
886 // CHECK3-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
887 // CHECK3-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
888 // CHECK3:       omp_offload.failed7:
889 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]]
890 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
891 // CHECK3:       omp_offload.cont8:
892 // CHECK3-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
893 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
894 // CHECK3-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
895 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
896 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
897 // CHECK3-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
898 // CHECK3-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
899 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
900 // CHECK3-NEXT:    store i8* null, i8** [[TMP22]], align 4
901 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
902 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
903 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
904 // CHECK3-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
905 // CHECK3-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
906 // CHECK3-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
907 // CHECK3:       omp_offload.failed14:
908 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]]
909 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
910 // CHECK3:       omp_offload.cont15:
911 // CHECK3-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
912 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0
913 // CHECK3-NEXT:    [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
914 // CHECK3-NEXT:    ret i32 [[TMP27]]
915 //
916 //
917 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
918 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
919 // CHECK3-NEXT:  entry:
920 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
921 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
922 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
923 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
924 // CHECK3-NEXT:    ret void
925 //
926 //
927 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
928 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
929 // CHECK3-NEXT:  entry:
930 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
931 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
932 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
933 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
934 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
935 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
936 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
937 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
938 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
939 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
940 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
941 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
942 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
943 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
944 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
945 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
946 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
947 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
948 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
949 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
950 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
951 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
952 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
953 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
954 // CHECK3:       cond.true:
955 // CHECK3-NEXT:    br label [[COND_END:%.*]]
956 // CHECK3:       cond.false:
957 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
958 // CHECK3-NEXT:    br label [[COND_END]]
959 // CHECK3:       cond.end:
960 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
961 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
962 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
963 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
964 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
965 // CHECK3:       omp.inner.for.cond:
966 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
967 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
968 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
969 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
970 // CHECK3:       omp.inner.for.body:
971 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
972 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
973 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
974 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
975 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
976 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
977 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
978 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
979 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
980 // CHECK3:       omp.body.continue:
981 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
982 // CHECK3:       omp.inner.for.inc:
983 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
984 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
985 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
986 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
987 // CHECK3:       omp.inner.for.end:
988 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
989 // CHECK3:       omp.loop.exit:
990 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
991 // CHECK3-NEXT:    ret void
992 //
993 //
994 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33
995 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
996 // CHECK3-NEXT:  entry:
997 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
998 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
999 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1000 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1001 // CHECK3-NEXT:    ret void
1002 //
1003 //
1004 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1005 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1006 // CHECK3-NEXT:  entry:
1007 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1008 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1009 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1010 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1011 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1012 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1013 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1014 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1015 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1016 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1017 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1018 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1019 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1020 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1021 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1022 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1023 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1024 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1025 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1026 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1027 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1028 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1029 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1030 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1031 // CHECK3:       cond.true:
1032 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1033 // CHECK3:       cond.false:
1034 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1035 // CHECK3-NEXT:    br label [[COND_END]]
1036 // CHECK3:       cond.end:
1037 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1038 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1039 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1040 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1041 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1042 // CHECK3:       omp.inner.for.cond:
1043 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1044 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1045 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1046 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1047 // CHECK3:       omp.inner.for.body:
1048 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1049 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1050 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1051 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1052 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1053 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1054 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
1055 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1056 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1057 // CHECK3:       omp.body.continue:
1058 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1059 // CHECK3:       omp.inner.for.inc:
1060 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1061 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1062 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1063 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1064 // CHECK3:       omp.inner.for.end:
1065 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1066 // CHECK3:       omp.loop.exit:
1067 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1068 // CHECK3-NEXT:    ret void
1069 //
1070 //
1071 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38
1072 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1073 // CHECK3-NEXT:  entry:
1074 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1075 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1076 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1077 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1078 // CHECK3-NEXT:    ret void
1079 //
1080 //
1081 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
1082 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1083 // CHECK3-NEXT:  entry:
1084 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1085 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1086 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1087 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1088 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1089 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1090 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1091 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1092 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1093 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1094 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1095 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1096 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1097 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1098 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1099 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1100 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1101 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1102 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1103 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1104 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1105 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1106 // CHECK3:       omp.dispatch.cond:
1107 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1108 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1109 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1110 // CHECK3:       cond.true:
1111 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1112 // CHECK3:       cond.false:
1113 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1114 // CHECK3-NEXT:    br label [[COND_END]]
1115 // CHECK3:       cond.end:
1116 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1117 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1118 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1119 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1120 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1121 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1122 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1123 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1124 // CHECK3:       omp.dispatch.body:
1125 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1126 // CHECK3:       omp.inner.for.cond:
1127 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1128 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
1129 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1130 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1131 // CHECK3:       omp.inner.for.body:
1132 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1133 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1134 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1135 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
1136 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1137 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8
1138 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1139 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8
1140 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1141 // CHECK3:       omp.body.continue:
1142 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1143 // CHECK3:       omp.inner.for.inc:
1144 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1145 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1146 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1147 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
1148 // CHECK3:       omp.inner.for.end:
1149 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1150 // CHECK3:       omp.dispatch.inc:
1151 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1152 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1153 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1154 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
1155 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1156 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1157 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1158 // CHECK3-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
1159 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
1160 // CHECK3:       omp.dispatch.end:
1161 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1162 // CHECK3-NEXT:    ret void
1163 //
1164 //
1165 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1166 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
1167 // CHECK3-NEXT:  entry:
1168 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
1169 // CHECK3-NEXT:    ret void
1170 //
1171 //
1172 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1173 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
1174 // CHECK4-NEXT:  entry:
1175 // CHECK4-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1176 // CHECK4-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1177 // CHECK4-NEXT:    ret i32 [[CALL]]
1178 //
1179 //
1180 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1181 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1182 // CHECK4-NEXT:  entry:
1183 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1184 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1185 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1186 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1187 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1188 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
1189 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
1190 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
1191 // CHECK4-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
1192 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
1193 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
1194 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
1195 // CHECK4-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
1196 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1197 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1198 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1199 // CHECK4-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1200 // CHECK4-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
1201 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
1202 // CHECK4-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1203 // CHECK4-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
1204 // CHECK4-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
1205 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1206 // CHECK4-NEXT:    store i8* null, i8** [[TMP4]], align 4
1207 // CHECK4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1208 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1209 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
1210 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1211 // CHECK4-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
1212 // CHECK4-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1213 // CHECK4:       omp_offload.failed:
1214 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
1215 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1216 // CHECK4:       omp_offload.cont:
1217 // CHECK4-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1218 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1219 // CHECK4-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
1220 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
1221 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1222 // CHECK4-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
1223 // CHECK4-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
1224 // CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1225 // CHECK4-NEXT:    store i8* null, i8** [[TMP13]], align 4
1226 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1227 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1228 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
1229 // CHECK4-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1230 // CHECK4-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1231 // CHECK4-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1232 // CHECK4:       omp_offload.failed7:
1233 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]]
1234 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
1235 // CHECK4:       omp_offload.cont8:
1236 // CHECK4-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1237 // CHECK4-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1238 // CHECK4-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
1239 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
1240 // CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1241 // CHECK4-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
1242 // CHECK4-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
1243 // CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
1244 // CHECK4-NEXT:    store i8* null, i8** [[TMP22]], align 4
1245 // CHECK4-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1246 // CHECK4-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1247 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
1248 // CHECK4-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1249 // CHECK4-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1250 // CHECK4-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
1251 // CHECK4:       omp_offload.failed14:
1252 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]]
1253 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
1254 // CHECK4:       omp_offload.cont15:
1255 // CHECK4-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1256 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0
1257 // CHECK4-NEXT:    [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1258 // CHECK4-NEXT:    ret i32 [[TMP27]]
1259 //
1260 //
1261 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
1262 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1263 // CHECK4-NEXT:  entry:
1264 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1265 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1266 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1267 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1268 // CHECK4-NEXT:    ret void
1269 //
1270 //
1271 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1272 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1273 // CHECK4-NEXT:  entry:
1274 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1275 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1276 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1277 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1278 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1279 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1280 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1281 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1282 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1283 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
1284 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1285 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1286 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1287 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1288 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1289 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1290 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1291 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1292 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1293 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1294 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1295 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1296 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1297 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1298 // CHECK4:       cond.true:
1299 // CHECK4-NEXT:    br label [[COND_END:%.*]]
1300 // CHECK4:       cond.false:
1301 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1302 // CHECK4-NEXT:    br label [[COND_END]]
1303 // CHECK4:       cond.end:
1304 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1305 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1306 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1307 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1308 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1309 // CHECK4:       omp.inner.for.cond:
1310 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1311 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1312 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1313 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1314 // CHECK4:       omp.inner.for.body:
1315 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1316 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1317 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1318 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1319 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1320 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1321 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
1322 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1323 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1324 // CHECK4:       omp.body.continue:
1325 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1326 // CHECK4:       omp.inner.for.inc:
1327 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1328 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1329 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1330 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
1331 // CHECK4:       omp.inner.for.end:
1332 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1333 // CHECK4:       omp.loop.exit:
1334 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1335 // CHECK4-NEXT:    ret void
1336 //
1337 //
1338 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33
1339 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1340 // CHECK4-NEXT:  entry:
1341 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1342 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1343 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1344 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1345 // CHECK4-NEXT:    ret void
1346 //
1347 //
1348 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
1349 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1350 // CHECK4-NEXT:  entry:
1351 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1352 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1353 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1354 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1355 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1356 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1357 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1358 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1359 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1360 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
1361 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1362 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1363 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1364 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1365 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1366 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1367 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1368 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1369 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1370 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1371 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1372 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1373 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1374 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1375 // CHECK4:       cond.true:
1376 // CHECK4-NEXT:    br label [[COND_END:%.*]]
1377 // CHECK4:       cond.false:
1378 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1379 // CHECK4-NEXT:    br label [[COND_END]]
1380 // CHECK4:       cond.end:
1381 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1382 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1383 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1384 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1385 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1386 // CHECK4:       omp.inner.for.cond:
1387 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1388 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1389 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1390 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1391 // CHECK4:       omp.inner.for.body:
1392 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1393 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1394 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1395 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1396 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1397 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1398 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
1399 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1400 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1401 // CHECK4:       omp.body.continue:
1402 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1403 // CHECK4:       omp.inner.for.inc:
1404 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1405 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1406 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1407 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
1408 // CHECK4:       omp.inner.for.end:
1409 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1410 // CHECK4:       omp.loop.exit:
1411 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1412 // CHECK4-NEXT:    ret void
1413 //
1414 //
1415 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38
1416 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1417 // CHECK4-NEXT:  entry:
1418 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1419 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1420 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1421 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1422 // CHECK4-NEXT:    ret void
1423 //
1424 //
1425 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4
1426 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1427 // CHECK4-NEXT:  entry:
1428 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1429 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1430 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1431 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1432 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1433 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1434 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1435 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1436 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1437 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
1438 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1439 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1440 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1441 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1442 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1443 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1444 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1445 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1446 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1447 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1448 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1449 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1450 // CHECK4:       omp.dispatch.cond:
1451 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1452 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1453 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1454 // CHECK4:       cond.true:
1455 // CHECK4-NEXT:    br label [[COND_END:%.*]]
1456 // CHECK4:       cond.false:
1457 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1458 // CHECK4-NEXT:    br label [[COND_END]]
1459 // CHECK4:       cond.end:
1460 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1461 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1462 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1463 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1464 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1465 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1466 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1467 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1468 // CHECK4:       omp.dispatch.body:
1469 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1470 // CHECK4:       omp.inner.for.cond:
1471 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1472 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
1473 // CHECK4-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1474 // CHECK4-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1475 // CHECK4:       omp.inner.for.body:
1476 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1477 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1478 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1479 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
1480 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1481 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8
1482 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1483 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8
1484 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1485 // CHECK4:       omp.body.continue:
1486 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1487 // CHECK4:       omp.inner.for.inc:
1488 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1489 // CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1490 // CHECK4-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1491 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
1492 // CHECK4:       omp.inner.for.end:
1493 // CHECK4-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1494 // CHECK4:       omp.dispatch.inc:
1495 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1496 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1497 // CHECK4-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1498 // CHECK4-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
1499 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1500 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1501 // CHECK4-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1502 // CHECK4-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
1503 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND]]
1504 // CHECK4:       omp.dispatch.end:
1505 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1506 // CHECK4-NEXT:    ret void
1507 //
1508 //
1509 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1510 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] {
1511 // CHECK4-NEXT:  entry:
1512 // CHECK4-NEXT:    call void @__tgt_register_requires(i64 1)
1513 // CHECK4-NEXT:    ret void
1514 //
1515 //
1516 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1517 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
1518 // CHECK5-NEXT:  entry:
1519 // CHECK5-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1520 // CHECK5-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1521 // CHECK5-NEXT:    ret i32 [[CALL]]
1522 //
1523 //
1524 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1525 // CHECK5-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1526 // CHECK5-NEXT:  entry:
1527 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1528 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
1529 // CHECK5-NEXT:    [[I2:%.*]] = alloca i32, align 4
1530 // CHECK5-NEXT:    [[I12:%.*]] = alloca i32, align 4
1531 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1532 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1533 // CHECK5-NEXT:    store i32 0, i32* [[I]], align 4
1534 // CHECK5-NEXT:    br label [[FOR_COND:%.*]]
1535 // CHECK5:       for.cond:
1536 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
1537 // CHECK5-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123
1538 // CHECK5-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
1539 // CHECK5:       for.body:
1540 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1541 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
1542 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
1543 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1544 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1545 // CHECK5-NEXT:    br label [[FOR_INC:%.*]]
1546 // CHECK5:       for.inc:
1547 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
1548 // CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1549 // CHECK5-NEXT:    store i32 [[INC]], i32* [[I]], align 4
1550 // CHECK5-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
1551 // CHECK5:       for.end:
1552 // CHECK5-NEXT:    store i32 0, i32* [[I2]], align 4
1553 // CHECK5-NEXT:    br label [[FOR_COND3:%.*]]
1554 // CHECK5:       for.cond3:
1555 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I2]], align 4
1556 // CHECK5-NEXT:    [[CMP4:%.*]] = icmp slt i32 [[TMP3]], 123
1557 // CHECK5-NEXT:    br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END11:%.*]]
1558 // CHECK5:       for.body5:
1559 // CHECK5-NEXT:    [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1560 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I2]], align 4
1561 // CHECK5-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP4]] to i64
1562 // CHECK5-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i64 0, i64 [[IDXPROM7]]
1563 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX8]], align 4
1564 // CHECK5-NEXT:    br label [[FOR_INC9:%.*]]
1565 // CHECK5:       for.inc9:
1566 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
1567 // CHECK5-NEXT:    [[INC10:%.*]] = add nsw i32 [[TMP5]], 1
1568 // CHECK5-NEXT:    store i32 [[INC10]], i32* [[I2]], align 4
1569 // CHECK5-NEXT:    br label [[FOR_COND3]], !llvm.loop [[LOOP4:![0-9]+]]
1570 // CHECK5:       for.end11:
1571 // CHECK5-NEXT:    store i32 0, i32* [[I12]], align 4
1572 // CHECK5-NEXT:    br label [[FOR_COND13:%.*]]
1573 // CHECK5:       for.cond13:
1574 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I12]], align 4
1575 // CHECK5-NEXT:    [[CMP14:%.*]] = icmp slt i32 [[TMP6]], 123
1576 // CHECK5-NEXT:    br i1 [[CMP14]], label [[FOR_BODY15:%.*]], label [[FOR_END21:%.*]]
1577 // CHECK5:       for.body15:
1578 // CHECK5-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1579 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I12]], align 4
1580 // CHECK5-NEXT:    [[IDXPROM17:%.*]] = sext i32 [[TMP7]] to i64
1581 // CHECK5-NEXT:    [[ARRAYIDX18:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 [[IDXPROM17]]
1582 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX18]], align 4
1583 // CHECK5-NEXT:    br label [[FOR_INC19:%.*]]
1584 // CHECK5:       for.inc19:
1585 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I12]], align 4
1586 // CHECK5-NEXT:    [[INC20:%.*]] = add nsw i32 [[TMP8]], 1
1587 // CHECK5-NEXT:    store i32 [[INC20]], i32* [[I12]], align 4
1588 // CHECK5-NEXT:    br label [[FOR_COND13]], !llvm.loop [[LOOP5:![0-9]+]]
1589 // CHECK5:       for.end21:
1590 // CHECK5-NEXT:    [[A22:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1591 // CHECK5-NEXT:    [[ARRAYIDX23:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A22]], i64 0, i64 0
1592 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX23]], align 4
1593 // CHECK5-NEXT:    ret i32 [[TMP9]]
1594 //
1595 //
1596 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1597 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
1598 // CHECK6-NEXT:  entry:
1599 // CHECK6-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1600 // CHECK6-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1601 // CHECK6-NEXT:    ret i32 [[CALL]]
1602 //
1603 //
1604 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1605 // CHECK6-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1606 // CHECK6-NEXT:  entry:
1607 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1608 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
1609 // CHECK6-NEXT:    [[I2:%.*]] = alloca i32, align 4
1610 // CHECK6-NEXT:    [[I12:%.*]] = alloca i32, align 4
1611 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1612 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1613 // CHECK6-NEXT:    store i32 0, i32* [[I]], align 4
1614 // CHECK6-NEXT:    br label [[FOR_COND:%.*]]
1615 // CHECK6:       for.cond:
1616 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
1617 // CHECK6-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123
1618 // CHECK6-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
1619 // CHECK6:       for.body:
1620 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1621 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
1622 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
1623 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1624 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1625 // CHECK6-NEXT:    br label [[FOR_INC:%.*]]
1626 // CHECK6:       for.inc:
1627 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
1628 // CHECK6-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1629 // CHECK6-NEXT:    store i32 [[INC]], i32* [[I]], align 4
1630 // CHECK6-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
1631 // CHECK6:       for.end:
1632 // CHECK6-NEXT:    store i32 0, i32* [[I2]], align 4
1633 // CHECK6-NEXT:    br label [[FOR_COND3:%.*]]
1634 // CHECK6:       for.cond3:
1635 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I2]], align 4
1636 // CHECK6-NEXT:    [[CMP4:%.*]] = icmp slt i32 [[TMP3]], 123
1637 // CHECK6-NEXT:    br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END11:%.*]]
1638 // CHECK6:       for.body5:
1639 // CHECK6-NEXT:    [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1640 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I2]], align 4
1641 // CHECK6-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP4]] to i64
1642 // CHECK6-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i64 0, i64 [[IDXPROM7]]
1643 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX8]], align 4
1644 // CHECK6-NEXT:    br label [[FOR_INC9:%.*]]
1645 // CHECK6:       for.inc9:
1646 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
1647 // CHECK6-NEXT:    [[INC10:%.*]] = add nsw i32 [[TMP5]], 1
1648 // CHECK6-NEXT:    store i32 [[INC10]], i32* [[I2]], align 4
1649 // CHECK6-NEXT:    br label [[FOR_COND3]], !llvm.loop [[LOOP4:![0-9]+]]
1650 // CHECK6:       for.end11:
1651 // CHECK6-NEXT:    store i32 0, i32* [[I12]], align 4
1652 // CHECK6-NEXT:    br label [[FOR_COND13:%.*]]
1653 // CHECK6:       for.cond13:
1654 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I12]], align 4
1655 // CHECK6-NEXT:    [[CMP14:%.*]] = icmp slt i32 [[TMP6]], 123
1656 // CHECK6-NEXT:    br i1 [[CMP14]], label [[FOR_BODY15:%.*]], label [[FOR_END21:%.*]]
1657 // CHECK6:       for.body15:
1658 // CHECK6-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1659 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I12]], align 4
1660 // CHECK6-NEXT:    [[IDXPROM17:%.*]] = sext i32 [[TMP7]] to i64
1661 // CHECK6-NEXT:    [[ARRAYIDX18:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 [[IDXPROM17]]
1662 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX18]], align 4
1663 // CHECK6-NEXT:    br label [[FOR_INC19:%.*]]
1664 // CHECK6:       for.inc19:
1665 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I12]], align 4
1666 // CHECK6-NEXT:    [[INC20:%.*]] = add nsw i32 [[TMP8]], 1
1667 // CHECK6-NEXT:    store i32 [[INC20]], i32* [[I12]], align 4
1668 // CHECK6-NEXT:    br label [[FOR_COND13]], !llvm.loop [[LOOP5:![0-9]+]]
1669 // CHECK6:       for.end21:
1670 // CHECK6-NEXT:    [[A22:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1671 // CHECK6-NEXT:    [[ARRAYIDX23:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A22]], i64 0, i64 0
1672 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX23]], align 4
1673 // CHECK6-NEXT:    ret i32 [[TMP9]]
1674 //
1675 //
1676 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1677 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
1678 // CHECK7-NEXT:  entry:
1679 // CHECK7-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1680 // CHECK7-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1681 // CHECK7-NEXT:    ret i32 [[CALL]]
1682 //
1683 //
1684 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1685 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1686 // CHECK7-NEXT:  entry:
1687 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1688 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
1689 // CHECK7-NEXT:    [[I2:%.*]] = alloca i32, align 4
1690 // CHECK7-NEXT:    [[I11:%.*]] = alloca i32, align 4
1691 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1692 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1693 // CHECK7-NEXT:    store i32 0, i32* [[I]], align 4
1694 // CHECK7-NEXT:    br label [[FOR_COND:%.*]]
1695 // CHECK7:       for.cond:
1696 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
1697 // CHECK7-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123
1698 // CHECK7-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
1699 // CHECK7:       for.body:
1700 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1701 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
1702 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP1]]
1703 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1704 // CHECK7-NEXT:    br label [[FOR_INC:%.*]]
1705 // CHECK7:       for.inc:
1706 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
1707 // CHECK7-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1708 // CHECK7-NEXT:    store i32 [[INC]], i32* [[I]], align 4
1709 // CHECK7-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1710 // CHECK7:       for.end:
1711 // CHECK7-NEXT:    store i32 0, i32* [[I2]], align 4
1712 // CHECK7-NEXT:    br label [[FOR_COND3:%.*]]
1713 // CHECK7:       for.cond3:
1714 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I2]], align 4
1715 // CHECK7-NEXT:    [[CMP4:%.*]] = icmp slt i32 [[TMP3]], 123
1716 // CHECK7-NEXT:    br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END10:%.*]]
1717 // CHECK7:       for.body5:
1718 // CHECK7-NEXT:    [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1719 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I2]], align 4
1720 // CHECK7-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i32 0, i32 [[TMP4]]
1721 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX7]], align 4
1722 // CHECK7-NEXT:    br label [[FOR_INC8:%.*]]
1723 // CHECK7:       for.inc8:
1724 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
1725 // CHECK7-NEXT:    [[INC9:%.*]] = add nsw i32 [[TMP5]], 1
1726 // CHECK7-NEXT:    store i32 [[INC9]], i32* [[I2]], align 4
1727 // CHECK7-NEXT:    br label [[FOR_COND3]], !llvm.loop [[LOOP5:![0-9]+]]
1728 // CHECK7:       for.end10:
1729 // CHECK7-NEXT:    store i32 0, i32* [[I11]], align 4
1730 // CHECK7-NEXT:    br label [[FOR_COND12:%.*]]
1731 // CHECK7:       for.cond12:
1732 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I11]], align 4
1733 // CHECK7-NEXT:    [[CMP13:%.*]] = icmp slt i32 [[TMP6]], 123
1734 // CHECK7-NEXT:    br i1 [[CMP13]], label [[FOR_BODY14:%.*]], label [[FOR_END19:%.*]]
1735 // CHECK7:       for.body14:
1736 // CHECK7-NEXT:    [[A15:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1737 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I11]], align 4
1738 // CHECK7-NEXT:    [[ARRAYIDX16:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A15]], i32 0, i32 [[TMP7]]
1739 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX16]], align 4
1740 // CHECK7-NEXT:    br label [[FOR_INC17:%.*]]
1741 // CHECK7:       for.inc17:
1742 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I11]], align 4
1743 // CHECK7-NEXT:    [[INC18:%.*]] = add nsw i32 [[TMP8]], 1
1744 // CHECK7-NEXT:    store i32 [[INC18]], i32* [[I11]], align 4
1745 // CHECK7-NEXT:    br label [[FOR_COND12]], !llvm.loop [[LOOP6:![0-9]+]]
1746 // CHECK7:       for.end19:
1747 // CHECK7-NEXT:    [[A20:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1748 // CHECK7-NEXT:    [[ARRAYIDX21:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A20]], i32 0, i32 0
1749 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX21]], align 4
1750 // CHECK7-NEXT:    ret i32 [[TMP9]]
1751 //
1752 //
1753 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1754 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
1755 // CHECK8-NEXT:  entry:
1756 // CHECK8-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1757 // CHECK8-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1758 // CHECK8-NEXT:    ret i32 [[CALL]]
1759 //
1760 //
1761 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1762 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1763 // CHECK8-NEXT:  entry:
1764 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1765 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
1766 // CHECK8-NEXT:    [[I2:%.*]] = alloca i32, align 4
1767 // CHECK8-NEXT:    [[I11:%.*]] = alloca i32, align 4
1768 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1769 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1770 // CHECK8-NEXT:    store i32 0, i32* [[I]], align 4
1771 // CHECK8-NEXT:    br label [[FOR_COND:%.*]]
1772 // CHECK8:       for.cond:
1773 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
1774 // CHECK8-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123
1775 // CHECK8-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
1776 // CHECK8:       for.body:
1777 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1778 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
1779 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP1]]
1780 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1781 // CHECK8-NEXT:    br label [[FOR_INC:%.*]]
1782 // CHECK8:       for.inc:
1783 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
1784 // CHECK8-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1785 // CHECK8-NEXT:    store i32 [[INC]], i32* [[I]], align 4
1786 // CHECK8-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1787 // CHECK8:       for.end:
1788 // CHECK8-NEXT:    store i32 0, i32* [[I2]], align 4
1789 // CHECK8-NEXT:    br label [[FOR_COND3:%.*]]
1790 // CHECK8:       for.cond3:
1791 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I2]], align 4
1792 // CHECK8-NEXT:    [[CMP4:%.*]] = icmp slt i32 [[TMP3]], 123
1793 // CHECK8-NEXT:    br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END10:%.*]]
1794 // CHECK8:       for.body5:
1795 // CHECK8-NEXT:    [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1796 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I2]], align 4
1797 // CHECK8-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i32 0, i32 [[TMP4]]
1798 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX7]], align 4
1799 // CHECK8-NEXT:    br label [[FOR_INC8:%.*]]
1800 // CHECK8:       for.inc8:
1801 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
1802 // CHECK8-NEXT:    [[INC9:%.*]] = add nsw i32 [[TMP5]], 1
1803 // CHECK8-NEXT:    store i32 [[INC9]], i32* [[I2]], align 4
1804 // CHECK8-NEXT:    br label [[FOR_COND3]], !llvm.loop [[LOOP5:![0-9]+]]
1805 // CHECK8:       for.end10:
1806 // CHECK8-NEXT:    store i32 0, i32* [[I11]], align 4
1807 // CHECK8-NEXT:    br label [[FOR_COND12:%.*]]
1808 // CHECK8:       for.cond12:
1809 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I11]], align 4
1810 // CHECK8-NEXT:    [[CMP13:%.*]] = icmp slt i32 [[TMP6]], 123
1811 // CHECK8-NEXT:    br i1 [[CMP13]], label [[FOR_BODY14:%.*]], label [[FOR_END19:%.*]]
1812 // CHECK8:       for.body14:
1813 // CHECK8-NEXT:    [[A15:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1814 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I11]], align 4
1815 // CHECK8-NEXT:    [[ARRAYIDX16:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A15]], i32 0, i32 [[TMP7]]
1816 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX16]], align 4
1817 // CHECK8-NEXT:    br label [[FOR_INC17:%.*]]
1818 // CHECK8:       for.inc17:
1819 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I11]], align 4
1820 // CHECK8-NEXT:    [[INC18:%.*]] = add nsw i32 [[TMP8]], 1
1821 // CHECK8-NEXT:    store i32 [[INC18]], i32* [[I11]], align 4
1822 // CHECK8-NEXT:    br label [[FOR_COND12]], !llvm.loop [[LOOP6:![0-9]+]]
1823 // CHECK8:       for.end19:
1824 // CHECK8-NEXT:    [[A20:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1825 // CHECK8-NEXT:    [[ARRAYIDX21:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A20]], i32 0, i32 0
1826 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX21]], align 4
1827 // CHECK8-NEXT:    ret i32 [[TMP9]]
1828 //
1829 //
1830 // CHECK9-LABEL: define {{[^@]+}}@main
1831 // CHECK9-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
1832 // CHECK9-NEXT:  entry:
1833 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1834 // CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
1835 // CHECK9-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
1836 // CHECK9-NEXT:    [[N:%.*]] = alloca i32, align 4
1837 // CHECK9-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
1838 // CHECK9-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
1839 // CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
1840 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
1841 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
1842 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
1843 // CHECK9-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
1844 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1845 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1846 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1847 // CHECK9-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
1848 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
1849 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
1850 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
1851 // CHECK9-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
1852 // CHECK9-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
1853 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
1854 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
1855 // CHECK9-NEXT:    [[N_CASTED18:%.*]] = alloca i64, align 8
1856 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [3 x i8*], align 8
1857 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [3 x i8*], align 8
1858 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [3 x i8*], align 8
1859 // CHECK9-NEXT:    [[DOTOFFLOAD_SIZES23:%.*]] = alloca [3 x i64], align 8
1860 // CHECK9-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
1861 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
1862 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
1863 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1864 // CHECK9-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1865 // CHECK9-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
1866 // CHECK9-NEXT:    store i32 100, i32* [[N]], align 4
1867 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1868 // CHECK9-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
1869 // CHECK9-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
1870 // CHECK9-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
1871 // CHECK9-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
1872 // CHECK9-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
1873 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
1874 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1875 // CHECK9-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
1876 // CHECK9-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
1877 // CHECK9-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
1878 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1879 // CHECK9-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
1880 // CHECK9-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
1881 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1882 // CHECK9-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
1883 // CHECK9-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
1884 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1885 // CHECK9-NEXT:    store i64 4, i64* [[TMP10]], align 8
1886 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1887 // CHECK9-NEXT:    store i8* null, i8** [[TMP11]], align 8
1888 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1889 // CHECK9-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
1890 // CHECK9-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
1891 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1892 // CHECK9-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
1893 // CHECK9-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
1894 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
1895 // CHECK9-NEXT:    store i64 8, i64* [[TMP16]], align 8
1896 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1897 // CHECK9-NEXT:    store i8* null, i8** [[TMP17]], align 8
1898 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1899 // CHECK9-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
1900 // CHECK9-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
1901 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1902 // CHECK9-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
1903 // CHECK9-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
1904 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
1905 // CHECK9-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
1906 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1907 // CHECK9-NEXT:    store i8* null, i8** [[TMP23]], align 8
1908 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1909 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1910 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1911 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
1912 // CHECK9-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
1913 // CHECK9-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1914 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
1915 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1916 // CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1917 // CHECK9-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1918 // CHECK9-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1919 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
1920 // CHECK9-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
1921 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
1922 // CHECK9-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1923 // CHECK9-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
1924 // CHECK9-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1925 // CHECK9:       omp_offload.failed:
1926 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
1927 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1928 // CHECK9:       omp_offload.cont:
1929 // CHECK9-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
1930 // CHECK9-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
1931 // CHECK9-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
1932 // CHECK9-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
1933 // CHECK9-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
1934 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1935 // CHECK9-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
1936 // CHECK9-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
1937 // CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1938 // CHECK9-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
1939 // CHECK9-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
1940 // CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
1941 // CHECK9-NEXT:    store i64 4, i64* [[TMP40]], align 8
1942 // CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
1943 // CHECK9-NEXT:    store i8* null, i8** [[TMP41]], align 8
1944 // CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
1945 // CHECK9-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
1946 // CHECK9-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
1947 // CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
1948 // CHECK9-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
1949 // CHECK9-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
1950 // CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
1951 // CHECK9-NEXT:    store i64 8, i64* [[TMP46]], align 8
1952 // CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
1953 // CHECK9-NEXT:    store i8* null, i8** [[TMP47]], align 8
1954 // CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
1955 // CHECK9-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
1956 // CHECK9-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
1957 // CHECK9-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
1958 // CHECK9-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
1959 // CHECK9-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
1960 // CHECK9-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
1961 // CHECK9-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
1962 // CHECK9-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
1963 // CHECK9-NEXT:    store i8* null, i8** [[TMP53]], align 8
1964 // CHECK9-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1965 // CHECK9-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1966 // CHECK9-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
1967 // CHECK9-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
1968 // CHECK9-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
1969 // CHECK9-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
1970 // CHECK9-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
1971 // CHECK9-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
1972 // CHECK9-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
1973 // CHECK9-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
1974 // CHECK9-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
1975 // CHECK9-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
1976 // CHECK9-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
1977 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP60]])
1978 // CHECK9-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1979 // CHECK9-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
1980 // CHECK9-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
1981 // CHECK9:       omp_offload.failed16:
1982 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
1983 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
1984 // CHECK9:       omp_offload.cont17:
1985 // CHECK9-NEXT:    [[TMP63:%.*]] = load i32, i32* [[N]], align 4
1986 // CHECK9-NEXT:    [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32*
1987 // CHECK9-NEXT:    store i32 [[TMP63]], i32* [[CONV19]], align 4
1988 // CHECK9-NEXT:    [[TMP64:%.*]] = load i64, i64* [[N_CASTED18]], align 8
1989 // CHECK9-NEXT:    [[TMP65:%.*]] = mul nuw i64 [[TMP1]], 4
1990 // CHECK9-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
1991 // CHECK9-NEXT:    [[TMP67:%.*]] = bitcast i8** [[TMP66]] to i64*
1992 // CHECK9-NEXT:    store i64 [[TMP64]], i64* [[TMP67]], align 8
1993 // CHECK9-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
1994 // CHECK9-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
1995 // CHECK9-NEXT:    store i64 [[TMP64]], i64* [[TMP69]], align 8
1996 // CHECK9-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
1997 // CHECK9-NEXT:    store i64 4, i64* [[TMP70]], align 8
1998 // CHECK9-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0
1999 // CHECK9-NEXT:    store i8* null, i8** [[TMP71]], align 8
2000 // CHECK9-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
2001 // CHECK9-NEXT:    [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64*
2002 // CHECK9-NEXT:    store i64 [[TMP1]], i64* [[TMP73]], align 8
2003 // CHECK9-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
2004 // CHECK9-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
2005 // CHECK9-NEXT:    store i64 [[TMP1]], i64* [[TMP75]], align 8
2006 // CHECK9-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 1
2007 // CHECK9-NEXT:    store i64 8, i64* [[TMP76]], align 8
2008 // CHECK9-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1
2009 // CHECK9-NEXT:    store i8* null, i8** [[TMP77]], align 8
2010 // CHECK9-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
2011 // CHECK9-NEXT:    [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32**
2012 // CHECK9-NEXT:    store i32* [[VLA]], i32** [[TMP79]], align 8
2013 // CHECK9-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
2014 // CHECK9-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32**
2015 // CHECK9-NEXT:    store i32* [[VLA]], i32** [[TMP81]], align 8
2016 // CHECK9-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
2017 // CHECK9-NEXT:    store i64 [[TMP65]], i64* [[TMP82]], align 8
2018 // CHECK9-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2
2019 // CHECK9-NEXT:    store i8* null, i8** [[TMP83]], align 8
2020 // CHECK9-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
2021 // CHECK9-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
2022 // CHECK9-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
2023 // CHECK9-NEXT:    [[TMP87:%.*]] = load i32, i32* [[N]], align 4
2024 // CHECK9-NEXT:    store i32 [[TMP87]], i32* [[DOTCAPTURE_EXPR_25]], align 4
2025 // CHECK9-NEXT:    [[TMP88:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
2026 // CHECK9-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP88]], 0
2027 // CHECK9-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
2028 // CHECK9-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
2029 // CHECK9-NEXT:    store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4
2030 // CHECK9-NEXT:    [[TMP89:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
2031 // CHECK9-NEXT:    [[ADD30:%.*]] = add nsw i32 [[TMP89]], 1
2032 // CHECK9-NEXT:    [[TMP90:%.*]] = zext i32 [[ADD30]] to i64
2033 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP90]])
2034 // CHECK9-NEXT:    [[TMP91:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP84]], i8** [[TMP85]], i64* [[TMP86]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2035 // CHECK9-NEXT:    [[TMP92:%.*]] = icmp ne i32 [[TMP91]], 0
2036 // CHECK9-NEXT:    br i1 [[TMP92]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]
2037 // CHECK9:       omp_offload.failed31:
2038 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP64]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
2039 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT32]]
2040 // CHECK9:       omp_offload.cont32:
2041 // CHECK9-NEXT:    [[TMP93:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2042 // CHECK9-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP93]])
2043 // CHECK9-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
2044 // CHECK9-NEXT:    [[TMP94:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2045 // CHECK9-NEXT:    call void @llvm.stackrestore(i8* [[TMP94]])
2046 // CHECK9-NEXT:    [[TMP95:%.*]] = load i32, i32* [[RETVAL]], align 4
2047 // CHECK9-NEXT:    ret i32 [[TMP95]]
2048 //
2049 //
2050 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100
2051 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2052 // CHECK9-NEXT:  entry:
2053 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2054 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
2055 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
2056 // CHECK9-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
2057 // CHECK9-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2058 // CHECK9-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
2059 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2060 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2061 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2062 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
2063 // CHECK9-NEXT:    ret void
2064 //
2065 //
2066 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
2067 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2068 // CHECK9-NEXT:  entry:
2069 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2070 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2071 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
2072 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
2073 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
2074 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2075 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2076 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2077 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2078 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2079 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2080 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2081 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2082 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2083 // CHECK9-NEXT:    [[I3:%.*]] = alloca i32, align 4
2084 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2085 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2086 // CHECK9-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
2087 // CHECK9-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2088 // CHECK9-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
2089 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
2090 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2091 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2092 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
2093 // CHECK9-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2094 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2095 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2096 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2097 // CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2098 // CHECK9-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2099 // CHECK9-NEXT:    store i32 0, i32* [[I]], align 4
2100 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2101 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2102 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2103 // CHECK9:       omp.precond.then:
2104 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2105 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2106 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2107 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2108 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2109 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2110 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2111 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2112 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2113 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2114 // CHECK9-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2115 // CHECK9-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2116 // CHECK9:       cond.true:
2117 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2118 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2119 // CHECK9:       cond.false:
2120 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2121 // CHECK9-NEXT:    br label [[COND_END]]
2122 // CHECK9:       cond.end:
2123 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2124 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2125 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2126 // CHECK9-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2127 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2128 // CHECK9:       omp.inner.for.cond:
2129 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2130 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2131 // CHECK9-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2132 // CHECK9-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2133 // CHECK9:       omp.inner.for.body:
2134 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2135 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2136 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2137 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
2138 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I3]], align 4
2139 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
2140 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
2141 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2142 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2143 // CHECK9:       omp.body.continue:
2144 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2145 // CHECK9:       omp.inner.for.inc:
2146 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2147 // CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
2148 // CHECK9-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2149 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
2150 // CHECK9:       omp.inner.for.end:
2151 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2152 // CHECK9:       omp.loop.exit:
2153 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2154 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
2155 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
2156 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
2157 // CHECK9:       omp.precond.end:
2158 // CHECK9-NEXT:    ret void
2159 //
2160 //
2161 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105
2162 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2163 // CHECK9-NEXT:  entry:
2164 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2165 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
2166 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
2167 // CHECK9-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
2168 // CHECK9-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2169 // CHECK9-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
2170 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2171 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2172 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2173 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
2174 // CHECK9-NEXT:    ret void
2175 //
2176 //
2177 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
2178 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2179 // CHECK9-NEXT:  entry:
2180 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2181 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2182 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
2183 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
2184 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
2185 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2186 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2187 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2188 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2189 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2190 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2191 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2192 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2193 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2194 // CHECK9-NEXT:    [[I3:%.*]] = alloca i32, align 4
2195 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2196 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2197 // CHECK9-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
2198 // CHECK9-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2199 // CHECK9-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
2200 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
2201 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2202 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2203 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
2204 // CHECK9-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2205 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2206 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2207 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2208 // CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2209 // CHECK9-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2210 // CHECK9-NEXT:    store i32 0, i32* [[I]], align 4
2211 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2212 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2213 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2214 // CHECK9:       omp.precond.then:
2215 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2216 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2217 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2218 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2219 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2220 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2221 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2222 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2223 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2224 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2225 // CHECK9-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2226 // CHECK9-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2227 // CHECK9:       cond.true:
2228 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2229 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2230 // CHECK9:       cond.false:
2231 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2232 // CHECK9-NEXT:    br label [[COND_END]]
2233 // CHECK9:       cond.end:
2234 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2235 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2236 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2237 // CHECK9-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2238 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2239 // CHECK9:       omp.inner.for.cond:
2240 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2241 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2242 // CHECK9-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2243 // CHECK9-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2244 // CHECK9:       omp.inner.for.body:
2245 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2246 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2247 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2248 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
2249 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I3]], align 4
2250 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
2251 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
2252 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2253 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2254 // CHECK9:       omp.body.continue:
2255 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2256 // CHECK9:       omp.inner.for.inc:
2257 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2258 // CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
2259 // CHECK9-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2260 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
2261 // CHECK9:       omp.inner.for.end:
2262 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2263 // CHECK9:       omp.loop.exit:
2264 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2265 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
2266 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
2267 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
2268 // CHECK9:       omp.precond.end:
2269 // CHECK9-NEXT:    ret void
2270 //
2271 //
2272 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110
2273 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2274 // CHECK9-NEXT:  entry:
2275 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2276 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
2277 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
2278 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2279 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2280 // CHECK9-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
2281 // CHECK9-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2282 // CHECK9-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
2283 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2284 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2285 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2286 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2287 // CHECK9-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2288 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2289 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
2290 // CHECK9-NEXT:    store i32 [[TMP3]], i32* [[CONV1]], align 4
2291 // CHECK9-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2292 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
2293 // CHECK9-NEXT:    ret void
2294 //
2295 //
2296 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
2297 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2298 // CHECK9-NEXT:  entry:
2299 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2300 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2301 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
2302 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
2303 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
2304 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2305 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2306 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2307 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2308 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2309 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2310 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2311 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2312 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2313 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2314 // CHECK9-NEXT:    [[I4:%.*]] = alloca i32, align 4
2315 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2316 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2317 // CHECK9-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
2318 // CHECK9-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2319 // CHECK9-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
2320 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2321 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
2322 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2323 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2324 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2325 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
2326 // CHECK9-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2327 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2328 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2329 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2330 // CHECK9-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
2331 // CHECK9-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2332 // CHECK9-NEXT:    store i32 0, i32* [[I]], align 4
2333 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2334 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2335 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2336 // CHECK9:       omp.precond.then:
2337 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2338 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2339 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2340 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2341 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2342 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
2343 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2344 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
2345 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
2346 // CHECK9-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2347 // CHECK9:       omp.dispatch.cond:
2348 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2349 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2350 // CHECK9-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
2351 // CHECK9-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2352 // CHECK9:       cond.true:
2353 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2354 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2355 // CHECK9:       cond.false:
2356 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2357 // CHECK9-NEXT:    br label [[COND_END]]
2358 // CHECK9:       cond.end:
2359 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
2360 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2361 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2362 // CHECK9-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
2363 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2364 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2365 // CHECK9-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
2366 // CHECK9-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2367 // CHECK9:       omp.dispatch.body:
2368 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2369 // CHECK9:       omp.inner.for.cond:
2370 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2371 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
2372 // CHECK9-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2373 // CHECK9-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2374 // CHECK9:       omp.inner.for.body:
2375 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2376 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
2377 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2378 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !10
2379 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !10
2380 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
2381 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
2382 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
2383 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2384 // CHECK9:       omp.body.continue:
2385 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2386 // CHECK9:       omp.inner.for.inc:
2387 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2388 // CHECK9-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1
2389 // CHECK9-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2390 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2391 // CHECK9:       omp.inner.for.end:
2392 // CHECK9-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2393 // CHECK9:       omp.dispatch.inc:
2394 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2395 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2396 // CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
2397 // CHECK9-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
2398 // CHECK9-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2399 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2400 // CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
2401 // CHECK9-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
2402 // CHECK9-NEXT:    br label [[OMP_DISPATCH_COND]]
2403 // CHECK9:       omp.dispatch.end:
2404 // CHECK9-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2405 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
2406 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
2407 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
2408 // CHECK9:       omp.precond.end:
2409 // CHECK9-NEXT:    ret void
2410 //
2411 //
2412 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
2413 // CHECK9-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
2414 // CHECK9-NEXT:  entry:
2415 // CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
2416 // CHECK9-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
2417 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2418 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2419 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2420 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2421 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
2422 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
2423 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
2424 // CHECK9-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
2425 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8
2426 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8
2427 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8
2428 // CHECK9-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
2429 // CHECK9-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2430 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2431 // CHECK9-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
2432 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
2433 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2434 // CHECK9-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
2435 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
2436 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2437 // CHECK9-NEXT:    store i8* null, i8** [[TMP4]], align 8
2438 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2439 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2440 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2441 // CHECK9-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2442 // CHECK9-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2443 // CHECK9-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2444 // CHECK9:       omp_offload.failed:
2445 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]]
2446 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2447 // CHECK9:       omp_offload.cont:
2448 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
2449 // CHECK9-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
2450 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
2451 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
2452 // CHECK9-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
2453 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
2454 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
2455 // CHECK9-NEXT:    store i8* null, i8** [[TMP13]], align 8
2456 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
2457 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
2458 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2459 // CHECK9-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2460 // CHECK9-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2461 // CHECK9-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
2462 // CHECK9:       omp_offload.failed5:
2463 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]]
2464 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
2465 // CHECK9:       omp_offload.cont6:
2466 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
2467 // CHECK9-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
2468 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
2469 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
2470 // CHECK9-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
2471 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
2472 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
2473 // CHECK9-NEXT:    store i8* null, i8** [[TMP22]], align 8
2474 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
2475 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
2476 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2477 // CHECK9-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2478 // CHECK9-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2479 // CHECK9-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
2480 // CHECK9:       omp_offload.failed11:
2481 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]]
2482 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
2483 // CHECK9:       omp_offload.cont12:
2484 // CHECK9-NEXT:    ret i32 0
2485 //
2486 //
2487 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79
2488 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2489 // CHECK9-NEXT:  entry:
2490 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2491 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2492 // CHECK9-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2493 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2494 // CHECK9-NEXT:    ret void
2495 //
2496 //
2497 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
2498 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2499 // CHECK9-NEXT:  entry:
2500 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2501 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2502 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2503 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2504 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2505 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2506 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2507 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2508 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2509 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2510 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2511 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2512 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2513 // CHECK9-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2514 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2515 // CHECK9-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
2516 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2517 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2518 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2519 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2520 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2521 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2522 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2523 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2524 // CHECK9:       cond.true:
2525 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2526 // CHECK9:       cond.false:
2527 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2528 // CHECK9-NEXT:    br label [[COND_END]]
2529 // CHECK9:       cond.end:
2530 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2531 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2532 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2533 // CHECK9-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2534 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2535 // CHECK9:       omp.inner.for.cond:
2536 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2537 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2538 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2539 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2540 // CHECK9:       omp.inner.for.body:
2541 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2542 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2543 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2544 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2545 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
2546 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2547 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2548 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2549 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2550 // CHECK9:       omp.body.continue:
2551 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2552 // CHECK9:       omp.inner.for.inc:
2553 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2554 // CHECK9-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2555 // CHECK9-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2556 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
2557 // CHECK9:       omp.inner.for.end:
2558 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2559 // CHECK9:       omp.loop.exit:
2560 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2561 // CHECK9-NEXT:    ret void
2562 //
2563 //
2564 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
2565 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2566 // CHECK9-NEXT:  entry:
2567 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2568 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2569 // CHECK9-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2570 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2571 // CHECK9-NEXT:    ret void
2572 //
2573 //
2574 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
2575 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2576 // CHECK9-NEXT:  entry:
2577 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2578 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2579 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2580 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2581 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2582 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2583 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2584 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2585 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2586 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2587 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2588 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2589 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2590 // CHECK9-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2591 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2592 // CHECK9-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
2593 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2594 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2595 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2596 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2597 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2598 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2599 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2600 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2601 // CHECK9:       cond.true:
2602 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2603 // CHECK9:       cond.false:
2604 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2605 // CHECK9-NEXT:    br label [[COND_END]]
2606 // CHECK9:       cond.end:
2607 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2608 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2609 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2610 // CHECK9-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2611 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2612 // CHECK9:       omp.inner.for.cond:
2613 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2614 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2615 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2616 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2617 // CHECK9:       omp.inner.for.body:
2618 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2619 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2620 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2621 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2622 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
2623 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2624 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2625 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2626 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2627 // CHECK9:       omp.body.continue:
2628 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2629 // CHECK9:       omp.inner.for.inc:
2630 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2631 // CHECK9-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2632 // CHECK9-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2633 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
2634 // CHECK9:       omp.inner.for.end:
2635 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2636 // CHECK9:       omp.loop.exit:
2637 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2638 // CHECK9-NEXT:    ret void
2639 //
2640 //
2641 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89
2642 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2643 // CHECK9-NEXT:  entry:
2644 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2645 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2646 // CHECK9-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2647 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2648 // CHECK9-NEXT:    ret void
2649 //
2650 //
2651 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
2652 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2653 // CHECK9-NEXT:  entry:
2654 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2655 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2656 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2657 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2658 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2659 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2660 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2661 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2662 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2663 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2664 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2665 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2666 // CHECK9-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2667 // CHECK9-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2668 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2669 // CHECK9-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
2670 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2671 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2672 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2673 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2674 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
2675 // CHECK9-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2676 // CHECK9:       omp.dispatch.cond:
2677 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2678 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2679 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2680 // CHECK9:       cond.true:
2681 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2682 // CHECK9:       cond.false:
2683 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2684 // CHECK9-NEXT:    br label [[COND_END]]
2685 // CHECK9:       cond.end:
2686 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2687 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2688 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2689 // CHECK9-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2690 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2691 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2692 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2693 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2694 // CHECK9:       omp.dispatch.body:
2695 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2696 // CHECK9:       omp.inner.for.cond:
2697 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2698 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
2699 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2700 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2701 // CHECK9:       omp.inner.for.body:
2702 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2703 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2704 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2705 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
2706 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
2707 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2708 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2709 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
2710 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2711 // CHECK9:       omp.body.continue:
2712 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2713 // CHECK9:       omp.inner.for.inc:
2714 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2715 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2716 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2717 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
2718 // CHECK9:       omp.inner.for.end:
2719 // CHECK9-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2720 // CHECK9:       omp.dispatch.inc:
2721 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2722 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2723 // CHECK9-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2724 // CHECK9-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
2725 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2726 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2727 // CHECK9-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
2728 // CHECK9-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
2729 // CHECK9-NEXT:    br label [[OMP_DISPATCH_COND]]
2730 // CHECK9:       omp.dispatch.end:
2731 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2732 // CHECK9-NEXT:    ret void
2733 //
2734 //
2735 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2736 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] {
2737 // CHECK9-NEXT:  entry:
2738 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
2739 // CHECK9-NEXT:    ret void
2740 //
2741 //
2742 // CHECK10-LABEL: define {{[^@]+}}@main
2743 // CHECK10-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2744 // CHECK10-NEXT:  entry:
2745 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2746 // CHECK10-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
2747 // CHECK10-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
2748 // CHECK10-NEXT:    [[N:%.*]] = alloca i32, align 4
2749 // CHECK10-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
2750 // CHECK10-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2751 // CHECK10-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
2752 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
2753 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
2754 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
2755 // CHECK10-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
2756 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2757 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2758 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2759 // CHECK10-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
2760 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
2761 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
2762 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
2763 // CHECK10-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
2764 // CHECK10-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
2765 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
2766 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
2767 // CHECK10-NEXT:    [[N_CASTED18:%.*]] = alloca i64, align 8
2768 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [3 x i8*], align 8
2769 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [3 x i8*], align 8
2770 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [3 x i8*], align 8
2771 // CHECK10-NEXT:    [[DOTOFFLOAD_SIZES23:%.*]] = alloca [3 x i64], align 8
2772 // CHECK10-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
2773 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
2774 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
2775 // CHECK10-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2776 // CHECK10-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2777 // CHECK10-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
2778 // CHECK10-NEXT:    store i32 100, i32* [[N]], align 4
2779 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2780 // CHECK10-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
2781 // CHECK10-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
2782 // CHECK10-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
2783 // CHECK10-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
2784 // CHECK10-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
2785 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
2786 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2787 // CHECK10-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
2788 // CHECK10-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
2789 // CHECK10-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
2790 // CHECK10-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2791 // CHECK10-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
2792 // CHECK10-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
2793 // CHECK10-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2794 // CHECK10-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
2795 // CHECK10-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
2796 // CHECK10-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2797 // CHECK10-NEXT:    store i64 4, i64* [[TMP10]], align 8
2798 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2799 // CHECK10-NEXT:    store i8* null, i8** [[TMP11]], align 8
2800 // CHECK10-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2801 // CHECK10-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
2802 // CHECK10-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
2803 // CHECK10-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2804 // CHECK10-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
2805 // CHECK10-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
2806 // CHECK10-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2807 // CHECK10-NEXT:    store i64 8, i64* [[TMP16]], align 8
2808 // CHECK10-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2809 // CHECK10-NEXT:    store i8* null, i8** [[TMP17]], align 8
2810 // CHECK10-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2811 // CHECK10-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
2812 // CHECK10-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
2813 // CHECK10-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2814 // CHECK10-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
2815 // CHECK10-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
2816 // CHECK10-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2817 // CHECK10-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
2818 // CHECK10-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2819 // CHECK10-NEXT:    store i8* null, i8** [[TMP23]], align 8
2820 // CHECK10-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2821 // CHECK10-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2822 // CHECK10-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2823 // CHECK10-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
2824 // CHECK10-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
2825 // CHECK10-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2826 // CHECK10-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
2827 // CHECK10-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2828 // CHECK10-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2829 // CHECK10-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2830 // CHECK10-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2831 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
2832 // CHECK10-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
2833 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
2834 // CHECK10-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2835 // CHECK10-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
2836 // CHECK10-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2837 // CHECK10:       omp_offload.failed:
2838 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
2839 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2840 // CHECK10:       omp_offload.cont:
2841 // CHECK10-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
2842 // CHECK10-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
2843 // CHECK10-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
2844 // CHECK10-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
2845 // CHECK10-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
2846 // CHECK10-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
2847 // CHECK10-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
2848 // CHECK10-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
2849 // CHECK10-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
2850 // CHECK10-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
2851 // CHECK10-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
2852 // CHECK10-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
2853 // CHECK10-NEXT:    store i64 4, i64* [[TMP40]], align 8
2854 // CHECK10-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
2855 // CHECK10-NEXT:    store i8* null, i8** [[TMP41]], align 8
2856 // CHECK10-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
2857 // CHECK10-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
2858 // CHECK10-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
2859 // CHECK10-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
2860 // CHECK10-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
2861 // CHECK10-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
2862 // CHECK10-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
2863 // CHECK10-NEXT:    store i64 8, i64* [[TMP46]], align 8
2864 // CHECK10-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
2865 // CHECK10-NEXT:    store i8* null, i8** [[TMP47]], align 8
2866 // CHECK10-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
2867 // CHECK10-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
2868 // CHECK10-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
2869 // CHECK10-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
2870 // CHECK10-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
2871 // CHECK10-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
2872 // CHECK10-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
2873 // CHECK10-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
2874 // CHECK10-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
2875 // CHECK10-NEXT:    store i8* null, i8** [[TMP53]], align 8
2876 // CHECK10-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
2877 // CHECK10-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
2878 // CHECK10-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
2879 // CHECK10-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
2880 // CHECK10-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
2881 // CHECK10-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
2882 // CHECK10-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
2883 // CHECK10-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
2884 // CHECK10-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
2885 // CHECK10-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
2886 // CHECK10-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
2887 // CHECK10-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
2888 // CHECK10-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
2889 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP60]])
2890 // CHECK10-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2891 // CHECK10-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
2892 // CHECK10-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2893 // CHECK10:       omp_offload.failed16:
2894 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
2895 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
2896 // CHECK10:       omp_offload.cont17:
2897 // CHECK10-NEXT:    [[TMP63:%.*]] = load i32, i32* [[N]], align 4
2898 // CHECK10-NEXT:    [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32*
2899 // CHECK10-NEXT:    store i32 [[TMP63]], i32* [[CONV19]], align 4
2900 // CHECK10-NEXT:    [[TMP64:%.*]] = load i64, i64* [[N_CASTED18]], align 8
2901 // CHECK10-NEXT:    [[TMP65:%.*]] = mul nuw i64 [[TMP1]], 4
2902 // CHECK10-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
2903 // CHECK10-NEXT:    [[TMP67:%.*]] = bitcast i8** [[TMP66]] to i64*
2904 // CHECK10-NEXT:    store i64 [[TMP64]], i64* [[TMP67]], align 8
2905 // CHECK10-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
2906 // CHECK10-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
2907 // CHECK10-NEXT:    store i64 [[TMP64]], i64* [[TMP69]], align 8
2908 // CHECK10-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
2909 // CHECK10-NEXT:    store i64 4, i64* [[TMP70]], align 8
2910 // CHECK10-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0
2911 // CHECK10-NEXT:    store i8* null, i8** [[TMP71]], align 8
2912 // CHECK10-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
2913 // CHECK10-NEXT:    [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64*
2914 // CHECK10-NEXT:    store i64 [[TMP1]], i64* [[TMP73]], align 8
2915 // CHECK10-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
2916 // CHECK10-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
2917 // CHECK10-NEXT:    store i64 [[TMP1]], i64* [[TMP75]], align 8
2918 // CHECK10-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 1
2919 // CHECK10-NEXT:    store i64 8, i64* [[TMP76]], align 8
2920 // CHECK10-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1
2921 // CHECK10-NEXT:    store i8* null, i8** [[TMP77]], align 8
2922 // CHECK10-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
2923 // CHECK10-NEXT:    [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32**
2924 // CHECK10-NEXT:    store i32* [[VLA]], i32** [[TMP79]], align 8
2925 // CHECK10-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
2926 // CHECK10-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32**
2927 // CHECK10-NEXT:    store i32* [[VLA]], i32** [[TMP81]], align 8
2928 // CHECK10-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
2929 // CHECK10-NEXT:    store i64 [[TMP65]], i64* [[TMP82]], align 8
2930 // CHECK10-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2
2931 // CHECK10-NEXT:    store i8* null, i8** [[TMP83]], align 8
2932 // CHECK10-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
2933 // CHECK10-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
2934 // CHECK10-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
2935 // CHECK10-NEXT:    [[TMP87:%.*]] = load i32, i32* [[N]], align 4
2936 // CHECK10-NEXT:    store i32 [[TMP87]], i32* [[DOTCAPTURE_EXPR_25]], align 4
2937 // CHECK10-NEXT:    [[TMP88:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
2938 // CHECK10-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP88]], 0
2939 // CHECK10-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
2940 // CHECK10-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
2941 // CHECK10-NEXT:    store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4
2942 // CHECK10-NEXT:    [[TMP89:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
2943 // CHECK10-NEXT:    [[ADD30:%.*]] = add nsw i32 [[TMP89]], 1
2944 // CHECK10-NEXT:    [[TMP90:%.*]] = zext i32 [[ADD30]] to i64
2945 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP90]])
2946 // CHECK10-NEXT:    [[TMP91:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP84]], i8** [[TMP85]], i64* [[TMP86]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2947 // CHECK10-NEXT:    [[TMP92:%.*]] = icmp ne i32 [[TMP91]], 0
2948 // CHECK10-NEXT:    br i1 [[TMP92]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]
2949 // CHECK10:       omp_offload.failed31:
2950 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP64]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
2951 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT32]]
2952 // CHECK10:       omp_offload.cont32:
2953 // CHECK10-NEXT:    [[TMP93:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2954 // CHECK10-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP93]])
2955 // CHECK10-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
2956 // CHECK10-NEXT:    [[TMP94:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2957 // CHECK10-NEXT:    call void @llvm.stackrestore(i8* [[TMP94]])
2958 // CHECK10-NEXT:    [[TMP95:%.*]] = load i32, i32* [[RETVAL]], align 4
2959 // CHECK10-NEXT:    ret i32 [[TMP95]]
2960 //
2961 //
2962 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100
2963 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2964 // CHECK10-NEXT:  entry:
2965 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2966 // CHECK10-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
2967 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
2968 // CHECK10-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
2969 // CHECK10-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2970 // CHECK10-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
2971 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2972 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2973 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2974 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
2975 // CHECK10-NEXT:    ret void
2976 //
2977 //
2978 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
2979 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2980 // CHECK10-NEXT:  entry:
2981 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2982 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2983 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
2984 // CHECK10-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
2985 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
2986 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2987 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2988 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2989 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2990 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
2991 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2992 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2993 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2994 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2995 // CHECK10-NEXT:    [[I3:%.*]] = alloca i32, align 4
2996 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2997 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2998 // CHECK10-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
2999 // CHECK10-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3000 // CHECK10-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
3001 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
3002 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3003 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3004 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
3005 // CHECK10-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
3006 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3007 // CHECK10-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3008 // CHECK10-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3009 // CHECK10-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3010 // CHECK10-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3011 // CHECK10-NEXT:    store i32 0, i32* [[I]], align 4
3012 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3013 // CHECK10-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3014 // CHECK10-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3015 // CHECK10:       omp.precond.then:
3016 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3017 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3018 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
3019 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3020 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3021 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3022 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3023 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3024 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3025 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3026 // CHECK10-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
3027 // CHECK10-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3028 // CHECK10:       cond.true:
3029 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3030 // CHECK10-NEXT:    br label [[COND_END:%.*]]
3031 // CHECK10:       cond.false:
3032 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3033 // CHECK10-NEXT:    br label [[COND_END]]
3034 // CHECK10:       cond.end:
3035 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3036 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3037 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3038 // CHECK10-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
3039 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3040 // CHECK10:       omp.inner.for.cond:
3041 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3042 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3043 // CHECK10-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3044 // CHECK10-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3045 // CHECK10:       omp.inner.for.body:
3046 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3047 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
3048 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3049 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
3050 // CHECK10-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I3]], align 4
3051 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
3052 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
3053 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3054 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3055 // CHECK10:       omp.body.continue:
3056 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3057 // CHECK10:       omp.inner.for.inc:
3058 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3059 // CHECK10-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
3060 // CHECK10-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
3061 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
3062 // CHECK10:       omp.inner.for.end:
3063 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3064 // CHECK10:       omp.loop.exit:
3065 // CHECK10-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3066 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
3067 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
3068 // CHECK10-NEXT:    br label [[OMP_PRECOND_END]]
3069 // CHECK10:       omp.precond.end:
3070 // CHECK10-NEXT:    ret void
3071 //
3072 //
3073 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105
3074 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3075 // CHECK10-NEXT:  entry:
3076 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
3077 // CHECK10-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
3078 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
3079 // CHECK10-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
3080 // CHECK10-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3081 // CHECK10-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
3082 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3083 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3084 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3085 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
3086 // CHECK10-NEXT:    ret void
3087 //
3088 //
3089 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
3090 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3091 // CHECK10-NEXT:  entry:
3092 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3093 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3094 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
3095 // CHECK10-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
3096 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
3097 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3098 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3099 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3100 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3101 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
3102 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3103 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3104 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3105 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3106 // CHECK10-NEXT:    [[I3:%.*]] = alloca i32, align 4
3107 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3108 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3109 // CHECK10-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
3110 // CHECK10-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3111 // CHECK10-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
3112 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
3113 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3114 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3115 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
3116 // CHECK10-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
3117 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3118 // CHECK10-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3119 // CHECK10-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3120 // CHECK10-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3121 // CHECK10-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3122 // CHECK10-NEXT:    store i32 0, i32* [[I]], align 4
3123 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3124 // CHECK10-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3125 // CHECK10-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3126 // CHECK10:       omp.precond.then:
3127 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3128 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3129 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
3130 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3131 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3132 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3133 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3134 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3135 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3136 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3137 // CHECK10-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
3138 // CHECK10-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3139 // CHECK10:       cond.true:
3140 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3141 // CHECK10-NEXT:    br label [[COND_END:%.*]]
3142 // CHECK10:       cond.false:
3143 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3144 // CHECK10-NEXT:    br label [[COND_END]]
3145 // CHECK10:       cond.end:
3146 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3147 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3148 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3149 // CHECK10-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
3150 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3151 // CHECK10:       omp.inner.for.cond:
3152 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3153 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3154 // CHECK10-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3155 // CHECK10-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3156 // CHECK10:       omp.inner.for.body:
3157 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3158 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
3159 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3160 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
3161 // CHECK10-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I3]], align 4
3162 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
3163 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
3164 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3165 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3166 // CHECK10:       omp.body.continue:
3167 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3168 // CHECK10:       omp.inner.for.inc:
3169 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3170 // CHECK10-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
3171 // CHECK10-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
3172 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
3173 // CHECK10:       omp.inner.for.end:
3174 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3175 // CHECK10:       omp.loop.exit:
3176 // CHECK10-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3177 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
3178 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
3179 // CHECK10-NEXT:    br label [[OMP_PRECOND_END]]
3180 // CHECK10:       omp.precond.end:
3181 // CHECK10-NEXT:    ret void
3182 //
3183 //
3184 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110
3185 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3186 // CHECK10-NEXT:  entry:
3187 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
3188 // CHECK10-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
3189 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
3190 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3191 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3192 // CHECK10-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
3193 // CHECK10-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3194 // CHECK10-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
3195 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3196 // CHECK10-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3197 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3198 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3199 // CHECK10-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
3200 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3201 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
3202 // CHECK10-NEXT:    store i32 [[TMP3]], i32* [[CONV1]], align 4
3203 // CHECK10-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3204 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
3205 // CHECK10-NEXT:    ret void
3206 //
3207 //
3208 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
3209 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
3210 // CHECK10-NEXT:  entry:
3211 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3212 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3213 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
3214 // CHECK10-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
3215 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
3216 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3217 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3218 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3219 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3220 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3221 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
3222 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3223 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3224 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3225 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3226 // CHECK10-NEXT:    [[I4:%.*]] = alloca i32, align 4
3227 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3228 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3229 // CHECK10-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
3230 // CHECK10-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3231 // CHECK10-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
3232 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3233 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
3234 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3235 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3236 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
3237 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
3238 // CHECK10-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3239 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3240 // CHECK10-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3241 // CHECK10-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3242 // CHECK10-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
3243 // CHECK10-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3244 // CHECK10-NEXT:    store i32 0, i32* [[I]], align 4
3245 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3246 // CHECK10-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3247 // CHECK10-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3248 // CHECK10:       omp.precond.then:
3249 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3250 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3251 // CHECK10-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
3252 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3253 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3254 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
3255 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3256 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
3257 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
3258 // CHECK10-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3259 // CHECK10:       omp.dispatch.cond:
3260 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3261 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3262 // CHECK10-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
3263 // CHECK10-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3264 // CHECK10:       cond.true:
3265 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3266 // CHECK10-NEXT:    br label [[COND_END:%.*]]
3267 // CHECK10:       cond.false:
3268 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3269 // CHECK10-NEXT:    br label [[COND_END]]
3270 // CHECK10:       cond.end:
3271 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
3272 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3273 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3274 // CHECK10-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
3275 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3276 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3277 // CHECK10-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
3278 // CHECK10-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3279 // CHECK10:       omp.dispatch.body:
3280 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3281 // CHECK10:       omp.inner.for.cond:
3282 // CHECK10-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3283 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
3284 // CHECK10-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
3285 // CHECK10-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3286 // CHECK10:       omp.inner.for.body:
3287 // CHECK10-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3288 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
3289 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3290 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !10
3291 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !10
3292 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
3293 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
3294 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
3295 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3296 // CHECK10:       omp.body.continue:
3297 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3298 // CHECK10:       omp.inner.for.inc:
3299 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3300 // CHECK10-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1
3301 // CHECK10-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3302 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3303 // CHECK10:       omp.inner.for.end:
3304 // CHECK10-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3305 // CHECK10:       omp.dispatch.inc:
3306 // CHECK10-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3307 // CHECK10-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3308 // CHECK10-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
3309 // CHECK10-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
3310 // CHECK10-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3311 // CHECK10-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3312 // CHECK10-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
3313 // CHECK10-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
3314 // CHECK10-NEXT:    br label [[OMP_DISPATCH_COND]]
3315 // CHECK10:       omp.dispatch.end:
3316 // CHECK10-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3317 // CHECK10-NEXT:    [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
3318 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
3319 // CHECK10-NEXT:    br label [[OMP_PRECOND_END]]
3320 // CHECK10:       omp.precond.end:
3321 // CHECK10-NEXT:    ret void
3322 //
3323 //
3324 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
3325 // CHECK10-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
3326 // CHECK10-NEXT:  entry:
3327 // CHECK10-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
3328 // CHECK10-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
3329 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3330 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3331 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3332 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3333 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
3334 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
3335 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
3336 // CHECK10-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
3337 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8
3338 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8
3339 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8
3340 // CHECK10-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
3341 // CHECK10-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3342 // CHECK10-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3343 // CHECK10-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
3344 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
3345 // CHECK10-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3346 // CHECK10-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
3347 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
3348 // CHECK10-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3349 // CHECK10-NEXT:    store i8* null, i8** [[TMP4]], align 8
3350 // CHECK10-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3351 // CHECK10-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3352 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3353 // CHECK10-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3354 // CHECK10-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
3355 // CHECK10-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3356 // CHECK10:       omp_offload.failed:
3357 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]]
3358 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3359 // CHECK10:       omp_offload.cont:
3360 // CHECK10-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
3361 // CHECK10-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
3362 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
3363 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
3364 // CHECK10-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
3365 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
3366 // CHECK10-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
3367 // CHECK10-NEXT:    store i8* null, i8** [[TMP13]], align 8
3368 // CHECK10-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
3369 // CHECK10-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
3370 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3371 // CHECK10-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3372 // CHECK10-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3373 // CHECK10-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
3374 // CHECK10:       omp_offload.failed5:
3375 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]]
3376 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
3377 // CHECK10:       omp_offload.cont6:
3378 // CHECK10-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
3379 // CHECK10-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
3380 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
3381 // CHECK10-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
3382 // CHECK10-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
3383 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
3384 // CHECK10-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
3385 // CHECK10-NEXT:    store i8* null, i8** [[TMP22]], align 8
3386 // CHECK10-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
3387 // CHECK10-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
3388 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3389 // CHECK10-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3390 // CHECK10-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3391 // CHECK10-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
3392 // CHECK10:       omp_offload.failed11:
3393 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]]
3394 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
3395 // CHECK10:       omp_offload.cont12:
3396 // CHECK10-NEXT:    ret i32 0
3397 //
3398 //
3399 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79
3400 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3401 // CHECK10-NEXT:  entry:
3402 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3403 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3404 // CHECK10-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3405 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3406 // CHECK10-NEXT:    ret void
3407 //
3408 //
3409 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5
3410 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3411 // CHECK10-NEXT:  entry:
3412 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3413 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3414 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3415 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3416 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3417 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3418 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3419 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3420 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3421 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
3422 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3423 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3424 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3425 // CHECK10-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3426 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3427 // CHECK10-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
3428 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3429 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3430 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3431 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3432 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3433 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3434 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3435 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3436 // CHECK10:       cond.true:
3437 // CHECK10-NEXT:    br label [[COND_END:%.*]]
3438 // CHECK10:       cond.false:
3439 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3440 // CHECK10-NEXT:    br label [[COND_END]]
3441 // CHECK10:       cond.end:
3442 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3443 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3444 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3445 // CHECK10-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3446 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3447 // CHECK10:       omp.inner.for.cond:
3448 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3449 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3450 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3451 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3452 // CHECK10:       omp.inner.for.body:
3453 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3454 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3455 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3456 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3457 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
3458 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
3459 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3460 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3461 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3462 // CHECK10:       omp.body.continue:
3463 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3464 // CHECK10:       omp.inner.for.inc:
3465 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3466 // CHECK10-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3467 // CHECK10-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3468 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
3469 // CHECK10:       omp.inner.for.end:
3470 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3471 // CHECK10:       omp.loop.exit:
3472 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3473 // CHECK10-NEXT:    ret void
3474 //
3475 //
3476 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
3477 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3478 // CHECK10-NEXT:  entry:
3479 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3480 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3481 // CHECK10-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3482 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3483 // CHECK10-NEXT:    ret void
3484 //
3485 //
3486 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7
3487 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3488 // CHECK10-NEXT:  entry:
3489 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3490 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3491 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3492 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3493 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3494 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3495 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3496 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3497 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3498 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
3499 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3500 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3501 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3502 // CHECK10-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3503 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3504 // CHECK10-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
3505 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3506 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3507 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3508 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3509 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3510 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3511 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3512 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3513 // CHECK10:       cond.true:
3514 // CHECK10-NEXT:    br label [[COND_END:%.*]]
3515 // CHECK10:       cond.false:
3516 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3517 // CHECK10-NEXT:    br label [[COND_END]]
3518 // CHECK10:       cond.end:
3519 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3520 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3521 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3522 // CHECK10-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3523 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3524 // CHECK10:       omp.inner.for.cond:
3525 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3526 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3527 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3528 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3529 // CHECK10:       omp.inner.for.body:
3530 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3531 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3532 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3533 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3534 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
3535 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
3536 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3537 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3538 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3539 // CHECK10:       omp.body.continue:
3540 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3541 // CHECK10:       omp.inner.for.inc:
3542 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3543 // CHECK10-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3544 // CHECK10-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3545 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
3546 // CHECK10:       omp.inner.for.end:
3547 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3548 // CHECK10:       omp.loop.exit:
3549 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3550 // CHECK10-NEXT:    ret void
3551 //
3552 //
3553 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89
3554 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3555 // CHECK10-NEXT:  entry:
3556 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3557 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3558 // CHECK10-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3559 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3560 // CHECK10-NEXT:    ret void
3561 //
3562 //
3563 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10
3564 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3565 // CHECK10-NEXT:  entry:
3566 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3567 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3568 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3569 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3570 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3571 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3572 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3573 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3574 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3575 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
3576 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3577 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3578 // CHECK10-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3579 // CHECK10-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3580 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3581 // CHECK10-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
3582 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3583 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3584 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3585 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3586 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
3587 // CHECK10-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3588 // CHECK10:       omp.dispatch.cond:
3589 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3590 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3591 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3592 // CHECK10:       cond.true:
3593 // CHECK10-NEXT:    br label [[COND_END:%.*]]
3594 // CHECK10:       cond.false:
3595 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3596 // CHECK10-NEXT:    br label [[COND_END]]
3597 // CHECK10:       cond.end:
3598 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3599 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3600 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3601 // CHECK10-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3602 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3603 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3604 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3605 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3606 // CHECK10:       omp.dispatch.body:
3607 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3608 // CHECK10:       omp.inner.for.cond:
3609 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3610 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
3611 // CHECK10-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3612 // CHECK10-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3613 // CHECK10:       omp.inner.for.body:
3614 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3615 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3616 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3617 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
3618 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
3619 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3620 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3621 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
3622 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3623 // CHECK10:       omp.body.continue:
3624 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3625 // CHECK10:       omp.inner.for.inc:
3626 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3627 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
3628 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3629 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3630 // CHECK10:       omp.inner.for.end:
3631 // CHECK10-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3632 // CHECK10:       omp.dispatch.inc:
3633 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3634 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3635 // CHECK10-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3636 // CHECK10-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
3637 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3638 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3639 // CHECK10-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
3640 // CHECK10-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
3641 // CHECK10-NEXT:    br label [[OMP_DISPATCH_COND]]
3642 // CHECK10:       omp.dispatch.end:
3643 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3644 // CHECK10-NEXT:    ret void
3645 //
3646 //
3647 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3648 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] {
3649 // CHECK10-NEXT:  entry:
3650 // CHECK10-NEXT:    call void @__tgt_register_requires(i64 1)
3651 // CHECK10-NEXT:    ret void
3652 //
3653 //
3654 // CHECK11-LABEL: define {{[^@]+}}@main
3655 // CHECK11-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
3656 // CHECK11-NEXT:  entry:
3657 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3658 // CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
3659 // CHECK11-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
3660 // CHECK11-NEXT:    [[N:%.*]] = alloca i32, align 4
3661 // CHECK11-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
3662 // CHECK11-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
3663 // CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
3664 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
3665 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
3666 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
3667 // CHECK11-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
3668 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3669 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3670 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3671 // CHECK11-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
3672 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
3673 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
3674 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
3675 // CHECK11-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
3676 // CHECK11-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
3677 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
3678 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
3679 // CHECK11-NEXT:    [[N_CASTED17:%.*]] = alloca i32, align 4
3680 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [3 x i8*], align 4
3681 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS19:%.*]] = alloca [3 x i8*], align 4
3682 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [3 x i8*], align 4
3683 // CHECK11-NEXT:    [[DOTOFFLOAD_SIZES21:%.*]] = alloca [3 x i64], align 4
3684 // CHECK11-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
3685 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
3686 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
3687 // CHECK11-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3688 // CHECK11-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3689 // CHECK11-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
3690 // CHECK11-NEXT:    store i32 100, i32* [[N]], align 4
3691 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3692 // CHECK11-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
3693 // CHECK11-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
3694 // CHECK11-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
3695 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
3696 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
3697 // CHECK11-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
3698 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
3699 // CHECK11-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
3700 // CHECK11-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
3701 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3702 // CHECK11-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
3703 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
3704 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3705 // CHECK11-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
3706 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
3707 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3708 // CHECK11-NEXT:    store i64 4, i64* [[TMP10]], align 4
3709 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3710 // CHECK11-NEXT:    store i8* null, i8** [[TMP11]], align 4
3711 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3712 // CHECK11-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
3713 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
3714 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3715 // CHECK11-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
3716 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
3717 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3718 // CHECK11-NEXT:    store i64 4, i64* [[TMP16]], align 4
3719 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3720 // CHECK11-NEXT:    store i8* null, i8** [[TMP17]], align 4
3721 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3722 // CHECK11-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
3723 // CHECK11-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
3724 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3725 // CHECK11-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
3726 // CHECK11-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
3727 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3728 // CHECK11-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
3729 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3730 // CHECK11-NEXT:    store i8* null, i8** [[TMP23]], align 4
3731 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3732 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3733 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3734 // CHECK11-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
3735 // CHECK11-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
3736 // CHECK11-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3737 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
3738 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3739 // CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3740 // CHECK11-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3741 // CHECK11-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3742 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
3743 // CHECK11-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
3744 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
3745 // CHECK11-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3746 // CHECK11-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
3747 // CHECK11-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3748 // CHECK11:       omp_offload.failed:
3749 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
3750 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3751 // CHECK11:       omp_offload.cont:
3752 // CHECK11-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
3753 // CHECK11-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
3754 // CHECK11-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
3755 // CHECK11-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
3756 // CHECK11-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
3757 // CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
3758 // CHECK11-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
3759 // CHECK11-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
3760 // CHECK11-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
3761 // CHECK11-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
3762 // CHECK11-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
3763 // CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
3764 // CHECK11-NEXT:    store i64 4, i64* [[TMP41]], align 4
3765 // CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
3766 // CHECK11-NEXT:    store i8* null, i8** [[TMP42]], align 4
3767 // CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
3768 // CHECK11-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
3769 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
3770 // CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
3771 // CHECK11-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
3772 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
3773 // CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
3774 // CHECK11-NEXT:    store i64 4, i64* [[TMP47]], align 4
3775 // CHECK11-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
3776 // CHECK11-NEXT:    store i8* null, i8** [[TMP48]], align 4
3777 // CHECK11-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
3778 // CHECK11-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
3779 // CHECK11-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
3780 // CHECK11-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
3781 // CHECK11-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
3782 // CHECK11-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
3783 // CHECK11-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
3784 // CHECK11-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
3785 // CHECK11-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
3786 // CHECK11-NEXT:    store i8* null, i8** [[TMP54]], align 4
3787 // CHECK11-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
3788 // CHECK11-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
3789 // CHECK11-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
3790 // CHECK11-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
3791 // CHECK11-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
3792 // CHECK11-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
3793 // CHECK11-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
3794 // CHECK11-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
3795 // CHECK11-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
3796 // CHECK11-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
3797 // CHECK11-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
3798 // CHECK11-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
3799 // CHECK11-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
3800 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP61]])
3801 // CHECK11-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3802 // CHECK11-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
3803 // CHECK11-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
3804 // CHECK11:       omp_offload.failed15:
3805 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
3806 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
3807 // CHECK11:       omp_offload.cont16:
3808 // CHECK11-NEXT:    [[TMP64:%.*]] = load i32, i32* [[N]], align 4
3809 // CHECK11-NEXT:    store i32 [[TMP64]], i32* [[N_CASTED17]], align 4
3810 // CHECK11-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N_CASTED17]], align 4
3811 // CHECK11-NEXT:    [[TMP66:%.*]] = mul nuw i32 [[TMP0]], 4
3812 // CHECK11-NEXT:    [[TMP67:%.*]] = sext i32 [[TMP66]] to i64
3813 // CHECK11-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
3814 // CHECK11-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i32*
3815 // CHECK11-NEXT:    store i32 [[TMP65]], i32* [[TMP69]], align 4
3816 // CHECK11-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
3817 // CHECK11-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
3818 // CHECK11-NEXT:    store i32 [[TMP65]], i32* [[TMP71]], align 4
3819 // CHECK11-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
3820 // CHECK11-NEXT:    store i64 4, i64* [[TMP72]], align 4
3821 // CHECK11-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
3822 // CHECK11-NEXT:    store i8* null, i8** [[TMP73]], align 4
3823 // CHECK11-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
3824 // CHECK11-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32*
3825 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[TMP75]], align 4
3826 // CHECK11-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
3827 // CHECK11-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
3828 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[TMP77]], align 4
3829 // CHECK11-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
3830 // CHECK11-NEXT:    store i64 4, i64* [[TMP78]], align 4
3831 // CHECK11-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
3832 // CHECK11-NEXT:    store i8* null, i8** [[TMP79]], align 4
3833 // CHECK11-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
3834 // CHECK11-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32**
3835 // CHECK11-NEXT:    store i32* [[VLA]], i32** [[TMP81]], align 4
3836 // CHECK11-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
3837 // CHECK11-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32**
3838 // CHECK11-NEXT:    store i32* [[VLA]], i32** [[TMP83]], align 4
3839 // CHECK11-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
3840 // CHECK11-NEXT:    store i64 [[TMP67]], i64* [[TMP84]], align 4
3841 // CHECK11-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
3842 // CHECK11-NEXT:    store i8* null, i8** [[TMP85]], align 4
3843 // CHECK11-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
3844 // CHECK11-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
3845 // CHECK11-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
3846 // CHECK11-NEXT:    [[TMP89:%.*]] = load i32, i32* [[N]], align 4
3847 // CHECK11-NEXT:    store i32 [[TMP89]], i32* [[DOTCAPTURE_EXPR_23]], align 4
3848 // CHECK11-NEXT:    [[TMP90:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
3849 // CHECK11-NEXT:    [[SUB25:%.*]] = sub nsw i32 [[TMP90]], 0
3850 // CHECK11-NEXT:    [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
3851 // CHECK11-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
3852 // CHECK11-NEXT:    store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
3853 // CHECK11-NEXT:    [[TMP91:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
3854 // CHECK11-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP91]], 1
3855 // CHECK11-NEXT:    [[TMP92:%.*]] = zext i32 [[ADD28]] to i64
3856 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP92]])
3857 // CHECK11-NEXT:    [[TMP93:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP86]], i8** [[TMP87]], i64* [[TMP88]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3858 // CHECK11-NEXT:    [[TMP94:%.*]] = icmp ne i32 [[TMP93]], 0
3859 // CHECK11-NEXT:    br i1 [[TMP94]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
3860 // CHECK11:       omp_offload.failed29:
3861 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP65]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
3862 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
3863 // CHECK11:       omp_offload.cont30:
3864 // CHECK11-NEXT:    [[TMP95:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
3865 // CHECK11-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP95]])
3866 // CHECK11-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
3867 // CHECK11-NEXT:    [[TMP96:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
3868 // CHECK11-NEXT:    call void @llvm.stackrestore(i8* [[TMP96]])
3869 // CHECK11-NEXT:    [[TMP97:%.*]] = load i32, i32* [[RETVAL]], align 4
3870 // CHECK11-NEXT:    ret i32 [[TMP97]]
3871 //
3872 //
3873 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100
3874 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
3875 // CHECK11-NEXT:  entry:
3876 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3877 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
3878 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
3879 // CHECK11-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3880 // CHECK11-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3881 // CHECK11-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
3882 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3883 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3884 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
3885 // CHECK11-NEXT:    ret void
3886 //
3887 //
3888 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
3889 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3890 // CHECK11-NEXT:  entry:
3891 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3892 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3893 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
3894 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
3895 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
3896 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3897 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3898 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3899 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3900 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
3901 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3902 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3903 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3904 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3905 // CHECK11-NEXT:    [[I3:%.*]] = alloca i32, align 4
3906 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3907 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3908 // CHECK11-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
3909 // CHECK11-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3910 // CHECK11-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
3911 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
3912 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3913 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3914 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
3915 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
3916 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3917 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3918 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3919 // CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3920 // CHECK11-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3921 // CHECK11-NEXT:    store i32 0, i32* [[I]], align 4
3922 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3923 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3924 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3925 // CHECK11:       omp.precond.then:
3926 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3927 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3928 // CHECK11-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
3929 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3930 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3931 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3932 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3933 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3934 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3935 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3936 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
3937 // CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3938 // CHECK11:       cond.true:
3939 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3940 // CHECK11-NEXT:    br label [[COND_END:%.*]]
3941 // CHECK11:       cond.false:
3942 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3943 // CHECK11-NEXT:    br label [[COND_END]]
3944 // CHECK11:       cond.end:
3945 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3946 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3947 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3948 // CHECK11-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
3949 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3950 // CHECK11:       omp.inner.for.cond:
3951 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3952 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3953 // CHECK11-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3954 // CHECK11-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3955 // CHECK11:       omp.inner.for.body:
3956 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3957 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
3958 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3959 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
3960 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I3]], align 4
3961 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]]
3962 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3963 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3964 // CHECK11:       omp.body.continue:
3965 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3966 // CHECK11:       omp.inner.for.inc:
3967 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3968 // CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
3969 // CHECK11-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
3970 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]
3971 // CHECK11:       omp.inner.for.end:
3972 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3973 // CHECK11:       omp.loop.exit:
3974 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3975 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
3976 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
3977 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
3978 // CHECK11:       omp.precond.end:
3979 // CHECK11-NEXT:    ret void
3980 //
3981 //
3982 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105
3983 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3984 // CHECK11-NEXT:  entry:
3985 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3986 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
3987 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
3988 // CHECK11-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3989 // CHECK11-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3990 // CHECK11-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
3991 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3992 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3993 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
3994 // CHECK11-NEXT:    ret void
3995 //
3996 //
3997 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
3998 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3999 // CHECK11-NEXT:  entry:
4000 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4001 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4002 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
4003 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
4004 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
4005 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4006 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4007 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4008 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4009 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
4010 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4011 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4012 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4013 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4014 // CHECK11-NEXT:    [[I3:%.*]] = alloca i32, align 4
4015 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4016 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4017 // CHECK11-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
4018 // CHECK11-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4019 // CHECK11-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
4020 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
4021 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4022 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4023 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
4024 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
4025 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4026 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4027 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4028 // CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4029 // CHECK11-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4030 // CHECK11-NEXT:    store i32 0, i32* [[I]], align 4
4031 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4032 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4033 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4034 // CHECK11:       omp.precond.then:
4035 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4036 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4037 // CHECK11-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4038 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4039 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4040 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4041 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4042 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4043 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4044 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4045 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4046 // CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4047 // CHECK11:       cond.true:
4048 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4049 // CHECK11-NEXT:    br label [[COND_END:%.*]]
4050 // CHECK11:       cond.false:
4051 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4052 // CHECK11-NEXT:    br label [[COND_END]]
4053 // CHECK11:       cond.end:
4054 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4055 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4056 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4057 // CHECK11-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4058 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4059 // CHECK11:       omp.inner.for.cond:
4060 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4061 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4062 // CHECK11-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4063 // CHECK11-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4064 // CHECK11:       omp.inner.for.body:
4065 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4066 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
4067 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4068 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
4069 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I3]], align 4
4070 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]]
4071 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4072 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4073 // CHECK11:       omp.body.continue:
4074 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4075 // CHECK11:       omp.inner.for.inc:
4076 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4077 // CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
4078 // CHECK11-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
4079 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]
4080 // CHECK11:       omp.inner.for.end:
4081 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4082 // CHECK11:       omp.loop.exit:
4083 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4084 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
4085 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
4086 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
4087 // CHECK11:       omp.precond.end:
4088 // CHECK11-NEXT:    ret void
4089 //
4090 //
4091 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110
4092 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4093 // CHECK11-NEXT:  entry:
4094 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4095 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
4096 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
4097 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4098 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4099 // CHECK11-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4100 // CHECK11-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4101 // CHECK11-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
4102 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4103 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4104 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4105 // CHECK11-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4106 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4107 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4108 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4109 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
4110 // CHECK11-NEXT:    ret void
4111 //
4112 //
4113 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
4114 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
4115 // CHECK11-NEXT:  entry:
4116 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4117 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4118 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
4119 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
4120 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
4121 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4122 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4123 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4124 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4125 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4126 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
4127 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4128 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4129 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4130 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4131 // CHECK11-NEXT:    [[I4:%.*]] = alloca i32, align 4
4132 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4133 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4134 // CHECK11-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
4135 // CHECK11-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4136 // CHECK11-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
4137 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4138 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
4139 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4140 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4141 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
4142 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4143 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4144 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4145 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4146 // CHECK11-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
4147 // CHECK11-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4148 // CHECK11-NEXT:    store i32 0, i32* [[I]], align 4
4149 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4150 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4151 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4152 // CHECK11:       omp.precond.then:
4153 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4154 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4155 // CHECK11-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4156 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4157 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4158 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4159 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4160 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
4161 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
4162 // CHECK11-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4163 // CHECK11:       omp.dispatch.cond:
4164 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4165 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4166 // CHECK11-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
4167 // CHECK11-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4168 // CHECK11:       cond.true:
4169 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4170 // CHECK11-NEXT:    br label [[COND_END:%.*]]
4171 // CHECK11:       cond.false:
4172 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4173 // CHECK11-NEXT:    br label [[COND_END]]
4174 // CHECK11:       cond.end:
4175 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
4176 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4177 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4178 // CHECK11-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
4179 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4180 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4181 // CHECK11-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
4182 // CHECK11-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4183 // CHECK11:       omp.dispatch.body:
4184 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4185 // CHECK11:       omp.inner.for.cond:
4186 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
4187 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
4188 // CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
4189 // CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4190 // CHECK11:       omp.inner.for.body:
4191 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
4192 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
4193 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4194 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !11
4195 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !11
4196 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
4197 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
4198 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4199 // CHECK11:       omp.body.continue:
4200 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4201 // CHECK11:       omp.inner.for.inc:
4202 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
4203 // CHECK11-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1
4204 // CHECK11-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
4205 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4206 // CHECK11:       omp.inner.for.end:
4207 // CHECK11-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4208 // CHECK11:       omp.dispatch.inc:
4209 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4210 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4211 // CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
4212 // CHECK11-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
4213 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4214 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4215 // CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
4216 // CHECK11-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
4217 // CHECK11-NEXT:    br label [[OMP_DISPATCH_COND]]
4218 // CHECK11:       omp.dispatch.end:
4219 // CHECK11-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4220 // CHECK11-NEXT:    [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
4221 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
4222 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
4223 // CHECK11:       omp.precond.end:
4224 // CHECK11-NEXT:    ret void
4225 //
4226 //
4227 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
4228 // CHECK11-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
4229 // CHECK11-NEXT:  entry:
4230 // CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
4231 // CHECK11-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
4232 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
4233 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
4234 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
4235 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4236 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
4237 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
4238 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
4239 // CHECK11-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
4240 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4
4241 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4
4242 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4
4243 // CHECK11-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
4244 // CHECK11-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4245 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4246 // CHECK11-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
4247 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
4248 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4249 // CHECK11-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
4250 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
4251 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4252 // CHECK11-NEXT:    store i8* null, i8** [[TMP4]], align 4
4253 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4254 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4255 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4256 // CHECK11-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4257 // CHECK11-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
4258 // CHECK11-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4259 // CHECK11:       omp_offload.failed:
4260 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]]
4261 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4262 // CHECK11:       omp_offload.cont:
4263 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
4264 // CHECK11-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
4265 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
4266 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
4267 // CHECK11-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
4268 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
4269 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
4270 // CHECK11-NEXT:    store i8* null, i8** [[TMP13]], align 4
4271 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
4272 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
4273 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4274 // CHECK11-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4275 // CHECK11-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4276 // CHECK11-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
4277 // CHECK11:       omp_offload.failed5:
4278 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]]
4279 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
4280 // CHECK11:       omp_offload.cont6:
4281 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
4282 // CHECK11-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
4283 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
4284 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
4285 // CHECK11-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
4286 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
4287 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
4288 // CHECK11-NEXT:    store i8* null, i8** [[TMP22]], align 4
4289 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
4290 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
4291 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4292 // CHECK11-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4293 // CHECK11-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4294 // CHECK11-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
4295 // CHECK11:       omp_offload.failed11:
4296 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]]
4297 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
4298 // CHECK11:       omp_offload.cont12:
4299 // CHECK11-NEXT:    ret i32 0
4300 //
4301 //
4302 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79
4303 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4304 // CHECK11-NEXT:  entry:
4305 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4306 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4307 // CHECK11-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4308 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
4309 // CHECK11-NEXT:    ret void
4310 //
4311 //
4312 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5
4313 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4314 // CHECK11-NEXT:  entry:
4315 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4316 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4317 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4318 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4319 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4320 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4321 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4322 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4323 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4324 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
4325 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4326 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4327 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4328 // CHECK11-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4329 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4330 // CHECK11-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
4331 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4332 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4333 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4334 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4335 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4336 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4337 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
4338 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4339 // CHECK11:       cond.true:
4340 // CHECK11-NEXT:    br label [[COND_END:%.*]]
4341 // CHECK11:       cond.false:
4342 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4343 // CHECK11-NEXT:    br label [[COND_END]]
4344 // CHECK11:       cond.end:
4345 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4346 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4347 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4348 // CHECK11-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4349 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4350 // CHECK11:       omp.inner.for.cond:
4351 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4352 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4353 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4354 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4355 // CHECK11:       omp.inner.for.body:
4356 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4357 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4358 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4359 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4360 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
4361 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
4362 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4363 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4364 // CHECK11:       omp.body.continue:
4365 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4366 // CHECK11:       omp.inner.for.inc:
4367 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4368 // CHECK11-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
4369 // CHECK11-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
4370 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]
4371 // CHECK11:       omp.inner.for.end:
4372 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4373 // CHECK11:       omp.loop.exit:
4374 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4375 // CHECK11-NEXT:    ret void
4376 //
4377 //
4378 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
4379 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4380 // CHECK11-NEXT:  entry:
4381 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4382 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4383 // CHECK11-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4384 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
4385 // CHECK11-NEXT:    ret void
4386 //
4387 //
4388 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7
4389 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4390 // CHECK11-NEXT:  entry:
4391 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4392 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4393 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4394 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4395 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4396 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4397 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4398 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4399 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4400 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
4401 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4402 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4403 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4404 // CHECK11-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4405 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4406 // CHECK11-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
4407 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4408 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4409 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4410 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4411 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4412 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4413 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
4414 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4415 // CHECK11:       cond.true:
4416 // CHECK11-NEXT:    br label [[COND_END:%.*]]
4417 // CHECK11:       cond.false:
4418 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4419 // CHECK11-NEXT:    br label [[COND_END]]
4420 // CHECK11:       cond.end:
4421 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4422 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4423 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4424 // CHECK11-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4425 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4426 // CHECK11:       omp.inner.for.cond:
4427 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4428 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4429 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4430 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4431 // CHECK11:       omp.inner.for.body:
4432 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4433 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4434 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4435 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4436 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
4437 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
4438 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4439 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4440 // CHECK11:       omp.body.continue:
4441 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4442 // CHECK11:       omp.inner.for.inc:
4443 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4444 // CHECK11-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
4445 // CHECK11-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
4446 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]
4447 // CHECK11:       omp.inner.for.end:
4448 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4449 // CHECK11:       omp.loop.exit:
4450 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4451 // CHECK11-NEXT:    ret void
4452 //
4453 //
4454 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89
4455 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4456 // CHECK11-NEXT:  entry:
4457 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4458 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4459 // CHECK11-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4460 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
4461 // CHECK11-NEXT:    ret void
4462 //
4463 //
4464 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10
4465 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4466 // CHECK11-NEXT:  entry:
4467 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4468 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4469 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4470 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4471 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4472 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4473 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4474 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4475 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4476 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
4477 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4478 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4479 // CHECK11-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4480 // CHECK11-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4481 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4482 // CHECK11-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
4483 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4484 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4485 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4486 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4487 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
4488 // CHECK11-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4489 // CHECK11:       omp.dispatch.cond:
4490 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4491 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
4492 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4493 // CHECK11:       cond.true:
4494 // CHECK11-NEXT:    br label [[COND_END:%.*]]
4495 // CHECK11:       cond.false:
4496 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4497 // CHECK11-NEXT:    br label [[COND_END]]
4498 // CHECK11:       cond.end:
4499 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4500 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4501 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4502 // CHECK11-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4503 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4504 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4505 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4506 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4507 // CHECK11:       omp.dispatch.body:
4508 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4509 // CHECK11:       omp.inner.for.cond:
4510 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4511 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
4512 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4513 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4514 // CHECK11:       omp.inner.for.body:
4515 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4516 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4517 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4518 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
4519 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
4520 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
4521 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
4522 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4523 // CHECK11:       omp.body.continue:
4524 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4525 // CHECK11:       omp.inner.for.inc:
4526 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4527 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4528 // CHECK11-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4529 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
4530 // CHECK11:       omp.inner.for.end:
4531 // CHECK11-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4532 // CHECK11:       omp.dispatch.inc:
4533 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4534 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4535 // CHECK11-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
4536 // CHECK11-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
4537 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4538 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4539 // CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
4540 // CHECK11-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
4541 // CHECK11-NEXT:    br label [[OMP_DISPATCH_COND]]
4542 // CHECK11:       omp.dispatch.end:
4543 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4544 // CHECK11-NEXT:    ret void
4545 //
4546 //
4547 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4548 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] {
4549 // CHECK11-NEXT:  entry:
4550 // CHECK11-NEXT:    call void @__tgt_register_requires(i64 1)
4551 // CHECK11-NEXT:    ret void
4552 //
4553 //
4554 // CHECK12-LABEL: define {{[^@]+}}@main
4555 // CHECK12-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4556 // CHECK12-NEXT:  entry:
4557 // CHECK12-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4558 // CHECK12-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
4559 // CHECK12-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
4560 // CHECK12-NEXT:    [[N:%.*]] = alloca i32, align 4
4561 // CHECK12-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
4562 // CHECK12-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
4563 // CHECK12-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
4564 // CHECK12-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4565 // CHECK12-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4566 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4567 // CHECK12-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
4568 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4569 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4570 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4571 // CHECK12-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
4572 // CHECK12-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
4573 // CHECK12-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
4574 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
4575 // CHECK12-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
4576 // CHECK12-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
4577 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
4578 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
4579 // CHECK12-NEXT:    [[N_CASTED17:%.*]] = alloca i32, align 4
4580 // CHECK12-NEXT:    [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [3 x i8*], align 4
4581 // CHECK12-NEXT:    [[DOTOFFLOAD_PTRS19:%.*]] = alloca [3 x i8*], align 4
4582 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [3 x i8*], align 4
4583 // CHECK12-NEXT:    [[DOTOFFLOAD_SIZES21:%.*]] = alloca [3 x i64], align 4
4584 // CHECK12-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
4585 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
4586 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
4587 // CHECK12-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4588 // CHECK12-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4589 // CHECK12-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
4590 // CHECK12-NEXT:    store i32 100, i32* [[N]], align 4
4591 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4592 // CHECK12-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
4593 // CHECK12-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
4594 // CHECK12-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
4595 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
4596 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
4597 // CHECK12-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
4598 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
4599 // CHECK12-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
4600 // CHECK12-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
4601 // CHECK12-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4602 // CHECK12-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
4603 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
4604 // CHECK12-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4605 // CHECK12-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
4606 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
4607 // CHECK12-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4608 // CHECK12-NEXT:    store i64 4, i64* [[TMP10]], align 4
4609 // CHECK12-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4610 // CHECK12-NEXT:    store i8* null, i8** [[TMP11]], align 4
4611 // CHECK12-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4612 // CHECK12-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
4613 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
4614 // CHECK12-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4615 // CHECK12-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
4616 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
4617 // CHECK12-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4618 // CHECK12-NEXT:    store i64 4, i64* [[TMP16]], align 4
4619 // CHECK12-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4620 // CHECK12-NEXT:    store i8* null, i8** [[TMP17]], align 4
4621 // CHECK12-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4622 // CHECK12-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
4623 // CHECK12-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
4624 // CHECK12-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4625 // CHECK12-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
4626 // CHECK12-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
4627 // CHECK12-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4628 // CHECK12-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
4629 // CHECK12-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4630 // CHECK12-NEXT:    store i8* null, i8** [[TMP23]], align 4
4631 // CHECK12-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4632 // CHECK12-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4633 // CHECK12-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4634 // CHECK12-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
4635 // CHECK12-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
4636 // CHECK12-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4637 // CHECK12-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
4638 // CHECK12-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4639 // CHECK12-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4640 // CHECK12-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4641 // CHECK12-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4642 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
4643 // CHECK12-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
4644 // CHECK12-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
4645 // CHECK12-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4646 // CHECK12-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
4647 // CHECK12-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4648 // CHECK12:       omp_offload.failed:
4649 // CHECK12-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
4650 // CHECK12-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4651 // CHECK12:       omp_offload.cont:
4652 // CHECK12-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
4653 // CHECK12-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
4654 // CHECK12-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
4655 // CHECK12-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
4656 // CHECK12-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
4657 // CHECK12-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4658 // CHECK12-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
4659 // CHECK12-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
4660 // CHECK12-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4661 // CHECK12-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
4662 // CHECK12-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
4663 // CHECK12-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
4664 // CHECK12-NEXT:    store i64 4, i64* [[TMP41]], align 4
4665 // CHECK12-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
4666 // CHECK12-NEXT:    store i8* null, i8** [[TMP42]], align 4
4667 // CHECK12-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
4668 // CHECK12-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
4669 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
4670 // CHECK12-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
4671 // CHECK12-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
4672 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
4673 // CHECK12-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
4674 // CHECK12-NEXT:    store i64 4, i64* [[TMP47]], align 4
4675 // CHECK12-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
4676 // CHECK12-NEXT:    store i8* null, i8** [[TMP48]], align 4
4677 // CHECK12-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
4678 // CHECK12-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
4679 // CHECK12-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
4680 // CHECK12-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
4681 // CHECK12-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
4682 // CHECK12-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
4683 // CHECK12-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
4684 // CHECK12-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
4685 // CHECK12-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
4686 // CHECK12-NEXT:    store i8* null, i8** [[TMP54]], align 4
4687 // CHECK12-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4688 // CHECK12-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4689 // CHECK12-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
4690 // CHECK12-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
4691 // CHECK12-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
4692 // CHECK12-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
4693 // CHECK12-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
4694 // CHECK12-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
4695 // CHECK12-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
4696 // CHECK12-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
4697 // CHECK12-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
4698 // CHECK12-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
4699 // CHECK12-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
4700 // CHECK12-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP61]])
4701 // CHECK12-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4702 // CHECK12-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
4703 // CHECK12-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
4704 // CHECK12:       omp_offload.failed15:
4705 // CHECK12-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
4706 // CHECK12-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
4707 // CHECK12:       omp_offload.cont16:
4708 // CHECK12-NEXT:    [[TMP64:%.*]] = load i32, i32* [[N]], align 4
4709 // CHECK12-NEXT:    store i32 [[TMP64]], i32* [[N_CASTED17]], align 4
4710 // CHECK12-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N_CASTED17]], align 4
4711 // CHECK12-NEXT:    [[TMP66:%.*]] = mul nuw i32 [[TMP0]], 4
4712 // CHECK12-NEXT:    [[TMP67:%.*]] = sext i32 [[TMP66]] to i64
4713 // CHECK12-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
4714 // CHECK12-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i32*
4715 // CHECK12-NEXT:    store i32 [[TMP65]], i32* [[TMP69]], align 4
4716 // CHECK12-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
4717 // CHECK12-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
4718 // CHECK12-NEXT:    store i32 [[TMP65]], i32* [[TMP71]], align 4
4719 // CHECK12-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
4720 // CHECK12-NEXT:    store i64 4, i64* [[TMP72]], align 4
4721 // CHECK12-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
4722 // CHECK12-NEXT:    store i8* null, i8** [[TMP73]], align 4
4723 // CHECK12-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
4724 // CHECK12-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32*
4725 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[TMP75]], align 4
4726 // CHECK12-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
4727 // CHECK12-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
4728 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[TMP77]], align 4
4729 // CHECK12-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
4730 // CHECK12-NEXT:    store i64 4, i64* [[TMP78]], align 4
4731 // CHECK12-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
4732 // CHECK12-NEXT:    store i8* null, i8** [[TMP79]], align 4
4733 // CHECK12-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
4734 // CHECK12-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32**
4735 // CHECK12-NEXT:    store i32* [[VLA]], i32** [[TMP81]], align 4
4736 // CHECK12-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
4737 // CHECK12-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32**
4738 // CHECK12-NEXT:    store i32* [[VLA]], i32** [[TMP83]], align 4
4739 // CHECK12-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
4740 // CHECK12-NEXT:    store i64 [[TMP67]], i64* [[TMP84]], align 4
4741 // CHECK12-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
4742 // CHECK12-NEXT:    store i8* null, i8** [[TMP85]], align 4
4743 // CHECK12-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
4744 // CHECK12-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
4745 // CHECK12-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
4746 // CHECK12-NEXT:    [[TMP89:%.*]] = load i32, i32* [[N]], align 4
4747 // CHECK12-NEXT:    store i32 [[TMP89]], i32* [[DOTCAPTURE_EXPR_23]], align 4
4748 // CHECK12-NEXT:    [[TMP90:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
4749 // CHECK12-NEXT:    [[SUB25:%.*]] = sub nsw i32 [[TMP90]], 0
4750 // CHECK12-NEXT:    [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
4751 // CHECK12-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
4752 // CHECK12-NEXT:    store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
4753 // CHECK12-NEXT:    [[TMP91:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
4754 // CHECK12-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP91]], 1
4755 // CHECK12-NEXT:    [[TMP92:%.*]] = zext i32 [[ADD28]] to i64
4756 // CHECK12-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP92]])
4757 // CHECK12-NEXT:    [[TMP93:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP86]], i8** [[TMP87]], i64* [[TMP88]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4758 // CHECK12-NEXT:    [[TMP94:%.*]] = icmp ne i32 [[TMP93]], 0
4759 // CHECK12-NEXT:    br i1 [[TMP94]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
4760 // CHECK12:       omp_offload.failed29:
4761 // CHECK12-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP65]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
4762 // CHECK12-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
4763 // CHECK12:       omp_offload.cont30:
4764 // CHECK12-NEXT:    [[TMP95:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
4765 // CHECK12-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP95]])
4766 // CHECK12-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
4767 // CHECK12-NEXT:    [[TMP96:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
4768 // CHECK12-NEXT:    call void @llvm.stackrestore(i8* [[TMP96]])
4769 // CHECK12-NEXT:    [[TMP97:%.*]] = load i32, i32* [[RETVAL]], align 4
4770 // CHECK12-NEXT:    ret i32 [[TMP97]]
4771 //
4772 //
4773 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100
4774 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
4775 // CHECK12-NEXT:  entry:
4776 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4777 // CHECK12-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
4778 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
4779 // CHECK12-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4780 // CHECK12-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4781 // CHECK12-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
4782 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4783 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4784 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
4785 // CHECK12-NEXT:    ret void
4786 //
4787 //
4788 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
4789 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4790 // CHECK12-NEXT:  entry:
4791 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4792 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4793 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
4794 // CHECK12-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
4795 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
4796 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4797 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4798 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4799 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4800 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
4801 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4802 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4803 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4804 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4805 // CHECK12-NEXT:    [[I3:%.*]] = alloca i32, align 4
4806 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4807 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4808 // CHECK12-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
4809 // CHECK12-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4810 // CHECK12-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
4811 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
4812 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4813 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4814 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
4815 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
4816 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4817 // CHECK12-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4818 // CHECK12-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4819 // CHECK12-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4820 // CHECK12-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4821 // CHECK12-NEXT:    store i32 0, i32* [[I]], align 4
4822 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4823 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4824 // CHECK12-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4825 // CHECK12:       omp.precond.then:
4826 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4827 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4828 // CHECK12-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4829 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4830 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4831 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4832 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4833 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4834 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4835 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4836 // CHECK12-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4837 // CHECK12-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4838 // CHECK12:       cond.true:
4839 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4840 // CHECK12-NEXT:    br label [[COND_END:%.*]]
4841 // CHECK12:       cond.false:
4842 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4843 // CHECK12-NEXT:    br label [[COND_END]]
4844 // CHECK12:       cond.end:
4845 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4846 // CHECK12-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4847 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4848 // CHECK12-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4849 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4850 // CHECK12:       omp.inner.for.cond:
4851 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4852 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4853 // CHECK12-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4854 // CHECK12-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4855 // CHECK12:       omp.inner.for.body:
4856 // CHECK12-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4857 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
4858 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4859 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
4860 // CHECK12-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I3]], align 4
4861 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]]
4862 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4863 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4864 // CHECK12:       omp.body.continue:
4865 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4866 // CHECK12:       omp.inner.for.inc:
4867 // CHECK12-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4868 // CHECK12-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
4869 // CHECK12-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
4870 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]]
4871 // CHECK12:       omp.inner.for.end:
4872 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4873 // CHECK12:       omp.loop.exit:
4874 // CHECK12-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4875 // CHECK12-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
4876 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
4877 // CHECK12-NEXT:    br label [[OMP_PRECOND_END]]
4878 // CHECK12:       omp.precond.end:
4879 // CHECK12-NEXT:    ret void
4880 //
4881 //
4882 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105
4883 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4884 // CHECK12-NEXT:  entry:
4885 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4886 // CHECK12-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
4887 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
4888 // CHECK12-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4889 // CHECK12-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4890 // CHECK12-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
4891 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4892 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4893 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
4894 // CHECK12-NEXT:    ret void
4895 //
4896 //
4897 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
4898 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4899 // CHECK12-NEXT:  entry:
4900 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4901 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4902 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
4903 // CHECK12-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
4904 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
4905 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4906 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4907 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4908 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4909 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
4910 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4911 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4912 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4913 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4914 // CHECK12-NEXT:    [[I3:%.*]] = alloca i32, align 4
4915 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4916 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4917 // CHECK12-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
4918 // CHECK12-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4919 // CHECK12-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
4920 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
4921 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4922 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4923 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
4924 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
4925 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4926 // CHECK12-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4927 // CHECK12-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4928 // CHECK12-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4929 // CHECK12-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4930 // CHECK12-NEXT:    store i32 0, i32* [[I]], align 4
4931 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4932 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4933 // CHECK12-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4934 // CHECK12:       omp.precond.then:
4935 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4936 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4937 // CHECK12-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4938 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4939 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4940 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4941 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4942 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4943 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4944 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4945 // CHECK12-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4946 // CHECK12-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4947 // CHECK12:       cond.true:
4948 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4949 // CHECK12-NEXT:    br label [[COND_END:%.*]]
4950 // CHECK12:       cond.false:
4951 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4952 // CHECK12-NEXT:    br label [[COND_END]]
4953 // CHECK12:       cond.end:
4954 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4955 // CHECK12-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4956 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4957 // CHECK12-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4958 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4959 // CHECK12:       omp.inner.for.cond:
4960 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4961 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4962 // CHECK12-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4963 // CHECK12-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4964 // CHECK12:       omp.inner.for.body:
4965 // CHECK12-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4966 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
4967 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4968 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
4969 // CHECK12-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I3]], align 4
4970 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]]
4971 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4972 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4973 // CHECK12:       omp.body.continue:
4974 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4975 // CHECK12:       omp.inner.for.inc:
4976 // CHECK12-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4977 // CHECK12-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
4978 // CHECK12-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
4979 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]]
4980 // CHECK12:       omp.inner.for.end:
4981 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4982 // CHECK12:       omp.loop.exit:
4983 // CHECK12-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4984 // CHECK12-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
4985 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
4986 // CHECK12-NEXT:    br label [[OMP_PRECOND_END]]
4987 // CHECK12:       omp.precond.end:
4988 // CHECK12-NEXT:    ret void
4989 //
4990 //
4991 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110
4992 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4993 // CHECK12-NEXT:  entry:
4994 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4995 // CHECK12-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
4996 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
4997 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4998 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4999 // CHECK12-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
5000 // CHECK12-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
5001 // CHECK12-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
5002 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
5003 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
5004 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
5005 // CHECK12-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5006 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5007 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
5008 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
5009 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
5010 // CHECK12-NEXT:    ret void
5011 //
5012 //
5013 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
5014 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5015 // CHECK12-NEXT:  entry:
5016 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5017 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5018 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
5019 // CHECK12-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
5020 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
5021 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5022 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5023 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5024 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5025 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5026 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
5027 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5028 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5029 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5030 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5031 // CHECK12-NEXT:    [[I4:%.*]] = alloca i32, align 4
5032 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5033 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5034 // CHECK12-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
5035 // CHECK12-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
5036 // CHECK12-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
5037 // CHECK12-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5038 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
5039 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
5040 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
5041 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
5042 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5043 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5044 // CHECK12-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5045 // CHECK12-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5046 // CHECK12-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5047 // CHECK12-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5048 // CHECK12-NEXT:    store i32 0, i32* [[I]], align 4
5049 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5050 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5051 // CHECK12-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5052 // CHECK12:       omp.precond.then:
5053 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5054 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5055 // CHECK12-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
5056 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5057 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5058 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5059 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5060 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
5061 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
5062 // CHECK12-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5063 // CHECK12:       omp.dispatch.cond:
5064 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5065 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5066 // CHECK12-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
5067 // CHECK12-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5068 // CHECK12:       cond.true:
5069 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5070 // CHECK12-NEXT:    br label [[COND_END:%.*]]
5071 // CHECK12:       cond.false:
5072 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5073 // CHECK12-NEXT:    br label [[COND_END]]
5074 // CHECK12:       cond.end:
5075 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
5076 // CHECK12-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5077 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5078 // CHECK12-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
5079 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5080 // CHECK12-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5081 // CHECK12-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
5082 // CHECK12-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5083 // CHECK12:       omp.dispatch.body:
5084 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5085 // CHECK12:       omp.inner.for.cond:
5086 // CHECK12-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
5087 // CHECK12-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
5088 // CHECK12-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
5089 // CHECK12-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5090 // CHECK12:       omp.inner.for.body:
5091 // CHECK12-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
5092 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
5093 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5094 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !11
5095 // CHECK12-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !11
5096 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
5097 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
5098 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5099 // CHECK12:       omp.body.continue:
5100 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5101 // CHECK12:       omp.inner.for.inc:
5102 // CHECK12-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
5103 // CHECK12-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1
5104 // CHECK12-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
5105 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
5106 // CHECK12:       omp.inner.for.end:
5107 // CHECK12-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5108 // CHECK12:       omp.dispatch.inc:
5109 // CHECK12-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5110 // CHECK12-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5111 // CHECK12-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
5112 // CHECK12-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
5113 // CHECK12-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5114 // CHECK12-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5115 // CHECK12-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
5116 // CHECK12-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
5117 // CHECK12-NEXT:    br label [[OMP_DISPATCH_COND]]
5118 // CHECK12:       omp.dispatch.end:
5119 // CHECK12-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5120 // CHECK12-NEXT:    [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
5121 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
5122 // CHECK12-NEXT:    br label [[OMP_PRECOND_END]]
5123 // CHECK12:       omp.precond.end:
5124 // CHECK12-NEXT:    ret void
5125 //
5126 //
5127 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
5128 // CHECK12-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
5129 // CHECK12-NEXT:  entry:
5130 // CHECK12-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
5131 // CHECK12-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
5132 // CHECK12-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
5133 // CHECK12-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
5134 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
5135 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5136 // CHECK12-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
5137 // CHECK12-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
5138 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
5139 // CHECK12-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
5140 // CHECK12-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4
5141 // CHECK12-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4
5142 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4
5143 // CHECK12-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
5144 // CHECK12-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5145 // CHECK12-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5146 // CHECK12-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
5147 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
5148 // CHECK12-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5149 // CHECK12-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
5150 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
5151 // CHECK12-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5152 // CHECK12-NEXT:    store i8* null, i8** [[TMP4]], align 4
5153 // CHECK12-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5154 // CHECK12-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5155 // CHECK12-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5156 // CHECK12-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5157 // CHECK12-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
5158 // CHECK12-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5159 // CHECK12:       omp_offload.failed:
5160 // CHECK12-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]]
5161 // CHECK12-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5162 // CHECK12:       omp_offload.cont:
5163 // CHECK12-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5164 // CHECK12-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
5165 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
5166 // CHECK12-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5167 // CHECK12-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
5168 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
5169 // CHECK12-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
5170 // CHECK12-NEXT:    store i8* null, i8** [[TMP13]], align 4
5171 // CHECK12-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5172 // CHECK12-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5173 // CHECK12-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5174 // CHECK12-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5175 // CHECK12-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5176 // CHECK12-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
5177 // CHECK12:       omp_offload.failed5:
5178 // CHECK12-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]]
5179 // CHECK12-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
5180 // CHECK12:       omp_offload.cont6:
5181 // CHECK12-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
5182 // CHECK12-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
5183 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
5184 // CHECK12-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
5185 // CHECK12-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
5186 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
5187 // CHECK12-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
5188 // CHECK12-NEXT:    store i8* null, i8** [[TMP22]], align 4
5189 // CHECK12-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
5190 // CHECK12-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
5191 // CHECK12-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5192 // CHECK12-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5193 // CHECK12-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
5194 // CHECK12-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
5195 // CHECK12:       omp_offload.failed11:
5196 // CHECK12-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]]
5197 // CHECK12-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
5198 // CHECK12:       omp_offload.cont12:
5199 // CHECK12-NEXT:    ret i32 0
5200 //
5201 //
5202 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79
5203 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5204 // CHECK12-NEXT:  entry:
5205 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5206 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5207 // CHECK12-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5208 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
5209 // CHECK12-NEXT:    ret void
5210 //
5211 //
5212 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..5
5213 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5214 // CHECK12-NEXT:  entry:
5215 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5216 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5217 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5218 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5219 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5220 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5221 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5222 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5223 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5224 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
5225 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5226 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5227 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5228 // CHECK12-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5229 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5230 // CHECK12-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
5231 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5232 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5233 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5234 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5235 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5236 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5237 // CHECK12-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5238 // CHECK12-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5239 // CHECK12:       cond.true:
5240 // CHECK12-NEXT:    br label [[COND_END:%.*]]
5241 // CHECK12:       cond.false:
5242 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5243 // CHECK12-NEXT:    br label [[COND_END]]
5244 // CHECK12:       cond.end:
5245 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5246 // CHECK12-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5247 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5248 // CHECK12-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5249 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5250 // CHECK12:       omp.inner.for.cond:
5251 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5252 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5253 // CHECK12-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5254 // CHECK12-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5255 // CHECK12:       omp.inner.for.body:
5256 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5257 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5258 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5259 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5260 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
5261 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
5262 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5263 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5264 // CHECK12:       omp.body.continue:
5265 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5266 // CHECK12:       omp.inner.for.inc:
5267 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5268 // CHECK12-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
5269 // CHECK12-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5270 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]]
5271 // CHECK12:       omp.inner.for.end:
5272 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5273 // CHECK12:       omp.loop.exit:
5274 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5275 // CHECK12-NEXT:    ret void
5276 //
5277 //
5278 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
5279 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5280 // CHECK12-NEXT:  entry:
5281 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5282 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5283 // CHECK12-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5284 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
5285 // CHECK12-NEXT:    ret void
5286 //
5287 //
5288 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..7
5289 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5290 // CHECK12-NEXT:  entry:
5291 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5292 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5293 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5294 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5295 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5296 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5297 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5298 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5299 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5300 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
5301 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5302 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5303 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5304 // CHECK12-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5305 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5306 // CHECK12-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
5307 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5308 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5309 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5310 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5311 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5312 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5313 // CHECK12-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5314 // CHECK12-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5315 // CHECK12:       cond.true:
5316 // CHECK12-NEXT:    br label [[COND_END:%.*]]
5317 // CHECK12:       cond.false:
5318 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5319 // CHECK12-NEXT:    br label [[COND_END]]
5320 // CHECK12:       cond.end:
5321 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5322 // CHECK12-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5323 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5324 // CHECK12-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5325 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5326 // CHECK12:       omp.inner.for.cond:
5327 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5328 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5329 // CHECK12-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5330 // CHECK12-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5331 // CHECK12:       omp.inner.for.body:
5332 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5333 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5334 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5335 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5336 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
5337 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
5338 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5339 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5340 // CHECK12:       omp.body.continue:
5341 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5342 // CHECK12:       omp.inner.for.inc:
5343 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5344 // CHECK12-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
5345 // CHECK12-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5346 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]]
5347 // CHECK12:       omp.inner.for.end:
5348 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5349 // CHECK12:       omp.loop.exit:
5350 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5351 // CHECK12-NEXT:    ret void
5352 //
5353 //
5354 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89
5355 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5356 // CHECK12-NEXT:  entry:
5357 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5358 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5359 // CHECK12-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5360 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
5361 // CHECK12-NEXT:    ret void
5362 //
5363 //
5364 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..10
5365 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5366 // CHECK12-NEXT:  entry:
5367 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5368 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5369 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5370 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5371 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5372 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5373 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5374 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5375 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5376 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
5377 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5378 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5379 // CHECK12-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5380 // CHECK12-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5381 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5382 // CHECK12-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
5383 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5384 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5385 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5386 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5387 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
5388 // CHECK12-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5389 // CHECK12:       omp.dispatch.cond:
5390 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5391 // CHECK12-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5392 // CHECK12-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5393 // CHECK12:       cond.true:
5394 // CHECK12-NEXT:    br label [[COND_END:%.*]]
5395 // CHECK12:       cond.false:
5396 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5397 // CHECK12-NEXT:    br label [[COND_END]]
5398 // CHECK12:       cond.end:
5399 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5400 // CHECK12-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5401 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5402 // CHECK12-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5403 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5404 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5405 // CHECK12-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5406 // CHECK12-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5407 // CHECK12:       omp.dispatch.body:
5408 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5409 // CHECK12:       omp.inner.for.cond:
5410 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
5411 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
5412 // CHECK12-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5413 // CHECK12-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5414 // CHECK12:       omp.inner.for.body:
5415 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
5416 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5417 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5418 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
5419 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
5420 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
5421 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
5422 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5423 // CHECK12:       omp.body.continue:
5424 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5425 // CHECK12:       omp.inner.for.inc:
5426 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
5427 // CHECK12-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
5428 // CHECK12-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
5429 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
5430 // CHECK12:       omp.inner.for.end:
5431 // CHECK12-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5432 // CHECK12:       omp.dispatch.inc:
5433 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5434 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5435 // CHECK12-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5436 // CHECK12-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
5437 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5438 // CHECK12-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5439 // CHECK12-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
5440 // CHECK12-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
5441 // CHECK12-NEXT:    br label [[OMP_DISPATCH_COND]]
5442 // CHECK12:       omp.dispatch.end:
5443 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5444 // CHECK12-NEXT:    ret void
5445 //
5446 //
5447 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5448 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] {
5449 // CHECK12-NEXT:  entry:
5450 // CHECK12-NEXT:    call void @__tgt_register_requires(i64 1)
5451 // CHECK12-NEXT:    ret void
5452 //
5453 //
5454 // CHECK13-LABEL: define {{[^@]+}}@main
5455 // CHECK13-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
5456 // CHECK13-NEXT:  entry:
5457 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5458 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
5459 // CHECK13-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
5460 // CHECK13-NEXT:    [[N:%.*]] = alloca i32, align 4
5461 // CHECK13-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
5462 // CHECK13-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
5463 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5464 // CHECK13-NEXT:    [[I1:%.*]] = alloca i32, align 4
5465 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5466 // CHECK13-NEXT:    [[I10:%.*]] = alloca i32, align 4
5467 // CHECK13-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5468 // CHECK13-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5469 // CHECK13-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
5470 // CHECK13-NEXT:    store i32 100, i32* [[N]], align 4
5471 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
5472 // CHECK13-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
5473 // CHECK13-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
5474 // CHECK13-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
5475 // CHECK13-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
5476 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
5477 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
5478 // CHECK13-NEXT:    br label [[FOR_COND:%.*]]
5479 // CHECK13:       for.cond:
5480 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I]], align 4
5481 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N]], align 4
5482 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]]
5483 // CHECK13-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5484 // CHECK13:       for.body:
5485 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4
5486 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
5487 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
5488 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5489 // CHECK13-NEXT:    br label [[FOR_INC:%.*]]
5490 // CHECK13:       for.inc:
5491 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4
5492 // CHECK13-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP6]], 1
5493 // CHECK13-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5494 // CHECK13-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
5495 // CHECK13:       for.end:
5496 // CHECK13-NEXT:    store i32 0, i32* [[I1]], align 4
5497 // CHECK13-NEXT:    br label [[FOR_COND2:%.*]]
5498 // CHECK13:       for.cond2:
5499 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I1]], align 4
5500 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[N]], align 4
5501 // CHECK13-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP7]], [[TMP8]]
5502 // CHECK13-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]]
5503 // CHECK13:       for.body4:
5504 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I1]], align 4
5505 // CHECK13-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP9]] to i64
5506 // CHECK13-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM5]]
5507 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX6]], align 4
5508 // CHECK13-NEXT:    br label [[FOR_INC7:%.*]]
5509 // CHECK13:       for.inc7:
5510 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I1]], align 4
5511 // CHECK13-NEXT:    [[INC8:%.*]] = add nsw i32 [[TMP10]], 1
5512 // CHECK13-NEXT:    store i32 [[INC8]], i32* [[I1]], align 4
5513 // CHECK13-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]]
5514 // CHECK13:       for.end9:
5515 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[N]], align 4
5516 // CHECK13-NEXT:    store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR_]], align 4
5517 // CHECK13-NEXT:    store i32 0, i32* [[I10]], align 4
5518 // CHECK13-NEXT:    br label [[FOR_COND11:%.*]]
5519 // CHECK13:       for.cond11:
5520 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I10]], align 4
5521 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N]], align 4
5522 // CHECK13-NEXT:    [[CMP12:%.*]] = icmp slt i32 [[TMP12]], [[TMP13]]
5523 // CHECK13-NEXT:    br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END18:%.*]]
5524 // CHECK13:       for.body13:
5525 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I10]], align 4
5526 // CHECK13-NEXT:    [[IDXPROM14:%.*]] = sext i32 [[TMP14]] to i64
5527 // CHECK13-NEXT:    [[ARRAYIDX15:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM14]]
5528 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX15]], align 4
5529 // CHECK13-NEXT:    br label [[FOR_INC16:%.*]]
5530 // CHECK13:       for.inc16:
5531 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I10]], align 4
5532 // CHECK13-NEXT:    [[INC17:%.*]] = add nsw i32 [[TMP15]], 1
5533 // CHECK13-NEXT:    store i32 [[INC17]], i32* [[I10]], align 4
5534 // CHECK13-NEXT:    br label [[FOR_COND11]], !llvm.loop [[LOOP5:![0-9]+]]
5535 // CHECK13:       for.end18:
5536 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
5537 // CHECK13-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP16]])
5538 // CHECK13-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
5539 // CHECK13-NEXT:    [[TMP17:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
5540 // CHECK13-NEXT:    call void @llvm.stackrestore(i8* [[TMP17]])
5541 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[RETVAL]], align 4
5542 // CHECK13-NEXT:    ret i32 [[TMP18]]
5543 //
5544 //
5545 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
5546 // CHECK13-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
5547 // CHECK13-NEXT:  entry:
5548 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
5549 // CHECK13-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
5550 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5551 // CHECK13-NEXT:    [[I1:%.*]] = alloca i32, align 4
5552 // CHECK13-NEXT:    [[I10:%.*]] = alloca i32, align 4
5553 // CHECK13-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5554 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
5555 // CHECK13-NEXT:    br label [[FOR_COND:%.*]]
5556 // CHECK13:       for.cond:
5557 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5558 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
5559 // CHECK13-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5560 // CHECK13:       for.body:
5561 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
5562 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
5563 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5564 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5565 // CHECK13-NEXT:    br label [[FOR_INC:%.*]]
5566 // CHECK13:       for.inc:
5567 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
5568 // CHECK13-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
5569 // CHECK13-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5570 // CHECK13-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
5571 // CHECK13:       for.end:
5572 // CHECK13-NEXT:    store i32 0, i32* [[I1]], align 4
5573 // CHECK13-NEXT:    br label [[FOR_COND2:%.*]]
5574 // CHECK13:       for.cond2:
5575 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
5576 // CHECK13-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP3]], 10
5577 // CHECK13-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]]
5578 // CHECK13:       for.body4:
5579 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I1]], align 4
5580 // CHECK13-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP4]] to i64
5581 // CHECK13-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM5]]
5582 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX6]], align 4
5583 // CHECK13-NEXT:    br label [[FOR_INC7:%.*]]
5584 // CHECK13:       for.inc7:
5585 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I1]], align 4
5586 // CHECK13-NEXT:    [[INC8:%.*]] = add nsw i32 [[TMP5]], 1
5587 // CHECK13-NEXT:    store i32 [[INC8]], i32* [[I1]], align 4
5588 // CHECK13-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP7:![0-9]+]]
5589 // CHECK13:       for.end9:
5590 // CHECK13-NEXT:    store i32 0, i32* [[I10]], align 4
5591 // CHECK13-NEXT:    br label [[FOR_COND11:%.*]]
5592 // CHECK13:       for.cond11:
5593 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I10]], align 4
5594 // CHECK13-NEXT:    [[CMP12:%.*]] = icmp slt i32 [[TMP6]], 10
5595 // CHECK13-NEXT:    br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END18:%.*]]
5596 // CHECK13:       for.body13:
5597 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I10]], align 4
5598 // CHECK13-NEXT:    [[IDXPROM14:%.*]] = sext i32 [[TMP7]] to i64
5599 // CHECK13-NEXT:    [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM14]]
5600 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX15]], align 4
5601 // CHECK13-NEXT:    br label [[FOR_INC16:%.*]]
5602 // CHECK13:       for.inc16:
5603 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I10]], align 4
5604 // CHECK13-NEXT:    [[INC17:%.*]] = add nsw i32 [[TMP8]], 1
5605 // CHECK13-NEXT:    store i32 [[INC17]], i32* [[I10]], align 4
5606 // CHECK13-NEXT:    br label [[FOR_COND11]], !llvm.loop [[LOOP8:![0-9]+]]
5607 // CHECK13:       for.end18:
5608 // CHECK13-NEXT:    ret i32 0
5609 //
5610 //
5611 // CHECK14-LABEL: define {{[^@]+}}@main
5612 // CHECK14-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
5613 // CHECK14-NEXT:  entry:
5614 // CHECK14-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5615 // CHECK14-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
5616 // CHECK14-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
5617 // CHECK14-NEXT:    [[N:%.*]] = alloca i32, align 4
5618 // CHECK14-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
5619 // CHECK14-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
5620 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
5621 // CHECK14-NEXT:    [[I1:%.*]] = alloca i32, align 4
5622 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5623 // CHECK14-NEXT:    [[I10:%.*]] = alloca i32, align 4
5624 // CHECK14-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5625 // CHECK14-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5626 // CHECK14-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
5627 // CHECK14-NEXT:    store i32 100, i32* [[N]], align 4
5628 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
5629 // CHECK14-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
5630 // CHECK14-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
5631 // CHECK14-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
5632 // CHECK14-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
5633 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
5634 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
5635 // CHECK14-NEXT:    br label [[FOR_COND:%.*]]
5636 // CHECK14:       for.cond:
5637 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I]], align 4
5638 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N]], align 4
5639 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]]
5640 // CHECK14-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5641 // CHECK14:       for.body:
5642 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4
5643 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
5644 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
5645 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5646 // CHECK14-NEXT:    br label [[FOR_INC:%.*]]
5647 // CHECK14:       for.inc:
5648 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4
5649 // CHECK14-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP6]], 1
5650 // CHECK14-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5651 // CHECK14-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
5652 // CHECK14:       for.end:
5653 // CHECK14-NEXT:    store i32 0, i32* [[I1]], align 4
5654 // CHECK14-NEXT:    br label [[FOR_COND2:%.*]]
5655 // CHECK14:       for.cond2:
5656 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I1]], align 4
5657 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[N]], align 4
5658 // CHECK14-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP7]], [[TMP8]]
5659 // CHECK14-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]]
5660 // CHECK14:       for.body4:
5661 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I1]], align 4
5662 // CHECK14-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP9]] to i64
5663 // CHECK14-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM5]]
5664 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX6]], align 4
5665 // CHECK14-NEXT:    br label [[FOR_INC7:%.*]]
5666 // CHECK14:       for.inc7:
5667 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I1]], align 4
5668 // CHECK14-NEXT:    [[INC8:%.*]] = add nsw i32 [[TMP10]], 1
5669 // CHECK14-NEXT:    store i32 [[INC8]], i32* [[I1]], align 4
5670 // CHECK14-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]]
5671 // CHECK14:       for.end9:
5672 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[N]], align 4
5673 // CHECK14-NEXT:    store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR_]], align 4
5674 // CHECK14-NEXT:    store i32 0, i32* [[I10]], align 4
5675 // CHECK14-NEXT:    br label [[FOR_COND11:%.*]]
5676 // CHECK14:       for.cond11:
5677 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I10]], align 4
5678 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N]], align 4
5679 // CHECK14-NEXT:    [[CMP12:%.*]] = icmp slt i32 [[TMP12]], [[TMP13]]
5680 // CHECK14-NEXT:    br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END18:%.*]]
5681 // CHECK14:       for.body13:
5682 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I10]], align 4
5683 // CHECK14-NEXT:    [[IDXPROM14:%.*]] = sext i32 [[TMP14]] to i64
5684 // CHECK14-NEXT:    [[ARRAYIDX15:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM14]]
5685 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX15]], align 4
5686 // CHECK14-NEXT:    br label [[FOR_INC16:%.*]]
5687 // CHECK14:       for.inc16:
5688 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I10]], align 4
5689 // CHECK14-NEXT:    [[INC17:%.*]] = add nsw i32 [[TMP15]], 1
5690 // CHECK14-NEXT:    store i32 [[INC17]], i32* [[I10]], align 4
5691 // CHECK14-NEXT:    br label [[FOR_COND11]], !llvm.loop [[LOOP5:![0-9]+]]
5692 // CHECK14:       for.end18:
5693 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
5694 // CHECK14-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP16]])
5695 // CHECK14-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
5696 // CHECK14-NEXT:    [[TMP17:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
5697 // CHECK14-NEXT:    call void @llvm.stackrestore(i8* [[TMP17]])
5698 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[RETVAL]], align 4
5699 // CHECK14-NEXT:    ret i32 [[TMP18]]
5700 //
5701 //
5702 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
5703 // CHECK14-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
5704 // CHECK14-NEXT:  entry:
5705 // CHECK14-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
5706 // CHECK14-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
5707 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
5708 // CHECK14-NEXT:    [[I1:%.*]] = alloca i32, align 4
5709 // CHECK14-NEXT:    [[I10:%.*]] = alloca i32, align 4
5710 // CHECK14-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5711 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
5712 // CHECK14-NEXT:    br label [[FOR_COND:%.*]]
5713 // CHECK14:       for.cond:
5714 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5715 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
5716 // CHECK14-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5717 // CHECK14:       for.body:
5718 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
5719 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
5720 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5721 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5722 // CHECK14-NEXT:    br label [[FOR_INC:%.*]]
5723 // CHECK14:       for.inc:
5724 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
5725 // CHECK14-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
5726 // CHECK14-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5727 // CHECK14-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
5728 // CHECK14:       for.end:
5729 // CHECK14-NEXT:    store i32 0, i32* [[I1]], align 4
5730 // CHECK14-NEXT:    br label [[FOR_COND2:%.*]]
5731 // CHECK14:       for.cond2:
5732 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
5733 // CHECK14-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP3]], 10
5734 // CHECK14-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]]
5735 // CHECK14:       for.body4:
5736 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I1]], align 4
5737 // CHECK14-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP4]] to i64
5738 // CHECK14-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM5]]
5739 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX6]], align 4
5740 // CHECK14-NEXT:    br label [[FOR_INC7:%.*]]
5741 // CHECK14:       for.inc7:
5742 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I1]], align 4
5743 // CHECK14-NEXT:    [[INC8:%.*]] = add nsw i32 [[TMP5]], 1
5744 // CHECK14-NEXT:    store i32 [[INC8]], i32* [[I1]], align 4
5745 // CHECK14-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP7:![0-9]+]]
5746 // CHECK14:       for.end9:
5747 // CHECK14-NEXT:    store i32 0, i32* [[I10]], align 4
5748 // CHECK14-NEXT:    br label [[FOR_COND11:%.*]]
5749 // CHECK14:       for.cond11:
5750 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I10]], align 4
5751 // CHECK14-NEXT:    [[CMP12:%.*]] = icmp slt i32 [[TMP6]], 10
5752 // CHECK14-NEXT:    br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END18:%.*]]
5753 // CHECK14:       for.body13:
5754 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I10]], align 4
5755 // CHECK14-NEXT:    [[IDXPROM14:%.*]] = sext i32 [[TMP7]] to i64
5756 // CHECK14-NEXT:    [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM14]]
5757 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX15]], align 4
5758 // CHECK14-NEXT:    br label [[FOR_INC16:%.*]]
5759 // CHECK14:       for.inc16:
5760 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I10]], align 4
5761 // CHECK14-NEXT:    [[INC17:%.*]] = add nsw i32 [[TMP8]], 1
5762 // CHECK14-NEXT:    store i32 [[INC17]], i32* [[I10]], align 4
5763 // CHECK14-NEXT:    br label [[FOR_COND11]], !llvm.loop [[LOOP8:![0-9]+]]
5764 // CHECK14:       for.end18:
5765 // CHECK14-NEXT:    ret i32 0
5766 //
5767 //
5768 // CHECK15-LABEL: define {{[^@]+}}@main
5769 // CHECK15-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
5770 // CHECK15-NEXT:  entry:
5771 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5772 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
5773 // CHECK15-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
5774 // CHECK15-NEXT:    [[N:%.*]] = alloca i32, align 4
5775 // CHECK15-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
5776 // CHECK15-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
5777 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
5778 // CHECK15-NEXT:    [[I1:%.*]] = alloca i32, align 4
5779 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5780 // CHECK15-NEXT:    [[I9:%.*]] = alloca i32, align 4
5781 // CHECK15-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5782 // CHECK15-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5783 // CHECK15-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
5784 // CHECK15-NEXT:    store i32 100, i32* [[N]], align 4
5785 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
5786 // CHECK15-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
5787 // CHECK15-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
5788 // CHECK15-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
5789 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
5790 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
5791 // CHECK15-NEXT:    br label [[FOR_COND:%.*]]
5792 // CHECK15:       for.cond:
5793 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
5794 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
5795 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]]
5796 // CHECK15-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5797 // CHECK15:       for.body:
5798 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I]], align 4
5799 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]]
5800 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5801 // CHECK15-NEXT:    br label [[FOR_INC:%.*]]
5802 // CHECK15:       for.inc:
5803 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4
5804 // CHECK15-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP5]], 1
5805 // CHECK15-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5806 // CHECK15-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
5807 // CHECK15:       for.end:
5808 // CHECK15-NEXT:    store i32 0, i32* [[I1]], align 4
5809 // CHECK15-NEXT:    br label [[FOR_COND2:%.*]]
5810 // CHECK15:       for.cond2:
5811 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I1]], align 4
5812 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[N]], align 4
5813 // CHECK15-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
5814 // CHECK15-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]]
5815 // CHECK15:       for.body4:
5816 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I1]], align 4
5817 // CHECK15-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP8]]
5818 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX5]], align 4
5819 // CHECK15-NEXT:    br label [[FOR_INC6:%.*]]
5820 // CHECK15:       for.inc6:
5821 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I1]], align 4
5822 // CHECK15-NEXT:    [[INC7:%.*]] = add nsw i32 [[TMP9]], 1
5823 // CHECK15-NEXT:    store i32 [[INC7]], i32* [[I1]], align 4
5824 // CHECK15-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP5:![0-9]+]]
5825 // CHECK15:       for.end8:
5826 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[N]], align 4
5827 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR_]], align 4
5828 // CHECK15-NEXT:    store i32 0, i32* [[I9]], align 4
5829 // CHECK15-NEXT:    br label [[FOR_COND10:%.*]]
5830 // CHECK15:       for.cond10:
5831 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I9]], align 4
5832 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[N]], align 4
5833 // CHECK15-NEXT:    [[CMP11:%.*]] = icmp slt i32 [[TMP11]], [[TMP12]]
5834 // CHECK15-NEXT:    br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END16:%.*]]
5835 // CHECK15:       for.body12:
5836 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I9]], align 4
5837 // CHECK15-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP13]]
5838 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX13]], align 4
5839 // CHECK15-NEXT:    br label [[FOR_INC14:%.*]]
5840 // CHECK15:       for.inc14:
5841 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I9]], align 4
5842 // CHECK15-NEXT:    [[INC15:%.*]] = add nsw i32 [[TMP14]], 1
5843 // CHECK15-NEXT:    store i32 [[INC15]], i32* [[I9]], align 4
5844 // CHECK15-NEXT:    br label [[FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]]
5845 // CHECK15:       for.end16:
5846 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
5847 // CHECK15-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP15]])
5848 // CHECK15-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
5849 // CHECK15-NEXT:    [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
5850 // CHECK15-NEXT:    call void @llvm.stackrestore(i8* [[TMP16]])
5851 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
5852 // CHECK15-NEXT:    ret i32 [[TMP17]]
5853 //
5854 //
5855 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
5856 // CHECK15-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
5857 // CHECK15-NEXT:  entry:
5858 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
5859 // CHECK15-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
5860 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
5861 // CHECK15-NEXT:    [[I1:%.*]] = alloca i32, align 4
5862 // CHECK15-NEXT:    [[I9:%.*]] = alloca i32, align 4
5863 // CHECK15-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5864 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
5865 // CHECK15-NEXT:    br label [[FOR_COND:%.*]]
5866 // CHECK15:       for.cond:
5867 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5868 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
5869 // CHECK15-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5870 // CHECK15:       for.body:
5871 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
5872 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP1]]
5873 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5874 // CHECK15-NEXT:    br label [[FOR_INC:%.*]]
5875 // CHECK15:       for.inc:
5876 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
5877 // CHECK15-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
5878 // CHECK15-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5879 // CHECK15-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
5880 // CHECK15:       for.end:
5881 // CHECK15-NEXT:    store i32 0, i32* [[I1]], align 4
5882 // CHECK15-NEXT:    br label [[FOR_COND2:%.*]]
5883 // CHECK15:       for.cond2:
5884 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
5885 // CHECK15-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP3]], 10
5886 // CHECK15-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]]
5887 // CHECK15:       for.body4:
5888 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I1]], align 4
5889 // CHECK15-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
5890 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX5]], align 4
5891 // CHECK15-NEXT:    br label [[FOR_INC6:%.*]]
5892 // CHECK15:       for.inc6:
5893 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I1]], align 4
5894 // CHECK15-NEXT:    [[INC7:%.*]] = add nsw i32 [[TMP5]], 1
5895 // CHECK15-NEXT:    store i32 [[INC7]], i32* [[I1]], align 4
5896 // CHECK15-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]]
5897 // CHECK15:       for.end8:
5898 // CHECK15-NEXT:    store i32 0, i32* [[I9]], align 4
5899 // CHECK15-NEXT:    br label [[FOR_COND10:%.*]]
5900 // CHECK15:       for.cond10:
5901 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I9]], align 4
5902 // CHECK15-NEXT:    [[CMP11:%.*]] = icmp slt i32 [[TMP6]], 10
5903 // CHECK15-NEXT:    br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END16:%.*]]
5904 // CHECK15:       for.body12:
5905 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I9]], align 4
5906 // CHECK15-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP7]]
5907 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX13]], align 4
5908 // CHECK15-NEXT:    br label [[FOR_INC14:%.*]]
5909 // CHECK15:       for.inc14:
5910 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I9]], align 4
5911 // CHECK15-NEXT:    [[INC15:%.*]] = add nsw i32 [[TMP8]], 1
5912 // CHECK15-NEXT:    store i32 [[INC15]], i32* [[I9]], align 4
5913 // CHECK15-NEXT:    br label [[FOR_COND10]], !llvm.loop [[LOOP9:![0-9]+]]
5914 // CHECK15:       for.end16:
5915 // CHECK15-NEXT:    ret i32 0
5916 //
5917 //
5918 // CHECK16-LABEL: define {{[^@]+}}@main
5919 // CHECK16-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
5920 // CHECK16-NEXT:  entry:
5921 // CHECK16-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5922 // CHECK16-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
5923 // CHECK16-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
5924 // CHECK16-NEXT:    [[N:%.*]] = alloca i32, align 4
5925 // CHECK16-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
5926 // CHECK16-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
5927 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
5928 // CHECK16-NEXT:    [[I1:%.*]] = alloca i32, align 4
5929 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5930 // CHECK16-NEXT:    [[I9:%.*]] = alloca i32, align 4
5931 // CHECK16-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5932 // CHECK16-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5933 // CHECK16-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
5934 // CHECK16-NEXT:    store i32 100, i32* [[N]], align 4
5935 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
5936 // CHECK16-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
5937 // CHECK16-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
5938 // CHECK16-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
5939 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
5940 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
5941 // CHECK16-NEXT:    br label [[FOR_COND:%.*]]
5942 // CHECK16:       for.cond:
5943 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
5944 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
5945 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]]
5946 // CHECK16-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
5947 // CHECK16:       for.body:
5948 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I]], align 4
5949 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]]
5950 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5951 // CHECK16-NEXT:    br label [[FOR_INC:%.*]]
5952 // CHECK16:       for.inc:
5953 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4
5954 // CHECK16-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP5]], 1
5955 // CHECK16-NEXT:    store i32 [[INC]], i32* [[I]], align 4
5956 // CHECK16-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
5957 // CHECK16:       for.end:
5958 // CHECK16-NEXT:    store i32 0, i32* [[I1]], align 4
5959 // CHECK16-NEXT:    br label [[FOR_COND2:%.*]]
5960 // CHECK16:       for.cond2:
5961 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I1]], align 4
5962 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[N]], align 4
5963 // CHECK16-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
5964 // CHECK16-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]]
5965 // CHECK16:       for.body4:
5966 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I1]], align 4
5967 // CHECK16-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP8]]
5968 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX5]], align 4
5969 // CHECK16-NEXT:    br label [[FOR_INC6:%.*]]
5970 // CHECK16:       for.inc6:
5971 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I1]], align 4
5972 // CHECK16-NEXT:    [[INC7:%.*]] = add nsw i32 [[TMP9]], 1
5973 // CHECK16-NEXT:    store i32 [[INC7]], i32* [[I1]], align 4
5974 // CHECK16-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP5:![0-9]+]]
5975 // CHECK16:       for.end8:
5976 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[N]], align 4
5977 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR_]], align 4
5978 // CHECK16-NEXT:    store i32 0, i32* [[I9]], align 4
5979 // CHECK16-NEXT:    br label [[FOR_COND10:%.*]]
5980 // CHECK16:       for.cond10:
5981 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I9]], align 4
5982 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[N]], align 4
5983 // CHECK16-NEXT:    [[CMP11:%.*]] = icmp slt i32 [[TMP11]], [[TMP12]]
5984 // CHECK16-NEXT:    br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END16:%.*]]
5985 // CHECK16:       for.body12:
5986 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I9]], align 4
5987 // CHECK16-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP13]]
5988 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX13]], align 4
5989 // CHECK16-NEXT:    br label [[FOR_INC14:%.*]]
5990 // CHECK16:       for.inc14:
5991 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I9]], align 4
5992 // CHECK16-NEXT:    [[INC15:%.*]] = add nsw i32 [[TMP14]], 1
5993 // CHECK16-NEXT:    store i32 [[INC15]], i32* [[I9]], align 4
5994 // CHECK16-NEXT:    br label [[FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]]
5995 // CHECK16:       for.end16:
5996 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
5997 // CHECK16-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP15]])
5998 // CHECK16-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
5999 // CHECK16-NEXT:    [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
6000 // CHECK16-NEXT:    call void @llvm.stackrestore(i8* [[TMP16]])
6001 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
6002 // CHECK16-NEXT:    ret i32 [[TMP17]]
6003 //
6004 //
6005 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
6006 // CHECK16-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
6007 // CHECK16-NEXT:  entry:
6008 // CHECK16-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
6009 // CHECK16-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
6010 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
6011 // CHECK16-NEXT:    [[I1:%.*]] = alloca i32, align 4
6012 // CHECK16-NEXT:    [[I9:%.*]] = alloca i32, align 4
6013 // CHECK16-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6014 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
6015 // CHECK16-NEXT:    br label [[FOR_COND:%.*]]
6016 // CHECK16:       for.cond:
6017 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
6018 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
6019 // CHECK16-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
6020 // CHECK16:       for.body:
6021 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
6022 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP1]]
6023 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6024 // CHECK16-NEXT:    br label [[FOR_INC:%.*]]
6025 // CHECK16:       for.inc:
6026 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
6027 // CHECK16-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
6028 // CHECK16-NEXT:    store i32 [[INC]], i32* [[I]], align 4
6029 // CHECK16-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
6030 // CHECK16:       for.end:
6031 // CHECK16-NEXT:    store i32 0, i32* [[I1]], align 4
6032 // CHECK16-NEXT:    br label [[FOR_COND2:%.*]]
6033 // CHECK16:       for.cond2:
6034 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
6035 // CHECK16-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP3]], 10
6036 // CHECK16-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]]
6037 // CHECK16:       for.body4:
6038 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I1]], align 4
6039 // CHECK16-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
6040 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX5]], align 4
6041 // CHECK16-NEXT:    br label [[FOR_INC6:%.*]]
6042 // CHECK16:       for.inc6:
6043 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I1]], align 4
6044 // CHECK16-NEXT:    [[INC7:%.*]] = add nsw i32 [[TMP5]], 1
6045 // CHECK16-NEXT:    store i32 [[INC7]], i32* [[I1]], align 4
6046 // CHECK16-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]]
6047 // CHECK16:       for.end8:
6048 // CHECK16-NEXT:    store i32 0, i32* [[I9]], align 4
6049 // CHECK16-NEXT:    br label [[FOR_COND10:%.*]]
6050 // CHECK16:       for.cond10:
6051 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I9]], align 4
6052 // CHECK16-NEXT:    [[CMP11:%.*]] = icmp slt i32 [[TMP6]], 10
6053 // CHECK16-NEXT:    br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END16:%.*]]
6054 // CHECK16:       for.body12:
6055 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I9]], align 4
6056 // CHECK16-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP7]]
6057 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX13]], align 4
6058 // CHECK16-NEXT:    br label [[FOR_INC14:%.*]]
6059 // CHECK16:       for.inc14:
6060 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I9]], align 4
6061 // CHECK16-NEXT:    [[INC15:%.*]] = add nsw i32 [[TMP8]], 1
6062 // CHECK16-NEXT:    store i32 [[INC15]], i32* [[I9]], align 4
6063 // CHECK16-NEXT:    br label [[FOR_COND10]], !llvm.loop [[LOOP9:![0-9]+]]
6064 // CHECK16:       for.end16:
6065 // CHECK16-NEXT:    ret i32 0
6066 //
6067