1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X]; 25 float b; 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute 30 for(int i = 0; i < X; i++) { 31 a[i] = (T)0; 32 } 33 #pragma omp target 34 #pragma omp teams distribute dist_schedule(static) 35 for(int i = 0; i < X; i++) { 36 a[i] = (T)0; 37 } 38 #pragma omp target 39 #pragma omp teams distribute dist_schedule(static, X/2) 40 for(int i = 0; i < X; i++) { 41 a[i] = (T)0; 42 } 43 44 45 46 47 48 49 return a[0]; 50 } 51 }; 52 53 int teams_template_struct(void) { 54 SS<int, 123, 456> V; 55 return V.foo(); 56 57 } 58 #endif // CK1 59 60 // Test host codegen. 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 64 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 67 68 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 69 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 70 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 71 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 72 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 73 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 74 #ifdef CK2 75 76 template <typename T, int n> 77 int tmain(T argc) { 78 T a[n]; 79 #pragma omp target 80 #pragma omp teams distribute 81 for(int i = 0; i < n; i++) { 82 a[i] = (T)0; 83 } 84 #pragma omp target 85 #pragma omp teams distribute dist_schedule(static) 86 for(int i = 0; i < n; i++) { 87 a[i] = (T)0; 88 } 89 #pragma omp target 90 #pragma omp teams distribute dist_schedule(static, n) 91 for(int i = 0; i < n; i++) { 92 a[i] = (T)0; 93 } 94 return 0; 95 } 96 97 int main (int argc, char **argv) { 98 int n = 100; 99 int a[n]; 100 #pragma omp target 101 #pragma omp teams distribute 102 for(int i = 0; i < n; i++) { 103 a[i] = 0; 104 } 105 #pragma omp target 106 #pragma omp teams distribute dist_schedule(static) 107 for(int i = 0; i < n; i++) { 108 a[i] = 0; 109 } 110 #pragma omp target 111 #pragma omp teams distribute dist_schedule(static, n) 112 for(int i = 0; i < n; i++) { 113 a[i] = 0; 114 } 115 return tmain<int, 10>(argc); 116 } 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 #endif // CK2 133 #endif // #ifndef HEADER 134 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 135 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 136 // CHECK1-NEXT: entry: 137 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 138 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 139 // CHECK1-NEXT: ret i32 [[CALL]] 140 // 141 // 142 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 143 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 144 // CHECK1-NEXT: entry: 145 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 146 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 147 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 148 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 149 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 151 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 152 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 153 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 155 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 156 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 157 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 158 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 159 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 160 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 161 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 162 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 163 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 164 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 165 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 166 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 167 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 168 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 169 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 170 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 171 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 172 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 173 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 174 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 175 // CHECK1: omp_offload.failed: 176 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 177 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 178 // CHECK1: omp_offload.cont: 179 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 180 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 181 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 182 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 183 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 184 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 185 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 186 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 187 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 188 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 189 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 190 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 191 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 192 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 193 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 194 // CHECK1: omp_offload.failed7: 195 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]] 196 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 197 // CHECK1: omp_offload.cont8: 198 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 199 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 200 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 201 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 202 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 203 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 204 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 205 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 206 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 207 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 208 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 209 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 210 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 211 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 212 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 213 // CHECK1: omp_offload.failed14: 214 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]] 215 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] 216 // CHECK1: omp_offload.cont15: 217 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 218 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0 219 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 220 // CHECK1-NEXT: ret i32 [[TMP27]] 221 // 222 // 223 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 224 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 225 // CHECK1-NEXT: entry: 226 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 227 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 228 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 229 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 230 // CHECK1-NEXT: ret void 231 // 232 // 233 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 234 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 235 // CHECK1-NEXT: entry: 236 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 237 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 238 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 239 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 243 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 244 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 245 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 246 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 247 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 248 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 249 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 250 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 251 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 252 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 253 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 254 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 255 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 256 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 257 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 258 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 259 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 260 // CHECK1: cond.true: 261 // CHECK1-NEXT: br label [[COND_END:%.*]] 262 // CHECK1: cond.false: 263 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 264 // CHECK1-NEXT: br label [[COND_END]] 265 // CHECK1: cond.end: 266 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 267 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 268 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 269 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 270 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 271 // CHECK1: omp.inner.for.cond: 272 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 273 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 274 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 275 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 276 // CHECK1: omp.inner.for.body: 277 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 278 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 279 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 280 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 281 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 282 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 283 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 284 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 285 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 286 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 287 // CHECK1: omp.body.continue: 288 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 289 // CHECK1: omp.inner.for.inc: 290 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 291 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 292 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 293 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 294 // CHECK1: omp.inner.for.end: 295 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 296 // CHECK1: omp.loop.exit: 297 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 298 // CHECK1-NEXT: ret void 299 // 300 // 301 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 302 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 303 // CHECK1-NEXT: entry: 304 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 305 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 306 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 307 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 308 // CHECK1-NEXT: ret void 309 // 310 // 311 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 312 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 313 // CHECK1-NEXT: entry: 314 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 315 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 316 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 317 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 318 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 319 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 320 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 321 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 322 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 323 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 324 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 325 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 326 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 327 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 328 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 329 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 330 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 331 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 332 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 333 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 334 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 335 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 336 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 337 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 338 // CHECK1: cond.true: 339 // CHECK1-NEXT: br label [[COND_END:%.*]] 340 // CHECK1: cond.false: 341 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 342 // CHECK1-NEXT: br label [[COND_END]] 343 // CHECK1: cond.end: 344 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 345 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 346 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 347 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 348 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 349 // CHECK1: omp.inner.for.cond: 350 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 351 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 352 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 353 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 354 // CHECK1: omp.inner.for.body: 355 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 356 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 357 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 358 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 359 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 360 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 361 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 362 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 363 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 364 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 365 // CHECK1: omp.body.continue: 366 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 367 // CHECK1: omp.inner.for.inc: 368 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 369 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 370 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 371 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 372 // CHECK1: omp.inner.for.end: 373 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 374 // CHECK1: omp.loop.exit: 375 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 376 // CHECK1-NEXT: ret void 377 // 378 // 379 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 380 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 381 // CHECK1-NEXT: entry: 382 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 383 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 384 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 385 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 386 // CHECK1-NEXT: ret void 387 // 388 // 389 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 390 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 391 // CHECK1-NEXT: entry: 392 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 393 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 394 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 395 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 396 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 397 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 398 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 399 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 400 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 403 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 404 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 405 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 406 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 407 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 408 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 409 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 410 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 411 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 412 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 413 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 414 // CHECK1: omp.dispatch.cond: 415 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 416 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 417 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 418 // CHECK1: cond.true: 419 // CHECK1-NEXT: br label [[COND_END:%.*]] 420 // CHECK1: cond.false: 421 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 422 // CHECK1-NEXT: br label [[COND_END]] 423 // CHECK1: cond.end: 424 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 425 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 426 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 427 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 428 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 429 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 430 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 431 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 432 // CHECK1: omp.dispatch.body: 433 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 434 // CHECK1: omp.inner.for.cond: 435 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 436 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8 437 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 438 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 439 // CHECK1: omp.inner.for.body: 440 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 441 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 442 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 443 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8 444 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 445 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8 446 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 447 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 448 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8 449 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 450 // CHECK1: omp.body.continue: 451 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 452 // CHECK1: omp.inner.for.inc: 453 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 454 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 455 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 456 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 457 // CHECK1: omp.inner.for.end: 458 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 459 // CHECK1: omp.dispatch.inc: 460 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 461 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 462 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 463 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 464 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 465 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 466 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 467 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 468 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 469 // CHECK1: omp.dispatch.end: 470 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 471 // CHECK1-NEXT: ret void 472 // 473 // 474 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 475 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 476 // CHECK1-NEXT: entry: 477 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 478 // CHECK1-NEXT: ret void 479 // 480 // 481 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv 482 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 483 // CHECK2-NEXT: entry: 484 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 485 // CHECK2-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 486 // CHECK2-NEXT: ret i32 [[CALL]] 487 // 488 // 489 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 490 // CHECK2-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 491 // CHECK2-NEXT: entry: 492 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 493 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 494 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 495 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 496 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 497 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 498 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 499 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 500 // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 501 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 502 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 503 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 504 // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 505 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 506 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 507 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 508 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 509 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 510 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 511 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 512 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 513 // CHECK2-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 514 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 515 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8 516 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 517 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 518 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 519 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 520 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 521 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 522 // CHECK2: omp_offload.failed: 523 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 524 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 525 // CHECK2: omp_offload.cont: 526 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 527 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 528 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 529 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 530 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 531 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 532 // CHECK2-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 533 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 534 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8 535 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 536 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 537 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 538 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 539 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 540 // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 541 // CHECK2: omp_offload.failed7: 542 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]] 543 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT8]] 544 // CHECK2: omp_offload.cont8: 545 // CHECK2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 546 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 547 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 548 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 549 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 550 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 551 // CHECK2-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 552 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 553 // CHECK2-NEXT: store i8* null, i8** [[TMP22]], align 8 554 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 555 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 556 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 557 // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 558 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 559 // CHECK2-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 560 // CHECK2: omp_offload.failed14: 561 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]] 562 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT15]] 563 // CHECK2: omp_offload.cont15: 564 // CHECK2-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 565 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0 566 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 567 // CHECK2-NEXT: ret i32 [[TMP27]] 568 // 569 // 570 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 571 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 572 // CHECK2-NEXT: entry: 573 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 574 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 575 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 576 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 577 // CHECK2-NEXT: ret void 578 // 579 // 580 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 581 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 582 // CHECK2-NEXT: entry: 583 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 584 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 585 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 586 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 587 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 588 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 589 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 590 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 591 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 592 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 593 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 594 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 595 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 596 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 597 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 598 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 599 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 600 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 601 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 602 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 603 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 604 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 605 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 606 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 607 // CHECK2: cond.true: 608 // CHECK2-NEXT: br label [[COND_END:%.*]] 609 // CHECK2: cond.false: 610 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 611 // CHECK2-NEXT: br label [[COND_END]] 612 // CHECK2: cond.end: 613 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 614 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 615 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 616 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 617 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 618 // CHECK2: omp.inner.for.cond: 619 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 620 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 621 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 622 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 623 // CHECK2: omp.inner.for.body: 624 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 625 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 626 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 627 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 628 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 629 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 630 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 631 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 632 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 633 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 634 // CHECK2: omp.body.continue: 635 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 636 // CHECK2: omp.inner.for.inc: 637 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 638 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 639 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 640 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 641 // CHECK2: omp.inner.for.end: 642 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 643 // CHECK2: omp.loop.exit: 644 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 645 // CHECK2-NEXT: ret void 646 // 647 // 648 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 649 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 650 // CHECK2-NEXT: entry: 651 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 652 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 653 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 654 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 655 // CHECK2-NEXT: ret void 656 // 657 // 658 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 659 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 660 // CHECK2-NEXT: entry: 661 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 662 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 663 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 664 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 665 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 666 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 667 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 668 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 669 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 670 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 671 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 672 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 673 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 674 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 675 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 676 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 677 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 678 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 679 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 680 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 681 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 682 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 683 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 684 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 685 // CHECK2: cond.true: 686 // CHECK2-NEXT: br label [[COND_END:%.*]] 687 // CHECK2: cond.false: 688 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 689 // CHECK2-NEXT: br label [[COND_END]] 690 // CHECK2: cond.end: 691 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 692 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 693 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 694 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 695 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 696 // CHECK2: omp.inner.for.cond: 697 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 698 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 699 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 700 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 701 // CHECK2: omp.inner.for.body: 702 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 703 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 704 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 705 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 706 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 707 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 708 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 709 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 710 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 711 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 712 // CHECK2: omp.body.continue: 713 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 714 // CHECK2: omp.inner.for.inc: 715 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 716 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 717 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 718 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 719 // CHECK2: omp.inner.for.end: 720 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 721 // CHECK2: omp.loop.exit: 722 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 723 // CHECK2-NEXT: ret void 724 // 725 // 726 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 727 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 728 // CHECK2-NEXT: entry: 729 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 730 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 731 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 732 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 733 // CHECK2-NEXT: ret void 734 // 735 // 736 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 737 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 738 // CHECK2-NEXT: entry: 739 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 740 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 741 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 742 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 743 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 744 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 745 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 746 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 747 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 748 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 749 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 750 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 751 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 752 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 753 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 754 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 755 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 756 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 757 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 758 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 759 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 760 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 761 // CHECK2: omp.dispatch.cond: 762 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 763 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 764 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 765 // CHECK2: cond.true: 766 // CHECK2-NEXT: br label [[COND_END:%.*]] 767 // CHECK2: cond.false: 768 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 769 // CHECK2-NEXT: br label [[COND_END]] 770 // CHECK2: cond.end: 771 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 772 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 773 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 774 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 775 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 776 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 777 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 778 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 779 // CHECK2: omp.dispatch.body: 780 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 781 // CHECK2: omp.inner.for.cond: 782 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 783 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8 784 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 785 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 786 // CHECK2: omp.inner.for.body: 787 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 788 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 789 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 790 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8 791 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 792 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8 793 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 794 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 795 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8 796 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 797 // CHECK2: omp.body.continue: 798 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 799 // CHECK2: omp.inner.for.inc: 800 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 801 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 802 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 803 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 804 // CHECK2: omp.inner.for.end: 805 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 806 // CHECK2: omp.dispatch.inc: 807 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 808 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 809 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 810 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 811 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 812 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 813 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 814 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 815 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 816 // CHECK2: omp.dispatch.end: 817 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 818 // CHECK2-NEXT: ret void 819 // 820 // 821 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 822 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 823 // CHECK2-NEXT: entry: 824 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 825 // CHECK2-NEXT: ret void 826 // 827 // 828 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 829 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 830 // CHECK3-NEXT: entry: 831 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 832 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 833 // CHECK3-NEXT: ret i32 [[CALL]] 834 // 835 // 836 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 837 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 838 // CHECK3-NEXT: entry: 839 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 840 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 841 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 842 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 843 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 844 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 845 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 846 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 847 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 848 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 849 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 850 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 851 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 852 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 853 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 854 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 855 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 856 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 857 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 858 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 859 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 860 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 861 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 862 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 863 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 864 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 865 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 866 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 867 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 868 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 869 // CHECK3: omp_offload.failed: 870 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 871 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 872 // CHECK3: omp_offload.cont: 873 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 874 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 875 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 876 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 877 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 878 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 879 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 880 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 881 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 882 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 883 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 884 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 885 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 886 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 887 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 888 // CHECK3: omp_offload.failed7: 889 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]] 890 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 891 // CHECK3: omp_offload.cont8: 892 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 893 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 894 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 895 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 896 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 897 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 898 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 899 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 900 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 901 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 902 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 903 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 904 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 905 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 906 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 907 // CHECK3: omp_offload.failed14: 908 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]] 909 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] 910 // CHECK3: omp_offload.cont15: 911 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 912 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0 913 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 914 // CHECK3-NEXT: ret i32 [[TMP27]] 915 // 916 // 917 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 918 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 919 // CHECK3-NEXT: entry: 920 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 921 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 922 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 923 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 924 // CHECK3-NEXT: ret void 925 // 926 // 927 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 928 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 929 // CHECK3-NEXT: entry: 930 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 931 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 932 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 933 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 934 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 935 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 936 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 937 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 938 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 939 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 940 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 941 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 942 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 943 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 944 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 945 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 946 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 947 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 948 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 949 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 950 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 951 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 952 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 953 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 954 // CHECK3: cond.true: 955 // CHECK3-NEXT: br label [[COND_END:%.*]] 956 // CHECK3: cond.false: 957 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 958 // CHECK3-NEXT: br label [[COND_END]] 959 // CHECK3: cond.end: 960 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 961 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 962 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 963 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 964 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 965 // CHECK3: omp.inner.for.cond: 966 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 967 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 968 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 969 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 970 // CHECK3: omp.inner.for.body: 971 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 972 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 973 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 974 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 975 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 976 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 977 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 978 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 979 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 980 // CHECK3: omp.body.continue: 981 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 982 // CHECK3: omp.inner.for.inc: 983 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 984 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 985 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 986 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 987 // CHECK3: omp.inner.for.end: 988 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 989 // CHECK3: omp.loop.exit: 990 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 991 // CHECK3-NEXT: ret void 992 // 993 // 994 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 995 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 996 // CHECK3-NEXT: entry: 997 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 998 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 999 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1000 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1001 // CHECK3-NEXT: ret void 1002 // 1003 // 1004 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1005 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1006 // CHECK3-NEXT: entry: 1007 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1008 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1009 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1010 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1011 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1012 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1013 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1014 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1015 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1016 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1017 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1018 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1019 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1020 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1021 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1022 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1023 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1024 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1025 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1026 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1027 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1028 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1029 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1030 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1031 // CHECK3: cond.true: 1032 // CHECK3-NEXT: br label [[COND_END:%.*]] 1033 // CHECK3: cond.false: 1034 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1035 // CHECK3-NEXT: br label [[COND_END]] 1036 // CHECK3: cond.end: 1037 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1038 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1039 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1040 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1041 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1042 // CHECK3: omp.inner.for.cond: 1043 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1044 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1045 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1046 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1047 // CHECK3: omp.inner.for.body: 1048 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1049 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1050 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1051 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1052 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1053 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1054 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 1055 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1056 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1057 // CHECK3: omp.body.continue: 1058 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1059 // CHECK3: omp.inner.for.inc: 1060 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1061 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1062 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1063 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1064 // CHECK3: omp.inner.for.end: 1065 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1066 // CHECK3: omp.loop.exit: 1067 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1068 // CHECK3-NEXT: ret void 1069 // 1070 // 1071 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 1072 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1073 // CHECK3-NEXT: entry: 1074 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1075 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1076 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1077 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1078 // CHECK3-NEXT: ret void 1079 // 1080 // 1081 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 1082 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1083 // CHECK3-NEXT: entry: 1084 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1085 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1086 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1087 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1088 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1089 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1090 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1091 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1092 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1093 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1094 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1095 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1096 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1097 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1098 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1099 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1100 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1101 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1102 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1103 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1104 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 1105 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1106 // CHECK3: omp.dispatch.cond: 1107 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1108 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1109 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1110 // CHECK3: cond.true: 1111 // CHECK3-NEXT: br label [[COND_END:%.*]] 1112 // CHECK3: cond.false: 1113 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1114 // CHECK3-NEXT: br label [[COND_END]] 1115 // CHECK3: cond.end: 1116 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1117 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1118 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1119 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1120 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1121 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1122 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1123 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1124 // CHECK3: omp.dispatch.body: 1125 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1126 // CHECK3: omp.inner.for.cond: 1127 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1128 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1129 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1130 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1131 // CHECK3: omp.inner.for.body: 1132 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1133 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1134 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1135 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 1136 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1137 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1138 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 1139 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1140 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1141 // CHECK3: omp.body.continue: 1142 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1143 // CHECK3: omp.inner.for.inc: 1144 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1145 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1146 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1147 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1148 // CHECK3: omp.inner.for.end: 1149 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1150 // CHECK3: omp.dispatch.inc: 1151 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1152 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1153 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1154 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 1155 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1156 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1157 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 1158 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 1159 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 1160 // CHECK3: omp.dispatch.end: 1161 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1162 // CHECK3-NEXT: ret void 1163 // 1164 // 1165 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1166 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 1167 // CHECK3-NEXT: entry: 1168 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1169 // CHECK3-NEXT: ret void 1170 // 1171 // 1172 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1173 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 1174 // CHECK4-NEXT: entry: 1175 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1176 // CHECK4-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 1177 // CHECK4-NEXT: ret i32 [[CALL]] 1178 // 1179 // 1180 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1181 // CHECK4-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1182 // CHECK4-NEXT: entry: 1183 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1184 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1185 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1186 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1187 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1188 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 1189 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 1190 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 1191 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1192 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 1193 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 1194 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 1195 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 1196 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1197 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1198 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1199 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1200 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 1201 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 1202 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1203 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 1204 // CHECK4-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 1205 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1206 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4 1207 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1208 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1209 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 1210 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1211 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1212 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1213 // CHECK4: omp_offload.failed: 1214 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 1215 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1216 // CHECK4: omp_offload.cont: 1217 // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1218 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1219 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 1220 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 1221 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1222 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 1223 // CHECK4-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 1224 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 1225 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4 1226 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1227 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1228 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 1229 // CHECK4-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1230 // CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1231 // CHECK4-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 1232 // CHECK4: omp_offload.failed7: 1233 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(%struct.SS* [[THIS1]]) #[[ATTR2]] 1234 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT8]] 1235 // CHECK4: omp_offload.cont8: 1236 // CHECK4-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1237 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1238 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 1239 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 1240 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1241 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 1242 // CHECK4-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 1243 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 1244 // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 4 1245 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1246 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1247 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 1248 // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1249 // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1250 // CHECK4-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 1251 // CHECK4: omp_offload.failed14: 1252 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(%struct.SS* [[THIS1]]) #[[ATTR2]] 1253 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT15]] 1254 // CHECK4: omp_offload.cont15: 1255 // CHECK4-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1256 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0 1257 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1258 // CHECK4-NEXT: ret i32 [[TMP27]] 1259 // 1260 // 1261 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 1262 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 1263 // CHECK4-NEXT: entry: 1264 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1265 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1266 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1267 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1268 // CHECK4-NEXT: ret void 1269 // 1270 // 1271 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1272 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1273 // CHECK4-NEXT: entry: 1274 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1275 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1276 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1277 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1278 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1279 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1280 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1281 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1282 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1283 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1284 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1285 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1286 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1287 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1288 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1289 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1290 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1291 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1292 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1293 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1294 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1295 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1296 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1297 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1298 // CHECK4: cond.true: 1299 // CHECK4-NEXT: br label [[COND_END:%.*]] 1300 // CHECK4: cond.false: 1301 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1302 // CHECK4-NEXT: br label [[COND_END]] 1303 // CHECK4: cond.end: 1304 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1305 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1306 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1307 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1308 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1309 // CHECK4: omp.inner.for.cond: 1310 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1311 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1312 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1313 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1314 // CHECK4: omp.inner.for.body: 1315 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1316 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1317 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1318 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1319 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1320 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1321 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 1322 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1323 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1324 // CHECK4: omp.body.continue: 1325 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1326 // CHECK4: omp.inner.for.inc: 1327 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1328 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1329 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1330 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1331 // CHECK4: omp.inner.for.end: 1332 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1333 // CHECK4: omp.loop.exit: 1334 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1335 // CHECK4-NEXT: ret void 1336 // 1337 // 1338 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 1339 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1340 // CHECK4-NEXT: entry: 1341 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1342 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1343 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1344 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1345 // CHECK4-NEXT: ret void 1346 // 1347 // 1348 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1349 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1350 // CHECK4-NEXT: entry: 1351 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1352 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1353 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1354 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1355 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1356 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1357 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1358 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1359 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1360 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1361 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1362 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1363 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1364 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1365 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1366 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1367 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1368 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1369 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1370 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1371 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1372 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1373 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1374 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1375 // CHECK4: cond.true: 1376 // CHECK4-NEXT: br label [[COND_END:%.*]] 1377 // CHECK4: cond.false: 1378 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1379 // CHECK4-NEXT: br label [[COND_END]] 1380 // CHECK4: cond.end: 1381 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1382 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1383 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1384 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1385 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1386 // CHECK4: omp.inner.for.cond: 1387 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1388 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1389 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1390 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1391 // CHECK4: omp.inner.for.body: 1392 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1393 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1394 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1395 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1396 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1397 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1398 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 1399 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1400 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1401 // CHECK4: omp.body.continue: 1402 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1403 // CHECK4: omp.inner.for.inc: 1404 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1405 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1406 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1407 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1408 // CHECK4: omp.inner.for.end: 1409 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1410 // CHECK4: omp.loop.exit: 1411 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1412 // CHECK4-NEXT: ret void 1413 // 1414 // 1415 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 1416 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1417 // CHECK4-NEXT: entry: 1418 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1419 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1420 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1421 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1422 // CHECK4-NEXT: ret void 1423 // 1424 // 1425 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4 1426 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1427 // CHECK4-NEXT: entry: 1428 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1429 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1430 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1431 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1432 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1433 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1434 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1435 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1436 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1437 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1438 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1439 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1440 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1441 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1442 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1443 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1444 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1445 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1446 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1447 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1448 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 1449 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1450 // CHECK4: omp.dispatch.cond: 1451 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1452 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1453 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1454 // CHECK4: cond.true: 1455 // CHECK4-NEXT: br label [[COND_END:%.*]] 1456 // CHECK4: cond.false: 1457 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1458 // CHECK4-NEXT: br label [[COND_END]] 1459 // CHECK4: cond.end: 1460 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1461 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1462 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1463 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1464 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1465 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1466 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1467 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1468 // CHECK4: omp.dispatch.body: 1469 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1470 // CHECK4: omp.inner.for.cond: 1471 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1472 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1473 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1474 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1475 // CHECK4: omp.inner.for.body: 1476 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1477 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1478 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1479 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 1480 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1481 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1482 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 1483 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1484 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1485 // CHECK4: omp.body.continue: 1486 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1487 // CHECK4: omp.inner.for.inc: 1488 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1489 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1490 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1491 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1492 // CHECK4: omp.inner.for.end: 1493 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1494 // CHECK4: omp.dispatch.inc: 1495 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1496 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1497 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1498 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 1499 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1500 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1501 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 1502 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 1503 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 1504 // CHECK4: omp.dispatch.end: 1505 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1506 // CHECK4-NEXT: ret void 1507 // 1508 // 1509 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1510 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 1511 // CHECK4-NEXT: entry: 1512 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1513 // CHECK4-NEXT: ret void 1514 // 1515 // 1516 // CHECK9-LABEL: define {{[^@]+}}@main 1517 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1518 // CHECK9-NEXT: entry: 1519 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1520 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1521 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 1522 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1523 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1524 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1525 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1526 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 1527 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 1528 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 1529 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 1530 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1531 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1532 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1533 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 1534 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 1535 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 1536 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 1537 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 1538 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 1539 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1540 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 1541 // CHECK9-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 1542 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [3 x i8*], align 8 1543 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [3 x i8*], align 8 1544 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [3 x i8*], align 8 1545 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [3 x i64], align 8 1546 // CHECK9-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 1547 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 1548 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 1549 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1550 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1551 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 1552 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 1553 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1554 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1555 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1556 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 1557 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1558 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1559 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 1560 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1561 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1562 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 1563 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 1564 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1565 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 1566 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1567 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1568 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 1569 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1570 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1571 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 1572 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1573 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1574 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1575 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1576 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 1577 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1578 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1579 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 1580 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1581 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1582 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1583 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 1584 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 1585 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1586 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 1587 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 1588 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1589 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 1590 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1591 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1592 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1593 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1594 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1595 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 1596 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 1597 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1598 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 1599 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1600 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1601 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1602 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1603 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 1604 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 1605 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 1606 // CHECK9-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1607 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 1608 // CHECK9-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1609 // CHECK9: omp_offload.failed: 1610 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1611 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1612 // CHECK9: omp_offload.cont: 1613 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 1614 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 1615 // CHECK9-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 1616 // CHECK9-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 1617 // CHECK9-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 1618 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 1619 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 1620 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1621 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 1622 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 1623 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1624 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 1625 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 1626 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 1627 // CHECK9-NEXT: store i8* null, i8** [[TMP40]], align 8 1628 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1629 // CHECK9-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 1630 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 1631 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1632 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 1633 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 1634 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 1635 // CHECK9-NEXT: store i8* null, i8** [[TMP45]], align 8 1636 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 1637 // CHECK9-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 1638 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 1639 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 1640 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 1641 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 1642 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 1643 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 1644 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 1645 // CHECK9-NEXT: store i8* null, i8** [[TMP51]], align 8 1646 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1647 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1648 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 1649 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 1650 // CHECK9-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1651 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1652 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 1653 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 1654 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 1655 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 1656 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 1657 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 1658 // CHECK9-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 1659 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP58]]) 1660 // CHECK9-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1661 // CHECK9-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 1662 // CHECK9-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 1663 // CHECK9: omp_offload.failed16: 1664 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 1665 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]] 1666 // CHECK9: omp_offload.cont17: 1667 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[N]], align 4 1668 // CHECK9-NEXT: [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32* 1669 // CHECK9-NEXT: store i32 [[TMP61]], i32* [[CONV19]], align 4 1670 // CHECK9-NEXT: [[TMP62:%.*]] = load i64, i64* [[N_CASTED18]], align 8 1671 // CHECK9-NEXT: [[TMP63:%.*]] = mul nuw i64 [[TMP1]], 4 1672 // CHECK9-NEXT: [[TMP64:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES23]] to i8* 1673 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP64]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.5 to i8*), i64 24, i1 false) 1674 // CHECK9-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 1675 // CHECK9-NEXT: [[TMP66:%.*]] = bitcast i8** [[TMP65]] to i64* 1676 // CHECK9-NEXT: store i64 [[TMP62]], i64* [[TMP66]], align 8 1677 // CHECK9-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 1678 // CHECK9-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i64* 1679 // CHECK9-NEXT: store i64 [[TMP62]], i64* [[TMP68]], align 8 1680 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 1681 // CHECK9-NEXT: store i8* null, i8** [[TMP69]], align 8 1682 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 1683 // CHECK9-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 1684 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP71]], align 8 1685 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 1686 // CHECK9-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 1687 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP73]], align 8 1688 // CHECK9-NEXT: [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 1689 // CHECK9-NEXT: store i8* null, i8** [[TMP74]], align 8 1690 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 1691 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32** 1692 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP76]], align 8 1693 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 1694 // CHECK9-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32** 1695 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP78]], align 8 1696 // CHECK9-NEXT: [[TMP79:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 1697 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP79]], align 8 1698 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 1699 // CHECK9-NEXT: store i8* null, i8** [[TMP80]], align 8 1700 // CHECK9-NEXT: [[TMP81:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 1701 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 1702 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 1703 // CHECK9-NEXT: [[TMP84:%.*]] = load i32, i32* [[N]], align 4 1704 // CHECK9-NEXT: store i32 [[TMP84]], i32* [[DOTCAPTURE_EXPR_25]], align 4 1705 // CHECK9-NEXT: [[TMP85:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 1706 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP85]], 0 1707 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 1708 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 1709 // CHECK9-NEXT: store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4 1710 // CHECK9-NEXT: [[TMP86:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 1711 // CHECK9-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP86]], 1 1712 // CHECK9-NEXT: [[TMP87:%.*]] = zext i32 [[ADD30]] to i64 1713 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP87]]) 1714 // CHECK9-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP81]], i8** [[TMP82]], i64* [[TMP83]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1715 // CHECK9-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0 1716 // CHECK9-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]] 1717 // CHECK9: omp_offload.failed31: 1718 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP62]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 1719 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT32]] 1720 // CHECK9: omp_offload.cont32: 1721 // CHECK9-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1722 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP90]]) 1723 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1724 // CHECK9-NEXT: [[TMP91:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1725 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP91]]) 1726 // CHECK9-NEXT: [[TMP92:%.*]] = load i32, i32* [[RETVAL]], align 4 1727 // CHECK9-NEXT: ret i32 [[TMP92]] 1728 // 1729 // 1730 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100 1731 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1732 // CHECK9-NEXT: entry: 1733 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1734 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1735 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1736 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1737 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1738 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1739 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1740 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1741 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1742 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1743 // CHECK9-NEXT: ret void 1744 // 1745 // 1746 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1747 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1748 // CHECK9-NEXT: entry: 1749 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1750 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1751 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1752 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1753 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1754 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1755 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1756 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1757 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1758 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1759 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1760 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1761 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1762 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1763 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1764 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1765 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1766 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1767 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1768 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1769 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1770 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1771 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1772 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1773 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1774 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1775 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1776 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1777 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1778 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1779 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1780 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1781 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1782 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1783 // CHECK9: omp.precond.then: 1784 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1785 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1786 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1787 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1788 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1789 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1790 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1791 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1792 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1793 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1794 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1795 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1796 // CHECK9: cond.true: 1797 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1798 // CHECK9-NEXT: br label [[COND_END:%.*]] 1799 // CHECK9: cond.false: 1800 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1801 // CHECK9-NEXT: br label [[COND_END]] 1802 // CHECK9: cond.end: 1803 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1804 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1805 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1806 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1807 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1808 // CHECK9: omp.inner.for.cond: 1809 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1810 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1811 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1812 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1813 // CHECK9: omp.inner.for.body: 1814 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1815 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1816 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1817 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1818 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 1819 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1820 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1821 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1822 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1823 // CHECK9: omp.body.continue: 1824 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1825 // CHECK9: omp.inner.for.inc: 1826 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1827 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 1828 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1829 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1830 // CHECK9: omp.inner.for.end: 1831 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1832 // CHECK9: omp.loop.exit: 1833 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1834 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1835 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1836 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1837 // CHECK9: omp.precond.end: 1838 // CHECK9-NEXT: ret void 1839 // 1840 // 1841 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 1842 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1843 // CHECK9-NEXT: entry: 1844 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1845 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1846 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1847 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1848 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1849 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1850 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1851 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1852 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1853 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1854 // CHECK9-NEXT: ret void 1855 // 1856 // 1857 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1858 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1859 // CHECK9-NEXT: entry: 1860 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1861 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1862 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1863 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1864 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1865 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1866 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1867 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1868 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1869 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1870 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1871 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1872 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1873 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1874 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1875 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1876 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1877 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1878 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1879 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1880 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1881 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1882 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1883 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1884 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1885 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1886 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1887 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1888 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1889 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1890 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1891 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1892 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1893 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1894 // CHECK9: omp.precond.then: 1895 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1896 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1897 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1898 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1899 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1900 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1901 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1902 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1903 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1904 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1905 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1906 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1907 // CHECK9: cond.true: 1908 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1909 // CHECK9-NEXT: br label [[COND_END:%.*]] 1910 // CHECK9: cond.false: 1911 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1912 // CHECK9-NEXT: br label [[COND_END]] 1913 // CHECK9: cond.end: 1914 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1915 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1916 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1917 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1918 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1919 // CHECK9: omp.inner.for.cond: 1920 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1921 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1922 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1923 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1924 // CHECK9: omp.inner.for.body: 1925 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1926 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1927 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1928 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1929 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 1930 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1931 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1932 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1933 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1934 // CHECK9: omp.body.continue: 1935 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1936 // CHECK9: omp.inner.for.inc: 1937 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1938 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 1939 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1940 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1941 // CHECK9: omp.inner.for.end: 1942 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1943 // CHECK9: omp.loop.exit: 1944 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1945 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1946 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1947 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1948 // CHECK9: omp.precond.end: 1949 // CHECK9-NEXT: ret void 1950 // 1951 // 1952 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110 1953 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1954 // CHECK9-NEXT: entry: 1955 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1956 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1957 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1958 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1959 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1960 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1961 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1962 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1963 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1964 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1965 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1966 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1967 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1968 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1969 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1970 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 1971 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1972 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 1973 // CHECK9-NEXT: ret void 1974 // 1975 // 1976 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 1977 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1978 // CHECK9-NEXT: entry: 1979 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1980 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1981 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1982 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1983 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1984 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1985 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1986 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1987 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1988 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1989 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1990 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1991 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1992 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1993 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1994 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 1995 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1996 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1997 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1998 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1999 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2000 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2001 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2002 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2003 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2004 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2005 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2006 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2007 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2008 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2009 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2010 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2011 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2012 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 2013 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2014 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2015 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2016 // CHECK9: omp.precond.then: 2017 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2018 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2019 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2020 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2021 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2022 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 2023 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2024 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2025 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 2026 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2027 // CHECK9: omp.dispatch.cond: 2028 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2029 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2030 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2031 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2032 // CHECK9: cond.true: 2033 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2034 // CHECK9-NEXT: br label [[COND_END:%.*]] 2035 // CHECK9: cond.false: 2036 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2037 // CHECK9-NEXT: br label [[COND_END]] 2038 // CHECK9: cond.end: 2039 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2040 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2041 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2042 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2043 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2044 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2045 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2046 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2047 // CHECK9: omp.dispatch.body: 2048 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2049 // CHECK9: omp.inner.for.cond: 2050 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2051 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 2052 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2053 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2054 // CHECK9: omp.inner.for.body: 2055 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2056 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 2057 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2058 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !11 2059 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !11 2060 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 2061 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 2062 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 2063 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2064 // CHECK9: omp.body.continue: 2065 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2066 // CHECK9: omp.inner.for.inc: 2067 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2068 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 2069 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2070 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 2071 // CHECK9: omp.inner.for.end: 2072 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2073 // CHECK9: omp.dispatch.inc: 2074 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2075 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2076 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2077 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 2078 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2079 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2080 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 2081 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 2082 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 2083 // CHECK9: omp.dispatch.end: 2084 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2085 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 2086 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 2087 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2088 // CHECK9: omp.precond.end: 2089 // CHECK9-NEXT: ret void 2090 // 2091 // 2092 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 2093 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2094 // CHECK9-NEXT: entry: 2095 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2096 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 2097 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2098 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2099 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2100 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2101 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 2102 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 2103 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 2104 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2105 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8 2106 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8 2107 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8 2108 // CHECK9-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 2109 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2110 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2111 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 2112 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 2113 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2114 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 2115 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 2116 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2117 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 2118 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2119 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2120 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2121 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2122 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2123 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2124 // CHECK9: omp_offload.failed: 2125 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]] 2126 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2127 // CHECK9: omp_offload.cont: 2128 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2129 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 2130 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 2131 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2132 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 2133 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 2134 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 2135 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 2136 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2137 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2138 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2139 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2140 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2141 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 2142 // CHECK9: omp_offload.failed5: 2143 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 2144 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 2145 // CHECK9: omp_offload.cont6: 2146 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2147 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 2148 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 2149 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2150 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 2151 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 2152 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 2153 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 2154 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2155 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2156 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2157 // CHECK9-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2158 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2159 // CHECK9-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 2160 // CHECK9: omp_offload.failed11: 2161 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]] 2162 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT12]] 2163 // CHECK9: omp_offload.cont12: 2164 // CHECK9-NEXT: ret i32 0 2165 // 2166 // 2167 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79 2168 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2169 // CHECK9-NEXT: entry: 2170 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2171 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2172 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2173 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2174 // CHECK9-NEXT: ret void 2175 // 2176 // 2177 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 2178 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2179 // CHECK9-NEXT: entry: 2180 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2181 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2182 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2183 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2184 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2185 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2186 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2187 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2188 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2189 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2190 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2191 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2192 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2193 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2194 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2195 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2196 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2197 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2198 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2199 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2200 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2201 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2202 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2203 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2204 // CHECK9: cond.true: 2205 // CHECK9-NEXT: br label [[COND_END:%.*]] 2206 // CHECK9: cond.false: 2207 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2208 // CHECK9-NEXT: br label [[COND_END]] 2209 // CHECK9: cond.end: 2210 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2211 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2212 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2213 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2214 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2215 // CHECK9: omp.inner.for.cond: 2216 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2217 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2218 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2219 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2220 // CHECK9: omp.inner.for.body: 2221 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2222 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2223 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2224 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2225 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2226 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2227 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2228 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2229 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2230 // CHECK9: omp.body.continue: 2231 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2232 // CHECK9: omp.inner.for.inc: 2233 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2234 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2235 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2236 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2237 // CHECK9: omp.inner.for.end: 2238 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2239 // CHECK9: omp.loop.exit: 2240 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2241 // CHECK9-NEXT: ret void 2242 // 2243 // 2244 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 2245 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2246 // CHECK9-NEXT: entry: 2247 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2248 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2249 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2250 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2251 // CHECK9-NEXT: ret void 2252 // 2253 // 2254 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 2255 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2256 // CHECK9-NEXT: entry: 2257 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2258 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2259 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2260 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2261 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2262 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2263 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2264 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2265 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2266 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2267 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2268 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2269 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2270 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2271 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2272 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2273 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2274 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2275 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2276 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2277 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2278 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2279 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2280 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2281 // CHECK9: cond.true: 2282 // CHECK9-NEXT: br label [[COND_END:%.*]] 2283 // CHECK9: cond.false: 2284 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2285 // CHECK9-NEXT: br label [[COND_END]] 2286 // CHECK9: cond.end: 2287 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2288 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2289 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2290 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2291 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2292 // CHECK9: omp.inner.for.cond: 2293 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2294 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2295 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2296 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2297 // CHECK9: omp.inner.for.body: 2298 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2299 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2300 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2301 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2302 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2303 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2304 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2305 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2306 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2307 // CHECK9: omp.body.continue: 2308 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2309 // CHECK9: omp.inner.for.inc: 2310 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2311 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2312 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2313 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2314 // CHECK9: omp.inner.for.end: 2315 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2316 // CHECK9: omp.loop.exit: 2317 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2318 // CHECK9-NEXT: ret void 2319 // 2320 // 2321 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89 2322 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2323 // CHECK9-NEXT: entry: 2324 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2325 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2326 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2327 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2328 // CHECK9-NEXT: ret void 2329 // 2330 // 2331 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13 2332 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2333 // CHECK9-NEXT: entry: 2334 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2335 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2336 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2337 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2338 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2339 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2340 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2341 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2342 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2343 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2344 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2345 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2346 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2347 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2348 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2349 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2350 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2351 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2352 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2353 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2354 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 2355 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2356 // CHECK9: omp.dispatch.cond: 2357 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2358 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2359 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2360 // CHECK9: cond.true: 2361 // CHECK9-NEXT: br label [[COND_END:%.*]] 2362 // CHECK9: cond.false: 2363 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2364 // CHECK9-NEXT: br label [[COND_END]] 2365 // CHECK9: cond.end: 2366 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2367 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2368 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2369 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2370 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2371 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2372 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2373 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2374 // CHECK9: omp.dispatch.body: 2375 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2376 // CHECK9: omp.inner.for.cond: 2377 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2378 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 2379 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2380 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2381 // CHECK9: omp.inner.for.body: 2382 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2383 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2384 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2385 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 2386 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 2387 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2388 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2389 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 2390 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2391 // CHECK9: omp.body.continue: 2392 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2393 // CHECK9: omp.inner.for.inc: 2394 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2395 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2396 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2397 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 2398 // CHECK9: omp.inner.for.end: 2399 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2400 // CHECK9: omp.dispatch.inc: 2401 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2402 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2403 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2404 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 2405 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2406 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2407 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 2408 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 2409 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 2410 // CHECK9: omp.dispatch.end: 2411 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2412 // CHECK9-NEXT: ret void 2413 // 2414 // 2415 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2416 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 2417 // CHECK9-NEXT: entry: 2418 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2419 // CHECK9-NEXT: ret void 2420 // 2421 // 2422 // CHECK10-LABEL: define {{[^@]+}}@main 2423 // CHECK10-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2424 // CHECK10-NEXT: entry: 2425 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2426 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2427 // CHECK10-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 2428 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4 2429 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2430 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2431 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2432 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 2433 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 2434 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 2435 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 2436 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2437 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2438 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2439 // CHECK10-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 2440 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 2441 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 2442 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 2443 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 2444 // CHECK10-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 2445 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 2446 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 2447 // CHECK10-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 2448 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [3 x i8*], align 8 2449 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [3 x i8*], align 8 2450 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [3 x i8*], align 8 2451 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [3 x i64], align 8 2452 // CHECK10-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 2453 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 2454 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 2455 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 2456 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2457 // CHECK10-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 2458 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4 2459 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2460 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2461 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2462 // CHECK10-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2463 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2464 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2465 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2466 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2467 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 2468 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 2469 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 2470 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2471 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 2472 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2473 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2474 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 2475 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2476 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2477 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 2478 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2479 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 2480 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2481 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 2482 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 2483 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2484 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 2485 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 2486 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2487 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 2488 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2489 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 2490 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 2491 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2492 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 2493 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 2494 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2495 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 2496 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2497 // CHECK10-NEXT: store i8* null, i8** [[TMP22]], align 8 2498 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2499 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2500 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2501 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 2502 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 2503 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2504 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 2505 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2506 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2507 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2508 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2509 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 2510 // CHECK10-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 2511 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 2512 // CHECK10-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2513 // CHECK10-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2514 // CHECK10-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2515 // CHECK10: omp_offload.failed: 2516 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2517 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 2518 // CHECK10: omp_offload.cont: 2519 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 2520 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 2521 // CHECK10-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 2522 // CHECK10-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 2523 // CHECK10-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 2524 // CHECK10-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 2525 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 2526 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 2527 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 2528 // CHECK10-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 2529 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 2530 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 2531 // CHECK10-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 2532 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 2533 // CHECK10-NEXT: store i8* null, i8** [[TMP40]], align 8 2534 // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 2535 // CHECK10-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 2536 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 2537 // CHECK10-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 2538 // CHECK10-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 2539 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 2540 // CHECK10-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 2541 // CHECK10-NEXT: store i8* null, i8** [[TMP45]], align 8 2542 // CHECK10-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 2543 // CHECK10-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 2544 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 2545 // CHECK10-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 2546 // CHECK10-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 2547 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 2548 // CHECK10-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 2549 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 2550 // CHECK10-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 2551 // CHECK10-NEXT: store i8* null, i8** [[TMP51]], align 8 2552 // CHECK10-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 2553 // CHECK10-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 2554 // CHECK10-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 2555 // CHECK10-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 2556 // CHECK10-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 2557 // CHECK10-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 2558 // CHECK10-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 2559 // CHECK10-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 2560 // CHECK10-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 2561 // CHECK10-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 2562 // CHECK10-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 2563 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 2564 // CHECK10-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 2565 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP58]]) 2566 // CHECK10-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2567 // CHECK10-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 2568 // CHECK10-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 2569 // CHECK10: omp_offload.failed16: 2570 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 2571 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT17]] 2572 // CHECK10: omp_offload.cont17: 2573 // CHECK10-NEXT: [[TMP61:%.*]] = load i32, i32* [[N]], align 4 2574 // CHECK10-NEXT: [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32* 2575 // CHECK10-NEXT: store i32 [[TMP61]], i32* [[CONV19]], align 4 2576 // CHECK10-NEXT: [[TMP62:%.*]] = load i64, i64* [[N_CASTED18]], align 8 2577 // CHECK10-NEXT: [[TMP63:%.*]] = mul nuw i64 [[TMP1]], 4 2578 // CHECK10-NEXT: [[TMP64:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES23]] to i8* 2579 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP64]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.5 to i8*), i64 24, i1 false) 2580 // CHECK10-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 2581 // CHECK10-NEXT: [[TMP66:%.*]] = bitcast i8** [[TMP65]] to i64* 2582 // CHECK10-NEXT: store i64 [[TMP62]], i64* [[TMP66]], align 8 2583 // CHECK10-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 2584 // CHECK10-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i64* 2585 // CHECK10-NEXT: store i64 [[TMP62]], i64* [[TMP68]], align 8 2586 // CHECK10-NEXT: [[TMP69:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 2587 // CHECK10-NEXT: store i8* null, i8** [[TMP69]], align 8 2588 // CHECK10-NEXT: [[TMP70:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 2589 // CHECK10-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 2590 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP71]], align 8 2591 // CHECK10-NEXT: [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 2592 // CHECK10-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 2593 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP73]], align 8 2594 // CHECK10-NEXT: [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 2595 // CHECK10-NEXT: store i8* null, i8** [[TMP74]], align 8 2596 // CHECK10-NEXT: [[TMP75:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 2597 // CHECK10-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32** 2598 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP76]], align 8 2599 // CHECK10-NEXT: [[TMP77:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 2600 // CHECK10-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32** 2601 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP78]], align 8 2602 // CHECK10-NEXT: [[TMP79:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 2603 // CHECK10-NEXT: store i64 [[TMP63]], i64* [[TMP79]], align 8 2604 // CHECK10-NEXT: [[TMP80:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 2605 // CHECK10-NEXT: store i8* null, i8** [[TMP80]], align 8 2606 // CHECK10-NEXT: [[TMP81:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 2607 // CHECK10-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 2608 // CHECK10-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 2609 // CHECK10-NEXT: [[TMP84:%.*]] = load i32, i32* [[N]], align 4 2610 // CHECK10-NEXT: store i32 [[TMP84]], i32* [[DOTCAPTURE_EXPR_25]], align 4 2611 // CHECK10-NEXT: [[TMP85:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 2612 // CHECK10-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP85]], 0 2613 // CHECK10-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 2614 // CHECK10-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 2615 // CHECK10-NEXT: store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4 2616 // CHECK10-NEXT: [[TMP86:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 2617 // CHECK10-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP86]], 1 2618 // CHECK10-NEXT: [[TMP87:%.*]] = zext i32 [[ADD30]] to i64 2619 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP87]]) 2620 // CHECK10-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP81]], i8** [[TMP82]], i64* [[TMP83]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2621 // CHECK10-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0 2622 // CHECK10-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]] 2623 // CHECK10: omp_offload.failed31: 2624 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP62]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 2625 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT32]] 2626 // CHECK10: omp_offload.cont32: 2627 // CHECK10-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2628 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP90]]) 2629 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2630 // CHECK10-NEXT: [[TMP91:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2631 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP91]]) 2632 // CHECK10-NEXT: [[TMP92:%.*]] = load i32, i32* [[RETVAL]], align 4 2633 // CHECK10-NEXT: ret i32 [[TMP92]] 2634 // 2635 // 2636 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100 2637 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2638 // CHECK10-NEXT: entry: 2639 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2640 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2641 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2642 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2643 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2644 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2645 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2646 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2647 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2648 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 2649 // CHECK10-NEXT: ret void 2650 // 2651 // 2652 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 2653 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2654 // CHECK10-NEXT: entry: 2655 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2656 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2657 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2658 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2659 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2660 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2661 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2662 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2663 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2664 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2665 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2666 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2667 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2668 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2669 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 2670 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2671 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2672 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2673 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2674 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2675 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2676 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2677 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2678 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2679 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2680 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2681 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2682 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2683 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2684 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2685 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2686 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2687 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2688 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2689 // CHECK10: omp.precond.then: 2690 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2691 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2692 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2693 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2694 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2695 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2696 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2697 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2698 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2699 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2700 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2701 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2702 // CHECK10: cond.true: 2703 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2704 // CHECK10-NEXT: br label [[COND_END:%.*]] 2705 // CHECK10: cond.false: 2706 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2707 // CHECK10-NEXT: br label [[COND_END]] 2708 // CHECK10: cond.end: 2709 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2710 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2711 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2712 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2713 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2714 // CHECK10: omp.inner.for.cond: 2715 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2716 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2717 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2718 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2719 // CHECK10: omp.inner.for.body: 2720 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2721 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2722 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2723 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2724 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2725 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 2726 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 2727 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2728 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2729 // CHECK10: omp.body.continue: 2730 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2731 // CHECK10: omp.inner.for.inc: 2732 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2733 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2734 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2735 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2736 // CHECK10: omp.inner.for.end: 2737 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2738 // CHECK10: omp.loop.exit: 2739 // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2740 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2741 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2742 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2743 // CHECK10: omp.precond.end: 2744 // CHECK10-NEXT: ret void 2745 // 2746 // 2747 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 2748 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2749 // CHECK10-NEXT: entry: 2750 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2751 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2752 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2753 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2754 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2755 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2756 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2757 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2758 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2759 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 2760 // CHECK10-NEXT: ret void 2761 // 2762 // 2763 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2764 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2765 // CHECK10-NEXT: entry: 2766 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2767 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2768 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2769 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2770 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2771 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2772 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2773 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2774 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2775 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2776 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2777 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2778 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2779 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2780 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 2781 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2782 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2783 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2784 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2785 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2786 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2787 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2788 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2789 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2790 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2791 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2792 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2793 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2794 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2795 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2796 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2797 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2798 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2799 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2800 // CHECK10: omp.precond.then: 2801 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2802 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2803 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2804 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2805 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2806 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2807 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2808 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2809 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2810 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2811 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2812 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2813 // CHECK10: cond.true: 2814 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2815 // CHECK10-NEXT: br label [[COND_END:%.*]] 2816 // CHECK10: cond.false: 2817 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2818 // CHECK10-NEXT: br label [[COND_END]] 2819 // CHECK10: cond.end: 2820 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2821 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2822 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2823 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2824 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2825 // CHECK10: omp.inner.for.cond: 2826 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2827 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2828 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2829 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2830 // CHECK10: omp.inner.for.body: 2831 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2832 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2833 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2834 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2835 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2836 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 2837 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 2838 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2839 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2840 // CHECK10: omp.body.continue: 2841 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2842 // CHECK10: omp.inner.for.inc: 2843 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2844 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2845 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2846 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2847 // CHECK10: omp.inner.for.end: 2848 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2849 // CHECK10: omp.loop.exit: 2850 // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2851 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2852 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2853 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2854 // CHECK10: omp.precond.end: 2855 // CHECK10-NEXT: ret void 2856 // 2857 // 2858 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110 2859 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2860 // CHECK10-NEXT: entry: 2861 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2862 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2863 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2864 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2865 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2866 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2867 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2868 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2869 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2870 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2871 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2872 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2873 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2874 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2875 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 2876 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 2877 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2878 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 2879 // CHECK10-NEXT: ret void 2880 // 2881 // 2882 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4 2883 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2884 // CHECK10-NEXT: entry: 2885 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2886 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2887 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2888 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2889 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2890 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2891 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2892 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2893 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2894 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2895 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2896 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2897 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2898 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2899 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2900 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 2901 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2902 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2903 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2904 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2905 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2906 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2907 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2908 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2909 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2910 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2911 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2912 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2913 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2914 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2915 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2916 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2917 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2918 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2919 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2920 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2921 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2922 // CHECK10: omp.precond.then: 2923 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2924 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2925 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2926 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2927 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2928 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 2929 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2930 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2931 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 2932 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2933 // CHECK10: omp.dispatch.cond: 2934 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2935 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2936 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2937 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2938 // CHECK10: cond.true: 2939 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2940 // CHECK10-NEXT: br label [[COND_END:%.*]] 2941 // CHECK10: cond.false: 2942 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2943 // CHECK10-NEXT: br label [[COND_END]] 2944 // CHECK10: cond.end: 2945 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2946 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2947 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2948 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2949 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2950 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2951 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2952 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2953 // CHECK10: omp.dispatch.body: 2954 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2955 // CHECK10: omp.inner.for.cond: 2956 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2957 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 2958 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2959 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2960 // CHECK10: omp.inner.for.body: 2961 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2962 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 2963 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2964 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !11 2965 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !11 2966 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 2967 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 2968 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 2969 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2970 // CHECK10: omp.body.continue: 2971 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2972 // CHECK10: omp.inner.for.inc: 2973 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2974 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 2975 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2976 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 2977 // CHECK10: omp.inner.for.end: 2978 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2979 // CHECK10: omp.dispatch.inc: 2980 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2981 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2982 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2983 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 2984 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2985 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2986 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 2987 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 2988 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 2989 // CHECK10: omp.dispatch.end: 2990 // CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2991 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 2992 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 2993 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2994 // CHECK10: omp.precond.end: 2995 // CHECK10-NEXT: ret void 2996 // 2997 // 2998 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 2999 // CHECK10-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3000 // CHECK10-NEXT: entry: 3001 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3002 // CHECK10-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3003 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 3004 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 3005 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 3006 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3007 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 3008 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 3009 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 3010 // CHECK10-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3011 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8 3012 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8 3013 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8 3014 // CHECK10-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3015 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3016 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3017 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 3018 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 3019 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3020 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 3021 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 3022 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3023 // CHECK10-NEXT: store i8* null, i8** [[TMP4]], align 8 3024 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3025 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3026 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3027 // CHECK10-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3028 // CHECK10-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3029 // CHECK10-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3030 // CHECK10: omp_offload.failed: 3031 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]] 3032 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 3033 // CHECK10: omp_offload.cont: 3034 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3035 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 3036 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 3037 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3038 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 3039 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 3040 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 3041 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8 3042 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3043 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3044 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3045 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3046 // CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 3047 // CHECK10-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 3048 // CHECK10: omp_offload.failed5: 3049 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 3050 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT6]] 3051 // CHECK10: omp_offload.cont6: 3052 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 3053 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 3054 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 3055 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 3056 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 3057 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 3058 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 3059 // CHECK10-NEXT: store i8* null, i8** [[TMP22]], align 8 3060 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 3061 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 3062 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3063 // CHECK10-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3064 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3065 // CHECK10-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 3066 // CHECK10: omp_offload.failed11: 3067 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]] 3068 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT12]] 3069 // CHECK10: omp_offload.cont12: 3070 // CHECK10-NEXT: ret i32 0 3071 // 3072 // 3073 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79 3074 // CHECK10-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3075 // CHECK10-NEXT: entry: 3076 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3077 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3078 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3079 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3080 // CHECK10-NEXT: ret void 3081 // 3082 // 3083 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7 3084 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3085 // CHECK10-NEXT: entry: 3086 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3087 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3088 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3089 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3090 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3091 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3092 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3093 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3094 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3095 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3096 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3097 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3098 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3099 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3100 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3101 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3102 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3103 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3104 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3105 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3106 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3107 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3108 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3109 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3110 // CHECK10: cond.true: 3111 // CHECK10-NEXT: br label [[COND_END:%.*]] 3112 // CHECK10: cond.false: 3113 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3114 // CHECK10-NEXT: br label [[COND_END]] 3115 // CHECK10: cond.end: 3116 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3117 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3118 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3119 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3120 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3121 // CHECK10: omp.inner.for.cond: 3122 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3123 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3124 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3125 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3126 // CHECK10: omp.inner.for.body: 3127 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3128 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3129 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3130 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3131 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3132 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 3133 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3134 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3135 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3136 // CHECK10: omp.body.continue: 3137 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3138 // CHECK10: omp.inner.for.inc: 3139 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3140 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3141 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3142 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3143 // CHECK10: omp.inner.for.end: 3144 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3145 // CHECK10: omp.loop.exit: 3146 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3147 // CHECK10-NEXT: ret void 3148 // 3149 // 3150 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 3151 // CHECK10-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3152 // CHECK10-NEXT: entry: 3153 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3154 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3155 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3156 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3157 // CHECK10-NEXT: ret void 3158 // 3159 // 3160 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10 3161 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3162 // CHECK10-NEXT: entry: 3163 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3164 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3165 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3166 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3167 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3168 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3169 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3170 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3171 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3172 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3173 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3174 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3175 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3176 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3177 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3178 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3179 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3180 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3181 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3182 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3183 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3184 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3185 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3186 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3187 // CHECK10: cond.true: 3188 // CHECK10-NEXT: br label [[COND_END:%.*]] 3189 // CHECK10: cond.false: 3190 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3191 // CHECK10-NEXT: br label [[COND_END]] 3192 // CHECK10: cond.end: 3193 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3194 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3195 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3196 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3197 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3198 // CHECK10: omp.inner.for.cond: 3199 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3200 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3201 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3202 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3203 // CHECK10: omp.inner.for.body: 3204 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3205 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3206 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3207 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3208 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3209 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 3210 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3211 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3212 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3213 // CHECK10: omp.body.continue: 3214 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3215 // CHECK10: omp.inner.for.inc: 3216 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3217 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3218 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3219 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3220 // CHECK10: omp.inner.for.end: 3221 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3222 // CHECK10: omp.loop.exit: 3223 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3224 // CHECK10-NEXT: ret void 3225 // 3226 // 3227 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89 3228 // CHECK10-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3229 // CHECK10-NEXT: entry: 3230 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3231 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3232 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3233 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3234 // CHECK10-NEXT: ret void 3235 // 3236 // 3237 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..13 3238 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3239 // CHECK10-NEXT: entry: 3240 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3241 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3242 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3243 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3244 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3245 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3246 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3247 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3248 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3249 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3250 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3251 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3252 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3253 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3254 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3255 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3256 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3257 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3258 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3259 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3260 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 3261 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3262 // CHECK10: omp.dispatch.cond: 3263 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3264 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3265 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3266 // CHECK10: cond.true: 3267 // CHECK10-NEXT: br label [[COND_END:%.*]] 3268 // CHECK10: cond.false: 3269 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3270 // CHECK10-NEXT: br label [[COND_END]] 3271 // CHECK10: cond.end: 3272 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3273 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3274 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3275 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3276 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3277 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3278 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3279 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3280 // CHECK10: omp.dispatch.body: 3281 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3282 // CHECK10: omp.inner.for.cond: 3283 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3284 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 3285 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3286 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3287 // CHECK10: omp.inner.for.body: 3288 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3289 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3290 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3291 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 3292 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 3293 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3294 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3295 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 3296 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3297 // CHECK10: omp.body.continue: 3298 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3299 // CHECK10: omp.inner.for.inc: 3300 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3301 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3302 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3303 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 3304 // CHECK10: omp.inner.for.end: 3305 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3306 // CHECK10: omp.dispatch.inc: 3307 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3308 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3309 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 3310 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 3311 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3312 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3313 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 3314 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 3315 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 3316 // CHECK10: omp.dispatch.end: 3317 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3318 // CHECK10-NEXT: ret void 3319 // 3320 // 3321 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3322 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 3323 // CHECK10-NEXT: entry: 3324 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 3325 // CHECK10-NEXT: ret void 3326 // 3327 // 3328 // CHECK11-LABEL: define {{[^@]+}}@main 3329 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3330 // CHECK11-NEXT: entry: 3331 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3332 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3333 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 3334 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 3335 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3336 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3337 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3338 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 3339 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 3340 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 3341 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 3342 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3343 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3344 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3345 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 3346 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 3347 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 3348 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 3349 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 3350 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 3351 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 3352 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 3353 // CHECK11-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 3354 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [3 x i8*], align 4 3355 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [3 x i8*], align 4 3356 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [3 x i8*], align 4 3357 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [3 x i64], align 4 3358 // CHECK11-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 3359 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 3360 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 3361 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 3362 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3363 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 3364 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 3365 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3366 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3367 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3368 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3369 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3370 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 3371 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 3372 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 3373 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 3374 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 3375 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3376 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 3377 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3378 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3379 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 3380 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3381 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3382 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3383 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3384 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 3385 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3386 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 3387 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 3388 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3389 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 3390 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 3391 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3392 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 3393 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3394 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 3395 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 3396 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3397 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 3398 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 3399 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3400 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 3401 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3402 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 3403 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3404 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3405 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3406 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 3407 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 3408 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3409 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 3410 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3411 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3412 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3413 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3414 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 3415 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 3416 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 3417 // CHECK11-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3418 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 3419 // CHECK11-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3420 // CHECK11: omp_offload.failed: 3421 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3422 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 3423 // CHECK11: omp_offload.cont: 3424 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 3425 // CHECK11-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 3426 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 3427 // CHECK11-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 3428 // CHECK11-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 3429 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 3430 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 3431 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 3432 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 3433 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 3434 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 3435 // CHECK11-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 3436 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 3437 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 3438 // CHECK11-NEXT: store i8* null, i8** [[TMP41]], align 4 3439 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 3440 // CHECK11-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 3441 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 3442 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 3443 // CHECK11-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 3444 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 3445 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 3446 // CHECK11-NEXT: store i8* null, i8** [[TMP46]], align 4 3447 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 3448 // CHECK11-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 3449 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 3450 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 3451 // CHECK11-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 3452 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 3453 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 3454 // CHECK11-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 3455 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 3456 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 3457 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 3458 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 3459 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 3460 // CHECK11-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 3461 // CHECK11-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 3462 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 3463 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 3464 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 3465 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 3466 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 3467 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 3468 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 3469 // CHECK11-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 3470 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP59]]) 3471 // CHECK11-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3472 // CHECK11-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 3473 // CHECK11-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 3474 // CHECK11: omp_offload.failed15: 3475 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 3476 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]] 3477 // CHECK11: omp_offload.cont16: 3478 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 3479 // CHECK11-NEXT: store i32 [[TMP62]], i32* [[N_CASTED17]], align 4 3480 // CHECK11-NEXT: [[TMP63:%.*]] = load i32, i32* [[N_CASTED17]], align 4 3481 // CHECK11-NEXT: [[TMP64:%.*]] = mul nuw i32 [[TMP0]], 4 3482 // CHECK11-NEXT: [[TMP65:%.*]] = sext i32 [[TMP64]] to i64 3483 // CHECK11-NEXT: [[TMP66:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES21]] to i8* 3484 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP66]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.5 to i8*), i32 24, i1 false) 3485 // CHECK11-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 3486 // CHECK11-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i32* 3487 // CHECK11-NEXT: store i32 [[TMP63]], i32* [[TMP68]], align 4 3488 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 3489 // CHECK11-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i32* 3490 // CHECK11-NEXT: store i32 [[TMP63]], i32* [[TMP70]], align 4 3491 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 3492 // CHECK11-NEXT: store i8* null, i8** [[TMP71]], align 4 3493 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 3494 // CHECK11-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 3495 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP73]], align 4 3496 // CHECK11-NEXT: [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 3497 // CHECK11-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32* 3498 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP75]], align 4 3499 // CHECK11-NEXT: [[TMP76:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 3500 // CHECK11-NEXT: store i8* null, i8** [[TMP76]], align 4 3501 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 3502 // CHECK11-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32** 3503 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP78]], align 4 3504 // CHECK11-NEXT: [[TMP79:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 3505 // CHECK11-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32** 3506 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP80]], align 4 3507 // CHECK11-NEXT: [[TMP81:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2 3508 // CHECK11-NEXT: store i64 [[TMP65]], i64* [[TMP81]], align 4 3509 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 3510 // CHECK11-NEXT: store i8* null, i8** [[TMP82]], align 4 3511 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 3512 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 3513 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 3514 // CHECK11-NEXT: [[TMP86:%.*]] = load i32, i32* [[N]], align 4 3515 // CHECK11-NEXT: store i32 [[TMP86]], i32* [[DOTCAPTURE_EXPR_23]], align 4 3516 // CHECK11-NEXT: [[TMP87:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 3517 // CHECK11-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP87]], 0 3518 // CHECK11-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 3519 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 3520 // CHECK11-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 3521 // CHECK11-NEXT: [[TMP88:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 3522 // CHECK11-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP88]], 1 3523 // CHECK11-NEXT: [[TMP89:%.*]] = zext i32 [[ADD28]] to i64 3524 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP89]]) 3525 // CHECK11-NEXT: [[TMP90:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP83]], i8** [[TMP84]], i64* [[TMP85]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3526 // CHECK11-NEXT: [[TMP91:%.*]] = icmp ne i32 [[TMP90]], 0 3527 // CHECK11-NEXT: br i1 [[TMP91]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 3528 // CHECK11: omp_offload.failed29: 3529 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP63]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 3530 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT30]] 3531 // CHECK11: omp_offload.cont30: 3532 // CHECK11-NEXT: [[TMP92:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3533 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP92]]) 3534 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3535 // CHECK11-NEXT: [[TMP93:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3536 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP93]]) 3537 // CHECK11-NEXT: [[TMP94:%.*]] = load i32, i32* [[RETVAL]], align 4 3538 // CHECK11-NEXT: ret i32 [[TMP94]] 3539 // 3540 // 3541 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100 3542 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3543 // CHECK11-NEXT: entry: 3544 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3545 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3546 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3547 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3548 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3549 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3550 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3551 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3552 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 3553 // CHECK11-NEXT: ret void 3554 // 3555 // 3556 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 3557 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3558 // CHECK11-NEXT: entry: 3559 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3560 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3561 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3562 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3563 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3564 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3565 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3566 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3567 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3568 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3569 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3570 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3571 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3572 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3573 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 3574 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3575 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3576 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3577 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3578 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3579 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3580 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3581 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3582 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3583 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3584 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3585 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3586 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3587 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3588 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3589 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 3590 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3591 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3592 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3593 // CHECK11: omp.precond.then: 3594 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3595 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3596 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3597 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3598 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3599 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3600 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3601 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3602 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3603 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3604 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3605 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3606 // CHECK11: cond.true: 3607 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3608 // CHECK11-NEXT: br label [[COND_END:%.*]] 3609 // CHECK11: cond.false: 3610 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3611 // CHECK11-NEXT: br label [[COND_END]] 3612 // CHECK11: cond.end: 3613 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3614 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3615 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3616 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3617 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3618 // CHECK11: omp.inner.for.cond: 3619 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3620 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3621 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3622 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3623 // CHECK11: omp.inner.for.body: 3624 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3625 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 3626 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3627 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3628 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 3629 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 3630 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3631 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3632 // CHECK11: omp.body.continue: 3633 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3634 // CHECK11: omp.inner.for.inc: 3635 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3636 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 3637 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3638 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3639 // CHECK11: omp.inner.for.end: 3640 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3641 // CHECK11: omp.loop.exit: 3642 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3643 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3644 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3645 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3646 // CHECK11: omp.precond.end: 3647 // CHECK11-NEXT: ret void 3648 // 3649 // 3650 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 3651 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3652 // CHECK11-NEXT: entry: 3653 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3654 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3655 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3656 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3657 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3658 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3659 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3660 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3661 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 3662 // CHECK11-NEXT: ret void 3663 // 3664 // 3665 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 3666 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3667 // CHECK11-NEXT: entry: 3668 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3669 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3670 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3671 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3672 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3673 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3674 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3675 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3676 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3677 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3678 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3679 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3680 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3681 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3682 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 3683 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3684 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3685 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3686 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3687 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3688 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3689 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3690 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3691 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3692 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3693 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3694 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3695 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3696 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3697 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3698 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 3699 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3700 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3701 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3702 // CHECK11: omp.precond.then: 3703 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3704 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3705 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3706 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3707 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3708 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3709 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3710 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3711 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3712 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3713 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3714 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3715 // CHECK11: cond.true: 3716 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3717 // CHECK11-NEXT: br label [[COND_END:%.*]] 3718 // CHECK11: cond.false: 3719 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3720 // CHECK11-NEXT: br label [[COND_END]] 3721 // CHECK11: cond.end: 3722 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3723 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3724 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3725 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3726 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3727 // CHECK11: omp.inner.for.cond: 3728 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3729 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3730 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3731 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3732 // CHECK11: omp.inner.for.body: 3733 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3734 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 3735 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3736 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3737 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 3738 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 3739 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3740 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3741 // CHECK11: omp.body.continue: 3742 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3743 // CHECK11: omp.inner.for.inc: 3744 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3745 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 3746 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3747 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3748 // CHECK11: omp.inner.for.end: 3749 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3750 // CHECK11: omp.loop.exit: 3751 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3752 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3753 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3754 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3755 // CHECK11: omp.precond.end: 3756 // CHECK11-NEXT: ret void 3757 // 3758 // 3759 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110 3760 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3761 // CHECK11-NEXT: entry: 3762 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3763 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3764 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3765 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3766 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 3767 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3768 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3769 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3770 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3771 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3772 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 3773 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 3774 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3775 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 3776 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 3777 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 3778 // CHECK11-NEXT: ret void 3779 // 3780 // 3781 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 3782 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 3783 // CHECK11-NEXT: entry: 3784 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3785 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3786 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3787 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3788 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3789 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 3790 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3791 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3792 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3793 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3794 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3795 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3796 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3797 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3798 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3799 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 3800 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3801 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3802 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3803 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3804 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3805 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 3806 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3807 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3808 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3809 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3810 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3811 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3812 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3813 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3814 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3815 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3816 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 3817 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3818 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3819 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3820 // CHECK11: omp.precond.then: 3821 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3822 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3823 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3824 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3825 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3826 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 3827 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3828 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 3829 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 3830 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3831 // CHECK11: omp.dispatch.cond: 3832 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3833 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3834 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 3835 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3836 // CHECK11: cond.true: 3837 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3838 // CHECK11-NEXT: br label [[COND_END:%.*]] 3839 // CHECK11: cond.false: 3840 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3841 // CHECK11-NEXT: br label [[COND_END]] 3842 // CHECK11: cond.end: 3843 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 3844 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3845 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3846 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 3847 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3848 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3849 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 3850 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3851 // CHECK11: omp.dispatch.body: 3852 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3853 // CHECK11: omp.inner.for.cond: 3854 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3855 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 3856 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3857 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3858 // CHECK11: omp.inner.for.body: 3859 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3860 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 3861 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3862 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12 3863 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 3864 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 3865 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 3866 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3867 // CHECK11: omp.body.continue: 3868 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3869 // CHECK11: omp.inner.for.inc: 3870 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3871 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 3872 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3873 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3874 // CHECK11: omp.inner.for.end: 3875 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3876 // CHECK11: omp.dispatch.inc: 3877 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3878 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3879 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 3880 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 3881 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3882 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3883 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 3884 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 3885 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 3886 // CHECK11: omp.dispatch.end: 3887 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3888 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 3889 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 3890 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3891 // CHECK11: omp.precond.end: 3892 // CHECK11-NEXT: ret void 3893 // 3894 // 3895 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3896 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3897 // CHECK11-NEXT: entry: 3898 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3899 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3900 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 3901 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 3902 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 3903 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3904 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 3905 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 3906 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 3907 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3908 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4 3909 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4 3910 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4 3911 // CHECK11-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3912 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3913 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3914 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 3915 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 3916 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3917 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 3918 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 3919 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3920 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 3921 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3922 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3923 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3924 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3925 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3926 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3927 // CHECK11: omp_offload.failed: 3928 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]] 3929 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 3930 // CHECK11: omp_offload.cont: 3931 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3932 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 3933 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 3934 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3935 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 3936 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 3937 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 3938 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 3939 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3940 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3941 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3942 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3943 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 3944 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 3945 // CHECK11: omp_offload.failed5: 3946 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 3947 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]] 3948 // CHECK11: omp_offload.cont6: 3949 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 3950 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 3951 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 3952 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 3953 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 3954 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 3955 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 3956 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 3957 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 3958 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 3959 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3960 // CHECK11-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3961 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3962 // CHECK11-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 3963 // CHECK11: omp_offload.failed11: 3964 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]] 3965 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT12]] 3966 // CHECK11: omp_offload.cont12: 3967 // CHECK11-NEXT: ret i32 0 3968 // 3969 // 3970 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79 3971 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3972 // CHECK11-NEXT: entry: 3973 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 3974 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 3975 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 3976 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3977 // CHECK11-NEXT: ret void 3978 // 3979 // 3980 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 3981 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3982 // CHECK11-NEXT: entry: 3983 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3984 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3985 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 3986 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3987 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3988 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3989 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3990 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3991 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3992 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3993 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3994 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3995 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 3996 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 3997 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3998 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3999 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4000 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4001 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4002 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4003 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4004 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4005 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4006 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4007 // CHECK11: cond.true: 4008 // CHECK11-NEXT: br label [[COND_END:%.*]] 4009 // CHECK11: cond.false: 4010 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4011 // CHECK11-NEXT: br label [[COND_END]] 4012 // CHECK11: cond.end: 4013 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4014 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4015 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4016 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4017 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4018 // CHECK11: omp.inner.for.cond: 4019 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4020 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4021 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4022 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4023 // CHECK11: omp.inner.for.body: 4024 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4025 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4026 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4027 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4028 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4029 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 4030 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4031 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4032 // CHECK11: omp.body.continue: 4033 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4034 // CHECK11: omp.inner.for.inc: 4035 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4036 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4037 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4038 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 4039 // CHECK11: omp.inner.for.end: 4040 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4041 // CHECK11: omp.loop.exit: 4042 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4043 // CHECK11-NEXT: ret void 4044 // 4045 // 4046 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 4047 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4048 // CHECK11-NEXT: entry: 4049 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4050 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4051 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4052 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4053 // CHECK11-NEXT: ret void 4054 // 4055 // 4056 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 4057 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4058 // CHECK11-NEXT: entry: 4059 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4060 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4061 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4062 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4063 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4064 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4065 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4066 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4067 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4068 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4069 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4070 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4071 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4072 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4073 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4074 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4075 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4076 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4077 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4078 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4079 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4080 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4081 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4082 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4083 // CHECK11: cond.true: 4084 // CHECK11-NEXT: br label [[COND_END:%.*]] 4085 // CHECK11: cond.false: 4086 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4087 // CHECK11-NEXT: br label [[COND_END]] 4088 // CHECK11: cond.end: 4089 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4090 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4091 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4092 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4093 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4094 // CHECK11: omp.inner.for.cond: 4095 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4096 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4097 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4098 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4099 // CHECK11: omp.inner.for.body: 4100 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4101 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4102 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4103 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4104 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4105 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 4106 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4107 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4108 // CHECK11: omp.body.continue: 4109 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4110 // CHECK11: omp.inner.for.inc: 4111 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4112 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4113 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4114 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 4115 // CHECK11: omp.inner.for.end: 4116 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4117 // CHECK11: omp.loop.exit: 4118 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4119 // CHECK11-NEXT: ret void 4120 // 4121 // 4122 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89 4123 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4124 // CHECK11-NEXT: entry: 4125 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4126 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4127 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4128 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4129 // CHECK11-NEXT: ret void 4130 // 4131 // 4132 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13 4133 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4134 // CHECK11-NEXT: entry: 4135 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4136 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4137 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4138 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4139 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4140 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4141 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4142 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4143 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4144 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4145 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4146 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4147 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4148 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4149 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4150 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4151 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4152 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4153 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4154 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4155 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 4156 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4157 // CHECK11: omp.dispatch.cond: 4158 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4159 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4160 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4161 // CHECK11: cond.true: 4162 // CHECK11-NEXT: br label [[COND_END:%.*]] 4163 // CHECK11: cond.false: 4164 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4165 // CHECK11-NEXT: br label [[COND_END]] 4166 // CHECK11: cond.end: 4167 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4168 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4169 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4170 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4171 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4172 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4173 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4174 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4175 // CHECK11: omp.dispatch.body: 4176 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4177 // CHECK11: omp.inner.for.cond: 4178 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4179 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 4180 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4181 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4182 // CHECK11: omp.inner.for.body: 4183 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4184 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4185 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4186 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 4187 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 4188 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 4189 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 4190 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4191 // CHECK11: omp.body.continue: 4192 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4193 // CHECK11: omp.inner.for.inc: 4194 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4195 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 4196 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4197 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 4198 // CHECK11: omp.inner.for.end: 4199 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4200 // CHECK11: omp.dispatch.inc: 4201 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4202 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4203 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 4204 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 4205 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4206 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4207 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 4208 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 4209 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 4210 // CHECK11: omp.dispatch.end: 4211 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4212 // CHECK11-NEXT: ret void 4213 // 4214 // 4215 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4216 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 4217 // CHECK11-NEXT: entry: 4218 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 4219 // CHECK11-NEXT: ret void 4220 // 4221 // 4222 // CHECK12-LABEL: define {{[^@]+}}@main 4223 // CHECK12-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4224 // CHECK12-NEXT: entry: 4225 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4226 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4227 // CHECK12-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 4228 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4 4229 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4230 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4231 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4232 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4233 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4234 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4235 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 4236 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4237 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4238 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4239 // CHECK12-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 4240 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 4241 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 4242 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 4243 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 4244 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 4245 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 4246 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 4247 // CHECK12-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 4248 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [3 x i8*], align 4 4249 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [3 x i8*], align 4 4250 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [3 x i8*], align 4 4251 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [3 x i64], align 4 4252 // CHECK12-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 4253 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 4254 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 4255 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 4256 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4257 // CHECK12-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 4258 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4 4259 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4260 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 4261 // CHECK12-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 4262 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 4263 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 4264 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 4265 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4266 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4267 // CHECK12-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 4268 // CHECK12-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 4269 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 4270 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 4271 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4272 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 4273 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 4274 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4275 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4276 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4277 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4278 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 4279 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4280 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 4281 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 4282 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4283 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 4284 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 4285 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4286 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 4287 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4288 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 4289 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 4290 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4291 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 4292 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 4293 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 4294 // CHECK12-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 4295 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4296 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4 4297 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4298 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4299 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4300 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 4301 // CHECK12-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 4302 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4303 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 4304 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4305 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4306 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4307 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4308 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 4309 // CHECK12-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 4310 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 4311 // CHECK12-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4312 // CHECK12-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 4313 // CHECK12-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4314 // CHECK12: omp_offload.failed: 4315 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 4316 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 4317 // CHECK12: omp_offload.cont: 4318 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 4319 // CHECK12-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 4320 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 4321 // CHECK12-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 4322 // CHECK12-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 4323 // CHECK12-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 4324 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 4325 // CHECK12-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 4326 // CHECK12-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 4327 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 4328 // CHECK12-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 4329 // CHECK12-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 4330 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 4331 // CHECK12-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 4332 // CHECK12-NEXT: store i8* null, i8** [[TMP41]], align 4 4333 // CHECK12-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 4334 // CHECK12-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 4335 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 4336 // CHECK12-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 4337 // CHECK12-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 4338 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 4339 // CHECK12-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 4340 // CHECK12-NEXT: store i8* null, i8** [[TMP46]], align 4 4341 // CHECK12-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 4342 // CHECK12-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 4343 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 4344 // CHECK12-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 4345 // CHECK12-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 4346 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 4347 // CHECK12-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 4348 // CHECK12-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 4349 // CHECK12-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 4350 // CHECK12-NEXT: store i8* null, i8** [[TMP52]], align 4 4351 // CHECK12-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 4352 // CHECK12-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 4353 // CHECK12-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 4354 // CHECK12-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 4355 // CHECK12-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 4356 // CHECK12-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 4357 // CHECK12-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 4358 // CHECK12-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 4359 // CHECK12-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 4360 // CHECK12-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 4361 // CHECK12-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 4362 // CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 4363 // CHECK12-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 4364 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP59]]) 4365 // CHECK12-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4366 // CHECK12-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 4367 // CHECK12-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 4368 // CHECK12: omp_offload.failed15: 4369 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 4370 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT16]] 4371 // CHECK12: omp_offload.cont16: 4372 // CHECK12-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 4373 // CHECK12-NEXT: store i32 [[TMP62]], i32* [[N_CASTED17]], align 4 4374 // CHECK12-NEXT: [[TMP63:%.*]] = load i32, i32* [[N_CASTED17]], align 4 4375 // CHECK12-NEXT: [[TMP64:%.*]] = mul nuw i32 [[TMP0]], 4 4376 // CHECK12-NEXT: [[TMP65:%.*]] = sext i32 [[TMP64]] to i64 4377 // CHECK12-NEXT: [[TMP66:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES21]] to i8* 4378 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP66]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.5 to i8*), i32 24, i1 false) 4379 // CHECK12-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 4380 // CHECK12-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i32* 4381 // CHECK12-NEXT: store i32 [[TMP63]], i32* [[TMP68]], align 4 4382 // CHECK12-NEXT: [[TMP69:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 4383 // CHECK12-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i32* 4384 // CHECK12-NEXT: store i32 [[TMP63]], i32* [[TMP70]], align 4 4385 // CHECK12-NEXT: [[TMP71:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 4386 // CHECK12-NEXT: store i8* null, i8** [[TMP71]], align 4 4387 // CHECK12-NEXT: [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 4388 // CHECK12-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 4389 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP73]], align 4 4390 // CHECK12-NEXT: [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 4391 // CHECK12-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32* 4392 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP75]], align 4 4393 // CHECK12-NEXT: [[TMP76:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 4394 // CHECK12-NEXT: store i8* null, i8** [[TMP76]], align 4 4395 // CHECK12-NEXT: [[TMP77:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 4396 // CHECK12-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32** 4397 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP78]], align 4 4398 // CHECK12-NEXT: [[TMP79:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 4399 // CHECK12-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32** 4400 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP80]], align 4 4401 // CHECK12-NEXT: [[TMP81:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2 4402 // CHECK12-NEXT: store i64 [[TMP65]], i64* [[TMP81]], align 4 4403 // CHECK12-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 4404 // CHECK12-NEXT: store i8* null, i8** [[TMP82]], align 4 4405 // CHECK12-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 4406 // CHECK12-NEXT: [[TMP84:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 4407 // CHECK12-NEXT: [[TMP85:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 4408 // CHECK12-NEXT: [[TMP86:%.*]] = load i32, i32* [[N]], align 4 4409 // CHECK12-NEXT: store i32 [[TMP86]], i32* [[DOTCAPTURE_EXPR_23]], align 4 4410 // CHECK12-NEXT: [[TMP87:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 4411 // CHECK12-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP87]], 0 4412 // CHECK12-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 4413 // CHECK12-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 4414 // CHECK12-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 4415 // CHECK12-NEXT: [[TMP88:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 4416 // CHECK12-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP88]], 1 4417 // CHECK12-NEXT: [[TMP89:%.*]] = zext i32 [[ADD28]] to i64 4418 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP89]]) 4419 // CHECK12-NEXT: [[TMP90:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, i32 3, i8** [[TMP83]], i8** [[TMP84]], i64* [[TMP85]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4420 // CHECK12-NEXT: [[TMP91:%.*]] = icmp ne i32 [[TMP90]], 0 4421 // CHECK12-NEXT: br i1 [[TMP91]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 4422 // CHECK12: omp_offload.failed29: 4423 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP63]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 4424 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT30]] 4425 // CHECK12: omp_offload.cont30: 4426 // CHECK12-NEXT: [[TMP92:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4427 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP92]]) 4428 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4429 // CHECK12-NEXT: [[TMP93:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4430 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP93]]) 4431 // CHECK12-NEXT: [[TMP94:%.*]] = load i32, i32* [[RETVAL]], align 4 4432 // CHECK12-NEXT: ret i32 [[TMP94]] 4433 // 4434 // 4435 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100 4436 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 4437 // CHECK12-NEXT: entry: 4438 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4439 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4440 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4441 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4442 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4443 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4444 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4445 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4446 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 4447 // CHECK12-NEXT: ret void 4448 // 4449 // 4450 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 4451 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4452 // CHECK12-NEXT: entry: 4453 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4454 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4455 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4456 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4457 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4458 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4459 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4460 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4461 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4462 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4463 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4464 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4465 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4466 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4467 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 4468 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4469 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4470 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4471 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4472 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4473 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4474 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4475 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4476 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4477 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4478 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4479 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4480 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4481 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4482 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4483 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 4484 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4485 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4486 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4487 // CHECK12: omp.precond.then: 4488 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4489 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4490 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 4491 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4492 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4493 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4494 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4495 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4496 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4497 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4498 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4499 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4500 // CHECK12: cond.true: 4501 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4502 // CHECK12-NEXT: br label [[COND_END:%.*]] 4503 // CHECK12: cond.false: 4504 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4505 // CHECK12-NEXT: br label [[COND_END]] 4506 // CHECK12: cond.end: 4507 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4508 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4509 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4510 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4511 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4512 // CHECK12: omp.inner.for.cond: 4513 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4514 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4515 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4516 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4517 // CHECK12: omp.inner.for.body: 4518 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4519 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 4520 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4521 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 4522 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 4523 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 4524 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4525 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4526 // CHECK12: omp.body.continue: 4527 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4528 // CHECK12: omp.inner.for.inc: 4529 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4530 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 4531 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4532 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 4533 // CHECK12: omp.inner.for.end: 4534 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4535 // CHECK12: omp.loop.exit: 4536 // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4537 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 4538 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 4539 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 4540 // CHECK12: omp.precond.end: 4541 // CHECK12-NEXT: ret void 4542 // 4543 // 4544 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 4545 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4546 // CHECK12-NEXT: entry: 4547 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4548 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4549 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4550 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4551 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4552 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4553 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4554 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4555 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 4556 // CHECK12-NEXT: ret void 4557 // 4558 // 4559 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 4560 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4561 // CHECK12-NEXT: entry: 4562 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4563 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4564 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4565 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4566 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4567 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4568 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4569 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4570 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4571 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4572 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4573 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4574 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4575 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4576 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 4577 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4578 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4579 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4580 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4581 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4582 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4583 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4584 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4585 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4586 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4587 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4588 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4589 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4590 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4591 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4592 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 4593 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4594 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4595 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4596 // CHECK12: omp.precond.then: 4597 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4598 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4599 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 4600 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4601 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4602 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4603 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4604 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4605 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4606 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4607 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4608 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4609 // CHECK12: cond.true: 4610 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4611 // CHECK12-NEXT: br label [[COND_END:%.*]] 4612 // CHECK12: cond.false: 4613 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4614 // CHECK12-NEXT: br label [[COND_END]] 4615 // CHECK12: cond.end: 4616 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4617 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4618 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4619 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4620 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4621 // CHECK12: omp.inner.for.cond: 4622 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4623 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4624 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4625 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4626 // CHECK12: omp.inner.for.body: 4627 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4628 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 4629 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4630 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 4631 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 4632 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 4633 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4634 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4635 // CHECK12: omp.body.continue: 4636 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4637 // CHECK12: omp.inner.for.inc: 4638 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4639 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 4640 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4641 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 4642 // CHECK12: omp.inner.for.end: 4643 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4644 // CHECK12: omp.loop.exit: 4645 // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4646 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 4647 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 4648 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 4649 // CHECK12: omp.precond.end: 4650 // CHECK12-NEXT: ret void 4651 // 4652 // 4653 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110 4654 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4655 // CHECK12-NEXT: entry: 4656 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4657 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4658 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4659 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4660 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4661 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4662 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4663 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4664 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4665 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4666 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4667 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 4668 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4669 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4670 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4671 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 4672 // CHECK12-NEXT: ret void 4673 // 4674 // 4675 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..4 4676 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4677 // CHECK12-NEXT: entry: 4678 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4679 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4680 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4681 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4682 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4683 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4684 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4685 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4686 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4687 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4688 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4689 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4690 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4691 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4692 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4693 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 4694 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4695 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4696 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4697 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4698 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4699 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4700 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4701 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4702 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4703 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4704 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4705 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4706 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4707 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4708 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4709 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 4710 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 4711 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4712 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4713 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4714 // CHECK12: omp.precond.then: 4715 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4716 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4717 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 4718 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4719 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4720 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4721 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4722 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 4723 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 4724 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4725 // CHECK12: omp.dispatch.cond: 4726 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4727 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4728 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4729 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4730 // CHECK12: cond.true: 4731 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4732 // CHECK12-NEXT: br label [[COND_END:%.*]] 4733 // CHECK12: cond.false: 4734 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4735 // CHECK12-NEXT: br label [[COND_END]] 4736 // CHECK12: cond.end: 4737 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4738 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4739 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4740 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 4741 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4742 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4743 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 4744 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4745 // CHECK12: omp.dispatch.body: 4746 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4747 // CHECK12: omp.inner.for.cond: 4748 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4749 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 4750 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 4751 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4752 // CHECK12: omp.inner.for.body: 4753 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4754 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 4755 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4756 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12 4757 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 4758 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 4759 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 4760 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4761 // CHECK12: omp.body.continue: 4762 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4763 // CHECK12: omp.inner.for.inc: 4764 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4765 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 4766 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4767 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 4768 // CHECK12: omp.inner.for.end: 4769 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4770 // CHECK12: omp.dispatch.inc: 4771 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4772 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4773 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 4774 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 4775 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4776 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4777 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 4778 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 4779 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 4780 // CHECK12: omp.dispatch.end: 4781 // CHECK12-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4782 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 4783 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]]) 4784 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 4785 // CHECK12: omp.precond.end: 4786 // CHECK12-NEXT: ret void 4787 // 4788 // 4789 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4790 // CHECK12-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 4791 // CHECK12-NEXT: entry: 4792 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4793 // CHECK12-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4794 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 4795 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 4796 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 4797 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4798 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 4799 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 4800 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 4801 // CHECK12-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 4802 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4 4803 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4 4804 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4 4805 // CHECK12-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 4806 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4807 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4808 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 4809 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 4810 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4811 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 4812 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 4813 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4814 // CHECK12-NEXT: store i8* null, i8** [[TMP4]], align 4 4815 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4816 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4817 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4818 // CHECK12-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4819 // CHECK12-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 4820 // CHECK12-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4821 // CHECK12: omp_offload.failed: 4822 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79([10 x i32]* [[A]]) #[[ATTR3]] 4823 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 4824 // CHECK12: omp_offload.cont: 4825 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4826 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 4827 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 4828 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4829 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 4830 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 4831 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 4832 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4 4833 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4834 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4835 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4836 // CHECK12-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4837 // CHECK12-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 4838 // CHECK12-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 4839 // CHECK12: omp_offload.failed5: 4840 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 4841 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT6]] 4842 // CHECK12: omp_offload.cont6: 4843 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 4844 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 4845 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 4846 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 4847 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 4848 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 4849 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 4850 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4 4851 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 4852 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 4853 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4854 // CHECK12-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4855 // CHECK12-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 4856 // CHECK12-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 4857 // CHECK12: omp_offload.failed11: 4858 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89([10 x i32]* [[A]]) #[[ATTR3]] 4859 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT12]] 4860 // CHECK12: omp_offload.cont12: 4861 // CHECK12-NEXT: ret i32 0 4862 // 4863 // 4864 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79 4865 // CHECK12-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4866 // CHECK12-NEXT: entry: 4867 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4868 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4869 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4870 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4871 // CHECK12-NEXT: ret void 4872 // 4873 // 4874 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..7 4875 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4876 // CHECK12-NEXT: entry: 4877 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4878 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4879 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4880 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4881 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4882 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4883 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4884 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4885 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4886 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4887 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4888 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4889 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4890 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4891 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4892 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4893 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4894 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4895 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4896 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4897 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4898 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4899 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4900 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4901 // CHECK12: cond.true: 4902 // CHECK12-NEXT: br label [[COND_END:%.*]] 4903 // CHECK12: cond.false: 4904 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4905 // CHECK12-NEXT: br label [[COND_END]] 4906 // CHECK12: cond.end: 4907 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4908 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4909 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4910 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4911 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4912 // CHECK12: omp.inner.for.cond: 4913 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4914 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4915 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4916 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4917 // CHECK12: omp.inner.for.body: 4918 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4919 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4920 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4921 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4922 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4923 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 4924 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4925 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4926 // CHECK12: omp.body.continue: 4927 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4928 // CHECK12: omp.inner.for.inc: 4929 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4930 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4931 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4932 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 4933 // CHECK12: omp.inner.for.end: 4934 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4935 // CHECK12: omp.loop.exit: 4936 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4937 // CHECK12-NEXT: ret void 4938 // 4939 // 4940 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 4941 // CHECK12-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4942 // CHECK12-NEXT: entry: 4943 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4944 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4945 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4946 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4947 // CHECK12-NEXT: ret void 4948 // 4949 // 4950 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..10 4951 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4952 // CHECK12-NEXT: entry: 4953 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4954 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4955 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4956 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4957 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4958 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4959 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4960 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4961 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4962 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4963 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4964 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4965 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4966 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4967 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4968 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4969 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4970 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4971 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4972 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4973 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4974 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4975 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4976 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4977 // CHECK12: cond.true: 4978 // CHECK12-NEXT: br label [[COND_END:%.*]] 4979 // CHECK12: cond.false: 4980 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4981 // CHECK12-NEXT: br label [[COND_END]] 4982 // CHECK12: cond.end: 4983 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4984 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4985 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4986 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4987 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4988 // CHECK12: omp.inner.for.cond: 4989 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4990 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4991 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4992 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4993 // CHECK12: omp.inner.for.body: 4994 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4995 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4996 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4997 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4998 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4999 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 5000 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5001 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5002 // CHECK12: omp.body.continue: 5003 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5004 // CHECK12: omp.inner.for.inc: 5005 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5006 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 5007 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 5008 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 5009 // CHECK12: omp.inner.for.end: 5010 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5011 // CHECK12: omp.loop.exit: 5012 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5013 // CHECK12-NEXT: ret void 5014 // 5015 // 5016 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89 5017 // CHECK12-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5018 // CHECK12-NEXT: entry: 5019 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5020 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5021 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5022 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 5023 // CHECK12-NEXT: ret void 5024 // 5025 // 5026 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..13 5027 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5028 // CHECK12-NEXT: entry: 5029 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5030 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5031 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5032 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5033 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5034 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5035 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5036 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5037 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5038 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5039 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5040 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5041 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5042 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5043 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5044 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5045 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5046 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5047 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5048 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5049 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 5050 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5051 // CHECK12: omp.dispatch.cond: 5052 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5053 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5054 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5055 // CHECK12: cond.true: 5056 // CHECK12-NEXT: br label [[COND_END:%.*]] 5057 // CHECK12: cond.false: 5058 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5059 // CHECK12-NEXT: br label [[COND_END]] 5060 // CHECK12: cond.end: 5061 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5062 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5063 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5064 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5065 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5066 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5067 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5068 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5069 // CHECK12: omp.dispatch.body: 5070 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5071 // CHECK12: omp.inner.for.cond: 5072 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5073 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 5074 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5075 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5076 // CHECK12: omp.inner.for.body: 5077 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5078 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5079 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5080 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 5081 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 5082 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 5083 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 5084 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5085 // CHECK12: omp.body.continue: 5086 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5087 // CHECK12: omp.inner.for.inc: 5088 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5089 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5090 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5091 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 5092 // CHECK12: omp.inner.for.end: 5093 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5094 // CHECK12: omp.dispatch.inc: 5095 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5096 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5097 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 5098 // CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 5099 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5100 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5101 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 5102 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 5103 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 5104 // CHECK12: omp.dispatch.end: 5105 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5106 // CHECK12-NEXT: ret void 5107 // 5108 // 5109 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5110 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 5111 // CHECK12-NEXT: entry: 5112 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 5113 // CHECK12-NEXT: ret void 5114 // 5115