1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 // Test host codegen. 6 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 12 13 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 19 #ifdef CK1 20 21 int a[100]; 22 23 int teams_argument_global(int n) { 24 int te = n / 128; 25 int th = 128; 26 // discard n_addr 27 28 29 #pragma omp target 30 #pragma omp teams distribute num_teams(te), thread_limit(th) 31 for(int i = 0; i < n; i++) { 32 a[i] = 0; 33 } 34 35 #pragma omp target 36 {{{ 37 #pragma omp teams distribute 38 for(int i = 0; i < n; i++) { 39 a[i] = 0; 40 } 41 }}} 42 43 // outlined target regions 44 45 46 47 48 return a[0]; 49 } 50 51 #endif // CK1 52 53 // Test host codegen. 54 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 56 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 57 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 60 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 64 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 67 #ifdef CK2 68 69 int teams_local_arg(void) { 70 int n = 100; 71 int a[n]; 72 73 #pragma omp target 74 #pragma omp teams distribute 75 for(int i = 0; i < n; i++) { 76 a[i] = 0; 77 } 78 79 // outlined target region 80 81 82 return a[0]; 83 } 84 #endif // CK2 85 86 // Test host codegen. 87 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 88 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 89 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18 90 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 91 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 92 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20 93 94 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 95 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 96 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 97 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 98 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 99 // RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 100 #ifdef CK3 101 102 103 template <typename T, int X, long long Y> 104 struct SS{ 105 T a[X]; 106 float b; 107 int foo(void) { 108 109 #pragma omp target 110 #pragma omp teams distribute 111 for(int i = 0; i < X; i++) { 112 a[i] = (T)0; 113 } 114 115 // outlined target region 116 117 118 return a[0]; 119 } 120 }; 121 122 int teams_template_struct(void) { 123 SS<int, 123, 456> V; 124 return V.foo(); 125 126 } 127 #endif // CK3 128 129 // Test host codegen. 130 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK25 131 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 132 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK26 133 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK27 134 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 135 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK28 136 137 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 138 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 139 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 140 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 141 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 142 // RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 143 144 #ifdef CK4 145 146 template <typename T, int n> 147 int tmain(T argc) { 148 T a[n]; 149 int te = n/128; 150 int th = 128; 151 #pragma omp target 152 #pragma omp teams distribute num_teams(te) thread_limit(th) 153 for(int i = 0; i < n; i++) { 154 a[i] = (T)0; 155 } 156 return 0; 157 } 158 159 int main (int argc, char **argv) { 160 int n = 100; 161 int a[n]; 162 #pragma omp target 163 #pragma omp teams distribute 164 for(int i = 0; i < n; i++) { 165 a[i] = 0; 166 } 167 return tmain<int, 10>(argc); 168 } 169 170 171 172 173 174 175 176 #endif // CK4 177 #endif 178 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 179 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 180 // CHECK1-NEXT: entry: 181 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 182 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4 183 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4 184 // CHECK1-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 185 // CHECK1-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 186 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 187 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 188 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 189 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 190 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 193 // CHECK1-NEXT: [[N_CASTED6:%.*]] = alloca i64, align 8 194 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8 195 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8 196 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8 197 // CHECK1-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 198 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 199 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 201 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 202 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 203 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 204 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4 205 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 206 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 207 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 208 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8 209 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 210 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 211 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 212 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8 213 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 214 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 215 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 216 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 217 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 218 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 219 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 220 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 221 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 222 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8 223 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 224 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 225 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 226 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 227 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8 228 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 229 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 230 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8 231 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 232 // CHECK1-NEXT: store i8* null, i8** [[TMP16]], align 8 233 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 234 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 235 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8 236 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 237 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 238 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8 239 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 240 // CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8 241 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 242 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 243 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8 244 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 245 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 246 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8 247 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 248 // CHECK1-NEXT: store i8* null, i8** [[TMP26]], align 8 249 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 250 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 251 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 252 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[TH]], align 4 253 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[N_ADDR]], align 4 254 // CHECK1-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR_]], align 4 255 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 256 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 257 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1 258 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1 259 // CHECK1-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 260 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 261 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], 1 262 // CHECK1-NEXT: [[TMP34:%.*]] = zext i32 [[ADD]] to i64 263 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP34]]) 264 // CHECK1-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 [[TMP30]]) 265 // CHECK1-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 266 // CHECK1-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 267 // CHECK1: omp_offload.failed: 268 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 269 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 270 // CHECK1: omp_offload.cont: 271 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 272 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED6]] to i32* 273 // CHECK1-NEXT: store i32 [[TMP37]], i32* [[CONV7]], align 4 274 // CHECK1-NEXT: [[TMP38:%.*]] = load i64, i64* [[N_CASTED6]], align 8 275 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 276 // CHECK1-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i64* 277 // CHECK1-NEXT: store i64 [[TMP38]], i64* [[TMP40]], align 8 278 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 279 // CHECK1-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 280 // CHECK1-NEXT: store i64 [[TMP38]], i64* [[TMP42]], align 8 281 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 282 // CHECK1-NEXT: store i8* null, i8** [[TMP43]], align 8 283 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 284 // CHECK1-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to [100 x i32]** 285 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP45]], align 8 286 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 287 // CHECK1-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to [100 x i32]** 288 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP47]], align 8 289 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 290 // CHECK1-NEXT: store i8* null, i8** [[TMP48]], align 8 291 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 292 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 293 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[N_ADDR]], align 4 294 // CHECK1-NEXT: store i32 [[TMP51]], i32* [[DOTCAPTURE_EXPR_12]], align 4 295 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 296 // CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP52]], 0 297 // CHECK1-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 298 // CHECK1-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1 299 // CHECK1-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4 300 // CHECK1-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 301 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP53]], 1 302 // CHECK1-NEXT: [[TMP54:%.*]] = zext i32 [[ADD17]] to i64 303 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP54]]) 304 // CHECK1-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP49]], i8** [[TMP50]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 305 // CHECK1-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 306 // CHECK1-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]] 307 // CHECK1: omp_offload.failed18: 308 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i64 [[TMP38]], [100 x i32]* @a) #[[ATTR2]] 309 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT19]] 310 // CHECK1: omp_offload.cont19: 311 // CHECK1-NEXT: [[TMP57:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 312 // CHECK1-NEXT: ret i32 [[TMP57]] 313 // 314 // 315 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 316 // CHECK1-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], i64 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 317 // CHECK1-NEXT: entry: 318 // CHECK1-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 319 // CHECK1-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 320 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 321 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 322 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 323 // CHECK1-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 324 // CHECK1-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 325 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 326 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 327 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 328 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 329 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32* 330 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 331 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 332 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 333 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 334 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]]) 335 // CHECK1-NEXT: ret void 336 // 337 // 338 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 339 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 340 // CHECK1-NEXT: entry: 341 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 342 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 343 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 344 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 345 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 346 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 347 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 348 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 349 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 350 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 351 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 352 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 353 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 354 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 355 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 356 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 357 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 358 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 359 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 360 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 361 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 362 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 363 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 364 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 365 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 366 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 367 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 368 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 369 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 370 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 371 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 372 // CHECK1: omp.precond.then: 373 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 374 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 375 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 376 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 377 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 378 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 379 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 380 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 381 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 382 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 383 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 384 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 385 // CHECK1: cond.true: 386 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 387 // CHECK1-NEXT: br label [[COND_END:%.*]] 388 // CHECK1: cond.false: 389 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 390 // CHECK1-NEXT: br label [[COND_END]] 391 // CHECK1: cond.end: 392 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 393 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 394 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 395 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 396 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 397 // CHECK1: omp.inner.for.cond: 398 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 399 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 400 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 401 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 402 // CHECK1: omp.inner.for.body: 403 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 404 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 405 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 406 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 407 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 408 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 409 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 410 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 411 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 412 // CHECK1: omp.body.continue: 413 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 414 // CHECK1: omp.inner.for.inc: 415 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 416 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 417 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 418 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 419 // CHECK1: omp.inner.for.end: 420 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 421 // CHECK1: omp.loop.exit: 422 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 423 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 424 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 425 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 426 // CHECK1: omp.precond.end: 427 // CHECK1-NEXT: ret void 428 // 429 // 430 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 431 // CHECK1-SAME: (i64 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 432 // CHECK1-NEXT: entry: 433 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 434 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 435 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 436 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 437 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 438 // CHECK1-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 439 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [100 x i32]* [[TMP0]]) 440 // CHECK1-NEXT: ret void 441 // 442 // 443 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 444 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 445 // CHECK1-NEXT: entry: 446 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 447 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 448 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 449 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 450 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 451 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 452 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 453 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 454 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 455 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 456 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 457 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 458 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 459 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 460 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 461 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 462 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 463 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 464 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 465 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 466 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 467 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 468 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 469 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 470 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 471 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 472 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 473 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 474 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 475 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 476 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 477 // CHECK1: omp.precond.then: 478 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 479 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 480 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 481 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 482 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 483 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 484 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 485 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 486 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 487 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 488 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 489 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 490 // CHECK1: cond.true: 491 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 492 // CHECK1-NEXT: br label [[COND_END:%.*]] 493 // CHECK1: cond.false: 494 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 495 // CHECK1-NEXT: br label [[COND_END]] 496 // CHECK1: cond.end: 497 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 498 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 499 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 500 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 501 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 502 // CHECK1: omp.inner.for.cond: 503 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 504 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 505 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 506 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 507 // CHECK1: omp.inner.for.body: 508 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 509 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 510 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 511 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 512 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 513 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 514 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 515 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 516 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 517 // CHECK1: omp.body.continue: 518 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 519 // CHECK1: omp.inner.for.inc: 520 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 521 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 522 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 523 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 524 // CHECK1: omp.inner.for.end: 525 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 526 // CHECK1: omp.loop.exit: 527 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 528 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 529 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 530 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 531 // CHECK1: omp.precond.end: 532 // CHECK1-NEXT: ret void 533 // 534 // 535 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 536 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 537 // CHECK1-NEXT: entry: 538 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 539 // CHECK1-NEXT: ret void 540 // 541 // 542 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 543 // CHECK2-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 544 // CHECK2-NEXT: entry: 545 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 546 // CHECK2-NEXT: [[TE:%.*]] = alloca i32, align 4 547 // CHECK2-NEXT: [[TH:%.*]] = alloca i32, align 4 548 // CHECK2-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 549 // CHECK2-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 550 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 551 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 552 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 553 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 554 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 555 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 556 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 557 // CHECK2-NEXT: [[N_CASTED6:%.*]] = alloca i64, align 8 558 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8 559 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8 560 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8 561 // CHECK2-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 562 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 563 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 564 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 565 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 566 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 567 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 568 // CHECK2-NEXT: store i32 128, i32* [[TH]], align 4 569 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 570 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 571 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 572 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8 573 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 574 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 575 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 576 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8 577 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 578 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 579 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 580 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8 581 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 582 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 583 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 584 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 585 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 586 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8 587 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 588 // CHECK2-NEXT: store i8* null, i8** [[TMP11]], align 8 589 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 590 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 591 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8 592 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 593 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 594 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8 595 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 596 // CHECK2-NEXT: store i8* null, i8** [[TMP16]], align 8 597 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 598 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 599 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8 600 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 601 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 602 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8 603 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 604 // CHECK2-NEXT: store i8* null, i8** [[TMP21]], align 8 605 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 606 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 607 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8 608 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 609 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 610 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8 611 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 612 // CHECK2-NEXT: store i8* null, i8** [[TMP26]], align 8 613 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 614 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 615 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 616 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[TH]], align 4 617 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[N_ADDR]], align 4 618 // CHECK2-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR_]], align 4 619 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 620 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 621 // CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1 622 // CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1 623 // CHECK2-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 624 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 625 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], 1 626 // CHECK2-NEXT: [[TMP34:%.*]] = zext i32 [[ADD]] to i64 627 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP34]]) 628 // CHECK2-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 [[TMP30]]) 629 // CHECK2-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 630 // CHECK2-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 631 // CHECK2: omp_offload.failed: 632 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 633 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 634 // CHECK2: omp_offload.cont: 635 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 636 // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED6]] to i32* 637 // CHECK2-NEXT: store i32 [[TMP37]], i32* [[CONV7]], align 4 638 // CHECK2-NEXT: [[TMP38:%.*]] = load i64, i64* [[N_CASTED6]], align 8 639 // CHECK2-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 640 // CHECK2-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i64* 641 // CHECK2-NEXT: store i64 [[TMP38]], i64* [[TMP40]], align 8 642 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 643 // CHECK2-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 644 // CHECK2-NEXT: store i64 [[TMP38]], i64* [[TMP42]], align 8 645 // CHECK2-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 646 // CHECK2-NEXT: store i8* null, i8** [[TMP43]], align 8 647 // CHECK2-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 648 // CHECK2-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to [100 x i32]** 649 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP45]], align 8 650 // CHECK2-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 651 // CHECK2-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to [100 x i32]** 652 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP47]], align 8 653 // CHECK2-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 654 // CHECK2-NEXT: store i8* null, i8** [[TMP48]], align 8 655 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 656 // CHECK2-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 657 // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[N_ADDR]], align 4 658 // CHECK2-NEXT: store i32 [[TMP51]], i32* [[DOTCAPTURE_EXPR_12]], align 4 659 // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 660 // CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP52]], 0 661 // CHECK2-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 662 // CHECK2-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1 663 // CHECK2-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4 664 // CHECK2-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 665 // CHECK2-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP53]], 1 666 // CHECK2-NEXT: [[TMP54:%.*]] = zext i32 [[ADD17]] to i64 667 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP54]]) 668 // CHECK2-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP49]], i8** [[TMP50]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 669 // CHECK2-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 670 // CHECK2-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]] 671 // CHECK2: omp_offload.failed18: 672 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i64 [[TMP38]], [100 x i32]* @a) #[[ATTR2]] 673 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT19]] 674 // CHECK2: omp_offload.cont19: 675 // CHECK2-NEXT: [[TMP57:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4 676 // CHECK2-NEXT: ret i32 [[TMP57]] 677 // 678 // 679 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 680 // CHECK2-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], i64 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 681 // CHECK2-NEXT: entry: 682 // CHECK2-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 683 // CHECK2-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 684 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 685 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 686 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 687 // CHECK2-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 688 // CHECK2-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 689 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 690 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 691 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 692 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 693 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32* 694 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 695 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 696 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 697 // CHECK2-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 698 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]]) 699 // CHECK2-NEXT: ret void 700 // 701 // 702 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 703 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 704 // CHECK2-NEXT: entry: 705 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 706 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 707 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 708 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 709 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 710 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 711 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 712 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 713 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 714 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 715 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 716 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 717 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 718 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 719 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 720 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 721 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 722 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 723 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 724 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 725 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 726 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 727 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 728 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 729 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 730 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 731 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 732 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 733 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 734 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 735 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 736 // CHECK2: omp.precond.then: 737 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 738 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 739 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 740 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 741 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 742 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 743 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 744 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 745 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 746 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 747 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 748 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 749 // CHECK2: cond.true: 750 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 751 // CHECK2-NEXT: br label [[COND_END:%.*]] 752 // CHECK2: cond.false: 753 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 754 // CHECK2-NEXT: br label [[COND_END]] 755 // CHECK2: cond.end: 756 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 757 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 758 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 759 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 760 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 761 // CHECK2: omp.inner.for.cond: 762 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 763 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 764 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 765 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 766 // CHECK2: omp.inner.for.body: 767 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 768 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 769 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 770 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 771 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 772 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 773 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 774 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 775 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 776 // CHECK2: omp.body.continue: 777 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 778 // CHECK2: omp.inner.for.inc: 779 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 780 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 781 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 782 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 783 // CHECK2: omp.inner.for.end: 784 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 785 // CHECK2: omp.loop.exit: 786 // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 787 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 788 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 789 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 790 // CHECK2: omp.precond.end: 791 // CHECK2-NEXT: ret void 792 // 793 // 794 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 795 // CHECK2-SAME: (i64 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 796 // CHECK2-NEXT: entry: 797 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 798 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 799 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 800 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 801 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 802 // CHECK2-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 803 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [100 x i32]* [[TMP0]]) 804 // CHECK2-NEXT: ret void 805 // 806 // 807 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 808 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 809 // CHECK2-NEXT: entry: 810 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 811 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 812 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 813 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8 814 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 815 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 816 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 817 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 818 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 819 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 820 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 821 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 822 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 823 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 824 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 825 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 826 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 827 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8 828 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 829 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8 830 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 831 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 832 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 833 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 834 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 835 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 836 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 837 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 838 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 839 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 840 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 841 // CHECK2: omp.precond.then: 842 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 843 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 844 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 845 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 846 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 847 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 848 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 849 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 850 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 851 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 852 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 853 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 854 // CHECK2: cond.true: 855 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 856 // CHECK2-NEXT: br label [[COND_END:%.*]] 857 // CHECK2: cond.false: 858 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 859 // CHECK2-NEXT: br label [[COND_END]] 860 // CHECK2: cond.end: 861 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 862 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 863 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 864 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 865 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 866 // CHECK2: omp.inner.for.cond: 867 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 868 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 869 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 870 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 871 // CHECK2: omp.inner.for.body: 872 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 873 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 874 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 875 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 876 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 877 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 878 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] 879 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 880 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 881 // CHECK2: omp.body.continue: 882 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 883 // CHECK2: omp.inner.for.inc: 884 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 885 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 886 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 887 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 888 // CHECK2: omp.inner.for.end: 889 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 890 // CHECK2: omp.loop.exit: 891 // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 892 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 893 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 894 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 895 // CHECK2: omp.precond.end: 896 // CHECK2-NEXT: ret void 897 // 898 // 899 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 900 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 901 // CHECK2-NEXT: entry: 902 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 903 // CHECK2-NEXT: ret void 904 // 905 // 906 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 907 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 908 // CHECK3-NEXT: entry: 909 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 910 // CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4 911 // CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4 912 // CHECK3-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 913 // CHECK3-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 914 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 915 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 916 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 917 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 918 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 919 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 920 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 921 // CHECK3-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4 922 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4 923 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4 924 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4 925 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 926 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 927 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 928 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 929 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 930 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 931 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 932 // CHECK3-NEXT: store i32 128, i32* [[TH]], align 4 933 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 934 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4 935 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4 936 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 937 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4 938 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4 939 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 940 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4 941 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4 942 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 943 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 944 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 945 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 946 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 947 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4 948 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 949 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4 950 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 951 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 952 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4 953 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 954 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 955 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4 956 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 957 // CHECK3-NEXT: store i8* null, i8** [[TMP16]], align 4 958 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 959 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 960 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4 961 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 962 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 963 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4 964 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 965 // CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4 966 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 967 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 968 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4 969 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 970 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 971 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4 972 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 973 // CHECK3-NEXT: store i8* null, i8** [[TMP26]], align 4 974 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 975 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 976 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 977 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[TH]], align 4 978 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[N_ADDR]], align 4 979 // CHECK3-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR_]], align 4 980 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 981 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 982 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 983 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 984 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 985 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 986 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], 1 987 // CHECK3-NEXT: [[TMP34:%.*]] = zext i32 [[ADD]] to i64 988 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP34]]) 989 // CHECK3-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 [[TMP30]]) 990 // CHECK3-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 991 // CHECK3-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 992 // CHECK3: omp_offload.failed: 993 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 994 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 995 // CHECK3: omp_offload.cont: 996 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 997 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[N_CASTED4]], align 4 998 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[N_CASTED4]], align 4 999 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1000 // CHECK3-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 1001 // CHECK3-NEXT: store i32 [[TMP38]], i32* [[TMP40]], align 4 1002 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1003 // CHECK3-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i32* 1004 // CHECK3-NEXT: store i32 [[TMP38]], i32* [[TMP42]], align 4 1005 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 1006 // CHECK3-NEXT: store i8* null, i8** [[TMP43]], align 4 1007 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1008 // CHECK3-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to [100 x i32]** 1009 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP45]], align 4 1010 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1011 // CHECK3-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to [100 x i32]** 1012 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP47]], align 4 1013 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 1014 // CHECK3-NEXT: store i8* null, i8** [[TMP48]], align 4 1015 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1016 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1017 // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[N_ADDR]], align 4 1018 // CHECK3-NEXT: store i32 [[TMP51]], i32* [[DOTCAPTURE_EXPR_9]], align 4 1019 // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 1020 // CHECK3-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP52]], 0 1021 // CHECK3-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1022 // CHECK3-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1023 // CHECK3-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1024 // CHECK3-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1025 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP53]], 1 1026 // CHECK3-NEXT: [[TMP54:%.*]] = zext i32 [[ADD14]] to i64 1027 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP54]]) 1028 // CHECK3-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP49]], i8** [[TMP50]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1029 // CHECK3-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 1030 // CHECK3-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 1031 // CHECK3: omp_offload.failed15: 1032 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i32 [[TMP38]], [100 x i32]* @a) #[[ATTR2]] 1033 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT16]] 1034 // CHECK3: omp_offload.cont16: 1035 // CHECK3-NEXT: [[TMP57:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 1036 // CHECK3-NEXT: ret i32 [[TMP57]] 1037 // 1038 // 1039 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 1040 // CHECK3-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], i32 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 1041 // CHECK3-NEXT: entry: 1042 // CHECK3-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 1043 // CHECK3-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 1044 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1045 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1046 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 1047 // CHECK3-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 1048 // CHECK3-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 1049 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1050 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1051 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1052 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 1053 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 1054 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1055 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]]) 1056 // CHECK3-NEXT: ret void 1057 // 1058 // 1059 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1060 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1061 // CHECK3-NEXT: entry: 1062 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1063 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1064 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1065 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1066 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1067 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1068 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1069 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1070 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1071 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1072 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1073 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1074 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1075 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1076 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1077 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1078 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1079 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1080 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1081 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1082 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1083 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1084 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1085 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1086 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1087 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1088 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1089 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1090 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1091 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1092 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1093 // CHECK3: omp.precond.then: 1094 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1095 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1096 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1097 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1098 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1099 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1100 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1101 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1102 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1103 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1104 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1105 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1106 // CHECK3: cond.true: 1107 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1108 // CHECK3-NEXT: br label [[COND_END:%.*]] 1109 // CHECK3: cond.false: 1110 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1111 // CHECK3-NEXT: br label [[COND_END]] 1112 // CHECK3: cond.end: 1113 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1114 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1115 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1116 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1117 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1118 // CHECK3: omp.inner.for.cond: 1119 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1120 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1121 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1122 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1123 // CHECK3: omp.inner.for.body: 1124 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1125 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1126 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1127 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1128 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1129 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP16]] 1130 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1131 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1132 // CHECK3: omp.body.continue: 1133 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1134 // CHECK3: omp.inner.for.inc: 1135 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1136 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1137 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1138 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1139 // CHECK3: omp.inner.for.end: 1140 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1141 // CHECK3: omp.loop.exit: 1142 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1143 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1144 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1145 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1146 // CHECK3: omp.precond.end: 1147 // CHECK3-NEXT: ret void 1148 // 1149 // 1150 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 1151 // CHECK3-SAME: (i32 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1152 // CHECK3-NEXT: entry: 1153 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1154 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1155 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1156 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1157 // CHECK3-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1158 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP0]]) 1159 // CHECK3-NEXT: ret void 1160 // 1161 // 1162 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1163 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1164 // CHECK3-NEXT: entry: 1165 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1166 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1167 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1168 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1169 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1170 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1171 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1172 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1173 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1174 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1175 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1176 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1177 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1178 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1179 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1180 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1181 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1182 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1183 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1184 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1185 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1186 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1187 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1188 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1189 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1190 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1191 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1192 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 1193 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1194 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1195 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1196 // CHECK3: omp.precond.then: 1197 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1198 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1199 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1200 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1201 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1202 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1203 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1204 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1205 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1206 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1207 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1208 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1209 // CHECK3: cond.true: 1210 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1211 // CHECK3-NEXT: br label [[COND_END:%.*]] 1212 // CHECK3: cond.false: 1213 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1214 // CHECK3-NEXT: br label [[COND_END]] 1215 // CHECK3: cond.end: 1216 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1217 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1218 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1219 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1220 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1221 // CHECK3: omp.inner.for.cond: 1222 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1223 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1224 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1225 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1226 // CHECK3: omp.inner.for.body: 1227 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1228 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1229 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1230 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1231 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1232 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP16]] 1233 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1234 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1235 // CHECK3: omp.body.continue: 1236 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1237 // CHECK3: omp.inner.for.inc: 1238 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1239 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1240 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1241 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1242 // CHECK3: omp.inner.for.end: 1243 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1244 // CHECK3: omp.loop.exit: 1245 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1246 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1247 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1248 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1249 // CHECK3: omp.precond.end: 1250 // CHECK3-NEXT: ret void 1251 // 1252 // 1253 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1254 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 1255 // CHECK3-NEXT: entry: 1256 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1257 // CHECK3-NEXT: ret void 1258 // 1259 // 1260 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1261 // CHECK4-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1262 // CHECK4-NEXT: entry: 1263 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1264 // CHECK4-NEXT: [[TE:%.*]] = alloca i32, align 4 1265 // CHECK4-NEXT: [[TH:%.*]] = alloca i32, align 4 1266 // CHECK4-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 1267 // CHECK4-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 1268 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1269 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 1270 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 1271 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 1272 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1273 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1274 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1275 // CHECK4-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4 1276 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4 1277 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4 1278 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4 1279 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 1280 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 1281 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1282 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1283 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1284 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1285 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1286 // CHECK4-NEXT: store i32 128, i32* [[TH]], align 4 1287 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 1288 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4 1289 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4 1290 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4 1291 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4 1292 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4 1293 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4 1294 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4 1295 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4 1296 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1297 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 1298 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 1299 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1300 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 1301 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4 1302 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1303 // CHECK4-NEXT: store i8* null, i8** [[TMP11]], align 4 1304 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1305 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 1306 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4 1307 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1308 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 1309 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4 1310 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1311 // CHECK4-NEXT: store i8* null, i8** [[TMP16]], align 4 1312 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1313 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 1314 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4 1315 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1316 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 1317 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4 1318 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1319 // CHECK4-NEXT: store i8* null, i8** [[TMP21]], align 4 1320 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1321 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]** 1322 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4 1323 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1324 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]** 1325 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4 1326 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1327 // CHECK4-NEXT: store i8* null, i8** [[TMP26]], align 4 1328 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1329 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1330 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4 1331 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[TH]], align 4 1332 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[N_ADDR]], align 4 1333 // CHECK4-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR_]], align 4 1334 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1335 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 1336 // CHECK4-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 1337 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 1338 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1339 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1340 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], 1 1341 // CHECK4-NEXT: [[TMP34:%.*]] = zext i32 [[ADD]] to i64 1342 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP34]]) 1343 // CHECK4-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 [[TMP30]]) 1344 // CHECK4-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 1345 // CHECK4-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1346 // CHECK4: omp_offload.failed: 1347 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]] 1348 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1349 // CHECK4: omp_offload.cont: 1350 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 1351 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[N_CASTED4]], align 4 1352 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[N_CASTED4]], align 4 1353 // CHECK4-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1354 // CHECK4-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 1355 // CHECK4-NEXT: store i32 [[TMP38]], i32* [[TMP40]], align 4 1356 // CHECK4-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1357 // CHECK4-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i32* 1358 // CHECK4-NEXT: store i32 [[TMP38]], i32* [[TMP42]], align 4 1359 // CHECK4-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 1360 // CHECK4-NEXT: store i8* null, i8** [[TMP43]], align 4 1361 // CHECK4-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1362 // CHECK4-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to [100 x i32]** 1363 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP45]], align 4 1364 // CHECK4-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1365 // CHECK4-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to [100 x i32]** 1366 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP47]], align 4 1367 // CHECK4-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 1368 // CHECK4-NEXT: store i8* null, i8** [[TMP48]], align 4 1369 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1370 // CHECK4-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1371 // CHECK4-NEXT: [[TMP51:%.*]] = load i32, i32* [[N_ADDR]], align 4 1372 // CHECK4-NEXT: store i32 [[TMP51]], i32* [[DOTCAPTURE_EXPR_9]], align 4 1373 // CHECK4-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 1374 // CHECK4-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP52]], 0 1375 // CHECK4-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1376 // CHECK4-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1377 // CHECK4-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1378 // CHECK4-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1379 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP53]], 1 1380 // CHECK4-NEXT: [[TMP54:%.*]] = zext i32 [[ADD14]] to i64 1381 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP54]]) 1382 // CHECK4-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, i32 2, i8** [[TMP49]], i8** [[TMP50]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1383 // CHECK4-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 1384 // CHECK4-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 1385 // CHECK4: omp_offload.failed15: 1386 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i32 [[TMP38]], [100 x i32]* @a) #[[ATTR2]] 1387 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT16]] 1388 // CHECK4: omp_offload.cont16: 1389 // CHECK4-NEXT: [[TMP57:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4 1390 // CHECK4-NEXT: ret i32 [[TMP57]] 1391 // 1392 // 1393 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 1394 // CHECK4-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], i32 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 1395 // CHECK4-NEXT: entry: 1396 // CHECK4-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 1397 // CHECK4-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 1398 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1399 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1400 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 1401 // CHECK4-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 1402 // CHECK4-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 1403 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1404 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1405 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1406 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 1407 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 1408 // CHECK4-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1409 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]]) 1410 // CHECK4-NEXT: ret void 1411 // 1412 // 1413 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1414 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1415 // CHECK4-NEXT: entry: 1416 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1417 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1418 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1419 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1420 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1421 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1422 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1423 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1424 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1425 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1426 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1427 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1428 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1429 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1430 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1431 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1432 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1433 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1434 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1435 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1436 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1437 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1438 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1439 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1440 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1441 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1442 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1443 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1444 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1445 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1446 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1447 // CHECK4: omp.precond.then: 1448 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1449 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1450 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1451 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1452 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1453 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1454 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1455 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1456 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1457 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1458 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1459 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1460 // CHECK4: cond.true: 1461 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1462 // CHECK4-NEXT: br label [[COND_END:%.*]] 1463 // CHECK4: cond.false: 1464 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1465 // CHECK4-NEXT: br label [[COND_END]] 1466 // CHECK4: cond.end: 1467 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1468 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1469 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1470 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1471 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1472 // CHECK4: omp.inner.for.cond: 1473 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1474 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1475 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1476 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1477 // CHECK4: omp.inner.for.body: 1478 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1479 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1480 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1481 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1482 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1483 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP16]] 1484 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1485 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1486 // CHECK4: omp.body.continue: 1487 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1488 // CHECK4: omp.inner.for.inc: 1489 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1490 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1491 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1492 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1493 // CHECK4: omp.inner.for.end: 1494 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1495 // CHECK4: omp.loop.exit: 1496 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1497 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1498 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1499 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1500 // CHECK4: omp.precond.end: 1501 // CHECK4-NEXT: ret void 1502 // 1503 // 1504 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35 1505 // CHECK4-SAME: (i32 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1506 // CHECK4-NEXT: entry: 1507 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1508 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1509 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1510 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1511 // CHECK4-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1512 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP0]]) 1513 // CHECK4-NEXT: ret void 1514 // 1515 // 1516 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1517 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1518 // CHECK4-NEXT: entry: 1519 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1520 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1521 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 1522 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4 1523 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1524 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1525 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1526 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1527 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1528 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1529 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1530 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1531 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1532 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1533 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1534 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1535 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 1536 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4 1537 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 1538 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4 1539 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1540 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1541 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1542 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1543 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1544 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1545 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1546 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1547 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1548 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1549 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1550 // CHECK4: omp.precond.then: 1551 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1552 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1553 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1554 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1555 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1556 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1557 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1558 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1559 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1560 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1561 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1562 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1563 // CHECK4: cond.true: 1564 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1565 // CHECK4-NEXT: br label [[COND_END:%.*]] 1566 // CHECK4: cond.false: 1567 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1568 // CHECK4-NEXT: br label [[COND_END]] 1569 // CHECK4: cond.end: 1570 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1571 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1572 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1573 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1574 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1575 // CHECK4: omp.inner.for.cond: 1576 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1577 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1578 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1579 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1580 // CHECK4: omp.inner.for.body: 1581 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1582 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1583 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1584 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1585 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1586 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP16]] 1587 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1588 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1589 // CHECK4: omp.body.continue: 1590 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1591 // CHECK4: omp.inner.for.inc: 1592 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1593 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1594 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1595 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1596 // CHECK4: omp.inner.for.end: 1597 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1598 // CHECK4: omp.loop.exit: 1599 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1600 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1601 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1602 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1603 // CHECK4: omp.precond.end: 1604 // CHECK4-NEXT: ret void 1605 // 1606 // 1607 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1608 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 1609 // CHECK4-NEXT: entry: 1610 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1611 // CHECK4-NEXT: ret void 1612 // 1613 // 1614 // CHECK9-LABEL: define {{[^@]+}}@_Z15teams_local_argv 1615 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1616 // CHECK9-NEXT: entry: 1617 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1618 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1619 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1620 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1621 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 1622 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 1623 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 1624 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 1625 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1626 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1627 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1628 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 1629 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1630 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1631 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1632 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 1633 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1634 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1635 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 1636 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1637 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1638 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 1639 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 1640 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1641 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 1642 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1643 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1644 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 1645 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1646 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1647 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 1648 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1649 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1650 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1651 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1652 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 1653 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1654 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1655 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 1656 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1657 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1658 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1659 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 1660 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 1661 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1662 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 1663 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 1664 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1665 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 1666 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1667 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1668 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1669 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1670 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1671 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 1672 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 1673 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1674 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 1675 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1676 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1677 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1678 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1679 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 1680 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 1681 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 1682 // CHECK9-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1683 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 1684 // CHECK9-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1685 // CHECK9: omp_offload.failed: 1686 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1687 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1688 // CHECK9: omp_offload.cont: 1689 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 1690 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1691 // CHECK9-NEXT: [[TMP33:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1692 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP33]]) 1693 // CHECK9-NEXT: ret i32 [[TMP32]] 1694 // 1695 // 1696 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 1697 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1698 // CHECK9-NEXT: entry: 1699 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1700 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1701 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1702 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1703 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1704 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1705 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1706 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1707 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1708 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1709 // CHECK9-NEXT: ret void 1710 // 1711 // 1712 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1713 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1714 // CHECK9-NEXT: entry: 1715 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1716 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1717 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1718 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1719 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1720 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1721 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1722 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1723 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1724 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1725 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1726 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1727 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1728 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1729 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1730 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1731 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1732 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1733 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1734 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1735 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1736 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1737 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1738 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1739 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1740 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1741 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1742 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1743 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1744 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1745 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1746 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1747 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1748 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1749 // CHECK9: omp.precond.then: 1750 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1751 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1752 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1753 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1754 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1755 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1756 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1757 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1758 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1759 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1760 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1761 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1762 // CHECK9: cond.true: 1763 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1764 // CHECK9-NEXT: br label [[COND_END:%.*]] 1765 // CHECK9: cond.false: 1766 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1767 // CHECK9-NEXT: br label [[COND_END]] 1768 // CHECK9: cond.end: 1769 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1770 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1771 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1772 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1773 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1774 // CHECK9: omp.inner.for.cond: 1775 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1776 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1777 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1778 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1779 // CHECK9: omp.inner.for.body: 1780 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1781 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1782 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1783 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1784 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 1785 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1786 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1787 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1788 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1789 // CHECK9: omp.body.continue: 1790 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1791 // CHECK9: omp.inner.for.inc: 1792 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1793 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 1794 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1795 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1796 // CHECK9: omp.inner.for.end: 1797 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1798 // CHECK9: omp.loop.exit: 1799 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1800 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1801 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1802 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1803 // CHECK9: omp.precond.end: 1804 // CHECK9-NEXT: ret void 1805 // 1806 // 1807 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1808 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] { 1809 // CHECK9-NEXT: entry: 1810 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1811 // CHECK9-NEXT: ret void 1812 // 1813 // 1814 // CHECK10-LABEL: define {{[^@]+}}@_Z15teams_local_argv 1815 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1816 // CHECK10-NEXT: entry: 1817 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4 1818 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1819 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1820 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1821 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 1822 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 1823 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 1824 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 1825 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1826 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1827 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1828 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4 1829 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1830 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1831 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1832 // CHECK10-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 1833 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1834 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1835 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 1836 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1837 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1838 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 1839 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 1840 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1841 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 1842 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1843 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1844 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 1845 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1846 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1847 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 1848 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1849 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 1850 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1851 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1852 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 1853 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1854 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1855 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 1856 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1857 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 1858 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1859 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 1860 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 1861 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1862 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 1863 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 1864 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1865 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 1866 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1867 // CHECK10-NEXT: store i8* null, i8** [[TMP22]], align 8 1868 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1869 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1870 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1871 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 1872 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 1873 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1874 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 1875 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1876 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1877 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1878 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1879 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 1880 // CHECK10-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 1881 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 1882 // CHECK10-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1883 // CHECK10-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 1884 // CHECK10-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1885 // CHECK10: omp_offload.failed: 1886 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1887 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1888 // CHECK10: omp_offload.cont: 1889 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0 1890 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1891 // CHECK10-NEXT: [[TMP33:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1892 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP33]]) 1893 // CHECK10-NEXT: ret i32 [[TMP32]] 1894 // 1895 // 1896 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 1897 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1898 // CHECK10-NEXT: entry: 1899 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1900 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1901 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1902 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1903 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1904 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1905 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1906 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1907 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1908 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 1909 // CHECK10-NEXT: ret void 1910 // 1911 // 1912 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1913 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1914 // CHECK10-NEXT: entry: 1915 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1916 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1917 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1918 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1919 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1920 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1921 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1922 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1923 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1924 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1925 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1926 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1927 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1928 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1929 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 1930 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1931 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1932 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1933 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1934 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1935 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1936 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1937 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1938 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 1939 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1940 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1941 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1942 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1943 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1944 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1945 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 1946 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1947 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1948 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1949 // CHECK10: omp.precond.then: 1950 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1951 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1952 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1953 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1954 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1955 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1956 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1957 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1958 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1959 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1960 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1961 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1962 // CHECK10: cond.true: 1963 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1964 // CHECK10-NEXT: br label [[COND_END:%.*]] 1965 // CHECK10: cond.false: 1966 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1967 // CHECK10-NEXT: br label [[COND_END]] 1968 // CHECK10: cond.end: 1969 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1970 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1971 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1972 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1973 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1974 // CHECK10: omp.inner.for.cond: 1975 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1976 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1977 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1978 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1979 // CHECK10: omp.inner.for.body: 1980 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1981 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1982 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1983 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1984 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 1985 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1986 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 1987 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1988 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1989 // CHECK10: omp.body.continue: 1990 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1991 // CHECK10: omp.inner.for.inc: 1992 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1993 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 1994 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1995 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1996 // CHECK10: omp.inner.for.end: 1997 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1998 // CHECK10: omp.loop.exit: 1999 // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2000 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2001 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2002 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2003 // CHECK10: omp.precond.end: 2004 // CHECK10-NEXT: ret void 2005 // 2006 // 2007 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2008 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] { 2009 // CHECK10-NEXT: entry: 2010 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2011 // CHECK10-NEXT: ret void 2012 // 2013 // 2014 // CHECK11-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2015 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2016 // CHECK11-NEXT: entry: 2017 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2018 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2019 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2020 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2021 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 2022 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 2023 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 2024 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 2025 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2026 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2027 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2028 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 2029 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2030 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2031 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2032 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2033 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2034 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 2035 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2036 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2037 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 2038 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 2039 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2040 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 2041 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2042 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2043 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 2044 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2045 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2046 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2047 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2048 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2049 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2050 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2051 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 2052 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2053 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2054 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 2055 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2056 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2057 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2058 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 2059 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 2060 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2061 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 2062 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 2063 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2064 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 2065 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2066 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 2067 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2068 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2069 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2070 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 2071 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 2072 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2073 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 2074 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2075 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2076 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2077 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2078 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 2079 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 2080 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 2081 // CHECK11-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2082 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2083 // CHECK11-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2084 // CHECK11: omp_offload.failed: 2085 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2086 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2087 // CHECK11: omp_offload.cont: 2088 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 2089 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2090 // CHECK11-NEXT: [[TMP33:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2091 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP33]]) 2092 // CHECK11-NEXT: ret i32 [[TMP32]] 2093 // 2094 // 2095 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 2096 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2097 // CHECK11-NEXT: entry: 2098 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2099 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2100 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2101 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2102 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2103 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2104 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2105 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2106 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2107 // CHECK11-NEXT: ret void 2108 // 2109 // 2110 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2111 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2112 // CHECK11-NEXT: entry: 2113 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2114 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2115 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2116 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2117 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2118 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2119 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2120 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2121 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2122 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2123 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2124 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2125 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2126 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2127 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2128 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2129 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2130 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2131 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2132 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2133 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2134 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2135 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2136 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2137 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2138 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2139 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2140 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2141 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2142 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2143 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2144 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2145 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2146 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2147 // CHECK11: omp.precond.then: 2148 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2149 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2150 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2151 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2152 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2153 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2154 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2155 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2156 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2157 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2158 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2159 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2160 // CHECK11: cond.true: 2161 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2162 // CHECK11-NEXT: br label [[COND_END:%.*]] 2163 // CHECK11: cond.false: 2164 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2165 // CHECK11-NEXT: br label [[COND_END]] 2166 // CHECK11: cond.end: 2167 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2168 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2169 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2170 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2171 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2172 // CHECK11: omp.inner.for.cond: 2173 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2174 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2175 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2176 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2177 // CHECK11: omp.inner.for.body: 2178 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2179 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2180 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2181 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2182 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2183 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 2184 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2185 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2186 // CHECK11: omp.body.continue: 2187 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2188 // CHECK11: omp.inner.for.inc: 2189 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2190 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2191 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2192 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2193 // CHECK11: omp.inner.for.end: 2194 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2195 // CHECK11: omp.loop.exit: 2196 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2197 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2198 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2199 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2200 // CHECK11: omp.precond.end: 2201 // CHECK11-NEXT: ret void 2202 // 2203 // 2204 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2205 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] { 2206 // CHECK11-NEXT: entry: 2207 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2208 // CHECK11-NEXT: ret void 2209 // 2210 // 2211 // CHECK12-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2212 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2213 // CHECK12-NEXT: entry: 2214 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4 2215 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2216 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2217 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2218 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 2219 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 2220 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 2221 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 2222 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2223 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2224 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2225 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4 2226 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2227 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2228 // CHECK12-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2229 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2230 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2231 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 2232 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2233 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2234 // CHECK12-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 2235 // CHECK12-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 2236 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2237 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 2238 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2239 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2240 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 2241 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2242 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2243 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2244 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2245 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 2246 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2247 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2248 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 2249 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2250 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2251 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 2252 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2253 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 2254 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2255 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 2256 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 2257 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2258 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 2259 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 2260 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2261 // CHECK12-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 2262 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2263 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4 2264 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2265 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2266 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2267 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 2268 // CHECK12-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 2269 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2270 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 2271 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2272 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2273 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2274 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2275 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 2276 // CHECK12-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 2277 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 2278 // CHECK12-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2279 // CHECK12-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2280 // CHECK12-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2281 // CHECK12: omp_offload.failed: 2282 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2283 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2284 // CHECK12: omp_offload.cont: 2285 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0 2286 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2287 // CHECK12-NEXT: [[TMP33:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2288 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP33]]) 2289 // CHECK12-NEXT: ret i32 [[TMP32]] 2290 // 2291 // 2292 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73 2293 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2294 // CHECK12-NEXT: entry: 2295 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2296 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2297 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2298 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2299 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2300 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2301 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2302 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2303 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 2304 // CHECK12-NEXT: ret void 2305 // 2306 // 2307 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 2308 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2309 // CHECK12-NEXT: entry: 2310 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2311 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2312 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2313 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2314 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2315 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2316 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2317 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2318 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2319 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2320 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2321 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2322 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2323 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2324 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2325 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2326 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2327 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2328 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2329 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2330 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2331 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2332 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2333 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 2334 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 2335 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2336 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2337 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2338 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2339 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2340 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2341 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2342 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2343 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2344 // CHECK12: omp.precond.then: 2345 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2346 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2347 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2348 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2349 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2350 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2351 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2352 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2353 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2354 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2355 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2356 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2357 // CHECK12: cond.true: 2358 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2359 // CHECK12-NEXT: br label [[COND_END:%.*]] 2360 // CHECK12: cond.false: 2361 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2362 // CHECK12-NEXT: br label [[COND_END]] 2363 // CHECK12: cond.end: 2364 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2365 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2366 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2367 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2368 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2369 // CHECK12: omp.inner.for.cond: 2370 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2371 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2372 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2373 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2374 // CHECK12: omp.inner.for.body: 2375 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2376 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2377 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2378 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2379 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2380 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 2381 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2382 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2383 // CHECK12: omp.body.continue: 2384 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2385 // CHECK12: omp.inner.for.inc: 2386 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2387 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 2388 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2389 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2390 // CHECK12: omp.inner.for.end: 2391 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2392 // CHECK12: omp.loop.exit: 2393 // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2394 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2395 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2396 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2397 // CHECK12: omp.precond.end: 2398 // CHECK12-NEXT: ret void 2399 // 2400 // 2401 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2402 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] { 2403 // CHECK12-NEXT: entry: 2404 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 2405 // CHECK12-NEXT: ret void 2406 // 2407 // 2408 // CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2409 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] { 2410 // CHECK17-NEXT: entry: 2411 // CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2412 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2413 // CHECK17-NEXT: ret i32 [[CALL]] 2414 // 2415 // 2416 // CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2417 // CHECK17-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2418 // CHECK17-NEXT: entry: 2419 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2420 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2421 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2422 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2423 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2424 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2425 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2426 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2427 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2428 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2429 // CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 2430 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2431 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2432 // CHECK17-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 2433 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2434 // CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 8 2435 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2436 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2437 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 2438 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2439 // CHECK17-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2440 // CHECK17-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2441 // CHECK17: omp_offload.failed: 2442 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2443 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 2444 // CHECK17: omp_offload.cont: 2445 // CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2446 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 2447 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2448 // CHECK17-NEXT: ret i32 [[TMP9]] 2449 // 2450 // 2451 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 2452 // CHECK17-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2453 // CHECK17-NEXT: entry: 2454 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2455 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2456 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2457 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2458 // CHECK17-NEXT: ret void 2459 // 2460 // 2461 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 2462 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2463 // CHECK17-NEXT: entry: 2464 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2465 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2466 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2467 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2468 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2469 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2470 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2471 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2472 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2473 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 2474 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2475 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2476 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2477 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2478 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2479 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2480 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2481 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2482 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2483 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2484 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2485 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2486 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2487 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2488 // CHECK17: cond.true: 2489 // CHECK17-NEXT: br label [[COND_END:%.*]] 2490 // CHECK17: cond.false: 2491 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2492 // CHECK17-NEXT: br label [[COND_END]] 2493 // CHECK17: cond.end: 2494 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2495 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2496 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2497 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2498 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2499 // CHECK17: omp.inner.for.cond: 2500 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2501 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2502 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2503 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2504 // CHECK17: omp.inner.for.body: 2505 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2506 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2507 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2508 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2509 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2510 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2511 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2512 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 2513 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2514 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2515 // CHECK17: omp.body.continue: 2516 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2517 // CHECK17: omp.inner.for.inc: 2518 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2519 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2520 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2521 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 2522 // CHECK17: omp.inner.for.end: 2523 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2524 // CHECK17: omp.loop.exit: 2525 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2526 // CHECK17-NEXT: ret void 2527 // 2528 // 2529 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2530 // CHECK17-SAME: () #[[ATTR3:[0-9]+]] { 2531 // CHECK17-NEXT: entry: 2532 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 2533 // CHECK17-NEXT: ret void 2534 // 2535 // 2536 // CHECK18-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2537 // CHECK18-SAME: () #[[ATTR0:[0-9]+]] { 2538 // CHECK18-NEXT: entry: 2539 // CHECK18-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2540 // CHECK18-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2541 // CHECK18-NEXT: ret i32 [[CALL]] 2542 // 2543 // 2544 // CHECK18-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2545 // CHECK18-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2546 // CHECK18-NEXT: entry: 2547 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2548 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2549 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2550 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2551 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 2552 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2553 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2554 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2555 // CHECK18-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2556 // CHECK18-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2557 // CHECK18-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 2558 // CHECK18-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2559 // CHECK18-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2560 // CHECK18-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 2561 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2562 // CHECK18-NEXT: store i8* null, i8** [[TMP4]], align 8 2563 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2564 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2565 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 2566 // CHECK18-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2567 // CHECK18-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2568 // CHECK18-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2569 // CHECK18: omp_offload.failed: 2570 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2571 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 2572 // CHECK18: omp_offload.cont: 2573 // CHECK18-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2574 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0 2575 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2576 // CHECK18-NEXT: ret i32 [[TMP9]] 2577 // 2578 // 2579 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 2580 // CHECK18-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2581 // CHECK18-NEXT: entry: 2582 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2583 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2584 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2585 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2586 // CHECK18-NEXT: ret void 2587 // 2588 // 2589 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined. 2590 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2591 // CHECK18-NEXT: entry: 2592 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2593 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2594 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2595 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2596 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 2597 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2598 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2599 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2600 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2601 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 2602 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2603 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2604 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2605 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2606 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2607 // CHECK18-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2608 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2609 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2610 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2611 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2612 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2613 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2614 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2615 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2616 // CHECK18: cond.true: 2617 // CHECK18-NEXT: br label [[COND_END:%.*]] 2618 // CHECK18: cond.false: 2619 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2620 // CHECK18-NEXT: br label [[COND_END]] 2621 // CHECK18: cond.end: 2622 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2623 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2624 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2625 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2626 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2627 // CHECK18: omp.inner.for.cond: 2628 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2629 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2630 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2631 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2632 // CHECK18: omp.inner.for.body: 2633 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2634 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2635 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2636 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2637 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2638 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2639 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2640 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 2641 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2642 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2643 // CHECK18: omp.body.continue: 2644 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2645 // CHECK18: omp.inner.for.inc: 2646 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2647 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2648 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2649 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 2650 // CHECK18: omp.inner.for.end: 2651 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2652 // CHECK18: omp.loop.exit: 2653 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2654 // CHECK18-NEXT: ret void 2655 // 2656 // 2657 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2658 // CHECK18-SAME: () #[[ATTR3:[0-9]+]] { 2659 // CHECK18-NEXT: entry: 2660 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1) 2661 // CHECK18-NEXT: ret void 2662 // 2663 // 2664 // CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2665 // CHECK19-SAME: () #[[ATTR0:[0-9]+]] { 2666 // CHECK19-NEXT: entry: 2667 // CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2668 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2669 // CHECK19-NEXT: ret i32 [[CALL]] 2670 // 2671 // 2672 // CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2673 // CHECK19-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2674 // CHECK19-NEXT: entry: 2675 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2676 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2677 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2678 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2679 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 2680 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2681 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2682 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2683 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2684 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2685 // CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 2686 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2687 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2688 // CHECK19-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 2689 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2690 // CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4 2691 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2692 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2693 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 2694 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2695 // CHECK19-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2696 // CHECK19-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2697 // CHECK19: omp_offload.failed: 2698 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2699 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 2700 // CHECK19: omp_offload.cont: 2701 // CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2702 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 2703 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2704 // CHECK19-NEXT: ret i32 [[TMP9]] 2705 // 2706 // 2707 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 2708 // CHECK19-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2709 // CHECK19-NEXT: entry: 2710 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2711 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2712 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2713 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2714 // CHECK19-NEXT: ret void 2715 // 2716 // 2717 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 2718 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2719 // CHECK19-NEXT: entry: 2720 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2721 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2722 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2723 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2724 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 2725 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2726 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2727 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2728 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2729 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 2730 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2731 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2732 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2733 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2734 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2735 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2736 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2737 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2738 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2739 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2740 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2741 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2742 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2743 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2744 // CHECK19: cond.true: 2745 // CHECK19-NEXT: br label [[COND_END:%.*]] 2746 // CHECK19: cond.false: 2747 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2748 // CHECK19-NEXT: br label [[COND_END]] 2749 // CHECK19: cond.end: 2750 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2751 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2752 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2753 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2754 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2755 // CHECK19: omp.inner.for.cond: 2756 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2757 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2758 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2759 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2760 // CHECK19: omp.inner.for.body: 2761 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2762 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2763 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2764 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2765 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2766 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2767 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 2768 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2769 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2770 // CHECK19: omp.body.continue: 2771 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2772 // CHECK19: omp.inner.for.inc: 2773 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2774 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2775 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2776 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 2777 // CHECK19: omp.inner.for.end: 2778 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2779 // CHECK19: omp.loop.exit: 2780 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2781 // CHECK19-NEXT: ret void 2782 // 2783 // 2784 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2785 // CHECK19-SAME: () #[[ATTR3:[0-9]+]] { 2786 // CHECK19-NEXT: entry: 2787 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 2788 // CHECK19-NEXT: ret void 2789 // 2790 // 2791 // CHECK20-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2792 // CHECK20-SAME: () #[[ATTR0:[0-9]+]] { 2793 // CHECK20-NEXT: entry: 2794 // CHECK20-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2795 // CHECK20-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2796 // CHECK20-NEXT: ret i32 [[CALL]] 2797 // 2798 // 2799 // CHECK20-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2800 // CHECK20-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2801 // CHECK20-NEXT: entry: 2802 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2803 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2804 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2805 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2806 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 2807 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2808 // CHECK20-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2809 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2810 // CHECK20-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2811 // CHECK20-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2812 // CHECK20-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 2813 // CHECK20-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2814 // CHECK20-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2815 // CHECK20-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 2816 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2817 // CHECK20-NEXT: store i8* null, i8** [[TMP4]], align 4 2818 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2819 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2820 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 2821 // CHECK20-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2822 // CHECK20-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2823 // CHECK20-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2824 // CHECK20: omp_offload.failed: 2825 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2826 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 2827 // CHECK20: omp_offload.cont: 2828 // CHECK20-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2829 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0 2830 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2831 // CHECK20-NEXT: ret i32 [[TMP9]] 2832 // 2833 // 2834 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109 2835 // CHECK20-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2836 // CHECK20-NEXT: entry: 2837 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2838 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2839 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2840 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2841 // CHECK20-NEXT: ret void 2842 // 2843 // 2844 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined. 2845 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2846 // CHECK20-NEXT: entry: 2847 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2848 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2849 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2850 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2851 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 2852 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2853 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2854 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2855 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2856 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 2857 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2858 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2859 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2860 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2861 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2862 // CHECK20-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2863 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2864 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2865 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2866 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2867 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2868 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2869 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2870 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2871 // CHECK20: cond.true: 2872 // CHECK20-NEXT: br label [[COND_END:%.*]] 2873 // CHECK20: cond.false: 2874 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2875 // CHECK20-NEXT: br label [[COND_END]] 2876 // CHECK20: cond.end: 2877 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2878 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2879 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2880 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2881 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2882 // CHECK20: omp.inner.for.cond: 2883 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2884 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2885 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2886 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2887 // CHECK20: omp.inner.for.body: 2888 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2889 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2890 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2891 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2892 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2893 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2894 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 2895 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2896 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2897 // CHECK20: omp.body.continue: 2898 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2899 // CHECK20: omp.inner.for.inc: 2900 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2901 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2902 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2903 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 2904 // CHECK20: omp.inner.for.end: 2905 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2906 // CHECK20: omp.loop.exit: 2907 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2908 // CHECK20-NEXT: ret void 2909 // 2910 // 2911 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2912 // CHECK20-SAME: () #[[ATTR3:[0-9]+]] { 2913 // CHECK20-NEXT: entry: 2914 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1) 2915 // CHECK20-NEXT: ret void 2916 // 2917 // 2918 // CHECK25-LABEL: define {{[^@]+}}@main 2919 // CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2920 // CHECK25-NEXT: entry: 2921 // CHECK25-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2922 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2923 // CHECK25-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 2924 // CHECK25-NEXT: [[N:%.*]] = alloca i32, align 4 2925 // CHECK25-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2926 // CHECK25-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2927 // CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2928 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 2929 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 2930 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 2931 // CHECK25-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 2932 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 2933 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2934 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2935 // CHECK25-NEXT: store i32 0, i32* [[RETVAL]], align 4 2936 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2937 // CHECK25-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 2938 // CHECK25-NEXT: store i32 100, i32* [[N]], align 4 2939 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2940 // CHECK25-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2941 // CHECK25-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2942 // CHECK25-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2943 // CHECK25-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2944 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2945 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2946 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2947 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 2948 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 2949 // CHECK25-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 2950 // CHECK25-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2951 // CHECK25-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 2952 // CHECK25-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2953 // CHECK25-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2954 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 2955 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2956 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2957 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 2958 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2959 // CHECK25-NEXT: store i8* null, i8** [[TMP11]], align 8 2960 // CHECK25-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2961 // CHECK25-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 2962 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 2963 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2964 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 2965 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 2966 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2967 // CHECK25-NEXT: store i8* null, i8** [[TMP16]], align 8 2968 // CHECK25-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2969 // CHECK25-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 2970 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 2971 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2972 // CHECK25-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 2973 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 2974 // CHECK25-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2975 // CHECK25-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 2976 // CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2977 // CHECK25-NEXT: store i8* null, i8** [[TMP22]], align 8 2978 // CHECK25-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2979 // CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2980 // CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2981 // CHECK25-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 2982 // CHECK25-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 2983 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2984 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 2985 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2986 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2987 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2988 // CHECK25-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2989 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 2990 // CHECK25-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 2991 // CHECK25-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 2992 // CHECK25-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2993 // CHECK25-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2994 // CHECK25-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2995 // CHECK25: omp_offload.failed: 2996 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2997 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 2998 // CHECK25: omp_offload.cont: 2999 // CHECK25-NEXT: [[TMP32:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3000 // CHECK25-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP32]]) 3001 // CHECK25-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3002 // CHECK25-NEXT: [[TMP33:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3003 // CHECK25-NEXT: call void @llvm.stackrestore(i8* [[TMP33]]) 3004 // CHECK25-NEXT: [[TMP34:%.*]] = load i32, i32* [[RETVAL]], align 4 3005 // CHECK25-NEXT: ret i32 [[TMP34]] 3006 // 3007 // 3008 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 3009 // CHECK25-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3010 // CHECK25-NEXT: entry: 3011 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3012 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3013 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3014 // CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3015 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3016 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3017 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3018 // CHECK25-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3019 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3020 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 3021 // CHECK25-NEXT: ret void 3022 // 3023 // 3024 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined. 3025 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3026 // CHECK25-NEXT: entry: 3027 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3028 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3029 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3030 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3031 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3032 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3033 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3034 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3035 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3036 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3037 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3038 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3039 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3040 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3041 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4 3042 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3043 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3044 // CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3045 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3046 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3047 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3048 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3049 // CHECK25-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3050 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3051 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3052 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3053 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3054 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3055 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3056 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3057 // CHECK25-NEXT: store i32 0, i32* [[I]], align 4 3058 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3059 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3060 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3061 // CHECK25: omp.precond.then: 3062 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3063 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3064 // CHECK25-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3065 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3066 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3067 // CHECK25-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3068 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3069 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3070 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3071 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3072 // CHECK25-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3073 // CHECK25-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3074 // CHECK25: cond.true: 3075 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3076 // CHECK25-NEXT: br label [[COND_END:%.*]] 3077 // CHECK25: cond.false: 3078 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3079 // CHECK25-NEXT: br label [[COND_END]] 3080 // CHECK25: cond.end: 3081 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3082 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3083 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3084 // CHECK25-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3085 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3086 // CHECK25: omp.inner.for.cond: 3087 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3088 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3089 // CHECK25-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3090 // CHECK25-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3091 // CHECK25: omp.inner.for.body: 3092 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3093 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 3094 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3095 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3096 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 3097 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 3098 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 3099 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3100 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3101 // CHECK25: omp.body.continue: 3102 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3103 // CHECK25: omp.inner.for.inc: 3104 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3105 // CHECK25-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 3106 // CHECK25-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3107 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 3108 // CHECK25: omp.inner.for.end: 3109 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3110 // CHECK25: omp.loop.exit: 3111 // CHECK25-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3112 // CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3113 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3114 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 3115 // CHECK25: omp.precond.end: 3116 // CHECK25-NEXT: ret void 3117 // 3118 // 3119 // CHECK25-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3120 // CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3121 // CHECK25-NEXT: entry: 3122 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3123 // CHECK25-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3124 // CHECK25-NEXT: [[TE:%.*]] = alloca i32, align 4 3125 // CHECK25-NEXT: [[TH:%.*]] = alloca i32, align 4 3126 // CHECK25-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 3127 // CHECK25-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 3128 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3129 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3130 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3131 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3132 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3133 // CHECK25-NEXT: store i32 0, i32* [[TE]], align 4 3134 // CHECK25-NEXT: store i32 128, i32* [[TH]], align 4 3135 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 3136 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 3137 // CHECK25-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 3138 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8 3139 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 3140 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 3141 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 3142 // CHECK25-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8 3143 // CHECK25-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3144 // CHECK25-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 3145 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 3146 // CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3147 // CHECK25-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 3148 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 3149 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3150 // CHECK25-NEXT: store i8* null, i8** [[TMP8]], align 8 3151 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3152 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3153 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 3154 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3155 // CHECK25-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 3156 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 3157 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3158 // CHECK25-NEXT: store i8* null, i8** [[TMP13]], align 8 3159 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3160 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 3161 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8 3162 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3163 // CHECK25-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 3164 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8 3165 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3166 // CHECK25-NEXT: store i8* null, i8** [[TMP18]], align 8 3167 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3168 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3169 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 3170 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, i32* [[TH]], align 4 3171 // CHECK25-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3172 // CHECK25-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 [[TMP22]]) 3173 // CHECK25-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3174 // CHECK25-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3175 // CHECK25: omp_offload.failed: 3176 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 3177 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 3178 // CHECK25: omp_offload.cont: 3179 // CHECK25-NEXT: ret i32 0 3180 // 3181 // 3182 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 3183 // CHECK25-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3184 // CHECK25-NEXT: entry: 3185 // CHECK25-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 3186 // CHECK25-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 3187 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3188 // CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 3189 // CHECK25-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 3190 // CHECK25-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 3191 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3192 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 3193 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 3194 // CHECK25-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3195 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3196 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 3197 // CHECK25-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 3198 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 3199 // CHECK25-NEXT: ret void 3200 // 3201 // 3202 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1 3203 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3204 // CHECK25-NEXT: entry: 3205 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3206 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3207 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3208 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3209 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3210 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3211 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3212 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3213 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3214 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3215 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3216 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3217 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3218 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3219 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3220 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3221 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3222 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3223 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3224 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3225 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3226 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3227 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3228 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3229 // CHECK25: cond.true: 3230 // CHECK25-NEXT: br label [[COND_END:%.*]] 3231 // CHECK25: cond.false: 3232 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3233 // CHECK25-NEXT: br label [[COND_END]] 3234 // CHECK25: cond.end: 3235 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3236 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3237 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3238 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3239 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3240 // CHECK25: omp.inner.for.cond: 3241 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3242 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3243 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3244 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3245 // CHECK25: omp.inner.for.body: 3246 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3247 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3248 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3249 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3250 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3251 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 3252 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3253 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3254 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3255 // CHECK25: omp.body.continue: 3256 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3257 // CHECK25: omp.inner.for.inc: 3258 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3259 // CHECK25-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3260 // CHECK25-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3261 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 3262 // CHECK25: omp.inner.for.end: 3263 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3264 // CHECK25: omp.loop.exit: 3265 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3266 // CHECK25-NEXT: ret void 3267 // 3268 // 3269 // CHECK25-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3270 // CHECK25-SAME: () #[[ATTR6:[0-9]+]] { 3271 // CHECK25-NEXT: entry: 3272 // CHECK25-NEXT: call void @__tgt_register_requires(i64 1) 3273 // CHECK25-NEXT: ret void 3274 // 3275 // 3276 // CHECK26-LABEL: define {{[^@]+}}@main 3277 // CHECK26-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3278 // CHECK26-NEXT: entry: 3279 // CHECK26-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3280 // CHECK26-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3281 // CHECK26-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3282 // CHECK26-NEXT: [[N:%.*]] = alloca i32, align 4 3283 // CHECK26-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3284 // CHECK26-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3285 // CHECK26-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3286 // CHECK26-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3287 // CHECK26-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3288 // CHECK26-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3289 // CHECK26-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 3290 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 3291 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3292 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3293 // CHECK26-NEXT: store i32 0, i32* [[RETVAL]], align 4 3294 // CHECK26-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3295 // CHECK26-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3296 // CHECK26-NEXT: store i32 100, i32* [[N]], align 4 3297 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3298 // CHECK26-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3299 // CHECK26-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3300 // CHECK26-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3301 // CHECK26-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3302 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3303 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 3304 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3305 // CHECK26-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 3306 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 3307 // CHECK26-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 3308 // CHECK26-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3309 // CHECK26-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 3310 // CHECK26-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3311 // CHECK26-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 3312 // CHECK26-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 3313 // CHECK26-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3314 // CHECK26-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3315 // CHECK26-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 3316 // CHECK26-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3317 // CHECK26-NEXT: store i8* null, i8** [[TMP11]], align 8 3318 // CHECK26-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3319 // CHECK26-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 3320 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 3321 // CHECK26-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3322 // CHECK26-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 3323 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 3324 // CHECK26-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3325 // CHECK26-NEXT: store i8* null, i8** [[TMP16]], align 8 3326 // CHECK26-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3327 // CHECK26-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 3328 // CHECK26-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 3329 // CHECK26-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3330 // CHECK26-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 3331 // CHECK26-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 3332 // CHECK26-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3333 // CHECK26-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 3334 // CHECK26-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3335 // CHECK26-NEXT: store i8* null, i8** [[TMP22]], align 8 3336 // CHECK26-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3337 // CHECK26-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3338 // CHECK26-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3339 // CHECK26-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 3340 // CHECK26-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 3341 // CHECK26-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3342 // CHECK26-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 3343 // CHECK26-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3344 // CHECK26-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3345 // CHECK26-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3346 // CHECK26-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3347 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 3348 // CHECK26-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 3349 // CHECK26-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 3350 // CHECK26-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3351 // CHECK26-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 3352 // CHECK26-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3353 // CHECK26: omp_offload.failed: 3354 // CHECK26-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3355 // CHECK26-NEXT: br label [[OMP_OFFLOAD_CONT]] 3356 // CHECK26: omp_offload.cont: 3357 // CHECK26-NEXT: [[TMP32:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3358 // CHECK26-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP32]]) 3359 // CHECK26-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3360 // CHECK26-NEXT: [[TMP33:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3361 // CHECK26-NEXT: call void @llvm.stackrestore(i8* [[TMP33]]) 3362 // CHECK26-NEXT: [[TMP34:%.*]] = load i32, i32* [[RETVAL]], align 4 3363 // CHECK26-NEXT: ret i32 [[TMP34]] 3364 // 3365 // 3366 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 3367 // CHECK26-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3368 // CHECK26-NEXT: entry: 3369 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3370 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3371 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3372 // CHECK26-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3373 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3374 // CHECK26-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3375 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3376 // CHECK26-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3377 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3378 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 3379 // CHECK26-NEXT: ret void 3380 // 3381 // 3382 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined. 3383 // CHECK26-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3384 // CHECK26-NEXT: entry: 3385 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3386 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3387 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3388 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3389 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3390 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3391 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 3392 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3393 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3394 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 3395 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3396 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3397 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3398 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3399 // CHECK26-NEXT: [[I3:%.*]] = alloca i32, align 4 3400 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3401 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3402 // CHECK26-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3403 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3404 // CHECK26-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3405 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3406 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3407 // CHECK26-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3408 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3409 // CHECK26-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3410 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3411 // CHECK26-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3412 // CHECK26-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3413 // CHECK26-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3414 // CHECK26-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3415 // CHECK26-NEXT: store i32 0, i32* [[I]], align 4 3416 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3417 // CHECK26-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3418 // CHECK26-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3419 // CHECK26: omp.precond.then: 3420 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3421 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3422 // CHECK26-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3423 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3424 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3425 // CHECK26-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3426 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3427 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3428 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3429 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3430 // CHECK26-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3431 // CHECK26-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3432 // CHECK26: cond.true: 3433 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3434 // CHECK26-NEXT: br label [[COND_END:%.*]] 3435 // CHECK26: cond.false: 3436 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3437 // CHECK26-NEXT: br label [[COND_END]] 3438 // CHECK26: cond.end: 3439 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3440 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3441 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3442 // CHECK26-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3443 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3444 // CHECK26: omp.inner.for.cond: 3445 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3446 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3447 // CHECK26-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3448 // CHECK26-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3449 // CHECK26: omp.inner.for.body: 3450 // CHECK26-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3451 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 3452 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3453 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3454 // CHECK26-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 3455 // CHECK26-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 3456 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 3457 // CHECK26-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3458 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3459 // CHECK26: omp.body.continue: 3460 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3461 // CHECK26: omp.inner.for.inc: 3462 // CHECK26-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3463 // CHECK26-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 3464 // CHECK26-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3465 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 3466 // CHECK26: omp.inner.for.end: 3467 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3468 // CHECK26: omp.loop.exit: 3469 // CHECK26-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3470 // CHECK26-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3471 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3472 // CHECK26-NEXT: br label [[OMP_PRECOND_END]] 3473 // CHECK26: omp.precond.end: 3474 // CHECK26-NEXT: ret void 3475 // 3476 // 3477 // CHECK26-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3478 // CHECK26-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3479 // CHECK26-NEXT: entry: 3480 // CHECK26-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3481 // CHECK26-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3482 // CHECK26-NEXT: [[TE:%.*]] = alloca i32, align 4 3483 // CHECK26-NEXT: [[TH:%.*]] = alloca i32, align 4 3484 // CHECK26-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 3485 // CHECK26-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 3486 // CHECK26-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3487 // CHECK26-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3488 // CHECK26-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3489 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 3490 // CHECK26-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3491 // CHECK26-NEXT: store i32 0, i32* [[TE]], align 4 3492 // CHECK26-NEXT: store i32 128, i32* [[TH]], align 4 3493 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 3494 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32* 3495 // CHECK26-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 3496 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8 3497 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 3498 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32* 3499 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 3500 // CHECK26-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8 3501 // CHECK26-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3502 // CHECK26-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 3503 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 3504 // CHECK26-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3505 // CHECK26-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 3506 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 3507 // CHECK26-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3508 // CHECK26-NEXT: store i8* null, i8** [[TMP8]], align 8 3509 // CHECK26-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3510 // CHECK26-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3511 // CHECK26-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 3512 // CHECK26-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3513 // CHECK26-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 3514 // CHECK26-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 3515 // CHECK26-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3516 // CHECK26-NEXT: store i8* null, i8** [[TMP13]], align 8 3517 // CHECK26-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3518 // CHECK26-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 3519 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8 3520 // CHECK26-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3521 // CHECK26-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 3522 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8 3523 // CHECK26-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3524 // CHECK26-NEXT: store i8* null, i8** [[TMP18]], align 8 3525 // CHECK26-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3526 // CHECK26-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3527 // CHECK26-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 3528 // CHECK26-NEXT: [[TMP22:%.*]] = load i32, i32* [[TH]], align 4 3529 // CHECK26-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3530 // CHECK26-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 [[TMP22]]) 3531 // CHECK26-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3532 // CHECK26-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3533 // CHECK26: omp_offload.failed: 3534 // CHECK26-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 3535 // CHECK26-NEXT: br label [[OMP_OFFLOAD_CONT]] 3536 // CHECK26: omp_offload.cont: 3537 // CHECK26-NEXT: ret i32 0 3538 // 3539 // 3540 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 3541 // CHECK26-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3542 // CHECK26-NEXT: entry: 3543 // CHECK26-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 3544 // CHECK26-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 3545 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3546 // CHECK26-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 3547 // CHECK26-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8 3548 // CHECK26-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8 3549 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3550 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32* 3551 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32* 3552 // CHECK26-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3553 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3554 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 3555 // CHECK26-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 3556 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 3557 // CHECK26-NEXT: ret void 3558 // 3559 // 3560 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..1 3561 // CHECK26-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3562 // CHECK26-NEXT: entry: 3563 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3564 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3565 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3566 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3567 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 3568 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3569 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3570 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3571 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3572 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 3573 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3574 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3575 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3576 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3577 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3578 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3579 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3580 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3581 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3582 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3583 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3584 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3585 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3586 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3587 // CHECK26: cond.true: 3588 // CHECK26-NEXT: br label [[COND_END:%.*]] 3589 // CHECK26: cond.false: 3590 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3591 // CHECK26-NEXT: br label [[COND_END]] 3592 // CHECK26: cond.end: 3593 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3594 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3595 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3596 // CHECK26-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3597 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3598 // CHECK26: omp.inner.for.cond: 3599 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3600 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3601 // CHECK26-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3602 // CHECK26-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3603 // CHECK26: omp.inner.for.body: 3604 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3605 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3606 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3607 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3608 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3609 // CHECK26-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 3610 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3611 // CHECK26-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3612 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3613 // CHECK26: omp.body.continue: 3614 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3615 // CHECK26: omp.inner.for.inc: 3616 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3617 // CHECK26-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3618 // CHECK26-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3619 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 3620 // CHECK26: omp.inner.for.end: 3621 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3622 // CHECK26: omp.loop.exit: 3623 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3624 // CHECK26-NEXT: ret void 3625 // 3626 // 3627 // CHECK26-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3628 // CHECK26-SAME: () #[[ATTR6:[0-9]+]] { 3629 // CHECK26-NEXT: entry: 3630 // CHECK26-NEXT: call void @__tgt_register_requires(i64 1) 3631 // CHECK26-NEXT: ret void 3632 // 3633 // 3634 // CHECK27-LABEL: define {{[^@]+}}@main 3635 // CHECK27-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3636 // CHECK27-NEXT: entry: 3637 // CHECK27-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3638 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3639 // CHECK27-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 3640 // CHECK27-NEXT: [[N:%.*]] = alloca i32, align 4 3641 // CHECK27-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3642 // CHECK27-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3643 // CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3644 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 3645 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 3646 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 3647 // CHECK27-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 3648 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 3649 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3650 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3651 // CHECK27-NEXT: store i32 0, i32* [[RETVAL]], align 4 3652 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3653 // CHECK27-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 3654 // CHECK27-NEXT: store i32 100, i32* [[N]], align 4 3655 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3656 // CHECK27-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3657 // CHECK27-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3658 // CHECK27-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3659 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3660 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 3661 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 3662 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 3663 // CHECK27-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 3664 // CHECK27-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 3665 // CHECK27-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3666 // CHECK27-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 3667 // CHECK27-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3668 // CHECK27-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3669 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 3670 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3671 // CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3672 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3673 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3674 // CHECK27-NEXT: store i8* null, i8** [[TMP11]], align 4 3675 // CHECK27-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3676 // CHECK27-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 3677 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 3678 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3679 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 3680 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 3681 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3682 // CHECK27-NEXT: store i8* null, i8** [[TMP16]], align 4 3683 // CHECK27-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3684 // CHECK27-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 3685 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 3686 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3687 // CHECK27-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 3688 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 3689 // CHECK27-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3690 // CHECK27-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 3691 // CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3692 // CHECK27-NEXT: store i8* null, i8** [[TMP22]], align 4 3693 // CHECK27-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3694 // CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3695 // CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3696 // CHECK27-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 3697 // CHECK27-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 3698 // CHECK27-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3699 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 3700 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3701 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3702 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3703 // CHECK27-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3704 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 3705 // CHECK27-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 3706 // CHECK27-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 3707 // CHECK27-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3708 // CHECK27-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 3709 // CHECK27-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3710 // CHECK27: omp_offload.failed: 3711 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3712 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 3713 // CHECK27: omp_offload.cont: 3714 // CHECK27-NEXT: [[TMP32:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3715 // CHECK27-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP32]]) 3716 // CHECK27-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3717 // CHECK27-NEXT: [[TMP33:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3718 // CHECK27-NEXT: call void @llvm.stackrestore(i8* [[TMP33]]) 3719 // CHECK27-NEXT: [[TMP34:%.*]] = load i32, i32* [[RETVAL]], align 4 3720 // CHECK27-NEXT: ret i32 [[TMP34]] 3721 // 3722 // 3723 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 3724 // CHECK27-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3725 // CHECK27-NEXT: entry: 3726 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3727 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3728 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3729 // CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3730 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3731 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3732 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3733 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3734 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 3735 // CHECK27-NEXT: ret void 3736 // 3737 // 3738 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined. 3739 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3740 // CHECK27-NEXT: entry: 3741 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3742 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3743 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3744 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3745 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3746 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3747 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 3748 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3749 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3750 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 3751 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3752 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3753 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3754 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3755 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4 3756 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3757 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3758 // CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3759 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3760 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3761 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3762 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3763 // CHECK27-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3764 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 3765 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3766 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3767 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3768 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3769 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3770 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3771 // CHECK27-NEXT: store i32 0, i32* [[I]], align 4 3772 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3773 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3774 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3775 // CHECK27: omp.precond.then: 3776 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3777 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3778 // CHECK27-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 3779 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3780 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3781 // CHECK27-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3782 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3783 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3784 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3785 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3786 // CHECK27-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3787 // CHECK27-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3788 // CHECK27: cond.true: 3789 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3790 // CHECK27-NEXT: br label [[COND_END:%.*]] 3791 // CHECK27: cond.false: 3792 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3793 // CHECK27-NEXT: br label [[COND_END]] 3794 // CHECK27: cond.end: 3795 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3796 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3797 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3798 // CHECK27-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3799 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3800 // CHECK27: omp.inner.for.cond: 3801 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3802 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3803 // CHECK27-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3804 // CHECK27-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3805 // CHECK27: omp.inner.for.body: 3806 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3807 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 3808 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3809 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3810 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 3811 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 3812 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3813 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3814 // CHECK27: omp.body.continue: 3815 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3816 // CHECK27: omp.inner.for.inc: 3817 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3818 // CHECK27-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 3819 // CHECK27-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3820 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 3821 // CHECK27: omp.inner.for.end: 3822 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3823 // CHECK27: omp.loop.exit: 3824 // CHECK27-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3825 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3826 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3827 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 3828 // CHECK27: omp.precond.end: 3829 // CHECK27-NEXT: ret void 3830 // 3831 // 3832 // CHECK27-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3833 // CHECK27-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3834 // CHECK27-NEXT: entry: 3835 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3836 // CHECK27-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3837 // CHECK27-NEXT: [[TE:%.*]] = alloca i32, align 4 3838 // CHECK27-NEXT: [[TH:%.*]] = alloca i32, align 4 3839 // CHECK27-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 3840 // CHECK27-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 3841 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 3842 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 3843 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 3844 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 3845 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3846 // CHECK27-NEXT: store i32 0, i32* [[TE]], align 4 3847 // CHECK27-NEXT: store i32 128, i32* [[TH]], align 4 3848 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 3849 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4 3850 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4 3851 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 3852 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4 3853 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4 3854 // CHECK27-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3855 // CHECK27-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 3856 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 3857 // CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3858 // CHECK27-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 3859 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 3860 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3861 // CHECK27-NEXT: store i8* null, i8** [[TMP8]], align 4 3862 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3863 // CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3864 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3865 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3866 // CHECK27-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 3867 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 3868 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3869 // CHECK27-NEXT: store i8* null, i8** [[TMP13]], align 4 3870 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3871 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 3872 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4 3873 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3874 // CHECK27-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 3875 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4 3876 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3877 // CHECK27-NEXT: store i8* null, i8** [[TMP18]], align 4 3878 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3879 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3880 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 3881 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, i32* [[TH]], align 4 3882 // CHECK27-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3883 // CHECK27-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 [[TMP22]]) 3884 // CHECK27-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3885 // CHECK27-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3886 // CHECK27: omp_offload.failed: 3887 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 3888 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 3889 // CHECK27: omp_offload.cont: 3890 // CHECK27-NEXT: ret i32 0 3891 // 3892 // 3893 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 3894 // CHECK27-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3895 // CHECK27-NEXT: entry: 3896 // CHECK27-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 3897 // CHECK27-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 3898 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 3899 // CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 3900 // CHECK27-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 3901 // CHECK27-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 3902 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 3903 // CHECK27-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 3904 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 3905 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 3906 // CHECK27-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 3907 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 3908 // CHECK27-NEXT: ret void 3909 // 3910 // 3911 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1 3912 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3913 // CHECK27-NEXT: entry: 3914 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3915 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3916 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 3917 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3918 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 3919 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3920 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3921 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3922 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3923 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 3924 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3925 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3926 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 3927 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 3928 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3929 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3930 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3931 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3932 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3933 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3934 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3935 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3936 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3937 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3938 // CHECK27: cond.true: 3939 // CHECK27-NEXT: br label [[COND_END:%.*]] 3940 // CHECK27: cond.false: 3941 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3942 // CHECK27-NEXT: br label [[COND_END]] 3943 // CHECK27: cond.end: 3944 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3945 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3946 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3947 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3948 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3949 // CHECK27: omp.inner.for.cond: 3950 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3951 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3952 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3953 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3954 // CHECK27: omp.inner.for.body: 3955 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3956 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3957 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3958 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3959 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3960 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 3961 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3962 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3963 // CHECK27: omp.body.continue: 3964 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3965 // CHECK27: omp.inner.for.inc: 3966 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3967 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3968 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3969 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 3970 // CHECK27: omp.inner.for.end: 3971 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3972 // CHECK27: omp.loop.exit: 3973 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3974 // CHECK27-NEXT: ret void 3975 // 3976 // 3977 // CHECK27-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3978 // CHECK27-SAME: () #[[ATTR6:[0-9]+]] { 3979 // CHECK27-NEXT: entry: 3980 // CHECK27-NEXT: call void @__tgt_register_requires(i64 1) 3981 // CHECK27-NEXT: ret void 3982 // 3983 // 3984 // CHECK28-LABEL: define {{[^@]+}}@main 3985 // CHECK28-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3986 // CHECK28-NEXT: entry: 3987 // CHECK28-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3988 // CHECK28-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3989 // CHECK28-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 3990 // CHECK28-NEXT: [[N:%.*]] = alloca i32, align 4 3991 // CHECK28-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3992 // CHECK28-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3993 // CHECK28-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3994 // CHECK28-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 3995 // CHECK28-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 3996 // CHECK28-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 3997 // CHECK28-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 3998 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 3999 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4000 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4001 // CHECK28-NEXT: store i32 0, i32* [[RETVAL]], align 4 4002 // CHECK28-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4003 // CHECK28-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 4004 // CHECK28-NEXT: store i32 100, i32* [[N]], align 4 4005 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4006 // CHECK28-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 4007 // CHECK28-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 4008 // CHECK28-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 4009 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 4010 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 4011 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4012 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4013 // CHECK28-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 4014 // CHECK28-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 4015 // CHECK28-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 4016 // CHECK28-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 4017 // CHECK28-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4018 // CHECK28-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 4019 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 4020 // CHECK28-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4021 // CHECK28-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4022 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4023 // CHECK28-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4024 // CHECK28-NEXT: store i8* null, i8** [[TMP11]], align 4 4025 // CHECK28-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4026 // CHECK28-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 4027 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 4028 // CHECK28-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4029 // CHECK28-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 4030 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 4031 // CHECK28-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4032 // CHECK28-NEXT: store i8* null, i8** [[TMP16]], align 4 4033 // CHECK28-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4034 // CHECK28-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 4035 // CHECK28-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 4036 // CHECK28-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4037 // CHECK28-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 4038 // CHECK28-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 4039 // CHECK28-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 4040 // CHECK28-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 4041 // CHECK28-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4042 // CHECK28-NEXT: store i8* null, i8** [[TMP22]], align 4 4043 // CHECK28-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4044 // CHECK28-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4045 // CHECK28-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4046 // CHECK28-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 4047 // CHECK28-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 4048 // CHECK28-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4049 // CHECK28-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 4050 // CHECK28-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4051 // CHECK28-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4052 // CHECK28-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4053 // CHECK28-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4054 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 4055 // CHECK28-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 4056 // CHECK28-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 4057 // CHECK28-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4058 // CHECK28-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 4059 // CHECK28-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4060 // CHECK28: omp_offload.failed: 4061 // CHECK28-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 4062 // CHECK28-NEXT: br label [[OMP_OFFLOAD_CONT]] 4063 // CHECK28: omp_offload.cont: 4064 // CHECK28-NEXT: [[TMP32:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4065 // CHECK28-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP32]]) 4066 // CHECK28-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4067 // CHECK28-NEXT: [[TMP33:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4068 // CHECK28-NEXT: call void @llvm.stackrestore(i8* [[TMP33]]) 4069 // CHECK28-NEXT: [[TMP34:%.*]] = load i32, i32* [[RETVAL]], align 4 4070 // CHECK28-NEXT: ret i32 [[TMP34]] 4071 // 4072 // 4073 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162 4074 // CHECK28-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 4075 // CHECK28-NEXT: entry: 4076 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4077 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4078 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4079 // CHECK28-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4080 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4081 // CHECK28-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4082 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4083 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4084 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 4085 // CHECK28-NEXT: ret void 4086 // 4087 // 4088 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined. 4089 // CHECK28-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4090 // CHECK28-NEXT: entry: 4091 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4092 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4093 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4094 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4095 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4096 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4097 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 4098 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4099 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4100 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 4101 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4102 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4103 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4104 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4105 // CHECK28-NEXT: [[I3:%.*]] = alloca i32, align 4 4106 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4107 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4108 // CHECK28-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4109 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4110 // CHECK28-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4111 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4112 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4113 // CHECK28-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4114 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4115 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4116 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4117 // CHECK28-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4118 // CHECK28-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4119 // CHECK28-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4120 // CHECK28-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4121 // CHECK28-NEXT: store i32 0, i32* [[I]], align 4 4122 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4123 // CHECK28-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4124 // CHECK28-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4125 // CHECK28: omp.precond.then: 4126 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4127 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4128 // CHECK28-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 4129 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4130 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4131 // CHECK28-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4132 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4133 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4134 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4135 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4136 // CHECK28-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4137 // CHECK28-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4138 // CHECK28: cond.true: 4139 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4140 // CHECK28-NEXT: br label [[COND_END:%.*]] 4141 // CHECK28: cond.false: 4142 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4143 // CHECK28-NEXT: br label [[COND_END]] 4144 // CHECK28: cond.end: 4145 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4146 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4147 // CHECK28-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4148 // CHECK28-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4149 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4150 // CHECK28: omp.inner.for.cond: 4151 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4152 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4153 // CHECK28-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4154 // CHECK28-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4155 // CHECK28: omp.inner.for.body: 4156 // CHECK28-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4157 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 4158 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4159 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 4160 // CHECK28-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 4161 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]] 4162 // CHECK28-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4163 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4164 // CHECK28: omp.body.continue: 4165 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4166 // CHECK28: omp.inner.for.inc: 4167 // CHECK28-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4168 // CHECK28-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1 4169 // CHECK28-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4170 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 4171 // CHECK28: omp.inner.for.end: 4172 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4173 // CHECK28: omp.loop.exit: 4174 // CHECK28-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4175 // CHECK28-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 4176 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 4177 // CHECK28-NEXT: br label [[OMP_PRECOND_END]] 4178 // CHECK28: omp.precond.end: 4179 // CHECK28-NEXT: ret void 4180 // 4181 // 4182 // CHECK28-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4183 // CHECK28-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 4184 // CHECK28-NEXT: entry: 4185 // CHECK28-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4186 // CHECK28-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4187 // CHECK28-NEXT: [[TE:%.*]] = alloca i32, align 4 4188 // CHECK28-NEXT: [[TH:%.*]] = alloca i32, align 4 4189 // CHECK28-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 4190 // CHECK28-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 4191 // CHECK28-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4192 // CHECK28-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4193 // CHECK28-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4194 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 4195 // CHECK28-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4196 // CHECK28-NEXT: store i32 0, i32* [[TE]], align 4 4197 // CHECK28-NEXT: store i32 128, i32* [[TH]], align 4 4198 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4 4199 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4 4200 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4 4201 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 4202 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4 4203 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4 4204 // CHECK28-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4205 // CHECK28-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 4206 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 4207 // CHECK28-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4208 // CHECK28-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 4209 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 4210 // CHECK28-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4211 // CHECK28-NEXT: store i8* null, i8** [[TMP8]], align 4 4212 // CHECK28-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4213 // CHECK28-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4214 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4215 // CHECK28-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4216 // CHECK28-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 4217 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 4218 // CHECK28-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4219 // CHECK28-NEXT: store i8* null, i8** [[TMP13]], align 4 4220 // CHECK28-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4221 // CHECK28-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]** 4222 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4 4223 // CHECK28-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4224 // CHECK28-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]** 4225 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4 4226 // CHECK28-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4227 // CHECK28-NEXT: store i8* null, i8** [[TMP18]], align 4 4228 // CHECK28-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4229 // CHECK28-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4230 // CHECK28-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4 4231 // CHECK28-NEXT: [[TMP22:%.*]] = load i32, i32* [[TH]], align 4 4232 // CHECK28-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4233 // CHECK28-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 [[TMP22]]) 4234 // CHECK28-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 4235 // CHECK28-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4236 // CHECK28: omp_offload.failed: 4237 // CHECK28-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]] 4238 // CHECK28-NEXT: br label [[OMP_OFFLOAD_CONT]] 4239 // CHECK28: omp_offload.cont: 4240 // CHECK28-NEXT: ret i32 0 4241 // 4242 // 4243 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151 4244 // CHECK28-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4245 // CHECK28-NEXT: entry: 4246 // CHECK28-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 4247 // CHECK28-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 4248 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4249 // CHECK28-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 4250 // CHECK28-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4 4251 // CHECK28-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4 4252 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4253 // CHECK28-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4254 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4 4255 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4 4256 // CHECK28-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 4257 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]]) 4258 // CHECK28-NEXT: ret void 4259 // 4260 // 4261 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..1 4262 // CHECK28-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4263 // CHECK28-NEXT: entry: 4264 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4265 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4266 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4267 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4268 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 4269 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4270 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4271 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4272 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4273 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 4274 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4275 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4276 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4277 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4278 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4279 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4280 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4281 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4282 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4283 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4284 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4285 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4286 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4287 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4288 // CHECK28: cond.true: 4289 // CHECK28-NEXT: br label [[COND_END:%.*]] 4290 // CHECK28: cond.false: 4291 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4292 // CHECK28-NEXT: br label [[COND_END]] 4293 // CHECK28: cond.end: 4294 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4295 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4296 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4297 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4298 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4299 // CHECK28: omp.inner.for.cond: 4300 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4301 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4302 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4303 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4304 // CHECK28: omp.inner.for.body: 4305 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4306 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4307 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4308 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4309 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4310 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 4311 // CHECK28-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4312 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4313 // CHECK28: omp.body.continue: 4314 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4315 // CHECK28: omp.inner.for.inc: 4316 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4317 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4318 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4319 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 4320 // CHECK28: omp.inner.for.end: 4321 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4322 // CHECK28: omp.loop.exit: 4323 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4324 // CHECK28-NEXT: ret void 4325 // 4326 // 4327 // CHECK28-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4328 // CHECK28-SAME: () #[[ATTR6:[0-9]+]] { 4329 // CHECK28-NEXT: entry: 4330 // CHECK28-NEXT: call void @__tgt_register_requires(i64 1) 4331 // CHECK28-NEXT: ret void 4332 // 4333