1 // Test host codegen.
2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
6 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
8 
9 // Test target codegen - host bc file has to be created first.
10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
11 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
12 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
13 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
14 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
15 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
16 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
17 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
18 
19 // expected-no-diagnostics
20 #ifndef HEADER
21 #define HEADER
22 
23 // CHECK-DAG: %ident_t = type { i32, i32, i32, i32, i8* }
24 // CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00"
25 // CHECK-DAG: [[DEF_LOC:@.+]] = private unnamed_addr constant %ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
26 
27 // CHECK-DAG: [[S1:%.+]] = type { double }
28 // CHECK-DAG: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
29 // CHECK-DAG: [[DEVTY:%.+]] = type { i8*, i8*, [[ENTTY]]*, [[ENTTY]]* }
30 // CHECK-DAG: [[DSCTY:%.+]] = type { i32, [[DEVTY]]*, [[ENTTY]]*, [[ENTTY]]* }
31 
32 // TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i{{32|64}}, i32, i32 }
33 
34 // CHECK-DAG: $[[REGFN:\.omp_offloading\..+]] = comdat
35 
36 // We have 6 target regions
37 
38 // CHECK-DAG: @{{.*}} = private constant i8 0
39 // CHECK-DAG: @{{.*}} = private constant i8 0
40 // CHECK-DAG: @{{.*}} = private constant i8 0
41 // CHECK-DAG: @{{.*}} = private constant i8 0
42 // CHECK-DAG: @{{.*}} = private constant i8 0
43 // CHECK-DAG: @{{.*}} = private constant i8 0
44 
45 // TCHECK: @{{.+}} = constant [[ENTTY]]
46 // TCHECK: @{{.+}} = constant [[ENTTY]]
47 // TCHECK: @{{.+}} = constant [[ENTTY]]
48 // TCHECK: @{{.+}} = constant [[ENTTY]]
49 // TCHECK: @{{.+}} = constant [[ENTTY]]
50 // TCHECK: @{{.+}} = constant [[ENTTY]]
51 
52 // Check if offloading descriptor is created.
53 // CHECK: [[ENTBEGIN:@.+]] = external constant [[ENTTY]]
54 // CHECK: [[ENTEND:@.+]] = external constant [[ENTTY]]
55 // CHECK: [[DEVBEGIN:@.+]] = external constant i8
56 // CHECK: [[DEVEND:@.+]] = external constant i8
57 // CHECK: [[IMAGES:@.+]] = internal unnamed_addr constant [1 x [[DEVTY]]] [{{.+}} { i8* [[DEVBEGIN]], i8* [[DEVEND]], [[ENTTY]]* [[ENTBEGIN]], [[ENTTY]]* [[ENTEND]] }], comdat($[[REGFN]])
58 // CHECK: [[DESC:@.+]] = internal constant [[DSCTY]] { i32 1, [[DEVTY]]* getelementptr inbounds ([1 x [[DEVTY]]], [1 x [[DEVTY]]]* [[IMAGES]], i32 0, i32 0), [[ENTTY]]* [[ENTBEGIN]], [[ENTTY]]* [[ENTEND]] }, comdat($[[REGFN]])
59 
60 // Check target registration is registered as a Ctor.
61 // CHECK: appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* bitcast (void (i8*)* @[[REGFN]] to void ()*), i8* bitcast (void (i8*)* @[[REGFN]] to i8*) }]
62 
63 
64 template<typename tx>
65 tx ftemplate(int n) {
66   tx a = 0;
67 
68   #pragma omp target teams thread_limit(tx(20))
69   {
70   }
71 
72   short b = 1;
73   #pragma omp target teams num_teams(b) thread_limit(1024)
74   {
75     a += b;
76   }
77 
78   return a;
79 }
80 
81 static
82 int fstatic(int n) {
83 
84   #pragma omp target teams num_teams(n) thread_limit(n*32)
85   {
86   }
87 
88   #pragma omp target teams thread_limit(32+n)
89   {
90   }
91 
92   return n+1;
93 }
94 
95 struct S1 {
96   double a;
97 
98   int r1(int n){
99     int b = 1;
100 
101     #pragma omp target teams thread_limit(n-b)
102     {
103       this->a = (double)b + 1.5;
104     }
105 
106     #pragma omp target teams thread_limit(1024)
107     {
108       this->a = 2.5;
109     }
110 
111     return (int)a;
112   }
113 };
114 
115 // CHECK: define {{.*}}@{{.*}}bar{{.*}}
116 int bar(int n){
117   int a = 0;
118 
119   S1 S;
120   // CHECK: call {{.*}}i32 [[FS1:@.+]]([[S1]]* {{.*}}, i32 {{.*}})
121   a += S.r1(n);
122 
123   // CHECK: call {{.*}}i32 [[FSTATIC:@.+]](i32 {{.*}})
124   a += fstatic(n);
125 
126   // CHECK: call {{.*}}i32 [[FTEMPLATE:@.+]](i32 {{.*}})
127   a += ftemplate<int>(n);
128 
129   return a;
130 }
131 
132 
133 
134 //
135 // CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]])
136 //
137 // CHECK-DAG:   store i32 [[PARM]], i32* [[N_ADDR:%.+]], align
138 // CHECK:       store i32 1, i32* [[B:%.+]], align
139 // CHECK:       [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
140 // CHECK:       [[BV:%.+]] = load i32, i32* [[B]], align
141 // CHECK:       [[SUB:%.+]] = sub nsw i32 [[NV]], [[BV]]
142 // CHECK:       store i32 [[SUB]], i32* [[CAPE_ADDR:%.+]], align
143 // CHECK:       [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align
144 // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32*
145 // CHECK-64:    store i32 [[CEV]], i32* [[CONV]], align
146 // CHECK-32:    store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align
147 // CHECK:       [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
148 // CHECK:       [[TL:%.+]] = load i32, i32* [[CAPE_ADDR]], align
149 //
150 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 0, i32 [[TL]])
151 // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
152 // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
153 //
154 // CHECK:       [[FAIL]]
155 // CHECK:       call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]])
156 // CHECK:       br label {{%?}}[[END]]
157 // CHECK:       [[END]]
158 //
159 //
160 //
161 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.+}}, i32 0, i32 1024)
162 // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
163 // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
164 //
165 // CHECK:       [[FAIL]]
166 // CHECK:       call void [[HVT2:@.+]]([[S1]]* {{[^,]+}})
167 // CHECK:       br label {{%?}}[[END]]
168 // CHECK:       [[END]]
169 //
170 
171 
172 
173 
174 
175 
176 //
177 // CHECK: define {{.*}}[[FSTATIC]](i32 {{[^%]*}}[[PARM:%.+]])
178 //
179 // CHECK-DAG:   store i32 [[PARM]], i32* [[N_ADDR:%.+]], align
180 // CHECK:       [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
181 // CHECK:       store i32 [[NV]], i32* [[CAPE_ADDR1:%.+]], align
182 // CHECK:       [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
183 // CHECK:       [[MUL:%.+]] = mul nsw i32 [[NV]], 32
184 // CHECK:       store i32 [[MUL]], i32* [[CAPE_ADDR2:%.+]], align
185 // CHECK:       [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR1]], align
186 // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR1:%.+]] to i32*
187 // CHECK-64:    store i32 [[CEV]], i32* [[CONV]], align
188 // CHECK-32:    store i32 [[CEV]], i32* [[CAPEC_ADDR1:%.+]], align
189 // CHECK:       [[ARG1:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR1]], align
190 // CHECK:       [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR2]], align
191 // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR2:%.+]] to i32*
192 // CHECK-64:    store i32 [[CEV]], i32* [[CONV]], align
193 // CHECK-32:    store i32 [[CEV]], i32* [[CAPEC_ADDR2:%.+]], align
194 // CHECK:       [[ARG2:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR2]], align
195 // CHECK:       [[TEAMS:%.+]] = load i32, i32* [[CAPE_ADDR1]], align
196 // CHECK:       [[TL:%.+]] = load i32, i32* [[CAPE_ADDR2]], align
197 //
198 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, {{.*}}, i32 [[TEAMS]], i32 [[TL]])
199 // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
200 // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
201 //
202 // CHECK:       [[FAIL]]
203 // CHECK:       call void [[HVT3:@.+]](i[[SZ]] [[ARG1]], i[[SZ]] [[ARG2]])
204 // CHECK:       br label {{%?}}[[END]]
205 // CHECK:       [[END]]
206 //
207 //
208 //
209 // CHECK:       [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
210 // CHECK:       [[ADD:%.+]] = add nsw i32 32, [[NV]]
211 // CHECK:       store i32 [[ADD]], i32* [[CAPE_ADDR:%.+]], align
212 // CHECK:       [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align
213 // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32*
214 // CHECK-64:    store i32 [[CEV]], i32* [[CONV]], align
215 // CHECK-32:    store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align
216 // CHECK:       [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
217 // CHECK:       [[TL:%.+]] = load i32, i32* [[CAPE_ADDR]], align
218 //
219 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 0, i32 [[TL]])
220 // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
221 // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
222 //
223 // CHECK:       [[FAIL]]
224 // CHECK:       call void [[HVT4:@.+]](i[[SZ]] [[ARG]])
225 // CHECK:       br label {{%?}}[[END]]
226 // CHECK:       [[END]]
227 //
228 
229 
230 
231 
232 
233 
234 //
235 // CHECK: define {{.*}}[[FTEMPLATE]]
236 //
237 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 0, {{.*}}, i32 0, i32 20)
238 // CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
239 // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
240 //
241 // CHECK:       [[FAIL]]
242 // CHECK:       call void [[HVT5:@.+]]()
243 // CHECK:       br label {{%?}}[[END]]
244 //
245 // CHECK:       [[END]]
246 //
247 //
248 //
249 // CHECK:       store i16 1, i16* [[B:%.+]], align
250 // CHECK:       [[BV:%.+]] = load i16, i16* [[B]], align
251 // CHECK:       store i16 [[BV]], i16* [[CAPE_ADDR:%.+]], align
252 // CHECK:       [[CEV:%.+]] = load i16, i16* [[CAPE_ADDR]], align
253 // CHECK:       [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i16*
254 // CHECK:       store i16 [[CEV]], i16* [[CONV]], align
255 // CHECK:       [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
256 // CHECK:       [[T:%.+]] = load i16, i16* [[CAPE_ADDR]], align
257 // CHECK:       [[TEAMS:%.+]] = sext i16 [[T]] to i32
258 //
259 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 [[TEAMS]], i32 1024)
260 // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
261 // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
262 //
263 // CHECK:       [[FAIL]]
264 // CHECK:       call void [[HVT6:@.+]](i[[SZ]] {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]])
265 // CHECK:       br label {{%?}}[[END]]
266 // CHECK:       [[END]]
267 //
268 
269 
270 
271 
272 
273 
274 // Check that the offloading functions are emitted and that the parallel function
275 // is appropriately guarded.
276 
277 // CHECK:       define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]])
278 // CHECK-DAG:   store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
279 // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32*
280 // CHECK-64:    [[TL:%.+]] = load i32, i32* [[CONV]], align
281 // CHECK-32:    [[TL:%.+]] = load i32, i32* [[CAPE_ADDR]], align
282 // CHECK:       call i32 @__kmpc_push_num_teams(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 0, i32 [[TL]])
283 // CHECK:       call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%ident_t* [[DEF_LOC]], i32 2,
284 //
285 //
286 
287 
288 // CHECK:       define internal void [[HVT2]]([[S1]]* {{%.+}})
289 // CHECK:       call i32 @__kmpc_push_num_teams(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 0, i32 1024)
290 // CHECK:       call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%ident_t* [[DEF_LOC]], i32 1,
291 //
292 //
293 
294 
295 
296 
297 
298 
299 
300 
301 // CHECK:       define internal void [[HVT3]](i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]])
302 // CHECK-DAG:   store i[[SZ]] [[PARM1]], i[[SZ]]* [[CAPE_ADDR1:%.+]], align
303 // CHECK-DAG:   store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR2:%.+]], align
304 // CHECK-64:    [[CONV1:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR1]] to i32*
305 // CHECK-64:    [[CONV2:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR2]] to i32*
306 // CHECK-64:    [[NT:%.+]] = load i32, i32* [[CONV1]], align
307 // CHECK-64:    [[TL:%.+]] = load i32, i32* [[CONV2]], align
308 // CHECK-32:    [[NT:%.+]] = load i32, i32* [[CAPE_ADDR1]], align
309 // CHECK-32:    [[TL:%.+]] = load i32, i32* [[CAPE_ADDR2]], align
310 // CHECK:       call i32 @__kmpc_push_num_teams(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]], i32 [[TL]])
311 // CHECK:       call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%ident_t* [[DEF_LOC]], i32 0,
312 //
313 //
314 // CHECK:       define internal void [[HVT4]](i[[SZ]] [[PARM:%.+]])
315 // CHECK-DAG:   store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
316 // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32*
317 // CHECK-64:    [[TL:%.+]] = load i32, i32* [[CONV]], align
318 // CHECK-32:    [[TL:%.+]] = load i32, i32* [[CAPE_ADDR]], align
319 // CHECK:       call i32 @__kmpc_push_num_teams(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 0, i32 [[TL]])
320 // CHECK:       call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%ident_t* [[DEF_LOC]], i32 0,
321 //
322 //
323 
324 
325 
326 
327 
328 // CHECK:       define internal void [[HVT5]](
329 // CHECK:       call i32 @__kmpc_push_num_teams(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 0, i32 20)
330 // CHECK:       call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%ident_t* [[DEF_LOC]], i32 0,
331 //
332 //
333 
334 
335 // CHECK:       define internal void [[HVT6]](i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]], i[[SZ]] [[PARM3:%.+]])
336 // CHECK-DAG:   store i[[SZ]] [[PARM3]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
337 // CHECK:       [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i16*
338 // CHECK:       [[T:%.+]] = load i16, i16* [[CONV]], align
339 // CHECK:       [[NT:%.+]] = sext i16 [[T]] to i32
340 // CHECK:       call i32 @__kmpc_push_num_teams(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]], i32 1024)
341 // CHECK:       call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%ident_t* [[DEF_LOC]], i32 2,
342 //
343 //
344 
345 
346 
347 #endif
348