1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test host codegen. 3 // RUN: %clang_cc1 -no-opaque-pointers -DHAS_INT128 -verify -fopenmp -fopenmp-version=50 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -no-opaque-pointers -DHAS_INT128 -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 5 // RUN: %clang_cc1 -no-opaque-pointers -DHAS_INT128 -fopenmp -fopenmp-version=50 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 9 10 // Test target codegen - host bc file has to be created first. 11 // RUN: %clang_cc1 -no-opaque-pointers -DHAS_INT128 -verify -fopenmp -fopenmp-version=50 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 12 // RUN: %clang_cc1 -no-opaque-pointers -DHAS_INT128 -verify -fopenmp -fopenmp-version=50 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK5 13 // RUN: %clang_cc1 -no-opaque-pointers -DHAS_INT128 -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DHAS_INT128 -fopenmp -fopenmp-version=50 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK7 17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 19 20 // expected-no-diagnostics 21 #ifndef HEADER 22 #define HEADER 23 24 25 void mapWithPrivate() { 26 int x, y; 27 #pragma omp target teams private(x) map(x,y) private(y) 28 ; 29 } 30 31 void mapWithFirstprivate() { 32 int x, y; 33 #pragma omp target teams firstprivate(x) map(x,y) firstprivate(y) 34 ; 35 } 36 37 void mapWithReduction() { 38 int x, y; 39 #pragma omp target teams reduction(+:x) map(x,y) reduction(+:y) 40 ; 41 } 42 43 void mapFrom() { 44 int x; 45 #pragma omp target teams firstprivate(x) map(from:x) 46 ; 47 } 48 49 void mapTo() { 50 int x; 51 #pragma omp target teams firstprivate(x) map(to:x) 52 ; 53 } 54 55 void mapAlloc() { 56 int x; 57 #pragma omp target teams firstprivate(x) map(alloc:x) 58 ; 59 } 60 61 void mapArray() { 62 int x[77], y[88], z[99]; 63 #pragma omp target teams private(x) firstprivate(y) reduction(+:z) map(x,y,z) 64 ; 65 #pragma omp target teams private(x) firstprivate(y) reduction(+:z) map(to:x,y,z) 66 ; 67 } 68 69 # if HAS_INT128 70 void mapInt128() { 71 __int128 x, y, z; 72 #pragma omp target teams private(x) firstprivate(y) reduction(+:z) map(x,y,z) 73 ; 74 #pragma omp target teams private(x) firstprivate(y) reduction(+:z) map(from:x,y,z) 75 ; 76 } 77 # endif 78 #endif 79 // CHECK1-LABEL: define {{[^@]+}}@_Z14mapWithPrivatev 80 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 81 // CHECK1-NEXT: entry: 82 // CHECK1-NEXT: [[X:%.*]] = alloca i32, align 4 83 // CHECK1-NEXT: [[Y:%.*]] = alloca i32, align 4 84 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 85 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 86 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 87 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 88 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 89 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP1]], align 8 90 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 91 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 92 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP3]], align 8 93 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 94 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 95 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 96 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32** 97 // CHECK1-NEXT: store i32* [[Y]], i32** [[TMP6]], align 8 98 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 99 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32** 100 // CHECK1-NEXT: store i32* [[Y]], i32** [[TMP8]], align 8 101 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 102 // CHECK1-NEXT: store i8* null, i8** [[TMP9]], align 8 103 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 104 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 105 // CHECK1-NEXT: [[TMP12:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14mapWithPrivatev_l27.region_id, i32 2, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 106 // CHECK1-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 107 // CHECK1-NEXT: br i1 [[TMP13]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 108 // CHECK1: omp_offload.failed: 109 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14mapWithPrivatev_l27() #[[ATTR2:[0-9]+]] 110 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 111 // CHECK1: omp_offload.cont: 112 // CHECK1-NEXT: ret void 113 // 114 // 115 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14mapWithPrivatev_l27 116 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { 117 // CHECK1-NEXT: entry: 118 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 119 // CHECK1-NEXT: ret void 120 // 121 // 122 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 123 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 124 // CHECK1-NEXT: entry: 125 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 126 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 127 // CHECK1-NEXT: [[X:%.*]] = alloca i32, align 4 128 // CHECK1-NEXT: [[Y:%.*]] = alloca i32, align 4 129 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 130 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 131 // CHECK1-NEXT: ret void 132 // 133 // 134 // CHECK1-LABEL: define {{[^@]+}}@_Z19mapWithFirstprivatev 135 // CHECK1-SAME: () #[[ATTR0]] { 136 // CHECK1-NEXT: entry: 137 // CHECK1-NEXT: [[X:%.*]] = alloca i32, align 4 138 // CHECK1-NEXT: [[Y:%.*]] = alloca i32, align 4 139 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 140 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 141 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 142 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 143 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 144 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP1]], align 8 145 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 146 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 147 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP3]], align 8 148 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 149 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 150 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 151 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32** 152 // CHECK1-NEXT: store i32* [[Y]], i32** [[TMP6]], align 8 153 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 154 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32** 155 // CHECK1-NEXT: store i32* [[Y]], i32** [[TMP8]], align 8 156 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 157 // CHECK1-NEXT: store i8* null, i8** [[TMP9]], align 8 158 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 159 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 160 // CHECK1-NEXT: [[TMP12:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z19mapWithFirstprivatev_l33.region_id, i32 2, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 161 // CHECK1-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 162 // CHECK1-NEXT: br i1 [[TMP13]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 163 // CHECK1: omp_offload.failed: 164 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z19mapWithFirstprivatev_l33(i32* [[X]], i32* [[Y]]) #[[ATTR2]] 165 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 166 // CHECK1: omp_offload.cont: 167 // CHECK1-NEXT: ret void 168 // 169 // 170 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z19mapWithFirstprivatev_l33 171 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR1]] { 172 // CHECK1-NEXT: entry: 173 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 174 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 8 175 // CHECK1-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 176 // CHECK1-NEXT: [[Y_CASTED:%.*]] = alloca i64, align 8 177 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 178 // CHECK1-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 8 179 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 180 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 8 181 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 182 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 183 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 184 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[X_CASTED]], align 8 185 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 186 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[Y_CASTED]] to i32* 187 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV1]], align 4 188 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[Y_CASTED]], align 8 189 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP5]]) 190 // CHECK1-NEXT: ret void 191 // 192 // 193 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 194 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[X:%.*]], i64 noundef [[Y:%.*]]) #[[ATTR1]] { 195 // CHECK1-NEXT: entry: 196 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 197 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 198 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 199 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca i64, align 8 200 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 201 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 202 // CHECK1-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 203 // CHECK1-NEXT: store i64 [[Y]], i64* [[Y_ADDR]], align 8 204 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 205 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[Y_ADDR]] to i32* 206 // CHECK1-NEXT: ret void 207 // 208 // 209 // CHECK1-LABEL: define {{[^@]+}}@_Z16mapWithReductionv 210 // CHECK1-SAME: () #[[ATTR0]] { 211 // CHECK1-NEXT: entry: 212 // CHECK1-NEXT: [[X:%.*]] = alloca i32, align 4 213 // CHECK1-NEXT: [[Y:%.*]] = alloca i32, align 4 214 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8 215 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8 216 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8 217 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 218 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 219 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP1]], align 8 220 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 221 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 222 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP3]], align 8 223 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 224 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 225 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 226 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32** 227 // CHECK1-NEXT: store i32* [[Y]], i32** [[TMP6]], align 8 228 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 229 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32** 230 // CHECK1-NEXT: store i32* [[Y]], i32** [[TMP8]], align 8 231 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 232 // CHECK1-NEXT: store i8* null, i8** [[TMP9]], align 8 233 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 234 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 235 // CHECK1-NEXT: [[TMP12:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16mapWithReductionv_l39.region_id, i32 2, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 236 // CHECK1-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 237 // CHECK1-NEXT: br i1 [[TMP13]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 238 // CHECK1: omp_offload.failed: 239 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16mapWithReductionv_l39(i32* [[X]], i32* [[Y]]) #[[ATTR2]] 240 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 241 // CHECK1: omp_offload.cont: 242 // CHECK1-NEXT: ret void 243 // 244 // 245 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16mapWithReductionv_l39 246 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR1]] { 247 // CHECK1-NEXT: entry: 248 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 249 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 8 250 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 251 // CHECK1-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 8 252 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 253 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 8 254 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[TMP0]], i32* [[TMP1]]) 255 // CHECK1-NEXT: ret void 256 // 257 // 258 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 259 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR1]] { 260 // CHECK1-NEXT: entry: 261 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 262 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 263 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 264 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 8 265 // CHECK1-NEXT: [[X1:%.*]] = alloca i32, align 4 266 // CHECK1-NEXT: [[Y2:%.*]] = alloca i32, align 4 267 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 268 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 269 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 270 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 271 // CHECK1-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 8 272 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 273 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 8 274 // CHECK1-NEXT: store i32 0, i32* [[X1]], align 4 275 // CHECK1-NEXT: store i32 0, i32* [[Y2]], align 4 276 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 277 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i32* [[X1]] to i8* 278 // CHECK1-NEXT: store i8* [[TMP3]], i8** [[TMP2]], align 8 279 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 280 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i32* [[Y2]] to i8* 281 // CHECK1-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 8 282 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 283 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 284 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 285 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP7]], i32 2, i64 16, i8* [[TMP8]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 286 // CHECK1-NEXT: switch i32 [[TMP9]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 287 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 288 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 289 // CHECK1-NEXT: ] 290 // CHECK1: .omp.reduction.case1: 291 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP0]], align 4 292 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[X1]], align 4 293 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 294 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 4 295 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 296 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[Y2]], align 4 297 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 298 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP1]], align 4 299 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], [8 x i32]* @.gomp_critical_user_.reduction.var) 300 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 301 // CHECK1: .omp.reduction.case2: 302 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[X1]], align 4 303 // CHECK1-NEXT: [[TMP15:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP14]] monotonic, align 4 304 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[Y2]], align 4 305 // CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw add i32* [[TMP1]], i32 [[TMP16]] monotonic, align 4 306 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], [8 x i32]* @.gomp_critical_user_.reduction.var) 307 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 308 // CHECK1: .omp.reduction.default: 309 // CHECK1-NEXT: ret void 310 // 311 // 312 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 313 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 314 // CHECK1-NEXT: entry: 315 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 316 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 317 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 318 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 319 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 320 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 321 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 322 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 323 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 324 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 325 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 326 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0 327 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 328 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 329 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1 330 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 331 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 332 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1 333 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 334 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 335 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP11]], align 4 336 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP8]], align 4 337 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 338 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 339 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP17]], align 4 340 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP14]], align 4 341 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 342 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 343 // CHECK1-NEXT: ret void 344 // 345 // 346 // CHECK1-LABEL: define {{[^@]+}}@_Z7mapFromv 347 // CHECK1-SAME: () #[[ATTR0]] { 348 // CHECK1-NEXT: entry: 349 // CHECK1-NEXT: [[X:%.*]] = alloca i32, align 4 350 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 351 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 352 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 353 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 354 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 355 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP1]], align 8 356 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 357 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 358 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP3]], align 8 359 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 360 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 361 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 362 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 363 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7mapFromv_l45.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 364 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 365 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 366 // CHECK1: omp_offload.failed: 367 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7mapFromv_l45(i32* [[X]]) #[[ATTR2]] 368 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 369 // CHECK1: omp_offload.cont: 370 // CHECK1-NEXT: ret void 371 // 372 // 373 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7mapFromv_l45 374 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 375 // CHECK1-NEXT: entry: 376 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 377 // CHECK1-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 378 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 379 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 380 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 381 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 382 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 383 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[X_CASTED]], align 8 384 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP2]]) 385 // CHECK1-NEXT: ret void 386 // 387 // 388 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 389 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[X:%.*]]) #[[ATTR1]] { 390 // CHECK1-NEXT: entry: 391 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 392 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 393 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 394 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 395 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 396 // CHECK1-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 397 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 398 // CHECK1-NEXT: ret void 399 // 400 // 401 // CHECK1-LABEL: define {{[^@]+}}@_Z5mapTov 402 // CHECK1-SAME: () #[[ATTR0]] { 403 // CHECK1-NEXT: entry: 404 // CHECK1-NEXT: [[X:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 406 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 407 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 408 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 409 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 410 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP1]], align 8 411 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 412 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 413 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP3]], align 8 414 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 415 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 416 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 417 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 418 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5mapTov_l51.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 419 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 420 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 421 // CHECK1: omp_offload.failed: 422 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5mapTov_l51(i32* [[X]]) #[[ATTR2]] 423 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 424 // CHECK1: omp_offload.cont: 425 // CHECK1-NEXT: ret void 426 // 427 // 428 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5mapTov_l51 429 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 430 // CHECK1-NEXT: entry: 431 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 432 // CHECK1-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 433 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 434 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 435 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 436 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 437 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 438 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[X_CASTED]], align 8 439 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP2]]) 440 // CHECK1-NEXT: ret void 441 // 442 // 443 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 444 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[X:%.*]]) #[[ATTR1]] { 445 // CHECK1-NEXT: entry: 446 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 447 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 448 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 449 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 450 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 451 // CHECK1-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 452 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 453 // CHECK1-NEXT: ret void 454 // 455 // 456 // CHECK1-LABEL: define {{[^@]+}}@_Z8mapAllocv 457 // CHECK1-SAME: () #[[ATTR0]] { 458 // CHECK1-NEXT: entry: 459 // CHECK1-NEXT: [[X:%.*]] = alloca i32, align 4 460 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 461 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 462 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 463 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 464 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 465 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP1]], align 8 466 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 467 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 468 // CHECK1-NEXT: store i32* [[X]], i32** [[TMP3]], align 8 469 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 470 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 471 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 472 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 473 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapAllocv_l57.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 474 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 475 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 476 // CHECK1: omp_offload.failed: 477 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapAllocv_l57(i32* [[X]]) #[[ATTR2]] 478 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 479 // CHECK1: omp_offload.cont: 480 // CHECK1-NEXT: ret void 481 // 482 // 483 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapAllocv_l57 484 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 485 // CHECK1-NEXT: entry: 486 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 487 // CHECK1-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 488 // CHECK1-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 489 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 490 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 491 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 492 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 493 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[X_CASTED]], align 8 494 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP2]]) 495 // CHECK1-NEXT: ret void 496 // 497 // 498 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13 499 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[X:%.*]]) #[[ATTR1]] { 500 // CHECK1-NEXT: entry: 501 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 502 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 503 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 504 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 505 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 506 // CHECK1-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 507 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 508 // CHECK1-NEXT: ret void 509 // 510 // 511 // CHECK1-LABEL: define {{[^@]+}}@_Z8mapArrayv 512 // CHECK1-SAME: () #[[ATTR0]] { 513 // CHECK1-NEXT: entry: 514 // CHECK1-NEXT: [[X:%.*]] = alloca [77 x i32], align 4 515 // CHECK1-NEXT: [[Y:%.*]] = alloca [88 x i32], align 4 516 // CHECK1-NEXT: [[Z:%.*]] = alloca [99 x i32], align 4 517 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 518 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 519 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 520 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [3 x i8*], align 8 521 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [3 x i8*], align 8 522 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [3 x i8*], align 8 523 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 524 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [88 x i32]** 525 // CHECK1-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[TMP1]], align 8 526 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 527 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [88 x i32]** 528 // CHECK1-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[TMP3]], align 8 529 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 530 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 531 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 532 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [99 x i32]** 533 // CHECK1-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[TMP6]], align 8 534 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 535 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [99 x i32]** 536 // CHECK1-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[TMP8]], align 8 537 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 538 // CHECK1-NEXT: store i8* null, i8** [[TMP9]], align 8 539 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 540 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to [77 x i32]** 541 // CHECK1-NEXT: store [77 x i32]* [[X]], [77 x i32]** [[TMP11]], align 8 542 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 543 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [77 x i32]** 544 // CHECK1-NEXT: store [77 x i32]* [[X]], [77 x i32]** [[TMP13]], align 8 545 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 546 // CHECK1-NEXT: store i8* null, i8** [[TMP14]], align 8 547 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 548 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 549 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l63.region_id, i32 3, i8** [[TMP15]], i8** [[TMP16]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.18, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.19, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 550 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 551 // CHECK1-NEXT: br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 552 // CHECK1: omp_offload.failed: 553 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l63([88 x i32]* [[Y]], [99 x i32]* [[Z]]) #[[ATTR2]] 554 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 555 // CHECK1: omp_offload.cont: 556 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 557 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [88 x i32]** 558 // CHECK1-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[TMP20]], align 8 559 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 560 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [88 x i32]** 561 // CHECK1-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[TMP22]], align 8 562 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 563 // CHECK1-NEXT: store i8* null, i8** [[TMP23]], align 8 564 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 1 565 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [99 x i32]** 566 // CHECK1-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[TMP25]], align 8 567 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 1 568 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to [99 x i32]** 569 // CHECK1-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[TMP27]], align 8 570 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 1 571 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8 572 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 2 573 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [77 x i32]** 574 // CHECK1-NEXT: store [77 x i32]* [[X]], [77 x i32]** [[TMP30]], align 8 575 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 2 576 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [77 x i32]** 577 // CHECK1-NEXT: store [77 x i32]* [[X]], [77 x i32]** [[TMP32]], align 8 578 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 2 579 // CHECK1-NEXT: store i8* null, i8** [[TMP33]], align 8 580 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 581 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 582 // CHECK1-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l65.region_id, i32 3, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.22, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.23, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 583 // CHECK1-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 584 // CHECK1-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED4:%.*]], label [[OMP_OFFLOAD_CONT5:%.*]] 585 // CHECK1: omp_offload.failed4: 586 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l65([88 x i32]* [[Y]], [99 x i32]* [[Z]]) #[[ATTR2]] 587 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT5]] 588 // CHECK1: omp_offload.cont5: 589 // CHECK1-NEXT: ret void 590 // 591 // 592 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l63 593 // CHECK1-SAME: ([88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR1]] { 594 // CHECK1-NEXT: entry: 595 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 8 596 // CHECK1-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 8 597 // CHECK1-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 8 598 // CHECK1-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 8 599 // CHECK1-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 8 600 // CHECK1-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 8 601 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [88 x i32]*, [99 x i32]*)* @.omp_outlined..16 to void (i32*, i32*, ...)*), [88 x i32]* [[TMP0]], [99 x i32]* [[TMP1]]) 602 // CHECK1-NEXT: ret void 603 // 604 // 605 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..16 606 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR1]] { 607 // CHECK1-NEXT: entry: 608 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 609 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 610 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 8 611 // CHECK1-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 8 612 // CHECK1-NEXT: [[Y1:%.*]] = alloca [88 x i32], align 4 613 // CHECK1-NEXT: [[X:%.*]] = alloca [77 x i32], align 4 614 // CHECK1-NEXT: [[Z2:%.*]] = alloca [99 x i32], align 4 615 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 616 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 617 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 618 // CHECK1-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 8 619 // CHECK1-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 8 620 // CHECK1-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 8 621 // CHECK1-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 8 622 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast [88 x i32]* [[Y1]] to i8* 623 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast [88 x i32]* [[TMP0]] to i8* 624 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i64 352, i1 false) 625 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [99 x i32], [99 x i32]* [[Z2]], i32 0, i32 0 626 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr i32, i32* [[ARRAY_BEGIN]], i64 99 627 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i32* [[ARRAY_BEGIN]], [[TMP4]] 628 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 629 // CHECK1: omp.arrayinit.body: 630 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 631 // CHECK1-NEXT: store i32 0, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 632 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 633 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]] 634 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 635 // CHECK1: omp.arrayinit.done: 636 // CHECK1-NEXT: [[LHS_BEGIN:%.*]] = bitcast [99 x i32]* [[TMP1]] to i32* 637 // CHECK1-NEXT: [[RHS_BEGIN:%.*]] = bitcast [99 x i32]* [[Z2]] to i32* 638 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 639 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[RHS_BEGIN]] to i8* 640 // CHECK1-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 8 641 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 642 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 643 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 644 // CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 1, i64 8, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.17, [8 x i32]* @.gomp_critical_user_.reduction.var) 645 // CHECK1-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 646 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 647 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 648 // CHECK1-NEXT: ] 649 // CHECK1: .omp.reduction.case1: 650 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i64 99 651 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP11]] 652 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 653 // CHECK1: omp.arraycpy.body: 654 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 655 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST3:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYCPY_BODY]] ] 656 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 657 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 658 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 659 // CHECK1-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 660 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], i32 1 661 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 662 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE5:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP11]] 663 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 664 // CHECK1: omp.arraycpy.done6: 665 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 666 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 667 // CHECK1: .omp.reduction.case2: 668 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i64 99 669 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY7:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP14]] 670 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY7]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY8:%.*]] 671 // CHECK1: omp.arraycpy.body8: 672 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 673 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 674 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], align 4 675 // CHECK1-NEXT: [[TMP16:%.*]] = atomicrmw add i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 [[TMP15]] monotonic, align 4 676 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 677 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT12]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 678 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT11]], [[TMP14]] 679 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY8]] 680 // CHECK1: omp.arraycpy.done14: 681 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 682 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 683 // CHECK1: .omp.reduction.default: 684 // CHECK1-NEXT: ret void 685 // 686 // 687 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.17 688 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 689 // CHECK1-NEXT: entry: 690 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 691 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 692 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 693 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 694 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 695 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 696 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 697 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 698 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 699 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 700 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 701 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 702 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 703 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 704 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr i32, i32* [[TMP11]], i64 99 705 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[TMP11]], [[TMP12]] 706 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 707 // CHECK1: omp.arraycpy.body: 708 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 709 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 710 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 711 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 712 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 713 // CHECK1-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 714 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 715 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 716 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]] 717 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]] 718 // CHECK1: omp.arraycpy.done2: 719 // CHECK1-NEXT: ret void 720 // 721 // 722 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l65 723 // CHECK1-SAME: ([88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR1]] { 724 // CHECK1-NEXT: entry: 725 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 8 726 // CHECK1-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 8 727 // CHECK1-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 8 728 // CHECK1-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 8 729 // CHECK1-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 8 730 // CHECK1-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 8 731 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [88 x i32]*, [99 x i32]*)* @.omp_outlined..20 to void (i32*, i32*, ...)*), [88 x i32]* [[TMP0]], [99 x i32]* [[TMP1]]) 732 // CHECK1-NEXT: ret void 733 // 734 // 735 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..20 736 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR1]] { 737 // CHECK1-NEXT: entry: 738 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 739 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 740 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 8 741 // CHECK1-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 8 742 // CHECK1-NEXT: [[Y1:%.*]] = alloca [88 x i32], align 4 743 // CHECK1-NEXT: [[X:%.*]] = alloca [77 x i32], align 4 744 // CHECK1-NEXT: [[Z2:%.*]] = alloca [99 x i32], align 4 745 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 746 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 747 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 748 // CHECK1-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 8 749 // CHECK1-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 8 750 // CHECK1-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 8 751 // CHECK1-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 8 752 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast [88 x i32]* [[Y1]] to i8* 753 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast [88 x i32]* [[TMP0]] to i8* 754 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i64 352, i1 false) 755 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [99 x i32], [99 x i32]* [[Z2]], i32 0, i32 0 756 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr i32, i32* [[ARRAY_BEGIN]], i64 99 757 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i32* [[ARRAY_BEGIN]], [[TMP4]] 758 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 759 // CHECK1: omp.arrayinit.body: 760 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 761 // CHECK1-NEXT: store i32 0, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 762 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 763 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]] 764 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 765 // CHECK1: omp.arrayinit.done: 766 // CHECK1-NEXT: [[LHS_BEGIN:%.*]] = bitcast [99 x i32]* [[TMP1]] to i32* 767 // CHECK1-NEXT: [[RHS_BEGIN:%.*]] = bitcast [99 x i32]* [[Z2]] to i32* 768 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 769 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[RHS_BEGIN]] to i8* 770 // CHECK1-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 8 771 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 772 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 773 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 774 // CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 1, i64 8, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.21, [8 x i32]* @.gomp_critical_user_.reduction.var) 775 // CHECK1-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 776 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 777 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 778 // CHECK1-NEXT: ] 779 // CHECK1: .omp.reduction.case1: 780 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i64 99 781 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP11]] 782 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 783 // CHECK1: omp.arraycpy.body: 784 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 785 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST3:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYCPY_BODY]] ] 786 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 787 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 788 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 789 // CHECK1-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 790 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], i32 1 791 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 792 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE5:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP11]] 793 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 794 // CHECK1: omp.arraycpy.done6: 795 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 796 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 797 // CHECK1: .omp.reduction.case2: 798 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i64 99 799 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY7:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP14]] 800 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY7]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY8:%.*]] 801 // CHECK1: omp.arraycpy.body8: 802 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 803 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 804 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], align 4 805 // CHECK1-NEXT: [[TMP16:%.*]] = atomicrmw add i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 [[TMP15]] monotonic, align 4 806 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 807 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT12]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 808 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT11]], [[TMP14]] 809 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY8]] 810 // CHECK1: omp.arraycpy.done14: 811 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 812 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 813 // CHECK1: .omp.reduction.default: 814 // CHECK1-NEXT: ret void 815 // 816 // 817 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.21 818 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 819 // CHECK1-NEXT: entry: 820 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 821 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 822 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 823 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 824 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 825 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 826 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 827 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 828 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 829 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 830 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 831 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 832 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 833 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 834 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr i32, i32* [[TMP11]], i64 99 835 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[TMP11]], [[TMP12]] 836 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 837 // CHECK1: omp.arraycpy.body: 838 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 839 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 840 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 841 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 842 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 843 // CHECK1-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 844 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 845 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 846 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]] 847 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]] 848 // CHECK1: omp.arraycpy.done2: 849 // CHECK1-NEXT: ret void 850 // 851 // 852 // CHECK1-LABEL: define {{[^@]+}}@_Z9mapInt128v 853 // CHECK1-SAME: () #[[ATTR0]] { 854 // CHECK1-NEXT: entry: 855 // CHECK1-NEXT: [[X:%.*]] = alloca i128, align 16 856 // CHECK1-NEXT: [[Y:%.*]] = alloca i128, align 16 857 // CHECK1-NEXT: [[Z:%.*]] = alloca i128, align 16 858 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 859 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 860 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 861 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [3 x i8*], align 8 862 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [3 x i8*], align 8 863 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [3 x i8*], align 8 864 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 865 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i128** 866 // CHECK1-NEXT: store i128* [[Y]], i128** [[TMP1]], align 8 867 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 868 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i128** 869 // CHECK1-NEXT: store i128* [[Y]], i128** [[TMP3]], align 8 870 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 871 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 872 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 873 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i128** 874 // CHECK1-NEXT: store i128* [[Z]], i128** [[TMP6]], align 8 875 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 876 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i128** 877 // CHECK1-NEXT: store i128* [[Z]], i128** [[TMP8]], align 8 878 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 879 // CHECK1-NEXT: store i8* null, i8** [[TMP9]], align 8 880 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 881 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i128** 882 // CHECK1-NEXT: store i128* [[X]], i128** [[TMP11]], align 8 883 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 884 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i128** 885 // CHECK1-NEXT: store i128* [[X]], i128** [[TMP13]], align 8 886 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 887 // CHECK1-NEXT: store i8* null, i8** [[TMP14]], align 8 888 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 889 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 890 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9mapInt128v_l72.region_id, i32 3, i8** [[TMP15]], i8** [[TMP16]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.26, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.27, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 891 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 892 // CHECK1-NEXT: br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 893 // CHECK1: omp_offload.failed: 894 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9mapInt128v_l72(i128* [[Y]], i128* [[Z]]) #[[ATTR2]] 895 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 896 // CHECK1: omp_offload.cont: 897 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 898 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i128** 899 // CHECK1-NEXT: store i128* [[Y]], i128** [[TMP20]], align 8 900 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 901 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i128** 902 // CHECK1-NEXT: store i128* [[Y]], i128** [[TMP22]], align 8 903 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 904 // CHECK1-NEXT: store i8* null, i8** [[TMP23]], align 8 905 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 1 906 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i128** 907 // CHECK1-NEXT: store i128* [[Z]], i128** [[TMP25]], align 8 908 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 1 909 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i128** 910 // CHECK1-NEXT: store i128* [[Z]], i128** [[TMP27]], align 8 911 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 1 912 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8 913 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 2 914 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i128** 915 // CHECK1-NEXT: store i128* [[X]], i128** [[TMP30]], align 8 916 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 2 917 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i128** 918 // CHECK1-NEXT: store i128* [[X]], i128** [[TMP32]], align 8 919 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 2 920 // CHECK1-NEXT: store i8* null, i8** [[TMP33]], align 8 921 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 922 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 923 // CHECK1-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9mapInt128v_l74.region_id, i32 3, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.30, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.31, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 924 // CHECK1-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 925 // CHECK1-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED4:%.*]], label [[OMP_OFFLOAD_CONT5:%.*]] 926 // CHECK1: omp_offload.failed4: 927 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9mapInt128v_l74(i128* [[Y]], i128* [[Z]]) #[[ATTR2]] 928 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT5]] 929 // CHECK1: omp_offload.cont5: 930 // CHECK1-NEXT: ret void 931 // 932 // 933 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9mapInt128v_l72 934 // CHECK1-SAME: (i128* noundef nonnull align 16 dereferenceable(16) [[Y:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Z:%.*]]) #[[ATTR1]] { 935 // CHECK1-NEXT: entry: 936 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca i128*, align 8 937 // CHECK1-NEXT: [[Z_ADDR:%.*]] = alloca i128*, align 8 938 // CHECK1-NEXT: store i128* [[Y]], i128** [[Y_ADDR]], align 8 939 // CHECK1-NEXT: store i128* [[Z]], i128** [[Z_ADDR]], align 8 940 // CHECK1-NEXT: [[TMP0:%.*]] = load i128*, i128** [[Y_ADDR]], align 8 941 // CHECK1-NEXT: [[TMP1:%.*]] = load i128*, i128** [[Z_ADDR]], align 8 942 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i128*, i128*)* @.omp_outlined..24 to void (i32*, i32*, ...)*), i128* [[TMP0]], i128* [[TMP1]]) 943 // CHECK1-NEXT: ret void 944 // 945 // 946 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..24 947 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Y:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Z:%.*]]) #[[ATTR1]] { 948 // CHECK1-NEXT: entry: 949 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 950 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 951 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca i128*, align 8 952 // CHECK1-NEXT: [[Z_ADDR:%.*]] = alloca i128*, align 8 953 // CHECK1-NEXT: [[Y1:%.*]] = alloca i128, align 16 954 // CHECK1-NEXT: [[X:%.*]] = alloca i128, align 16 955 // CHECK1-NEXT: [[Z2:%.*]] = alloca i128, align 16 956 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 957 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i128, align 16 958 // CHECK1-NEXT: [[ATOMIC_TEMP3:%.*]] = alloca i128, align 16 959 // CHECK1-NEXT: [[TMP:%.*]] = alloca i128, align 16 960 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 961 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 962 // CHECK1-NEXT: store i128* [[Y]], i128** [[Y_ADDR]], align 8 963 // CHECK1-NEXT: store i128* [[Z]], i128** [[Z_ADDR]], align 8 964 // CHECK1-NEXT: [[TMP0:%.*]] = load i128*, i128** [[Y_ADDR]], align 8 965 // CHECK1-NEXT: [[TMP1:%.*]] = load i128*, i128** [[Z_ADDR]], align 8 966 // CHECK1-NEXT: [[TMP2:%.*]] = load i128, i128* [[TMP0]], align 16 967 // CHECK1-NEXT: store i128 [[TMP2]], i128* [[Y1]], align 16 968 // CHECK1-NEXT: store i128 0, i128* [[Z2]], align 16 969 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 970 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i128* [[Z2]] to i8* 971 // CHECK1-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 8 972 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 973 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 974 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 975 // CHECK1-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 1, i64 8, i8* [[TMP7]], void (i8*, i8*)* @.omp.reduction.reduction_func.25, [8 x i32]* @.gomp_critical_user_.reduction.var) 976 // CHECK1-NEXT: switch i32 [[TMP8]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 977 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 978 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 979 // CHECK1-NEXT: ] 980 // CHECK1: .omp.reduction.case1: 981 // CHECK1-NEXT: [[TMP9:%.*]] = load i128, i128* [[TMP1]], align 16 982 // CHECK1-NEXT: [[TMP10:%.*]] = load i128, i128* [[Z2]], align 16 983 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i128 [[TMP9]], [[TMP10]] 984 // CHECK1-NEXT: store i128 [[ADD]], i128* [[TMP1]], align 16 985 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], [8 x i32]* @.gomp_critical_user_.reduction.var) 986 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 987 // CHECK1: .omp.reduction.case2: 988 // CHECK1-NEXT: [[TMP11:%.*]] = load i128, i128* [[Z2]], align 16 989 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i128* [[TMP1]] to i8* 990 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i128* [[ATOMIC_TEMP]] to i8* 991 // CHECK1-NEXT: call void @__atomic_load(i64 noundef 16, i8* noundef [[TMP12]], i8* noundef [[TMP13]], i32 noundef signext 0) 992 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 993 // CHECK1: atomic_cont: 994 // CHECK1-NEXT: [[TMP14:%.*]] = load i128, i128* [[ATOMIC_TEMP]], align 16 995 // CHECK1-NEXT: store i128 [[TMP14]], i128* [[TMP]], align 16 996 // CHECK1-NEXT: [[TMP15:%.*]] = load i128, i128* [[TMP]], align 16 997 // CHECK1-NEXT: [[TMP16:%.*]] = load i128, i128* [[Z2]], align 16 998 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i128 [[TMP15]], [[TMP16]] 999 // CHECK1-NEXT: store i128 [[ADD4]], i128* [[ATOMIC_TEMP3]], align 16 1000 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i128* [[TMP1]] to i8* 1001 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i128* [[ATOMIC_TEMP]] to i8* 1002 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i128* [[ATOMIC_TEMP3]] to i8* 1003 // CHECK1-NEXT: [[CALL:%.*]] = call noundef zeroext i1 @__atomic_compare_exchange(i64 noundef 16, i8* noundef [[TMP17]], i8* noundef [[TMP18]], i8* noundef [[TMP19]], i32 noundef signext 0, i32 noundef signext 0) 1004 // CHECK1-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 1005 // CHECK1: atomic_exit: 1006 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1007 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1008 // CHECK1: .omp.reduction.default: 1009 // CHECK1-NEXT: ret void 1010 // 1011 // 1012 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.25 1013 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 1014 // CHECK1-NEXT: entry: 1015 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1016 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1017 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1018 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1019 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1020 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1021 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1022 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1023 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1024 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1025 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i128* 1026 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 1027 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1028 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i128* 1029 // CHECK1-NEXT: [[TMP12:%.*]] = load i128, i128* [[TMP11]], align 16 1030 // CHECK1-NEXT: [[TMP13:%.*]] = load i128, i128* [[TMP8]], align 16 1031 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i128 [[TMP12]], [[TMP13]] 1032 // CHECK1-NEXT: store i128 [[ADD]], i128* [[TMP11]], align 16 1033 // CHECK1-NEXT: ret void 1034 // 1035 // 1036 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9mapInt128v_l74 1037 // CHECK1-SAME: (i128* noundef nonnull align 16 dereferenceable(16) [[Y:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Z:%.*]]) #[[ATTR1]] { 1038 // CHECK1-NEXT: entry: 1039 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca i128*, align 8 1040 // CHECK1-NEXT: [[Z_ADDR:%.*]] = alloca i128*, align 8 1041 // CHECK1-NEXT: store i128* [[Y]], i128** [[Y_ADDR]], align 8 1042 // CHECK1-NEXT: store i128* [[Z]], i128** [[Z_ADDR]], align 8 1043 // CHECK1-NEXT: [[TMP0:%.*]] = load i128*, i128** [[Y_ADDR]], align 8 1044 // CHECK1-NEXT: [[TMP1:%.*]] = load i128*, i128** [[Z_ADDR]], align 8 1045 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i128*, i128*)* @.omp_outlined..28 to void (i32*, i32*, ...)*), i128* [[TMP0]], i128* [[TMP1]]) 1046 // CHECK1-NEXT: ret void 1047 // 1048 // 1049 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..28 1050 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Y:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Z:%.*]]) #[[ATTR1]] { 1051 // CHECK1-NEXT: entry: 1052 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1053 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1054 // CHECK1-NEXT: [[Y_ADDR:%.*]] = alloca i128*, align 8 1055 // CHECK1-NEXT: [[Z_ADDR:%.*]] = alloca i128*, align 8 1056 // CHECK1-NEXT: [[Y1:%.*]] = alloca i128, align 16 1057 // CHECK1-NEXT: [[X:%.*]] = alloca i128, align 16 1058 // CHECK1-NEXT: [[Z2:%.*]] = alloca i128, align 16 1059 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 1060 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i128, align 16 1061 // CHECK1-NEXT: [[ATOMIC_TEMP3:%.*]] = alloca i128, align 16 1062 // CHECK1-NEXT: [[TMP:%.*]] = alloca i128, align 16 1063 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1064 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1065 // CHECK1-NEXT: store i128* [[Y]], i128** [[Y_ADDR]], align 8 1066 // CHECK1-NEXT: store i128* [[Z]], i128** [[Z_ADDR]], align 8 1067 // CHECK1-NEXT: [[TMP0:%.*]] = load i128*, i128** [[Y_ADDR]], align 8 1068 // CHECK1-NEXT: [[TMP1:%.*]] = load i128*, i128** [[Z_ADDR]], align 8 1069 // CHECK1-NEXT: [[TMP2:%.*]] = load i128, i128* [[TMP0]], align 16 1070 // CHECK1-NEXT: store i128 [[TMP2]], i128* [[Y1]], align 16 1071 // CHECK1-NEXT: store i128 0, i128* [[Z2]], align 16 1072 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1073 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i128* [[Z2]] to i8* 1074 // CHECK1-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 8 1075 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1076 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1077 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1078 // CHECK1-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 1, i64 8, i8* [[TMP7]], void (i8*, i8*)* @.omp.reduction.reduction_func.29, [8 x i32]* @.gomp_critical_user_.reduction.var) 1079 // CHECK1-NEXT: switch i32 [[TMP8]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1080 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1081 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1082 // CHECK1-NEXT: ] 1083 // CHECK1: .omp.reduction.case1: 1084 // CHECK1-NEXT: [[TMP9:%.*]] = load i128, i128* [[TMP1]], align 16 1085 // CHECK1-NEXT: [[TMP10:%.*]] = load i128, i128* [[Z2]], align 16 1086 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i128 [[TMP9]], [[TMP10]] 1087 // CHECK1-NEXT: store i128 [[ADD]], i128* [[TMP1]], align 16 1088 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1089 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1090 // CHECK1: .omp.reduction.case2: 1091 // CHECK1-NEXT: [[TMP11:%.*]] = load i128, i128* [[Z2]], align 16 1092 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i128* [[TMP1]] to i8* 1093 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i128* [[ATOMIC_TEMP]] to i8* 1094 // CHECK1-NEXT: call void @__atomic_load(i64 noundef 16, i8* noundef [[TMP12]], i8* noundef [[TMP13]], i32 noundef signext 0) 1095 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 1096 // CHECK1: atomic_cont: 1097 // CHECK1-NEXT: [[TMP14:%.*]] = load i128, i128* [[ATOMIC_TEMP]], align 16 1098 // CHECK1-NEXT: store i128 [[TMP14]], i128* [[TMP]], align 16 1099 // CHECK1-NEXT: [[TMP15:%.*]] = load i128, i128* [[TMP]], align 16 1100 // CHECK1-NEXT: [[TMP16:%.*]] = load i128, i128* [[Z2]], align 16 1101 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i128 [[TMP15]], [[TMP16]] 1102 // CHECK1-NEXT: store i128 [[ADD4]], i128* [[ATOMIC_TEMP3]], align 16 1103 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i128* [[TMP1]] to i8* 1104 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i128* [[ATOMIC_TEMP]] to i8* 1105 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i128* [[ATOMIC_TEMP3]] to i8* 1106 // CHECK1-NEXT: [[CALL:%.*]] = call noundef zeroext i1 @__atomic_compare_exchange(i64 noundef 16, i8* noundef [[TMP17]], i8* noundef [[TMP18]], i8* noundef [[TMP19]], i32 noundef signext 0, i32 noundef signext 0) 1107 // CHECK1-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 1108 // CHECK1: atomic_exit: 1109 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1110 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1111 // CHECK1: .omp.reduction.default: 1112 // CHECK1-NEXT: ret void 1113 // 1114 // 1115 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.29 1116 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 1117 // CHECK1-NEXT: entry: 1118 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1119 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1120 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1121 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1122 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1123 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1124 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1125 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1126 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1127 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1128 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i128* 1129 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 1130 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1131 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i128* 1132 // CHECK1-NEXT: [[TMP12:%.*]] = load i128, i128* [[TMP11]], align 16 1133 // CHECK1-NEXT: [[TMP13:%.*]] = load i128, i128* [[TMP8]], align 16 1134 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i128 [[TMP12]], [[TMP13]] 1135 // CHECK1-NEXT: store i128 [[ADD]], i128* [[TMP11]], align 16 1136 // CHECK1-NEXT: ret void 1137 // 1138 // 1139 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1140 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] { 1141 // CHECK1-NEXT: entry: 1142 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1143 // CHECK1-NEXT: ret void 1144 // 1145 // 1146 // CHECK3-LABEL: define {{[^@]+}}@_Z14mapWithPrivatev 1147 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1148 // CHECK3-NEXT: entry: 1149 // CHECK3-NEXT: [[X:%.*]] = alloca i32, align 4 1150 // CHECK3-NEXT: [[Y:%.*]] = alloca i32, align 4 1151 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 1152 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 1153 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 1154 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1155 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 1156 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP1]], align 4 1157 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1158 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 1159 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP3]], align 4 1160 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1161 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 1162 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1163 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32** 1164 // CHECK3-NEXT: store i32* [[Y]], i32** [[TMP6]], align 4 1165 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1166 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32** 1167 // CHECK3-NEXT: store i32* [[Y]], i32** [[TMP8]], align 4 1168 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1169 // CHECK3-NEXT: store i8* null, i8** [[TMP9]], align 4 1170 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1171 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1172 // CHECK3-NEXT: [[TMP12:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14mapWithPrivatev_l27.region_id, i32 2, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1173 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 1174 // CHECK3-NEXT: br i1 [[TMP13]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1175 // CHECK3: omp_offload.failed: 1176 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14mapWithPrivatev_l27() #[[ATTR2:[0-9]+]] 1177 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1178 // CHECK3: omp_offload.cont: 1179 // CHECK3-NEXT: ret void 1180 // 1181 // 1182 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14mapWithPrivatev_l27 1183 // CHECK3-SAME: () #[[ATTR1:[0-9]+]] { 1184 // CHECK3-NEXT: entry: 1185 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1186 // CHECK3-NEXT: ret void 1187 // 1188 // 1189 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1190 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1191 // CHECK3-NEXT: entry: 1192 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1193 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1194 // CHECK3-NEXT: [[X:%.*]] = alloca i32, align 4 1195 // CHECK3-NEXT: [[Y:%.*]] = alloca i32, align 4 1196 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1197 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1198 // CHECK3-NEXT: ret void 1199 // 1200 // 1201 // CHECK3-LABEL: define {{[^@]+}}@_Z19mapWithFirstprivatev 1202 // CHECK3-SAME: () #[[ATTR0]] { 1203 // CHECK3-NEXT: entry: 1204 // CHECK3-NEXT: [[X:%.*]] = alloca i32, align 4 1205 // CHECK3-NEXT: [[Y:%.*]] = alloca i32, align 4 1206 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 1207 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 1208 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 1209 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1210 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 1211 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP1]], align 4 1212 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1213 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 1214 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP3]], align 4 1215 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1216 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 1217 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1218 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32** 1219 // CHECK3-NEXT: store i32* [[Y]], i32** [[TMP6]], align 4 1220 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1221 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32** 1222 // CHECK3-NEXT: store i32* [[Y]], i32** [[TMP8]], align 4 1223 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1224 // CHECK3-NEXT: store i8* null, i8** [[TMP9]], align 4 1225 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1226 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1227 // CHECK3-NEXT: [[TMP12:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z19mapWithFirstprivatev_l33.region_id, i32 2, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1228 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 1229 // CHECK3-NEXT: br i1 [[TMP13]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1230 // CHECK3: omp_offload.failed: 1231 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z19mapWithFirstprivatev_l33(i32* [[X]], i32* [[Y]]) #[[ATTR2]] 1232 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1233 // CHECK3: omp_offload.cont: 1234 // CHECK3-NEXT: ret void 1235 // 1236 // 1237 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z19mapWithFirstprivatev_l33 1238 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR1]] { 1239 // CHECK3-NEXT: entry: 1240 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1241 // CHECK3-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 4 1242 // CHECK3-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 1243 // CHECK3-NEXT: [[Y_CASTED:%.*]] = alloca i32, align 4 1244 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1245 // CHECK3-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 4 1246 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1247 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 4 1248 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1249 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[X_CASTED]], align 4 1250 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[X_CASTED]], align 4 1251 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 1252 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[Y_CASTED]], align 4 1253 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[Y_CASTED]], align 4 1254 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP5]]) 1255 // CHECK3-NEXT: ret void 1256 // 1257 // 1258 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1259 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR1]] { 1260 // CHECK3-NEXT: entry: 1261 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1262 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1263 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 1264 // CHECK3-NEXT: [[Y_ADDR:%.*]] = alloca i32, align 4 1265 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1266 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1267 // CHECK3-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 1268 // CHECK3-NEXT: store i32 [[Y]], i32* [[Y_ADDR]], align 4 1269 // CHECK3-NEXT: ret void 1270 // 1271 // 1272 // CHECK3-LABEL: define {{[^@]+}}@_Z16mapWithReductionv 1273 // CHECK3-SAME: () #[[ATTR0]] { 1274 // CHECK3-NEXT: entry: 1275 // CHECK3-NEXT: [[X:%.*]] = alloca i32, align 4 1276 // CHECK3-NEXT: [[Y:%.*]] = alloca i32, align 4 1277 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4 1278 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4 1279 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4 1280 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1281 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 1282 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP1]], align 4 1283 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1284 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 1285 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP3]], align 4 1286 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1287 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 1288 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1289 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32** 1290 // CHECK3-NEXT: store i32* [[Y]], i32** [[TMP6]], align 4 1291 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1292 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32** 1293 // CHECK3-NEXT: store i32* [[Y]], i32** [[TMP8]], align 4 1294 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1295 // CHECK3-NEXT: store i8* null, i8** [[TMP9]], align 4 1296 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1297 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1298 // CHECK3-NEXT: [[TMP12:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16mapWithReductionv_l39.region_id, i32 2, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1299 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 1300 // CHECK3-NEXT: br i1 [[TMP13]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1301 // CHECK3: omp_offload.failed: 1302 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16mapWithReductionv_l39(i32* [[X]], i32* [[Y]]) #[[ATTR2]] 1303 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1304 // CHECK3: omp_offload.cont: 1305 // CHECK3-NEXT: ret void 1306 // 1307 // 1308 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16mapWithReductionv_l39 1309 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR1]] { 1310 // CHECK3-NEXT: entry: 1311 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1312 // CHECK3-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 4 1313 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1314 // CHECK3-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 4 1315 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1316 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 4 1317 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[TMP0]], i32* [[TMP1]]) 1318 // CHECK3-NEXT: ret void 1319 // 1320 // 1321 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 1322 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR1]] { 1323 // CHECK3-NEXT: entry: 1324 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1325 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1326 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1327 // CHECK3-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 4 1328 // CHECK3-NEXT: [[X1:%.*]] = alloca i32, align 4 1329 // CHECK3-NEXT: [[Y2:%.*]] = alloca i32, align 4 1330 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 4 1331 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1332 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1333 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1334 // CHECK3-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 4 1335 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1336 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 4 1337 // CHECK3-NEXT: store i32 0, i32* [[X1]], align 4 1338 // CHECK3-NEXT: store i32 0, i32* [[Y2]], align 4 1339 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1340 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i32* [[X1]] to i8* 1341 // CHECK3-NEXT: store i8* [[TMP3]], i8** [[TMP2]], align 4 1342 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 1 1343 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i32* [[Y2]] to i8* 1344 // CHECK3-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 4 1345 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1346 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1347 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1348 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP7]], i32 2, i32 8, i8* [[TMP8]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 1349 // CHECK3-NEXT: switch i32 [[TMP9]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1350 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1351 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1352 // CHECK3-NEXT: ] 1353 // CHECK3: .omp.reduction.case1: 1354 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP0]], align 4 1355 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[X1]], align 4 1356 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1357 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 4 1358 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 1359 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[Y2]], align 4 1360 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1361 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP1]], align 4 1362 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1363 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1364 // CHECK3: .omp.reduction.case2: 1365 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[X1]], align 4 1366 // CHECK3-NEXT: [[TMP15:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP14]] monotonic, align 4 1367 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[Y2]], align 4 1368 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add i32* [[TMP1]], i32 [[TMP16]] monotonic, align 4 1369 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1370 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1371 // CHECK3: .omp.reduction.default: 1372 // CHECK3-NEXT: ret void 1373 // 1374 // 1375 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 1376 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 1377 // CHECK3-NEXT: entry: 1378 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 1379 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 1380 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 1381 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 1382 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 1383 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 1384 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 1385 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 1386 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0 1387 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 1388 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1389 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i32 0, i32 0 1390 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 1391 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1392 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1 1393 // CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 4 1394 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 1395 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i32 0, i32 1 1396 // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 4 1397 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 1398 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP11]], align 4 1399 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP8]], align 4 1400 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1401 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1402 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP17]], align 4 1403 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP14]], align 4 1404 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 1405 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 1406 // CHECK3-NEXT: ret void 1407 // 1408 // 1409 // CHECK3-LABEL: define {{[^@]+}}@_Z7mapFromv 1410 // CHECK3-SAME: () #[[ATTR0]] { 1411 // CHECK3-NEXT: entry: 1412 // CHECK3-NEXT: [[X:%.*]] = alloca i32, align 4 1413 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1414 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1415 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1416 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1417 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 1418 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP1]], align 4 1419 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1420 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 1421 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP3]], align 4 1422 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1423 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 1424 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1425 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1426 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7mapFromv_l45.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1427 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1428 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1429 // CHECK3: omp_offload.failed: 1430 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7mapFromv_l45(i32* [[X]]) #[[ATTR2]] 1431 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1432 // CHECK3: omp_offload.cont: 1433 // CHECK3-NEXT: ret void 1434 // 1435 // 1436 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7mapFromv_l45 1437 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 1438 // CHECK3-NEXT: entry: 1439 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1440 // CHECK3-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 1441 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1442 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1443 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1444 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[X_CASTED]], align 4 1445 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_CASTED]], align 4 1446 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP2]]) 1447 // CHECK3-NEXT: ret void 1448 // 1449 // 1450 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 1451 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[X:%.*]]) #[[ATTR1]] { 1452 // CHECK3-NEXT: entry: 1453 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1454 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1455 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 1456 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1457 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1458 // CHECK3-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 1459 // CHECK3-NEXT: ret void 1460 // 1461 // 1462 // CHECK3-LABEL: define {{[^@]+}}@_Z5mapTov 1463 // CHECK3-SAME: () #[[ATTR0]] { 1464 // CHECK3-NEXT: entry: 1465 // CHECK3-NEXT: [[X:%.*]] = alloca i32, align 4 1466 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1467 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1468 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1469 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1470 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 1471 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP1]], align 4 1472 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1473 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 1474 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP3]], align 4 1475 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1476 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 1477 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1478 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1479 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5mapTov_l51.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1480 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1481 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1482 // CHECK3: omp_offload.failed: 1483 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5mapTov_l51(i32* [[X]]) #[[ATTR2]] 1484 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1485 // CHECK3: omp_offload.cont: 1486 // CHECK3-NEXT: ret void 1487 // 1488 // 1489 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5mapTov_l51 1490 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 1491 // CHECK3-NEXT: entry: 1492 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1493 // CHECK3-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 1494 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1495 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1496 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1497 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[X_CASTED]], align 4 1498 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_CASTED]], align 4 1499 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32 [[TMP2]]) 1500 // CHECK3-NEXT: ret void 1501 // 1502 // 1503 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 1504 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[X:%.*]]) #[[ATTR1]] { 1505 // CHECK3-NEXT: entry: 1506 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1507 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1508 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 1509 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1510 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1511 // CHECK3-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 1512 // CHECK3-NEXT: ret void 1513 // 1514 // 1515 // CHECK3-LABEL: define {{[^@]+}}@_Z8mapAllocv 1516 // CHECK3-SAME: () #[[ATTR0]] { 1517 // CHECK3-NEXT: entry: 1518 // CHECK3-NEXT: [[X:%.*]] = alloca i32, align 4 1519 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1520 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1521 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1522 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1523 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 1524 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP1]], align 4 1525 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1526 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 1527 // CHECK3-NEXT: store i32* [[X]], i32** [[TMP3]], align 4 1528 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1529 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 1530 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1531 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1532 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapAllocv_l57.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1533 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1534 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1535 // CHECK3: omp_offload.failed: 1536 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapAllocv_l57(i32* [[X]]) #[[ATTR2]] 1537 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1538 // CHECK3: omp_offload.cont: 1539 // CHECK3-NEXT: ret void 1540 // 1541 // 1542 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapAllocv_l57 1543 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] { 1544 // CHECK3-NEXT: entry: 1545 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 1546 // CHECK3-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 1547 // CHECK3-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 1548 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 1549 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1550 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[X_CASTED]], align 4 1551 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_CASTED]], align 4 1552 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i32 [[TMP2]]) 1553 // CHECK3-NEXT: ret void 1554 // 1555 // 1556 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..13 1557 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[X:%.*]]) #[[ATTR1]] { 1558 // CHECK3-NEXT: entry: 1559 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1560 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1561 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 1562 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1563 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1564 // CHECK3-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 1565 // CHECK3-NEXT: ret void 1566 // 1567 // 1568 // CHECK3-LABEL: define {{[^@]+}}@_Z8mapArrayv 1569 // CHECK3-SAME: () #[[ATTR0]] { 1570 // CHECK3-NEXT: entry: 1571 // CHECK3-NEXT: [[X:%.*]] = alloca [77 x i32], align 4 1572 // CHECK3-NEXT: [[Y:%.*]] = alloca [88 x i32], align 4 1573 // CHECK3-NEXT: [[Z:%.*]] = alloca [99 x i32], align 4 1574 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 1575 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 1576 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 1577 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [3 x i8*], align 4 1578 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [3 x i8*], align 4 1579 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [3 x i8*], align 4 1580 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1581 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [88 x i32]** 1582 // CHECK3-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[TMP1]], align 4 1583 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1584 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [88 x i32]** 1585 // CHECK3-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[TMP3]], align 4 1586 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1587 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 1588 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1589 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [99 x i32]** 1590 // CHECK3-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[TMP6]], align 4 1591 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1592 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [99 x i32]** 1593 // CHECK3-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[TMP8]], align 4 1594 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1595 // CHECK3-NEXT: store i8* null, i8** [[TMP9]], align 4 1596 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1597 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to [77 x i32]** 1598 // CHECK3-NEXT: store [77 x i32]* [[X]], [77 x i32]** [[TMP11]], align 4 1599 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1600 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [77 x i32]** 1601 // CHECK3-NEXT: store [77 x i32]* [[X]], [77 x i32]** [[TMP13]], align 4 1602 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1603 // CHECK3-NEXT: store i8* null, i8** [[TMP14]], align 4 1604 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1605 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1606 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l63.region_id, i32 3, i8** [[TMP15]], i8** [[TMP16]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.18, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.19, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1607 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1608 // CHECK3-NEXT: br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1609 // CHECK3: omp_offload.failed: 1610 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l63([88 x i32]* [[Y]], [99 x i32]* [[Z]]) #[[ATTR2]] 1611 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1612 // CHECK3: omp_offload.cont: 1613 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1614 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [88 x i32]** 1615 // CHECK3-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[TMP20]], align 4 1616 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1617 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [88 x i32]** 1618 // CHECK3-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[TMP22]], align 4 1619 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 1620 // CHECK3-NEXT: store i8* null, i8** [[TMP23]], align 4 1621 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 1 1622 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [99 x i32]** 1623 // CHECK3-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[TMP25]], align 4 1624 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 1 1625 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to [99 x i32]** 1626 // CHECK3-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[TMP27]], align 4 1627 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 1 1628 // CHECK3-NEXT: store i8* null, i8** [[TMP28]], align 4 1629 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 2 1630 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [77 x i32]** 1631 // CHECK3-NEXT: store [77 x i32]* [[X]], [77 x i32]** [[TMP30]], align 4 1632 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 2 1633 // CHECK3-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [77 x i32]** 1634 // CHECK3-NEXT: store [77 x i32]* [[X]], [77 x i32]** [[TMP32]], align 4 1635 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 2 1636 // CHECK3-NEXT: store i8* null, i8** [[TMP33]], align 4 1637 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1638 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1639 // CHECK3-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l65.region_id, i32 3, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.22, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.23, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1640 // CHECK3-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1641 // CHECK3-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED4:%.*]], label [[OMP_OFFLOAD_CONT5:%.*]] 1642 // CHECK3: omp_offload.failed4: 1643 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l65([88 x i32]* [[Y]], [99 x i32]* [[Z]]) #[[ATTR2]] 1644 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT5]] 1645 // CHECK3: omp_offload.cont5: 1646 // CHECK3-NEXT: ret void 1647 // 1648 // 1649 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l63 1650 // CHECK3-SAME: ([88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR1]] { 1651 // CHECK3-NEXT: entry: 1652 // CHECK3-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 4 1653 // CHECK3-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 4 1654 // CHECK3-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 4 1655 // CHECK3-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 4 1656 // CHECK3-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 4 1657 // CHECK3-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 4 1658 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [88 x i32]*, [99 x i32]*)* @.omp_outlined..16 to void (i32*, i32*, ...)*), [88 x i32]* [[TMP0]], [99 x i32]* [[TMP1]]) 1659 // CHECK3-NEXT: ret void 1660 // 1661 // 1662 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..16 1663 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR1]] { 1664 // CHECK3-NEXT: entry: 1665 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1666 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1667 // CHECK3-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 4 1668 // CHECK3-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 4 1669 // CHECK3-NEXT: [[Y1:%.*]] = alloca [88 x i32], align 4 1670 // CHECK3-NEXT: [[X:%.*]] = alloca [77 x i32], align 4 1671 // CHECK3-NEXT: [[Z2:%.*]] = alloca [99 x i32], align 4 1672 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 1673 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1674 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1675 // CHECK3-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 4 1676 // CHECK3-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 4 1677 // CHECK3-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 4 1678 // CHECK3-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 4 1679 // CHECK3-NEXT: [[TMP2:%.*]] = bitcast [88 x i32]* [[Y1]] to i8* 1680 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast [88 x i32]* [[TMP0]] to i8* 1681 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i32 352, i1 false) 1682 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [99 x i32], [99 x i32]* [[Z2]], i32 0, i32 0 1683 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr i32, i32* [[ARRAY_BEGIN]], i32 99 1684 // CHECK3-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i32* [[ARRAY_BEGIN]], [[TMP4]] 1685 // CHECK3-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 1686 // CHECK3: omp.arrayinit.body: 1687 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 1688 // CHECK3-NEXT: store i32 0, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 1689 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1690 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]] 1691 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 1692 // CHECK3: omp.arrayinit.done: 1693 // CHECK3-NEXT: [[LHS_BEGIN:%.*]] = bitcast [99 x i32]* [[TMP1]] to i32* 1694 // CHECK3-NEXT: [[RHS_BEGIN:%.*]] = bitcast [99 x i32]* [[Z2]] to i32* 1695 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1696 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i32* [[RHS_BEGIN]] to i8* 1697 // CHECK3-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 4 1698 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1699 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1700 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1701 // CHECK3-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 1, i32 4, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.17, [8 x i32]* @.gomp_critical_user_.reduction.var) 1702 // CHECK3-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1703 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1704 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1705 // CHECK3-NEXT: ] 1706 // CHECK3: .omp.reduction.case1: 1707 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i32 99 1708 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP11]] 1709 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1710 // CHECK3: omp.arraycpy.body: 1711 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1712 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST3:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1713 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 1714 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 1715 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1716 // CHECK3-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 1717 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], i32 1 1718 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1719 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE5:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP11]] 1720 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1721 // CHECK3: omp.arraycpy.done6: 1722 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1723 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1724 // CHECK3: .omp.reduction.case2: 1725 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i32 99 1726 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY7:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP14]] 1727 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY7]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY8:%.*]] 1728 // CHECK3: omp.arraycpy.body8: 1729 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 1730 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 1731 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], align 4 1732 // CHECK3-NEXT: [[TMP16:%.*]] = atomicrmw add i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 [[TMP15]] monotonic, align 4 1733 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 1734 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT12]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 1735 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT11]], [[TMP14]] 1736 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY8]] 1737 // CHECK3: omp.arraycpy.done14: 1738 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1739 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1740 // CHECK3: .omp.reduction.default: 1741 // CHECK3-NEXT: ret void 1742 // 1743 // 1744 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.17 1745 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 1746 // CHECK3-NEXT: entry: 1747 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 1748 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 1749 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 1750 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 1751 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 1752 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1753 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 1754 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1755 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 1756 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 1757 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1758 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 1759 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 1760 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1761 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr i32, i32* [[TMP11]], i32 99 1762 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[TMP11]], [[TMP12]] 1763 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1764 // CHECK3: omp.arraycpy.body: 1765 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1766 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1767 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 1768 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 1769 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1770 // CHECK3-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 1771 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1772 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1773 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]] 1774 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]] 1775 // CHECK3: omp.arraycpy.done2: 1776 // CHECK3-NEXT: ret void 1777 // 1778 // 1779 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l65 1780 // CHECK3-SAME: ([88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR1]] { 1781 // CHECK3-NEXT: entry: 1782 // CHECK3-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 4 1783 // CHECK3-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 4 1784 // CHECK3-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 4 1785 // CHECK3-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 4 1786 // CHECK3-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 4 1787 // CHECK3-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 4 1788 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [88 x i32]*, [99 x i32]*)* @.omp_outlined..20 to void (i32*, i32*, ...)*), [88 x i32]* [[TMP0]], [99 x i32]* [[TMP1]]) 1789 // CHECK3-NEXT: ret void 1790 // 1791 // 1792 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..20 1793 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR1]] { 1794 // CHECK3-NEXT: entry: 1795 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1796 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1797 // CHECK3-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 4 1798 // CHECK3-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 4 1799 // CHECK3-NEXT: [[Y1:%.*]] = alloca [88 x i32], align 4 1800 // CHECK3-NEXT: [[X:%.*]] = alloca [77 x i32], align 4 1801 // CHECK3-NEXT: [[Z2:%.*]] = alloca [99 x i32], align 4 1802 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 1803 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1804 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1805 // CHECK3-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 4 1806 // CHECK3-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 4 1807 // CHECK3-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 4 1808 // CHECK3-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 4 1809 // CHECK3-NEXT: [[TMP2:%.*]] = bitcast [88 x i32]* [[Y1]] to i8* 1810 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast [88 x i32]* [[TMP0]] to i8* 1811 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i32 352, i1 false) 1812 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [99 x i32], [99 x i32]* [[Z2]], i32 0, i32 0 1813 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr i32, i32* [[ARRAY_BEGIN]], i32 99 1814 // CHECK3-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i32* [[ARRAY_BEGIN]], [[TMP4]] 1815 // CHECK3-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 1816 // CHECK3: omp.arrayinit.body: 1817 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 1818 // CHECK3-NEXT: store i32 0, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 1819 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1820 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]] 1821 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 1822 // CHECK3: omp.arrayinit.done: 1823 // CHECK3-NEXT: [[LHS_BEGIN:%.*]] = bitcast [99 x i32]* [[TMP1]] to i32* 1824 // CHECK3-NEXT: [[RHS_BEGIN:%.*]] = bitcast [99 x i32]* [[Z2]] to i32* 1825 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1826 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i32* [[RHS_BEGIN]] to i8* 1827 // CHECK3-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 4 1828 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1829 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1830 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1831 // CHECK3-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 1, i32 4, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.21, [8 x i32]* @.gomp_critical_user_.reduction.var) 1832 // CHECK3-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1833 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1834 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1835 // CHECK3-NEXT: ] 1836 // CHECK3: .omp.reduction.case1: 1837 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i32 99 1838 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP11]] 1839 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1840 // CHECK3: omp.arraycpy.body: 1841 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1842 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST3:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1843 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 1844 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 1845 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1846 // CHECK3-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 1847 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], i32 1 1848 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1849 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE5:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP11]] 1850 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1851 // CHECK3: omp.arraycpy.done6: 1852 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1853 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1854 // CHECK3: .omp.reduction.case2: 1855 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i32 99 1856 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY7:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP14]] 1857 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY7]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY8:%.*]] 1858 // CHECK3: omp.arraycpy.body8: 1859 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 1860 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 1861 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], align 4 1862 // CHECK3-NEXT: [[TMP16:%.*]] = atomicrmw add i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 [[TMP15]] monotonic, align 4 1863 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 1864 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT12]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 1865 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT11]], [[TMP14]] 1866 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY8]] 1867 // CHECK3: omp.arraycpy.done14: 1868 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1869 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1870 // CHECK3: .omp.reduction.default: 1871 // CHECK3-NEXT: ret void 1872 // 1873 // 1874 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.21 1875 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 1876 // CHECK3-NEXT: entry: 1877 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 1878 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 1879 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 1880 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 1881 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 1882 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1883 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 1884 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1885 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 1886 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 1887 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1888 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 1889 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 1890 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1891 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr i32, i32* [[TMP11]], i32 99 1892 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[TMP11]], [[TMP12]] 1893 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1894 // CHECK3: omp.arraycpy.body: 1895 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1896 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1897 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 1898 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 1899 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1900 // CHECK3-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 1901 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1902 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1903 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]] 1904 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]] 1905 // CHECK3: omp.arraycpy.done2: 1906 // CHECK3-NEXT: ret void 1907 // 1908 // 1909 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1910 // CHECK3-SAME: () #[[ATTR6:[0-9]+]] { 1911 // CHECK3-NEXT: entry: 1912 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1913 // CHECK3-NEXT: ret void 1914 // 1915 // 1916 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14mapWithPrivatev_l27 1917 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1918 // CHECK5-NEXT: entry: 1919 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1920 // CHECK5-NEXT: ret void 1921 // 1922 // 1923 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 1924 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 1925 // CHECK5-NEXT: entry: 1926 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1927 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1928 // CHECK5-NEXT: [[X:%.*]] = alloca i32, align 4 1929 // CHECK5-NEXT: [[Y:%.*]] = alloca i32, align 4 1930 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1931 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1932 // CHECK5-NEXT: ret void 1933 // 1934 // 1935 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z19mapWithFirstprivatev_l33 1936 // CHECK5-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR0]] { 1937 // CHECK5-NEXT: entry: 1938 // CHECK5-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 1939 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 8 1940 // CHECK5-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 1941 // CHECK5-NEXT: [[Y_CASTED:%.*]] = alloca i64, align 8 1942 // CHECK5-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 1943 // CHECK5-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 8 1944 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 1945 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 8 1946 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 1947 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 1948 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1949 // CHECK5-NEXT: [[TMP3:%.*]] = load i64, i64* [[X_CASTED]], align 8 1950 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 1951 // CHECK5-NEXT: [[CONV1:%.*]] = bitcast i64* [[Y_CASTED]] to i32* 1952 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[CONV1]], align 4 1953 // CHECK5-NEXT: [[TMP5:%.*]] = load i64, i64* [[Y_CASTED]], align 8 1954 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP5]]) 1955 // CHECK5-NEXT: ret void 1956 // 1957 // 1958 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 1959 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[X:%.*]], i64 noundef [[Y:%.*]]) #[[ATTR0]] { 1960 // CHECK5-NEXT: entry: 1961 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1962 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1963 // CHECK5-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 1964 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca i64, align 8 1965 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1966 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1967 // CHECK5-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 1968 // CHECK5-NEXT: store i64 [[Y]], i64* [[Y_ADDR]], align 8 1969 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 1970 // CHECK5-NEXT: [[CONV1:%.*]] = bitcast i64* [[Y_ADDR]] to i32* 1971 // CHECK5-NEXT: ret void 1972 // 1973 // 1974 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16mapWithReductionv_l39 1975 // CHECK5-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR0]] { 1976 // CHECK5-NEXT: entry: 1977 // CHECK5-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 1978 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 8 1979 // CHECK5-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 1980 // CHECK5-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 8 1981 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 1982 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 8 1983 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[TMP0]], i32* [[TMP1]]) 1984 // CHECK5-NEXT: ret void 1985 // 1986 // 1987 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 1988 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR0]] { 1989 // CHECK5-NEXT: entry: 1990 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1991 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1992 // CHECK5-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 1993 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 8 1994 // CHECK5-NEXT: [[X1:%.*]] = alloca i32, align 4 1995 // CHECK5-NEXT: [[Y2:%.*]] = alloca i32, align 4 1996 // CHECK5-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 1997 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1998 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1999 // CHECK5-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 2000 // CHECK5-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 8 2001 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 2002 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 8 2003 // CHECK5-NEXT: store i32 0, i32* [[X1]], align 4 2004 // CHECK5-NEXT: store i32 0, i32* [[Y2]], align 4 2005 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2006 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i32* [[X1]] to i8* 2007 // CHECK5-NEXT: store i8* [[TMP3]], i8** [[TMP2]], align 8 2008 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 2009 // CHECK5-NEXT: [[TMP5:%.*]] = bitcast i32* [[Y2]] to i8* 2010 // CHECK5-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 8 2011 // CHECK5-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2012 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2013 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2014 // CHECK5-NEXT: [[TMP9:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP7]], i32 2, i64 16, i8* [[TMP8]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 2015 // CHECK5-NEXT: switch i32 [[TMP9]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2016 // CHECK5-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2017 // CHECK5-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2018 // CHECK5-NEXT: ] 2019 // CHECK5: .omp.reduction.case1: 2020 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP0]], align 4 2021 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[X1]], align 4 2022 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2023 // CHECK5-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 4 2024 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 2025 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[Y2]], align 4 2026 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2027 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[TMP1]], align 4 2028 // CHECK5-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2029 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2030 // CHECK5: .omp.reduction.case2: 2031 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[X1]], align 4 2032 // CHECK5-NEXT: [[TMP15:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP14]] monotonic, align 4 2033 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[Y2]], align 4 2034 // CHECK5-NEXT: [[TMP17:%.*]] = atomicrmw add i32* [[TMP1]], i32 [[TMP16]] monotonic, align 4 2035 // CHECK5-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2036 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2037 // CHECK5: .omp.reduction.default: 2038 // CHECK5-NEXT: ret void 2039 // 2040 // 2041 // CHECK5-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 2042 // CHECK5-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR2:[0-9]+]] { 2043 // CHECK5-NEXT: entry: 2044 // CHECK5-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2045 // CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2046 // CHECK5-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2047 // CHECK5-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2048 // CHECK5-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2049 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 2050 // CHECK5-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2051 // CHECK5-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 2052 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 2053 // CHECK5-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2054 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2055 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0 2056 // CHECK5-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2057 // CHECK5-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2058 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1 2059 // CHECK5-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 2060 // CHECK5-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 2061 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1 2062 // CHECK5-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 2063 // CHECK5-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 2064 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP11]], align 4 2065 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP8]], align 4 2066 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 2067 // CHECK5-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2068 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP17]], align 4 2069 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP14]], align 4 2070 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 2071 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 2072 // CHECK5-NEXT: ret void 2073 // 2074 // 2075 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7mapFromv_l45 2076 // CHECK5-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { 2077 // CHECK5-NEXT: entry: 2078 // CHECK5-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 2079 // CHECK5-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 2080 // CHECK5-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 2081 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 2082 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2083 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 2084 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 2085 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[X_CASTED]], align 8 2086 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP2]]) 2087 // CHECK5-NEXT: ret void 2088 // 2089 // 2090 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 2091 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[X:%.*]]) #[[ATTR0]] { 2092 // CHECK5-NEXT: entry: 2093 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2094 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2095 // CHECK5-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 2096 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2097 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2098 // CHECK5-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 2099 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 2100 // CHECK5-NEXT: ret void 2101 // 2102 // 2103 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5mapTov_l51 2104 // CHECK5-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { 2105 // CHECK5-NEXT: entry: 2106 // CHECK5-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 2107 // CHECK5-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 2108 // CHECK5-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 2109 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 2110 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2111 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 2112 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 2113 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[X_CASTED]], align 8 2114 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP2]]) 2115 // CHECK5-NEXT: ret void 2116 // 2117 // 2118 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4 2119 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[X:%.*]]) #[[ATTR0]] { 2120 // CHECK5-NEXT: entry: 2121 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2122 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2123 // CHECK5-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 2124 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2125 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2126 // CHECK5-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 2127 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 2128 // CHECK5-NEXT: ret void 2129 // 2130 // 2131 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapAllocv_l57 2132 // CHECK5-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { 2133 // CHECK5-NEXT: entry: 2134 // CHECK5-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8 2135 // CHECK5-NEXT: [[X_CASTED:%.*]] = alloca i64, align 8 2136 // CHECK5-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8 2137 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 8 2138 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2139 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[X_CASTED]] to i32* 2140 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 2141 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[X_CASTED]], align 8 2142 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP2]]) 2143 // CHECK5-NEXT: ret void 2144 // 2145 // 2146 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5 2147 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[X:%.*]]) #[[ATTR0]] { 2148 // CHECK5-NEXT: entry: 2149 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2150 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2151 // CHECK5-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8 2152 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2153 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2154 // CHECK5-NEXT: store i64 [[X]], i64* [[X_ADDR]], align 8 2155 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[X_ADDR]] to i32* 2156 // CHECK5-NEXT: ret void 2157 // 2158 // 2159 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l63 2160 // CHECK5-SAME: ([88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR0]] { 2161 // CHECK5-NEXT: entry: 2162 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 8 2163 // CHECK5-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 8 2164 // CHECK5-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 8 2165 // CHECK5-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 8 2166 // CHECK5-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 8 2167 // CHECK5-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 8 2168 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [88 x i32]*, [99 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), [88 x i32]* [[TMP0]], [99 x i32]* [[TMP1]]) 2169 // CHECK5-NEXT: ret void 2170 // 2171 // 2172 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 2173 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR0]] { 2174 // CHECK5-NEXT: entry: 2175 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2176 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2177 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 8 2178 // CHECK5-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 8 2179 // CHECK5-NEXT: [[Y1:%.*]] = alloca [88 x i32], align 4 2180 // CHECK5-NEXT: [[X:%.*]] = alloca [77 x i32], align 4 2181 // CHECK5-NEXT: [[Z2:%.*]] = alloca [99 x i32], align 4 2182 // CHECK5-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2183 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2184 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2185 // CHECK5-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 8 2186 // CHECK5-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 8 2187 // CHECK5-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 8 2188 // CHECK5-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 8 2189 // CHECK5-NEXT: [[TMP2:%.*]] = bitcast [88 x i32]* [[Y1]] to i8* 2190 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast [88 x i32]* [[TMP0]] to i8* 2191 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i64 352, i1 false) 2192 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [99 x i32], [99 x i32]* [[Z2]], i32 0, i32 0 2193 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr i32, i32* [[ARRAY_BEGIN]], i64 99 2194 // CHECK5-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i32* [[ARRAY_BEGIN]], [[TMP4]] 2195 // CHECK5-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 2196 // CHECK5: omp.arrayinit.body: 2197 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 2198 // CHECK5-NEXT: store i32 0, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 2199 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2200 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]] 2201 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 2202 // CHECK5: omp.arrayinit.done: 2203 // CHECK5-NEXT: [[LHS_BEGIN:%.*]] = bitcast [99 x i32]* [[TMP1]] to i32* 2204 // CHECK5-NEXT: [[RHS_BEGIN:%.*]] = bitcast [99 x i32]* [[Z2]] to i32* 2205 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2206 // CHECK5-NEXT: [[TMP6:%.*]] = bitcast i32* [[RHS_BEGIN]] to i8* 2207 // CHECK5-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 8 2208 // CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2209 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2210 // CHECK5-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2211 // CHECK5-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 1, i64 8, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.7, [8 x i32]* @.gomp_critical_user_.reduction.var) 2212 // CHECK5-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2213 // CHECK5-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2214 // CHECK5-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2215 // CHECK5-NEXT: ] 2216 // CHECK5: .omp.reduction.case1: 2217 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i64 99 2218 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP11]] 2219 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2220 // CHECK5: omp.arraycpy.body: 2221 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2222 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST3:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2223 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 2224 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 2225 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2226 // CHECK5-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 2227 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], i32 1 2228 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2229 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE5:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP11]] 2230 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2231 // CHECK5: omp.arraycpy.done6: 2232 // CHECK5-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2233 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2234 // CHECK5: .omp.reduction.case2: 2235 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i64 99 2236 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY7:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP14]] 2237 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY7]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY8:%.*]] 2238 // CHECK5: omp.arraycpy.body8: 2239 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 2240 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 2241 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], align 4 2242 // CHECK5-NEXT: [[TMP16:%.*]] = atomicrmw add i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 [[TMP15]] monotonic, align 4 2243 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 2244 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT12]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 2245 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT11]], [[TMP14]] 2246 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY8]] 2247 // CHECK5: omp.arraycpy.done14: 2248 // CHECK5-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2249 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2250 // CHECK5: .omp.reduction.default: 2251 // CHECK5-NEXT: ret void 2252 // 2253 // 2254 // CHECK5-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.7 2255 // CHECK5-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR2]] { 2256 // CHECK5-NEXT: entry: 2257 // CHECK5-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2258 // CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2259 // CHECK5-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2260 // CHECK5-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2261 // CHECK5-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2262 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2263 // CHECK5-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2264 // CHECK5-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2265 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 2266 // CHECK5-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2267 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2268 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 2269 // CHECK5-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2270 // CHECK5-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2271 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr i32, i32* [[TMP11]], i64 99 2272 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[TMP11]], [[TMP12]] 2273 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2274 // CHECK5: omp.arraycpy.body: 2275 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2276 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2277 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 2278 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 2279 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2280 // CHECK5-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 2281 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2282 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2283 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]] 2284 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]] 2285 // CHECK5: omp.arraycpy.done2: 2286 // CHECK5-NEXT: ret void 2287 // 2288 // 2289 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l65 2290 // CHECK5-SAME: ([88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR0]] { 2291 // CHECK5-NEXT: entry: 2292 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 8 2293 // CHECK5-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 8 2294 // CHECK5-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 8 2295 // CHECK5-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 8 2296 // CHECK5-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 8 2297 // CHECK5-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 8 2298 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [88 x i32]*, [99 x i32]*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), [88 x i32]* [[TMP0]], [99 x i32]* [[TMP1]]) 2299 // CHECK5-NEXT: ret void 2300 // 2301 // 2302 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8 2303 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR0]] { 2304 // CHECK5-NEXT: entry: 2305 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2306 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2307 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 8 2308 // CHECK5-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 8 2309 // CHECK5-NEXT: [[Y1:%.*]] = alloca [88 x i32], align 4 2310 // CHECK5-NEXT: [[X:%.*]] = alloca [77 x i32], align 4 2311 // CHECK5-NEXT: [[Z2:%.*]] = alloca [99 x i32], align 4 2312 // CHECK5-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2313 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2314 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2315 // CHECK5-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 8 2316 // CHECK5-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 8 2317 // CHECK5-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 8 2318 // CHECK5-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 8 2319 // CHECK5-NEXT: [[TMP2:%.*]] = bitcast [88 x i32]* [[Y1]] to i8* 2320 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast [88 x i32]* [[TMP0]] to i8* 2321 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i64 352, i1 false) 2322 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [99 x i32], [99 x i32]* [[Z2]], i32 0, i32 0 2323 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr i32, i32* [[ARRAY_BEGIN]], i64 99 2324 // CHECK5-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i32* [[ARRAY_BEGIN]], [[TMP4]] 2325 // CHECK5-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 2326 // CHECK5: omp.arrayinit.body: 2327 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 2328 // CHECK5-NEXT: store i32 0, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 2329 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2330 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]] 2331 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 2332 // CHECK5: omp.arrayinit.done: 2333 // CHECK5-NEXT: [[LHS_BEGIN:%.*]] = bitcast [99 x i32]* [[TMP1]] to i32* 2334 // CHECK5-NEXT: [[RHS_BEGIN:%.*]] = bitcast [99 x i32]* [[Z2]] to i32* 2335 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2336 // CHECK5-NEXT: [[TMP6:%.*]] = bitcast i32* [[RHS_BEGIN]] to i8* 2337 // CHECK5-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 8 2338 // CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2339 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2340 // CHECK5-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2341 // CHECK5-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 1, i64 8, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.9, [8 x i32]* @.gomp_critical_user_.reduction.var) 2342 // CHECK5-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2343 // CHECK5-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2344 // CHECK5-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2345 // CHECK5-NEXT: ] 2346 // CHECK5: .omp.reduction.case1: 2347 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i64 99 2348 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP11]] 2349 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2350 // CHECK5: omp.arraycpy.body: 2351 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2352 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST3:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2353 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 2354 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 2355 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2356 // CHECK5-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 2357 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], i32 1 2358 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2359 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE5:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP11]] 2360 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2361 // CHECK5: omp.arraycpy.done6: 2362 // CHECK5-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2363 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2364 // CHECK5: .omp.reduction.case2: 2365 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i64 99 2366 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY7:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP14]] 2367 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY7]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY8:%.*]] 2368 // CHECK5: omp.arraycpy.body8: 2369 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 2370 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 2371 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], align 4 2372 // CHECK5-NEXT: [[TMP16:%.*]] = atomicrmw add i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 [[TMP15]] monotonic, align 4 2373 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 2374 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT12]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 2375 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT11]], [[TMP14]] 2376 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY8]] 2377 // CHECK5: omp.arraycpy.done14: 2378 // CHECK5-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2379 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2380 // CHECK5: .omp.reduction.default: 2381 // CHECK5-NEXT: ret void 2382 // 2383 // 2384 // CHECK5-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.9 2385 // CHECK5-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR2]] { 2386 // CHECK5-NEXT: entry: 2387 // CHECK5-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2388 // CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2389 // CHECK5-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2390 // CHECK5-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2391 // CHECK5-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2392 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2393 // CHECK5-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2394 // CHECK5-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2395 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 2396 // CHECK5-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2397 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2398 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 2399 // CHECK5-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2400 // CHECK5-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2401 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr i32, i32* [[TMP11]], i64 99 2402 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[TMP11]], [[TMP12]] 2403 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2404 // CHECK5: omp.arraycpy.body: 2405 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2406 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2407 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 2408 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 2409 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2410 // CHECK5-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 2411 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2412 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2413 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]] 2414 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]] 2415 // CHECK5: omp.arraycpy.done2: 2416 // CHECK5-NEXT: ret void 2417 // 2418 // 2419 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9mapInt128v_l72 2420 // CHECK5-SAME: (i128* noundef nonnull align 16 dereferenceable(16) [[Y:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Z:%.*]]) #[[ATTR0]] { 2421 // CHECK5-NEXT: entry: 2422 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca i128*, align 8 2423 // CHECK5-NEXT: [[Z_ADDR:%.*]] = alloca i128*, align 8 2424 // CHECK5-NEXT: store i128* [[Y]], i128** [[Y_ADDR]], align 8 2425 // CHECK5-NEXT: store i128* [[Z]], i128** [[Z_ADDR]], align 8 2426 // CHECK5-NEXT: [[TMP0:%.*]] = load i128*, i128** [[Y_ADDR]], align 8 2427 // CHECK5-NEXT: [[TMP1:%.*]] = load i128*, i128** [[Z_ADDR]], align 8 2428 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i128*, i128*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i128* [[TMP0]], i128* [[TMP1]]) 2429 // CHECK5-NEXT: ret void 2430 // 2431 // 2432 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 2433 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Y:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Z:%.*]]) #[[ATTR0]] { 2434 // CHECK5-NEXT: entry: 2435 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2436 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2437 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca i128*, align 8 2438 // CHECK5-NEXT: [[Z_ADDR:%.*]] = alloca i128*, align 8 2439 // CHECK5-NEXT: [[Y1:%.*]] = alloca i128, align 16 2440 // CHECK5-NEXT: [[X:%.*]] = alloca i128, align 16 2441 // CHECK5-NEXT: [[Z2:%.*]] = alloca i128, align 16 2442 // CHECK5-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2443 // CHECK5-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i128, align 16 2444 // CHECK5-NEXT: [[ATOMIC_TEMP3:%.*]] = alloca i128, align 16 2445 // CHECK5-NEXT: [[TMP:%.*]] = alloca i128, align 16 2446 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2447 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2448 // CHECK5-NEXT: store i128* [[Y]], i128** [[Y_ADDR]], align 8 2449 // CHECK5-NEXT: store i128* [[Z]], i128** [[Z_ADDR]], align 8 2450 // CHECK5-NEXT: [[TMP0:%.*]] = load i128*, i128** [[Y_ADDR]], align 8 2451 // CHECK5-NEXT: [[TMP1:%.*]] = load i128*, i128** [[Z_ADDR]], align 8 2452 // CHECK5-NEXT: [[TMP2:%.*]] = load i128, i128* [[TMP0]], align 16 2453 // CHECK5-NEXT: store i128 [[TMP2]], i128* [[Y1]], align 16 2454 // CHECK5-NEXT: store i128 0, i128* [[Z2]], align 16 2455 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2456 // CHECK5-NEXT: [[TMP4:%.*]] = bitcast i128* [[Z2]] to i8* 2457 // CHECK5-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 8 2458 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2459 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2460 // CHECK5-NEXT: [[TMP7:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2461 // CHECK5-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 1, i64 8, i8* [[TMP7]], void (i8*, i8*)* @.omp.reduction.reduction_func.11, [8 x i32]* @.gomp_critical_user_.reduction.var) 2462 // CHECK5-NEXT: switch i32 [[TMP8]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2463 // CHECK5-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2464 // CHECK5-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2465 // CHECK5-NEXT: ] 2466 // CHECK5: .omp.reduction.case1: 2467 // CHECK5-NEXT: [[TMP9:%.*]] = load i128, i128* [[TMP1]], align 16 2468 // CHECK5-NEXT: [[TMP10:%.*]] = load i128, i128* [[Z2]], align 16 2469 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i128 [[TMP9]], [[TMP10]] 2470 // CHECK5-NEXT: store i128 [[ADD]], i128* [[TMP1]], align 16 2471 // CHECK5-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2472 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2473 // CHECK5: .omp.reduction.case2: 2474 // CHECK5-NEXT: [[TMP11:%.*]] = load i128, i128* [[Z2]], align 16 2475 // CHECK5-NEXT: [[TMP12:%.*]] = bitcast i128* [[TMP1]] to i8* 2476 // CHECK5-NEXT: [[TMP13:%.*]] = bitcast i128* [[ATOMIC_TEMP]] to i8* 2477 // CHECK5-NEXT: call void @__atomic_load(i64 noundef 16, i8* noundef [[TMP12]], i8* noundef [[TMP13]], i32 noundef signext 0) #[[ATTR6:[0-9]+]] 2478 // CHECK5-NEXT: br label [[ATOMIC_CONT:%.*]] 2479 // CHECK5: atomic_cont: 2480 // CHECK5-NEXT: [[TMP14:%.*]] = load i128, i128* [[ATOMIC_TEMP]], align 16 2481 // CHECK5-NEXT: store i128 [[TMP14]], i128* [[TMP]], align 16 2482 // CHECK5-NEXT: [[TMP15:%.*]] = load i128, i128* [[TMP]], align 16 2483 // CHECK5-NEXT: [[TMP16:%.*]] = load i128, i128* [[Z2]], align 16 2484 // CHECK5-NEXT: [[ADD4:%.*]] = add nsw i128 [[TMP15]], [[TMP16]] 2485 // CHECK5-NEXT: store i128 [[ADD4]], i128* [[ATOMIC_TEMP3]], align 16 2486 // CHECK5-NEXT: [[TMP17:%.*]] = bitcast i128* [[TMP1]] to i8* 2487 // CHECK5-NEXT: [[TMP18:%.*]] = bitcast i128* [[ATOMIC_TEMP]] to i8* 2488 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i128* [[ATOMIC_TEMP3]] to i8* 2489 // CHECK5-NEXT: [[CALL:%.*]] = call noundef zeroext i1 @__atomic_compare_exchange(i64 noundef 16, i8* noundef [[TMP17]], i8* noundef [[TMP18]], i8* noundef [[TMP19]], i32 noundef signext 0, i32 noundef signext 0) #[[ATTR6]] 2490 // CHECK5-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 2491 // CHECK5: atomic_exit: 2492 // CHECK5-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2493 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2494 // CHECK5: .omp.reduction.default: 2495 // CHECK5-NEXT: ret void 2496 // 2497 // 2498 // CHECK5-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.11 2499 // CHECK5-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR2]] { 2500 // CHECK5-NEXT: entry: 2501 // CHECK5-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2502 // CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2503 // CHECK5-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2504 // CHECK5-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2505 // CHECK5-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2506 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2507 // CHECK5-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2508 // CHECK5-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2509 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 2510 // CHECK5-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2511 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i128* 2512 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 2513 // CHECK5-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2514 // CHECK5-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i128* 2515 // CHECK5-NEXT: [[TMP12:%.*]] = load i128, i128* [[TMP11]], align 16 2516 // CHECK5-NEXT: [[TMP13:%.*]] = load i128, i128* [[TMP8]], align 16 2517 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i128 [[TMP12]], [[TMP13]] 2518 // CHECK5-NEXT: store i128 [[ADD]], i128* [[TMP11]], align 16 2519 // CHECK5-NEXT: ret void 2520 // 2521 // 2522 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9mapInt128v_l74 2523 // CHECK5-SAME: (i128* noundef nonnull align 16 dereferenceable(16) [[Y:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Z:%.*]]) #[[ATTR0]] { 2524 // CHECK5-NEXT: entry: 2525 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca i128*, align 8 2526 // CHECK5-NEXT: [[Z_ADDR:%.*]] = alloca i128*, align 8 2527 // CHECK5-NEXT: store i128* [[Y]], i128** [[Y_ADDR]], align 8 2528 // CHECK5-NEXT: store i128* [[Z]], i128** [[Z_ADDR]], align 8 2529 // CHECK5-NEXT: [[TMP0:%.*]] = load i128*, i128** [[Y_ADDR]], align 8 2530 // CHECK5-NEXT: [[TMP1:%.*]] = load i128*, i128** [[Z_ADDR]], align 8 2531 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i128*, i128*)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i128* [[TMP0]], i128* [[TMP1]]) 2532 // CHECK5-NEXT: ret void 2533 // 2534 // 2535 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..12 2536 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Y:%.*]], i128* noundef nonnull align 16 dereferenceable(16) [[Z:%.*]]) #[[ATTR0]] { 2537 // CHECK5-NEXT: entry: 2538 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2539 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2540 // CHECK5-NEXT: [[Y_ADDR:%.*]] = alloca i128*, align 8 2541 // CHECK5-NEXT: [[Z_ADDR:%.*]] = alloca i128*, align 8 2542 // CHECK5-NEXT: [[Y1:%.*]] = alloca i128, align 16 2543 // CHECK5-NEXT: [[X:%.*]] = alloca i128, align 16 2544 // CHECK5-NEXT: [[Z2:%.*]] = alloca i128, align 16 2545 // CHECK5-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2546 // CHECK5-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i128, align 16 2547 // CHECK5-NEXT: [[ATOMIC_TEMP3:%.*]] = alloca i128, align 16 2548 // CHECK5-NEXT: [[TMP:%.*]] = alloca i128, align 16 2549 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2550 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2551 // CHECK5-NEXT: store i128* [[Y]], i128** [[Y_ADDR]], align 8 2552 // CHECK5-NEXT: store i128* [[Z]], i128** [[Z_ADDR]], align 8 2553 // CHECK5-NEXT: [[TMP0:%.*]] = load i128*, i128** [[Y_ADDR]], align 8 2554 // CHECK5-NEXT: [[TMP1:%.*]] = load i128*, i128** [[Z_ADDR]], align 8 2555 // CHECK5-NEXT: [[TMP2:%.*]] = load i128, i128* [[TMP0]], align 16 2556 // CHECK5-NEXT: store i128 [[TMP2]], i128* [[Y1]], align 16 2557 // CHECK5-NEXT: store i128 0, i128* [[Z2]], align 16 2558 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2559 // CHECK5-NEXT: [[TMP4:%.*]] = bitcast i128* [[Z2]] to i8* 2560 // CHECK5-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 8 2561 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2562 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2563 // CHECK5-NEXT: [[TMP7:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2564 // CHECK5-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 1, i64 8, i8* [[TMP7]], void (i8*, i8*)* @.omp.reduction.reduction_func.13, [8 x i32]* @.gomp_critical_user_.reduction.var) 2565 // CHECK5-NEXT: switch i32 [[TMP8]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2566 // CHECK5-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2567 // CHECK5-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2568 // CHECK5-NEXT: ] 2569 // CHECK5: .omp.reduction.case1: 2570 // CHECK5-NEXT: [[TMP9:%.*]] = load i128, i128* [[TMP1]], align 16 2571 // CHECK5-NEXT: [[TMP10:%.*]] = load i128, i128* [[Z2]], align 16 2572 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i128 [[TMP9]], [[TMP10]] 2573 // CHECK5-NEXT: store i128 [[ADD]], i128* [[TMP1]], align 16 2574 // CHECK5-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2575 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2576 // CHECK5: .omp.reduction.case2: 2577 // CHECK5-NEXT: [[TMP11:%.*]] = load i128, i128* [[Z2]], align 16 2578 // CHECK5-NEXT: [[TMP12:%.*]] = bitcast i128* [[TMP1]] to i8* 2579 // CHECK5-NEXT: [[TMP13:%.*]] = bitcast i128* [[ATOMIC_TEMP]] to i8* 2580 // CHECK5-NEXT: call void @__atomic_load(i64 noundef 16, i8* noundef [[TMP12]], i8* noundef [[TMP13]], i32 noundef signext 0) #[[ATTR6]] 2581 // CHECK5-NEXT: br label [[ATOMIC_CONT:%.*]] 2582 // CHECK5: atomic_cont: 2583 // CHECK5-NEXT: [[TMP14:%.*]] = load i128, i128* [[ATOMIC_TEMP]], align 16 2584 // CHECK5-NEXT: store i128 [[TMP14]], i128* [[TMP]], align 16 2585 // CHECK5-NEXT: [[TMP15:%.*]] = load i128, i128* [[TMP]], align 16 2586 // CHECK5-NEXT: [[TMP16:%.*]] = load i128, i128* [[Z2]], align 16 2587 // CHECK5-NEXT: [[ADD4:%.*]] = add nsw i128 [[TMP15]], [[TMP16]] 2588 // CHECK5-NEXT: store i128 [[ADD4]], i128* [[ATOMIC_TEMP3]], align 16 2589 // CHECK5-NEXT: [[TMP17:%.*]] = bitcast i128* [[TMP1]] to i8* 2590 // CHECK5-NEXT: [[TMP18:%.*]] = bitcast i128* [[ATOMIC_TEMP]] to i8* 2591 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i128* [[ATOMIC_TEMP3]] to i8* 2592 // CHECK5-NEXT: [[CALL:%.*]] = call noundef zeroext i1 @__atomic_compare_exchange(i64 noundef 16, i8* noundef [[TMP17]], i8* noundef [[TMP18]], i8* noundef [[TMP19]], i32 noundef signext 0, i32 noundef signext 0) #[[ATTR6]] 2593 // CHECK5-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 2594 // CHECK5: atomic_exit: 2595 // CHECK5-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2596 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2597 // CHECK5: .omp.reduction.default: 2598 // CHECK5-NEXT: ret void 2599 // 2600 // 2601 // CHECK5-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.13 2602 // CHECK5-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR2]] { 2603 // CHECK5-NEXT: entry: 2604 // CHECK5-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2605 // CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2606 // CHECK5-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2607 // CHECK5-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2608 // CHECK5-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2609 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2610 // CHECK5-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2611 // CHECK5-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2612 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 2613 // CHECK5-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2614 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i128* 2615 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 2616 // CHECK5-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2617 // CHECK5-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i128* 2618 // CHECK5-NEXT: [[TMP12:%.*]] = load i128, i128* [[TMP11]], align 16 2619 // CHECK5-NEXT: [[TMP13:%.*]] = load i128, i128* [[TMP8]], align 16 2620 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i128 [[TMP12]], [[TMP13]] 2621 // CHECK5-NEXT: store i128 [[ADD]], i128* [[TMP11]], align 16 2622 // CHECK5-NEXT: ret void 2623 // 2624 // 2625 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14mapWithPrivatev_l27 2626 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 2627 // CHECK7-NEXT: entry: 2628 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2629 // CHECK7-NEXT: ret void 2630 // 2631 // 2632 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined. 2633 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 2634 // CHECK7-NEXT: entry: 2635 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2636 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2637 // CHECK7-NEXT: [[X:%.*]] = alloca i32, align 4 2638 // CHECK7-NEXT: [[Y:%.*]] = alloca i32, align 4 2639 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2640 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2641 // CHECK7-NEXT: ret void 2642 // 2643 // 2644 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z19mapWithFirstprivatev_l33 2645 // CHECK7-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR0]] { 2646 // CHECK7-NEXT: entry: 2647 // CHECK7-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 2648 // CHECK7-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 4 2649 // CHECK7-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 2650 // CHECK7-NEXT: [[Y_CASTED:%.*]] = alloca i32, align 4 2651 // CHECK7-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 2652 // CHECK7-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 4 2653 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 2654 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 4 2655 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 2656 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[X_CASTED]], align 4 2657 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[X_CASTED]], align 4 2658 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4 2659 // CHECK7-NEXT: store i32 [[TMP4]], i32* [[Y_CASTED]], align 4 2660 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[Y_CASTED]], align 4 2661 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP5]]) 2662 // CHECK7-NEXT: ret void 2663 // 2664 // 2665 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1 2666 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR0]] { 2667 // CHECK7-NEXT: entry: 2668 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2669 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2670 // CHECK7-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 2671 // CHECK7-NEXT: [[Y_ADDR:%.*]] = alloca i32, align 4 2672 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2673 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2674 // CHECK7-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 2675 // CHECK7-NEXT: store i32 [[Y]], i32* [[Y_ADDR]], align 4 2676 // CHECK7-NEXT: ret void 2677 // 2678 // 2679 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16mapWithReductionv_l39 2680 // CHECK7-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR0]] { 2681 // CHECK7-NEXT: entry: 2682 // CHECK7-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 2683 // CHECK7-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 4 2684 // CHECK7-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 2685 // CHECK7-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 4 2686 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 2687 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 4 2688 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[TMP0]], i32* [[TMP1]]) 2689 // CHECK7-NEXT: ret void 2690 // 2691 // 2692 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2 2693 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[Y:%.*]]) #[[ATTR0]] { 2694 // CHECK7-NEXT: entry: 2695 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2696 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2697 // CHECK7-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 2698 // CHECK7-NEXT: [[Y_ADDR:%.*]] = alloca i32*, align 4 2699 // CHECK7-NEXT: [[X1:%.*]] = alloca i32, align 4 2700 // CHECK7-NEXT: [[Y2:%.*]] = alloca i32, align 4 2701 // CHECK7-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 4 2702 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2703 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2704 // CHECK7-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 2705 // CHECK7-NEXT: store i32* [[Y]], i32** [[Y_ADDR]], align 4 2706 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 2707 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[Y_ADDR]], align 4 2708 // CHECK7-NEXT: store i32 0, i32* [[X1]], align 4 2709 // CHECK7-NEXT: store i32 0, i32* [[Y2]], align 4 2710 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 2711 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i32* [[X1]] to i8* 2712 // CHECK7-NEXT: store i8* [[TMP3]], i8** [[TMP2]], align 4 2713 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 1 2714 // CHECK7-NEXT: [[TMP5:%.*]] = bitcast i32* [[Y2]] to i8* 2715 // CHECK7-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 4 2716 // CHECK7-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2717 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2718 // CHECK7-NEXT: [[TMP8:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2719 // CHECK7-NEXT: [[TMP9:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP7]], i32 2, i32 8, i8* [[TMP8]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 2720 // CHECK7-NEXT: switch i32 [[TMP9]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2721 // CHECK7-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2722 // CHECK7-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2723 // CHECK7-NEXT: ] 2724 // CHECK7: .omp.reduction.case1: 2725 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP0]], align 4 2726 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[X1]], align 4 2727 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2728 // CHECK7-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 4 2729 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 2730 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[Y2]], align 4 2731 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2732 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[TMP1]], align 4 2733 // CHECK7-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2734 // CHECK7-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2735 // CHECK7: .omp.reduction.case2: 2736 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[X1]], align 4 2737 // CHECK7-NEXT: [[TMP15:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP14]] monotonic, align 4 2738 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[Y2]], align 4 2739 // CHECK7-NEXT: [[TMP17:%.*]] = atomicrmw add i32* [[TMP1]], i32 [[TMP16]] monotonic, align 4 2740 // CHECK7-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2741 // CHECK7-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2742 // CHECK7: .omp.reduction.default: 2743 // CHECK7-NEXT: ret void 2744 // 2745 // 2746 // CHECK7-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 2747 // CHECK7-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR2:[0-9]+]] { 2748 // CHECK7-NEXT: entry: 2749 // CHECK7-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 2750 // CHECK7-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 2751 // CHECK7-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 2752 // CHECK7-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 2753 // CHECK7-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 2754 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 2755 // CHECK7-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 2756 // CHECK7-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 2757 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0 2758 // CHECK7-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 2759 // CHECK7-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2760 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i32 0, i32 0 2761 // CHECK7-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 2762 // CHECK7-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2763 // CHECK7-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1 2764 // CHECK7-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 4 2765 // CHECK7-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 2766 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i32 0, i32 1 2767 // CHECK7-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 4 2768 // CHECK7-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 2769 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP11]], align 4 2770 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP8]], align 4 2771 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 2772 // CHECK7-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2773 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP17]], align 4 2774 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP14]], align 4 2775 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 2776 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 2777 // CHECK7-NEXT: ret void 2778 // 2779 // 2780 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7mapFromv_l45 2781 // CHECK7-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { 2782 // CHECK7-NEXT: entry: 2783 // CHECK7-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 2784 // CHECK7-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 2785 // CHECK7-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 2786 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 2787 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2788 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[X_CASTED]], align 4 2789 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_CASTED]], align 4 2790 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP2]]) 2791 // CHECK7-NEXT: ret void 2792 // 2793 // 2794 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3 2795 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[X:%.*]]) #[[ATTR0]] { 2796 // CHECK7-NEXT: entry: 2797 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2798 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2799 // CHECK7-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 2800 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2801 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2802 // CHECK7-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 2803 // CHECK7-NEXT: ret void 2804 // 2805 // 2806 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5mapTov_l51 2807 // CHECK7-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { 2808 // CHECK7-NEXT: entry: 2809 // CHECK7-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 2810 // CHECK7-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 2811 // CHECK7-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 2812 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 2813 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2814 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[X_CASTED]], align 4 2815 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_CASTED]], align 4 2816 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP2]]) 2817 // CHECK7-NEXT: ret void 2818 // 2819 // 2820 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..4 2821 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[X:%.*]]) #[[ATTR0]] { 2822 // CHECK7-NEXT: entry: 2823 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2824 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2825 // CHECK7-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 2826 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2827 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2828 // CHECK7-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 2829 // CHECK7-NEXT: ret void 2830 // 2831 // 2832 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapAllocv_l57 2833 // CHECK7-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { 2834 // CHECK7-NEXT: entry: 2835 // CHECK7-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 4 2836 // CHECK7-NEXT: [[X_CASTED:%.*]] = alloca i32, align 4 2837 // CHECK7-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 4 2838 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR]], align 4 2839 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2840 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[X_CASTED]], align 4 2841 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_CASTED]], align 4 2842 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP2]]) 2843 // CHECK7-NEXT: ret void 2844 // 2845 // 2846 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..5 2847 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[X:%.*]]) #[[ATTR0]] { 2848 // CHECK7-NEXT: entry: 2849 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2850 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2851 // CHECK7-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 2852 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2853 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2854 // CHECK7-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 2855 // CHECK7-NEXT: ret void 2856 // 2857 // 2858 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l63 2859 // CHECK7-SAME: ([88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR0]] { 2860 // CHECK7-NEXT: entry: 2861 // CHECK7-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 4 2862 // CHECK7-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 4 2863 // CHECK7-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 4 2864 // CHECK7-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 4 2865 // CHECK7-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 4 2866 // CHECK7-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 4 2867 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [88 x i32]*, [99 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), [88 x i32]* [[TMP0]], [99 x i32]* [[TMP1]]) 2868 // CHECK7-NEXT: ret void 2869 // 2870 // 2871 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6 2872 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR0]] { 2873 // CHECK7-NEXT: entry: 2874 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2875 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2876 // CHECK7-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 4 2877 // CHECK7-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 4 2878 // CHECK7-NEXT: [[Y1:%.*]] = alloca [88 x i32], align 4 2879 // CHECK7-NEXT: [[X:%.*]] = alloca [77 x i32], align 4 2880 // CHECK7-NEXT: [[Z2:%.*]] = alloca [99 x i32], align 4 2881 // CHECK7-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 2882 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2883 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2884 // CHECK7-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 4 2885 // CHECK7-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 4 2886 // CHECK7-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 4 2887 // CHECK7-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 4 2888 // CHECK7-NEXT: [[TMP2:%.*]] = bitcast [88 x i32]* [[Y1]] to i8* 2889 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast [88 x i32]* [[TMP0]] to i8* 2890 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i32 352, i1 false) 2891 // CHECK7-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [99 x i32], [99 x i32]* [[Z2]], i32 0, i32 0 2892 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr i32, i32* [[ARRAY_BEGIN]], i32 99 2893 // CHECK7-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i32* [[ARRAY_BEGIN]], [[TMP4]] 2894 // CHECK7-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 2895 // CHECK7: omp.arrayinit.body: 2896 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 2897 // CHECK7-NEXT: store i32 0, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 2898 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2899 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]] 2900 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 2901 // CHECK7: omp.arrayinit.done: 2902 // CHECK7-NEXT: [[LHS_BEGIN:%.*]] = bitcast [99 x i32]* [[TMP1]] to i32* 2903 // CHECK7-NEXT: [[RHS_BEGIN:%.*]] = bitcast [99 x i32]* [[Z2]] to i32* 2904 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 2905 // CHECK7-NEXT: [[TMP6:%.*]] = bitcast i32* [[RHS_BEGIN]] to i8* 2906 // CHECK7-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 4 2907 // CHECK7-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2908 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2909 // CHECK7-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2910 // CHECK7-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 1, i32 4, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.7, [8 x i32]* @.gomp_critical_user_.reduction.var) 2911 // CHECK7-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2912 // CHECK7-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2913 // CHECK7-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2914 // CHECK7-NEXT: ] 2915 // CHECK7: .omp.reduction.case1: 2916 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i32 99 2917 // CHECK7-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP11]] 2918 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2919 // CHECK7: omp.arraycpy.body: 2920 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2921 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST3:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2922 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 2923 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 2924 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2925 // CHECK7-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 2926 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], i32 1 2927 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2928 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE5:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP11]] 2929 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2930 // CHECK7: omp.arraycpy.done6: 2931 // CHECK7-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2932 // CHECK7-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2933 // CHECK7: .omp.reduction.case2: 2934 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i32 99 2935 // CHECK7-NEXT: [[OMP_ARRAYCPY_ISEMPTY7:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP14]] 2936 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY7]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY8:%.*]] 2937 // CHECK7: omp.arraycpy.body8: 2938 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 2939 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 2940 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], align 4 2941 // CHECK7-NEXT: [[TMP16:%.*]] = atomicrmw add i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 [[TMP15]] monotonic, align 4 2942 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 2943 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT12]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 2944 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT11]], [[TMP14]] 2945 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY8]] 2946 // CHECK7: omp.arraycpy.done14: 2947 // CHECK7-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2948 // CHECK7-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2949 // CHECK7: .omp.reduction.default: 2950 // CHECK7-NEXT: ret void 2951 // 2952 // 2953 // CHECK7-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.7 2954 // CHECK7-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR2]] { 2955 // CHECK7-NEXT: entry: 2956 // CHECK7-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 2957 // CHECK7-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 2958 // CHECK7-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 2959 // CHECK7-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 2960 // CHECK7-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 2961 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2962 // CHECK7-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 2963 // CHECK7-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2964 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 2965 // CHECK7-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 2966 // CHECK7-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2967 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 2968 // CHECK7-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 2969 // CHECK7-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2970 // CHECK7-NEXT: [[TMP12:%.*]] = getelementptr i32, i32* [[TMP11]], i32 99 2971 // CHECK7-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[TMP11]], [[TMP12]] 2972 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2973 // CHECK7: omp.arraycpy.body: 2974 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2975 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2976 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 2977 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 2978 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2979 // CHECK7-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 2980 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2981 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2982 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]] 2983 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]] 2984 // CHECK7: omp.arraycpy.done2: 2985 // CHECK7-NEXT: ret void 2986 // 2987 // 2988 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z8mapArrayv_l65 2989 // CHECK7-SAME: ([88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR0]] { 2990 // CHECK7-NEXT: entry: 2991 // CHECK7-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 4 2992 // CHECK7-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 4 2993 // CHECK7-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 4 2994 // CHECK7-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 4 2995 // CHECK7-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 4 2996 // CHECK7-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 4 2997 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [88 x i32]*, [99 x i32]*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), [88 x i32]* [[TMP0]], [99 x i32]* [[TMP1]]) 2998 // CHECK7-NEXT: ret void 2999 // 3000 // 3001 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..8 3002 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [88 x i32]* noundef nonnull align 4 dereferenceable(352) [[Y:%.*]], [99 x i32]* noundef nonnull align 4 dereferenceable(396) [[Z:%.*]]) #[[ATTR0]] { 3003 // CHECK7-NEXT: entry: 3004 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3005 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3006 // CHECK7-NEXT: [[Y_ADDR:%.*]] = alloca [88 x i32]*, align 4 3007 // CHECK7-NEXT: [[Z_ADDR:%.*]] = alloca [99 x i32]*, align 4 3008 // CHECK7-NEXT: [[Y1:%.*]] = alloca [88 x i32], align 4 3009 // CHECK7-NEXT: [[X:%.*]] = alloca [77 x i32], align 4 3010 // CHECK7-NEXT: [[Z2:%.*]] = alloca [99 x i32], align 4 3011 // CHECK7-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 3012 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3013 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3014 // CHECK7-NEXT: store [88 x i32]* [[Y]], [88 x i32]** [[Y_ADDR]], align 4 3015 // CHECK7-NEXT: store [99 x i32]* [[Z]], [99 x i32]** [[Z_ADDR]], align 4 3016 // CHECK7-NEXT: [[TMP0:%.*]] = load [88 x i32]*, [88 x i32]** [[Y_ADDR]], align 4 3017 // CHECK7-NEXT: [[TMP1:%.*]] = load [99 x i32]*, [99 x i32]** [[Z_ADDR]], align 4 3018 // CHECK7-NEXT: [[TMP2:%.*]] = bitcast [88 x i32]* [[Y1]] to i8* 3019 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast [88 x i32]* [[TMP0]] to i8* 3020 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i32 352, i1 false) 3021 // CHECK7-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [99 x i32], [99 x i32]* [[Z2]], i32 0, i32 0 3022 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr i32, i32* [[ARRAY_BEGIN]], i32 99 3023 // CHECK7-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i32* [[ARRAY_BEGIN]], [[TMP4]] 3024 // CHECK7-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 3025 // CHECK7: omp.arrayinit.body: 3026 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 3027 // CHECK7-NEXT: store i32 0, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 3028 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3029 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]] 3030 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 3031 // CHECK7: omp.arrayinit.done: 3032 // CHECK7-NEXT: [[LHS_BEGIN:%.*]] = bitcast [99 x i32]* [[TMP1]] to i32* 3033 // CHECK7-NEXT: [[RHS_BEGIN:%.*]] = bitcast [99 x i32]* [[Z2]] to i32* 3034 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 3035 // CHECK7-NEXT: [[TMP6:%.*]] = bitcast i32* [[RHS_BEGIN]] to i8* 3036 // CHECK7-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 4 3037 // CHECK7-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3038 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3039 // CHECK7-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3040 // CHECK7-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 1, i32 4, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.9, [8 x i32]* @.gomp_critical_user_.reduction.var) 3041 // CHECK7-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3042 // CHECK7-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3043 // CHECK7-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3044 // CHECK7-NEXT: ] 3045 // CHECK7: .omp.reduction.case1: 3046 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i32 99 3047 // CHECK7-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP11]] 3048 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3049 // CHECK7: omp.arraycpy.body: 3050 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3051 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST3:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3052 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 3053 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 3054 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3055 // CHECK7-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], align 4 3056 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST3]], i32 1 3057 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3058 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE5:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP11]] 3059 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3060 // CHECK7: omp.arraycpy.done6: 3061 // CHECK7-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3062 // CHECK7-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3063 // CHECK7: .omp.reduction.case2: 3064 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr i32, i32* [[LHS_BEGIN]], i32 99 3065 // CHECK7-NEXT: [[OMP_ARRAYCPY_ISEMPTY7:%.*]] = icmp eq i32* [[LHS_BEGIN]], [[TMP14]] 3066 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY7]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY8:%.*]] 3067 // CHECK7: omp.arraycpy.body8: 3068 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi i32* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 3069 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi i32* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYCPY_BODY8]] ] 3070 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], align 4 3071 // CHECK7-NEXT: [[TMP16:%.*]] = atomicrmw add i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 [[TMP15]] monotonic, align 4 3072 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 3073 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT12]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 3074 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT11]], [[TMP14]] 3075 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY8]] 3076 // CHECK7: omp.arraycpy.done14: 3077 // CHECK7-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3078 // CHECK7-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3079 // CHECK7: .omp.reduction.default: 3080 // CHECK7-NEXT: ret void 3081 // 3082 // 3083 // CHECK7-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.9 3084 // CHECK7-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR2]] { 3085 // CHECK7-NEXT: entry: 3086 // CHECK7-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 3087 // CHECK7-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 3088 // CHECK7-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 3089 // CHECK7-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 3090 // CHECK7-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 3091 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 3092 // CHECK7-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 3093 // CHECK7-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 3094 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 3095 // CHECK7-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 3096 // CHECK7-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3097 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 3098 // CHECK7-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 3099 // CHECK7-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3100 // CHECK7-NEXT: [[TMP12:%.*]] = getelementptr i32, i32* [[TMP11]], i32 99 3101 // CHECK7-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[TMP11]], [[TMP12]] 3102 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3103 // CHECK7: omp.arraycpy.body: 3104 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i32* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3105 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i32* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3106 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 3107 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 4 3108 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 3109 // CHECK7-NEXT: store i32 [[ADD]], i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 4 3110 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3111 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3112 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]] 3113 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]] 3114 // CHECK7: omp.arraycpy.done2: 3115 // CHECK7-NEXT: ret void 3116 // 3117