1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var) 50 for (int i = 0; i < 2; ++i) { 51 vec[i] = t_var; 52 s_arr[i] = var; 53 } 54 return T(); 55 } 56 57 int main() { 58 static int svar; 59 volatile double g; 60 volatile double &g1 = g; 61 62 #ifdef LAMBDA 63 [&]() { 64 static float sfvar; 65 66 #pragma omp target teams distribute simd lastprivate(g, g1, svar, sfvar) 67 for (int i = 0; i < 2; ++i) { 68 // loop variables 69 70 // init private variables 71 g = 1; 72 g1 = 1; 73 svar = 3; 74 sfvar = 4.0; 75 76 77 [&]() { 78 g = 2; 79 g1 = 2; 80 svar = 4; 81 sfvar = 8.0; 82 83 }(); 84 } 85 }(); 86 return 0; 87 #else 88 S<float> test; 89 int t_var = 0; 90 int vec[] = {1, 2}; 91 S<float> s_arr[] = {1, 2}; 92 S<float> &var = test; 93 94 #pragma omp target teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar) 95 for (int i = 0; i < 2; ++i) { 96 vec[i] = t_var; 97 s_arr[i] = var; 98 } 99 int i; 100 101 return tmain<int>(); 102 #endif 103 } 104 105 106 // skip loop variables 107 108 // copy from parameters to local address variables 109 110 // load content of local address variables 111 // the distribute loop 112 // assignment: vec[i] = t_var; 113 114 // assignment: s_arr[i] = var; 115 116 // lastprivates 117 118 119 // template tmain 120 121 122 123 // skip alloca of global_tid and bound_tid 124 // skip loop variables 125 126 // skip init of bound and global tid 127 // copy from parameters to local address variables 128 129 // load content of local address variables 130 // assignment: vec[i] = t_var; 131 132 // assignment: s_arr[i] = var; 133 134 // lastprivates 135 136 #endif 137 // CHECK1-LABEL: define {{[^@]+}}@main 138 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 139 // CHECK1-NEXT: entry: 140 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 142 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 143 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 144 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 145 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 146 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 147 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8 148 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 149 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 150 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 151 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 152 // CHECK1-NEXT: ret i32 0 153 // 154 // 155 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 156 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 157 // CHECK1-NEXT: entry: 158 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 159 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 160 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 161 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 162 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 163 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8 164 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8 165 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 166 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8 167 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 168 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 169 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 170 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 171 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 172 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 173 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 174 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 175 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 176 // CHECK1-NEXT: [[TMP0:%.*]] = load double, double* [[CONV]], align 8 177 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[G_CASTED]] to double* 178 // CHECK1-NEXT: store double [[TMP0]], double* [[CONV4]], align 8 179 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[G_CASTED]], align 8 180 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 8 181 // CHECK1-NEXT: [[TMP3:%.*]] = load volatile double, double* [[TMP2]], align 8 182 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[G1_CASTED]] to double* 183 // CHECK1-NEXT: store double [[TMP3]], double* [[CONV5]], align 8 184 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[G1_CASTED]], align 8 185 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 4 186 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 187 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV6]], align 4 188 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 189 // CHECK1-NEXT: [[TMP7:%.*]] = load float, float* [[CONV3]], align 4 190 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* 191 // CHECK1-NEXT: store float [[TMP7]], float* [[CONV7]], align 4 192 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8 193 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) 194 // CHECK1-NEXT: ret void 195 // 196 // 197 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 198 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] { 199 // CHECK1-NEXT: entry: 200 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 201 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 202 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 203 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 204 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 205 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 206 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 207 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 208 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 209 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 210 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 211 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 212 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 213 // CHECK1-NEXT: [[G5:%.*]] = alloca double, align 8 214 // CHECK1-NEXT: [[G16:%.*]] = alloca double, align 8 215 // CHECK1-NEXT: [[_TMP7:%.*]] = alloca double*, align 8 216 // CHECK1-NEXT: [[SVAR8:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: [[SFVAR9:%.*]] = alloca float, align 4 218 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 219 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 220 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 221 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 222 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 223 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 224 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 225 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 226 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 227 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 228 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 229 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 230 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 231 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 232 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 233 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 234 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 235 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 236 // CHECK1-NEXT: store double* [[G16]], double** [[_TMP7]], align 8 237 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 238 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 239 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 240 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 241 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 242 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 243 // CHECK1: cond.true: 244 // CHECK1-NEXT: br label [[COND_END:%.*]] 245 // CHECK1: cond.false: 246 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 247 // CHECK1-NEXT: br label [[COND_END]] 248 // CHECK1: cond.end: 249 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 250 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 251 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 252 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 253 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 254 // CHECK1: omp.inner.for.cond: 255 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 256 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4 257 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 258 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 259 // CHECK1: omp.inner.for.body: 260 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 261 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 262 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 263 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4 264 // CHECK1-NEXT: store double 1.000000e+00, double* [[G5]], align 8, !llvm.access.group !4 265 // CHECK1-NEXT: [[TMP9:%.*]] = load double*, double** [[_TMP7]], align 8, !llvm.access.group !4 266 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP9]], align 8, !llvm.access.group !4 267 // CHECK1-NEXT: store i32 3, i32* [[SVAR8]], align 4, !llvm.access.group !4 268 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR9]], align 4, !llvm.access.group !4 269 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 270 // CHECK1-NEXT: store double* [[G5]], double** [[TMP10]], align 8, !llvm.access.group !4 271 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 272 // CHECK1-NEXT: [[TMP12:%.*]] = load double*, double** [[_TMP7]], align 8, !llvm.access.group !4 273 // CHECK1-NEXT: store double* [[TMP12]], double** [[TMP11]], align 8, !llvm.access.group !4 274 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 275 // CHECK1-NEXT: store i32* [[SVAR8]], i32** [[TMP13]], align 8, !llvm.access.group !4 276 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 277 // CHECK1-NEXT: store float* [[SFVAR9]], float** [[TMP14]], align 8, !llvm.access.group !4 278 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4 279 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 280 // CHECK1: omp.body.continue: 281 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 282 // CHECK1: omp.inner.for.inc: 283 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 284 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], 1 285 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 286 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 287 // CHECK1: omp.inner.for.end: 288 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 289 // CHECK1: omp.loop.exit: 290 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 291 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 292 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 293 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 294 // CHECK1: .omp.final.then: 295 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4 296 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 297 // CHECK1: .omp.final.done: 298 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 299 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 300 // CHECK1-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 301 // CHECK1: .omp.lastprivate.then: 302 // CHECK1-NEXT: [[TMP20:%.*]] = load double, double* [[G5]], align 8 303 // CHECK1-NEXT: store volatile double [[TMP20]], double* [[CONV]], align 8 304 // CHECK1-NEXT: [[TMP21:%.*]] = load double*, double** [[_TMP7]], align 8 305 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[TMP21]], align 8 306 // CHECK1-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 307 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR8]], align 4 308 // CHECK1-NEXT: store i32 [[TMP23]], i32* [[CONV2]], align 4 309 // CHECK1-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR9]], align 4 310 // CHECK1-NEXT: store float [[TMP24]], float* [[CONV3]], align 4 311 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 312 // CHECK1: .omp.lastprivate.done: 313 // CHECK1-NEXT: ret void 314 // 315 // 316 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 317 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 318 // CHECK1-NEXT: entry: 319 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 320 // CHECK1-NEXT: ret void 321 // 322 // 323 // CHECK2-LABEL: define {{[^@]+}}@main 324 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 325 // CHECK2-NEXT: entry: 326 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 327 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 328 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 329 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 330 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 331 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 332 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 333 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8 334 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 335 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 336 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 337 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 338 // CHECK2-NEXT: ret i32 0 339 // 340 // 341 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 342 // CHECK2-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 343 // CHECK2-NEXT: entry: 344 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 345 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 346 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 347 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 348 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 349 // CHECK2-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8 350 // CHECK2-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8 351 // CHECK2-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 352 // CHECK2-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8 353 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 354 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 355 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 356 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 357 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 358 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 359 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 360 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 361 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 362 // CHECK2-NEXT: [[TMP0:%.*]] = load double, double* [[CONV]], align 8 363 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[G_CASTED]] to double* 364 // CHECK2-NEXT: store double [[TMP0]], double* [[CONV4]], align 8 365 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[G_CASTED]], align 8 366 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 8 367 // CHECK2-NEXT: [[TMP3:%.*]] = load volatile double, double* [[TMP2]], align 8 368 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[G1_CASTED]] to double* 369 // CHECK2-NEXT: store double [[TMP3]], double* [[CONV5]], align 8 370 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[G1_CASTED]], align 8 371 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 4 372 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 373 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV6]], align 4 374 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 375 // CHECK2-NEXT: [[TMP7:%.*]] = load float, float* [[CONV3]], align 4 376 // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* 377 // CHECK2-NEXT: store float [[TMP7]], float* [[CONV7]], align 4 378 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8 379 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) 380 // CHECK2-NEXT: ret void 381 // 382 // 383 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 384 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] { 385 // CHECK2-NEXT: entry: 386 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 387 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 388 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 389 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 390 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 391 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 392 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 393 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 394 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 395 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 396 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 397 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 398 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 399 // CHECK2-NEXT: [[G5:%.*]] = alloca double, align 8 400 // CHECK2-NEXT: [[G16:%.*]] = alloca double, align 8 401 // CHECK2-NEXT: [[_TMP7:%.*]] = alloca double*, align 8 402 // CHECK2-NEXT: [[SVAR8:%.*]] = alloca i32, align 4 403 // CHECK2-NEXT: [[SFVAR9:%.*]] = alloca float, align 4 404 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 405 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 406 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 407 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 408 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 409 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 410 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 411 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 412 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 413 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 414 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 415 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 416 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 417 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 418 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 419 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 420 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 421 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 422 // CHECK2-NEXT: store double* [[G16]], double** [[_TMP7]], align 8 423 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 424 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 425 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 426 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 427 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 428 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 429 // CHECK2: cond.true: 430 // CHECK2-NEXT: br label [[COND_END:%.*]] 431 // CHECK2: cond.false: 432 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 433 // CHECK2-NEXT: br label [[COND_END]] 434 // CHECK2: cond.end: 435 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 436 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 437 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 438 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 439 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 440 // CHECK2: omp.inner.for.cond: 441 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 442 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4 443 // CHECK2-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 444 // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 445 // CHECK2: omp.inner.for.body: 446 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 447 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 448 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 449 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4 450 // CHECK2-NEXT: store double 1.000000e+00, double* [[G5]], align 8, !llvm.access.group !4 451 // CHECK2-NEXT: [[TMP9:%.*]] = load double*, double** [[_TMP7]], align 8, !llvm.access.group !4 452 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP9]], align 8, !llvm.access.group !4 453 // CHECK2-NEXT: store i32 3, i32* [[SVAR8]], align 4, !llvm.access.group !4 454 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR9]], align 4, !llvm.access.group !4 455 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 456 // CHECK2-NEXT: store double* [[G5]], double** [[TMP10]], align 8, !llvm.access.group !4 457 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 458 // CHECK2-NEXT: [[TMP12:%.*]] = load double*, double** [[_TMP7]], align 8, !llvm.access.group !4 459 // CHECK2-NEXT: store double* [[TMP12]], double** [[TMP11]], align 8, !llvm.access.group !4 460 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 461 // CHECK2-NEXT: store i32* [[SVAR8]], i32** [[TMP13]], align 8, !llvm.access.group !4 462 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 463 // CHECK2-NEXT: store float* [[SFVAR9]], float** [[TMP14]], align 8, !llvm.access.group !4 464 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4 465 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 466 // CHECK2: omp.body.continue: 467 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 468 // CHECK2: omp.inner.for.inc: 469 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 470 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], 1 471 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 472 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 473 // CHECK2: omp.inner.for.end: 474 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 475 // CHECK2: omp.loop.exit: 476 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 477 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 478 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 479 // CHECK2-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 480 // CHECK2: .omp.final.then: 481 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4 482 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] 483 // CHECK2: .omp.final.done: 484 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 485 // CHECK2-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 486 // CHECK2-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 487 // CHECK2: .omp.lastprivate.then: 488 // CHECK2-NEXT: [[TMP20:%.*]] = load double, double* [[G5]], align 8 489 // CHECK2-NEXT: store volatile double [[TMP20]], double* [[CONV]], align 8 490 // CHECK2-NEXT: [[TMP21:%.*]] = load double*, double** [[_TMP7]], align 8 491 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[TMP21]], align 8 492 // CHECK2-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 493 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR8]], align 4 494 // CHECK2-NEXT: store i32 [[TMP23]], i32* [[CONV2]], align 4 495 // CHECK2-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR9]], align 4 496 // CHECK2-NEXT: store float [[TMP24]], float* [[CONV3]], align 4 497 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 498 // CHECK2: .omp.lastprivate.done: 499 // CHECK2-NEXT: ret void 500 // 501 // 502 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 503 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] { 504 // CHECK2-NEXT: entry: 505 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 506 // CHECK2-NEXT: ret void 507 // 508 // 509 // CHECK3-LABEL: define {{[^@]+}}@main 510 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 511 // CHECK3-NEXT: entry: 512 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 513 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 514 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 515 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 516 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 517 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 518 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 519 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4 520 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 521 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 522 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 523 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 524 // CHECK3-NEXT: ret i32 0 525 // 526 // 527 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 528 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 529 // CHECK3-NEXT: entry: 530 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 531 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 532 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 533 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 534 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 535 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 536 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4 537 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 538 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 539 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 540 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 541 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 542 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 543 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 544 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 545 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 4 546 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 547 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[SVAR_CASTED]], align 4 548 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 549 // CHECK3-NEXT: [[TMP5:%.*]] = load float, float* [[CONV]], align 4 550 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* 551 // CHECK3-NEXT: store float [[TMP5]], float* [[CONV1]], align 4 552 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4 553 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[TMP0]], double* [[TMP2]], i32 [[TMP4]], i32 [[TMP6]]) 554 // CHECK3-NEXT: ret void 555 // 556 // 557 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 558 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] { 559 // CHECK3-NEXT: entry: 560 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 561 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 562 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 563 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 564 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 565 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 566 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 567 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 568 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 569 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 570 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 571 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 572 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 573 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 574 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 575 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 576 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 577 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 578 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 579 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 580 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 581 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 582 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 583 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 584 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 585 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 586 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 587 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 588 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 589 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 590 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 591 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 592 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 593 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 594 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 4 595 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 596 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 597 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 598 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 599 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 600 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 601 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 602 // CHECK3: cond.true: 603 // CHECK3-NEXT: br label [[COND_END:%.*]] 604 // CHECK3: cond.false: 605 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 606 // CHECK3-NEXT: br label [[COND_END]] 607 // CHECK3: cond.end: 608 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 609 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 610 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 611 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 612 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 613 // CHECK3: omp.inner.for.cond: 614 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 615 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 616 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 617 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 618 // CHECK3: omp.inner.for.body: 619 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 620 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 621 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 622 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 623 // CHECK3-NEXT: store double 1.000000e+00, double* [[G2]], align 8, !llvm.access.group !5 624 // CHECK3-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5 625 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP11]], align 4, !llvm.access.group !5 626 // CHECK3-NEXT: store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !5 627 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !5 628 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 629 // CHECK3-NEXT: store double* [[G2]], double** [[TMP12]], align 4, !llvm.access.group !5 630 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 631 // CHECK3-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5 632 // CHECK3-NEXT: store double* [[TMP14]], double** [[TMP13]], align 4, !llvm.access.group !5 633 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 634 // CHECK3-NEXT: store i32* [[SVAR5]], i32** [[TMP15]], align 4, !llvm.access.group !5 635 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 636 // CHECK3-NEXT: store float* [[SFVAR6]], float** [[TMP16]], align 4, !llvm.access.group !5 637 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5 638 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 639 // CHECK3: omp.body.continue: 640 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 641 // CHECK3: omp.inner.for.inc: 642 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 643 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 644 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 645 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 646 // CHECK3: omp.inner.for.end: 647 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 648 // CHECK3: omp.loop.exit: 649 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 650 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 651 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 652 // CHECK3-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 653 // CHECK3: .omp.final.then: 654 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4 655 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 656 // CHECK3: .omp.final.done: 657 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 658 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 659 // CHECK3-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 660 // CHECK3: .omp.lastprivate.then: 661 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[G2]], align 8 662 // CHECK3-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 663 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP4]], align 4 664 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 4 665 // CHECK3-NEXT: store volatile double [[TMP24]], double* [[TMP2]], align 4 666 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR5]], align 4 667 // CHECK3-NEXT: store i32 [[TMP25]], i32* [[SVAR_ADDR]], align 4 668 // CHECK3-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR6]], align 4 669 // CHECK3-NEXT: store float [[TMP26]], float* [[CONV]], align 4 670 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 671 // CHECK3: .omp.lastprivate.done: 672 // CHECK3-NEXT: ret void 673 // 674 // 675 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 676 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] { 677 // CHECK3-NEXT: entry: 678 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 679 // CHECK3-NEXT: ret void 680 // 681 // 682 // CHECK4-LABEL: define {{[^@]+}}@main 683 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 684 // CHECK4-NEXT: entry: 685 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 686 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 687 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 688 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 689 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 690 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 691 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 692 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4 693 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 694 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 695 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 696 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 697 // CHECK4-NEXT: ret i32 0 698 // 699 // 700 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 701 // CHECK4-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 702 // CHECK4-NEXT: entry: 703 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 704 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 705 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 706 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 707 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 708 // CHECK4-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 709 // CHECK4-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4 710 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 711 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 712 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 713 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 714 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 715 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 716 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 717 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 718 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 4 719 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 720 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[SVAR_CASTED]], align 4 721 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 722 // CHECK4-NEXT: [[TMP5:%.*]] = load float, float* [[CONV]], align 4 723 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* 724 // CHECK4-NEXT: store float [[TMP5]], float* [[CONV1]], align 4 725 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4 726 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[TMP0]], double* [[TMP2]], i32 [[TMP4]], i32 [[TMP6]]) 727 // CHECK4-NEXT: ret void 728 // 729 // 730 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 731 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] { 732 // CHECK4-NEXT: entry: 733 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 734 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 735 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 736 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 737 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 738 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 739 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 740 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 741 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 742 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 743 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 744 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 745 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 746 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 747 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 748 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 749 // CHECK4-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 750 // CHECK4-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 751 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 752 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 753 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 754 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 755 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 756 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 757 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 758 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 759 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 760 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 761 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 762 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 763 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 764 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 765 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 766 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 767 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 4 768 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 769 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 770 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 771 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 772 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 773 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 774 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 775 // CHECK4: cond.true: 776 // CHECK4-NEXT: br label [[COND_END:%.*]] 777 // CHECK4: cond.false: 778 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 779 // CHECK4-NEXT: br label [[COND_END]] 780 // CHECK4: cond.end: 781 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 782 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 783 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 784 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 785 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 786 // CHECK4: omp.inner.for.cond: 787 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 788 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 789 // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 790 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 791 // CHECK4: omp.inner.for.body: 792 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 793 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 794 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 795 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 796 // CHECK4-NEXT: store double 1.000000e+00, double* [[G2]], align 8, !llvm.access.group !5 797 // CHECK4-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5 798 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP11]], align 4, !llvm.access.group !5 799 // CHECK4-NEXT: store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !5 800 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !5 801 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 802 // CHECK4-NEXT: store double* [[G2]], double** [[TMP12]], align 4, !llvm.access.group !5 803 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 804 // CHECK4-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5 805 // CHECK4-NEXT: store double* [[TMP14]], double** [[TMP13]], align 4, !llvm.access.group !5 806 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 807 // CHECK4-NEXT: store i32* [[SVAR5]], i32** [[TMP15]], align 4, !llvm.access.group !5 808 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 809 // CHECK4-NEXT: store float* [[SFVAR6]], float** [[TMP16]], align 4, !llvm.access.group !5 810 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5 811 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 812 // CHECK4: omp.body.continue: 813 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 814 // CHECK4: omp.inner.for.inc: 815 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 816 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 817 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 818 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 819 // CHECK4: omp.inner.for.end: 820 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 821 // CHECK4: omp.loop.exit: 822 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 823 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 824 // CHECK4-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 825 // CHECK4-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 826 // CHECK4: .omp.final.then: 827 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4 828 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] 829 // CHECK4: .omp.final.done: 830 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 831 // CHECK4-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 832 // CHECK4-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 833 // CHECK4: .omp.lastprivate.then: 834 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[G2]], align 8 835 // CHECK4-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8 836 // CHECK4-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP4]], align 4 837 // CHECK4-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 4 838 // CHECK4-NEXT: store volatile double [[TMP24]], double* [[TMP2]], align 4 839 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR5]], align 4 840 // CHECK4-NEXT: store i32 [[TMP25]], i32* [[SVAR_ADDR]], align 4 841 // CHECK4-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR6]], align 4 842 // CHECK4-NEXT: store float [[TMP26]], float* [[CONV]], align 4 843 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 844 // CHECK4: .omp.lastprivate.done: 845 // CHECK4-NEXT: ret void 846 // 847 // 848 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 849 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] { 850 // CHECK4-NEXT: entry: 851 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 852 // CHECK4-NEXT: ret void 853 // 854 // 855 // CHECK5-LABEL: define {{[^@]+}}@main 856 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 857 // CHECK5-NEXT: entry: 858 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 859 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 860 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 861 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 862 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 863 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 864 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 865 // CHECK5-NEXT: store double* [[G]], double** [[TMP0]], align 8 866 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 867 // CHECK5-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 868 // CHECK5-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 869 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 870 // CHECK5-NEXT: ret i32 0 871 // 872 // 873 // CHECK6-LABEL: define {{[^@]+}}@main 874 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 875 // CHECK6-NEXT: entry: 876 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 877 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 878 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 8 879 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 880 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 881 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 8 882 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 883 // CHECK6-NEXT: store double* [[G]], double** [[TMP0]], align 8 884 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 885 // CHECK6-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 886 // CHECK6-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 887 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 888 // CHECK6-NEXT: ret i32 0 889 // 890 // 891 // CHECK7-LABEL: define {{[^@]+}}@main 892 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 893 // CHECK7-NEXT: entry: 894 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 895 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 896 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 897 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 898 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 899 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 900 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 901 // CHECK7-NEXT: store double* [[G]], double** [[TMP0]], align 4 902 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 903 // CHECK7-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 904 // CHECK7-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 905 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 906 // CHECK7-NEXT: ret i32 0 907 // 908 // 909 // CHECK8-LABEL: define {{[^@]+}}@main 910 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 911 // CHECK8-NEXT: entry: 912 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 913 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 914 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 4 915 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 916 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 917 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 4 918 // CHECK8-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 919 // CHECK8-NEXT: store double* [[G]], double** [[TMP0]], align 4 920 // CHECK8-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 921 // CHECK8-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 922 // CHECK8-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 923 // CHECK8-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 924 // CHECK8-NEXT: ret i32 0 925 // 926 // 927 // CHECK9-LABEL: define {{[^@]+}}@main 928 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 929 // CHECK9-NEXT: entry: 930 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 931 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 932 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 933 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 934 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 935 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 936 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 937 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 938 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 939 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 940 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 941 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 942 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 943 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 944 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 945 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 946 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 947 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 948 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 949 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 950 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 951 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 952 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 953 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 954 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 955 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 956 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 957 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 958 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 959 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 960 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 961 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 962 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 963 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 964 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 965 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 966 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 967 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 968 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 969 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 970 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8 971 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 972 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 973 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 8 974 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 975 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 976 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 977 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 978 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 979 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 980 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 981 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 982 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 983 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 984 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 985 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]** 986 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 8 987 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 988 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 989 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 990 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 991 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8 992 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 993 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S** 994 // CHECK9-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 8 995 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 996 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 997 // CHECK9-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 8 998 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 999 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8 1000 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1001 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 1002 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP28]], align 8 1003 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1004 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1005 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1006 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1007 // CHECK9-NEXT: store i8* null, i8** [[TMP31]], align 8 1008 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1009 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1010 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1011 // CHECK9-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 5, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1012 // CHECK9-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1013 // CHECK9-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1014 // CHECK9: omp_offload.failed: 1015 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR5:[0-9]+]] 1016 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1017 // CHECK9: omp_offload.cont: 1018 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1019 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1020 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1021 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1022 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1023 // CHECK9: arraydestroy.body: 1024 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1025 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1026 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 1027 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1028 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1029 // CHECK9: arraydestroy.done3: 1030 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 1031 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[RETVAL]], align 4 1032 // CHECK9-NEXT: ret i32 [[TMP37]] 1033 // 1034 // 1035 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1036 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1037 // CHECK9-NEXT: entry: 1038 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1039 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1040 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1041 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1042 // CHECK9-NEXT: ret void 1043 // 1044 // 1045 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1046 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1047 // CHECK9-NEXT: entry: 1048 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1049 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1050 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1051 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1052 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1053 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1054 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1055 // CHECK9-NEXT: ret void 1056 // 1057 // 1058 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1059 // CHECK9-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1060 // CHECK9-NEXT: entry: 1061 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1062 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1063 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1064 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1065 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1066 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1067 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1068 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1069 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1070 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1071 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1072 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1073 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1074 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1075 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1076 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1077 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1078 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1079 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1080 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 1081 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1082 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 1083 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1084 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1085 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4 1086 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1087 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4 1088 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1089 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i64 [[TMP7]]) 1090 // CHECK9-NEXT: ret void 1091 // 1092 // 1093 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1094 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] { 1095 // CHECK9-NEXT: entry: 1096 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1097 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1098 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1099 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1100 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1101 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1102 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1103 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1104 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1105 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1106 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1107 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1108 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1109 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1110 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1111 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1112 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1113 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1114 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8 1115 // CHECK9-NEXT: [[SVAR8:%.*]] = alloca i32, align 4 1116 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1117 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1118 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1119 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1120 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1121 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1122 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1123 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1124 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1125 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1126 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1127 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1128 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1129 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1130 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1131 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1132 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1133 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1134 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1135 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1136 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1137 // CHECK9: arrayctor.loop: 1138 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1139 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1140 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1141 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1142 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1143 // CHECK9: arrayctor.cont: 1144 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1145 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) 1146 // CHECK9-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8 1147 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1148 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1149 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1150 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1151 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1152 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1153 // CHECK9: cond.true: 1154 // CHECK9-NEXT: br label [[COND_END:%.*]] 1155 // CHECK9: cond.false: 1156 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1157 // CHECK9-NEXT: br label [[COND_END]] 1158 // CHECK9: cond.end: 1159 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1160 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1161 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1162 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1163 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1164 // CHECK9: omp.inner.for.cond: 1165 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1166 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 1167 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1168 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1169 // CHECK9: omp.inner.for.cond.cleanup: 1170 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1171 // CHECK9: omp.inner.for.body: 1172 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1173 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1174 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1175 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 1176 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5 1177 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 1178 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1179 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1180 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5 1181 // CHECK9-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8, !llvm.access.group !5 1182 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 1183 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP15]] to i64 1184 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 1185 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* 1186 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* 1187 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group !5 1188 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1189 // CHECK9: omp.body.continue: 1190 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1191 // CHECK9: omp.inner.for.inc: 1192 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1193 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP18]], 1 1194 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1195 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 1196 // CHECK9: omp.inner.for.end: 1197 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1198 // CHECK9: omp.loop.exit: 1199 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1200 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1201 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1202 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1203 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1204 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1205 // CHECK9: .omp.final.then: 1206 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 1207 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1208 // CHECK9: .omp.final.done: 1209 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1210 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 1211 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1212 // CHECK9: .omp.lastprivate.then: 1213 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4 1214 // CHECK9-NEXT: store i32 [[TMP25]], i32* [[CONV]], align 4 1215 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1216 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1217 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false) 1218 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0 1219 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S* 1220 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2 1221 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP29]] 1222 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1223 // CHECK9: omp.arraycpy.body: 1224 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1225 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1226 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1227 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1228 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 1229 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1230 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1231 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 1232 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] 1233 // CHECK9: omp.arraycpy.done14: 1234 // CHECK9-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 1235 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 1236 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 1237 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 1238 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR8]], align 4 1239 // CHECK9-NEXT: store i32 [[TMP35]], i32* [[CONV1]], align 4 1240 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1241 // CHECK9: .omp.lastprivate.done: 1242 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR5]] 1243 // CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1244 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 1245 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1246 // CHECK9: arraydestroy.body: 1247 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1248 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1249 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 1250 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]] 1251 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]] 1252 // CHECK9: arraydestroy.done16: 1253 // CHECK9-NEXT: ret void 1254 // 1255 // 1256 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1257 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1258 // CHECK9-NEXT: entry: 1259 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1260 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1261 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1262 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 1263 // CHECK9-NEXT: ret void 1264 // 1265 // 1266 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1267 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] comdat { 1268 // CHECK9-NEXT: entry: 1269 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1270 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1271 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1272 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1273 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1274 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1275 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1276 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1277 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1278 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1279 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1280 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1281 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1282 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1283 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1284 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1285 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1286 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1287 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1288 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1289 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1290 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1291 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1292 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1293 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1294 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1295 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1296 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1297 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1298 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]** 1299 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 8 1300 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1301 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 1302 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8 1303 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1304 // CHECK9-NEXT: store i8* null, i8** [[TMP9]], align 8 1305 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1306 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 1307 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 1308 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1309 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1310 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 1311 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1312 // CHECK9-NEXT: store i8* null, i8** [[TMP14]], align 8 1313 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1314 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]** 1315 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 8 1316 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1317 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1318 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1319 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1320 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8 1321 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1322 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0** 1323 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 8 1324 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1325 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1326 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 8 1327 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1328 // CHECK9-NEXT: store i8* null, i8** [[TMP24]], align 8 1329 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1330 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1331 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1332 // CHECK9-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1333 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 1334 // CHECK9-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1335 // CHECK9: omp_offload.failed: 1336 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR5]] 1337 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1338 // CHECK9: omp_offload.cont: 1339 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1340 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1341 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1342 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1343 // CHECK9: arraydestroy.body: 1344 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1345 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1346 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 1347 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1348 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1349 // CHECK9: arraydestroy.done2: 1350 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 1351 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4 1352 // CHECK9-NEXT: ret i32 [[TMP30]] 1353 // 1354 // 1355 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1356 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1357 // CHECK9-NEXT: entry: 1358 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1359 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1360 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1361 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1362 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1363 // CHECK9-NEXT: ret void 1364 // 1365 // 1366 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1367 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1368 // CHECK9-NEXT: entry: 1369 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1370 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1371 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1372 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1373 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1374 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1375 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1376 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1377 // CHECK9-NEXT: ret void 1378 // 1379 // 1380 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1381 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1382 // CHECK9-NEXT: entry: 1383 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1384 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1385 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1386 // CHECK9-NEXT: ret void 1387 // 1388 // 1389 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1390 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1391 // CHECK9-NEXT: entry: 1392 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1393 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1394 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1395 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1396 // CHECK9-NEXT: ret void 1397 // 1398 // 1399 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1400 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1401 // CHECK9-NEXT: entry: 1402 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1403 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1404 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1405 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1406 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1407 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1408 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 1409 // CHECK9-NEXT: ret void 1410 // 1411 // 1412 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1413 // CHECK9-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1414 // CHECK9-NEXT: entry: 1415 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1416 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1417 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1418 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1419 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1420 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1421 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1422 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1423 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1424 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1425 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1426 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1427 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1428 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1429 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1430 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 1431 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1432 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 1433 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1434 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1435 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) 1436 // CHECK9-NEXT: ret void 1437 // 1438 // 1439 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1440 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] { 1441 // CHECK9-NEXT: entry: 1442 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1443 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1444 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1445 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1446 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1447 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1448 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1449 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1450 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1451 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1452 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1453 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1454 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1455 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1456 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1457 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1458 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1459 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 1460 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1461 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1462 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1463 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1464 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1465 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1466 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1467 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1468 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1469 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1470 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1471 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1472 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1473 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1474 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1475 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1476 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 1477 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1478 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1479 // CHECK9: arrayctor.loop: 1480 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1481 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1482 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1483 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1484 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1485 // CHECK9: arrayctor.cont: 1486 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1487 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1488 // CHECK9-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 1489 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1490 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1491 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1492 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1493 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1494 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1495 // CHECK9: cond.true: 1496 // CHECK9-NEXT: br label [[COND_END:%.*]] 1497 // CHECK9: cond.false: 1498 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1499 // CHECK9-NEXT: br label [[COND_END]] 1500 // CHECK9: cond.end: 1501 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1502 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1503 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1504 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1505 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1506 // CHECK9: omp.inner.for.cond: 1507 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1508 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 1509 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1510 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1511 // CHECK9: omp.inner.for.cond.cleanup: 1512 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1513 // CHECK9: omp.inner.for.body: 1514 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1515 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1516 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1517 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 1518 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !11 1519 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 1520 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1521 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 1522 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 1523 // CHECK9-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !11 1524 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 1525 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64 1526 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 1527 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8* 1528 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* 1529 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group !11 1530 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1531 // CHECK9: omp.body.continue: 1532 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1533 // CHECK9: omp.inner.for.inc: 1534 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1535 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 1536 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1537 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1538 // CHECK9: omp.inner.for.end: 1539 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1540 // CHECK9: omp.loop.exit: 1541 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1542 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1543 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1544 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1545 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1546 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1547 // CHECK9: .omp.final.then: 1548 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 1549 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1550 // CHECK9: .omp.final.done: 1551 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1552 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 1553 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1554 // CHECK9: .omp.lastprivate.then: 1555 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 1556 // CHECK9-NEXT: store i32 [[TMP25]], i32* [[CONV]], align 4 1557 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1558 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 1559 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false) 1560 // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0 1561 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 1562 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2 1563 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP29]] 1564 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1565 // CHECK9: omp.arraycpy.body: 1566 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1567 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1568 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1569 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1570 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 1571 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1572 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1573 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 1574 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 1575 // CHECK9: omp.arraycpy.done12: 1576 // CHECK9-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 1577 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 1578 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* 1579 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 1580 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1581 // CHECK9: .omp.lastprivate.done: 1582 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] 1583 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 1584 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 1585 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1586 // CHECK9: arraydestroy.body: 1587 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1588 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1589 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 1590 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1591 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1592 // CHECK9: arraydestroy.done14: 1593 // CHECK9-NEXT: ret void 1594 // 1595 // 1596 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1597 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1598 // CHECK9-NEXT: entry: 1599 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1600 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1601 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1602 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 1603 // CHECK9-NEXT: ret void 1604 // 1605 // 1606 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1607 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1608 // CHECK9-NEXT: entry: 1609 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1610 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1611 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1612 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1613 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1614 // CHECK9-NEXT: ret void 1615 // 1616 // 1617 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1618 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1619 // CHECK9-NEXT: entry: 1620 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1621 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1622 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1623 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1624 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1625 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1626 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1627 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1628 // CHECK9-NEXT: ret void 1629 // 1630 // 1631 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1632 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1633 // CHECK9-NEXT: entry: 1634 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1635 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1636 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1637 // CHECK9-NEXT: ret void 1638 // 1639 // 1640 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1641 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] { 1642 // CHECK9-NEXT: entry: 1643 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1644 // CHECK9-NEXT: ret void 1645 // 1646 // 1647 // CHECK10-LABEL: define {{[^@]+}}@main 1648 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1649 // CHECK10-NEXT: entry: 1650 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1651 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1652 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1653 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1654 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1655 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1656 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1657 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1658 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1659 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1660 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1661 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1662 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1663 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1664 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1665 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1666 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1667 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1668 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1669 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1670 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1671 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1672 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1673 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1674 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1675 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1676 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1677 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 1678 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 1679 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1680 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1681 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1682 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1683 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1684 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 1685 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1686 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1687 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1688 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1689 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 1690 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8 1691 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1692 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 1693 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 8 1694 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1695 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 1696 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1697 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1698 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 1699 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1700 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1701 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 1702 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1703 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 1704 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1705 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]** 1706 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 8 1707 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1708 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 1709 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 1710 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1711 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 8 1712 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1713 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S** 1714 // CHECK10-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 8 1715 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1716 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 1717 // CHECK10-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 8 1718 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1719 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 8 1720 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1721 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 1722 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP28]], align 8 1723 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1724 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1725 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1726 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1727 // CHECK10-NEXT: store i8* null, i8** [[TMP31]], align 8 1728 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1729 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1730 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1731 // CHECK10-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 5, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1732 // CHECK10-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1733 // CHECK10-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1734 // CHECK10: omp_offload.failed: 1735 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR5:[0-9]+]] 1736 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1737 // CHECK10: omp_offload.cont: 1738 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1739 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1740 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1741 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1742 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1743 // CHECK10: arraydestroy.body: 1744 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1745 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1746 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 1747 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1748 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1749 // CHECK10: arraydestroy.done3: 1750 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 1751 // CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[RETVAL]], align 4 1752 // CHECK10-NEXT: ret i32 [[TMP37]] 1753 // 1754 // 1755 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1756 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1757 // CHECK10-NEXT: entry: 1758 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1759 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1760 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1761 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1762 // CHECK10-NEXT: ret void 1763 // 1764 // 1765 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1766 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1767 // CHECK10-NEXT: entry: 1768 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1769 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1770 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1771 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1772 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1773 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1774 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1775 // CHECK10-NEXT: ret void 1776 // 1777 // 1778 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1779 // CHECK10-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1780 // CHECK10-NEXT: entry: 1781 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1782 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1783 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1784 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1785 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1786 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1787 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1788 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1789 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1790 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1791 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1792 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1793 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1794 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1795 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1796 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1797 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1798 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1799 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1800 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 1801 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1802 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 1803 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1804 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1805 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4 1806 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1807 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4 1808 // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1809 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i64 [[TMP7]]) 1810 // CHECK10-NEXT: ret void 1811 // 1812 // 1813 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1814 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] { 1815 // CHECK10-NEXT: entry: 1816 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1817 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1818 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1819 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1820 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1821 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1822 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1823 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1824 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1825 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1826 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1827 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1828 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1829 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1830 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1831 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1832 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1833 // CHECK10-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1834 // CHECK10-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8 1835 // CHECK10-NEXT: [[SVAR8:%.*]] = alloca i32, align 4 1836 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1837 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1838 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1839 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1840 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1841 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1842 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1843 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1844 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1845 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1846 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1847 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1848 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1849 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1850 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1851 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1852 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1853 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1854 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1855 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1856 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1857 // CHECK10: arrayctor.loop: 1858 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1859 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1860 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1861 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1862 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1863 // CHECK10: arrayctor.cont: 1864 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1865 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) 1866 // CHECK10-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8 1867 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1868 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1869 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1870 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1871 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1872 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1873 // CHECK10: cond.true: 1874 // CHECK10-NEXT: br label [[COND_END:%.*]] 1875 // CHECK10: cond.false: 1876 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1877 // CHECK10-NEXT: br label [[COND_END]] 1878 // CHECK10: cond.end: 1879 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1880 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1881 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1882 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1883 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1884 // CHECK10: omp.inner.for.cond: 1885 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1886 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 1887 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1888 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1889 // CHECK10: omp.inner.for.cond.cleanup: 1890 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1891 // CHECK10: omp.inner.for.body: 1892 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1893 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1894 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1895 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 1896 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5 1897 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 1898 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1899 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1900 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5 1901 // CHECK10-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8, !llvm.access.group !5 1902 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 1903 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP15]] to i64 1904 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 1905 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* 1906 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* 1907 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group !5 1908 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1909 // CHECK10: omp.body.continue: 1910 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1911 // CHECK10: omp.inner.for.inc: 1912 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1913 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP18]], 1 1914 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1915 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 1916 // CHECK10: omp.inner.for.end: 1917 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1918 // CHECK10: omp.loop.exit: 1919 // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1920 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1921 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1922 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1923 // CHECK10-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1924 // CHECK10-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1925 // CHECK10: .omp.final.then: 1926 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 1927 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 1928 // CHECK10: .omp.final.done: 1929 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1930 // CHECK10-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 1931 // CHECK10-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1932 // CHECK10: .omp.lastprivate.then: 1933 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4 1934 // CHECK10-NEXT: store i32 [[TMP25]], i32* [[CONV]], align 4 1935 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1936 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1937 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false) 1938 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0 1939 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S* 1940 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2 1941 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP29]] 1942 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1943 // CHECK10: omp.arraycpy.body: 1944 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1945 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1946 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1947 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1948 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 1949 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1950 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1951 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 1952 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] 1953 // CHECK10: omp.arraycpy.done14: 1954 // CHECK10-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 1955 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 1956 // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 1957 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 1958 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR8]], align 4 1959 // CHECK10-NEXT: store i32 [[TMP35]], i32* [[CONV1]], align 4 1960 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1961 // CHECK10: .omp.lastprivate.done: 1962 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR5]] 1963 // CHECK10-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1964 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 1965 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1966 // CHECK10: arraydestroy.body: 1967 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1968 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1969 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 1970 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]] 1971 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]] 1972 // CHECK10: arraydestroy.done16: 1973 // CHECK10-NEXT: ret void 1974 // 1975 // 1976 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1977 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1978 // CHECK10-NEXT: entry: 1979 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1980 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1981 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1982 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 1983 // CHECK10-NEXT: ret void 1984 // 1985 // 1986 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1987 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] comdat { 1988 // CHECK10-NEXT: entry: 1989 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1990 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1991 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1992 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1993 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1994 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1995 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1996 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1997 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1998 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1999 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 2000 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2001 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2002 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 2003 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2004 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2005 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 2006 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 2007 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 2008 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 2009 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 2010 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 2011 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 2012 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2013 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2014 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 2015 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2016 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2017 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2018 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]** 2019 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 8 2020 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2021 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 2022 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8 2023 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2024 // CHECK10-NEXT: store i8* null, i8** [[TMP9]], align 8 2025 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2026 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 2027 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 2028 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2029 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 2030 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 2031 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2032 // CHECK10-NEXT: store i8* null, i8** [[TMP14]], align 8 2033 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2034 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]** 2035 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 8 2036 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2037 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 2038 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 2039 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2040 // CHECK10-NEXT: store i8* null, i8** [[TMP19]], align 8 2041 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2042 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0** 2043 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 8 2044 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2045 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 2046 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 8 2047 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 2048 // CHECK10-NEXT: store i8* null, i8** [[TMP24]], align 8 2049 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2050 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2051 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2052 // CHECK10-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2053 // CHECK10-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2054 // CHECK10-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2055 // CHECK10: omp_offload.failed: 2056 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR5]] 2057 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 2058 // CHECK10: omp_offload.cont: 2059 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 2060 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2061 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2062 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2063 // CHECK10: arraydestroy.body: 2064 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2065 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2066 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 2067 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2068 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2069 // CHECK10: arraydestroy.done2: 2070 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 2071 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4 2072 // CHECK10-NEXT: ret i32 [[TMP30]] 2073 // 2074 // 2075 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2076 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2077 // CHECK10-NEXT: entry: 2078 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2079 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2080 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2081 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2082 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 2083 // CHECK10-NEXT: ret void 2084 // 2085 // 2086 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2087 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2088 // CHECK10-NEXT: entry: 2089 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2090 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2091 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2092 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2093 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2094 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2095 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2096 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 2097 // CHECK10-NEXT: ret void 2098 // 2099 // 2100 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2101 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2102 // CHECK10-NEXT: entry: 2103 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2104 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2105 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2106 // CHECK10-NEXT: ret void 2107 // 2108 // 2109 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2110 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2111 // CHECK10-NEXT: entry: 2112 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2113 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2114 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2115 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2116 // CHECK10-NEXT: ret void 2117 // 2118 // 2119 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2120 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2121 // CHECK10-NEXT: entry: 2122 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2123 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2124 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2125 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2126 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2127 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2128 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 2129 // CHECK10-NEXT: ret void 2130 // 2131 // 2132 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2133 // CHECK10-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2134 // CHECK10-NEXT: entry: 2135 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2136 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2137 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2138 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2139 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2140 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2141 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2142 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2143 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2144 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2145 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2146 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2147 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2148 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2149 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2150 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 2151 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2152 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 2153 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2154 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2155 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) 2156 // CHECK10-NEXT: ret void 2157 // 2158 // 2159 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2160 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] { 2161 // CHECK10-NEXT: entry: 2162 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2163 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2164 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2165 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2166 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2167 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2168 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2169 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2170 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2171 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2172 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2173 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2174 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2175 // CHECK10-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2176 // CHECK10-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2177 // CHECK10-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2178 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2179 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 2180 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2181 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2182 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2183 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2184 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2185 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2186 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2187 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2188 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2189 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2190 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2191 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2192 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2193 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2194 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2195 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2196 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2197 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2198 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2199 // CHECK10: arrayctor.loop: 2200 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2201 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2202 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2203 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2204 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2205 // CHECK10: arrayctor.cont: 2206 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2207 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2208 // CHECK10-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 2209 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2210 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2211 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2212 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2213 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 2214 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2215 // CHECK10: cond.true: 2216 // CHECK10-NEXT: br label [[COND_END:%.*]] 2217 // CHECK10: cond.false: 2218 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2219 // CHECK10-NEXT: br label [[COND_END]] 2220 // CHECK10: cond.end: 2221 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 2222 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2223 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2224 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2225 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2226 // CHECK10: omp.inner.for.cond: 2227 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2228 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 2229 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2230 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2231 // CHECK10: omp.inner.for.cond.cleanup: 2232 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2233 // CHECK10: omp.inner.for.body: 2234 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2235 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2236 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2237 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 2238 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !11 2239 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 2240 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 2241 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 2242 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 2243 // CHECK10-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !11 2244 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 2245 // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64 2246 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 2247 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8* 2248 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* 2249 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group !11 2250 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2251 // CHECK10: omp.body.continue: 2252 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2253 // CHECK10: omp.inner.for.inc: 2254 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2255 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 2256 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2257 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 2258 // CHECK10: omp.inner.for.end: 2259 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2260 // CHECK10: omp.loop.exit: 2261 // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2262 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2263 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2264 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2265 // CHECK10-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2266 // CHECK10-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2267 // CHECK10: .omp.final.then: 2268 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 2269 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 2270 // CHECK10: .omp.final.done: 2271 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2272 // CHECK10-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2273 // CHECK10-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2274 // CHECK10: .omp.lastprivate.then: 2275 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 2276 // CHECK10-NEXT: store i32 [[TMP25]], i32* [[CONV]], align 4 2277 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2278 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2279 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false) 2280 // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0 2281 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 2282 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2 2283 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP29]] 2284 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2285 // CHECK10: omp.arraycpy.body: 2286 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2287 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2288 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2289 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2290 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 2291 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2292 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2293 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 2294 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 2295 // CHECK10: omp.arraycpy.done12: 2296 // CHECK10-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 2297 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 2298 // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* 2299 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 2300 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2301 // CHECK10: .omp.lastprivate.done: 2302 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] 2303 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2304 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 2305 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2306 // CHECK10: arraydestroy.body: 2307 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2308 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2309 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 2310 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2311 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2312 // CHECK10: arraydestroy.done14: 2313 // CHECK10-NEXT: ret void 2314 // 2315 // 2316 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2317 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2318 // CHECK10-NEXT: entry: 2319 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2320 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2321 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2322 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 2323 // CHECK10-NEXT: ret void 2324 // 2325 // 2326 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2327 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2328 // CHECK10-NEXT: entry: 2329 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2330 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2331 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2332 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2333 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 2334 // CHECK10-NEXT: ret void 2335 // 2336 // 2337 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2338 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2339 // CHECK10-NEXT: entry: 2340 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2341 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2342 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2343 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2344 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2345 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2346 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2347 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2348 // CHECK10-NEXT: ret void 2349 // 2350 // 2351 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2352 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2353 // CHECK10-NEXT: entry: 2354 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2355 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2356 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2357 // CHECK10-NEXT: ret void 2358 // 2359 // 2360 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2361 // CHECK10-SAME: () #[[ATTR7:[0-9]+]] { 2362 // CHECK10-NEXT: entry: 2363 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2364 // CHECK10-NEXT: ret void 2365 // 2366 // 2367 // CHECK11-LABEL: define {{[^@]+}}@main 2368 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2369 // CHECK11-NEXT: entry: 2370 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2371 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 2372 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 2373 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2374 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2375 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2376 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2377 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2378 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2379 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2380 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2381 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2382 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2383 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2384 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2385 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2386 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2387 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 2388 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2389 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2390 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2391 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2392 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2393 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2394 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2395 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2396 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2397 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2398 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2399 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2400 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2401 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2402 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2403 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2404 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2405 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2406 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2407 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 2408 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4 2409 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2410 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 2411 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 4 2412 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2413 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2414 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2415 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2416 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 2417 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2418 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2419 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 2420 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2421 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2422 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2423 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]** 2424 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 4 2425 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2426 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2427 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 2428 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2429 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 2430 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2431 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S** 2432 // CHECK11-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 4 2433 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2434 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2435 // CHECK11-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 4 2436 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2437 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 2438 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2439 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 2440 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP28]], align 4 2441 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2442 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2443 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 2444 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2445 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4 2446 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2447 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2448 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2449 // CHECK11-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 5, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2450 // CHECK11-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 2451 // CHECK11-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2452 // CHECK11: omp_offload.failed: 2453 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR5:[0-9]+]] 2454 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2455 // CHECK11: omp_offload.cont: 2456 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2457 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2458 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2459 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2460 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2461 // CHECK11: arraydestroy.body: 2462 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2463 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2464 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 2465 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2466 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2467 // CHECK11: arraydestroy.done2: 2468 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 2469 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[RETVAL]], align 4 2470 // CHECK11-NEXT: ret i32 [[TMP37]] 2471 // 2472 // 2473 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2474 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2475 // CHECK11-NEXT: entry: 2476 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2477 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2478 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2479 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2480 // CHECK11-NEXT: ret void 2481 // 2482 // 2483 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2484 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2485 // CHECK11-NEXT: entry: 2486 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2487 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2488 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2489 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2490 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2491 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2492 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2493 // CHECK11-NEXT: ret void 2494 // 2495 // 2496 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 2497 // CHECK11-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 2498 // CHECK11-NEXT: entry: 2499 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2500 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2501 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2502 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2503 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 2504 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2505 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2506 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2507 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2508 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2509 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2510 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2511 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 2512 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2513 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2514 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2515 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 2516 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 2517 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 2518 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2519 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2520 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 2521 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[SVAR_CASTED]], align 4 2522 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2523 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i32 [[TMP7]]) 2524 // CHECK11-NEXT: ret void 2525 // 2526 // 2527 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2528 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] { 2529 // CHECK11-NEXT: entry: 2530 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2531 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2532 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2533 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2534 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2535 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2536 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 2537 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2538 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2539 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2540 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2541 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2542 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2543 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2544 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2545 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2546 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 2547 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2548 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 2549 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 2550 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2551 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2552 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2553 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2554 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2555 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2556 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2557 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 2558 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2559 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2560 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2561 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 2562 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2563 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2564 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2565 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2566 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 2567 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2568 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2569 // CHECK11: arrayctor.loop: 2570 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2571 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2572 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2573 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2574 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2575 // CHECK11: arrayctor.cont: 2576 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2577 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2578 // CHECK11-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 2579 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2580 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2581 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2582 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2583 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 2584 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2585 // CHECK11: cond.true: 2586 // CHECK11-NEXT: br label [[COND_END:%.*]] 2587 // CHECK11: cond.false: 2588 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2589 // CHECK11-NEXT: br label [[COND_END]] 2590 // CHECK11: cond.end: 2591 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 2592 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2593 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2594 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2595 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2596 // CHECK11: omp.inner.for.cond: 2597 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2598 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 2599 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2600 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2601 // CHECK11: omp.inner.for.cond.cleanup: 2602 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2603 // CHECK11: omp.inner.for.body: 2604 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2605 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2606 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2607 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 2608 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6 2609 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 2610 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] 2611 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 2612 // CHECK11-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !6 2613 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 2614 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP15]] 2615 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* 2616 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* 2617 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group !6 2618 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2619 // CHECK11: omp.body.continue: 2620 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2621 // CHECK11: omp.inner.for.inc: 2622 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2623 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 2624 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2625 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2626 // CHECK11: omp.inner.for.end: 2627 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2628 // CHECK11: omp.loop.exit: 2629 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2630 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2631 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2632 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2633 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2634 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2635 // CHECK11: .omp.final.then: 2636 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 2637 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2638 // CHECK11: .omp.final.done: 2639 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2640 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2641 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2642 // CHECK11: .omp.lastprivate.then: 2643 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 2644 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[T_VAR_ADDR]], align 4 2645 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2646 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2647 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 8, i1 false) 2648 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0 2649 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 2650 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 2651 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP29]] 2652 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2653 // CHECK11: omp.arraycpy.body: 2654 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2655 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2656 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2657 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2658 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false) 2659 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2660 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2661 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 2662 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 2663 // CHECK11: omp.arraycpy.done12: 2664 // CHECK11-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 2665 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 2666 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 2667 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) 2668 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 2669 // CHECK11-NEXT: store i32 [[TMP35]], i32* [[SVAR_ADDR]], align 4 2670 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2671 // CHECK11: .omp.lastprivate.done: 2672 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] 2673 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 2674 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 2675 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2676 // CHECK11: arraydestroy.body: 2677 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2678 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2679 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 2680 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2681 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2682 // CHECK11: arraydestroy.done14: 2683 // CHECK11-NEXT: ret void 2684 // 2685 // 2686 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2687 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2688 // CHECK11-NEXT: entry: 2689 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2690 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2691 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2692 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 2693 // CHECK11-NEXT: ret void 2694 // 2695 // 2696 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2697 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] comdat { 2698 // CHECK11-NEXT: entry: 2699 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2700 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2701 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2702 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2703 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2704 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2705 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2706 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2707 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 2708 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 2709 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 2710 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2711 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2712 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2713 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2714 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2715 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2716 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 2717 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2718 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2719 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2720 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 2721 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 2722 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2723 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2724 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2725 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2726 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2727 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]** 2728 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 4 2729 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2730 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 2731 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4 2732 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2733 // CHECK11-NEXT: store i8* null, i8** [[TMP9]], align 4 2734 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2735 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 2736 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 2737 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2738 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2739 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 2740 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2741 // CHECK11-NEXT: store i8* null, i8** [[TMP14]], align 4 2742 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2743 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]** 2744 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 4 2745 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2746 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 2747 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 2748 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2749 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 4 2750 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2751 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0** 2752 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 4 2753 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2754 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 2755 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 4 2756 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2757 // CHECK11-NEXT: store i8* null, i8** [[TMP24]], align 4 2758 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2759 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2760 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2761 // CHECK11-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2762 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2763 // CHECK11-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2764 // CHECK11: omp_offload.failed: 2765 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR5]] 2766 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2767 // CHECK11: omp_offload.cont: 2768 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2769 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2770 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2771 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2772 // CHECK11: arraydestroy.body: 2773 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2774 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2775 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 2776 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2777 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2778 // CHECK11: arraydestroy.done2: 2779 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 2780 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4 2781 // CHECK11-NEXT: ret i32 [[TMP30]] 2782 // 2783 // 2784 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2785 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2786 // CHECK11-NEXT: entry: 2787 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2788 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2789 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2790 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2791 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2792 // CHECK11-NEXT: ret void 2793 // 2794 // 2795 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2796 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2797 // CHECK11-NEXT: entry: 2798 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2799 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2800 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2801 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2802 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2803 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2804 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2805 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2806 // CHECK11-NEXT: ret void 2807 // 2808 // 2809 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2810 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2811 // CHECK11-NEXT: entry: 2812 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2813 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2814 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2815 // CHECK11-NEXT: ret void 2816 // 2817 // 2818 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2819 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2820 // CHECK11-NEXT: entry: 2821 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2822 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2823 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2824 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2825 // CHECK11-NEXT: ret void 2826 // 2827 // 2828 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2829 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2830 // CHECK11-NEXT: entry: 2831 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2832 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2833 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2834 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2835 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2836 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2837 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2838 // CHECK11-NEXT: ret void 2839 // 2840 // 2841 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2842 // CHECK11-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2843 // CHECK11-NEXT: entry: 2844 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2845 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2846 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2847 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2848 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2849 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2850 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2851 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2852 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2853 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2854 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2855 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2856 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2857 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 2858 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 2859 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 2860 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2861 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2862 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) 2863 // CHECK11-NEXT: ret void 2864 // 2865 // 2866 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2867 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] { 2868 // CHECK11-NEXT: entry: 2869 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2870 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2871 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2872 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2873 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2874 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2875 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2876 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2877 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2878 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2879 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2880 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2881 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2882 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2883 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2884 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2885 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2886 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 2887 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2888 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2889 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2890 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2891 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2892 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2893 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2894 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2895 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2896 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2897 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 2898 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2899 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2900 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2901 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2902 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2903 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2904 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2905 // CHECK11: arrayctor.loop: 2906 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2907 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2908 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2909 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2910 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2911 // CHECK11: arrayctor.cont: 2912 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2913 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2914 // CHECK11-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 2915 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2916 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2917 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2918 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2919 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 2920 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2921 // CHECK11: cond.true: 2922 // CHECK11-NEXT: br label [[COND_END:%.*]] 2923 // CHECK11: cond.false: 2924 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2925 // CHECK11-NEXT: br label [[COND_END]] 2926 // CHECK11: cond.end: 2927 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 2928 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2929 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2930 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2931 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2932 // CHECK11: omp.inner.for.cond: 2933 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2934 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 2935 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2936 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2937 // CHECK11: omp.inner.for.cond.cleanup: 2938 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2939 // CHECK11: omp.inner.for.body: 2940 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2941 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2942 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2943 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 2944 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !12 2945 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 2946 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] 2947 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 2948 // CHECK11-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !12 2949 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 2950 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP15]] 2951 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 2952 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* 2953 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group !12 2954 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2955 // CHECK11: omp.body.continue: 2956 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2957 // CHECK11: omp.inner.for.inc: 2958 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2959 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1 2960 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2961 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 2962 // CHECK11: omp.inner.for.end: 2963 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2964 // CHECK11: omp.loop.exit: 2965 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2966 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2967 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2968 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2969 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2970 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2971 // CHECK11: .omp.final.then: 2972 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 2973 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2974 // CHECK11: .omp.final.done: 2975 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2976 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2977 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2978 // CHECK11: .omp.lastprivate.then: 2979 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 2980 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[T_VAR_ADDR]], align 4 2981 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2982 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2983 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 8, i1 false) 2984 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0 2985 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 2986 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 2987 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP29]] 2988 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2989 // CHECK11: omp.arraycpy.body: 2990 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2991 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2992 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2993 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2994 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false) 2995 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2996 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2997 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 2998 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 2999 // CHECK11: omp.arraycpy.done11: 3000 // CHECK11-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 3001 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 3002 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* 3003 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) 3004 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3005 // CHECK11: .omp.lastprivate.done: 3006 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] 3007 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3008 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 3009 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3010 // CHECK11: arraydestroy.body: 3011 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3012 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3013 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 3014 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 3015 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 3016 // CHECK11: arraydestroy.done13: 3017 // CHECK11-NEXT: ret void 3018 // 3019 // 3020 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3021 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3022 // CHECK11-NEXT: entry: 3023 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3024 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3025 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3026 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 3027 // CHECK11-NEXT: ret void 3028 // 3029 // 3030 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3031 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3032 // CHECK11-NEXT: entry: 3033 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3034 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3035 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3036 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3037 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 3038 // CHECK11-NEXT: ret void 3039 // 3040 // 3041 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3042 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3043 // CHECK11-NEXT: entry: 3044 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3045 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3046 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3047 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3048 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3049 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3050 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3051 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3052 // CHECK11-NEXT: ret void 3053 // 3054 // 3055 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3056 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3057 // CHECK11-NEXT: entry: 3058 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3059 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3060 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3061 // CHECK11-NEXT: ret void 3062 // 3063 // 3064 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3065 // CHECK11-SAME: () #[[ATTR7:[0-9]+]] { 3066 // CHECK11-NEXT: entry: 3067 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 3068 // CHECK11-NEXT: ret void 3069 // 3070 // 3071 // CHECK12-LABEL: define {{[^@]+}}@main 3072 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 3073 // CHECK12-NEXT: entry: 3074 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3075 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 3076 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 3077 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3078 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3079 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3080 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3081 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 3082 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3083 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3084 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 3085 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 3086 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 3087 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 3088 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3089 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3090 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3091 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 3092 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3093 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 3094 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3095 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 3096 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3097 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 3098 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 3099 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 3100 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 3101 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 3102 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 3103 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3104 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3105 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3106 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3107 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 3108 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 3109 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 3110 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3111 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 3112 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4 3113 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3114 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 3115 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 4 3116 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3117 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 3118 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3119 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 3120 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 3121 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3122 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 3123 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 3124 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3125 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 3126 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3127 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]** 3128 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 4 3129 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3130 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 3131 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 3132 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3133 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4 3134 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3135 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S** 3136 // CHECK12-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 4 3137 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3138 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 3139 // CHECK12-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 4 3140 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3141 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4 3142 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3143 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 3144 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP28]], align 4 3145 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3146 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 3147 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 3148 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 3149 // CHECK12-NEXT: store i8* null, i8** [[TMP31]], align 4 3150 // CHECK12-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3151 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3152 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 3153 // CHECK12-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 5, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3154 // CHECK12-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 3155 // CHECK12-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3156 // CHECK12: omp_offload.failed: 3157 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR5:[0-9]+]] 3158 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3159 // CHECK12: omp_offload.cont: 3160 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 3161 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3162 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3163 // CHECK12-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3164 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3165 // CHECK12: arraydestroy.body: 3166 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3167 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3168 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 3169 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3170 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3171 // CHECK12: arraydestroy.done2: 3172 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 3173 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[RETVAL]], align 4 3174 // CHECK12-NEXT: ret i32 [[TMP37]] 3175 // 3176 // 3177 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3178 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3179 // CHECK12-NEXT: entry: 3180 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3181 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3182 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3183 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3184 // CHECK12-NEXT: ret void 3185 // 3186 // 3187 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3188 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3189 // CHECK12-NEXT: entry: 3190 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3191 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3192 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3193 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3194 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3195 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3196 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3197 // CHECK12-NEXT: ret void 3198 // 3199 // 3200 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 3201 // CHECK12-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 3202 // CHECK12-NEXT: entry: 3203 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3204 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3205 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3206 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3207 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3208 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3209 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3210 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 3211 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3212 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3213 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3214 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3215 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3216 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3217 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3218 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3219 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3220 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 3221 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 3222 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3223 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3224 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 3225 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[SVAR_CASTED]], align 4 3226 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 3227 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i32 [[TMP7]]) 3228 // CHECK12-NEXT: ret void 3229 // 3230 // 3231 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 3232 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] { 3233 // CHECK12-NEXT: entry: 3234 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3235 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3236 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3237 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3238 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3239 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3240 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3241 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3242 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3243 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3244 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3245 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3246 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3247 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3248 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3249 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3250 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 3251 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3252 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 3253 // CHECK12-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 3254 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3255 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3256 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3257 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3258 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3259 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3260 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3261 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3262 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3263 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3264 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3265 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3266 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3267 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3268 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3269 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3270 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3271 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3272 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3273 // CHECK12: arrayctor.loop: 3274 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3275 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3276 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3277 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3278 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3279 // CHECK12: arrayctor.cont: 3280 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3281 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3282 // CHECK12-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 3283 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3284 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3285 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3286 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3287 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 3288 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3289 // CHECK12: cond.true: 3290 // CHECK12-NEXT: br label [[COND_END:%.*]] 3291 // CHECK12: cond.false: 3292 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3293 // CHECK12-NEXT: br label [[COND_END]] 3294 // CHECK12: cond.end: 3295 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 3296 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3297 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3298 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3299 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3300 // CHECK12: omp.inner.for.cond: 3301 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3302 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 3303 // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3304 // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3305 // CHECK12: omp.inner.for.cond.cleanup: 3306 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3307 // CHECK12: omp.inner.for.body: 3308 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3309 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3310 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3311 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 3312 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6 3313 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 3314 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] 3315 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 3316 // CHECK12-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !6 3317 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 3318 // CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP15]] 3319 // CHECK12-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* 3320 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* 3321 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group !6 3322 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3323 // CHECK12: omp.body.continue: 3324 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3325 // CHECK12: omp.inner.for.inc: 3326 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3327 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 3328 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3329 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 3330 // CHECK12: omp.inner.for.end: 3331 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3332 // CHECK12: omp.loop.exit: 3333 // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3334 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3335 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3336 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3337 // CHECK12-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 3338 // CHECK12-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3339 // CHECK12: .omp.final.then: 3340 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 3341 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 3342 // CHECK12: .omp.final.done: 3343 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3344 // CHECK12-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3345 // CHECK12-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3346 // CHECK12: .omp.lastprivate.then: 3347 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 3348 // CHECK12-NEXT: store i32 [[TMP25]], i32* [[T_VAR_ADDR]], align 4 3349 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3350 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3351 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 8, i1 false) 3352 // CHECK12-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0 3353 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 3354 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 3355 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP29]] 3356 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3357 // CHECK12: omp.arraycpy.body: 3358 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3359 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3360 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3361 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3362 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false) 3363 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3364 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3365 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 3366 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 3367 // CHECK12: omp.arraycpy.done12: 3368 // CHECK12-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3369 // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 3370 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* 3371 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) 3372 // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 3373 // CHECK12-NEXT: store i32 [[TMP35]], i32* [[SVAR_ADDR]], align 4 3374 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3375 // CHECK12: .omp.lastprivate.done: 3376 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] 3377 // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3378 // CHECK12-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 3379 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3380 // CHECK12: arraydestroy.body: 3381 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3382 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3383 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 3384 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 3385 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 3386 // CHECK12: arraydestroy.done14: 3387 // CHECK12-NEXT: ret void 3388 // 3389 // 3390 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3391 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3392 // CHECK12-NEXT: entry: 3393 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3394 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3395 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3396 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 3397 // CHECK12-NEXT: ret void 3398 // 3399 // 3400 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3401 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] comdat { 3402 // CHECK12-NEXT: entry: 3403 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3404 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3405 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3406 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3407 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3408 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3409 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3410 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3411 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3412 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3413 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3414 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3415 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3416 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 3417 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3418 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3419 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3420 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 3421 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3422 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 3423 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3424 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 3425 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 3426 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3427 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3428 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3429 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3430 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3431 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]** 3432 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 4 3433 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3434 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 3435 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4 3436 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3437 // CHECK12-NEXT: store i8* null, i8** [[TMP9]], align 4 3438 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3439 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 3440 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 3441 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3442 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 3443 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 3444 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3445 // CHECK12-NEXT: store i8* null, i8** [[TMP14]], align 4 3446 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3447 // CHECK12-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]** 3448 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 4 3449 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3450 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 3451 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 3452 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3453 // CHECK12-NEXT: store i8* null, i8** [[TMP19]], align 4 3454 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3455 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0** 3456 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 4 3457 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3458 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 3459 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 4 3460 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3461 // CHECK12-NEXT: store i8* null, i8** [[TMP24]], align 4 3462 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3463 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3464 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 3465 // CHECK12-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3466 // CHECK12-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 3467 // CHECK12-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3468 // CHECK12: omp_offload.failed: 3469 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR5]] 3470 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3471 // CHECK12: omp_offload.cont: 3472 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3473 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3474 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3475 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3476 // CHECK12: arraydestroy.body: 3477 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3478 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3479 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 3480 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3481 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3482 // CHECK12: arraydestroy.done2: 3483 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 3484 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4 3485 // CHECK12-NEXT: ret i32 [[TMP30]] 3486 // 3487 // 3488 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3489 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3490 // CHECK12-NEXT: entry: 3491 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3492 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3493 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3494 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3495 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 3496 // CHECK12-NEXT: ret void 3497 // 3498 // 3499 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3500 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3501 // CHECK12-NEXT: entry: 3502 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3503 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3504 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3505 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3506 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3507 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3508 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3509 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 3510 // CHECK12-NEXT: ret void 3511 // 3512 // 3513 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3514 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3515 // CHECK12-NEXT: entry: 3516 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3517 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3518 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3519 // CHECK12-NEXT: ret void 3520 // 3521 // 3522 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3523 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3524 // CHECK12-NEXT: entry: 3525 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3526 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3527 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3528 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3529 // CHECK12-NEXT: ret void 3530 // 3531 // 3532 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3533 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3534 // CHECK12-NEXT: entry: 3535 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3536 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3537 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3538 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3539 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3540 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3541 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 3542 // CHECK12-NEXT: ret void 3543 // 3544 // 3545 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 3546 // CHECK12-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3547 // CHECK12-NEXT: entry: 3548 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3549 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3550 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3551 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3552 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3553 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3554 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3555 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3556 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3557 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3558 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3559 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3560 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3561 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3562 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 3563 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 3564 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3565 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3566 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) 3567 // CHECK12-NEXT: ret void 3568 // 3569 // 3570 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3571 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] { 3572 // CHECK12-NEXT: entry: 3573 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3574 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3575 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3576 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3577 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3578 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3579 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3580 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3581 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3582 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3583 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3584 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3585 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3586 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3587 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3588 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 3589 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3590 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 3591 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3592 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3593 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3594 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3595 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3596 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3597 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3598 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3599 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3600 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3601 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3602 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3603 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3604 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3605 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3606 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3607 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3608 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3609 // CHECK12: arrayctor.loop: 3610 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3611 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3612 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3613 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3614 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3615 // CHECK12: arrayctor.cont: 3616 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3617 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3618 // CHECK12-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 3619 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3620 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3621 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3622 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3623 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 3624 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3625 // CHECK12: cond.true: 3626 // CHECK12-NEXT: br label [[COND_END:%.*]] 3627 // CHECK12: cond.false: 3628 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3629 // CHECK12-NEXT: br label [[COND_END]] 3630 // CHECK12: cond.end: 3631 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 3632 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3633 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3634 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3635 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3636 // CHECK12: omp.inner.for.cond: 3637 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3638 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 3639 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3640 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3641 // CHECK12: omp.inner.for.cond.cleanup: 3642 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3643 // CHECK12: omp.inner.for.body: 3644 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3645 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3646 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3647 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 3648 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !12 3649 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 3650 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] 3651 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 3652 // CHECK12-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !12 3653 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 3654 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP15]] 3655 // CHECK12-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 3656 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* 3657 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group !12 3658 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3659 // CHECK12: omp.body.continue: 3660 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3661 // CHECK12: omp.inner.for.inc: 3662 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3663 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1 3664 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3665 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3666 // CHECK12: omp.inner.for.end: 3667 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3668 // CHECK12: omp.loop.exit: 3669 // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3670 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3671 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3672 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3673 // CHECK12-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 3674 // CHECK12-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3675 // CHECK12: .omp.final.then: 3676 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 3677 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 3678 // CHECK12: .omp.final.done: 3679 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3680 // CHECK12-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3681 // CHECK12-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3682 // CHECK12: .omp.lastprivate.then: 3683 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR2]], align 4 3684 // CHECK12-NEXT: store i32 [[TMP25]], i32* [[T_VAR_ADDR]], align 4 3685 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3686 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3687 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 8, i1 false) 3688 // CHECK12-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0 3689 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 3690 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 3691 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP29]] 3692 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3693 // CHECK12: omp.arraycpy.body: 3694 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3695 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3696 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3697 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3698 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false) 3699 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3700 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3701 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]] 3702 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 3703 // CHECK12: omp.arraycpy.done11: 3704 // CHECK12-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 3705 // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 3706 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* 3707 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) 3708 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3709 // CHECK12: .omp.lastprivate.done: 3710 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] 3711 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3712 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 3713 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3714 // CHECK12: arraydestroy.body: 3715 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3716 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3717 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 3718 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 3719 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 3720 // CHECK12: arraydestroy.done13: 3721 // CHECK12-NEXT: ret void 3722 // 3723 // 3724 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3725 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3726 // CHECK12-NEXT: entry: 3727 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3728 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3729 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3730 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 3731 // CHECK12-NEXT: ret void 3732 // 3733 // 3734 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3735 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3736 // CHECK12-NEXT: entry: 3737 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3738 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3739 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3740 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3741 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 3742 // CHECK12-NEXT: ret void 3743 // 3744 // 3745 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3746 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3747 // CHECK12-NEXT: entry: 3748 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3749 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3750 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3751 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3752 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3753 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3754 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3755 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3756 // CHECK12-NEXT: ret void 3757 // 3758 // 3759 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3760 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3761 // CHECK12-NEXT: entry: 3762 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3763 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3764 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3765 // CHECK12-NEXT: ret void 3766 // 3767 // 3768 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3769 // CHECK12-SAME: () #[[ATTR7:[0-9]+]] { 3770 // CHECK12-NEXT: entry: 3771 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3772 // CHECK12-NEXT: ret void 3773 // 3774 // 3775 // CHECK13-LABEL: define {{[^@]+}}@main 3776 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 3777 // CHECK13-NEXT: entry: 3778 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3779 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 3780 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 3781 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3782 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3783 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3784 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3785 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3786 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 3787 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3788 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3789 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3790 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3791 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3792 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3793 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3794 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 3795 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 3796 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 3797 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3798 // CHECK13-NEXT: [[I14:%.*]] = alloca i32, align 4 3799 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3800 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 3801 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3802 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3803 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3804 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3805 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3806 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 3807 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3808 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 3809 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3810 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3811 // CHECK13-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 3812 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3813 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3814 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3815 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3816 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3817 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3818 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3819 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3820 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3821 // CHECK13: arrayctor.loop: 3822 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3823 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3824 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 3825 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3826 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3827 // CHECK13: arrayctor.cont: 3828 // CHECK13-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 3829 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3830 // CHECK13-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 3831 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3832 // CHECK13: omp.inner.for.cond: 3833 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3834 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 3835 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3836 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3837 // CHECK13: omp.inner.for.cond.cleanup: 3838 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3839 // CHECK13: omp.inner.for.body: 3840 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3841 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3842 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3843 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 3844 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !2 3845 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3846 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 3847 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 3848 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 3849 // CHECK13-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8, !llvm.access.group !2 3850 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3851 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64 3852 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 3853 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8* 3854 // CHECK13-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 3855 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !2 3856 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3857 // CHECK13: omp.body.continue: 3858 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3859 // CHECK13: omp.inner.for.inc: 3860 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3861 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 3862 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3863 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3864 // CHECK13: omp.inner.for.end: 3865 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4 3866 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4 3867 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[T_VAR]], align 4 3868 // CHECK13-NEXT: [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3869 // CHECK13-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3870 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 8, i1 false) 3871 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3872 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 3873 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i64 2 3874 // CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN10]], [[TMP20]] 3875 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3876 // CHECK13: omp.arraycpy.body: 3877 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3878 // CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3879 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3880 // CHECK13-NEXT: [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3881 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 4, i1 false) 3882 // CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3883 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3884 // CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]] 3885 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 3886 // CHECK13: omp.arraycpy.done11: 3887 // CHECK13-NEXT: [[TMP23:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 3888 // CHECK13-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 3889 // CHECK13-NEXT: [[TMP25:%.*]] = bitcast %struct.S* [[TMP23]] to i8* 3890 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 4, i1 false) 3891 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR]], align 4 3892 // CHECK13-NEXT: store i32 [[TMP26]], i32* @_ZZ4mainE4svar, align 4 3893 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 3894 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3895 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 3896 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3897 // CHECK13: arraydestroy.body: 3898 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP27]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3899 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3900 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3901 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 3902 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 3903 // CHECK13: arraydestroy.done13: 3904 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 3905 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3906 // CHECK13-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3907 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 3908 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY16:%.*]] 3909 // CHECK13: arraydestroy.body16: 3910 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi %struct.S* [ [[TMP28]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ] 3911 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST17]], i64 -1 3912 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]] 3913 // CHECK13-NEXT: [[ARRAYDESTROY_DONE19:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]] 3914 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]] 3915 // CHECK13: arraydestroy.done20: 3916 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3917 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4 3918 // CHECK13-NEXT: ret i32 [[TMP29]] 3919 // 3920 // 3921 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3922 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3923 // CHECK13-NEXT: entry: 3924 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3925 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3926 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3927 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3928 // CHECK13-NEXT: ret void 3929 // 3930 // 3931 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3932 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3933 // CHECK13-NEXT: entry: 3934 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3935 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3936 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3937 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3938 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3939 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3940 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3941 // CHECK13-NEXT: ret void 3942 // 3943 // 3944 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3945 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3946 // CHECK13-NEXT: entry: 3947 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3948 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3949 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3950 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3951 // CHECK13-NEXT: ret void 3952 // 3953 // 3954 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3955 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 3956 // CHECK13-NEXT: entry: 3957 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3958 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3959 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3960 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3961 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3962 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 3963 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3964 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3965 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3966 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3967 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3968 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3969 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3970 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3971 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 3972 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 3973 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 3974 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3975 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3976 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3977 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3978 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3979 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 3980 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3981 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 3982 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 3983 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3984 // CHECK13-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 3985 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3986 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3987 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3988 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3989 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3990 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3991 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3992 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3993 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3994 // CHECK13: arrayctor.loop: 3995 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3996 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3997 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3998 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3999 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4000 // CHECK13: arrayctor.cont: 4001 // CHECK13-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 4002 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4003 // CHECK13-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 4004 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4005 // CHECK13: omp.inner.for.cond: 4006 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4007 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 4008 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4009 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4010 // CHECK13: omp.inner.for.cond.cleanup: 4011 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4012 // CHECK13: omp.inner.for.body: 4013 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4014 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4015 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4016 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 4017 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6 4018 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 4019 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 4020 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 4021 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 4022 // CHECK13-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !6 4023 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 4024 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64 4025 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 4026 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 4027 // CHECK13-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 4028 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !6 4029 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4030 // CHECK13: omp.body.continue: 4031 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4032 // CHECK13: omp.inner.for.inc: 4033 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4034 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 4035 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4036 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 4037 // CHECK13: omp.inner.for.end: 4038 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4 4039 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4 4040 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[T_VAR]], align 4 4041 // CHECK13-NEXT: [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4042 // CHECK13-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 4043 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 8, i1 false) 4044 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4045 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 4046 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 4047 // CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP20]] 4048 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4049 // CHECK13: omp.arraycpy.body: 4050 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4051 // CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4052 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4053 // CHECK13-NEXT: [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4054 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 4, i1 false) 4055 // CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4056 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4057 // CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]] 4058 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 4059 // CHECK13: omp.arraycpy.done11: 4060 // CHECK13-NEXT: [[TMP23:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 4061 // CHECK13-NEXT: [[TMP24:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8* 4062 // CHECK13-NEXT: [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8* 4063 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 4, i1 false) 4064 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4065 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4066 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2 4067 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4068 // CHECK13: arraydestroy.body: 4069 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4070 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4071 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4072 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 4073 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 4074 // CHECK13: arraydestroy.done13: 4075 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 4076 // CHECK13-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4077 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2 4078 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]] 4079 // CHECK13: arraydestroy.body15: 4080 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi %struct.S.0* [ [[TMP27]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ] 4081 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST16]], i64 -1 4082 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR4]] 4083 // CHECK13-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]] 4084 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]] 4085 // CHECK13: arraydestroy.done19: 4086 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4087 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4 4088 // CHECK13-NEXT: ret i32 [[TMP28]] 4089 // 4090 // 4091 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4092 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4093 // CHECK13-NEXT: entry: 4094 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4095 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4096 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4097 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4098 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 4099 // CHECK13-NEXT: ret void 4100 // 4101 // 4102 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4103 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4104 // CHECK13-NEXT: entry: 4105 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4106 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4107 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4108 // CHECK13-NEXT: ret void 4109 // 4110 // 4111 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4112 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4113 // CHECK13-NEXT: entry: 4114 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4115 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4116 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4117 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4118 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4119 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4120 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4121 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 4122 // CHECK13-NEXT: ret void 4123 // 4124 // 4125 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4126 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4127 // CHECK13-NEXT: entry: 4128 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4129 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4130 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4131 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4132 // CHECK13-NEXT: ret void 4133 // 4134 // 4135 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4136 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4137 // CHECK13-NEXT: entry: 4138 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4139 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4140 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4141 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4142 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4143 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4144 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 4145 // CHECK13-NEXT: ret void 4146 // 4147 // 4148 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4149 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4150 // CHECK13-NEXT: entry: 4151 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4152 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4153 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4154 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4155 // CHECK13-NEXT: ret void 4156 // 4157 // 4158 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4159 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4160 // CHECK13-NEXT: entry: 4161 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4162 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4163 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4164 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4165 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 4166 // CHECK13-NEXT: ret void 4167 // 4168 // 4169 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4170 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4171 // CHECK13-NEXT: entry: 4172 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4173 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4174 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4175 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4176 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4177 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4178 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4179 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4180 // CHECK13-NEXT: ret void 4181 // 4182 // 4183 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4184 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4185 // CHECK13-NEXT: entry: 4186 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4187 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4188 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4189 // CHECK13-NEXT: ret void 4190 // 4191 // 4192 // CHECK14-LABEL: define {{[^@]+}}@main 4193 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 4194 // CHECK14-NEXT: entry: 4195 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4196 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 4197 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 8 4198 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4199 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4200 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4201 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4202 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 4203 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 4204 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4205 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4206 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4207 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4208 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 4209 // CHECK14-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4210 // CHECK14-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4211 // CHECK14-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 4212 // CHECK14-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 4213 // CHECK14-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 4214 // CHECK14-NEXT: [[SVAR:%.*]] = alloca i32, align 4 4215 // CHECK14-NEXT: [[I14:%.*]] = alloca i32, align 4 4216 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 4217 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 8 4218 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4219 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 4220 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4221 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 4222 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 4223 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 4224 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 4225 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 4226 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 4227 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 4228 // CHECK14-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 4229 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 4230 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 4231 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4232 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4233 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4234 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4235 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4236 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 4237 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4238 // CHECK14: arrayctor.loop: 4239 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4240 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4241 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 4242 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4243 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4244 // CHECK14: arrayctor.cont: 4245 // CHECK14-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 4246 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4247 // CHECK14-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 4248 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4249 // CHECK14: omp.inner.for.cond: 4250 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 4251 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 4252 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4253 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4254 // CHECK14: omp.inner.for.cond.cleanup: 4255 // CHECK14-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4256 // CHECK14: omp.inner.for.body: 4257 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 4258 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4259 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4260 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 4261 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !2 4262 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 4263 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 4264 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 4265 // CHECK14-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 4266 // CHECK14-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8, !llvm.access.group !2 4267 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 4268 // CHECK14-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64 4269 // CHECK14-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 4270 // CHECK14-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8* 4271 // CHECK14-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 4272 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !2 4273 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4274 // CHECK14: omp.body.continue: 4275 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4276 // CHECK14: omp.inner.for.inc: 4277 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 4278 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 4279 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 4280 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4281 // CHECK14: omp.inner.for.end: 4282 // CHECK14-NEXT: store i32 2, i32* [[I]], align 4 4283 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4 4284 // CHECK14-NEXT: store i32 [[TMP16]], i32* [[T_VAR]], align 4 4285 // CHECK14-NEXT: [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4286 // CHECK14-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 4287 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 8, i1 false) 4288 // CHECK14-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4289 // CHECK14-NEXT: [[TMP19:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 4290 // CHECK14-NEXT: [[TMP20:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i64 2 4291 // CHECK14-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN10]], [[TMP20]] 4292 // CHECK14-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4293 // CHECK14: omp.arraycpy.body: 4294 // CHECK14-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4295 // CHECK14-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4296 // CHECK14-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4297 // CHECK14-NEXT: [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4298 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 4, i1 false) 4299 // CHECK14-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4300 // CHECK14-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4301 // CHECK14-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]] 4302 // CHECK14-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 4303 // CHECK14: omp.arraycpy.done11: 4304 // CHECK14-NEXT: [[TMP23:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8 4305 // CHECK14-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 4306 // CHECK14-NEXT: [[TMP25:%.*]] = bitcast %struct.S* [[TMP23]] to i8* 4307 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 4, i1 false) 4308 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR]], align 4 4309 // CHECK14-NEXT: store i32 [[TMP26]], i32* @_ZZ4mainE4svar, align 4 4310 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 4311 // CHECK14-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4312 // CHECK14-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 4313 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4314 // CHECK14: arraydestroy.body: 4315 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP27]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4316 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4317 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4318 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 4319 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 4320 // CHECK14: arraydestroy.done13: 4321 // CHECK14-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 4322 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4323 // CHECK14-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4324 // CHECK14-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 4325 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY16:%.*]] 4326 // CHECK14: arraydestroy.body16: 4327 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi %struct.S* [ [[TMP28]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ] 4328 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST17]], i64 -1 4329 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]] 4330 // CHECK14-NEXT: [[ARRAYDESTROY_DONE19:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]] 4331 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]] 4332 // CHECK14: arraydestroy.done20: 4333 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4334 // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4 4335 // CHECK14-NEXT: ret i32 [[TMP29]] 4336 // 4337 // 4338 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4339 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4340 // CHECK14-NEXT: entry: 4341 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4342 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4343 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4344 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4345 // CHECK14-NEXT: ret void 4346 // 4347 // 4348 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4349 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4350 // CHECK14-NEXT: entry: 4351 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4352 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4353 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4354 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4355 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4356 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4357 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 4358 // CHECK14-NEXT: ret void 4359 // 4360 // 4361 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4362 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4363 // CHECK14-NEXT: entry: 4364 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4365 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4366 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4367 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4368 // CHECK14-NEXT: ret void 4369 // 4370 // 4371 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4372 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 4373 // CHECK14-NEXT: entry: 4374 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4375 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4376 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4377 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4378 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4379 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 4380 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 4381 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4382 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4383 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4384 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4385 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 4386 // CHECK14-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4387 // CHECK14-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4388 // CHECK14-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 4389 // CHECK14-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 4390 // CHECK14-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 4391 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4392 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 4393 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4394 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 4395 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 4396 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 4397 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 4398 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 4399 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 4400 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 4401 // CHECK14-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 4402 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 4403 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 4404 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4405 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4406 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4407 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4408 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4409 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 4410 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4411 // CHECK14: arrayctor.loop: 4412 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4413 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4414 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 4415 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4416 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4417 // CHECK14: arrayctor.cont: 4418 // CHECK14-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 4419 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4420 // CHECK14-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 4421 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4422 // CHECK14: omp.inner.for.cond: 4423 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4424 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 4425 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4426 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4427 // CHECK14: omp.inner.for.cond.cleanup: 4428 // CHECK14-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4429 // CHECK14: omp.inner.for.body: 4430 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4431 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4432 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4433 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 4434 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6 4435 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 4436 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 4437 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 4438 // CHECK14-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 4439 // CHECK14-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !6 4440 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 4441 // CHECK14-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64 4442 // CHECK14-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 4443 // CHECK14-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 4444 // CHECK14-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 4445 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !6 4446 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4447 // CHECK14: omp.body.continue: 4448 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4449 // CHECK14: omp.inner.for.inc: 4450 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4451 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 4452 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4453 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 4454 // CHECK14: omp.inner.for.end: 4455 // CHECK14-NEXT: store i32 2, i32* [[I]], align 4 4456 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4 4457 // CHECK14-NEXT: store i32 [[TMP16]], i32* [[T_VAR]], align 4 4458 // CHECK14-NEXT: [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4459 // CHECK14-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 4460 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i64 8, i1 false) 4461 // CHECK14-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4462 // CHECK14-NEXT: [[TMP19:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 4463 // CHECK14-NEXT: [[TMP20:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 4464 // CHECK14-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP20]] 4465 // CHECK14-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4466 // CHECK14: omp.arraycpy.body: 4467 // CHECK14-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4468 // CHECK14-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4469 // CHECK14-NEXT: [[TMP21:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4470 // CHECK14-NEXT: [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4471 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 4, i1 false) 4472 // CHECK14-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4473 // CHECK14-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4474 // CHECK14-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]] 4475 // CHECK14-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 4476 // CHECK14: omp.arraycpy.done11: 4477 // CHECK14-NEXT: [[TMP23:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 4478 // CHECK14-NEXT: [[TMP24:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8* 4479 // CHECK14-NEXT: [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8* 4480 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 4, i1 false) 4481 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4482 // CHECK14-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4483 // CHECK14-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2 4484 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4485 // CHECK14: arraydestroy.body: 4486 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4487 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4488 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4489 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 4490 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 4491 // CHECK14: arraydestroy.done13: 4492 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 4493 // CHECK14-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4494 // CHECK14-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2 4495 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]] 4496 // CHECK14: arraydestroy.body15: 4497 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi %struct.S.0* [ [[TMP27]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ] 4498 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST16]], i64 -1 4499 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR4]] 4500 // CHECK14-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]] 4501 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]] 4502 // CHECK14: arraydestroy.done19: 4503 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4504 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4 4505 // CHECK14-NEXT: ret i32 [[TMP28]] 4506 // 4507 // 4508 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4509 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4510 // CHECK14-NEXT: entry: 4511 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4512 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4513 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4514 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4515 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 4516 // CHECK14-NEXT: ret void 4517 // 4518 // 4519 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4520 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4521 // CHECK14-NEXT: entry: 4522 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4523 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4524 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4525 // CHECK14-NEXT: ret void 4526 // 4527 // 4528 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4529 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4530 // CHECK14-NEXT: entry: 4531 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4532 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4533 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4534 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4535 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4536 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4537 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4538 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 4539 // CHECK14-NEXT: ret void 4540 // 4541 // 4542 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4543 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4544 // CHECK14-NEXT: entry: 4545 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4546 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4547 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4548 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4549 // CHECK14-NEXT: ret void 4550 // 4551 // 4552 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4553 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4554 // CHECK14-NEXT: entry: 4555 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4556 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4557 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4558 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4559 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4560 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4561 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 4562 // CHECK14-NEXT: ret void 4563 // 4564 // 4565 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4566 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4567 // CHECK14-NEXT: entry: 4568 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4569 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4570 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4571 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4572 // CHECK14-NEXT: ret void 4573 // 4574 // 4575 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4576 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4577 // CHECK14-NEXT: entry: 4578 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4579 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4580 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4581 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4582 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 4583 // CHECK14-NEXT: ret void 4584 // 4585 // 4586 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4587 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4588 // CHECK14-NEXT: entry: 4589 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4590 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4591 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4592 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4593 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4594 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4595 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4596 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4597 // CHECK14-NEXT: ret void 4598 // 4599 // 4600 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4601 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4602 // CHECK14-NEXT: entry: 4603 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4604 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4605 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4606 // CHECK14-NEXT: ret void 4607 // 4608 // 4609 // CHECK15-LABEL: define {{[^@]+}}@main 4610 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 4611 // CHECK15-NEXT: entry: 4612 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4613 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 4614 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 4615 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4616 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4617 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4618 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4619 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4620 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4621 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4622 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4623 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4624 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4625 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4626 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4627 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4628 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 4629 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 4630 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 4631 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4 4632 // CHECK15-NEXT: [[I13:%.*]] = alloca i32, align 4 4633 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4634 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 4635 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4636 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4637 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4638 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4639 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4640 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 4641 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4642 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 4643 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4644 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4645 // CHECK15-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 4646 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4647 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4648 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4649 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4650 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4651 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4652 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4653 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4654 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4655 // CHECK15: arrayctor.loop: 4656 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4657 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4658 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 4659 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4660 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4661 // CHECK15: arrayctor.cont: 4662 // CHECK15-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4663 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4664 // CHECK15-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 4665 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4666 // CHECK15: omp.inner.for.cond: 4667 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4668 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 4669 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4670 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4671 // CHECK15: omp.inner.for.cond.cleanup: 4672 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4673 // CHECK15: omp.inner.for.body: 4674 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4675 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4676 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4677 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 4678 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !3 4679 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4680 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP10]] 4681 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 4682 // CHECK15-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !3 4683 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4684 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP12]] 4685 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX7]] to i8* 4686 // CHECK15-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 4687 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !3 4688 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4689 // CHECK15: omp.body.continue: 4690 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4691 // CHECK15: omp.inner.for.inc: 4692 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4693 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 4694 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4695 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 4696 // CHECK15: omp.inner.for.end: 4697 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4 4698 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4 4699 // CHECK15-NEXT: store i32 [[TMP16]], i32* [[T_VAR]], align 4 4700 // CHECK15-NEXT: [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4701 // CHECK15-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 4702 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 8, i1 false) 4703 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4704 // CHECK15-NEXT: [[TMP19:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 4705 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i32 2 4706 // CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN9]], [[TMP20]] 4707 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4708 // CHECK15: omp.arraycpy.body: 4709 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4710 // CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN9]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4711 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4712 // CHECK15-NEXT: [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4713 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i32 4, i1 false) 4714 // CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4715 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4716 // CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]] 4717 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]] 4718 // CHECK15: omp.arraycpy.done10: 4719 // CHECK15-NEXT: [[TMP23:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 4720 // CHECK15-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 4721 // CHECK15-NEXT: [[TMP25:%.*]] = bitcast %struct.S* [[TMP23]] to i8* 4722 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 4, i1 false) 4723 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR]], align 4 4724 // CHECK15-NEXT: store i32 [[TMP26]], i32* @_ZZ4mainE4svar, align 4 4725 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 4726 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4727 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 4728 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4729 // CHECK15: arraydestroy.body: 4730 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP27]], [[OMP_ARRAYCPY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4731 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4732 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4733 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 4734 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 4735 // CHECK15: arraydestroy.done12: 4736 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 4737 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4738 // CHECK15-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4739 // CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i32 2 4740 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]] 4741 // CHECK15: arraydestroy.body15: 4742 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi %struct.S* [ [[TMP28]], [[ARRAYDESTROY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ] 4743 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST16]], i32 -1 4744 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR4]] 4745 // CHECK15-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]] 4746 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]] 4747 // CHECK15: arraydestroy.done19: 4748 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4749 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4 4750 // CHECK15-NEXT: ret i32 [[TMP29]] 4751 // 4752 // 4753 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4754 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4755 // CHECK15-NEXT: entry: 4756 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4757 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4758 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4759 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4760 // CHECK15-NEXT: ret void 4761 // 4762 // 4763 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4764 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4765 // CHECK15-NEXT: entry: 4766 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4767 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4768 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4769 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4770 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4771 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4772 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 4773 // CHECK15-NEXT: ret void 4774 // 4775 // 4776 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4777 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4778 // CHECK15-NEXT: entry: 4779 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4780 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4781 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4782 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4783 // CHECK15-NEXT: ret void 4784 // 4785 // 4786 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4787 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 4788 // CHECK15-NEXT: entry: 4789 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4790 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4791 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4792 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4793 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4794 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4795 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4796 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4797 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4798 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4799 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4800 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4801 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4802 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4803 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 4804 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 4805 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 4806 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4807 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4808 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4809 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4810 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4811 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 4812 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4813 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 4814 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4815 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4816 // CHECK15-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 4817 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4818 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4819 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4820 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4821 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4822 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4823 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4824 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4825 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4826 // CHECK15: arrayctor.loop: 4827 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4828 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4829 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 4830 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4831 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4832 // CHECK15: arrayctor.cont: 4833 // CHECK15-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4834 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4835 // CHECK15-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 4836 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4837 // CHECK15: omp.inner.for.cond: 4838 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4839 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 4840 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4841 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4842 // CHECK15: omp.inner.for.cond.cleanup: 4843 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4844 // CHECK15: omp.inner.for.body: 4845 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4846 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4847 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4848 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 4849 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !7 4850 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 4851 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP10]] 4852 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 4853 // CHECK15-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !7 4854 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 4855 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP12]] 4856 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8* 4857 // CHECK15-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 4858 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !7 4859 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4860 // CHECK15: omp.body.continue: 4861 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4862 // CHECK15: omp.inner.for.inc: 4863 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4864 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 4865 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4866 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 4867 // CHECK15: omp.inner.for.end: 4868 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4 4869 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4 4870 // CHECK15-NEXT: store i32 [[TMP16]], i32* [[T_VAR]], align 4 4871 // CHECK15-NEXT: [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4872 // CHECK15-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 4873 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 8, i1 false) 4874 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4875 // CHECK15-NEXT: [[TMP19:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 4876 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2 4877 // CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN9]], [[TMP20]] 4878 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4879 // CHECK15: omp.arraycpy.body: 4880 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4881 // CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN9]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4882 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4883 // CHECK15-NEXT: [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4884 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i32 4, i1 false) 4885 // CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4886 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4887 // CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]] 4888 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]] 4889 // CHECK15: omp.arraycpy.done10: 4890 // CHECK15-NEXT: [[TMP23:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 4891 // CHECK15-NEXT: [[TMP24:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8* 4892 // CHECK15-NEXT: [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8* 4893 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 4, i1 false) 4894 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4895 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4896 // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2 4897 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4898 // CHECK15: arraydestroy.body: 4899 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[OMP_ARRAYCPY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4900 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4901 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4902 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 4903 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 4904 // CHECK15: arraydestroy.done12: 4905 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4906 // CHECK15-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4907 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i32 2 4908 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY14:%.*]] 4909 // CHECK15: arraydestroy.body14: 4910 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST15:%.*]] = phi %struct.S.0* [ [[TMP27]], [[ARRAYDESTROY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT16:%.*]], [[ARRAYDESTROY_BODY14]] ] 4911 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT16]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST15]], i32 -1 4912 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT16]]) #[[ATTR4]] 4913 // CHECK15-NEXT: [[ARRAYDESTROY_DONE17:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT16]], [[ARRAY_BEGIN13]] 4914 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE17]], label [[ARRAYDESTROY_DONE18:%.*]], label [[ARRAYDESTROY_BODY14]] 4915 // CHECK15: arraydestroy.done18: 4916 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4917 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4 4918 // CHECK15-NEXT: ret i32 [[TMP28]] 4919 // 4920 // 4921 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4922 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4923 // CHECK15-NEXT: entry: 4924 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4925 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4926 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4927 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4928 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 4929 // CHECK15-NEXT: ret void 4930 // 4931 // 4932 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4933 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4934 // CHECK15-NEXT: entry: 4935 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4936 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4937 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4938 // CHECK15-NEXT: ret void 4939 // 4940 // 4941 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4942 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4943 // CHECK15-NEXT: entry: 4944 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4945 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4946 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4947 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4948 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4949 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4950 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4951 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 4952 // CHECK15-NEXT: ret void 4953 // 4954 // 4955 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4956 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4957 // CHECK15-NEXT: entry: 4958 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4959 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4960 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4961 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4962 // CHECK15-NEXT: ret void 4963 // 4964 // 4965 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4966 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4967 // CHECK15-NEXT: entry: 4968 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4969 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4970 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4971 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4972 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4973 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4974 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 4975 // CHECK15-NEXT: ret void 4976 // 4977 // 4978 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4979 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4980 // CHECK15-NEXT: entry: 4981 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4982 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4983 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4984 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4985 // CHECK15-NEXT: ret void 4986 // 4987 // 4988 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4989 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4990 // CHECK15-NEXT: entry: 4991 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4992 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4993 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4994 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4995 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 4996 // CHECK15-NEXT: ret void 4997 // 4998 // 4999 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5000 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5001 // CHECK15-NEXT: entry: 5002 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5003 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5004 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5005 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5006 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5007 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5008 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5009 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5010 // CHECK15-NEXT: ret void 5011 // 5012 // 5013 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5014 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5015 // CHECK15-NEXT: entry: 5016 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5017 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5018 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5019 // CHECK15-NEXT: ret void 5020 // 5021 // 5022 // CHECK16-LABEL: define {{[^@]+}}@main 5023 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 5024 // CHECK16-NEXT: entry: 5025 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5026 // CHECK16-NEXT: [[G:%.*]] = alloca double, align 8 5027 // CHECK16-NEXT: [[G1:%.*]] = alloca double*, align 4 5028 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5029 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5030 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5031 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5032 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 5033 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 5034 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5035 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5036 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5037 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5038 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 5039 // CHECK16-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 5040 // CHECK16-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 5041 // CHECK16-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 5042 // CHECK16-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 5043 // CHECK16-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 5044 // CHECK16-NEXT: [[SVAR:%.*]] = alloca i32, align 4 5045 // CHECK16-NEXT: [[I13:%.*]] = alloca i32, align 4 5046 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 5047 // CHECK16-NEXT: store double* [[G]], double** [[G1]], align 4 5048 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 5049 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 5050 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5051 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 5052 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5053 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 5054 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 5055 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 5056 // CHECK16-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 5057 // CHECK16-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5058 // CHECK16-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 5059 // CHECK16-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5060 // CHECK16-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5061 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5062 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 5063 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5064 // CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5065 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 5066 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 5067 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 5068 // CHECK16: arrayctor.loop: 5069 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 5070 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 5071 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 5072 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 5073 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 5074 // CHECK16: arrayctor.cont: 5075 // CHECK16-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 5076 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 5077 // CHECK16-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 5078 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5079 // CHECK16: omp.inner.for.cond: 5080 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 5081 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 5082 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5083 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 5084 // CHECK16: omp.inner.for.cond.cleanup: 5085 // CHECK16-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 5086 // CHECK16: omp.inner.for.body: 5087 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 5088 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5089 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5090 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 5091 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !3 5092 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 5093 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP10]] 5094 // CHECK16-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 5095 // CHECK16-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !3 5096 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 5097 // CHECK16-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP12]] 5098 // CHECK16-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX7]] to i8* 5099 // CHECK16-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 5100 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !3 5101 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5102 // CHECK16: omp.body.continue: 5103 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5104 // CHECK16: omp.inner.for.inc: 5105 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 5106 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 5107 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 5108 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 5109 // CHECK16: omp.inner.for.end: 5110 // CHECK16-NEXT: store i32 2, i32* [[I]], align 4 5111 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4 5112 // CHECK16-NEXT: store i32 [[TMP16]], i32* [[T_VAR]], align 4 5113 // CHECK16-NEXT: [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5114 // CHECK16-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 5115 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 8, i1 false) 5116 // CHECK16-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5117 // CHECK16-NEXT: [[TMP19:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 5118 // CHECK16-NEXT: [[TMP20:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i32 2 5119 // CHECK16-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN9]], [[TMP20]] 5120 // CHECK16-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 5121 // CHECK16: omp.arraycpy.body: 5122 // CHECK16-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 5123 // CHECK16-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN9]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 5124 // CHECK16-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 5125 // CHECK16-NEXT: [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 5126 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i32 4, i1 false) 5127 // CHECK16-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 5128 // CHECK16-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 5129 // CHECK16-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]] 5130 // CHECK16-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]] 5131 // CHECK16: omp.arraycpy.done10: 5132 // CHECK16-NEXT: [[TMP23:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 5133 // CHECK16-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[TMP5]] to i8* 5134 // CHECK16-NEXT: [[TMP25:%.*]] = bitcast %struct.S* [[TMP23]] to i8* 5135 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 4, i1 false) 5136 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR]], align 4 5137 // CHECK16-NEXT: store i32 [[TMP26]], i32* @_ZZ4mainE4svar, align 4 5138 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 5139 // CHECK16-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 5140 // CHECK16-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 5141 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5142 // CHECK16: arraydestroy.body: 5143 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP27]], [[OMP_ARRAYCPY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5144 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5145 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5146 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 5147 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 5148 // CHECK16: arraydestroy.done12: 5149 // CHECK16-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 5150 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5151 // CHECK16-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5152 // CHECK16-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i32 2 5153 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]] 5154 // CHECK16: arraydestroy.body15: 5155 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi %struct.S* [ [[TMP28]], [[ARRAYDESTROY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ] 5156 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST16]], i32 -1 5157 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR4]] 5158 // CHECK16-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]] 5159 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]] 5160 // CHECK16: arraydestroy.done19: 5161 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5162 // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4 5163 // CHECK16-NEXT: ret i32 [[TMP29]] 5164 // 5165 // 5166 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5167 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5168 // CHECK16-NEXT: entry: 5169 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5170 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5171 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5172 // CHECK16-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 5173 // CHECK16-NEXT: ret void 5174 // 5175 // 5176 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5177 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5178 // CHECK16-NEXT: entry: 5179 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5180 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5181 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5182 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5183 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5184 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5185 // CHECK16-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 5186 // CHECK16-NEXT: ret void 5187 // 5188 // 5189 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 5190 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5191 // CHECK16-NEXT: entry: 5192 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5193 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5194 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5195 // CHECK16-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5196 // CHECK16-NEXT: ret void 5197 // 5198 // 5199 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5200 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat { 5201 // CHECK16-NEXT: entry: 5202 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5203 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5204 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5205 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5206 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 5207 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 5208 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 5209 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5210 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5211 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5212 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5213 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 5214 // CHECK16-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 5215 // CHECK16-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 5216 // CHECK16-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 5217 // CHECK16-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 5218 // CHECK16-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 5219 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 5220 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 5221 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5222 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 5223 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5224 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 5225 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 5226 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 5227 // CHECK16-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 5228 // CHECK16-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 5229 // CHECK16-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 5230 // CHECK16-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 5231 // CHECK16-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 5232 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5233 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 5234 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5235 // CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5236 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 5237 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 5238 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 5239 // CHECK16: arrayctor.loop: 5240 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 5241 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 5242 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 5243 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 5244 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 5245 // CHECK16: arrayctor.cont: 5246 // CHECK16-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 5247 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 5248 // CHECK16-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 5249 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5250 // CHECK16: omp.inner.for.cond: 5251 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 5252 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 5253 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5254 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 5255 // CHECK16: omp.inner.for.cond.cleanup: 5256 // CHECK16-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 5257 // CHECK16: omp.inner.for.body: 5258 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 5259 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5260 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5261 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 5262 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !7 5263 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 5264 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP10]] 5265 // CHECK16-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 5266 // CHECK16-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !7 5267 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 5268 // CHECK16-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP12]] 5269 // CHECK16-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8* 5270 // CHECK16-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 5271 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !7 5272 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5273 // CHECK16: omp.body.continue: 5274 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5275 // CHECK16: omp.inner.for.inc: 5276 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 5277 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 5278 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 5279 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 5280 // CHECK16: omp.inner.for.end: 5281 // CHECK16-NEXT: store i32 2, i32* [[I]], align 4 5282 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4 5283 // CHECK16-NEXT: store i32 [[TMP16]], i32* [[T_VAR]], align 4 5284 // CHECK16-NEXT: [[TMP17:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5285 // CHECK16-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 5286 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP17]], i8* align 4 [[TMP18]], i32 8, i1 false) 5287 // CHECK16-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5288 // CHECK16-NEXT: [[TMP19:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 5289 // CHECK16-NEXT: [[TMP20:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2 5290 // CHECK16-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN9]], [[TMP20]] 5291 // CHECK16-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 5292 // CHECK16: omp.arraycpy.body: 5293 // CHECK16-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 5294 // CHECK16-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN9]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 5295 // CHECK16-NEXT: [[TMP21:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 5296 // CHECK16-NEXT: [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 5297 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i32 4, i1 false) 5298 // CHECK16-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 5299 // CHECK16-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 5300 // CHECK16-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP20]] 5301 // CHECK16-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]] 5302 // CHECK16: omp.arraycpy.done10: 5303 // CHECK16-NEXT: [[TMP23:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 5304 // CHECK16-NEXT: [[TMP24:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8* 5305 // CHECK16-NEXT: [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8* 5306 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 4, i1 false) 5307 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 5308 // CHECK16-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 5309 // CHECK16-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2 5310 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5311 // CHECK16: arraydestroy.body: 5312 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[OMP_ARRAYCPY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5313 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5314 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5315 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 5316 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 5317 // CHECK16: arraydestroy.done12: 5318 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 5319 // CHECK16-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5320 // CHECK16-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i32 2 5321 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY14:%.*]] 5322 // CHECK16: arraydestroy.body14: 5323 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST15:%.*]] = phi %struct.S.0* [ [[TMP27]], [[ARRAYDESTROY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT16:%.*]], [[ARRAYDESTROY_BODY14]] ] 5324 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT16]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST15]], i32 -1 5325 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT16]]) #[[ATTR4]] 5326 // CHECK16-NEXT: [[ARRAYDESTROY_DONE17:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT16]], [[ARRAY_BEGIN13]] 5327 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE17]], label [[ARRAYDESTROY_DONE18:%.*]], label [[ARRAYDESTROY_BODY14]] 5328 // CHECK16: arraydestroy.done18: 5329 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5330 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4 5331 // CHECK16-NEXT: ret i32 [[TMP28]] 5332 // 5333 // 5334 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 5335 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5336 // CHECK16-NEXT: entry: 5337 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5338 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5339 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5340 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5341 // CHECK16-NEXT: store float 0.000000e+00, float* [[F]], align 4 5342 // CHECK16-NEXT: ret void 5343 // 5344 // 5345 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 5346 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5347 // CHECK16-NEXT: entry: 5348 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5349 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5350 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5351 // CHECK16-NEXT: ret void 5352 // 5353 // 5354 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 5355 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5356 // CHECK16-NEXT: entry: 5357 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5358 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5359 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5360 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5361 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5362 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5363 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5364 // CHECK16-NEXT: store float [[TMP0]], float* [[F]], align 4 5365 // CHECK16-NEXT: ret void 5366 // 5367 // 5368 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 5369 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5370 // CHECK16-NEXT: entry: 5371 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5372 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5373 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5374 // CHECK16-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 5375 // CHECK16-NEXT: ret void 5376 // 5377 // 5378 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 5379 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5380 // CHECK16-NEXT: entry: 5381 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5382 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5383 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5384 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5385 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5386 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5387 // CHECK16-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 5388 // CHECK16-NEXT: ret void 5389 // 5390 // 5391 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5392 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5393 // CHECK16-NEXT: entry: 5394 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5395 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5396 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5397 // CHECK16-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5398 // CHECK16-NEXT: ret void 5399 // 5400 // 5401 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5402 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5403 // CHECK16-NEXT: entry: 5404 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5405 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5406 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5407 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5408 // CHECK16-NEXT: store i32 0, i32* [[F]], align 4 5409 // CHECK16-NEXT: ret void 5410 // 5411 // 5412 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5413 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5414 // CHECK16-NEXT: entry: 5415 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5416 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5417 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5418 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5419 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5420 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5421 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5422 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5423 // CHECK16-NEXT: ret void 5424 // 5425 // 5426 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5427 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5428 // CHECK16-NEXT: entry: 5429 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5430 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5431 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5432 // CHECK16-NEXT: ret void 5433 // 5434