1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
8 
9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 
16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
19 
20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23 
24 // expected-no-diagnostics
25 #ifndef HEADER
26 #define HEADER
27 
28 template <typename T>
29 T tmain() {
30   T t_var = T();
31   T vec[] = {1, 2};
32 #pragma omp target teams distribute reduction(+: t_var)
33   for (int i = 0; i < 2; ++i) {
34     t_var += (T) i;
35   }
36   return T();
37 }
38 
39 int main() {
40   static int sivar;
41 #ifdef LAMBDA
42 
43   [&]() {
44 #pragma omp target teams distribute reduction(+: sivar)
45   for (int i = 0; i < 2; ++i) {
46 
47     // Skip global and bound tid vars
48 
49     sivar += i;
50 
51     [&]() {
52 
53       sivar += 4;
54 
55     }();
56   }
57   }();
58   return 0;
59 #else
60 #pragma omp target teams distribute reduction(+: sivar)
61   for (int i = 0; i < 2; ++i) {
62     sivar += i;
63   }
64   return tmain<int>();
65 #endif
66 }
67 
68 
69 
70 
71 // Skip global and bound tid vars
72 
73 
74 
75 
76 
77 // Skip global and bound tid vars
78 
79 
80 #endif
81 // CHECK1-LABEL: define {{[^@]+}}@main
82 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
83 // CHECK1-NEXT:  entry:
84 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
85 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
86 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
87 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
88 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
89 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
90 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
91 // CHECK1-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32**
92 // CHECK1-NEXT:    store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 8
93 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
94 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
95 // CHECK1-NEXT:    store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 8
96 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
97 // CHECK1-NEXT:    store i8* null, i8** [[TMP4]], align 8
98 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
99 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
100 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
101 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
102 // CHECK1-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
103 // CHECK1-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
104 // CHECK1:       omp_offload.failed:
105 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]]
106 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
107 // CHECK1:       omp_offload.cont:
108 // CHECK1-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
109 // CHECK1-NEXT:    ret i32 [[CALL]]
110 //
111 //
112 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60
113 // CHECK1-SAME: (i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
114 // CHECK1-NEXT:  entry:
115 // CHECK1-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
116 // CHECK1-NEXT:    [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
117 // CHECK1-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
118 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
119 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0
120 // CHECK1-NEXT:    store i32* [[TMP0]], i32** [[TMP1]], align 8
121 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]])
122 // CHECK1-NEXT:    ret void
123 //
124 //
125 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
126 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] {
127 // CHECK1-NEXT:  entry:
128 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
129 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
130 // CHECK1-NEXT:    [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8
131 // CHECK1-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
132 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
133 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
134 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
135 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
136 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
137 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
138 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
139 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
140 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
141 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
142 // CHECK1-NEXT:    store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8
143 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8
144 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0
145 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8
146 // CHECK1-NEXT:    store i32 0, i32* [[SIVAR]], align 4
147 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
148 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
149 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
150 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
151 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
152 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
153 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
154 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
155 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
156 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
157 // CHECK1:       cond.true:
158 // CHECK1-NEXT:    br label [[COND_END:%.*]]
159 // CHECK1:       cond.false:
160 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
161 // CHECK1-NEXT:    br label [[COND_END]]
162 // CHECK1:       cond.end:
163 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
164 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
165 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
166 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
167 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
168 // CHECK1:       omp.inner.for.cond:
169 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
170 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
171 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
172 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
173 // CHECK1:       omp.inner.for.body:
174 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
175 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
176 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
177 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
178 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
179 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[SIVAR]], align 4
180 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
181 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[SIVAR]], align 4
182 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
183 // CHECK1:       omp.body.continue:
184 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
185 // CHECK1:       omp.inner.for.inc:
186 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
187 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1
188 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
189 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
190 // CHECK1:       omp.inner.for.end:
191 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
192 // CHECK1:       omp.loop.exit:
193 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
194 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
195 // CHECK1-NEXT:    [[TMP15:%.*]] = bitcast i32* [[SIVAR]] to i8*
196 // CHECK1-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 8
197 // CHECK1-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
198 // CHECK1-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
199 // CHECK1-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
200 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
201 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
202 // CHECK1-NEXT:    ]
203 // CHECK1:       .omp.reduction.case1:
204 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP2]], align 4
205 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[SIVAR]], align 4
206 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
207 // CHECK1-NEXT:    store i32 [[ADD4]], i32* [[TMP2]], align 4
208 // CHECK1-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
209 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
210 // CHECK1:       .omp.reduction.case2:
211 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR]], align 4
212 // CHECK1-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP20]] monotonic, align 4
213 // CHECK1-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
214 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
215 // CHECK1:       .omp.reduction.default:
216 // CHECK1-NEXT:    ret void
217 //
218 //
219 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
220 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
221 // CHECK1-NEXT:  entry:
222 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
223 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
224 // CHECK1-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
225 // CHECK1-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
226 // CHECK1-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
227 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
228 // CHECK1-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
229 // CHECK1-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
230 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
231 // CHECK1-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
232 // CHECK1-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
233 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
234 // CHECK1-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
235 // CHECK1-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
236 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
237 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
238 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
239 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
240 // CHECK1-NEXT:    ret void
241 //
242 //
243 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
244 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat {
245 // CHECK1-NEXT:  entry:
246 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
247 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
248 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
249 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
250 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
251 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
252 // CHECK1-NEXT:    store i32 0, i32* [[T_VAR]], align 4
253 // CHECK1-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
254 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
255 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
256 // CHECK1-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32**
257 // CHECK1-NEXT:    store i32* [[T_VAR]], i32** [[TMP2]], align 8
258 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
259 // CHECK1-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32**
260 // CHECK1-NEXT:    store i32* [[T_VAR]], i32** [[TMP4]], align 8
261 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
262 // CHECK1-NEXT:    store i8* null, i8** [[TMP5]], align 8
263 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
264 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
265 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
266 // CHECK1-NEXT:    [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
267 // CHECK1-NEXT:    [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
268 // CHECK1-NEXT:    br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
269 // CHECK1:       omp_offload.failed:
270 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]]
271 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
272 // CHECK1:       omp_offload.cont:
273 // CHECK1-NEXT:    ret i32 0
274 //
275 //
276 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
277 // CHECK1-SAME: (i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
278 // CHECK1-NEXT:  entry:
279 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
280 // CHECK1-NEXT:    [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8
281 // CHECK1-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
282 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
283 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0
284 // CHECK1-NEXT:    store i32* [[TMP0]], i32** [[TMP1]], align 8
285 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]])
286 // CHECK1-NEXT:    ret void
287 //
288 //
289 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
290 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] {
291 // CHECK1-NEXT:  entry:
292 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
293 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
294 // CHECK1-NEXT:    [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8
295 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
296 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
297 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
298 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
299 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
300 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
301 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
302 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
303 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
304 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
305 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
306 // CHECK1-NEXT:    store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8
307 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8
308 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0
309 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8
310 // CHECK1-NEXT:    store i32 0, i32* [[T_VAR]], align 4
311 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
312 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
313 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
314 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
315 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
316 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
317 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
318 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
319 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
320 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
321 // CHECK1:       cond.true:
322 // CHECK1-NEXT:    br label [[COND_END:%.*]]
323 // CHECK1:       cond.false:
324 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
325 // CHECK1-NEXT:    br label [[COND_END]]
326 // CHECK1:       cond.end:
327 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
328 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
329 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
330 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
331 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
332 // CHECK1:       omp.inner.for.cond:
333 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
334 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
335 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
336 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
337 // CHECK1:       omp.inner.for.body:
338 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
339 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
340 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
341 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
342 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
343 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[T_VAR]], align 4
344 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
345 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[T_VAR]], align 4
346 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
347 // CHECK1:       omp.body.continue:
348 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
349 // CHECK1:       omp.inner.for.inc:
350 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
351 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1
352 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
353 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
354 // CHECK1:       omp.inner.for.end:
355 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
356 // CHECK1:       omp.loop.exit:
357 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
358 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
359 // CHECK1-NEXT:    [[TMP15:%.*]] = bitcast i32* [[T_VAR]] to i8*
360 // CHECK1-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 8
361 // CHECK1-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
362 // CHECK1-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
363 // CHECK1-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
364 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
365 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
366 // CHECK1-NEXT:    ]
367 // CHECK1:       .omp.reduction.case1:
368 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP2]], align 4
369 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[T_VAR]], align 4
370 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
371 // CHECK1-NEXT:    store i32 [[ADD4]], i32* [[TMP2]], align 4
372 // CHECK1-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
373 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
374 // CHECK1:       .omp.reduction.case2:
375 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[T_VAR]], align 4
376 // CHECK1-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP20]] monotonic, align 4
377 // CHECK1-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
378 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
379 // CHECK1:       .omp.reduction.default:
380 // CHECK1-NEXT:    ret void
381 //
382 //
383 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
384 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
385 // CHECK1-NEXT:  entry:
386 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
387 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
388 // CHECK1-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
389 // CHECK1-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
390 // CHECK1-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
391 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
392 // CHECK1-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
393 // CHECK1-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
394 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
395 // CHECK1-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
396 // CHECK1-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
397 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
398 // CHECK1-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
399 // CHECK1-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
400 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
401 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
402 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
403 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
404 // CHECK1-NEXT:    ret void
405 //
406 //
407 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
408 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] {
409 // CHECK1-NEXT:  entry:
410 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
411 // CHECK1-NEXT:    ret void
412 //
413 //
414 // CHECK2-LABEL: define {{[^@]+}}@main
415 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
416 // CHECK2-NEXT:  entry:
417 // CHECK2-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
418 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
419 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
420 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
421 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
422 // CHECK2-NEXT:    store i32 0, i32* [[RETVAL]], align 4
423 // CHECK2-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
424 // CHECK2-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32**
425 // CHECK2-NEXT:    store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 8
426 // CHECK2-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
427 // CHECK2-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
428 // CHECK2-NEXT:    store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 8
429 // CHECK2-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
430 // CHECK2-NEXT:    store i8* null, i8** [[TMP4]], align 8
431 // CHECK2-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
432 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
433 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
434 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
435 // CHECK2-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
436 // CHECK2-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
437 // CHECK2:       omp_offload.failed:
438 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]]
439 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
440 // CHECK2:       omp_offload.cont:
441 // CHECK2-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
442 // CHECK2-NEXT:    ret i32 [[CALL]]
443 //
444 //
445 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60
446 // CHECK2-SAME: (i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
447 // CHECK2-NEXT:  entry:
448 // CHECK2-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
449 // CHECK2-NEXT:    [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
450 // CHECK2-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
451 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
452 // CHECK2-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0
453 // CHECK2-NEXT:    store i32* [[TMP0]], i32** [[TMP1]], align 8
454 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]])
455 // CHECK2-NEXT:    ret void
456 //
457 //
458 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
459 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] {
460 // CHECK2-NEXT:  entry:
461 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
462 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
463 // CHECK2-NEXT:    [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8
464 // CHECK2-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
465 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
466 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
467 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
468 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
469 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
470 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
471 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
472 // CHECK2-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
473 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
474 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
475 // CHECK2-NEXT:    store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8
476 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8
477 // CHECK2-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0
478 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8
479 // CHECK2-NEXT:    store i32 0, i32* [[SIVAR]], align 4
480 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
481 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
482 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
483 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
484 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
485 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
486 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
487 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
488 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
489 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
490 // CHECK2:       cond.true:
491 // CHECK2-NEXT:    br label [[COND_END:%.*]]
492 // CHECK2:       cond.false:
493 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
494 // CHECK2-NEXT:    br label [[COND_END]]
495 // CHECK2:       cond.end:
496 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
497 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
498 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
499 // CHECK2-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
500 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
501 // CHECK2:       omp.inner.for.cond:
502 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
503 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
504 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
505 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
506 // CHECK2:       omp.inner.for.body:
507 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
508 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
509 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
510 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
511 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
512 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[SIVAR]], align 4
513 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
514 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[SIVAR]], align 4
515 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
516 // CHECK2:       omp.body.continue:
517 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
518 // CHECK2:       omp.inner.for.inc:
519 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
520 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1
521 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
522 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
523 // CHECK2:       omp.inner.for.end:
524 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
525 // CHECK2:       omp.loop.exit:
526 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
527 // CHECK2-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
528 // CHECK2-NEXT:    [[TMP15:%.*]] = bitcast i32* [[SIVAR]] to i8*
529 // CHECK2-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 8
530 // CHECK2-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
531 // CHECK2-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
532 // CHECK2-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
533 // CHECK2-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
534 // CHECK2-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
535 // CHECK2-NEXT:    ]
536 // CHECK2:       .omp.reduction.case1:
537 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP2]], align 4
538 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32, i32* [[SIVAR]], align 4
539 // CHECK2-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
540 // CHECK2-NEXT:    store i32 [[ADD4]], i32* [[TMP2]], align 4
541 // CHECK2-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
542 // CHECK2-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
543 // CHECK2:       .omp.reduction.case2:
544 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR]], align 4
545 // CHECK2-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP20]] monotonic, align 4
546 // CHECK2-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
547 // CHECK2-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
548 // CHECK2:       .omp.reduction.default:
549 // CHECK2-NEXT:    ret void
550 //
551 //
552 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
553 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
554 // CHECK2-NEXT:  entry:
555 // CHECK2-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
556 // CHECK2-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
557 // CHECK2-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
558 // CHECK2-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
559 // CHECK2-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
560 // CHECK2-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
561 // CHECK2-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
562 // CHECK2-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
563 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
564 // CHECK2-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
565 // CHECK2-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
566 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
567 // CHECK2-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
568 // CHECK2-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
569 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
570 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
571 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
572 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
573 // CHECK2-NEXT:    ret void
574 //
575 //
576 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
577 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] comdat {
578 // CHECK2-NEXT:  entry:
579 // CHECK2-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
580 // CHECK2-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
581 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
582 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
583 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
584 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
585 // CHECK2-NEXT:    store i32 0, i32* [[T_VAR]], align 4
586 // CHECK2-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
587 // CHECK2-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
588 // CHECK2-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
589 // CHECK2-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32**
590 // CHECK2-NEXT:    store i32* [[T_VAR]], i32** [[TMP2]], align 8
591 // CHECK2-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
592 // CHECK2-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32**
593 // CHECK2-NEXT:    store i32* [[T_VAR]], i32** [[TMP4]], align 8
594 // CHECK2-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
595 // CHECK2-NEXT:    store i8* null, i8** [[TMP5]], align 8
596 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
597 // CHECK2-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
598 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
599 // CHECK2-NEXT:    [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
600 // CHECK2-NEXT:    [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
601 // CHECK2-NEXT:    br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
602 // CHECK2:       omp_offload.failed:
603 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]]
604 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
605 // CHECK2:       omp_offload.cont:
606 // CHECK2-NEXT:    ret i32 0
607 //
608 //
609 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
610 // CHECK2-SAME: (i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
611 // CHECK2-NEXT:  entry:
612 // CHECK2-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
613 // CHECK2-NEXT:    [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8
614 // CHECK2-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
615 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
616 // CHECK2-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0
617 // CHECK2-NEXT:    store i32* [[TMP0]], i32** [[TMP1]], align 8
618 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]])
619 // CHECK2-NEXT:    ret void
620 //
621 //
622 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
623 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] {
624 // CHECK2-NEXT:  entry:
625 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
626 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
627 // CHECK2-NEXT:    [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8
628 // CHECK2-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
629 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
630 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
631 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
632 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
633 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
634 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
635 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
636 // CHECK2-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
637 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
638 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
639 // CHECK2-NEXT:    store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8
640 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8
641 // CHECK2-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0
642 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8
643 // CHECK2-NEXT:    store i32 0, i32* [[T_VAR]], align 4
644 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
645 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
646 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
647 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
648 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
649 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
650 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
651 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
652 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
653 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
654 // CHECK2:       cond.true:
655 // CHECK2-NEXT:    br label [[COND_END:%.*]]
656 // CHECK2:       cond.false:
657 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
658 // CHECK2-NEXT:    br label [[COND_END]]
659 // CHECK2:       cond.end:
660 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
661 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
662 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
663 // CHECK2-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
664 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
665 // CHECK2:       omp.inner.for.cond:
666 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
667 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
668 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
669 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
670 // CHECK2:       omp.inner.for.body:
671 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
672 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
673 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
674 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
675 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
676 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[T_VAR]], align 4
677 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
678 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[T_VAR]], align 4
679 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
680 // CHECK2:       omp.body.continue:
681 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
682 // CHECK2:       omp.inner.for.inc:
683 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
684 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1
685 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
686 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
687 // CHECK2:       omp.inner.for.end:
688 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
689 // CHECK2:       omp.loop.exit:
690 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
691 // CHECK2-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
692 // CHECK2-NEXT:    [[TMP15:%.*]] = bitcast i32* [[T_VAR]] to i8*
693 // CHECK2-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 8
694 // CHECK2-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
695 // CHECK2-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
696 // CHECK2-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
697 // CHECK2-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
698 // CHECK2-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
699 // CHECK2-NEXT:    ]
700 // CHECK2:       .omp.reduction.case1:
701 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP2]], align 4
702 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32, i32* [[T_VAR]], align 4
703 // CHECK2-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
704 // CHECK2-NEXT:    store i32 [[ADD4]], i32* [[TMP2]], align 4
705 // CHECK2-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
706 // CHECK2-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
707 // CHECK2:       .omp.reduction.case2:
708 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[T_VAR]], align 4
709 // CHECK2-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP20]] monotonic, align 4
710 // CHECK2-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
711 // CHECK2-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
712 // CHECK2:       .omp.reduction.default:
713 // CHECK2-NEXT:    ret void
714 //
715 //
716 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
717 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
718 // CHECK2-NEXT:  entry:
719 // CHECK2-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
720 // CHECK2-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
721 // CHECK2-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
722 // CHECK2-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
723 // CHECK2-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
724 // CHECK2-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
725 // CHECK2-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
726 // CHECK2-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
727 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
728 // CHECK2-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
729 // CHECK2-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
730 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
731 // CHECK2-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
732 // CHECK2-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
733 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
734 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
735 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
736 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
737 // CHECK2-NEXT:    ret void
738 //
739 //
740 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
741 // CHECK2-SAME: () #[[ATTR7:[0-9]+]] {
742 // CHECK2-NEXT:  entry:
743 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
744 // CHECK2-NEXT:    ret void
745 //
746 //
747 // CHECK3-LABEL: define {{[^@]+}}@main
748 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
749 // CHECK3-NEXT:  entry:
750 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
751 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
752 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
753 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
754 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
755 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
756 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
757 // CHECK3-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32**
758 // CHECK3-NEXT:    store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 4
759 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
760 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
761 // CHECK3-NEXT:    store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 4
762 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
763 // CHECK3-NEXT:    store i8* null, i8** [[TMP4]], align 4
764 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
765 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
766 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
767 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
768 // CHECK3-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
769 // CHECK3-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
770 // CHECK3:       omp_offload.failed:
771 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]]
772 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
773 // CHECK3:       omp_offload.cont:
774 // CHECK3-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
775 // CHECK3-NEXT:    ret i32 [[CALL]]
776 //
777 //
778 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60
779 // CHECK3-SAME: (i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
780 // CHECK3-NEXT:  entry:
781 // CHECK3-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
782 // CHECK3-NEXT:    [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4
783 // CHECK3-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
784 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
785 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0
786 // CHECK3-NEXT:    store i32* [[TMP0]], i32** [[TMP1]], align 4
787 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]])
788 // CHECK3-NEXT:    ret void
789 //
790 //
791 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
792 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] {
793 // CHECK3-NEXT:  entry:
794 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
795 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
796 // CHECK3-NEXT:    [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4
797 // CHECK3-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
798 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
799 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
800 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
801 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
802 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
803 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
804 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
805 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
806 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
807 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
808 // CHECK3-NEXT:    store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4
809 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4
810 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0
811 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 4
812 // CHECK3-NEXT:    store i32 0, i32* [[SIVAR]], align 4
813 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
814 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
815 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
816 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
817 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
818 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
819 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
820 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
821 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
822 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
823 // CHECK3:       cond.true:
824 // CHECK3-NEXT:    br label [[COND_END:%.*]]
825 // CHECK3:       cond.false:
826 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
827 // CHECK3-NEXT:    br label [[COND_END]]
828 // CHECK3:       cond.end:
829 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
830 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
831 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
832 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
833 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
834 // CHECK3:       omp.inner.for.cond:
835 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
836 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
837 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
838 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
839 // CHECK3:       omp.inner.for.body:
840 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
841 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
842 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
843 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
844 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
845 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[SIVAR]], align 4
846 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
847 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[SIVAR]], align 4
848 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
849 // CHECK3:       omp.body.continue:
850 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
851 // CHECK3:       omp.inner.for.inc:
852 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
853 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1
854 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
855 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
856 // CHECK3:       omp.inner.for.end:
857 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
858 // CHECK3:       omp.loop.exit:
859 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
860 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
861 // CHECK3-NEXT:    [[TMP15:%.*]] = bitcast i32* [[SIVAR]] to i8*
862 // CHECK3-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 4
863 // CHECK3-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
864 // CHECK3-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
865 // CHECK3-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
866 // CHECK3-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
867 // CHECK3-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
868 // CHECK3-NEXT:    ]
869 // CHECK3:       .omp.reduction.case1:
870 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP2]], align 4
871 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[SIVAR]], align 4
872 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
873 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[TMP2]], align 4
874 // CHECK3-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
875 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
876 // CHECK3:       .omp.reduction.case2:
877 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR]], align 4
878 // CHECK3-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP20]] monotonic, align 4
879 // CHECK3-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
880 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
881 // CHECK3:       .omp.reduction.default:
882 // CHECK3-NEXT:    ret void
883 //
884 //
885 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
886 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
887 // CHECK3-NEXT:  entry:
888 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
889 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 4
890 // CHECK3-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
891 // CHECK3-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
892 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
893 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
894 // CHECK3-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
895 // CHECK3-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
896 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
897 // CHECK3-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
898 // CHECK3-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
899 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
900 // CHECK3-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
901 // CHECK3-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
902 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
903 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
904 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
905 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
906 // CHECK3-NEXT:    ret void
907 //
908 //
909 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
910 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat {
911 // CHECK3-NEXT:  entry:
912 // CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
913 // CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
914 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
915 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
916 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
917 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
918 // CHECK3-NEXT:    store i32 0, i32* [[T_VAR]], align 4
919 // CHECK3-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
920 // CHECK3-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
921 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
922 // CHECK3-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32**
923 // CHECK3-NEXT:    store i32* [[T_VAR]], i32** [[TMP2]], align 4
924 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
925 // CHECK3-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32**
926 // CHECK3-NEXT:    store i32* [[T_VAR]], i32** [[TMP4]], align 4
927 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
928 // CHECK3-NEXT:    store i8* null, i8** [[TMP5]], align 4
929 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
930 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
931 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
932 // CHECK3-NEXT:    [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
933 // CHECK3-NEXT:    [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
934 // CHECK3-NEXT:    br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
935 // CHECK3:       omp_offload.failed:
936 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]]
937 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
938 // CHECK3:       omp_offload.cont:
939 // CHECK3-NEXT:    ret i32 0
940 //
941 //
942 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
943 // CHECK3-SAME: (i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
944 // CHECK3-NEXT:  entry:
945 // CHECK3-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
946 // CHECK3-NEXT:    [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4
947 // CHECK3-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
948 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
949 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0
950 // CHECK3-NEXT:    store i32* [[TMP0]], i32** [[TMP1]], align 4
951 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]])
952 // CHECK3-NEXT:    ret void
953 //
954 //
955 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
956 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] {
957 // CHECK3-NEXT:  entry:
958 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
959 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
960 // CHECK3-NEXT:    [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 4
961 // CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
962 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
963 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
964 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
965 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
966 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
967 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
968 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
969 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
970 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
971 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
972 // CHECK3-NEXT:    store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 4
973 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 4
974 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0
975 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 4
976 // CHECK3-NEXT:    store i32 0, i32* [[T_VAR]], align 4
977 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
978 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
979 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
980 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
981 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
982 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
983 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
984 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
985 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
986 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
987 // CHECK3:       cond.true:
988 // CHECK3-NEXT:    br label [[COND_END:%.*]]
989 // CHECK3:       cond.false:
990 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
991 // CHECK3-NEXT:    br label [[COND_END]]
992 // CHECK3:       cond.end:
993 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
994 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
995 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
996 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
997 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
998 // CHECK3:       omp.inner.for.cond:
999 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1000 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1001 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1002 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1003 // CHECK3:       omp.inner.for.body:
1004 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1005 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1006 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1007 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1008 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1009 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[T_VAR]], align 4
1010 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1011 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[T_VAR]], align 4
1012 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1013 // CHECK3:       omp.body.continue:
1014 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1015 // CHECK3:       omp.inner.for.inc:
1016 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1017 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1
1018 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1019 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1020 // CHECK3:       omp.inner.for.end:
1021 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1022 // CHECK3:       omp.loop.exit:
1023 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1024 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1025 // CHECK3-NEXT:    [[TMP15:%.*]] = bitcast i32* [[T_VAR]] to i8*
1026 // CHECK3-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 4
1027 // CHECK3-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1028 // CHECK3-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
1029 // CHECK3-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1030 // CHECK3-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1031 // CHECK3-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1032 // CHECK3-NEXT:    ]
1033 // CHECK3:       .omp.reduction.case1:
1034 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP2]], align 4
1035 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[T_VAR]], align 4
1036 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1037 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[TMP2]], align 4
1038 // CHECK3-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1039 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1040 // CHECK3:       .omp.reduction.case2:
1041 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[T_VAR]], align 4
1042 // CHECK3-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP20]] monotonic, align 4
1043 // CHECK3-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1044 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1045 // CHECK3:       .omp.reduction.default:
1046 // CHECK3-NEXT:    ret void
1047 //
1048 //
1049 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
1050 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
1051 // CHECK3-NEXT:  entry:
1052 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
1053 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 4
1054 // CHECK3-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1055 // CHECK3-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1056 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1057 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1058 // CHECK3-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1059 // CHECK3-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1060 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1061 // CHECK3-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1062 // CHECK3-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1063 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1064 // CHECK3-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1065 // CHECK3-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1066 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1067 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1068 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1069 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
1070 // CHECK3-NEXT:    ret void
1071 //
1072 //
1073 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1074 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] {
1075 // CHECK3-NEXT:  entry:
1076 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
1077 // CHECK3-NEXT:    ret void
1078 //
1079 //
1080 // CHECK4-LABEL: define {{[^@]+}}@main
1081 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
1082 // CHECK4-NEXT:  entry:
1083 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1084 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1085 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1086 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1087 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1088 // CHECK4-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1089 // CHECK4-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1090 // CHECK4-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32**
1091 // CHECK4-NEXT:    store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 4
1092 // CHECK4-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1093 // CHECK4-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
1094 // CHECK4-NEXT:    store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 4
1095 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1096 // CHECK4-NEXT:    store i8* null, i8** [[TMP4]], align 4
1097 // CHECK4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1098 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1099 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
1100 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1101 // CHECK4-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
1102 // CHECK4-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1103 // CHECK4:       omp_offload.failed:
1104 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]]
1105 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1106 // CHECK4:       omp_offload.cont:
1107 // CHECK4-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
1108 // CHECK4-NEXT:    ret i32 [[CALL]]
1109 //
1110 //
1111 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60
1112 // CHECK4-SAME: (i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
1113 // CHECK4-NEXT:  entry:
1114 // CHECK4-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
1115 // CHECK4-NEXT:    [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4
1116 // CHECK4-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
1117 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
1118 // CHECK4-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0
1119 // CHECK4-NEXT:    store i32* [[TMP0]], i32** [[TMP1]], align 4
1120 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]])
1121 // CHECK4-NEXT:    ret void
1122 //
1123 //
1124 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1125 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] {
1126 // CHECK4-NEXT:  entry:
1127 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1128 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1129 // CHECK4-NEXT:    [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4
1130 // CHECK4-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
1131 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1132 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1133 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1134 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1135 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1136 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1137 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
1138 // CHECK4-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1139 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1140 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1141 // CHECK4-NEXT:    store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4
1142 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4
1143 // CHECK4-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0
1144 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 4
1145 // CHECK4-NEXT:    store i32 0, i32* [[SIVAR]], align 4
1146 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1147 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1148 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1149 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1150 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1151 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1152 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1153 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1154 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1155 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1156 // CHECK4:       cond.true:
1157 // CHECK4-NEXT:    br label [[COND_END:%.*]]
1158 // CHECK4:       cond.false:
1159 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1160 // CHECK4-NEXT:    br label [[COND_END]]
1161 // CHECK4:       cond.end:
1162 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1163 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1164 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1165 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1166 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1167 // CHECK4:       omp.inner.for.cond:
1168 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1169 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1170 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1171 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1172 // CHECK4:       omp.inner.for.body:
1173 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1174 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1175 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1176 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1177 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1178 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[SIVAR]], align 4
1179 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1180 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[SIVAR]], align 4
1181 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1182 // CHECK4:       omp.body.continue:
1183 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1184 // CHECK4:       omp.inner.for.inc:
1185 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1186 // CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1
1187 // CHECK4-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1188 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
1189 // CHECK4:       omp.inner.for.end:
1190 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1191 // CHECK4:       omp.loop.exit:
1192 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1193 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1194 // CHECK4-NEXT:    [[TMP15:%.*]] = bitcast i32* [[SIVAR]] to i8*
1195 // CHECK4-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 4
1196 // CHECK4-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1197 // CHECK4-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1198 // CHECK4-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1199 // CHECK4-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1200 // CHECK4-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1201 // CHECK4-NEXT:    ]
1202 // CHECK4:       .omp.reduction.case1:
1203 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP2]], align 4
1204 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, i32* [[SIVAR]], align 4
1205 // CHECK4-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1206 // CHECK4-NEXT:    store i32 [[ADD4]], i32* [[TMP2]], align 4
1207 // CHECK4-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1208 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1209 // CHECK4:       .omp.reduction.case2:
1210 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR]], align 4
1211 // CHECK4-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP20]] monotonic, align 4
1212 // CHECK4-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1213 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1214 // CHECK4:       .omp.reduction.default:
1215 // CHECK4-NEXT:    ret void
1216 //
1217 //
1218 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1219 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
1220 // CHECK4-NEXT:  entry:
1221 // CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
1222 // CHECK4-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 4
1223 // CHECK4-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1224 // CHECK4-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1225 // CHECK4-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1226 // CHECK4-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1227 // CHECK4-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1228 // CHECK4-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1229 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1230 // CHECK4-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1231 // CHECK4-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1232 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1233 // CHECK4-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1234 // CHECK4-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1235 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1236 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1237 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1238 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
1239 // CHECK4-NEXT:    ret void
1240 //
1241 //
1242 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1243 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] comdat {
1244 // CHECK4-NEXT:  entry:
1245 // CHECK4-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1246 // CHECK4-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1247 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1248 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1249 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1250 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1251 // CHECK4-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1252 // CHECK4-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1253 // CHECK4-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
1254 // CHECK4-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1255 // CHECK4-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32**
1256 // CHECK4-NEXT:    store i32* [[T_VAR]], i32** [[TMP2]], align 4
1257 // CHECK4-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1258 // CHECK4-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32**
1259 // CHECK4-NEXT:    store i32* [[T_VAR]], i32** [[TMP4]], align 4
1260 // CHECK4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1261 // CHECK4-NEXT:    store i8* null, i8** [[TMP5]], align 4
1262 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1263 // CHECK4-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1264 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
1265 // CHECK4-NEXT:    [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1266 // CHECK4-NEXT:    [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0
1267 // CHECK4-NEXT:    br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1268 // CHECK4:       omp_offload.failed:
1269 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]]
1270 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1271 // CHECK4:       omp_offload.cont:
1272 // CHECK4-NEXT:    ret i32 0
1273 //
1274 //
1275 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
1276 // CHECK4-SAME: (i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1277 // CHECK4-NEXT:  entry:
1278 // CHECK4-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1279 // CHECK4-NEXT:    [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4
1280 // CHECK4-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1281 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1282 // CHECK4-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0
1283 // CHECK4-NEXT:    store i32* [[TMP0]], i32** [[TMP1]], align 4
1284 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]])
1285 // CHECK4-NEXT:    ret void
1286 //
1287 //
1288 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
1289 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] {
1290 // CHECK4-NEXT:  entry:
1291 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1292 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1293 // CHECK4-NEXT:    [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 4
1294 // CHECK4-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1295 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1296 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1297 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1298 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1299 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1300 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1301 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
1302 // CHECK4-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1303 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1304 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1305 // CHECK4-NEXT:    store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 4
1306 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 4
1307 // CHECK4-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0
1308 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 4
1309 // CHECK4-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1310 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1311 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1312 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1313 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1314 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1315 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1316 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1317 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1318 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1319 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1320 // CHECK4:       cond.true:
1321 // CHECK4-NEXT:    br label [[COND_END:%.*]]
1322 // CHECK4:       cond.false:
1323 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1324 // CHECK4-NEXT:    br label [[COND_END]]
1325 // CHECK4:       cond.end:
1326 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1327 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1328 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1329 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1330 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1331 // CHECK4:       omp.inner.for.cond:
1332 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1333 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1334 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1335 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1336 // CHECK4:       omp.inner.for.body:
1337 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1338 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1339 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1340 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1341 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1342 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[T_VAR]], align 4
1343 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1344 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[T_VAR]], align 4
1345 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1346 // CHECK4:       omp.body.continue:
1347 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1348 // CHECK4:       omp.inner.for.inc:
1349 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1350 // CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1
1351 // CHECK4-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1352 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
1353 // CHECK4:       omp.inner.for.end:
1354 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1355 // CHECK4:       omp.loop.exit:
1356 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1357 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1358 // CHECK4-NEXT:    [[TMP15:%.*]] = bitcast i32* [[T_VAR]] to i8*
1359 // CHECK4-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 4
1360 // CHECK4-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1361 // CHECK4-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
1362 // CHECK4-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1363 // CHECK4-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1364 // CHECK4-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1365 // CHECK4-NEXT:    ]
1366 // CHECK4:       .omp.reduction.case1:
1367 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP2]], align 4
1368 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, i32* [[T_VAR]], align 4
1369 // CHECK4-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1370 // CHECK4-NEXT:    store i32 [[ADD4]], i32* [[TMP2]], align 4
1371 // CHECK4-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1372 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1373 // CHECK4:       .omp.reduction.case2:
1374 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, i32* [[T_VAR]], align 4
1375 // CHECK4-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP20]] monotonic, align 4
1376 // CHECK4-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1377 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1378 // CHECK4:       .omp.reduction.default:
1379 // CHECK4-NEXT:    ret void
1380 //
1381 //
1382 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
1383 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
1384 // CHECK4-NEXT:  entry:
1385 // CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
1386 // CHECK4-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 4
1387 // CHECK4-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1388 // CHECK4-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1389 // CHECK4-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1390 // CHECK4-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1391 // CHECK4-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1392 // CHECK4-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1393 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1394 // CHECK4-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1395 // CHECK4-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1396 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1397 // CHECK4-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1398 // CHECK4-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1399 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1400 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1401 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1402 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
1403 // CHECK4-NEXT:    ret void
1404 //
1405 //
1406 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1407 // CHECK4-SAME: () #[[ATTR7:[0-9]+]] {
1408 // CHECK4-NEXT:  entry:
1409 // CHECK4-NEXT:    call void @__tgt_register_requires(i64 1)
1410 // CHECK4-NEXT:    ret void
1411 //
1412 //
1413 // CHECK9-LABEL: define {{[^@]+}}@main
1414 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
1415 // CHECK9-NEXT:  entry:
1416 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1417 // CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1418 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1419 // CHECK9-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
1420 // CHECK9-NEXT:    ret i32 0
1421 //
1422 //
1423 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44
1424 // CHECK9-SAME: (i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1425 // CHECK9-NEXT:  entry:
1426 // CHECK9-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1427 // CHECK9-NEXT:    [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
1428 // CHECK9-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1429 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1430 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0
1431 // CHECK9-NEXT:    store i32* [[TMP0]], i32** [[TMP1]], align 8
1432 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]])
1433 // CHECK9-NEXT:    ret void
1434 //
1435 //
1436 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1437 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] {
1438 // CHECK9-NEXT:  entry:
1439 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1440 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1441 // CHECK9-NEXT:    [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8
1442 // CHECK9-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
1443 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1444 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1445 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1446 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1447 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1448 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1449 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1450 // CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1451 // CHECK9-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1452 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1453 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1454 // CHECK9-NEXT:    store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8
1455 // CHECK9-NEXT:    [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8
1456 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0
1457 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8
1458 // CHECK9-NEXT:    store i32 0, i32* [[SIVAR]], align 4
1459 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1460 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1461 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1462 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1463 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1464 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1465 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1466 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1467 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1468 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1469 // CHECK9:       cond.true:
1470 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1471 // CHECK9:       cond.false:
1472 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1473 // CHECK9-NEXT:    br label [[COND_END]]
1474 // CHECK9:       cond.end:
1475 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1476 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1477 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1478 // CHECK9-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1479 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1480 // CHECK9:       omp.inner.for.cond:
1481 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1482 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1483 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1484 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1485 // CHECK9:       omp.inner.for.body:
1486 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1487 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1488 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1489 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1490 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1491 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[SIVAR]], align 4
1492 // CHECK9-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1493 // CHECK9-NEXT:    store i32 [[ADD2]], i32* [[SIVAR]], align 4
1494 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1495 // CHECK9-NEXT:    store i32* [[SIVAR]], i32** [[TMP13]], align 8
1496 // CHECK9-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(8) [[REF_TMP]])
1497 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1498 // CHECK9:       omp.body.continue:
1499 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1500 // CHECK9:       omp.inner.for.inc:
1501 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1502 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
1503 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1504 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
1505 // CHECK9:       omp.inner.for.end:
1506 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1507 // CHECK9:       omp.loop.exit:
1508 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1509 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1510 // CHECK9-NEXT:    [[TMP16:%.*]] = bitcast i32* [[SIVAR]] to i8*
1511 // CHECK9-NEXT:    store i8* [[TMP16]], i8** [[TMP15]], align 8
1512 // CHECK9-NEXT:    [[TMP17:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1513 // CHECK9-NEXT:    [[TMP18:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP17]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1514 // CHECK9-NEXT:    switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1515 // CHECK9-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1516 // CHECK9-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1517 // CHECK9-NEXT:    ]
1518 // CHECK9:       .omp.reduction.case1:
1519 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP2]], align 4
1520 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR]], align 4
1521 // CHECK9-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1522 // CHECK9-NEXT:    store i32 [[ADD4]], i32* [[TMP2]], align 4
1523 // CHECK9-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1524 // CHECK9-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1525 // CHECK9:       .omp.reduction.case2:
1526 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, i32* [[SIVAR]], align 4
1527 // CHECK9-NEXT:    [[TMP22:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP21]] monotonic, align 4
1528 // CHECK9-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1529 // CHECK9-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1530 // CHECK9:       .omp.reduction.default:
1531 // CHECK9-NEXT:    ret void
1532 //
1533 //
1534 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1535 // CHECK9-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
1536 // CHECK9-NEXT:  entry:
1537 // CHECK9-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
1538 // CHECK9-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
1539 // CHECK9-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1540 // CHECK9-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1541 // CHECK9-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1542 // CHECK9-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1543 // CHECK9-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1544 // CHECK9-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1545 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1546 // CHECK9-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1547 // CHECK9-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1548 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1549 // CHECK9-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1550 // CHECK9-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1551 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1552 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1553 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1554 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
1555 // CHECK9-NEXT:    ret void
1556 //
1557 //
1558 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1559 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1560 // CHECK9-NEXT:  entry:
1561 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
1562 // CHECK9-NEXT:    ret void
1563 //
1564 //
1565 // CHECK10-LABEL: define {{[^@]+}}@main
1566 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
1567 // CHECK10-NEXT:  entry:
1568 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1569 // CHECK10-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1570 // CHECK10-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1571 // CHECK10-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
1572 // CHECK10-NEXT:    ret i32 0
1573 //
1574 //
1575 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44
1576 // CHECK10-SAME: (i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1577 // CHECK10-NEXT:  entry:
1578 // CHECK10-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1579 // CHECK10-NEXT:    [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
1580 // CHECK10-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1581 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1582 // CHECK10-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0
1583 // CHECK10-NEXT:    store i32* [[TMP0]], i32** [[TMP1]], align 8
1584 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]])
1585 // CHECK10-NEXT:    ret void
1586 //
1587 //
1588 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
1589 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] {
1590 // CHECK10-NEXT:  entry:
1591 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1592 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1593 // CHECK10-NEXT:    [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8
1594 // CHECK10-NEXT:    [[SIVAR:%.*]] = alloca i32, align 4
1595 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1596 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1597 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1598 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1599 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1600 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1601 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
1602 // CHECK10-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1603 // CHECK10-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1604 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1605 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1606 // CHECK10-NEXT:    store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8
1607 // CHECK10-NEXT:    [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8
1608 // CHECK10-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0
1609 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8
1610 // CHECK10-NEXT:    store i32 0, i32* [[SIVAR]], align 4
1611 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1612 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1613 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1614 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1615 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1616 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1617 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1618 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1619 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1620 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1621 // CHECK10:       cond.true:
1622 // CHECK10-NEXT:    br label [[COND_END:%.*]]
1623 // CHECK10:       cond.false:
1624 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1625 // CHECK10-NEXT:    br label [[COND_END]]
1626 // CHECK10:       cond.end:
1627 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1628 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1629 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1630 // CHECK10-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1631 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1632 // CHECK10:       omp.inner.for.cond:
1633 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1634 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1635 // CHECK10-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1636 // CHECK10-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1637 // CHECK10:       omp.inner.for.body:
1638 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1639 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1640 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1641 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1642 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1643 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[SIVAR]], align 4
1644 // CHECK10-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1645 // CHECK10-NEXT:    store i32 [[ADD2]], i32* [[SIVAR]], align 4
1646 // CHECK10-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1647 // CHECK10-NEXT:    store i32* [[SIVAR]], i32** [[TMP13]], align 8
1648 // CHECK10-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(8) [[REF_TMP]])
1649 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1650 // CHECK10:       omp.body.continue:
1651 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1652 // CHECK10:       omp.inner.for.inc:
1653 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1654 // CHECK10-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
1655 // CHECK10-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1656 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
1657 // CHECK10:       omp.inner.for.end:
1658 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1659 // CHECK10:       omp.loop.exit:
1660 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1661 // CHECK10-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1662 // CHECK10-NEXT:    [[TMP16:%.*]] = bitcast i32* [[SIVAR]] to i8*
1663 // CHECK10-NEXT:    store i8* [[TMP16]], i8** [[TMP15]], align 8
1664 // CHECK10-NEXT:    [[TMP17:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1665 // CHECK10-NEXT:    [[TMP18:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP17]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1666 // CHECK10-NEXT:    switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1667 // CHECK10-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1668 // CHECK10-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1669 // CHECK10-NEXT:    ]
1670 // CHECK10:       .omp.reduction.case1:
1671 // CHECK10-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP2]], align 4
1672 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR]], align 4
1673 // CHECK10-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1674 // CHECK10-NEXT:    store i32 [[ADD4]], i32* [[TMP2]], align 4
1675 // CHECK10-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1676 // CHECK10-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1677 // CHECK10:       .omp.reduction.case2:
1678 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32, i32* [[SIVAR]], align 4
1679 // CHECK10-NEXT:    [[TMP22:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP21]] monotonic, align 4
1680 // CHECK10-NEXT:    call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1681 // CHECK10-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1682 // CHECK10:       .omp.reduction.default:
1683 // CHECK10-NEXT:    ret void
1684 //
1685 //
1686 // CHECK10-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1687 // CHECK10-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
1688 // CHECK10-NEXT:  entry:
1689 // CHECK10-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
1690 // CHECK10-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
1691 // CHECK10-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1692 // CHECK10-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1693 // CHECK10-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1694 // CHECK10-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1695 // CHECK10-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1696 // CHECK10-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1697 // CHECK10-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1698 // CHECK10-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1699 // CHECK10-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1700 // CHECK10-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1701 // CHECK10-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1702 // CHECK10-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1703 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1704 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1705 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1706 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
1707 // CHECK10-NEXT:    ret void
1708 //
1709 //
1710 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1711 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
1712 // CHECK10-NEXT:  entry:
1713 // CHECK10-NEXT:    call void @__tgt_register_requires(i64 1)
1714 // CHECK10-NEXT:    ret void
1715 //
1716