1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 20 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 template <typename T> 29 T tmain() { 30 T t_var = T(); 31 T vec[] = {1, 2}; 32 #pragma omp target teams distribute reduction(+: t_var) 33 for (int i = 0; i < 2; ++i) { 34 t_var += (T) i; 35 } 36 return T(); 37 } 38 39 int main() { 40 static int sivar; 41 #ifdef LAMBDA 42 43 [&]() { 44 #pragma omp target teams distribute reduction(+: sivar) 45 for (int i = 0; i < 2; ++i) { 46 47 // Skip global and bound tid vars 48 49 sivar += i; 50 51 [&]() { 52 53 sivar += 4; 54 55 }(); 56 } 57 }(); 58 return 0; 59 #else 60 #pragma omp target teams distribute reduction(+: sivar) 61 for (int i = 0; i < 2; ++i) { 62 sivar += i; 63 } 64 return tmain<int>(); 65 #endif 66 } 67 68 69 70 71 // Skip global and bound tid vars 72 73 74 75 76 77 // Skip global and bound tid vars 78 79 80 #endif 81 // CHECK1-LABEL: define {{[^@]+}}@main 82 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 83 // CHECK1-NEXT: entry: 84 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 85 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 86 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 87 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 88 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 89 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 90 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 91 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 92 // CHECK1-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 8 93 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 94 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 95 // CHECK1-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 8 96 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 97 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 98 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 99 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 100 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 101 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 102 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 103 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 104 // CHECK1: omp_offload.failed: 105 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 106 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 107 // CHECK1: omp_offload.cont: 108 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 109 // CHECK1-NEXT: ret i32 [[CALL]] 110 // 111 // 112 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60 113 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 114 // CHECK1-NEXT: entry: 115 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 116 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 117 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 118 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 119 // CHECK1-NEXT: ret void 120 // 121 // 122 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 123 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 124 // CHECK1-NEXT: entry: 125 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 126 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 127 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 128 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 129 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 130 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 131 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 132 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 133 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 134 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 135 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 136 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 137 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 138 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 139 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 140 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 141 // CHECK1-NEXT: store i32 0, i32* [[SIVAR1]], align 4 142 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 143 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 144 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 145 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 146 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 147 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 148 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 149 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 150 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 151 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 152 // CHECK1: cond.true: 153 // CHECK1-NEXT: br label [[COND_END:%.*]] 154 // CHECK1: cond.false: 155 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 156 // CHECK1-NEXT: br label [[COND_END]] 157 // CHECK1: cond.end: 158 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 159 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 160 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 161 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 162 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 163 // CHECK1: omp.inner.for.cond: 164 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 165 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 166 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 167 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 168 // CHECK1: omp.inner.for.body: 169 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 170 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 171 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 172 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 173 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 174 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 175 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 176 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 177 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 178 // CHECK1: omp.body.continue: 179 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 180 // CHECK1: omp.inner.for.inc: 181 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 182 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 183 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 184 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 185 // CHECK1: omp.inner.for.end: 186 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 187 // CHECK1: omp.loop.exit: 188 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 189 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 190 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 191 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 192 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 193 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 194 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 195 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 196 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 197 // CHECK1-NEXT: ] 198 // CHECK1: .omp.reduction.case1: 199 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 200 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 201 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 202 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 203 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 204 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 205 // CHECK1: .omp.reduction.case2: 206 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 207 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 208 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 209 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 210 // CHECK1: .omp.reduction.default: 211 // CHECK1-NEXT: ret void 212 // 213 // 214 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 215 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 216 // CHECK1-NEXT: entry: 217 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 218 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 219 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 220 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 221 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 222 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 223 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 224 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 225 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 226 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 227 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 228 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 229 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 230 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 231 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 232 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 233 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 234 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 235 // CHECK1-NEXT: ret void 236 // 237 // 238 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 239 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 240 // CHECK1-NEXT: entry: 241 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 243 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 244 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 245 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 246 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 247 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 248 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 249 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 250 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 251 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32** 252 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 8 253 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 254 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 255 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[TMP4]], align 8 256 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 257 // CHECK1-NEXT: store i8* null, i8** [[TMP5]], align 8 258 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 259 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 260 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 261 // CHECK1-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 262 // CHECK1-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 263 // CHECK1-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 264 // CHECK1: omp_offload.failed: 265 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]] 266 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 267 // CHECK1: omp_offload.cont: 268 // CHECK1-NEXT: ret i32 0 269 // 270 // 271 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 272 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 273 // CHECK1-NEXT: entry: 274 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 275 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 276 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 277 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[TMP0]]) 278 // CHECK1-NEXT: ret void 279 // 280 // 281 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 282 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 283 // CHECK1-NEXT: entry: 284 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 285 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 286 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 287 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 288 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 289 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 290 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 291 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 292 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 293 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 294 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 295 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 296 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 297 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 298 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 299 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 300 // CHECK1-NEXT: store i32 0, i32* [[T_VAR1]], align 4 301 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 302 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 303 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 304 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 305 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 306 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 307 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 308 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 309 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 310 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 311 // CHECK1: cond.true: 312 // CHECK1-NEXT: br label [[COND_END:%.*]] 313 // CHECK1: cond.false: 314 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 315 // CHECK1-NEXT: br label [[COND_END]] 316 // CHECK1: cond.end: 317 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 318 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 319 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 320 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 321 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 322 // CHECK1: omp.inner.for.cond: 323 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 324 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 325 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 326 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 327 // CHECK1: omp.inner.for.body: 328 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 329 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 330 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 331 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 332 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 333 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 334 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 335 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 336 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 337 // CHECK1: omp.body.continue: 338 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 339 // CHECK1: omp.inner.for.inc: 340 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 341 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 342 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 343 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 344 // CHECK1: omp.inner.for.end: 345 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 346 // CHECK1: omp.loop.exit: 347 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 348 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 349 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 350 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 351 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 352 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 353 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 354 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 355 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 356 // CHECK1-NEXT: ] 357 // CHECK1: .omp.reduction.case1: 358 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 359 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 360 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 361 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 362 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 363 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 364 // CHECK1: .omp.reduction.case2: 365 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 366 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 367 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 368 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 369 // CHECK1: .omp.reduction.default: 370 // CHECK1-NEXT: ret void 371 // 372 // 373 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 374 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 375 // CHECK1-NEXT: entry: 376 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 377 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 378 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 379 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 380 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 381 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 382 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 383 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 384 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 385 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 386 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 387 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 388 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 389 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 390 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 391 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 392 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 393 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 394 // CHECK1-NEXT: ret void 395 // 396 // 397 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 398 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] { 399 // CHECK1-NEXT: entry: 400 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 401 // CHECK1-NEXT: ret void 402 // 403 // 404 // CHECK3-LABEL: define {{[^@]+}}@main 405 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 406 // CHECK3-NEXT: entry: 407 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 408 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 409 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 410 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 411 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 412 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 413 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 414 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 415 // CHECK3-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 4 416 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 417 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 418 // CHECK3-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 4 419 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 420 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 421 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 422 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 423 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 424 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 425 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 426 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 427 // CHECK3: omp_offload.failed: 428 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 429 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 430 // CHECK3: omp_offload.cont: 431 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 432 // CHECK3-NEXT: ret i32 [[CALL]] 433 // 434 // 435 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60 436 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 437 // CHECK3-NEXT: entry: 438 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 439 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 440 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 441 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 442 // CHECK3-NEXT: ret void 443 // 444 // 445 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 446 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 447 // CHECK3-NEXT: entry: 448 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 449 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 450 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 451 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 452 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 453 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 454 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 455 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 456 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 457 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 458 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 459 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 460 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 461 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 462 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 463 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 464 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4 465 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 466 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 467 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 468 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 469 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 470 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 471 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 472 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 473 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 474 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 475 // CHECK3: cond.true: 476 // CHECK3-NEXT: br label [[COND_END:%.*]] 477 // CHECK3: cond.false: 478 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 479 // CHECK3-NEXT: br label [[COND_END]] 480 // CHECK3: cond.end: 481 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 482 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 483 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 484 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 485 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 486 // CHECK3: omp.inner.for.cond: 487 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 488 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 489 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 490 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 491 // CHECK3: omp.inner.for.body: 492 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 493 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 494 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 495 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 496 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 497 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 498 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 499 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 500 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 501 // CHECK3: omp.body.continue: 502 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 503 // CHECK3: omp.inner.for.inc: 504 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 505 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 506 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 507 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 508 // CHECK3: omp.inner.for.end: 509 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 510 // CHECK3: omp.loop.exit: 511 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 512 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 513 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 514 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 515 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 516 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 517 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 518 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 519 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 520 // CHECK3-NEXT: ] 521 // CHECK3: .omp.reduction.case1: 522 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 523 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 524 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 525 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 526 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 527 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 528 // CHECK3: .omp.reduction.case2: 529 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 530 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 531 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 532 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 533 // CHECK3: .omp.reduction.default: 534 // CHECK3-NEXT: ret void 535 // 536 // 537 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 538 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 539 // CHECK3-NEXT: entry: 540 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 541 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 542 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 543 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 544 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 545 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 546 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 547 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 548 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 549 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 550 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 551 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 552 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 553 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 554 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 555 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 556 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 557 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 558 // CHECK3-NEXT: ret void 559 // 560 // 561 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 562 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat { 563 // CHECK3-NEXT: entry: 564 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 565 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 566 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 567 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 568 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 569 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 570 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4 571 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 572 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 573 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 574 // CHECK3-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32** 575 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 4 576 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 577 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 578 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[TMP4]], align 4 579 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 580 // CHECK3-NEXT: store i8* null, i8** [[TMP5]], align 4 581 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 582 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 583 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 584 // CHECK3-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 585 // CHECK3-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 586 // CHECK3-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 587 // CHECK3: omp_offload.failed: 588 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]] 589 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 590 // CHECK3: omp_offload.cont: 591 // CHECK3-NEXT: ret i32 0 592 // 593 // 594 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 595 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 596 // CHECK3-NEXT: entry: 597 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 598 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 599 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 600 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[TMP0]]) 601 // CHECK3-NEXT: ret void 602 // 603 // 604 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 605 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 606 // CHECK3-NEXT: entry: 607 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 608 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 609 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 610 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 611 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 612 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 613 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 614 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 615 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 616 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 617 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 618 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 619 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 620 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 621 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 622 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 623 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4 624 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 625 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 626 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 627 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 628 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 629 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 630 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 631 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 632 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 633 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 634 // CHECK3: cond.true: 635 // CHECK3-NEXT: br label [[COND_END:%.*]] 636 // CHECK3: cond.false: 637 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 638 // CHECK3-NEXT: br label [[COND_END]] 639 // CHECK3: cond.end: 640 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 641 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 642 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 643 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 644 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 645 // CHECK3: omp.inner.for.cond: 646 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 647 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 648 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 649 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 650 // CHECK3: omp.inner.for.body: 651 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 652 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 653 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 654 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 655 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 656 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 657 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 658 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 659 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 660 // CHECK3: omp.body.continue: 661 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 662 // CHECK3: omp.inner.for.inc: 663 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 664 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 665 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 666 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 667 // CHECK3: omp.inner.for.end: 668 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 669 // CHECK3: omp.loop.exit: 670 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 671 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 672 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 673 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 674 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 675 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 676 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 677 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 678 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 679 // CHECK3-NEXT: ] 680 // CHECK3: .omp.reduction.case1: 681 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 682 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 683 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 684 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 685 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 686 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 687 // CHECK3: .omp.reduction.case2: 688 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 689 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 690 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 691 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 692 // CHECK3: .omp.reduction.default: 693 // CHECK3-NEXT: ret void 694 // 695 // 696 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 697 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 698 // CHECK3-NEXT: entry: 699 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 700 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 701 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 702 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 703 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 704 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 705 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 706 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 707 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 708 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 709 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 710 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 711 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 712 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 713 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 714 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 715 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 716 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 717 // CHECK3-NEXT: ret void 718 // 719 // 720 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 721 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] { 722 // CHECK3-NEXT: entry: 723 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 724 // CHECK3-NEXT: ret void 725 // 726 // 727 // CHECK9-LABEL: define {{[^@]+}}@main 728 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 729 // CHECK9-NEXT: entry: 730 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 731 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 732 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 733 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 734 // CHECK9-NEXT: ret i32 0 735 // 736 // 737 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44 738 // CHECK9-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 739 // CHECK9-NEXT: entry: 740 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 741 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 742 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 743 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 744 // CHECK9-NEXT: ret void 745 // 746 // 747 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 748 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 749 // CHECK9-NEXT: entry: 750 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 751 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 752 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 753 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 754 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 755 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 756 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 757 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 758 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 759 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 760 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 761 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 762 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 763 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 764 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 765 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 766 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 767 // CHECK9-NEXT: store i32 0, i32* [[SIVAR1]], align 4 768 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 769 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 770 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 771 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 772 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 773 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 774 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 775 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 776 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 777 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 778 // CHECK9: cond.true: 779 // CHECK9-NEXT: br label [[COND_END:%.*]] 780 // CHECK9: cond.false: 781 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 782 // CHECK9-NEXT: br label [[COND_END]] 783 // CHECK9: cond.end: 784 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 785 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 786 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 787 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 788 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 789 // CHECK9: omp.inner.for.cond: 790 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 791 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 792 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 793 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 794 // CHECK9: omp.inner.for.body: 795 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 796 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 797 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 798 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 799 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 800 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 801 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 802 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 803 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 804 // CHECK9-NEXT: store i32* [[SIVAR1]], i32** [[TMP11]], align 8 805 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 806 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 807 // CHECK9: omp.body.continue: 808 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 809 // CHECK9: omp.inner.for.inc: 810 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 811 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 812 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 813 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 814 // CHECK9: omp.inner.for.end: 815 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 816 // CHECK9: omp.loop.exit: 817 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 818 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 819 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i32* [[SIVAR1]] to i8* 820 // CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 821 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 822 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP15]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 823 // CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 824 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 825 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 826 // CHECK9-NEXT: ] 827 // CHECK9: .omp.reduction.case1: 828 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP0]], align 4 829 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 830 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 831 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 832 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 833 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 834 // CHECK9: .omp.reduction.case2: 835 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 836 // CHECK9-NEXT: [[TMP20:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP19]] monotonic, align 4 837 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 838 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 839 // CHECK9: .omp.reduction.default: 840 // CHECK9-NEXT: ret void 841 // 842 // 843 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 844 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 845 // CHECK9-NEXT: entry: 846 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 847 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 848 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 849 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 850 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 851 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 852 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 853 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 854 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 855 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 856 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 857 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 858 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 859 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 860 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 861 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 862 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 863 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 864 // CHECK9-NEXT: ret void 865 // 866 // 867 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 868 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 869 // CHECK9-NEXT: entry: 870 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 871 // CHECK9-NEXT: ret void 872 // 873