1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 20 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 template <typename T> 29 T tmain() { 30 T t_var = T(); 31 T vec[] = {1, 2}; 32 #pragma omp target teams distribute reduction(+: t_var) 33 for (int i = 0; i < 2; ++i) { 34 t_var += (T) i; 35 } 36 return T(); 37 } 38 39 int main() { 40 static int sivar; 41 #ifdef LAMBDA 42 43 [&]() { 44 #pragma omp target teams distribute reduction(+: sivar) 45 for (int i = 0; i < 2; ++i) { 46 47 // Skip global and bound tid vars 48 49 sivar += i; 50 51 [&]() { 52 53 sivar += 4; 54 55 }(); 56 } 57 }(); 58 return 0; 59 #else 60 #pragma omp target teams distribute reduction(+: sivar) 61 for (int i = 0; i < 2; ++i) { 62 sivar += i; 63 } 64 return tmain<int>(); 65 #endif 66 } 67 68 69 70 71 // Skip global and bound tid vars 72 73 74 75 76 77 // Skip global and bound tid vars 78 79 80 #endif 81 // CHECK1-LABEL: define {{[^@]+}}@main 82 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 83 // CHECK1-NEXT: entry: 84 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 85 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 86 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 87 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 88 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 89 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 90 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 91 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 92 // CHECK1-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 8 93 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 94 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 95 // CHECK1-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 8 96 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 97 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 98 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 99 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 100 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 101 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 102 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4 103 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 104 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4 105 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 106 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8 107 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 108 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8 109 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 110 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8 111 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 112 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8 113 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 114 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8 115 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 116 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8 117 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 118 // CHECK1-NEXT: store i64 2, i64* [[TMP15]], align 8 119 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 120 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 121 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 122 // CHECK1: omp_offload.failed: 123 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 124 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 125 // CHECK1: omp_offload.cont: 126 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 127 // CHECK1-NEXT: ret i32 [[CALL]] 128 // 129 // 130 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60 131 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 132 // CHECK1-NEXT: entry: 133 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 134 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 135 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 136 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 137 // CHECK1-NEXT: ret void 138 // 139 // 140 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 141 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 142 // CHECK1-NEXT: entry: 143 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 144 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 145 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 146 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 147 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 148 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 151 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 152 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 153 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 155 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 156 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 157 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 158 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 159 // CHECK1-NEXT: store i32 0, i32* [[SIVAR1]], align 4 160 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 161 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 162 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 163 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 164 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 165 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 166 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 167 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 168 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 169 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 170 // CHECK1: cond.true: 171 // CHECK1-NEXT: br label [[COND_END:%.*]] 172 // CHECK1: cond.false: 173 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 174 // CHECK1-NEXT: br label [[COND_END]] 175 // CHECK1: cond.end: 176 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 177 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 178 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 179 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 180 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 181 // CHECK1: omp.inner.for.cond: 182 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 183 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 184 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 185 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 186 // CHECK1: omp.inner.for.body: 187 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 188 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 189 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 190 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 191 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 192 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 193 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 194 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 195 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 196 // CHECK1: omp.body.continue: 197 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 198 // CHECK1: omp.inner.for.inc: 199 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 200 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 201 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 202 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 203 // CHECK1: omp.inner.for.end: 204 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 205 // CHECK1: omp.loop.exit: 206 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 207 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 208 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 209 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 210 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 211 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 212 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 213 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 214 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 215 // CHECK1-NEXT: ] 216 // CHECK1: .omp.reduction.case1: 217 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 218 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 219 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 220 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 221 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 222 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 223 // CHECK1: .omp.reduction.case2: 224 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 225 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 226 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 227 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 228 // CHECK1: .omp.reduction.default: 229 // CHECK1-NEXT: ret void 230 // 231 // 232 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 233 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 234 // CHECK1-NEXT: entry: 235 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 236 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 237 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 238 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 239 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 240 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 241 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 242 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 243 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 244 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 245 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 246 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 247 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 248 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 249 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 250 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 251 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 252 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 253 // CHECK1-NEXT: ret void 254 // 255 // 256 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 257 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 258 // CHECK1-NEXT: entry: 259 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 260 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 261 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 262 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 263 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 264 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 265 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 266 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 267 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 268 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 269 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32** 270 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 8 271 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 272 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 273 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[TMP4]], align 8 274 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 275 // CHECK1-NEXT: store i8* null, i8** [[TMP5]], align 8 276 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 277 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 278 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 279 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 280 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4 281 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 282 // CHECK1-NEXT: store i32 1, i32* [[TMP9]], align 4 283 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 284 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8 285 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 286 // CHECK1-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8 287 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 288 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64** [[TMP12]], align 8 289 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 290 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i64** [[TMP13]], align 8 291 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 292 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8 293 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 294 // CHECK1-NEXT: store i8** null, i8*** [[TMP15]], align 8 295 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 296 // CHECK1-NEXT: store i64 2, i64* [[TMP16]], align 8 297 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 298 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 299 // CHECK1-NEXT: br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 300 // CHECK1: omp_offload.failed: 301 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]] 302 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 303 // CHECK1: omp_offload.cont: 304 // CHECK1-NEXT: ret i32 0 305 // 306 // 307 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 308 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 309 // CHECK1-NEXT: entry: 310 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 311 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 312 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 313 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[TMP0]]) 314 // CHECK1-NEXT: ret void 315 // 316 // 317 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 318 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 319 // CHECK1-NEXT: entry: 320 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 321 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 322 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 323 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 324 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 325 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 326 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 327 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 328 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 329 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 330 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 331 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 332 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 333 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 334 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 335 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 336 // CHECK1-NEXT: store i32 0, i32* [[T_VAR1]], align 4 337 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 338 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 339 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 340 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 341 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 342 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 343 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 344 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 345 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 346 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 347 // CHECK1: cond.true: 348 // CHECK1-NEXT: br label [[COND_END:%.*]] 349 // CHECK1: cond.false: 350 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 351 // CHECK1-NEXT: br label [[COND_END]] 352 // CHECK1: cond.end: 353 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 354 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 355 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 356 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 357 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 358 // CHECK1: omp.inner.for.cond: 359 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 360 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 361 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 362 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 363 // CHECK1: omp.inner.for.body: 364 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 365 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 366 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 367 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 368 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 369 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 370 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 371 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 372 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 373 // CHECK1: omp.body.continue: 374 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 375 // CHECK1: omp.inner.for.inc: 376 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 377 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 378 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 379 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 380 // CHECK1: omp.inner.for.end: 381 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 382 // CHECK1: omp.loop.exit: 383 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 384 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 385 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 386 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 387 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 388 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 389 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 390 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 391 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 392 // CHECK1-NEXT: ] 393 // CHECK1: .omp.reduction.case1: 394 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 395 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 396 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 397 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 398 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 399 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 400 // CHECK1: .omp.reduction.case2: 401 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 402 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 403 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 404 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 405 // CHECK1: .omp.reduction.default: 406 // CHECK1-NEXT: ret void 407 // 408 // 409 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 410 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 411 // CHECK1-NEXT: entry: 412 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 413 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 414 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 415 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 416 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 417 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 418 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 419 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 420 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 421 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 422 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 423 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 424 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 425 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 426 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 427 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 428 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 429 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 430 // CHECK1-NEXT: ret void 431 // 432 // 433 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 434 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] { 435 // CHECK1-NEXT: entry: 436 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 437 // CHECK1-NEXT: ret void 438 // 439 // 440 // CHECK3-LABEL: define {{[^@]+}}@main 441 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 442 // CHECK3-NEXT: entry: 443 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 444 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 445 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 446 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 447 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 448 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 449 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 450 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 451 // CHECK3-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 4 452 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 453 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 454 // CHECK3-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 4 455 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 456 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 457 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 458 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 459 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 460 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 461 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4 462 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 463 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4 464 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 465 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4 466 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 467 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4 468 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 469 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4 470 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 471 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4 472 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 473 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4 474 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 475 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4 476 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 477 // CHECK3-NEXT: store i64 2, i64* [[TMP15]], align 8 478 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 479 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 480 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 481 // CHECK3: omp_offload.failed: 482 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 483 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 484 // CHECK3: omp_offload.cont: 485 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 486 // CHECK3-NEXT: ret i32 [[CALL]] 487 // 488 // 489 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60 490 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 491 // CHECK3-NEXT: entry: 492 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 493 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 494 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 495 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 496 // CHECK3-NEXT: ret void 497 // 498 // 499 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 500 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 501 // CHECK3-NEXT: entry: 502 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 503 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 504 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 505 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 506 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 507 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 508 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 509 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 510 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 511 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 512 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 513 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 514 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 515 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 516 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 517 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 518 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4 519 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 520 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 521 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 522 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 523 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 524 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 525 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 526 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 527 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 528 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 529 // CHECK3: cond.true: 530 // CHECK3-NEXT: br label [[COND_END:%.*]] 531 // CHECK3: cond.false: 532 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 533 // CHECK3-NEXT: br label [[COND_END]] 534 // CHECK3: cond.end: 535 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 536 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 537 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 538 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 539 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 540 // CHECK3: omp.inner.for.cond: 541 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 542 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 543 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 544 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 545 // CHECK3: omp.inner.for.body: 546 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 547 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 548 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 549 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 550 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 551 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 552 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 553 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 554 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 555 // CHECK3: omp.body.continue: 556 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 557 // CHECK3: omp.inner.for.inc: 558 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 559 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 560 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 561 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 562 // CHECK3: omp.inner.for.end: 563 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 564 // CHECK3: omp.loop.exit: 565 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 566 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 567 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 568 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 569 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 570 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 571 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 572 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 573 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 574 // CHECK3-NEXT: ] 575 // CHECK3: .omp.reduction.case1: 576 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 577 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 578 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 579 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 580 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 581 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 582 // CHECK3: .omp.reduction.case2: 583 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 584 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 585 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 586 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 587 // CHECK3: .omp.reduction.default: 588 // CHECK3-NEXT: ret void 589 // 590 // 591 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 592 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 593 // CHECK3-NEXT: entry: 594 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 595 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 596 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 597 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 598 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 599 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 600 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 601 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 602 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 603 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 604 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 605 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 606 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 607 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 608 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 609 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 610 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 611 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 612 // CHECK3-NEXT: ret void 613 // 614 // 615 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 616 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat { 617 // CHECK3-NEXT: entry: 618 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 619 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 620 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 621 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 622 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 623 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 624 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4 625 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 626 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 627 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 628 // CHECK3-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32** 629 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 4 630 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 631 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 632 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[TMP4]], align 4 633 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 634 // CHECK3-NEXT: store i8* null, i8** [[TMP5]], align 4 635 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 636 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 637 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 638 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 639 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4 640 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 641 // CHECK3-NEXT: store i32 1, i32* [[TMP9]], align 4 642 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 643 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4 644 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 645 // CHECK3-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 4 646 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 647 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64** [[TMP12]], align 4 648 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 649 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i64** [[TMP13]], align 4 650 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 651 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4 652 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 653 // CHECK3-NEXT: store i8** null, i8*** [[TMP15]], align 4 654 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 655 // CHECK3-NEXT: store i64 2, i64* [[TMP16]], align 8 656 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 657 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 658 // CHECK3-NEXT: br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 659 // CHECK3: omp_offload.failed: 660 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]] 661 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 662 // CHECK3: omp_offload.cont: 663 // CHECK3-NEXT: ret i32 0 664 // 665 // 666 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 667 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 668 // CHECK3-NEXT: entry: 669 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 670 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 671 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 672 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[TMP0]]) 673 // CHECK3-NEXT: ret void 674 // 675 // 676 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 677 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 678 // CHECK3-NEXT: entry: 679 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 680 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 681 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 682 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 683 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 684 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 685 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 686 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 687 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 688 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 689 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 690 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 691 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 692 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 693 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 694 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 695 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4 696 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 697 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 698 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 699 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 700 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 701 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 702 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 703 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 704 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 705 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 706 // CHECK3: cond.true: 707 // CHECK3-NEXT: br label [[COND_END:%.*]] 708 // CHECK3: cond.false: 709 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 710 // CHECK3-NEXT: br label [[COND_END]] 711 // CHECK3: cond.end: 712 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 713 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 714 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 715 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 716 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 717 // CHECK3: omp.inner.for.cond: 718 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 719 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 720 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 721 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 722 // CHECK3: omp.inner.for.body: 723 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 724 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 725 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 726 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 727 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 728 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 729 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 730 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 731 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 732 // CHECK3: omp.body.continue: 733 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 734 // CHECK3: omp.inner.for.inc: 735 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 736 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 737 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 738 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 739 // CHECK3: omp.inner.for.end: 740 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 741 // CHECK3: omp.loop.exit: 742 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 743 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 744 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 745 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 746 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 747 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 748 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 749 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 750 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 751 // CHECK3-NEXT: ] 752 // CHECK3: .omp.reduction.case1: 753 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 754 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 755 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 756 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 757 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 758 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 759 // CHECK3: .omp.reduction.case2: 760 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 761 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 762 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 763 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 764 // CHECK3: .omp.reduction.default: 765 // CHECK3-NEXT: ret void 766 // 767 // 768 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 769 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 770 // CHECK3-NEXT: entry: 771 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 772 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 773 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 774 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 775 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 776 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 777 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 778 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 779 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 780 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 781 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 782 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 783 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 784 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 785 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 786 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 787 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 788 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 789 // CHECK3-NEXT: ret void 790 // 791 // 792 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 793 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] { 794 // CHECK3-NEXT: entry: 795 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 796 // CHECK3-NEXT: ret void 797 // 798 // 799 // CHECK9-LABEL: define {{[^@]+}}@main 800 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 801 // CHECK9-NEXT: entry: 802 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 803 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 804 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 805 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 806 // CHECK9-NEXT: ret i32 0 807 // 808 // 809 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44 810 // CHECK9-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 811 // CHECK9-NEXT: entry: 812 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 813 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 814 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 815 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 816 // CHECK9-NEXT: ret void 817 // 818 // 819 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 820 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 821 // CHECK9-NEXT: entry: 822 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 823 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 824 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 825 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 826 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 827 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 828 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 829 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 830 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 831 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 832 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 833 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 834 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 835 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 836 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 837 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 838 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 839 // CHECK9-NEXT: store i32 0, i32* [[SIVAR1]], align 4 840 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 841 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 842 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 843 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 844 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 845 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 846 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 847 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 848 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 849 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 850 // CHECK9: cond.true: 851 // CHECK9-NEXT: br label [[COND_END:%.*]] 852 // CHECK9: cond.false: 853 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 854 // CHECK9-NEXT: br label [[COND_END]] 855 // CHECK9: cond.end: 856 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 857 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 858 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 859 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 860 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 861 // CHECK9: omp.inner.for.cond: 862 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 863 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 864 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 865 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 866 // CHECK9: omp.inner.for.body: 867 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 868 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 869 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 870 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 871 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 872 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 873 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 874 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 875 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 876 // CHECK9-NEXT: store i32* [[SIVAR1]], i32** [[TMP11]], align 8 877 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 878 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 879 // CHECK9: omp.body.continue: 880 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 881 // CHECK9: omp.inner.for.inc: 882 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 883 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 884 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 885 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 886 // CHECK9: omp.inner.for.end: 887 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 888 // CHECK9: omp.loop.exit: 889 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 890 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 891 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i32* [[SIVAR1]] to i8* 892 // CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 893 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 894 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP15]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 895 // CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 896 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 897 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 898 // CHECK9-NEXT: ] 899 // CHECK9: .omp.reduction.case1: 900 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP0]], align 4 901 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 902 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 903 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 904 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 905 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 906 // CHECK9: .omp.reduction.case2: 907 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 908 // CHECK9-NEXT: [[TMP20:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP19]] monotonic, align 4 909 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 910 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 911 // CHECK9: .omp.reduction.default: 912 // CHECK9-NEXT: ret void 913 // 914 // 915 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 916 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 917 // CHECK9-NEXT: entry: 918 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 919 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 920 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 921 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 922 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 923 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 924 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 925 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 926 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 927 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 928 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 929 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 930 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 931 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 932 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 933 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 934 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 935 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 936 // CHECK9-NEXT: ret void 937 // 938 // 939 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 940 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 941 // CHECK9-NEXT: entry: 942 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 943 // CHECK9-NEXT: ret void 944 // 945