1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 template <typename T> 29 T tmain() { 30 T t_var = T(); 31 T vec[] = {1, 2}; 32 #pragma omp target teams distribute reduction(+: t_var) 33 for (int i = 0; i < 2; ++i) { 34 t_var += (T) i; 35 } 36 return T(); 37 } 38 39 int main() { 40 static int sivar; 41 #ifdef LAMBDA 42 43 [&]() { 44 #pragma omp target teams distribute reduction(+: sivar) 45 for (int i = 0; i < 2; ++i) { 46 47 // Skip global and bound tid vars 48 49 sivar += i; 50 51 [&]() { 52 53 sivar += 4; 54 55 }(); 56 } 57 }(); 58 return 0; 59 #else 60 #pragma omp target teams distribute reduction(+: sivar) 61 for (int i = 0; i < 2; ++i) { 62 sivar += i; 63 } 64 return tmain<int>(); 65 #endif 66 } 67 68 69 70 71 // Skip global and bound tid vars 72 73 74 75 76 77 // Skip global and bound tid vars 78 79 80 #endif 81 // CHECK1-LABEL: define {{[^@]+}}@main 82 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 83 // CHECK1-NEXT: entry: 84 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 85 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 86 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 87 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 88 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 89 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 90 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 91 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 92 // CHECK1-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 8 93 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 94 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 95 // CHECK1-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 8 96 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 97 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 98 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 99 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 100 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 101 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 102 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 103 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 104 // CHECK1: omp_offload.failed: 105 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 106 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 107 // CHECK1: omp_offload.cont: 108 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 109 // CHECK1-NEXT: ret i32 [[CALL]] 110 // 111 // 112 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60 113 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 114 // CHECK1-NEXT: entry: 115 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 116 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 117 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 118 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 119 // CHECK1-NEXT: ret void 120 // 121 // 122 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 123 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 124 // CHECK1-NEXT: entry: 125 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 126 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 127 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 128 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 129 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 130 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 131 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 132 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 133 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 134 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 135 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 136 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 137 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 138 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 139 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 140 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 141 // CHECK1-NEXT: store i32 0, i32* [[SIVAR1]], align 4 142 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 143 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 144 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 145 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 146 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 147 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 148 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 149 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 150 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 151 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 152 // CHECK1: cond.true: 153 // CHECK1-NEXT: br label [[COND_END:%.*]] 154 // CHECK1: cond.false: 155 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 156 // CHECK1-NEXT: br label [[COND_END]] 157 // CHECK1: cond.end: 158 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 159 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 160 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 161 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 162 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 163 // CHECK1: omp.inner.for.cond: 164 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 165 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 166 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 167 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 168 // CHECK1: omp.inner.for.body: 169 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 170 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 171 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 172 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 173 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 174 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 175 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 176 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 177 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 178 // CHECK1: omp.body.continue: 179 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 180 // CHECK1: omp.inner.for.inc: 181 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 182 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 183 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 184 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 185 // CHECK1: omp.inner.for.end: 186 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 187 // CHECK1: omp.loop.exit: 188 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 189 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 190 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 191 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 192 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 193 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 194 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 195 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 196 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 197 // CHECK1-NEXT: ] 198 // CHECK1: .omp.reduction.case1: 199 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 200 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 201 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 202 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 203 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 204 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 205 // CHECK1: .omp.reduction.case2: 206 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 207 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 208 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 209 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 210 // CHECK1: .omp.reduction.default: 211 // CHECK1-NEXT: ret void 212 // 213 // 214 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 215 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 216 // CHECK1-NEXT: entry: 217 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 218 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 219 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 220 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 221 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 222 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 223 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 224 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 225 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 226 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 227 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 228 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 229 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 230 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 231 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 232 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 233 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 234 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 235 // CHECK1-NEXT: ret void 236 // 237 // 238 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 239 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 240 // CHECK1-NEXT: entry: 241 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 243 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 244 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 245 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 246 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 247 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 248 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 249 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 250 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 251 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32** 252 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 8 253 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 254 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 255 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[TMP4]], align 8 256 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 257 // CHECK1-NEXT: store i8* null, i8** [[TMP5]], align 8 258 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 259 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 260 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 261 // CHECK1-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 262 // CHECK1-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 263 // CHECK1-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 264 // CHECK1: omp_offload.failed: 265 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]] 266 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 267 // CHECK1: omp_offload.cont: 268 // CHECK1-NEXT: ret i32 0 269 // 270 // 271 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 272 // CHECK1-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 273 // CHECK1-NEXT: entry: 274 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 275 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 276 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 277 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[TMP0]]) 278 // CHECK1-NEXT: ret void 279 // 280 // 281 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 282 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 283 // CHECK1-NEXT: entry: 284 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 285 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 286 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 287 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 288 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 289 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 290 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 291 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 292 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 293 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 294 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 295 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 296 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 297 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 298 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 299 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 300 // CHECK1-NEXT: store i32 0, i32* [[T_VAR1]], align 4 301 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 302 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 303 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 304 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 305 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 306 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 307 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 308 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 309 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 310 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 311 // CHECK1: cond.true: 312 // CHECK1-NEXT: br label [[COND_END:%.*]] 313 // CHECK1: cond.false: 314 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 315 // CHECK1-NEXT: br label [[COND_END]] 316 // CHECK1: cond.end: 317 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 318 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 319 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 320 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 321 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 322 // CHECK1: omp.inner.for.cond: 323 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 324 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 325 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 326 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 327 // CHECK1: omp.inner.for.body: 328 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 329 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 330 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 331 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 332 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 333 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 334 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 335 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 336 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 337 // CHECK1: omp.body.continue: 338 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 339 // CHECK1: omp.inner.for.inc: 340 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 341 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 342 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 343 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 344 // CHECK1: omp.inner.for.end: 345 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 346 // CHECK1: omp.loop.exit: 347 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 348 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 349 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 350 // CHECK1-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 351 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 352 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 353 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 354 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 355 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 356 // CHECK1-NEXT: ] 357 // CHECK1: .omp.reduction.case1: 358 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 359 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 360 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 361 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 362 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 363 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 364 // CHECK1: .omp.reduction.case2: 365 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 366 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 367 // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 368 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 369 // CHECK1: .omp.reduction.default: 370 // CHECK1-NEXT: ret void 371 // 372 // 373 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 374 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 375 // CHECK1-NEXT: entry: 376 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 377 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 378 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 379 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 380 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 381 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 382 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 383 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 384 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 385 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 386 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 387 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 388 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 389 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 390 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 391 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 392 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 393 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 394 // CHECK1-NEXT: ret void 395 // 396 // 397 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 398 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] { 399 // CHECK1-NEXT: entry: 400 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 401 // CHECK1-NEXT: ret void 402 // 403 // 404 // CHECK2-LABEL: define {{[^@]+}}@main 405 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 406 // CHECK2-NEXT: entry: 407 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 408 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 409 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 410 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 411 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 412 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 413 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 414 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 415 // CHECK2-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 8 416 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 417 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 418 // CHECK2-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 8 419 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 420 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8 421 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 422 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 423 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 424 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 425 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 426 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 427 // CHECK2: omp_offload.failed: 428 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 429 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 430 // CHECK2: omp_offload.cont: 431 // CHECK2-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 432 // CHECK2-NEXT: ret i32 [[CALL]] 433 // 434 // 435 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60 436 // CHECK2-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 437 // CHECK2-NEXT: entry: 438 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 439 // CHECK2-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 440 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 441 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 442 // CHECK2-NEXT: ret void 443 // 444 // 445 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 446 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 447 // CHECK2-NEXT: entry: 448 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 449 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 450 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 451 // CHECK2-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 452 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 453 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 454 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 455 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 456 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 457 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 458 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 459 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 460 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 461 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 462 // CHECK2-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 463 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 464 // CHECK2-NEXT: store i32 0, i32* [[SIVAR1]], align 4 465 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 466 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 467 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 468 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 469 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 470 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 471 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 472 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 473 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 474 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 475 // CHECK2: cond.true: 476 // CHECK2-NEXT: br label [[COND_END:%.*]] 477 // CHECK2: cond.false: 478 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 479 // CHECK2-NEXT: br label [[COND_END]] 480 // CHECK2: cond.end: 481 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 482 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 483 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 484 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 485 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 486 // CHECK2: omp.inner.for.cond: 487 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 488 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 489 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 490 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 491 // CHECK2: omp.inner.for.body: 492 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 493 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 494 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 495 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 496 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 497 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 498 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 499 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 500 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 501 // CHECK2: omp.body.continue: 502 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 503 // CHECK2: omp.inner.for.inc: 504 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 505 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 506 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 507 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 508 // CHECK2: omp.inner.for.end: 509 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 510 // CHECK2: omp.loop.exit: 511 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 512 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 513 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 514 // CHECK2-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 515 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 516 // CHECK2-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 517 // CHECK2-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 518 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 519 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 520 // CHECK2-NEXT: ] 521 // CHECK2: .omp.reduction.case1: 522 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 523 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 524 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 525 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 526 // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 527 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 528 // CHECK2: .omp.reduction.case2: 529 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 530 // CHECK2-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 531 // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 532 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 533 // CHECK2: .omp.reduction.default: 534 // CHECK2-NEXT: ret void 535 // 536 // 537 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 538 // CHECK2-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 539 // CHECK2-NEXT: entry: 540 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 541 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 542 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 543 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 544 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 545 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 546 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 547 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 548 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 549 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 550 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 551 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 552 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 553 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 554 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 555 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 556 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 557 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 558 // CHECK2-NEXT: ret void 559 // 560 // 561 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 562 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] comdat { 563 // CHECK2-NEXT: entry: 564 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 565 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 566 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 567 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 568 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 569 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 570 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4 571 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 572 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 573 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 574 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32** 575 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 8 576 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 577 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 578 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[TMP4]], align 8 579 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 580 // CHECK2-NEXT: store i8* null, i8** [[TMP5]], align 8 581 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 582 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 583 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 584 // CHECK2-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 585 // CHECK2-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 586 // CHECK2-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 587 // CHECK2: omp_offload.failed: 588 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]] 589 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 590 // CHECK2: omp_offload.cont: 591 // CHECK2-NEXT: ret i32 0 592 // 593 // 594 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 595 // CHECK2-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 596 // CHECK2-NEXT: entry: 597 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 598 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 599 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 600 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[TMP0]]) 601 // CHECK2-NEXT: ret void 602 // 603 // 604 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 605 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 606 // CHECK2-NEXT: entry: 607 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 608 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 609 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 610 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 611 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 612 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 613 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 614 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 615 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 616 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 617 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 618 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 619 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 620 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 621 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 622 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 623 // CHECK2-NEXT: store i32 0, i32* [[T_VAR1]], align 4 624 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 625 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 626 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 627 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 628 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 629 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 630 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 631 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 632 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 633 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 634 // CHECK2: cond.true: 635 // CHECK2-NEXT: br label [[COND_END:%.*]] 636 // CHECK2: cond.false: 637 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 638 // CHECK2-NEXT: br label [[COND_END]] 639 // CHECK2: cond.end: 640 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 641 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 642 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 643 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 644 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 645 // CHECK2: omp.inner.for.cond: 646 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 647 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 648 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 649 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 650 // CHECK2: omp.inner.for.body: 651 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 652 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 653 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 654 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 655 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 656 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 657 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 658 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 659 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 660 // CHECK2: omp.body.continue: 661 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 662 // CHECK2: omp.inner.for.inc: 663 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 664 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 665 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 666 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 667 // CHECK2: omp.inner.for.end: 668 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 669 // CHECK2: omp.loop.exit: 670 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 671 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 672 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 673 // CHECK2-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 674 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 675 // CHECK2-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 676 // CHECK2-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 677 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 678 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 679 // CHECK2-NEXT: ] 680 // CHECK2: .omp.reduction.case1: 681 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 682 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 683 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 684 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 685 // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 686 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 687 // CHECK2: .omp.reduction.case2: 688 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 689 // CHECK2-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 690 // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 691 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 692 // CHECK2: .omp.reduction.default: 693 // CHECK2-NEXT: ret void 694 // 695 // 696 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 697 // CHECK2-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 698 // CHECK2-NEXT: entry: 699 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 700 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 701 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 702 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 703 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 704 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 705 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 706 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 707 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 708 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 709 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 710 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 711 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 712 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 713 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 714 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 715 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 716 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 717 // CHECK2-NEXT: ret void 718 // 719 // 720 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 721 // CHECK2-SAME: () #[[ATTR7:[0-9]+]] { 722 // CHECK2-NEXT: entry: 723 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 724 // CHECK2-NEXT: ret void 725 // 726 // 727 // CHECK3-LABEL: define {{[^@]+}}@main 728 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 729 // CHECK3-NEXT: entry: 730 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 731 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 732 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 733 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 734 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 735 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 736 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 737 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 738 // CHECK3-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 4 739 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 740 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 741 // CHECK3-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 4 742 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 743 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 744 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 745 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 746 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 747 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 748 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 749 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 750 // CHECK3: omp_offload.failed: 751 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 752 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 753 // CHECK3: omp_offload.cont: 754 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 755 // CHECK3-NEXT: ret i32 [[CALL]] 756 // 757 // 758 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60 759 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 760 // CHECK3-NEXT: entry: 761 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 762 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 763 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 764 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 765 // CHECK3-NEXT: ret void 766 // 767 // 768 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 769 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 770 // CHECK3-NEXT: entry: 771 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 772 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 773 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 774 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 775 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 776 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 777 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 778 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 779 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 780 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 781 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 782 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 783 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 784 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 785 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 786 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 787 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4 788 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 789 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 790 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 791 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 792 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 793 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 794 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 795 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 796 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 797 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 798 // CHECK3: cond.true: 799 // CHECK3-NEXT: br label [[COND_END:%.*]] 800 // CHECK3: cond.false: 801 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 802 // CHECK3-NEXT: br label [[COND_END]] 803 // CHECK3: cond.end: 804 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 805 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 806 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 807 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 808 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 809 // CHECK3: omp.inner.for.cond: 810 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 811 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 812 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 813 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 814 // CHECK3: omp.inner.for.body: 815 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 816 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 817 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 818 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 819 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 820 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 821 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 822 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 823 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 824 // CHECK3: omp.body.continue: 825 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 826 // CHECK3: omp.inner.for.inc: 827 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 828 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 829 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 830 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 831 // CHECK3: omp.inner.for.end: 832 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 833 // CHECK3: omp.loop.exit: 834 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 835 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 836 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 837 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 838 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 839 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 840 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 841 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 842 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 843 // CHECK3-NEXT: ] 844 // CHECK3: .omp.reduction.case1: 845 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 846 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 847 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 848 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 849 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 850 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 851 // CHECK3: .omp.reduction.case2: 852 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 853 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 854 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 855 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 856 // CHECK3: .omp.reduction.default: 857 // CHECK3-NEXT: ret void 858 // 859 // 860 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 861 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 862 // CHECK3-NEXT: entry: 863 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 864 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 865 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 866 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 867 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 868 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 869 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 870 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 871 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 872 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 873 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 874 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 875 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 876 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 877 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 878 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 879 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 880 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 881 // CHECK3-NEXT: ret void 882 // 883 // 884 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 885 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat { 886 // CHECK3-NEXT: entry: 887 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 888 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 889 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 890 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 891 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 892 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 893 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4 894 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 895 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 896 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 897 // CHECK3-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32** 898 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 4 899 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 900 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 901 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[TMP4]], align 4 902 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 903 // CHECK3-NEXT: store i8* null, i8** [[TMP5]], align 4 904 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 905 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 906 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 907 // CHECK3-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 908 // CHECK3-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 909 // CHECK3-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 910 // CHECK3: omp_offload.failed: 911 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]] 912 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 913 // CHECK3: omp_offload.cont: 914 // CHECK3-NEXT: ret i32 0 915 // 916 // 917 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 918 // CHECK3-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 919 // CHECK3-NEXT: entry: 920 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 921 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 922 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 923 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[TMP0]]) 924 // CHECK3-NEXT: ret void 925 // 926 // 927 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 928 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 929 // CHECK3-NEXT: entry: 930 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 931 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 932 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 933 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 934 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 935 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 936 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 937 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 938 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 939 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 940 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 941 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 942 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 943 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 944 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 945 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 946 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4 947 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 948 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 949 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 950 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 951 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 952 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 953 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 954 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 955 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 956 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 957 // CHECK3: cond.true: 958 // CHECK3-NEXT: br label [[COND_END:%.*]] 959 // CHECK3: cond.false: 960 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 961 // CHECK3-NEXT: br label [[COND_END]] 962 // CHECK3: cond.end: 963 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 964 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 965 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 966 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 967 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 968 // CHECK3: omp.inner.for.cond: 969 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 970 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 971 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 972 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 973 // CHECK3: omp.inner.for.body: 974 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 975 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 976 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 977 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 978 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 979 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 980 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 981 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 982 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 983 // CHECK3: omp.body.continue: 984 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 985 // CHECK3: omp.inner.for.inc: 986 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 987 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 988 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 989 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 990 // CHECK3: omp.inner.for.end: 991 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 992 // CHECK3: omp.loop.exit: 993 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 994 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 995 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 996 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 997 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 998 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 999 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1000 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1001 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1002 // CHECK3-NEXT: ] 1003 // CHECK3: .omp.reduction.case1: 1004 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 1005 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 1006 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 1007 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 1008 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1009 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1010 // CHECK3: .omp.reduction.case2: 1011 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 1012 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 1013 // CHECK3-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1014 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1015 // CHECK3: .omp.reduction.default: 1016 // CHECK3-NEXT: ret void 1017 // 1018 // 1019 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 1020 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 1021 // CHECK3-NEXT: entry: 1022 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 1023 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 1024 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 1025 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 1026 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 1027 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1028 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 1029 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1030 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 1031 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 1032 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1033 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 1034 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 1035 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1036 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1037 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1038 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1039 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1040 // CHECK3-NEXT: ret void 1041 // 1042 // 1043 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1044 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] { 1045 // CHECK3-NEXT: entry: 1046 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1047 // CHECK3-NEXT: ret void 1048 // 1049 // 1050 // CHECK4-LABEL: define {{[^@]+}}@main 1051 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 1052 // CHECK4-NEXT: entry: 1053 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1054 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1055 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1056 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1057 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1058 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1059 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1060 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to i32** 1061 // CHECK4-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP1]], align 4 1062 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1063 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** 1064 // CHECK4-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP3]], align 4 1065 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1066 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4 1067 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1068 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1069 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 1070 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1071 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1072 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1073 // CHECK4: omp_offload.failed: 1074 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60(i32* @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 1075 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1076 // CHECK4: omp_offload.cont: 1077 // CHECK4-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1078 // CHECK4-NEXT: ret i32 [[CALL]] 1079 // 1080 // 1081 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l60 1082 // CHECK4-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 1083 // CHECK4-NEXT: entry: 1084 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 1085 // CHECK4-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 1086 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 1087 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 1088 // CHECK4-NEXT: ret void 1089 // 1090 // 1091 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1092 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 1093 // CHECK4-NEXT: entry: 1094 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1095 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1096 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 1097 // CHECK4-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1098 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1099 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1100 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1101 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1102 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1103 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1104 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1105 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 1106 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1107 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1108 // CHECK4-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 1109 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 1110 // CHECK4-NEXT: store i32 0, i32* [[SIVAR1]], align 4 1111 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1112 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1113 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1114 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1115 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1116 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1117 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1118 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1119 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1120 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1121 // CHECK4: cond.true: 1122 // CHECK4-NEXT: br label [[COND_END:%.*]] 1123 // CHECK4: cond.false: 1124 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1125 // CHECK4-NEXT: br label [[COND_END]] 1126 // CHECK4: cond.end: 1127 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1128 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1129 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1130 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1131 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1132 // CHECK4: omp.inner.for.cond: 1133 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1134 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1135 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1136 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1137 // CHECK4: omp.inner.for.body: 1138 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1139 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1140 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1141 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1142 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1143 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 1144 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 1145 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 1146 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1147 // CHECK4: omp.body.continue: 1148 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1149 // CHECK4: omp.inner.for.inc: 1150 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1151 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 1152 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 1153 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1154 // CHECK4: omp.inner.for.end: 1155 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1156 // CHECK4: omp.loop.exit: 1157 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1158 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1159 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 1160 // CHECK4-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 1161 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1162 // CHECK4-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 1163 // CHECK4-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1164 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1165 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1166 // CHECK4-NEXT: ] 1167 // CHECK4: .omp.reduction.case1: 1168 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 1169 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 1170 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 1171 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 1172 // CHECK4-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1173 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1174 // CHECK4: .omp.reduction.case2: 1175 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 1176 // CHECK4-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 1177 // CHECK4-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1178 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1179 // CHECK4: .omp.reduction.default: 1180 // CHECK4-NEXT: ret void 1181 // 1182 // 1183 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 1184 // CHECK4-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 1185 // CHECK4-NEXT: entry: 1186 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 1187 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 1188 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 1189 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 1190 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 1191 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1192 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 1193 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1194 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 1195 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 1196 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1197 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 1198 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 1199 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1200 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1201 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1202 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1203 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1204 // CHECK4-NEXT: ret void 1205 // 1206 // 1207 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1208 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] comdat { 1209 // CHECK4-NEXT: entry: 1210 // CHECK4-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1211 // CHECK4-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1212 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1213 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1214 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1215 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1216 // CHECK4-NEXT: store i32 0, i32* [[T_VAR]], align 4 1217 // CHECK4-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1218 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 1219 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1220 // CHECK4-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to i32** 1221 // CHECK4-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 4 1222 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1223 // CHECK4-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 1224 // CHECK4-NEXT: store i32* [[T_VAR]], i32** [[TMP4]], align 4 1225 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1226 // CHECK4-NEXT: store i8* null, i8** [[TMP5]], align 4 1227 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1228 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1229 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 1230 // CHECK4-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP6]], i8** [[TMP7]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.3, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1231 // CHECK4-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 1232 // CHECK4-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1233 // CHECK4: omp_offload.failed: 1234 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32* [[T_VAR]]) #[[ATTR2]] 1235 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1236 // CHECK4: omp_offload.cont: 1237 // CHECK4-NEXT: ret i32 0 1238 // 1239 // 1240 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 1241 // CHECK4-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1242 // CHECK4-NEXT: entry: 1243 // CHECK4-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 1244 // CHECK4-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 1245 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 1246 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[TMP0]]) 1247 // CHECK4-NEXT: ret void 1248 // 1249 // 1250 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1251 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1252 // CHECK4-NEXT: entry: 1253 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1254 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1255 // CHECK4-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 1256 // CHECK4-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1257 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1258 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1259 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1260 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1261 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1262 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1263 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1264 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 1265 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1266 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1267 // CHECK4-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 1268 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 1269 // CHECK4-NEXT: store i32 0, i32* [[T_VAR1]], align 4 1270 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1271 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1272 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1273 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1274 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1275 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1276 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1277 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1278 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1279 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1280 // CHECK4: cond.true: 1281 // CHECK4-NEXT: br label [[COND_END:%.*]] 1282 // CHECK4: cond.false: 1283 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1284 // CHECK4-NEXT: br label [[COND_END]] 1285 // CHECK4: cond.end: 1286 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1287 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1288 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1289 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1290 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1291 // CHECK4: omp.inner.for.cond: 1292 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1293 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1294 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1295 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1296 // CHECK4: omp.inner.for.body: 1297 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1298 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1299 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1300 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1301 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1302 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR1]], align 4 1303 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 1304 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 1305 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1306 // CHECK4: omp.body.continue: 1307 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1308 // CHECK4: omp.inner.for.inc: 1309 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1310 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 1311 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 1312 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1313 // CHECK4: omp.inner.for.end: 1314 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1315 // CHECK4: omp.loop.exit: 1316 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1317 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1318 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 1319 // CHECK4-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 1320 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1321 // CHECK4-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 1322 // CHECK4-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1323 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1324 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1325 // CHECK4-NEXT: ] 1326 // CHECK4: .omp.reduction.case1: 1327 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 1328 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 1329 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 1330 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 1331 // CHECK4-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1332 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1333 // CHECK4: .omp.reduction.case2: 1334 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 1335 // CHECK4-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 1336 // CHECK4-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1337 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1338 // CHECK4: .omp.reduction.default: 1339 // CHECK4-NEXT: ret void 1340 // 1341 // 1342 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 1343 // CHECK4-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 1344 // CHECK4-NEXT: entry: 1345 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 1346 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 1347 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 1348 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 1349 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 1350 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1351 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 1352 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1353 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 1354 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 1355 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1356 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 1357 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 1358 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1359 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1360 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1361 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1362 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1363 // CHECK4-NEXT: ret void 1364 // 1365 // 1366 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1367 // CHECK4-SAME: () #[[ATTR7:[0-9]+]] { 1368 // CHECK4-NEXT: entry: 1369 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1370 // CHECK4-NEXT: ret void 1371 // 1372 // 1373 // CHECK9-LABEL: define {{[^@]+}}@main 1374 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1375 // CHECK9-NEXT: entry: 1376 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1377 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1378 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1379 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]]) 1380 // CHECK9-NEXT: ret i32 0 1381 // 1382 // 1383 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44 1384 // CHECK9-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 1385 // CHECK9-NEXT: entry: 1386 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 1387 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 1388 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 1389 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 1390 // CHECK9-NEXT: ret void 1391 // 1392 // 1393 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1394 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 1395 // CHECK9-NEXT: entry: 1396 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1397 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1398 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 1399 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1400 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1401 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1402 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1403 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1404 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1405 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1406 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1407 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1408 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 1409 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1410 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1411 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 1412 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 1413 // CHECK9-NEXT: store i32 0, i32* [[SIVAR1]], align 4 1414 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1415 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1416 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1417 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1418 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1419 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1420 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1421 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1422 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1423 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1424 // CHECK9: cond.true: 1425 // CHECK9-NEXT: br label [[COND_END:%.*]] 1426 // CHECK9: cond.false: 1427 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1428 // CHECK9-NEXT: br label [[COND_END]] 1429 // CHECK9: cond.end: 1430 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1431 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1432 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1433 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1434 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1435 // CHECK9: omp.inner.for.cond: 1436 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1437 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1438 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1439 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1440 // CHECK9: omp.inner.for.body: 1441 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1442 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1443 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1444 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1445 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1446 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 1447 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 1448 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 1449 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1450 // CHECK9-NEXT: store i32* [[SIVAR1]], i32** [[TMP11]], align 8 1451 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef [[REF_TMP]]) 1452 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1453 // CHECK9: omp.body.continue: 1454 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1455 // CHECK9: omp.inner.for.inc: 1456 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1457 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 1458 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 1459 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1460 // CHECK9: omp.inner.for.end: 1461 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1462 // CHECK9: omp.loop.exit: 1463 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1464 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1465 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i32* [[SIVAR1]] to i8* 1466 // CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 1467 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1468 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP15]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 1469 // CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1470 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1471 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1472 // CHECK9-NEXT: ] 1473 // CHECK9: .omp.reduction.case1: 1474 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP0]], align 4 1475 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 1476 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1477 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 1478 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1479 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1480 // CHECK9: .omp.reduction.case2: 1481 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 1482 // CHECK9-NEXT: [[TMP20:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP19]] monotonic, align 4 1483 // CHECK9-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1484 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1485 // CHECK9: .omp.reduction.default: 1486 // CHECK9-NEXT: ret void 1487 // 1488 // 1489 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 1490 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 1491 // CHECK9-NEXT: entry: 1492 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1493 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1494 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1495 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1496 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1497 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1498 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1499 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1500 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1501 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1502 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1503 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 1504 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1505 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1506 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1507 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1508 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1509 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1510 // CHECK9-NEXT: ret void 1511 // 1512 // 1513 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1514 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1515 // CHECK9-NEXT: entry: 1516 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1517 // CHECK9-NEXT: ret void 1518 // 1519 // 1520 // CHECK10-LABEL: define {{[^@]+}}@main 1521 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1522 // CHECK10-NEXT: entry: 1523 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1524 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1525 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1526 // CHECK10-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef [[REF_TMP]]) 1527 // CHECK10-NEXT: ret i32 0 1528 // 1529 // 1530 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44 1531 // CHECK10-SAME: (i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 1532 // CHECK10-NEXT: entry: 1533 // CHECK10-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 1534 // CHECK10-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 1535 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 1536 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[TMP0]]) 1537 // CHECK10-NEXT: ret void 1538 // 1539 // 1540 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1541 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 1542 // CHECK10-NEXT: entry: 1543 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1544 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1545 // CHECK10-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 1546 // CHECK10-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1547 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1548 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1549 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1550 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1551 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1552 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1553 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1554 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1555 // CHECK10-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 1556 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1557 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1558 // CHECK10-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 1559 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 1560 // CHECK10-NEXT: store i32 0, i32* [[SIVAR1]], align 4 1561 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1562 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1563 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1564 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1565 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1566 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1567 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1568 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1569 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1570 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1571 // CHECK10: cond.true: 1572 // CHECK10-NEXT: br label [[COND_END:%.*]] 1573 // CHECK10: cond.false: 1574 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1575 // CHECK10-NEXT: br label [[COND_END]] 1576 // CHECK10: cond.end: 1577 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1578 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1579 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1580 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1581 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1582 // CHECK10: omp.inner.for.cond: 1583 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1584 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1585 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1586 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1587 // CHECK10: omp.inner.for.body: 1588 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1589 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1590 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1591 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1592 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1593 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[SIVAR1]], align 4 1594 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 1595 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 1596 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1597 // CHECK10-NEXT: store i32* [[SIVAR1]], i32** [[TMP11]], align 8 1598 // CHECK10-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef [[REF_TMP]]) 1599 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1600 // CHECK10: omp.body.continue: 1601 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1602 // CHECK10: omp.inner.for.inc: 1603 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1604 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 1605 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 1606 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1607 // CHECK10: omp.inner.for.end: 1608 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1609 // CHECK10: omp.loop.exit: 1610 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1611 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1612 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast i32* [[SIVAR1]] to i8* 1613 // CHECK10-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 1614 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1615 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP15]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 1616 // CHECK10-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1617 // CHECK10-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1618 // CHECK10-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1619 // CHECK10-NEXT: ] 1620 // CHECK10: .omp.reduction.case1: 1621 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP0]], align 4 1622 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 1623 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1624 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 1625 // CHECK10-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1626 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1627 // CHECK10: .omp.reduction.case2: 1628 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 1629 // CHECK10-NEXT: [[TMP20:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP19]] monotonic, align 4 1630 // CHECK10-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1631 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1632 // CHECK10: .omp.reduction.default: 1633 // CHECK10-NEXT: ret void 1634 // 1635 // 1636 // CHECK10-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 1637 // CHECK10-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 1638 // CHECK10-NEXT: entry: 1639 // CHECK10-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1640 // CHECK10-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1641 // CHECK10-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1642 // CHECK10-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1643 // CHECK10-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1644 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1645 // CHECK10-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1646 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1647 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1648 // CHECK10-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1649 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1650 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 1651 // CHECK10-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1652 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1653 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1654 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1655 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1656 // CHECK10-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1657 // CHECK10-NEXT: ret void 1658 // 1659 // 1660 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1661 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 1662 // CHECK10-NEXT: entry: 1663 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 1664 // CHECK10-NEXT: ret void 1665 // 1666