1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 // Test host codegen. 6 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK2 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 21 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region) 22 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 23 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK10 24 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 25 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 26 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 27 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK12 28 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 29 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 30 31 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 32 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 34 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 35 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 36 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 37 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 38 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 39 40 #ifdef CK1 41 42 43 int target_teams_fun(int *g){ 44 int n = 1000; 45 int a[1000]; 46 int te = n / 128; 47 int th = 128; 48 // discard n_addr 49 // discard capture expressions for te and th 50 51 #pragma omp target teams distribute parallel for num_teams(te), thread_limit(th) 52 for(int i = 0; i < n; i++) { 53 a[i] = 0; 54 #pragma omp cancel for 55 } 56 57 {{{ 58 #pragma omp target teams distribute parallel for is_device_ptr(g) 59 for(int i = 0; i < n; i++) { 60 a[i] = g[0]; 61 } 62 }}} 63 64 // outlined target regions 65 66 67 68 69 return a[0]; 70 } 71 72 #endif // CK1 73 #endif // HEADER 74 // CHECK1-LABEL: define {{[^@]+}}@_Z16target_teams_funPi 75 // CHECK1-SAME: (i32* noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] { 76 // CHECK1-NEXT: entry: 77 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 78 // CHECK1-NEXT: [[N:%.*]] = alloca i32, align 4 79 // CHECK1-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4 80 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4 81 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4 82 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 83 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 84 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 85 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 86 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i64, align 8 87 // CHECK1-NEXT: [[N_CASTED5:%.*]] = alloca i64, align 8 88 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 89 // CHECK1-NEXT: store i32 1000, i32* [[N]], align 4 90 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 91 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 92 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 93 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4 94 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 95 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 96 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 97 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 98 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 99 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 100 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 101 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 102 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 103 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 104 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 105 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 106 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 107 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED3]] to i32* 108 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[CONV4]], align 4 109 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED3]], align 8 110 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i64 [[TMP4]], [1000 x i32]* [[A]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2:[0-9]+]] 111 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4 112 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED5]] to i32* 113 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[CONV6]], align 4 114 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[N_CASTED5]], align 8 115 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[G_ADDR]], align 8 116 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58(i64 [[TMP10]], [1000 x i32]* [[A]], i32* [[TMP11]]) #[[ATTR2]] 117 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0 118 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 119 // CHECK1-NEXT: ret i32 [[TMP12]] 120 // 121 // 122 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 123 // CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] { 124 // CHECK1-NEXT: entry: 125 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 126 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 127 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 128 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 129 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 130 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 131 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 132 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 133 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 134 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 135 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 136 // CHECK1-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 137 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 138 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 139 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV3]], align 4 140 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV4]], align 4 141 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 142 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 143 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[N_CASTED]] to i32* 144 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV5]], align 4 145 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[N_CASTED]], align 8 146 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], [1000 x i32]* [[TMP1]]) 147 // CHECK1-NEXT: ret void 148 // 149 // 150 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 151 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 152 // CHECK1-NEXT: entry: 153 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 154 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 155 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 156 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 157 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 158 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 159 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 160 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 161 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 162 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 163 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 166 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 168 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 169 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 170 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 171 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 172 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 173 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 174 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 175 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 176 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 177 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 178 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 179 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 180 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 181 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 182 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 183 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 184 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 185 // CHECK1: omp.precond.then: 186 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 187 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 188 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 189 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 190 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 191 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 192 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 193 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 194 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 195 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 196 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 197 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 198 // CHECK1: cond.true: 199 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 200 // CHECK1-NEXT: br label [[COND_END:%.*]] 201 // CHECK1: cond.false: 202 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 203 // CHECK1-NEXT: br label [[COND_END]] 204 // CHECK1: cond.end: 205 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 206 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 207 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 208 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 209 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 210 // CHECK1: omp.inner.for.cond: 211 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 212 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 213 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 214 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 215 // CHECK1: omp.inner.for.body: 216 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 217 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 218 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 219 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 220 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 221 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 222 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 223 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 224 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]]) 225 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 226 // CHECK1: omp.inner.for.inc: 227 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 228 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 229 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 230 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 231 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 232 // CHECK1: omp.inner.for.end: 233 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 234 // CHECK1: omp.loop.exit: 235 // CHECK1-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 236 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 237 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 238 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 239 // CHECK1: omp.precond.end: 240 // CHECK1-NEXT: ret void 241 // 242 // 243 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 244 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 245 // CHECK1-NEXT: entry: 246 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 247 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 248 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 249 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 250 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 251 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 252 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 253 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 254 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 255 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 256 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 257 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 258 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 259 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 260 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 261 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 262 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 263 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 264 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 265 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 266 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 267 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 268 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 269 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 270 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 271 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 272 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 273 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 274 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 275 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 276 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 277 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 278 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 279 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 280 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 281 // CHECK1: omp.precond.then: 282 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 283 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 284 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 285 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 286 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 287 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 288 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 289 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 290 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 291 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 292 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 293 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 294 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 295 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 296 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 297 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 298 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 299 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 300 // CHECK1: cond.true: 301 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 302 // CHECK1-NEXT: br label [[COND_END:%.*]] 303 // CHECK1: cond.false: 304 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 305 // CHECK1-NEXT: br label [[COND_END]] 306 // CHECK1: cond.end: 307 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 308 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 309 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 310 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 311 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 312 // CHECK1: omp.inner.for.cond: 313 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 314 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 315 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 316 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 317 // CHECK1: omp.inner.for.body: 318 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 319 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 320 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 321 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 322 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[I5]], align 4 323 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 324 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 325 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 326 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 327 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 328 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP19]], i32 2) 329 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 330 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 331 // CHECK1: .cancel.exit: 332 // CHECK1-NEXT: br label [[CANCEL_EXIT:%.*]] 333 // CHECK1: .cancel.continue: 334 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 335 // CHECK1: omp.body.continue: 336 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 337 // CHECK1: omp.inner.for.inc: 338 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 339 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 340 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 341 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 342 // CHECK1: omp.inner.for.end: 343 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 344 // CHECK1: omp.loop.exit: 345 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 346 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 347 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 348 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 349 // CHECK1: cancel.exit: 350 // CHECK1-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 351 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 352 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 353 // CHECK1-NEXT: br label [[CANCEL_CONT:%.*]] 354 // CHECK1: omp.precond.end: 355 // CHECK1-NEXT: br label [[CANCEL_CONT]] 356 // CHECK1: cancel.cont: 357 // CHECK1-NEXT: ret void 358 // 359 // 360 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 361 // CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 362 // CHECK1-NEXT: entry: 363 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 364 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 365 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 366 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 367 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 368 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 369 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 370 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 371 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 372 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 373 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 374 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4 375 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 376 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8 377 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]]) 378 // CHECK1-NEXT: ret void 379 // 380 // 381 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 382 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 383 // CHECK1-NEXT: entry: 384 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 385 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 386 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 387 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 388 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 389 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 390 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 391 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 392 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 393 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 394 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 395 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 396 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 397 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 398 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 399 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 400 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 401 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 402 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 403 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 404 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 405 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 406 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 407 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 408 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 409 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 410 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 411 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 412 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 413 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 414 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 415 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 416 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 417 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 418 // CHECK1: omp.precond.then: 419 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 420 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 421 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 422 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 423 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 424 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 425 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 426 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 427 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 428 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 429 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 430 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 431 // CHECK1: cond.true: 432 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 433 // CHECK1-NEXT: br label [[COND_END:%.*]] 434 // CHECK1: cond.false: 435 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 436 // CHECK1-NEXT: br label [[COND_END]] 437 // CHECK1: cond.end: 438 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 439 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 440 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 441 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 442 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 443 // CHECK1: omp.inner.for.cond: 444 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 445 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 446 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 447 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 448 // CHECK1: omp.inner.for.body: 449 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 450 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 451 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 452 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 453 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 454 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 455 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 456 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 457 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8 458 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]]) 459 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 460 // CHECK1: omp.inner.for.inc: 461 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 462 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 463 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 464 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 465 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 466 // CHECK1: omp.inner.for.end: 467 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 468 // CHECK1: omp.loop.exit: 469 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 470 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 471 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 472 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 473 // CHECK1: omp.precond.end: 474 // CHECK1-NEXT: ret void 475 // 476 // 477 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 478 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 479 // CHECK1-NEXT: entry: 480 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 481 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 482 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 483 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 484 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 485 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 486 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 487 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 488 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 489 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 490 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 491 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 492 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 493 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 494 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 495 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 496 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 497 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 498 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 499 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 500 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 501 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 502 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 503 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 504 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 505 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 506 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 507 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 508 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 509 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 510 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 511 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 512 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 513 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 514 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 515 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 516 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 517 // CHECK1: omp.precond.then: 518 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 519 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 520 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 521 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 522 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 523 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 524 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 525 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 526 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 527 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 528 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 529 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 530 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 531 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 532 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 533 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 534 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 535 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 536 // CHECK1: cond.true: 537 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 538 // CHECK1-NEXT: br label [[COND_END:%.*]] 539 // CHECK1: cond.false: 540 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 541 // CHECK1-NEXT: br label [[COND_END]] 542 // CHECK1: cond.end: 543 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 544 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 545 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 546 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 547 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 548 // CHECK1: omp.inner.for.cond: 549 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 550 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 551 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 552 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 553 // CHECK1: omp.inner.for.body: 554 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 555 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 556 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 557 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 558 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8 559 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0 560 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 561 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 562 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 563 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 564 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4 565 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 566 // CHECK1: omp.body.continue: 567 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 568 // CHECK1: omp.inner.for.inc: 569 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 570 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 571 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 572 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 573 // CHECK1: omp.inner.for.end: 574 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 575 // CHECK1: omp.loop.exit: 576 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 577 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 578 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 579 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 580 // CHECK1: omp.precond.end: 581 // CHECK1-NEXT: ret void 582 // 583 // 584 // CHECK2-LABEL: define {{[^@]+}}@_Z16target_teams_funPi 585 // CHECK2-SAME: (i32* noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] { 586 // CHECK2-NEXT: entry: 587 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 588 // CHECK2-NEXT: [[N:%.*]] = alloca i32, align 4 589 // CHECK2-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4 590 // CHECK2-NEXT: [[TE:%.*]] = alloca i32, align 4 591 // CHECK2-NEXT: [[TH:%.*]] = alloca i32, align 4 592 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 593 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 594 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 595 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 596 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i64, align 8 597 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 598 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 599 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 600 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 601 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 602 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4 603 // CHECK2-NEXT: [[N_CASTED9:%.*]] = alloca i64, align 8 604 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [3 x i8*], align 8 605 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [3 x i8*], align 8 606 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [3 x i8*], align 8 607 // CHECK2-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 608 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_15:%.*]] = alloca i32, align 4 609 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4 610 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 611 // CHECK2-NEXT: store i32 1000, i32* [[N]], align 4 612 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 613 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 614 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 615 // CHECK2-NEXT: store i32 128, i32* [[TH]], align 4 616 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 617 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 618 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 619 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 620 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 621 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 622 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 623 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 624 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 625 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 626 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 627 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 628 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 629 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED3]] to i32* 630 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[CONV4]], align 4 631 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED3]], align 8 632 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 633 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 634 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 635 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 636 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 637 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP12]], align 8 638 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 639 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8 640 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 641 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [1000 x i32]** 642 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP15]], align 8 643 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 644 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [1000 x i32]** 645 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP17]], align 8 646 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 647 // CHECK2-NEXT: store i8* null, i8** [[TMP18]], align 8 648 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 649 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 650 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8 651 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 652 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64* 653 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP22]], align 8 654 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 655 // CHECK2-NEXT: store i8* null, i8** [[TMP23]], align 8 656 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 657 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 658 // CHECK2-NEXT: store i64 [[TMP8]], i64* [[TMP25]], align 8 659 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 660 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 661 // CHECK2-NEXT: store i64 [[TMP8]], i64* [[TMP27]], align 8 662 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 663 // CHECK2-NEXT: store i8* null, i8** [[TMP28]], align 8 664 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 665 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 666 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 667 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 668 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 669 // CHECK2-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_5]], align 4 670 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 671 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 672 // CHECK2-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB]], 1 673 // CHECK2-NEXT: [[SUB8:%.*]] = sub nsw i32 [[DIV7]], 1 674 // CHECK2-NEXT: store i32 [[SUB8]], i32* [[DOTCAPTURE_EXPR_6]], align 4 675 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_6]], align 4 676 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 677 // CHECK2-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 678 // CHECK2-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 679 // CHECK2-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 680 // CHECK2-NEXT: store i32 1, i32* [[TMP37]], align 4 681 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 682 // CHECK2-NEXT: store i32 4, i32* [[TMP38]], align 4 683 // CHECK2-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 684 // CHECK2-NEXT: store i8** [[TMP29]], i8*** [[TMP39]], align 8 685 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 686 // CHECK2-NEXT: store i8** [[TMP30]], i8*** [[TMP40]], align 8 687 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 688 // CHECK2-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP41]], align 8 689 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 690 // CHECK2-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP42]], align 8 691 // CHECK2-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 692 // CHECK2-NEXT: store i8** null, i8*** [[TMP43]], align 8 693 // CHECK2-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 694 // CHECK2-NEXT: store i8** null, i8*** [[TMP44]], align 8 695 // CHECK2-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 696 // CHECK2-NEXT: store i64 [[TMP36]], i64* [[TMP45]], align 8 697 // CHECK2-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP31]], i32 [[TMP32]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 698 // CHECK2-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 699 // CHECK2-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 700 // CHECK2: omp_offload.failed: 701 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i64 [[TMP4]], [1000 x i32]* [[A]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2:[0-9]+]] 702 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 703 // CHECK2: omp_offload.cont: 704 // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[N]], align 4 705 // CHECK2-NEXT: [[CONV10:%.*]] = bitcast i64* [[N_CASTED9]] to i32* 706 // CHECK2-NEXT: store i32 [[TMP48]], i32* [[CONV10]], align 4 707 // CHECK2-NEXT: [[TMP49:%.*]] = load i64, i64* [[N_CASTED9]], align 8 708 // CHECK2-NEXT: [[TMP50:%.*]] = load i32*, i32** [[G_ADDR]], align 8 709 // CHECK2-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 710 // CHECK2-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i64* 711 // CHECK2-NEXT: store i64 [[TMP49]], i64* [[TMP52]], align 8 712 // CHECK2-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 713 // CHECK2-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i64* 714 // CHECK2-NEXT: store i64 [[TMP49]], i64* [[TMP54]], align 8 715 // CHECK2-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0 716 // CHECK2-NEXT: store i8* null, i8** [[TMP55]], align 8 717 // CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 1 718 // CHECK2-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [1000 x i32]** 719 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP57]], align 8 720 // CHECK2-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 1 721 // CHECK2-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to [1000 x i32]** 722 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP59]], align 8 723 // CHECK2-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 1 724 // CHECK2-NEXT: store i8* null, i8** [[TMP60]], align 8 725 // CHECK2-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 2 726 // CHECK2-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32** 727 // CHECK2-NEXT: store i32* [[TMP50]], i32** [[TMP62]], align 8 728 // CHECK2-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 2 729 // CHECK2-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i32** 730 // CHECK2-NEXT: store i32* [[TMP50]], i32** [[TMP64]], align 8 731 // CHECK2-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 2 732 // CHECK2-NEXT: store i8* null, i8** [[TMP65]], align 8 733 // CHECK2-NEXT: [[TMP66:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 734 // CHECK2-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 735 // CHECK2-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 736 // CHECK2-NEXT: store i32 [[TMP68]], i32* [[DOTCAPTURE_EXPR_15]], align 4 737 // CHECK2-NEXT: [[TMP69:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_15]], align 4 738 // CHECK2-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP69]], 0 739 // CHECK2-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 740 // CHECK2-NEXT: [[SUB19:%.*]] = sub nsw i32 [[DIV18]], 1 741 // CHECK2-NEXT: store i32 [[SUB19]], i32* [[DOTCAPTURE_EXPR_16]], align 4 742 // CHECK2-NEXT: [[TMP70:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4 743 // CHECK2-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP70]], 1 744 // CHECK2-NEXT: [[TMP71:%.*]] = zext i32 [[ADD20]] to i64 745 // CHECK2-NEXT: [[KERNEL_ARGS21:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 746 // CHECK2-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS21]], i32 0, i32 0 747 // CHECK2-NEXT: store i32 1, i32* [[TMP72]], align 4 748 // CHECK2-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS21]], i32 0, i32 1 749 // CHECK2-NEXT: store i32 3, i32* [[TMP73]], align 4 750 // CHECK2-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS21]], i32 0, i32 2 751 // CHECK2-NEXT: store i8** [[TMP66]], i8*** [[TMP74]], align 8 752 // CHECK2-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS21]], i32 0, i32 3 753 // CHECK2-NEXT: store i8** [[TMP67]], i8*** [[TMP75]], align 8 754 // CHECK2-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS21]], i32 0, i32 4 755 // CHECK2-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP76]], align 8 756 // CHECK2-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS21]], i32 0, i32 5 757 // CHECK2-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP77]], align 8 758 // CHECK2-NEXT: [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS21]], i32 0, i32 6 759 // CHECK2-NEXT: store i8** null, i8*** [[TMP78]], align 8 760 // CHECK2-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS21]], i32 0, i32 7 761 // CHECK2-NEXT: store i8** null, i8*** [[TMP79]], align 8 762 // CHECK2-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS21]], i32 0, i32 8 763 // CHECK2-NEXT: store i64 [[TMP71]], i64* [[TMP80]], align 8 764 // CHECK2-NEXT: [[TMP81:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS21]]) 765 // CHECK2-NEXT: [[TMP82:%.*]] = icmp ne i32 [[TMP81]], 0 766 // CHECK2-NEXT: br i1 [[TMP82]], label [[OMP_OFFLOAD_FAILED22:%.*]], label [[OMP_OFFLOAD_CONT23:%.*]] 767 // CHECK2: omp_offload.failed22: 768 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58(i64 [[TMP49]], [1000 x i32]* [[A]], i32* [[TMP50]]) #[[ATTR2]] 769 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT23]] 770 // CHECK2: omp_offload.cont23: 771 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0 772 // CHECK2-NEXT: [[TMP83:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 773 // CHECK2-NEXT: ret i32 [[TMP83]] 774 // 775 // 776 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 777 // CHECK2-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] { 778 // CHECK2-NEXT: entry: 779 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 780 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 781 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 782 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 783 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 784 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 785 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 786 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 787 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 788 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 789 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 790 // CHECK2-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 791 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 792 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 793 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV3]], align 4 794 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV4]], align 4 795 // CHECK2-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 796 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 797 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[N_CASTED]] to i32* 798 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[CONV5]], align 4 799 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[N_CASTED]], align 8 800 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], [1000 x i32]* [[TMP1]]) 801 // CHECK2-NEXT: ret void 802 // 803 // 804 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 805 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 806 // CHECK2-NEXT: entry: 807 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 808 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 809 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 810 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 811 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 812 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 813 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 814 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 815 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 816 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 817 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 818 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 819 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 820 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 821 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 822 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 823 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 824 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 825 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 826 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 827 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 828 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 829 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 830 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 831 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 832 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 833 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 834 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 835 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 836 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 837 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 838 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 839 // CHECK2: omp.precond.then: 840 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 841 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 842 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 843 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 844 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 845 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 846 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 847 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 848 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 849 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 850 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 851 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 852 // CHECK2: cond.true: 853 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 854 // CHECK2-NEXT: br label [[COND_END:%.*]] 855 // CHECK2: cond.false: 856 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 857 // CHECK2-NEXT: br label [[COND_END]] 858 // CHECK2: cond.end: 859 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 860 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 861 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 862 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 863 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 864 // CHECK2: omp.inner.for.cond: 865 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 866 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 867 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 868 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 869 // CHECK2: omp.inner.for.body: 870 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 871 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 872 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 873 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 874 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 875 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 876 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 877 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 878 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]]) 879 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 880 // CHECK2: omp.inner.for.inc: 881 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 882 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 883 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 884 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 885 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 886 // CHECK2: omp.inner.for.end: 887 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 888 // CHECK2: omp.loop.exit: 889 // CHECK2-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 890 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 891 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 892 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 893 // CHECK2: omp.precond.end: 894 // CHECK2-NEXT: ret void 895 // 896 // 897 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 898 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 899 // CHECK2-NEXT: entry: 900 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 901 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 902 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 903 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 904 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 905 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 906 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 907 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 908 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 909 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 910 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 911 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 912 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 913 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 914 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 915 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4 916 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 917 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 918 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 919 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 920 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 921 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 922 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 923 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 924 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 925 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 926 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 927 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 928 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 929 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 930 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 931 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 932 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 933 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 934 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 935 // CHECK2: omp.precond.then: 936 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 937 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 938 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 939 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 940 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 941 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 942 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 943 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 944 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 945 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 946 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 947 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 948 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 949 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 950 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 951 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 952 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 953 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 954 // CHECK2: cond.true: 955 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 956 // CHECK2-NEXT: br label [[COND_END:%.*]] 957 // CHECK2: cond.false: 958 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 959 // CHECK2-NEXT: br label [[COND_END]] 960 // CHECK2: cond.end: 961 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 962 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 963 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 964 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 965 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 966 // CHECK2: omp.inner.for.cond: 967 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 968 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 969 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 970 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 971 // CHECK2: omp.inner.for.body: 972 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 973 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 974 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 975 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 976 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[I5]], align 4 977 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 978 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 979 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 980 // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 981 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 982 // CHECK2-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP19]], i32 2) 983 // CHECK2-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 984 // CHECK2-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 985 // CHECK2: .cancel.exit: 986 // CHECK2-NEXT: br label [[CANCEL_EXIT:%.*]] 987 // CHECK2: .cancel.continue: 988 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 989 // CHECK2: omp.body.continue: 990 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 991 // CHECK2: omp.inner.for.inc: 992 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 993 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 994 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 995 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 996 // CHECK2: omp.inner.for.end: 997 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 998 // CHECK2: omp.loop.exit: 999 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1000 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1001 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1002 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1003 // CHECK2: cancel.exit: 1004 // CHECK2-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1005 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1006 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 1007 // CHECK2-NEXT: br label [[CANCEL_CONT:%.*]] 1008 // CHECK2: omp.precond.end: 1009 // CHECK2-NEXT: br label [[CANCEL_CONT]] 1010 // CHECK2: cancel.cont: 1011 // CHECK2-NEXT: ret void 1012 // 1013 // 1014 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 1015 // CHECK2-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1016 // CHECK2-NEXT: entry: 1017 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1018 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 1019 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 1020 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1021 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1022 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 1023 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 1024 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1025 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 1026 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1027 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1028 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4 1029 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 1030 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8 1031 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]]) 1032 // CHECK2-NEXT: ret void 1033 // 1034 // 1035 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1036 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1037 // CHECK2-NEXT: entry: 1038 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1039 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1040 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1041 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 1042 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 1043 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1044 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1045 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1046 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1047 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1048 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1049 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1050 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1051 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1052 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 1053 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1054 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1055 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1056 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1057 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 1058 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 1059 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1060 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 1061 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1062 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1063 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1064 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1065 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1066 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1067 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1068 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 1069 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1070 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1071 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1072 // CHECK2: omp.precond.then: 1073 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1074 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1075 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 1076 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1077 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1078 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1079 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1080 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1081 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1082 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1083 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1084 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1085 // CHECK2: cond.true: 1086 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1087 // CHECK2-NEXT: br label [[COND_END:%.*]] 1088 // CHECK2: cond.false: 1089 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1090 // CHECK2-NEXT: br label [[COND_END]] 1091 // CHECK2: cond.end: 1092 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1093 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1094 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1095 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 1096 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1097 // CHECK2: omp.inner.for.cond: 1098 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1099 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1100 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1101 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1102 // CHECK2: omp.inner.for.body: 1103 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1104 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 1105 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1106 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 1107 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 1108 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1109 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 1110 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 1111 // CHECK2-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8 1112 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]]) 1113 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1114 // CHECK2: omp.inner.for.inc: 1115 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1116 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1117 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1118 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1119 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1120 // CHECK2: omp.inner.for.end: 1121 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1122 // CHECK2: omp.loop.exit: 1123 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1124 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1125 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1126 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1127 // CHECK2: omp.precond.end: 1128 // CHECK2-NEXT: ret void 1129 // 1130 // 1131 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1132 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1133 // CHECK2-NEXT: entry: 1134 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1135 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1136 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1137 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1138 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1139 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 1140 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 1141 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1142 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1143 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1144 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1145 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1146 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1147 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1148 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1149 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1150 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4 1151 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1152 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1153 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1154 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1155 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1156 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 1157 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 1158 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1159 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 1160 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1161 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1162 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1163 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1164 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1165 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1166 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1167 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 1168 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1169 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1170 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1171 // CHECK2: omp.precond.then: 1172 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1173 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1174 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 1175 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1176 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 1177 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1178 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 1179 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 1180 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 1181 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1182 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1183 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1184 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1185 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1186 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1187 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1188 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1189 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1190 // CHECK2: cond.true: 1191 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1192 // CHECK2-NEXT: br label [[COND_END:%.*]] 1193 // CHECK2: cond.false: 1194 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1195 // CHECK2-NEXT: br label [[COND_END]] 1196 // CHECK2: cond.end: 1197 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1198 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1199 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1200 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1201 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1202 // CHECK2: omp.inner.for.cond: 1203 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1204 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1205 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1206 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1207 // CHECK2: omp.inner.for.body: 1208 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1209 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1210 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1211 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 1212 // CHECK2-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8 1213 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0 1214 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1215 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 1216 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 1217 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1218 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4 1219 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1220 // CHECK2: omp.body.continue: 1221 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1222 // CHECK2: omp.inner.for.inc: 1223 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1224 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 1225 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 1226 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1227 // CHECK2: omp.inner.for.end: 1228 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1229 // CHECK2: omp.loop.exit: 1230 // CHECK2-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1231 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1232 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1233 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1234 // CHECK2: omp.precond.end: 1235 // CHECK2-NEXT: ret void 1236 // 1237 // 1238 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1239 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 1240 // CHECK2-NEXT: entry: 1241 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 1242 // CHECK2-NEXT: ret void 1243 // 1244 // 1245 // CHECK4-LABEL: define {{[^@]+}}@_Z16target_teams_funPi 1246 // CHECK4-SAME: (i32* noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] { 1247 // CHECK4-NEXT: entry: 1248 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 1249 // CHECK4-NEXT: [[N:%.*]] = alloca i32, align 4 1250 // CHECK4-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4 1251 // CHECK4-NEXT: [[TE:%.*]] = alloca i32, align 4 1252 // CHECK4-NEXT: [[TH:%.*]] = alloca i32, align 4 1253 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1254 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1255 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1256 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 1257 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4 1258 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 1259 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 1260 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 1261 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1262 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1263 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1264 // CHECK4-NEXT: [[N_CASTED7:%.*]] = alloca i32, align 4 1265 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x i8*], align 4 1266 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x i8*], align 4 1267 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x i8*], align 4 1268 // CHECK4-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 1269 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 1270 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 1271 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 1272 // CHECK4-NEXT: store i32 1000, i32* [[N]], align 4 1273 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1274 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1275 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1276 // CHECK4-NEXT: store i32 128, i32* [[TH]], align 4 1277 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 1278 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1279 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 1280 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1281 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 1282 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4 1283 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4 1284 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1285 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 1286 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 1287 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1288 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4 1289 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4 1290 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1291 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 1292 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP10]], align 4 1293 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1294 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 1295 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP12]], align 4 1296 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1297 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4 1298 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1299 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [1000 x i32]** 1300 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP15]], align 4 1301 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1302 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [1000 x i32]** 1303 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP17]], align 4 1304 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1305 // CHECK4-NEXT: store i8* null, i8** [[TMP18]], align 4 1306 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1307 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 1308 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4 1309 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1310 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32* 1311 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP22]], align 4 1312 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1313 // CHECK4-NEXT: store i8* null, i8** [[TMP23]], align 4 1314 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1315 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 1316 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP25]], align 4 1317 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1318 // CHECK4-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 1319 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP27]], align 4 1320 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1321 // CHECK4-NEXT: store i8* null, i8** [[TMP28]], align 4 1322 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1323 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1324 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1325 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1326 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 1327 // CHECK4-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1328 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1329 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 1330 // CHECK4-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB]], 1 1331 // CHECK4-NEXT: [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1 1332 // CHECK4-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1333 // CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1334 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 1335 // CHECK4-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 1336 // CHECK4-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1337 // CHECK4-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1338 // CHECK4-NEXT: store i32 1, i32* [[TMP37]], align 4 1339 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1340 // CHECK4-NEXT: store i32 4, i32* [[TMP38]], align 4 1341 // CHECK4-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1342 // CHECK4-NEXT: store i8** [[TMP29]], i8*** [[TMP39]], align 4 1343 // CHECK4-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1344 // CHECK4-NEXT: store i8** [[TMP30]], i8*** [[TMP40]], align 4 1345 // CHECK4-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1346 // CHECK4-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP41]], align 4 1347 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1348 // CHECK4-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP42]], align 4 1349 // CHECK4-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1350 // CHECK4-NEXT: store i8** null, i8*** [[TMP43]], align 4 1351 // CHECK4-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1352 // CHECK4-NEXT: store i8** null, i8*** [[TMP44]], align 4 1353 // CHECK4-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1354 // CHECK4-NEXT: store i64 [[TMP36]], i64* [[TMP45]], align 8 1355 // CHECK4-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP31]], i32 [[TMP32]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1356 // CHECK4-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 1357 // CHECK4-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1358 // CHECK4: omp_offload.failed: 1359 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i32 [[TMP4]], [1000 x i32]* [[A]], i32 [[TMP6]], i32 [[TMP8]]) #[[ATTR2:[0-9]+]] 1360 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1361 // CHECK4: omp_offload.cont: 1362 // CHECK4-NEXT: [[TMP48:%.*]] = load i32, i32* [[N]], align 4 1363 // CHECK4-NEXT: store i32 [[TMP48]], i32* [[N_CASTED7]], align 4 1364 // CHECK4-NEXT: [[TMP49:%.*]] = load i32, i32* [[N_CASTED7]], align 4 1365 // CHECK4-NEXT: [[TMP50:%.*]] = load i32*, i32** [[G_ADDR]], align 4 1366 // CHECK4-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 1367 // CHECK4-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32* 1368 // CHECK4-NEXT: store i32 [[TMP49]], i32* [[TMP52]], align 4 1369 // CHECK4-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 1370 // CHECK4-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32* 1371 // CHECK4-NEXT: store i32 [[TMP49]], i32* [[TMP54]], align 4 1372 // CHECK4-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 1373 // CHECK4-NEXT: store i8* null, i8** [[TMP55]], align 4 1374 // CHECK4-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 1375 // CHECK4-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [1000 x i32]** 1376 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP57]], align 4 1377 // CHECK4-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 1378 // CHECK4-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to [1000 x i32]** 1379 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP59]], align 4 1380 // CHECK4-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1 1381 // CHECK4-NEXT: store i8* null, i8** [[TMP60]], align 4 1382 // CHECK4-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2 1383 // CHECK4-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32** 1384 // CHECK4-NEXT: store i32* [[TMP50]], i32** [[TMP62]], align 4 1385 // CHECK4-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 2 1386 // CHECK4-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i32** 1387 // CHECK4-NEXT: store i32* [[TMP50]], i32** [[TMP64]], align 4 1388 // CHECK4-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 2 1389 // CHECK4-NEXT: store i8* null, i8** [[TMP65]], align 4 1390 // CHECK4-NEXT: [[TMP66:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 1391 // CHECK4-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 1392 // CHECK4-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 1393 // CHECK4-NEXT: store i32 [[TMP68]], i32* [[DOTCAPTURE_EXPR_12]], align 4 1394 // CHECK4-NEXT: [[TMP69:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 1395 // CHECK4-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP69]], 0 1396 // CHECK4-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 1397 // CHECK4-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1 1398 // CHECK4-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4 1399 // CHECK4-NEXT: [[TMP70:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1400 // CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP70]], 1 1401 // CHECK4-NEXT: [[TMP71:%.*]] = zext i32 [[ADD17]] to i64 1402 // CHECK4-NEXT: [[KERNEL_ARGS18:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1403 // CHECK4-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 0 1404 // CHECK4-NEXT: store i32 1, i32* [[TMP72]], align 4 1405 // CHECK4-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 1 1406 // CHECK4-NEXT: store i32 3, i32* [[TMP73]], align 4 1407 // CHECK4-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 2 1408 // CHECK4-NEXT: store i8** [[TMP66]], i8*** [[TMP74]], align 4 1409 // CHECK4-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 3 1410 // CHECK4-NEXT: store i8** [[TMP67]], i8*** [[TMP75]], align 4 1411 // CHECK4-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 4 1412 // CHECK4-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP76]], align 4 1413 // CHECK4-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 5 1414 // CHECK4-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP77]], align 4 1415 // CHECK4-NEXT: [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 6 1416 // CHECK4-NEXT: store i8** null, i8*** [[TMP78]], align 4 1417 // CHECK4-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 7 1418 // CHECK4-NEXT: store i8** null, i8*** [[TMP79]], align 4 1419 // CHECK4-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 8 1420 // CHECK4-NEXT: store i64 [[TMP71]], i64* [[TMP80]], align 8 1421 // CHECK4-NEXT: [[TMP81:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]]) 1422 // CHECK4-NEXT: [[TMP82:%.*]] = icmp ne i32 [[TMP81]], 0 1423 // CHECK4-NEXT: br i1 [[TMP82]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]] 1424 // CHECK4: omp_offload.failed19: 1425 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58(i32 [[TMP49]], [1000 x i32]* [[A]], i32* [[TMP50]]) #[[ATTR2]] 1426 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT20]] 1427 // CHECK4: omp_offload.cont20: 1428 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0 1429 // CHECK4-NEXT: [[TMP83:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1430 // CHECK4-NEXT: ret i32 [[TMP83]] 1431 // 1432 // 1433 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 1434 // CHECK4-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] { 1435 // CHECK4-NEXT: entry: 1436 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1437 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1438 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1439 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 1440 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1441 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 1442 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1443 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1444 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1445 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 1446 // CHECK4-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1447 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1448 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 1449 // CHECK4-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1450 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 1451 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 1452 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 1453 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP5]], [1000 x i32]* [[TMP1]]) 1454 // CHECK4-NEXT: ret void 1455 // 1456 // 1457 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1458 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 1459 // CHECK4-NEXT: entry: 1460 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1461 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1462 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1463 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1464 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1465 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1466 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1467 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1468 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1469 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1470 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1471 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1472 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1473 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1474 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1475 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1476 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1477 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1478 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1479 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1480 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1481 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1482 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1483 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1484 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1485 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1486 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1487 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1488 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1489 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1490 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1491 // CHECK4: omp.precond.then: 1492 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1493 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1494 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 1495 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1496 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1497 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1498 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1499 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1500 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1501 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1502 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1503 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1504 // CHECK4: cond.true: 1505 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1506 // CHECK4-NEXT: br label [[COND_END:%.*]] 1507 // CHECK4: cond.false: 1508 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1509 // CHECK4-NEXT: br label [[COND_END]] 1510 // CHECK4: cond.end: 1511 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1512 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1513 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1514 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 1515 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1516 // CHECK4: omp.inner.for.cond: 1517 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1518 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1519 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1520 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1521 // CHECK4: omp.inner.for.body: 1522 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1523 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1524 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 1525 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 1526 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 1527 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]]) 1528 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1529 // CHECK4: omp.inner.for.inc: 1530 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1531 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1532 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1533 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1534 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1535 // CHECK4: omp.inner.for.end: 1536 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1537 // CHECK4: omp.loop.exit: 1538 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1539 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1540 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1541 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1542 // CHECK4: omp.precond.end: 1543 // CHECK4-NEXT: ret void 1544 // 1545 // 1546 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1547 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 1548 // CHECK4-NEXT: entry: 1549 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1550 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1551 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1552 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1553 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1554 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1555 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1556 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1557 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1558 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1559 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1560 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1561 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1562 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1563 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1564 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1565 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1566 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1567 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1568 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1569 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1570 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1571 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1572 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1573 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1574 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1575 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1576 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1577 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1578 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1579 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1580 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1581 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1582 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1583 // CHECK4: omp.precond.then: 1584 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1585 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1586 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 1587 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1588 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1589 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4 1590 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1591 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1592 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1593 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1594 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1595 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1596 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1597 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1598 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1599 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1600 // CHECK4: cond.true: 1601 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1602 // CHECK4-NEXT: br label [[COND_END:%.*]] 1603 // CHECK4: cond.false: 1604 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1605 // CHECK4-NEXT: br label [[COND_END]] 1606 // CHECK4: cond.end: 1607 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1608 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1609 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1610 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1611 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1612 // CHECK4: omp.inner.for.cond: 1613 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1614 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1615 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1616 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1617 // CHECK4: omp.inner.for.body: 1618 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1619 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1620 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1621 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1622 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 1623 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP17]] 1624 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1625 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1626 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1627 // CHECK4-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP19]], i32 2) 1628 // CHECK4-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1629 // CHECK4-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 1630 // CHECK4: .cancel.exit: 1631 // CHECK4-NEXT: br label [[CANCEL_EXIT:%.*]] 1632 // CHECK4: .cancel.continue: 1633 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1634 // CHECK4: omp.body.continue: 1635 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1636 // CHECK4: omp.inner.for.inc: 1637 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1638 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 1639 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1640 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1641 // CHECK4: omp.inner.for.end: 1642 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1643 // CHECK4: omp.loop.exit: 1644 // CHECK4-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1645 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1646 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1647 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1648 // CHECK4: cancel.exit: 1649 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1650 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1651 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 1652 // CHECK4-NEXT: br label [[CANCEL_CONT:%.*]] 1653 // CHECK4: omp.precond.end: 1654 // CHECK4-NEXT: br label [[CANCEL_CONT]] 1655 // CHECK4: cancel.cont: 1656 // CHECK4-NEXT: ret void 1657 // 1658 // 1659 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 1660 // CHECK4-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1661 // CHECK4-NEXT: entry: 1662 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1663 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1664 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 1665 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1666 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1667 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1668 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 1669 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1670 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1671 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 1672 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 1673 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 4 1674 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]]) 1675 // CHECK4-NEXT: ret void 1676 // 1677 // 1678 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 1679 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1680 // CHECK4-NEXT: entry: 1681 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1682 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1683 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1684 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1685 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 1686 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1687 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1688 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1689 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1690 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1691 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1692 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1693 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1694 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1695 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1696 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1697 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1698 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1699 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1700 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1701 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 1702 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1703 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1704 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1705 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1706 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1707 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1708 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1709 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1710 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1711 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1712 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1713 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1714 // CHECK4: omp.precond.then: 1715 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1716 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1717 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 1718 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1719 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1720 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1721 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1722 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1723 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1724 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1725 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1726 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1727 // CHECK4: cond.true: 1728 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1729 // CHECK4-NEXT: br label [[COND_END:%.*]] 1730 // CHECK4: cond.false: 1731 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1732 // CHECK4-NEXT: br label [[COND_END]] 1733 // CHECK4: cond.end: 1734 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1735 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1736 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1737 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 1738 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1739 // CHECK4: omp.inner.for.cond: 1740 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1741 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1742 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1743 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1744 // CHECK4: omp.inner.for.body: 1745 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1746 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1747 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 1748 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 1749 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 1750 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[G_ADDR]], align 4 1751 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]], i32* [[TMP18]]) 1752 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1753 // CHECK4: omp.inner.for.inc: 1754 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1755 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1756 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 1757 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1758 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1759 // CHECK4: omp.inner.for.end: 1760 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1761 // CHECK4: omp.loop.exit: 1762 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1763 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1764 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1765 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1766 // CHECK4: omp.precond.end: 1767 // CHECK4-NEXT: ret void 1768 // 1769 // 1770 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 1771 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1772 // CHECK4-NEXT: entry: 1773 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1774 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1775 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1776 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1777 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1778 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1779 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 1780 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1781 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1782 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1783 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1784 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1785 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1786 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1787 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1788 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1789 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1790 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1791 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1792 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1793 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1794 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1795 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1796 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 1797 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1798 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1799 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1800 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1801 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1802 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1803 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1804 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1805 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1806 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1807 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1808 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1809 // CHECK4: omp.precond.then: 1810 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1811 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1812 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 1813 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1814 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1815 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4 1816 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1817 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1818 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1819 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1820 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1821 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1822 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1823 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1824 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1825 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1826 // CHECK4: cond.true: 1827 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1828 // CHECK4-NEXT: br label [[COND_END:%.*]] 1829 // CHECK4: cond.false: 1830 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1831 // CHECK4-NEXT: br label [[COND_END]] 1832 // CHECK4: cond.end: 1833 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1834 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1835 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1836 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1837 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1838 // CHECK4: omp.inner.for.cond: 1839 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1840 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1841 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1842 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1843 // CHECK4: omp.inner.for.body: 1844 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1845 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1846 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1847 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1848 // CHECK4-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 4 1849 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0 1850 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1851 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 1852 // CHECK4-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]] 1853 // CHECK4-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX6]], align 4 1854 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1855 // CHECK4: omp.body.continue: 1856 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1857 // CHECK4: omp.inner.for.inc: 1858 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1859 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 1860 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 1861 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1862 // CHECK4: omp.inner.for.end: 1863 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1864 // CHECK4: omp.loop.exit: 1865 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1866 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1867 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1868 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1869 // CHECK4: omp.precond.end: 1870 // CHECK4-NEXT: ret void 1871 // 1872 // 1873 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1874 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 1875 // CHECK4-NEXT: entry: 1876 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1877 // CHECK4-NEXT: ret void 1878 // 1879 // 1880 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 1881 // CHECK10-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 1882 // CHECK10-NEXT: entry: 1883 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1884 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 1885 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1886 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 1887 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1888 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 1889 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1890 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 1891 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1892 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 1893 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1894 // CHECK10-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 1895 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1896 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 1897 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV3]], align 4 1898 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV4]], align 4 1899 // CHECK10-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1900 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 1901 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1902 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV5]], align 4 1903 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[N_CASTED]], align 8 1904 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], [1000 x i32]* [[TMP1]]) 1905 // CHECK10-NEXT: ret void 1906 // 1907 // 1908 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1909 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 1910 // CHECK10-NEXT: entry: 1911 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1912 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1913 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1914 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 1915 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1916 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1917 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1918 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1919 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1920 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1921 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1922 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1923 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1924 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 1925 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1926 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1927 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1928 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1929 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 1930 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1931 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 1932 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1933 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1934 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1935 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1936 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1937 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1938 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1939 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 1940 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1941 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1942 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1943 // CHECK10: omp.precond.then: 1944 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1945 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1946 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 1947 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1948 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1949 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1950 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1951 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1952 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1953 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1954 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1955 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1956 // CHECK10: cond.true: 1957 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1958 // CHECK10-NEXT: br label [[COND_END:%.*]] 1959 // CHECK10: cond.false: 1960 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1961 // CHECK10-NEXT: br label [[COND_END]] 1962 // CHECK10: cond.end: 1963 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1964 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1965 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1966 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 1967 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1968 // CHECK10: omp.inner.for.cond: 1969 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1970 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1971 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1972 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1973 // CHECK10: omp.inner.for.body: 1974 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1975 // CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 1976 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1977 // CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 1978 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 1979 // CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1980 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 1981 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 1982 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]]) 1983 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1984 // CHECK10: omp.inner.for.inc: 1985 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1986 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1987 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 1988 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1989 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1990 // CHECK10: omp.inner.for.end: 1991 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1992 // CHECK10: omp.loop.exit: 1993 // CHECK10-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1994 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 1995 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 1996 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 1997 // CHECK10: omp.precond.end: 1998 // CHECK10-NEXT: ret void 1999 // 2000 // 2001 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2002 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 2003 // CHECK10-NEXT: entry: 2004 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2005 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2006 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2007 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2008 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2009 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 2010 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2011 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2012 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2013 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2014 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2015 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2016 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2017 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2018 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2019 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4 2020 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2021 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2022 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2023 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2024 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2025 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 2026 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2027 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 2028 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 2029 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2030 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2031 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2032 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2033 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2034 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2035 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2036 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2037 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2038 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2039 // CHECK10: omp.precond.then: 2040 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2041 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2042 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 2043 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2044 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 2045 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2046 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 2047 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 2048 // CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 2049 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2050 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2051 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2052 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2053 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2054 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2055 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2056 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2057 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2058 // CHECK10: cond.true: 2059 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2060 // CHECK10-NEXT: br label [[COND_END:%.*]] 2061 // CHECK10: cond.false: 2062 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2063 // CHECK10-NEXT: br label [[COND_END]] 2064 // CHECK10: cond.end: 2065 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2066 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2067 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2068 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2069 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2070 // CHECK10: omp.inner.for.cond: 2071 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2072 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2073 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2074 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2075 // CHECK10: omp.inner.for.body: 2076 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2077 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2078 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2079 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 2080 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I5]], align 4 2081 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 2082 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2083 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2084 // CHECK10-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2085 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2086 // CHECK10-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP19]], i32 2) 2087 // CHECK10-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2088 // CHECK10-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 2089 // CHECK10: .cancel.exit: 2090 // CHECK10-NEXT: br label [[CANCEL_EXIT:%.*]] 2091 // CHECK10: .cancel.continue: 2092 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2093 // CHECK10: omp.body.continue: 2094 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2095 // CHECK10: omp.inner.for.inc: 2096 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2097 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 2098 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2099 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2100 // CHECK10: omp.inner.for.end: 2101 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2102 // CHECK10: omp.loop.exit: 2103 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2104 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2105 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2106 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2107 // CHECK10: cancel.exit: 2108 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2109 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2110 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2111 // CHECK10-NEXT: br label [[CANCEL_CONT:%.*]] 2112 // CHECK10: omp.precond.end: 2113 // CHECK10-NEXT: br label [[CANCEL_CONT]] 2114 // CHECK10: cancel.cont: 2115 // CHECK10-NEXT: ret void 2116 // 2117 // 2118 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 2119 // CHECK10-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2120 // CHECK10-NEXT: entry: 2121 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2122 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 2123 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 2124 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2125 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2126 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 2127 // CHECK10-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 2128 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2129 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 2130 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 2131 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2132 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4 2133 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 2134 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8 2135 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]]) 2136 // CHECK10-NEXT: ret void 2137 // 2138 // 2139 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 2140 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2141 // CHECK10-NEXT: entry: 2142 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2143 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2144 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2145 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 2146 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 2147 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2148 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2149 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2150 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2151 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2152 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2153 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2154 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2155 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2156 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 2157 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2158 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2159 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2160 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2161 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 2162 // CHECK10-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 2163 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2164 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 2165 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 2166 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2167 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2168 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2169 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2170 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2171 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2172 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2173 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2174 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2175 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2176 // CHECK10: omp.precond.then: 2177 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2178 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2179 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 2180 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2181 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2182 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2183 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2184 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2185 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2186 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2187 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 2188 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2189 // CHECK10: cond.true: 2190 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2191 // CHECK10-NEXT: br label [[COND_END:%.*]] 2192 // CHECK10: cond.false: 2193 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2194 // CHECK10-NEXT: br label [[COND_END]] 2195 // CHECK10: cond.end: 2196 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 2197 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2198 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2199 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 2200 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2201 // CHECK10: omp.inner.for.cond: 2202 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2203 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2204 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2205 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2206 // CHECK10: omp.inner.for.body: 2207 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2208 // CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 2209 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2210 // CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 2211 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 2212 // CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2213 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 2214 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 2215 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8 2216 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]]) 2217 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2218 // CHECK10: omp.inner.for.inc: 2219 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2220 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2221 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2222 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2223 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2224 // CHECK10: omp.inner.for.end: 2225 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2226 // CHECK10: omp.loop.exit: 2227 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2228 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2229 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2230 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2231 // CHECK10: omp.precond.end: 2232 // CHECK10-NEXT: ret void 2233 // 2234 // 2235 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 2236 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2237 // CHECK10-NEXT: entry: 2238 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2239 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2240 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2241 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2242 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2243 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 2244 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 2245 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2246 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2247 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2248 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2249 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2250 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2251 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2252 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2253 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2254 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4 2255 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2256 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2257 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2258 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2259 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2260 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 2261 // CHECK10-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 2262 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2263 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 2264 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 2265 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2266 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2267 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2268 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2269 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2270 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2271 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2272 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2273 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2274 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2275 // CHECK10: omp.precond.then: 2276 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2277 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2278 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 2279 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2280 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 2281 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2282 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 2283 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 2284 // CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 2285 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2286 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2287 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2288 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2289 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2290 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2291 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2292 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2293 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2294 // CHECK10: cond.true: 2295 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2296 // CHECK10-NEXT: br label [[COND_END:%.*]] 2297 // CHECK10: cond.false: 2298 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2299 // CHECK10-NEXT: br label [[COND_END]] 2300 // CHECK10: cond.end: 2301 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2302 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2303 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2304 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2305 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2306 // CHECK10: omp.inner.for.cond: 2307 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2308 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2309 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2310 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2311 // CHECK10: omp.inner.for.body: 2312 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2313 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2314 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2315 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 2316 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8 2317 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0 2318 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2319 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 2320 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2321 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2322 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4 2323 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2324 // CHECK10: omp.body.continue: 2325 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2326 // CHECK10: omp.inner.for.inc: 2327 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2328 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 2329 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 2330 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2331 // CHECK10: omp.inner.for.end: 2332 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2333 // CHECK10: omp.loop.exit: 2334 // CHECK10-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2335 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2336 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2337 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2338 // CHECK10: omp.precond.end: 2339 // CHECK10-NEXT: ret void 2340 // 2341 // 2342 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 2343 // CHECK12-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 2344 // CHECK12-NEXT: entry: 2345 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2346 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2347 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2348 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 2349 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2350 // CHECK12-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 2351 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2352 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2353 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2354 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 2355 // CHECK12-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2356 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2357 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 2358 // CHECK12-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 2359 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 2360 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 2361 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 2362 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP5]], [1000 x i32]* [[TMP1]]) 2363 // CHECK12-NEXT: ret void 2364 // 2365 // 2366 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 2367 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 2368 // CHECK12-NEXT: entry: 2369 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2370 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2371 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2372 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2373 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2374 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2375 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2376 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2377 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2378 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2379 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2380 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2381 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2382 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2383 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2384 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2385 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2386 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2387 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2388 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2389 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2390 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2391 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2392 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2393 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2394 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2395 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2396 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2397 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2398 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2399 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2400 // CHECK12: omp.precond.then: 2401 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2402 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2403 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 2404 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2405 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2406 // CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2407 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2408 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2409 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2410 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2411 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 2412 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2413 // CHECK12: cond.true: 2414 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2415 // CHECK12-NEXT: br label [[COND_END:%.*]] 2416 // CHECK12: cond.false: 2417 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2418 // CHECK12-NEXT: br label [[COND_END]] 2419 // CHECK12: cond.end: 2420 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 2421 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2422 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2423 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 2424 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2425 // CHECK12: omp.inner.for.cond: 2426 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2427 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2428 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2429 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2430 // CHECK12: omp.inner.for.body: 2431 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2432 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2433 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 2434 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 2435 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 2436 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]]) 2437 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2438 // CHECK12: omp.inner.for.inc: 2439 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2440 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2441 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 2442 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2443 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2444 // CHECK12: omp.inner.for.end: 2445 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2446 // CHECK12: omp.loop.exit: 2447 // CHECK12-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2448 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 2449 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 2450 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2451 // CHECK12: omp.precond.end: 2452 // CHECK12-NEXT: ret void 2453 // 2454 // 2455 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 2456 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 2457 // CHECK12-NEXT: entry: 2458 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2459 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2460 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2461 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2462 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2463 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2464 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2465 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2466 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2467 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2468 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2469 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2470 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2471 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2472 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2473 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2474 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2475 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2476 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2477 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2478 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2479 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2480 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2481 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2482 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2483 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2484 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2485 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2486 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2487 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2488 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2489 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2490 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2491 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2492 // CHECK12: omp.precond.then: 2493 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2494 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2495 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 2496 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2497 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2498 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4 2499 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2500 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2501 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2502 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2503 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2504 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2505 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2506 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2507 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2508 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2509 // CHECK12: cond.true: 2510 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2511 // CHECK12-NEXT: br label [[COND_END:%.*]] 2512 // CHECK12: cond.false: 2513 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2514 // CHECK12-NEXT: br label [[COND_END]] 2515 // CHECK12: cond.end: 2516 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2517 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2518 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2519 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2520 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2521 // CHECK12: omp.inner.for.cond: 2522 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2523 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2524 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2525 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2526 // CHECK12: omp.inner.for.body: 2527 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2528 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2529 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2530 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2531 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2532 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP17]] 2533 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2534 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2535 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2536 // CHECK12-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP19]], i32 2) 2537 // CHECK12-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2538 // CHECK12-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 2539 // CHECK12: .cancel.exit: 2540 // CHECK12-NEXT: br label [[CANCEL_EXIT:%.*]] 2541 // CHECK12: .cancel.continue: 2542 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2543 // CHECK12: omp.body.continue: 2544 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2545 // CHECK12: omp.inner.for.inc: 2546 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2547 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 2548 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2549 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2550 // CHECK12: omp.inner.for.end: 2551 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2552 // CHECK12: omp.loop.exit: 2553 // CHECK12-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2554 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2555 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2556 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2557 // CHECK12: cancel.exit: 2558 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2559 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2560 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2561 // CHECK12-NEXT: br label [[CANCEL_CONT:%.*]] 2562 // CHECK12: omp.precond.end: 2563 // CHECK12-NEXT: br label [[CANCEL_CONT]] 2564 // CHECK12: cancel.cont: 2565 // CHECK12-NEXT: ret void 2566 // 2567 // 2568 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 2569 // CHECK12-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2570 // CHECK12-NEXT: entry: 2571 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2572 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2573 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 2574 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2575 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2576 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2577 // CHECK12-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 2578 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2579 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2580 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 2581 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 2582 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 4 2583 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]]) 2584 // CHECK12-NEXT: ret void 2585 // 2586 // 2587 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 2588 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2589 // CHECK12-NEXT: entry: 2590 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2591 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2592 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2593 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2594 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 2595 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2596 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2597 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2598 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2599 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2600 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2601 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2602 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2603 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2604 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2605 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2606 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2607 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2608 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2609 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2610 // CHECK12-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 2611 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2612 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2613 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2614 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2615 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2616 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2617 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2618 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2619 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2620 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2621 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2622 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2623 // CHECK12: omp.precond.then: 2624 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2625 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2626 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 2627 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2628 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2629 // CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2630 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2631 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2632 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2633 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2634 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 2635 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2636 // CHECK12: cond.true: 2637 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2638 // CHECK12-NEXT: br label [[COND_END:%.*]] 2639 // CHECK12: cond.false: 2640 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2641 // CHECK12-NEXT: br label [[COND_END]] 2642 // CHECK12: cond.end: 2643 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 2644 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2645 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2646 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 2647 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2648 // CHECK12: omp.inner.for.cond: 2649 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2650 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2651 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2652 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2653 // CHECK12: omp.inner.for.body: 2654 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2655 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2656 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 2657 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 2658 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 2659 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[G_ADDR]], align 4 2660 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]], i32* [[TMP18]]) 2661 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2662 // CHECK12: omp.inner.for.inc: 2663 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2664 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2665 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2666 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2667 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2668 // CHECK12: omp.inner.for.end: 2669 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2670 // CHECK12: omp.loop.exit: 2671 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2672 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2673 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2674 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2675 // CHECK12: omp.precond.end: 2676 // CHECK12-NEXT: ret void 2677 // 2678 // 2679 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 2680 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2681 // CHECK12-NEXT: entry: 2682 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2683 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2684 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2685 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2686 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2687 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2688 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 2689 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2690 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2691 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2692 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2693 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2694 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2695 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2696 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2697 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2698 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2699 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2700 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2701 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2702 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2703 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2704 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2705 // CHECK12-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 2706 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2707 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2708 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2709 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2710 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2711 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2712 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2713 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2714 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2715 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2716 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2717 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2718 // CHECK12: omp.precond.then: 2719 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2720 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2721 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 2722 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2723 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2724 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4 2725 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2726 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2727 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2728 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2729 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2730 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2731 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2732 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2733 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2734 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2735 // CHECK12: cond.true: 2736 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2737 // CHECK12-NEXT: br label [[COND_END:%.*]] 2738 // CHECK12: cond.false: 2739 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2740 // CHECK12-NEXT: br label [[COND_END]] 2741 // CHECK12: cond.end: 2742 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2743 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2744 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2745 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2746 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2747 // CHECK12: omp.inner.for.cond: 2748 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2749 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2750 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2751 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2752 // CHECK12: omp.inner.for.body: 2753 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2754 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2755 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2756 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2757 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 4 2758 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0 2759 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2760 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 2761 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]] 2762 // CHECK12-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX6]], align 4 2763 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2764 // CHECK12: omp.body.continue: 2765 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2766 // CHECK12: omp.inner.for.inc: 2767 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2768 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 2769 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2770 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2771 // CHECK12: omp.inner.for.end: 2772 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2773 // CHECK12: omp.loop.exit: 2774 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2775 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2776 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2777 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2778 // CHECK12: omp.precond.end: 2779 // CHECK12-NEXT: ret void 2780 // 2781