1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 // Test host codegen. 6 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK2 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 21 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region) 22 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 23 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK10 24 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 25 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 26 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 27 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK12 28 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 29 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 30 31 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 32 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 34 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 35 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 36 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 37 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 38 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 39 40 #ifdef CK1 41 42 43 int target_teams_fun(int *g){ 44 int n = 1000; 45 int a[1000]; 46 int te = n / 128; 47 int th = 128; 48 // discard n_addr 49 // discard capture expressions for te and th 50 51 #pragma omp target teams distribute parallel for num_teams(te), thread_limit(th) 52 for(int i = 0; i < n; i++) { 53 a[i] = 0; 54 #pragma omp cancel for 55 } 56 57 {{{ 58 #pragma omp target teams distribute parallel for is_device_ptr(g) 59 for(int i = 0; i < n; i++) { 60 a[i] = g[0]; 61 } 62 }}} 63 64 // outlined target regions 65 66 67 68 69 return a[0]; 70 } 71 72 #endif // CK1 73 #endif // HEADER 74 // CHECK1-LABEL: define {{[^@]+}}@_Z16target_teams_funPi 75 // CHECK1-SAME: (i32* noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] { 76 // CHECK1-NEXT: entry: 77 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 78 // CHECK1-NEXT: [[N:%.*]] = alloca i32, align 4 79 // CHECK1-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4 80 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4 81 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4 82 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 83 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 84 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 85 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 86 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i64, align 8 87 // CHECK1-NEXT: [[N_CASTED5:%.*]] = alloca i64, align 8 88 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 89 // CHECK1-NEXT: store i32 1000, i32* [[N]], align 4 90 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 91 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 92 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 93 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4 94 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 95 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 96 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 97 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 98 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 99 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 100 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 101 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 102 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 103 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 104 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 105 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 106 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 107 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED3]] to i32* 108 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[CONV4]], align 4 109 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED3]], align 8 110 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i64 [[TMP4]], [1000 x i32]* [[A]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2:[0-9]+]] 111 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4 112 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED5]] to i32* 113 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[CONV6]], align 4 114 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[N_CASTED5]], align 8 115 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[G_ADDR]], align 8 116 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58(i64 [[TMP10]], [1000 x i32]* [[A]], i32* [[TMP11]]) #[[ATTR2]] 117 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0 118 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 119 // CHECK1-NEXT: ret i32 [[TMP12]] 120 // 121 // 122 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 123 // CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] { 124 // CHECK1-NEXT: entry: 125 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 126 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 127 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 128 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 129 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 130 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 131 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 132 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 133 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 134 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 135 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 136 // CHECK1-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 137 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 138 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 139 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV3]], align 4 140 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV4]], align 4 141 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 142 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 143 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[N_CASTED]] to i32* 144 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV5]], align 4 145 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[N_CASTED]], align 8 146 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], [1000 x i32]* [[TMP1]]) 147 // CHECK1-NEXT: ret void 148 // 149 // 150 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 151 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 152 // CHECK1-NEXT: entry: 153 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 154 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 155 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 156 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 157 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 158 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 159 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 160 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 161 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 162 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 163 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 166 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 168 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 169 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 170 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 171 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 172 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 173 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 174 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 175 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 176 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 177 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 178 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 179 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 180 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 181 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 182 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 183 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 184 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 185 // CHECK1: omp.precond.then: 186 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 187 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 188 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 189 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 190 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 191 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 192 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 193 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 194 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 195 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 196 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 197 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 198 // CHECK1: cond.true: 199 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 200 // CHECK1-NEXT: br label [[COND_END:%.*]] 201 // CHECK1: cond.false: 202 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 203 // CHECK1-NEXT: br label [[COND_END]] 204 // CHECK1: cond.end: 205 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 206 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 207 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 208 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 209 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 210 // CHECK1: omp.inner.for.cond: 211 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 212 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 213 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 214 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 215 // CHECK1: omp.inner.for.body: 216 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 217 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 218 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 219 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 220 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 221 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 222 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 223 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 224 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]]) 225 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 226 // CHECK1: omp.inner.for.inc: 227 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 228 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 229 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 230 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 231 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 232 // CHECK1: omp.inner.for.end: 233 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 234 // CHECK1: omp.loop.exit: 235 // CHECK1-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 236 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 237 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 238 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 239 // CHECK1: omp.precond.end: 240 // CHECK1-NEXT: ret void 241 // 242 // 243 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 244 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 245 // CHECK1-NEXT: entry: 246 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 247 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 248 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 249 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 250 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 251 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 252 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 253 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 254 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 255 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 256 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 257 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 258 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 259 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 260 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 261 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 262 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 263 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 264 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 265 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 266 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 267 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 268 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 269 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 270 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 271 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 272 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 273 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 274 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 275 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 276 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 277 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 278 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 279 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 280 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 281 // CHECK1: omp.precond.then: 282 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 283 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 284 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 285 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 286 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 287 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 288 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 289 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 290 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 291 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 292 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 293 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 294 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 295 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 296 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 297 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 298 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 299 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 300 // CHECK1: cond.true: 301 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 302 // CHECK1-NEXT: br label [[COND_END:%.*]] 303 // CHECK1: cond.false: 304 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 305 // CHECK1-NEXT: br label [[COND_END]] 306 // CHECK1: cond.end: 307 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 308 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 309 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 310 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 311 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 312 // CHECK1: omp.inner.for.cond: 313 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 314 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 315 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 316 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 317 // CHECK1: omp.inner.for.body: 318 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 319 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 320 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 321 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 322 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[I5]], align 4 323 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 324 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 325 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 326 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 327 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 328 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP19]], i32 2) 329 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 330 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 331 // CHECK1: .cancel.exit: 332 // CHECK1-NEXT: br label [[CANCEL_EXIT:%.*]] 333 // CHECK1: .cancel.continue: 334 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 335 // CHECK1: omp.body.continue: 336 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 337 // CHECK1: omp.inner.for.inc: 338 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 339 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 340 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 341 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 342 // CHECK1: omp.inner.for.end: 343 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 344 // CHECK1: omp.loop.exit: 345 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 346 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 347 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 348 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 349 // CHECK1: cancel.exit: 350 // CHECK1-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 351 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 352 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 353 // CHECK1-NEXT: br label [[CANCEL_CONT:%.*]] 354 // CHECK1: omp.precond.end: 355 // CHECK1-NEXT: br label [[CANCEL_CONT]] 356 // CHECK1: cancel.cont: 357 // CHECK1-NEXT: ret void 358 // 359 // 360 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 361 // CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 362 // CHECK1-NEXT: entry: 363 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 364 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 365 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 366 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 367 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 368 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 369 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 370 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 371 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 372 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 373 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 374 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4 375 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 376 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8 377 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]]) 378 // CHECK1-NEXT: ret void 379 // 380 // 381 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 382 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 383 // CHECK1-NEXT: entry: 384 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 385 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 386 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 387 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 388 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 389 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 390 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 391 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 392 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 393 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 394 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 395 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 396 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 397 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 398 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 399 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 400 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 401 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 402 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 403 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 404 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 405 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 406 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 407 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 408 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 409 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 410 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 411 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 412 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 413 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 414 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 415 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 416 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 417 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 418 // CHECK1: omp.precond.then: 419 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 420 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 421 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 422 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 423 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 424 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 425 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 426 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 427 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 428 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 429 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 430 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 431 // CHECK1: cond.true: 432 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 433 // CHECK1-NEXT: br label [[COND_END:%.*]] 434 // CHECK1: cond.false: 435 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 436 // CHECK1-NEXT: br label [[COND_END]] 437 // CHECK1: cond.end: 438 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 439 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 440 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 441 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 442 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 443 // CHECK1: omp.inner.for.cond: 444 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 445 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 446 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 447 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 448 // CHECK1: omp.inner.for.body: 449 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 450 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 451 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 452 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 453 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 454 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 455 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 456 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 457 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8 458 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]]) 459 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 460 // CHECK1: omp.inner.for.inc: 461 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 462 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 463 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 464 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 465 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 466 // CHECK1: omp.inner.for.end: 467 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 468 // CHECK1: omp.loop.exit: 469 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 470 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 471 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 472 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 473 // CHECK1: omp.precond.end: 474 // CHECK1-NEXT: ret void 475 // 476 // 477 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 478 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 479 // CHECK1-NEXT: entry: 480 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 481 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 482 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 483 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 484 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 485 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 486 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 487 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 488 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 489 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 490 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 491 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 492 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 493 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 494 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 495 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 496 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 497 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 498 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 499 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 500 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 501 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 502 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 503 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 504 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 505 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 506 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 507 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 508 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 509 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 510 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 511 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 512 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 513 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 514 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 515 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 516 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 517 // CHECK1: omp.precond.then: 518 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 519 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 520 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 521 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 522 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 523 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 524 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 525 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 526 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 527 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 528 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 529 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 530 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 531 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 532 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 533 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 534 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 535 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 536 // CHECK1: cond.true: 537 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 538 // CHECK1-NEXT: br label [[COND_END:%.*]] 539 // CHECK1: cond.false: 540 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 541 // CHECK1-NEXT: br label [[COND_END]] 542 // CHECK1: cond.end: 543 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 544 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 545 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 546 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 547 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 548 // CHECK1: omp.inner.for.cond: 549 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 550 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 551 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 552 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 553 // CHECK1: omp.inner.for.body: 554 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 555 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 556 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 557 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 558 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8 559 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0 560 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 561 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 562 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 563 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 564 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4 565 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 566 // CHECK1: omp.body.continue: 567 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 568 // CHECK1: omp.inner.for.inc: 569 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 570 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 571 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 572 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 573 // CHECK1: omp.inner.for.end: 574 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 575 // CHECK1: omp.loop.exit: 576 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 577 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 578 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 579 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 580 // CHECK1: omp.precond.end: 581 // CHECK1-NEXT: ret void 582 // 583 // 584 // CHECK2-LABEL: define {{[^@]+}}@_Z16target_teams_funPi 585 // CHECK2-SAME: (i32* noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] { 586 // CHECK2-NEXT: entry: 587 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 588 // CHECK2-NEXT: [[N:%.*]] = alloca i32, align 4 589 // CHECK2-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4 590 // CHECK2-NEXT: [[TE:%.*]] = alloca i32, align 4 591 // CHECK2-NEXT: [[TH:%.*]] = alloca i32, align 4 592 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 593 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 594 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 595 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 596 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i64, align 8 597 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 598 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 599 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 600 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 601 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 602 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4 603 // CHECK2-NEXT: [[N_CASTED9:%.*]] = alloca i64, align 8 604 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [3 x i8*], align 8 605 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [3 x i8*], align 8 606 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [3 x i8*], align 8 607 // CHECK2-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 608 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_15:%.*]] = alloca i32, align 4 609 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4 610 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 611 // CHECK2-NEXT: store i32 1000, i32* [[N]], align 4 612 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 613 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 614 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 615 // CHECK2-NEXT: store i32 128, i32* [[TH]], align 4 616 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 617 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 618 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 619 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 620 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 621 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 622 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 623 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 624 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 625 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 626 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4 627 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 628 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 629 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED3]] to i32* 630 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[CONV4]], align 4 631 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED3]], align 8 632 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 633 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 634 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 635 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 636 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 637 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP12]], align 8 638 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 639 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8 640 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 641 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [1000 x i32]** 642 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP15]], align 8 643 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 644 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [1000 x i32]** 645 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP17]], align 8 646 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 647 // CHECK2-NEXT: store i8* null, i8** [[TMP18]], align 8 648 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 649 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 650 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8 651 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 652 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64* 653 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP22]], align 8 654 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 655 // CHECK2-NEXT: store i8* null, i8** [[TMP23]], align 8 656 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 657 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 658 // CHECK2-NEXT: store i64 [[TMP8]], i64* [[TMP25]], align 8 659 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 660 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 661 // CHECK2-NEXT: store i64 [[TMP8]], i64* [[TMP27]], align 8 662 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 663 // CHECK2-NEXT: store i8* null, i8** [[TMP28]], align 8 664 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 665 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 666 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 667 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 668 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 669 // CHECK2-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_5]], align 4 670 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 671 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 672 // CHECK2-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB]], 1 673 // CHECK2-NEXT: [[SUB8:%.*]] = sub nsw i32 [[DIV7]], 1 674 // CHECK2-NEXT: store i32 [[SUB8]], i32* [[DOTCAPTURE_EXPR_6]], align 4 675 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_6]], align 4 676 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 677 // CHECK2-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 678 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP36]]) 679 // CHECK2-NEXT: [[TMP37:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.region_id, i32 4, i8** [[TMP29]], i8** [[TMP30]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP31]], i32 [[TMP32]]) 680 // CHECK2-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 681 // CHECK2-NEXT: br i1 [[TMP38]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 682 // CHECK2: omp_offload.failed: 683 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i64 [[TMP4]], [1000 x i32]* [[A]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2:[0-9]+]] 684 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 685 // CHECK2: omp_offload.cont: 686 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[N]], align 4 687 // CHECK2-NEXT: [[CONV10:%.*]] = bitcast i64* [[N_CASTED9]] to i32* 688 // CHECK2-NEXT: store i32 [[TMP39]], i32* [[CONV10]], align 4 689 // CHECK2-NEXT: [[TMP40:%.*]] = load i64, i64* [[N_CASTED9]], align 8 690 // CHECK2-NEXT: [[TMP41:%.*]] = load i32*, i32** [[G_ADDR]], align 8 691 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 692 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64* 693 // CHECK2-NEXT: store i64 [[TMP40]], i64* [[TMP43]], align 8 694 // CHECK2-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 695 // CHECK2-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64* 696 // CHECK2-NEXT: store i64 [[TMP40]], i64* [[TMP45]], align 8 697 // CHECK2-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0 698 // CHECK2-NEXT: store i8* null, i8** [[TMP46]], align 8 699 // CHECK2-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 1 700 // CHECK2-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to [1000 x i32]** 701 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP48]], align 8 702 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 1 703 // CHECK2-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [1000 x i32]** 704 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP50]], align 8 705 // CHECK2-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 1 706 // CHECK2-NEXT: store i8* null, i8** [[TMP51]], align 8 707 // CHECK2-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 2 708 // CHECK2-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i32** 709 // CHECK2-NEXT: store i32* [[TMP41]], i32** [[TMP53]], align 8 710 // CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 2 711 // CHECK2-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32** 712 // CHECK2-NEXT: store i32* [[TMP41]], i32** [[TMP55]], align 8 713 // CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 2 714 // CHECK2-NEXT: store i8* null, i8** [[TMP56]], align 8 715 // CHECK2-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 716 // CHECK2-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 717 // CHECK2-NEXT: [[TMP59:%.*]] = load i32, i32* [[N]], align 4 718 // CHECK2-NEXT: store i32 [[TMP59]], i32* [[DOTCAPTURE_EXPR_15]], align 4 719 // CHECK2-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_15]], align 4 720 // CHECK2-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP60]], 0 721 // CHECK2-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 722 // CHECK2-NEXT: [[SUB19:%.*]] = sub nsw i32 [[DIV18]], 1 723 // CHECK2-NEXT: store i32 [[SUB19]], i32* [[DOTCAPTURE_EXPR_16]], align 4 724 // CHECK2-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4 725 // CHECK2-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP61]], 1 726 // CHECK2-NEXT: [[TMP62:%.*]] = zext i32 [[ADD20]] to i64 727 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP62]]) 728 // CHECK2-NEXT: [[TMP63:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.region_id, i32 3, i8** [[TMP57]], i8** [[TMP58]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 729 // CHECK2-NEXT: [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 0 730 // CHECK2-NEXT: br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 731 // CHECK2: omp_offload.failed21: 732 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58(i64 [[TMP40]], [1000 x i32]* [[A]], i32* [[TMP41]]) #[[ATTR2]] 733 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT22]] 734 // CHECK2: omp_offload.cont22: 735 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0 736 // CHECK2-NEXT: [[TMP65:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 737 // CHECK2-NEXT: ret i32 [[TMP65]] 738 // 739 // 740 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 741 // CHECK2-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] { 742 // CHECK2-NEXT: entry: 743 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 744 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 745 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 746 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 747 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 748 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 749 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 750 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 751 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 752 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 753 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 754 // CHECK2-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 755 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 756 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 757 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV3]], align 4 758 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV4]], align 4 759 // CHECK2-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 760 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 761 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[N_CASTED]] to i32* 762 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[CONV5]], align 4 763 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[N_CASTED]], align 8 764 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], [1000 x i32]* [[TMP1]]) 765 // CHECK2-NEXT: ret void 766 // 767 // 768 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 769 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 770 // CHECK2-NEXT: entry: 771 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 772 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 773 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 774 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 775 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 776 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 777 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 778 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 779 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 780 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 781 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 782 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 783 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 784 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 785 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 786 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 787 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 788 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 789 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 790 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 791 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 792 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 793 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 794 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 795 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 796 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 797 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 798 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 799 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 800 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 801 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 802 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 803 // CHECK2: omp.precond.then: 804 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 805 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 806 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 807 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 808 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 809 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 810 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 811 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 812 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 813 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 814 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 815 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 816 // CHECK2: cond.true: 817 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 818 // CHECK2-NEXT: br label [[COND_END:%.*]] 819 // CHECK2: cond.false: 820 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 821 // CHECK2-NEXT: br label [[COND_END]] 822 // CHECK2: cond.end: 823 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 824 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 825 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 826 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 827 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 828 // CHECK2: omp.inner.for.cond: 829 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 830 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 831 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 832 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 833 // CHECK2: omp.inner.for.body: 834 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 835 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 836 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 837 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 838 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 839 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 840 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 841 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 842 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]]) 843 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 844 // CHECK2: omp.inner.for.inc: 845 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 846 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 847 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 848 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 849 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 850 // CHECK2: omp.inner.for.end: 851 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 852 // CHECK2: omp.loop.exit: 853 // CHECK2-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 854 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 855 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 856 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 857 // CHECK2: omp.precond.end: 858 // CHECK2-NEXT: ret void 859 // 860 // 861 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 862 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 863 // CHECK2-NEXT: entry: 864 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 865 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 866 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 867 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 868 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 869 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 870 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 871 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 872 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 873 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 874 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 875 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 876 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 877 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 878 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 879 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4 880 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 881 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 882 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 883 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 884 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 885 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 886 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 887 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 888 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 889 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 890 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 891 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 892 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 893 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 894 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 895 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 896 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 897 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 898 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 899 // CHECK2: omp.precond.then: 900 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 901 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 902 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 903 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 904 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 905 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 906 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 907 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 908 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 909 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 910 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 911 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 912 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 913 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 914 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 915 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 916 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 917 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 918 // CHECK2: cond.true: 919 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 920 // CHECK2-NEXT: br label [[COND_END:%.*]] 921 // CHECK2: cond.false: 922 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 923 // CHECK2-NEXT: br label [[COND_END]] 924 // CHECK2: cond.end: 925 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 926 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 927 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 928 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 929 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 930 // CHECK2: omp.inner.for.cond: 931 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 932 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 933 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 934 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 935 // CHECK2: omp.inner.for.body: 936 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 937 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 938 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 939 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 940 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[I5]], align 4 941 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 942 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 943 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 944 // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 945 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 946 // CHECK2-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP19]], i32 2) 947 // CHECK2-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 948 // CHECK2-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 949 // CHECK2: .cancel.exit: 950 // CHECK2-NEXT: br label [[CANCEL_EXIT:%.*]] 951 // CHECK2: .cancel.continue: 952 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 953 // CHECK2: omp.body.continue: 954 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 955 // CHECK2: omp.inner.for.inc: 956 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 957 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 958 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 959 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 960 // CHECK2: omp.inner.for.end: 961 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 962 // CHECK2: omp.loop.exit: 963 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 964 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 965 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 966 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 967 // CHECK2: cancel.exit: 968 // CHECK2-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 969 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 970 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 971 // CHECK2-NEXT: br label [[CANCEL_CONT:%.*]] 972 // CHECK2: omp.precond.end: 973 // CHECK2-NEXT: br label [[CANCEL_CONT]] 974 // CHECK2: cancel.cont: 975 // CHECK2-NEXT: ret void 976 // 977 // 978 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 979 // CHECK2-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 980 // CHECK2-NEXT: entry: 981 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 982 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 983 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 984 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 985 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 986 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 987 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 988 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 989 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 990 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 991 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 992 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4 993 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 994 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8 995 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]]) 996 // CHECK2-NEXT: ret void 997 // 998 // 999 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1000 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1001 // CHECK2-NEXT: entry: 1002 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1003 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1004 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1005 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 1006 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 1007 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1008 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1009 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1010 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1011 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1012 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1013 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1014 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1015 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1016 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 1017 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1018 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1019 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1020 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1021 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 1022 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 1023 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1024 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 1025 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1026 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1027 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1028 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1029 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1030 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1031 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1032 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 1033 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1034 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1035 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1036 // CHECK2: omp.precond.then: 1037 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1038 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1039 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 1040 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1041 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1042 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1043 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1044 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1045 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1046 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1047 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1048 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1049 // CHECK2: cond.true: 1050 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1051 // CHECK2-NEXT: br label [[COND_END:%.*]] 1052 // CHECK2: cond.false: 1053 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1054 // CHECK2-NEXT: br label [[COND_END]] 1055 // CHECK2: cond.end: 1056 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1057 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1058 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1059 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 1060 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1061 // CHECK2: omp.inner.for.cond: 1062 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1063 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1064 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1065 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1066 // CHECK2: omp.inner.for.body: 1067 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1068 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 1069 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1070 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 1071 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 1072 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1073 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 1074 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 1075 // CHECK2-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8 1076 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]]) 1077 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1078 // CHECK2: omp.inner.for.inc: 1079 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1080 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1081 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1082 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1083 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1084 // CHECK2: omp.inner.for.end: 1085 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1086 // CHECK2: omp.loop.exit: 1087 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1088 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1089 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1090 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1091 // CHECK2: omp.precond.end: 1092 // CHECK2-NEXT: ret void 1093 // 1094 // 1095 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1096 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1097 // CHECK2-NEXT: entry: 1098 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1099 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1100 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1101 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1102 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1103 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 1104 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 1105 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1106 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1107 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1108 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1109 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1110 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1111 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1112 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1113 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1114 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4 1115 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1116 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1117 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1118 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1119 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1120 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 1121 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 1122 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1123 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 1124 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1125 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1126 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1127 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1128 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1129 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1130 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1131 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 1132 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1133 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1134 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1135 // CHECK2: omp.precond.then: 1136 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1137 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1138 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 1139 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1140 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 1141 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1142 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 1143 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 1144 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 1145 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1146 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1147 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1148 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1149 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1150 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1151 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1152 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1153 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1154 // CHECK2: cond.true: 1155 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1156 // CHECK2-NEXT: br label [[COND_END:%.*]] 1157 // CHECK2: cond.false: 1158 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1159 // CHECK2-NEXT: br label [[COND_END]] 1160 // CHECK2: cond.end: 1161 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1162 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1163 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1164 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1165 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1166 // CHECK2: omp.inner.for.cond: 1167 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1168 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1169 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1170 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1171 // CHECK2: omp.inner.for.body: 1172 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1173 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1174 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1175 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 1176 // CHECK2-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8 1177 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0 1178 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1179 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 1180 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 1181 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1182 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4 1183 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1184 // CHECK2: omp.body.continue: 1185 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1186 // CHECK2: omp.inner.for.inc: 1187 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1188 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 1189 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 1190 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1191 // CHECK2: omp.inner.for.end: 1192 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1193 // CHECK2: omp.loop.exit: 1194 // CHECK2-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1195 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1196 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1197 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1198 // CHECK2: omp.precond.end: 1199 // CHECK2-NEXT: ret void 1200 // 1201 // 1202 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1203 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 1204 // CHECK2-NEXT: entry: 1205 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 1206 // CHECK2-NEXT: ret void 1207 // 1208 // 1209 // CHECK4-LABEL: define {{[^@]+}}@_Z16target_teams_funPi 1210 // CHECK4-SAME: (i32* noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] { 1211 // CHECK4-NEXT: entry: 1212 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 1213 // CHECK4-NEXT: [[N:%.*]] = alloca i32, align 4 1214 // CHECK4-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4 1215 // CHECK4-NEXT: [[TE:%.*]] = alloca i32, align 4 1216 // CHECK4-NEXT: [[TH:%.*]] = alloca i32, align 4 1217 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1218 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1219 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1220 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 1221 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4 1222 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 1223 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 1224 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 1225 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1226 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1227 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1228 // CHECK4-NEXT: [[N_CASTED7:%.*]] = alloca i32, align 4 1229 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x i8*], align 4 1230 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x i8*], align 4 1231 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x i8*], align 4 1232 // CHECK4-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 1233 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 1234 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 1235 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 1236 // CHECK4-NEXT: store i32 1000, i32* [[N]], align 4 1237 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1238 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1239 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TE]], align 4 1240 // CHECK4-NEXT: store i32 128, i32* [[TH]], align 4 1241 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4 1242 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1243 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4 1244 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1245 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 1246 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4 1247 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4 1248 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1249 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 1250 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 1251 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1252 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4 1253 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4 1254 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1255 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 1256 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP10]], align 4 1257 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1258 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 1259 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP12]], align 4 1260 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1261 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4 1262 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1263 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [1000 x i32]** 1264 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP15]], align 4 1265 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1266 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [1000 x i32]** 1267 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP17]], align 4 1268 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1269 // CHECK4-NEXT: store i8* null, i8** [[TMP18]], align 4 1270 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1271 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 1272 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4 1273 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1274 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32* 1275 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP22]], align 4 1276 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1277 // CHECK4-NEXT: store i8* null, i8** [[TMP23]], align 4 1278 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1279 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 1280 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP25]], align 4 1281 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1282 // CHECK4-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 1283 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP27]], align 4 1284 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1285 // CHECK4-NEXT: store i8* null, i8** [[TMP28]], align 4 1286 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1287 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1288 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1289 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1290 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 1291 // CHECK4-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1292 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1293 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP34]], 0 1294 // CHECK4-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB]], 1 1295 // CHECK4-NEXT: [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1 1296 // CHECK4-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1297 // CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1298 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP35]], 1 1299 // CHECK4-NEXT: [[TMP36:%.*]] = zext i32 [[ADD]] to i64 1300 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP36]]) 1301 // CHECK4-NEXT: [[TMP37:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.region_id, i32 4, i8** [[TMP29]], i8** [[TMP30]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP31]], i32 [[TMP32]]) 1302 // CHECK4-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 1303 // CHECK4-NEXT: br i1 [[TMP38]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1304 // CHECK4: omp_offload.failed: 1305 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i32 [[TMP4]], [1000 x i32]* [[A]], i32 [[TMP6]], i32 [[TMP8]]) #[[ATTR2:[0-9]+]] 1306 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1307 // CHECK4: omp_offload.cont: 1308 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[N]], align 4 1309 // CHECK4-NEXT: store i32 [[TMP39]], i32* [[N_CASTED7]], align 4 1310 // CHECK4-NEXT: [[TMP40:%.*]] = load i32, i32* [[N_CASTED7]], align 4 1311 // CHECK4-NEXT: [[TMP41:%.*]] = load i32*, i32** [[G_ADDR]], align 4 1312 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 1313 // CHECK4-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 1314 // CHECK4-NEXT: store i32 [[TMP40]], i32* [[TMP43]], align 4 1315 // CHECK4-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 1316 // CHECK4-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 1317 // CHECK4-NEXT: store i32 [[TMP40]], i32* [[TMP45]], align 4 1318 // CHECK4-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 1319 // CHECK4-NEXT: store i8* null, i8** [[TMP46]], align 4 1320 // CHECK4-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 1321 // CHECK4-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to [1000 x i32]** 1322 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP48]], align 4 1323 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 1324 // CHECK4-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [1000 x i32]** 1325 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP50]], align 4 1326 // CHECK4-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1 1327 // CHECK4-NEXT: store i8* null, i8** [[TMP51]], align 4 1328 // CHECK4-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2 1329 // CHECK4-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i32** 1330 // CHECK4-NEXT: store i32* [[TMP41]], i32** [[TMP53]], align 4 1331 // CHECK4-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 2 1332 // CHECK4-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32** 1333 // CHECK4-NEXT: store i32* [[TMP41]], i32** [[TMP55]], align 4 1334 // CHECK4-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 2 1335 // CHECK4-NEXT: store i8* null, i8** [[TMP56]], align 4 1336 // CHECK4-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 1337 // CHECK4-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 1338 // CHECK4-NEXT: [[TMP59:%.*]] = load i32, i32* [[N]], align 4 1339 // CHECK4-NEXT: store i32 [[TMP59]], i32* [[DOTCAPTURE_EXPR_12]], align 4 1340 // CHECK4-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 1341 // CHECK4-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP60]], 0 1342 // CHECK4-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 1343 // CHECK4-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1 1344 // CHECK4-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4 1345 // CHECK4-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4 1346 // CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP61]], 1 1347 // CHECK4-NEXT: [[TMP62:%.*]] = zext i32 [[ADD17]] to i64 1348 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP62]]) 1349 // CHECK4-NEXT: [[TMP63:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.region_id, i32 3, i8** [[TMP57]], i8** [[TMP58]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1350 // CHECK4-NEXT: [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 0 1351 // CHECK4-NEXT: br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]] 1352 // CHECK4: omp_offload.failed18: 1353 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58(i32 [[TMP40]], [1000 x i32]* [[A]], i32* [[TMP41]]) #[[ATTR2]] 1354 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT19]] 1355 // CHECK4: omp_offload.cont19: 1356 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0 1357 // CHECK4-NEXT: [[TMP65:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1358 // CHECK4-NEXT: ret i32 [[TMP65]] 1359 // 1360 // 1361 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 1362 // CHECK4-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] { 1363 // CHECK4-NEXT: entry: 1364 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1365 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1366 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1367 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 1368 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1369 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 1370 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1371 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1372 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1373 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 1374 // CHECK4-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1375 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1376 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 1377 // CHECK4-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1378 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 1379 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 1380 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 1381 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP5]], [1000 x i32]* [[TMP1]]) 1382 // CHECK4-NEXT: ret void 1383 // 1384 // 1385 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1386 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 1387 // CHECK4-NEXT: entry: 1388 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1389 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1390 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1391 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1392 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1393 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1394 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1395 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1396 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1397 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1398 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1399 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1400 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1401 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1402 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1403 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1404 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1405 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1406 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1407 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1408 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1409 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1410 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1411 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1412 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1413 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1414 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1415 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1416 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1417 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1418 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1419 // CHECK4: omp.precond.then: 1420 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1421 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1422 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 1423 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1424 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1425 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1426 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1427 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1428 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1429 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1430 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1431 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1432 // CHECK4: cond.true: 1433 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1434 // CHECK4-NEXT: br label [[COND_END:%.*]] 1435 // CHECK4: cond.false: 1436 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1437 // CHECK4-NEXT: br label [[COND_END]] 1438 // CHECK4: cond.end: 1439 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1440 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1441 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1442 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 1443 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1444 // CHECK4: omp.inner.for.cond: 1445 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1446 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1447 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1448 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1449 // CHECK4: omp.inner.for.body: 1450 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1451 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1452 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 1453 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 1454 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 1455 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]]) 1456 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1457 // CHECK4: omp.inner.for.inc: 1458 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1459 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1460 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1461 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1462 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1463 // CHECK4: omp.inner.for.end: 1464 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1465 // CHECK4: omp.loop.exit: 1466 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1467 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1468 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 1469 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1470 // CHECK4: omp.precond.end: 1471 // CHECK4-NEXT: ret void 1472 // 1473 // 1474 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1475 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 1476 // CHECK4-NEXT: entry: 1477 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1478 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1479 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1480 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1481 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1482 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1483 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1484 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1485 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1486 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1487 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1488 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1489 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1490 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1491 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1492 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1493 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1494 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1495 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1496 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1497 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1498 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1499 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1500 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1501 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1502 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1503 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1504 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1505 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1506 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1507 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1508 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1509 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1510 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1511 // CHECK4: omp.precond.then: 1512 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1513 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1514 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 1515 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1516 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1517 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4 1518 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1519 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1520 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1521 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1522 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1523 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1524 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1525 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1526 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1527 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1528 // CHECK4: cond.true: 1529 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1530 // CHECK4-NEXT: br label [[COND_END:%.*]] 1531 // CHECK4: cond.false: 1532 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1533 // CHECK4-NEXT: br label [[COND_END]] 1534 // CHECK4: cond.end: 1535 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1536 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1537 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1538 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1539 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1540 // CHECK4: omp.inner.for.cond: 1541 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1542 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1543 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1544 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1545 // CHECK4: omp.inner.for.body: 1546 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1547 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1548 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1549 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1550 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 1551 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP17]] 1552 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1553 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1554 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1555 // CHECK4-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP19]], i32 2) 1556 // CHECK4-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1557 // CHECK4-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 1558 // CHECK4: .cancel.exit: 1559 // CHECK4-NEXT: br label [[CANCEL_EXIT:%.*]] 1560 // CHECK4: .cancel.continue: 1561 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1562 // CHECK4: omp.body.continue: 1563 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1564 // CHECK4: omp.inner.for.inc: 1565 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1566 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 1567 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1568 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1569 // CHECK4: omp.inner.for.end: 1570 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1571 // CHECK4: omp.loop.exit: 1572 // CHECK4-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1573 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1574 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1575 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1576 // CHECK4: cancel.exit: 1577 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1578 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1579 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 1580 // CHECK4-NEXT: br label [[CANCEL_CONT:%.*]] 1581 // CHECK4: omp.precond.end: 1582 // CHECK4-NEXT: br label [[CANCEL_CONT]] 1583 // CHECK4: cancel.cont: 1584 // CHECK4-NEXT: ret void 1585 // 1586 // 1587 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 1588 // CHECK4-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1589 // CHECK4-NEXT: entry: 1590 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1591 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1592 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 1593 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1594 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1595 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1596 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 1597 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1598 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1599 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 1600 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 1601 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 4 1602 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]]) 1603 // CHECK4-NEXT: ret void 1604 // 1605 // 1606 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 1607 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1608 // CHECK4-NEXT: entry: 1609 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1610 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1611 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1612 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1613 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 1614 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1615 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1616 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1617 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1618 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1619 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1620 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1621 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1622 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1623 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1624 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1625 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1626 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1627 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1628 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1629 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 1630 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1631 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1632 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1633 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1634 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1635 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1636 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1637 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1638 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1639 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1640 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1641 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1642 // CHECK4: omp.precond.then: 1643 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1644 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1645 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 1646 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1647 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1648 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1649 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1650 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1651 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1652 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1653 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1654 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1655 // CHECK4: cond.true: 1656 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1657 // CHECK4-NEXT: br label [[COND_END:%.*]] 1658 // CHECK4: cond.false: 1659 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1660 // CHECK4-NEXT: br label [[COND_END]] 1661 // CHECK4: cond.end: 1662 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1663 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1664 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1665 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 1666 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1667 // CHECK4: omp.inner.for.cond: 1668 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1669 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1670 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1671 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1672 // CHECK4: omp.inner.for.body: 1673 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1674 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1675 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 1676 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 1677 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 1678 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[G_ADDR]], align 4 1679 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]], i32* [[TMP18]]) 1680 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1681 // CHECK4: omp.inner.for.inc: 1682 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1683 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1684 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 1685 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1686 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1687 // CHECK4: omp.inner.for.end: 1688 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1689 // CHECK4: omp.loop.exit: 1690 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1691 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1692 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1693 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1694 // CHECK4: omp.precond.end: 1695 // CHECK4-NEXT: ret void 1696 // 1697 // 1698 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 1699 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] { 1700 // CHECK4-NEXT: entry: 1701 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1702 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1703 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1704 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1705 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1706 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 1707 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 1708 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1709 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1710 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1711 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1712 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1713 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1714 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1715 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1716 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1717 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1718 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1719 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1720 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1721 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1722 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1723 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 1724 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 1725 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 1726 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1727 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1728 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1729 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1730 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1731 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1732 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1733 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1734 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1735 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1736 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1737 // CHECK4: omp.precond.then: 1738 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1739 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1740 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 1741 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1742 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1743 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4 1744 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 1745 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1746 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1747 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1748 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1749 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1750 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1751 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1752 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1753 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1754 // CHECK4: cond.true: 1755 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1756 // CHECK4-NEXT: br label [[COND_END:%.*]] 1757 // CHECK4: cond.false: 1758 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1759 // CHECK4-NEXT: br label [[COND_END]] 1760 // CHECK4: cond.end: 1761 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1762 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1763 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1764 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1765 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1766 // CHECK4: omp.inner.for.cond: 1767 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1768 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1769 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1770 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1771 // CHECK4: omp.inner.for.body: 1772 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1773 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1774 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1775 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1776 // CHECK4-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 4 1777 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0 1778 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1779 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 1780 // CHECK4-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]] 1781 // CHECK4-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX6]], align 4 1782 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1783 // CHECK4: omp.body.continue: 1784 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1785 // CHECK4: omp.inner.for.inc: 1786 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1787 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 1788 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 1789 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1790 // CHECK4: omp.inner.for.end: 1791 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1792 // CHECK4: omp.loop.exit: 1793 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1794 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 1795 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 1796 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1797 // CHECK4: omp.precond.end: 1798 // CHECK4-NEXT: ret void 1799 // 1800 // 1801 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1802 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 1803 // CHECK4-NEXT: entry: 1804 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1805 // CHECK4-NEXT: ret void 1806 // 1807 // 1808 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 1809 // CHECK10-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 1810 // CHECK10-NEXT: entry: 1811 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1812 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 1813 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1814 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 1815 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1816 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 1817 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1818 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 1819 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1820 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 1821 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1822 // CHECK10-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 1823 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1824 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 1825 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV3]], align 4 1826 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV4]], align 4 1827 // CHECK10-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1828 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 1829 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1830 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV5]], align 4 1831 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[N_CASTED]], align 8 1832 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], [1000 x i32]* [[TMP1]]) 1833 // CHECK10-NEXT: ret void 1834 // 1835 // 1836 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1837 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 1838 // CHECK10-NEXT: entry: 1839 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1840 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1841 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1842 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 1843 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1844 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1845 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1846 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1847 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1848 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1849 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1850 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1851 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1852 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 1853 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1854 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1855 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1856 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1857 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 1858 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1859 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 1860 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1861 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1862 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1863 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1864 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1865 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1866 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1867 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 1868 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1869 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1870 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1871 // CHECK10: omp.precond.then: 1872 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1873 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1874 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 1875 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1876 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1877 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1878 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1879 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1880 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1881 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1882 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1883 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1884 // CHECK10: cond.true: 1885 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1886 // CHECK10-NEXT: br label [[COND_END:%.*]] 1887 // CHECK10: cond.false: 1888 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1889 // CHECK10-NEXT: br label [[COND_END]] 1890 // CHECK10: cond.end: 1891 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1892 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1893 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1894 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 1895 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1896 // CHECK10: omp.inner.for.cond: 1897 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1898 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1899 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1900 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1901 // CHECK10: omp.inner.for.body: 1902 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1903 // CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 1904 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1905 // CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 1906 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 1907 // CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1908 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 1909 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 1910 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]]) 1911 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1912 // CHECK10: omp.inner.for.inc: 1913 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1914 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1915 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 1916 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1917 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1918 // CHECK10: omp.inner.for.end: 1919 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1920 // CHECK10: omp.loop.exit: 1921 // CHECK10-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1922 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 1923 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 1924 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 1925 // CHECK10: omp.precond.end: 1926 // CHECK10-NEXT: ret void 1927 // 1928 // 1929 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 1930 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 1931 // CHECK10-NEXT: entry: 1932 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1933 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1934 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1935 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1936 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1937 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 1938 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1939 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1940 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1941 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1942 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1943 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1944 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1945 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1946 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1947 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4 1948 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1949 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1950 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1951 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1952 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1953 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 1954 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1955 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 1956 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1957 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1958 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1959 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1960 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1961 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1962 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1963 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 1964 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1965 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1966 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1967 // CHECK10: omp.precond.then: 1968 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1969 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1970 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 1971 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1972 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 1973 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1974 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 1975 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 1976 // CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 1977 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1978 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1979 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1980 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1981 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1982 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1983 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1984 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1985 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1986 // CHECK10: cond.true: 1987 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1988 // CHECK10-NEXT: br label [[COND_END:%.*]] 1989 // CHECK10: cond.false: 1990 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1991 // CHECK10-NEXT: br label [[COND_END]] 1992 // CHECK10: cond.end: 1993 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1994 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1995 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1996 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1997 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1998 // CHECK10: omp.inner.for.cond: 1999 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2000 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2001 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2002 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2003 // CHECK10: omp.inner.for.body: 2004 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2005 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2006 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2007 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 2008 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I5]], align 4 2009 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 2010 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2011 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2012 // CHECK10-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2013 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2014 // CHECK10-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP19]], i32 2) 2015 // CHECK10-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2016 // CHECK10-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 2017 // CHECK10: .cancel.exit: 2018 // CHECK10-NEXT: br label [[CANCEL_EXIT:%.*]] 2019 // CHECK10: .cancel.continue: 2020 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2021 // CHECK10: omp.body.continue: 2022 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2023 // CHECK10: omp.inner.for.inc: 2024 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2025 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 2026 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2027 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2028 // CHECK10: omp.inner.for.end: 2029 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2030 // CHECK10: omp.loop.exit: 2031 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2032 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2033 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2034 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2035 // CHECK10: cancel.exit: 2036 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2037 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2038 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2039 // CHECK10-NEXT: br label [[CANCEL_CONT:%.*]] 2040 // CHECK10: omp.precond.end: 2041 // CHECK10-NEXT: br label [[CANCEL_CONT]] 2042 // CHECK10: cancel.cont: 2043 // CHECK10-NEXT: ret void 2044 // 2045 // 2046 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 2047 // CHECK10-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2048 // CHECK10-NEXT: entry: 2049 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2050 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 2051 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 2052 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2053 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2054 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 2055 // CHECK10-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 2056 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2057 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 2058 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 2059 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2060 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4 2061 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 2062 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8 2063 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]]) 2064 // CHECK10-NEXT: ret void 2065 // 2066 // 2067 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 2068 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2069 // CHECK10-NEXT: entry: 2070 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2071 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2072 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2073 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 2074 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 2075 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2076 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2077 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2078 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2079 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2080 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2081 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2082 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2083 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2084 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 2085 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2086 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2087 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2088 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2089 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 2090 // CHECK10-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 2091 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2092 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 2093 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 2094 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2095 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2096 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2097 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2098 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2099 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2100 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2101 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2102 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2103 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2104 // CHECK10: omp.precond.then: 2105 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2106 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2107 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 2108 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2109 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2110 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2111 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2112 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2113 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2114 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2115 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 2116 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2117 // CHECK10: cond.true: 2118 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2119 // CHECK10-NEXT: br label [[COND_END:%.*]] 2120 // CHECK10: cond.false: 2121 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2122 // CHECK10-NEXT: br label [[COND_END]] 2123 // CHECK10: cond.end: 2124 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 2125 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2126 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2127 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 2128 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2129 // CHECK10: omp.inner.for.cond: 2130 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2131 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2132 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2133 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2134 // CHECK10: omp.inner.for.body: 2135 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2136 // CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 2137 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2138 // CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 2139 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4 2140 // CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2141 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 2142 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 2143 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8 2144 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]]) 2145 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2146 // CHECK10: omp.inner.for.inc: 2147 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2148 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2149 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2150 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2151 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2152 // CHECK10: omp.inner.for.end: 2153 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2154 // CHECK10: omp.loop.exit: 2155 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2156 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2157 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2158 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2159 // CHECK10: omp.precond.end: 2160 // CHECK10-NEXT: ret void 2161 // 2162 // 2163 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 2164 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2165 // CHECK10-NEXT: entry: 2166 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2167 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2168 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2169 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2170 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2171 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8 2172 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 2173 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2174 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2175 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2176 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2177 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2178 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2179 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2180 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2181 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2182 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4 2183 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2184 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2185 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2186 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2187 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2188 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8 2189 // CHECK10-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 2190 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2191 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8 2192 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 2193 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2194 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2195 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2196 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2197 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2198 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2199 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2200 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2201 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2202 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2203 // CHECK10: omp.precond.then: 2204 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2205 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2206 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 2207 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2208 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32 2209 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2210 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32 2211 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 2212 // CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 2213 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2214 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2215 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2216 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2217 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2218 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2219 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2220 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2221 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2222 // CHECK10: cond.true: 2223 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2224 // CHECK10-NEXT: br label [[COND_END:%.*]] 2225 // CHECK10: cond.false: 2226 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2227 // CHECK10-NEXT: br label [[COND_END]] 2228 // CHECK10: cond.end: 2229 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2230 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2231 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2232 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2233 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2234 // CHECK10: omp.inner.for.cond: 2235 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2236 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2237 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2238 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2239 // CHECK10: omp.inner.for.body: 2240 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2241 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2242 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2243 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 2244 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8 2245 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0 2246 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2247 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 2248 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2249 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2250 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4 2251 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2252 // CHECK10: omp.body.continue: 2253 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2254 // CHECK10: omp.inner.for.inc: 2255 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2256 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 2257 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 2258 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2259 // CHECK10: omp.inner.for.end: 2260 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2261 // CHECK10: omp.loop.exit: 2262 // CHECK10-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2263 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2264 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2265 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2266 // CHECK10: omp.precond.end: 2267 // CHECK10-NEXT: ret void 2268 // 2269 // 2270 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 2271 // CHECK12-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 2272 // CHECK12-NEXT: entry: 2273 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2274 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2275 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2276 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 2277 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2278 // CHECK12-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 2279 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2280 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2281 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2282 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 2283 // CHECK12-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2284 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2285 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 2286 // CHECK12-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 2287 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 2288 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 2289 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 2290 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP5]], [1000 x i32]* [[TMP1]]) 2291 // CHECK12-NEXT: ret void 2292 // 2293 // 2294 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 2295 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 2296 // CHECK12-NEXT: entry: 2297 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2298 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2299 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2300 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2301 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2302 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2303 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2304 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2305 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2306 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2307 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2308 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2309 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2310 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2311 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2312 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2313 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2314 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2315 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2316 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2317 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2318 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2319 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2320 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2321 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2322 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2323 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2324 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2325 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2326 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2327 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2328 // CHECK12: omp.precond.then: 2329 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2330 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2331 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 2332 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2333 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2334 // CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2335 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2336 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2337 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2338 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2339 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 2340 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2341 // CHECK12: cond.true: 2342 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2343 // CHECK12-NEXT: br label [[COND_END:%.*]] 2344 // CHECK12: cond.false: 2345 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2346 // CHECK12-NEXT: br label [[COND_END]] 2347 // CHECK12: cond.end: 2348 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 2349 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2350 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2351 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 2352 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2353 // CHECK12: omp.inner.for.cond: 2354 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2355 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2356 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2357 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2358 // CHECK12: omp.inner.for.body: 2359 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2360 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2361 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 2362 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 2363 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 2364 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]]) 2365 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2366 // CHECK12: omp.inner.for.inc: 2367 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2368 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2369 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 2370 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2371 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2372 // CHECK12: omp.inner.for.end: 2373 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2374 // CHECK12: omp.loop.exit: 2375 // CHECK12-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2376 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 2377 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 2378 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2379 // CHECK12: omp.precond.end: 2380 // CHECK12-NEXT: ret void 2381 // 2382 // 2383 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 2384 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 2385 // CHECK12-NEXT: entry: 2386 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2387 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2388 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2389 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2390 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2391 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2392 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2393 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2394 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2395 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2396 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2397 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2398 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2399 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2400 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2401 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2402 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2403 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2404 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2405 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2406 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2407 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2408 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2409 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2410 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2411 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2412 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2413 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2414 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2415 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2416 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2417 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2418 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2419 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2420 // CHECK12: omp.precond.then: 2421 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2422 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2423 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 2424 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2425 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2426 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4 2427 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2428 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2429 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2430 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2431 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2432 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2433 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2434 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2435 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2436 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2437 // CHECK12: cond.true: 2438 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2439 // CHECK12-NEXT: br label [[COND_END:%.*]] 2440 // CHECK12: cond.false: 2441 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2442 // CHECK12-NEXT: br label [[COND_END]] 2443 // CHECK12: cond.end: 2444 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2445 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2446 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2447 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2448 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2449 // CHECK12: omp.inner.for.cond: 2450 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2451 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2452 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2453 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2454 // CHECK12: omp.inner.for.body: 2455 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2456 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2457 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2458 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2459 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4 2460 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP17]] 2461 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2462 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2463 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2464 // CHECK12-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP19]], i32 2) 2465 // CHECK12-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2466 // CHECK12-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 2467 // CHECK12: .cancel.exit: 2468 // CHECK12-NEXT: br label [[CANCEL_EXIT:%.*]] 2469 // CHECK12: .cancel.continue: 2470 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2471 // CHECK12: omp.body.continue: 2472 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2473 // CHECK12: omp.inner.for.inc: 2474 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2475 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 2476 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2477 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2478 // CHECK12: omp.inner.for.end: 2479 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2480 // CHECK12: omp.loop.exit: 2481 // CHECK12-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2482 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2483 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2484 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2485 // CHECK12: cancel.exit: 2486 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2487 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2488 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2489 // CHECK12-NEXT: br label [[CANCEL_CONT:%.*]] 2490 // CHECK12: omp.precond.end: 2491 // CHECK12-NEXT: br label [[CANCEL_CONT]] 2492 // CHECK12: cancel.cont: 2493 // CHECK12-NEXT: ret void 2494 // 2495 // 2496 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 2497 // CHECK12-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2498 // CHECK12-NEXT: entry: 2499 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2500 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2501 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 2502 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2503 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2504 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2505 // CHECK12-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 2506 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2507 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2508 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 2509 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 2510 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 4 2511 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]]) 2512 // CHECK12-NEXT: ret void 2513 // 2514 // 2515 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 2516 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2517 // CHECK12-NEXT: entry: 2518 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2519 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2520 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2521 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2522 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 2523 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2524 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2525 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2526 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2527 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2528 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2529 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2530 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2531 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2532 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2533 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2534 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2535 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2536 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2537 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2538 // CHECK12-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 2539 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2540 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2541 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2542 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2543 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2544 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2545 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2546 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2547 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2548 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2549 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2550 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2551 // CHECK12: omp.precond.then: 2552 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2553 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2554 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4 2555 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2556 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2557 // CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2558 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2559 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2560 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2561 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2562 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 2563 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2564 // CHECK12: cond.true: 2565 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2566 // CHECK12-NEXT: br label [[COND_END:%.*]] 2567 // CHECK12: cond.false: 2568 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2569 // CHECK12-NEXT: br label [[COND_END]] 2570 // CHECK12: cond.end: 2571 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 2572 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2573 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2574 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 2575 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2576 // CHECK12: omp.inner.for.cond: 2577 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2578 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2579 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2580 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2581 // CHECK12: omp.inner.for.body: 2582 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2583 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2584 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 2585 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 2586 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 2587 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[G_ADDR]], align 4 2588 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]], i32* [[TMP18]]) 2589 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2590 // CHECK12: omp.inner.for.inc: 2591 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2592 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2593 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2594 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2595 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2596 // CHECK12: omp.inner.for.end: 2597 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2598 // CHECK12: omp.loop.exit: 2599 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2600 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2601 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2602 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2603 // CHECK12: omp.precond.end: 2604 // CHECK12-NEXT: ret void 2605 // 2606 // 2607 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 2608 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] { 2609 // CHECK12-NEXT: entry: 2610 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2611 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2612 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2613 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2614 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2615 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4 2616 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4 2617 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2618 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2619 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2620 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2621 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2622 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2623 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2624 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2625 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2626 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2627 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2628 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2629 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2630 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2631 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2632 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4 2633 // CHECK12-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4 2634 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4 2635 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2636 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2637 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2638 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2639 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2640 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2641 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2642 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2643 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2644 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2645 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2646 // CHECK12: omp.precond.then: 2647 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2648 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2649 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 2650 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2651 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2652 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4 2653 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 2654 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2655 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2656 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2657 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2658 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2659 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2660 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2661 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2662 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2663 // CHECK12: cond.true: 2664 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2665 // CHECK12-NEXT: br label [[COND_END:%.*]] 2666 // CHECK12: cond.false: 2667 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2668 // CHECK12-NEXT: br label [[COND_END]] 2669 // CHECK12: cond.end: 2670 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2671 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2672 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2673 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2674 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2675 // CHECK12: omp.inner.for.cond: 2676 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2677 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2678 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2679 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2680 // CHECK12: omp.inner.for.body: 2681 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2682 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2683 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2684 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2685 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 4 2686 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0 2687 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2688 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 2689 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]] 2690 // CHECK12-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX6]], align 4 2691 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2692 // CHECK12: omp.body.continue: 2693 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2694 // CHECK12: omp.inner.for.inc: 2695 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2696 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 2697 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2698 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2699 // CHECK12: omp.inner.for.end: 2700 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2701 // CHECK12: omp.loop.exit: 2702 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2703 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2704 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2705 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2706 // CHECK12: omp.precond.end: 2707 // CHECK12-NEXT: ret void 2708 // 2709