1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var) 50 for (int i = 0; i < 2; ++i) { 51 vec[i] = t_var; 52 s_arr[i] = var; 53 } 54 return T(); 55 } 56 57 int main() { 58 static int svar; 59 volatile double g; 60 volatile double &g1 = g; 61 62 #ifdef LAMBDA 63 [&]() { 64 static float sfvar; 65 66 #pragma omp target teams distribute lastprivate(g, g1, svar, sfvar) 67 for (int i = 0; i < 2; ++i) { 68 // loop variables 69 70 // init private variables 71 g = 1; 72 g1 = 1; 73 svar = 3; 74 sfvar = 4.0; 75 76 77 [&]() { 78 g = 2; 79 g1 = 2; 80 svar = 4; 81 sfvar = 8.0; 82 83 }(); 84 } 85 }(); 86 return 0; 87 #else 88 S<float> test; 89 int t_var = 0; 90 int vec[] = {1, 2}; 91 S<float> s_arr[] = {1, 2}; 92 S<float> &var = test; 93 94 #pragma omp target teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var, svar) 95 for (int i = 0; i < 2; ++i) { 96 vec[i] = t_var; 97 s_arr[i] = var; 98 } 99 int i; 100 101 return tmain<int>(); 102 #endif 103 } 104 105 106 // skip loop variables 107 108 // copy from parameters to local address variables 109 110 // load content of local address variables 111 // the distribute loop 112 // assignment: vec[i] = t_var; 113 114 // assignment: s_arr[i] = var; 115 116 // lastprivates 117 118 119 // template tmain 120 121 122 123 // skip alloca of global_tid and bound_tid 124 // skip loop variables 125 126 // skip init of bound and global tid 127 // copy from parameters to local address variables 128 129 // load content of local address variables 130 // assignment: vec[i] = t_var; 131 132 // assignment: s_arr[i] = var; 133 134 // lastprivates 135 136 #endif 137 // CHECK1-LABEL: define {{[^@]+}}@main 138 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 139 // CHECK1-NEXT: entry: 140 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 142 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 143 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 144 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 145 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 146 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 147 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8 148 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 149 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 150 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 151 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 152 // CHECK1-NEXT: ret i32 0 153 // 154 // 155 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 156 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 157 // CHECK1-NEXT: entry: 158 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 159 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 160 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 161 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 162 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 163 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8 164 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8 165 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 166 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8 167 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 168 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 169 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 170 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 171 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 172 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 173 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 174 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 175 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 176 // CHECK1-NEXT: [[TMP0:%.*]] = load double, double* [[CONV]], align 8 177 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[G_CASTED]] to double* 178 // CHECK1-NEXT: store double [[TMP0]], double* [[CONV4]], align 8 179 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[G_CASTED]], align 8 180 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 8 181 // CHECK1-NEXT: [[TMP3:%.*]] = load volatile double, double* [[TMP2]], align 8 182 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[G1_CASTED]] to double* 183 // CHECK1-NEXT: store double [[TMP3]], double* [[CONV5]], align 8 184 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[G1_CASTED]], align 8 185 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 4 186 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 187 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV6]], align 4 188 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 189 // CHECK1-NEXT: [[TMP7:%.*]] = load float, float* [[CONV3]], align 4 190 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* 191 // CHECK1-NEXT: store float [[TMP7]], float* [[CONV7]], align 4 192 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8 193 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) 194 // CHECK1-NEXT: ret void 195 // 196 // 197 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 198 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 199 // CHECK1-NEXT: entry: 200 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 201 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 202 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 203 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 204 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 205 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 206 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 207 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 208 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 209 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 210 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 211 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 212 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 213 // CHECK1-NEXT: [[G5:%.*]] = alloca double, align 8 214 // CHECK1-NEXT: [[G16:%.*]] = alloca double, align 8 215 // CHECK1-NEXT: [[_TMP7:%.*]] = alloca double*, align 8 216 // CHECK1-NEXT: [[SVAR8:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: [[SFVAR9:%.*]] = alloca float, align 4 218 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 219 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 220 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 221 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 222 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 223 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 224 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 225 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 226 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 227 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 228 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 229 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 230 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 231 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 232 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 233 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 234 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 235 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 236 // CHECK1-NEXT: store double* [[G16]], double** [[_TMP7]], align 8 237 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 238 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 239 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 240 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 241 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 242 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 243 // CHECK1: cond.true: 244 // CHECK1-NEXT: br label [[COND_END:%.*]] 245 // CHECK1: cond.false: 246 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 247 // CHECK1-NEXT: br label [[COND_END]] 248 // CHECK1: cond.end: 249 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 250 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 251 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 252 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 253 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 254 // CHECK1: omp.inner.for.cond: 255 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 256 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 257 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 258 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 259 // CHECK1: omp.inner.for.body: 260 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 261 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 262 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 263 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 264 // CHECK1-NEXT: store double 1.000000e+00, double* [[G5]], align 8 265 // CHECK1-NEXT: [[TMP9:%.*]] = load double*, double** [[_TMP7]], align 8 266 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP9]], align 8 267 // CHECK1-NEXT: store i32 3, i32* [[SVAR8]], align 4 268 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR9]], align 4 269 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 270 // CHECK1-NEXT: store double* [[G5]], double** [[TMP10]], align 8 271 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 272 // CHECK1-NEXT: [[TMP12:%.*]] = load double*, double** [[_TMP7]], align 8 273 // CHECK1-NEXT: store double* [[TMP12]], double** [[TMP11]], align 8 274 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 275 // CHECK1-NEXT: store i32* [[SVAR8]], i32** [[TMP13]], align 8 276 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 277 // CHECK1-NEXT: store float* [[SFVAR9]], float** [[TMP14]], align 8 278 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 279 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 280 // CHECK1: omp.body.continue: 281 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 282 // CHECK1: omp.inner.for.inc: 283 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 284 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], 1 285 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 286 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 287 // CHECK1: omp.inner.for.end: 288 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 289 // CHECK1: omp.loop.exit: 290 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 291 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 292 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 293 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 294 // CHECK1: .omp.lastprivate.then: 295 // CHECK1-NEXT: [[TMP18:%.*]] = load double, double* [[G5]], align 8 296 // CHECK1-NEXT: store volatile double [[TMP18]], double* [[CONV]], align 8 297 // CHECK1-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP7]], align 8 298 // CHECK1-NEXT: [[TMP20:%.*]] = load double, double* [[TMP19]], align 8 299 // CHECK1-NEXT: store volatile double [[TMP20]], double* [[TMP0]], align 8 300 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR8]], align 4 301 // CHECK1-NEXT: store i32 [[TMP21]], i32* [[CONV2]], align 4 302 // CHECK1-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR9]], align 4 303 // CHECK1-NEXT: store float [[TMP22]], float* [[CONV3]], align 4 304 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 305 // CHECK1: .omp.lastprivate.done: 306 // CHECK1-NEXT: ret void 307 // 308 // 309 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 310 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 311 // CHECK1-NEXT: entry: 312 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 313 // CHECK1-NEXT: ret void 314 // 315 // 316 // CHECK2-LABEL: define {{[^@]+}}@main 317 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 318 // CHECK2-NEXT: entry: 319 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 320 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 321 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 322 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 323 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 324 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 325 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 326 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8 327 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 328 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 329 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 330 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 331 // CHECK2-NEXT: ret i32 0 332 // 333 // 334 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 335 // CHECK2-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 336 // CHECK2-NEXT: entry: 337 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 338 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 339 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 340 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 341 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 342 // CHECK2-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8 343 // CHECK2-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8 344 // CHECK2-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 345 // CHECK2-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8 346 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 347 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 348 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 349 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 350 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 351 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 352 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 353 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 354 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 355 // CHECK2-NEXT: [[TMP0:%.*]] = load double, double* [[CONV]], align 8 356 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[G_CASTED]] to double* 357 // CHECK2-NEXT: store double [[TMP0]], double* [[CONV4]], align 8 358 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[G_CASTED]], align 8 359 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 8 360 // CHECK2-NEXT: [[TMP3:%.*]] = load volatile double, double* [[TMP2]], align 8 361 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[G1_CASTED]] to double* 362 // CHECK2-NEXT: store double [[TMP3]], double* [[CONV5]], align 8 363 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[G1_CASTED]], align 8 364 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 4 365 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 366 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV6]], align 4 367 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 368 // CHECK2-NEXT: [[TMP7:%.*]] = load float, float* [[CONV3]], align 4 369 // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* 370 // CHECK2-NEXT: store float [[TMP7]], float* [[CONV7]], align 4 371 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8 372 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) 373 // CHECK2-NEXT: ret void 374 // 375 // 376 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 377 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 378 // CHECK2-NEXT: entry: 379 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 380 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 381 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 382 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 383 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 384 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 385 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 386 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 387 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 388 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 389 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 390 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 391 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 392 // CHECK2-NEXT: [[G5:%.*]] = alloca double, align 8 393 // CHECK2-NEXT: [[G16:%.*]] = alloca double, align 8 394 // CHECK2-NEXT: [[_TMP7:%.*]] = alloca double*, align 8 395 // CHECK2-NEXT: [[SVAR8:%.*]] = alloca i32, align 4 396 // CHECK2-NEXT: [[SFVAR9:%.*]] = alloca float, align 4 397 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 398 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 399 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 400 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 401 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 402 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 403 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 404 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 405 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 406 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 407 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 408 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 409 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 410 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 411 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 412 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 413 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 414 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 415 // CHECK2-NEXT: store double* [[G16]], double** [[_TMP7]], align 8 416 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 417 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 418 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 419 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 420 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 421 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 422 // CHECK2: cond.true: 423 // CHECK2-NEXT: br label [[COND_END:%.*]] 424 // CHECK2: cond.false: 425 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 426 // CHECK2-NEXT: br label [[COND_END]] 427 // CHECK2: cond.end: 428 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 429 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 430 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 431 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 432 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 433 // CHECK2: omp.inner.for.cond: 434 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 435 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 436 // CHECK2-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 437 // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 438 // CHECK2: omp.inner.for.body: 439 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 440 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 441 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 442 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 443 // CHECK2-NEXT: store double 1.000000e+00, double* [[G5]], align 8 444 // CHECK2-NEXT: [[TMP9:%.*]] = load double*, double** [[_TMP7]], align 8 445 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP9]], align 8 446 // CHECK2-NEXT: store i32 3, i32* [[SVAR8]], align 4 447 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR9]], align 4 448 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 449 // CHECK2-NEXT: store double* [[G5]], double** [[TMP10]], align 8 450 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 451 // CHECK2-NEXT: [[TMP12:%.*]] = load double*, double** [[_TMP7]], align 8 452 // CHECK2-NEXT: store double* [[TMP12]], double** [[TMP11]], align 8 453 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 454 // CHECK2-NEXT: store i32* [[SVAR8]], i32** [[TMP13]], align 8 455 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 456 // CHECK2-NEXT: store float* [[SFVAR9]], float** [[TMP14]], align 8 457 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 458 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 459 // CHECK2: omp.body.continue: 460 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 461 // CHECK2: omp.inner.for.inc: 462 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 463 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], 1 464 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 465 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 466 // CHECK2: omp.inner.for.end: 467 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 468 // CHECK2: omp.loop.exit: 469 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 470 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 471 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 472 // CHECK2-NEXT: br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 473 // CHECK2: .omp.lastprivate.then: 474 // CHECK2-NEXT: [[TMP18:%.*]] = load double, double* [[G5]], align 8 475 // CHECK2-NEXT: store volatile double [[TMP18]], double* [[CONV]], align 8 476 // CHECK2-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP7]], align 8 477 // CHECK2-NEXT: [[TMP20:%.*]] = load double, double* [[TMP19]], align 8 478 // CHECK2-NEXT: store volatile double [[TMP20]], double* [[TMP0]], align 8 479 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR8]], align 4 480 // CHECK2-NEXT: store i32 [[TMP21]], i32* [[CONV2]], align 4 481 // CHECK2-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR9]], align 4 482 // CHECK2-NEXT: store float [[TMP22]], float* [[CONV3]], align 4 483 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 484 // CHECK2: .omp.lastprivate.done: 485 // CHECK2-NEXT: ret void 486 // 487 // 488 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 489 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 490 // CHECK2-NEXT: entry: 491 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 492 // CHECK2-NEXT: ret void 493 // 494 // 495 // CHECK3-LABEL: define {{[^@]+}}@main 496 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 497 // CHECK3-NEXT: entry: 498 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 499 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 500 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 501 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 502 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 503 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 504 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 505 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4 506 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 507 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 508 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 509 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 510 // CHECK3-NEXT: ret i32 0 511 // 512 // 513 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 514 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 515 // CHECK3-NEXT: entry: 516 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 517 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 518 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 519 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 520 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 521 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 522 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4 523 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 524 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 525 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 526 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 527 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 528 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 529 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 530 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 531 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 4 532 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 533 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[SVAR_CASTED]], align 4 534 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 535 // CHECK3-NEXT: [[TMP5:%.*]] = load float, float* [[CONV]], align 4 536 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* 537 // CHECK3-NEXT: store float [[TMP5]], float* [[CONV1]], align 4 538 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4 539 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[TMP0]], double* [[TMP2]], i32 [[TMP4]], i32 [[TMP6]]) 540 // CHECK3-NEXT: ret void 541 // 542 // 543 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 544 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 545 // CHECK3-NEXT: entry: 546 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 547 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 548 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 549 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 550 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 551 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 552 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 553 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 554 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 555 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 556 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 557 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 558 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 559 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 560 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 561 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 562 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 563 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 564 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 565 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 566 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 567 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 568 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 569 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 570 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 571 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 572 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 573 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 574 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 575 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 576 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 577 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 578 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 579 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 580 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 4 581 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 582 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 583 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 584 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 585 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 586 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 587 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 588 // CHECK3: cond.true: 589 // CHECK3-NEXT: br label [[COND_END:%.*]] 590 // CHECK3: cond.false: 591 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 592 // CHECK3-NEXT: br label [[COND_END]] 593 // CHECK3: cond.end: 594 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 595 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 596 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 597 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 598 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 599 // CHECK3: omp.inner.for.cond: 600 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 601 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 602 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 603 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 604 // CHECK3: omp.inner.for.body: 605 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 606 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 607 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 608 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 609 // CHECK3-NEXT: store double 1.000000e+00, double* [[G2]], align 8 610 // CHECK3-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP4]], align 4 611 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP11]], align 4 612 // CHECK3-NEXT: store i32 3, i32* [[SVAR5]], align 4 613 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 614 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 615 // CHECK3-NEXT: store double* [[G2]], double** [[TMP12]], align 4 616 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 617 // CHECK3-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP4]], align 4 618 // CHECK3-NEXT: store double* [[TMP14]], double** [[TMP13]], align 4 619 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 620 // CHECK3-NEXT: store i32* [[SVAR5]], i32** [[TMP15]], align 4 621 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 622 // CHECK3-NEXT: store float* [[SFVAR6]], float** [[TMP16]], align 4 623 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 624 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 625 // CHECK3: omp.body.continue: 626 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 627 // CHECK3: omp.inner.for.inc: 628 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 629 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 630 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 631 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 632 // CHECK3: omp.inner.for.end: 633 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 634 // CHECK3: omp.loop.exit: 635 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 636 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 637 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 638 // CHECK3-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 639 // CHECK3: .omp.lastprivate.then: 640 // CHECK3-NEXT: [[TMP20:%.*]] = load double, double* [[G2]], align 8 641 // CHECK3-NEXT: store volatile double [[TMP20]], double* [[TMP0]], align 8 642 // CHECK3-NEXT: [[TMP21:%.*]] = load double*, double** [[_TMP4]], align 4 643 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[TMP21]], align 4 644 // CHECK3-NEXT: store volatile double [[TMP22]], double* [[TMP2]], align 4 645 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR5]], align 4 646 // CHECK3-NEXT: store i32 [[TMP23]], i32* [[SVAR_ADDR]], align 4 647 // CHECK3-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR6]], align 4 648 // CHECK3-NEXT: store float [[TMP24]], float* [[CONV]], align 4 649 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 650 // CHECK3: .omp.lastprivate.done: 651 // CHECK3-NEXT: ret void 652 // 653 // 654 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 655 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 656 // CHECK3-NEXT: entry: 657 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 658 // CHECK3-NEXT: ret void 659 // 660 // 661 // CHECK4-LABEL: define {{[^@]+}}@main 662 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 663 // CHECK4-NEXT: entry: 664 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 665 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 666 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 667 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 668 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 669 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 670 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 671 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4 672 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 673 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 674 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 675 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 676 // CHECK4-NEXT: ret i32 0 677 // 678 // 679 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 680 // CHECK4-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 681 // CHECK4-NEXT: entry: 682 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 683 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 684 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 685 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 686 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 687 // CHECK4-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 688 // CHECK4-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4 689 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 690 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 691 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 692 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 693 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 694 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 695 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 696 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 697 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 4 698 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 699 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[SVAR_CASTED]], align 4 700 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 701 // CHECK4-NEXT: [[TMP5:%.*]] = load float, float* [[CONV]], align 4 702 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* 703 // CHECK4-NEXT: store float [[TMP5]], float* [[CONV1]], align 4 704 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4 705 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[TMP0]], double* [[TMP2]], i32 [[TMP4]], i32 [[TMP6]]) 706 // CHECK4-NEXT: ret void 707 // 708 // 709 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 710 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 711 // CHECK4-NEXT: entry: 712 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 713 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 714 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 715 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 716 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 717 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 718 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 719 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 720 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 721 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 722 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 723 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 724 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 725 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 726 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 727 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 728 // CHECK4-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 729 // CHECK4-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 730 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 731 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 732 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 733 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 734 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 735 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 736 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 737 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 738 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 739 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 740 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 741 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 742 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 743 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 744 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 745 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 746 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 4 747 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 748 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 749 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 750 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 751 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 752 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 753 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 754 // CHECK4: cond.true: 755 // CHECK4-NEXT: br label [[COND_END:%.*]] 756 // CHECK4: cond.false: 757 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 758 // CHECK4-NEXT: br label [[COND_END]] 759 // CHECK4: cond.end: 760 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 761 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 762 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 763 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 764 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 765 // CHECK4: omp.inner.for.cond: 766 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 767 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 768 // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 769 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 770 // CHECK4: omp.inner.for.body: 771 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 772 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 773 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 774 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 775 // CHECK4-NEXT: store double 1.000000e+00, double* [[G2]], align 8 776 // CHECK4-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP4]], align 4 777 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP11]], align 4 778 // CHECK4-NEXT: store i32 3, i32* [[SVAR5]], align 4 779 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4 780 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 781 // CHECK4-NEXT: store double* [[G2]], double** [[TMP12]], align 4 782 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 783 // CHECK4-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP4]], align 4 784 // CHECK4-NEXT: store double* [[TMP14]], double** [[TMP13]], align 4 785 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 786 // CHECK4-NEXT: store i32* [[SVAR5]], i32** [[TMP15]], align 4 787 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 788 // CHECK4-NEXT: store float* [[SFVAR6]], float** [[TMP16]], align 4 789 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 790 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 791 // CHECK4: omp.body.continue: 792 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 793 // CHECK4: omp.inner.for.inc: 794 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 795 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 796 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 797 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 798 // CHECK4: omp.inner.for.end: 799 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 800 // CHECK4: omp.loop.exit: 801 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 802 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 803 // CHECK4-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 804 // CHECK4-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 805 // CHECK4: .omp.lastprivate.then: 806 // CHECK4-NEXT: [[TMP20:%.*]] = load double, double* [[G2]], align 8 807 // CHECK4-NEXT: store volatile double [[TMP20]], double* [[TMP0]], align 8 808 // CHECK4-NEXT: [[TMP21:%.*]] = load double*, double** [[_TMP4]], align 4 809 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[TMP21]], align 4 810 // CHECK4-NEXT: store volatile double [[TMP22]], double* [[TMP2]], align 4 811 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR5]], align 4 812 // CHECK4-NEXT: store i32 [[TMP23]], i32* [[SVAR_ADDR]], align 4 813 // CHECK4-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR6]], align 4 814 // CHECK4-NEXT: store float [[TMP24]], float* [[CONV]], align 4 815 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 816 // CHECK4: .omp.lastprivate.done: 817 // CHECK4-NEXT: ret void 818 // 819 // 820 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 821 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 822 // CHECK4-NEXT: entry: 823 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 824 // CHECK4-NEXT: ret void 825 // 826 // 827 // CHECK9-LABEL: define {{[^@]+}}@main 828 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 829 // CHECK9-NEXT: entry: 830 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 831 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 832 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 833 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 834 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 835 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 836 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 837 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 838 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 839 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 840 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 841 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 842 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 843 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 844 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 845 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 846 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 847 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 848 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 849 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 850 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 851 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 852 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 853 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 854 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 855 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 856 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 857 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 858 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 859 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 860 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 861 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 862 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 863 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 864 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 865 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 866 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 867 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 868 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 869 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 870 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8 871 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 872 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 873 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 8 874 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 875 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 876 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 877 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 878 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 879 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 880 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 881 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 882 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 883 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 884 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 885 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]** 886 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 8 887 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 888 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 889 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 890 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 891 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8 892 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 893 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S** 894 // CHECK9-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 8 895 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 896 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 897 // CHECK9-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 8 898 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 899 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8 900 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 901 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 902 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP28]], align 8 903 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 904 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 905 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 906 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 907 // CHECK9-NEXT: store i8* null, i8** [[TMP31]], align 8 908 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 909 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 910 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 911 // CHECK9-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 5, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 912 // CHECK9-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 913 // CHECK9-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 914 // CHECK9: omp_offload.failed: 915 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 916 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 917 // CHECK9: omp_offload.cont: 918 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 919 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 920 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 921 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 922 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 923 // CHECK9: arraydestroy.body: 924 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 925 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 926 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 927 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 928 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 929 // CHECK9: arraydestroy.done3: 930 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 931 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[RETVAL]], align 4 932 // CHECK9-NEXT: ret i32 [[TMP37]] 933 // 934 // 935 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 936 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 937 // CHECK9-NEXT: entry: 938 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 939 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 940 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 941 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 942 // CHECK9-NEXT: ret void 943 // 944 // 945 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 946 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 947 // CHECK9-NEXT: entry: 948 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 949 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 950 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 951 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 952 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 953 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 954 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 955 // CHECK9-NEXT: ret void 956 // 957 // 958 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 959 // CHECK9-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 960 // CHECK9-NEXT: entry: 961 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 962 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 963 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 964 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 965 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 966 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 967 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 968 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 969 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 970 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 971 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 972 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 973 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 974 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 975 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 976 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 977 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 978 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 979 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 980 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 981 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 982 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 983 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 984 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 985 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4 986 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 987 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4 988 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 989 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i64 [[TMP7]]) 990 // CHECK9-NEXT: ret void 991 // 992 // 993 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 994 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] { 995 // CHECK9-NEXT: entry: 996 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 997 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 998 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 999 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1000 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1001 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1002 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1003 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1004 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1005 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1006 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1007 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1008 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1009 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1010 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1011 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1012 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1013 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1014 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8 1015 // CHECK9-NEXT: [[SVAR8:%.*]] = alloca i32, align 4 1016 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1017 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1018 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1019 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1020 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1021 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1022 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1023 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1024 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1025 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1026 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1027 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1028 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1029 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1030 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1031 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1032 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1033 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1034 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1035 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1036 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1037 // CHECK9: arrayctor.loop: 1038 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1039 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1040 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1041 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1042 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1043 // CHECK9: arrayctor.cont: 1044 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1045 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) 1046 // CHECK9-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8 1047 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1048 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1049 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1050 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1051 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1052 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1053 // CHECK9: cond.true: 1054 // CHECK9-NEXT: br label [[COND_END:%.*]] 1055 // CHECK9: cond.false: 1056 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1057 // CHECK9-NEXT: br label [[COND_END]] 1058 // CHECK9: cond.end: 1059 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1060 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1061 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1062 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1063 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1064 // CHECK9: omp.inner.for.cond: 1065 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1066 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1067 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1068 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1069 // CHECK9: omp.inner.for.cond.cleanup: 1070 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1071 // CHECK9: omp.inner.for.body: 1072 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1073 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1074 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1075 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1076 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR3]], align 4 1077 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1078 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1079 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1080 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 1081 // CHECK9-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 1082 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1083 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP15]] to i64 1084 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 1085 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* 1086 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* 1087 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false) 1088 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1089 // CHECK9: omp.body.continue: 1090 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1091 // CHECK9: omp.inner.for.inc: 1092 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1093 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP18]], 1 1094 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1095 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1096 // CHECK9: omp.inner.for.end: 1097 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1098 // CHECK9: omp.loop.exit: 1099 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1100 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1101 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1102 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1103 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1104 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1105 // CHECK9: .omp.lastprivate.then: 1106 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4 1107 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 1108 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1109 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1110 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false) 1111 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0 1112 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S* 1113 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2 1114 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP27]] 1115 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1116 // CHECK9: omp.arraycpy.body: 1117 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1118 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1119 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1120 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1121 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 4, i1 false) 1122 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1123 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1124 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 1125 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] 1126 // CHECK9: omp.arraycpy.done14: 1127 // CHECK9-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 1128 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 1129 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP30]] to i8* 1130 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false) 1131 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[SVAR8]], align 4 1132 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 4 1133 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1134 // CHECK9: .omp.lastprivate.done: 1135 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]] 1136 // CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1137 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 1138 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1139 // CHECK9: arraydestroy.body: 1140 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1141 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1142 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1143 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]] 1144 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]] 1145 // CHECK9: arraydestroy.done16: 1146 // CHECK9-NEXT: ret void 1147 // 1148 // 1149 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1150 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1151 // CHECK9-NEXT: entry: 1152 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1153 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1154 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1155 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1156 // CHECK9-NEXT: ret void 1157 // 1158 // 1159 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1160 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 1161 // CHECK9-NEXT: entry: 1162 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1163 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1164 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1165 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1166 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1167 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1168 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1169 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1170 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1171 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1172 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1173 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1174 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1175 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1176 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1177 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1178 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1179 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1180 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1181 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1182 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1183 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1184 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1185 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1186 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1187 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1188 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1189 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1190 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1191 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]** 1192 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 8 1193 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1194 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 1195 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8 1196 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1197 // CHECK9-NEXT: store i8* null, i8** [[TMP9]], align 8 1198 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1199 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 1200 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 1201 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1202 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1203 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 1204 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1205 // CHECK9-NEXT: store i8* null, i8** [[TMP14]], align 8 1206 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1207 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]** 1208 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 8 1209 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1210 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1211 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1212 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1213 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8 1214 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1215 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0** 1216 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 8 1217 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1218 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1219 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 8 1220 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1221 // CHECK9-NEXT: store i8* null, i8** [[TMP24]], align 8 1222 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1223 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1224 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1225 // CHECK9-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1226 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 1227 // CHECK9-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1228 // CHECK9: omp_offload.failed: 1229 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1230 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1231 // CHECK9: omp_offload.cont: 1232 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1233 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1234 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1235 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1236 // CHECK9: arraydestroy.body: 1237 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1238 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1239 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1240 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1241 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1242 // CHECK9: arraydestroy.done2: 1243 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1244 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4 1245 // CHECK9-NEXT: ret i32 [[TMP30]] 1246 // 1247 // 1248 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1249 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1250 // CHECK9-NEXT: entry: 1251 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1252 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1253 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1254 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1255 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1256 // CHECK9-NEXT: ret void 1257 // 1258 // 1259 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1260 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1261 // CHECK9-NEXT: entry: 1262 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1263 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1264 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1265 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1266 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1267 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1268 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1269 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1270 // CHECK9-NEXT: ret void 1271 // 1272 // 1273 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1274 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1275 // CHECK9-NEXT: entry: 1276 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1277 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1278 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1279 // CHECK9-NEXT: ret void 1280 // 1281 // 1282 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1283 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1284 // CHECK9-NEXT: entry: 1285 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1286 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1287 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1288 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1289 // CHECK9-NEXT: ret void 1290 // 1291 // 1292 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1293 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1294 // CHECK9-NEXT: entry: 1295 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1296 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1297 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1298 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1299 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1300 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1301 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 1302 // CHECK9-NEXT: ret void 1303 // 1304 // 1305 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1306 // CHECK9-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1307 // CHECK9-NEXT: entry: 1308 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1309 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1310 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1311 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1312 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1313 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1314 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1315 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1316 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1317 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1318 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1319 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1320 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1321 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1322 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1323 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 1324 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1325 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 1326 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1327 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1328 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) 1329 // CHECK9-NEXT: ret void 1330 // 1331 // 1332 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1333 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1334 // CHECK9-NEXT: entry: 1335 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1336 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1337 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1338 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1339 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1340 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1341 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1342 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1343 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1344 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1345 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1346 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1347 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1348 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1349 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1350 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1351 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1352 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 1353 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1354 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1355 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1356 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1357 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1358 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1359 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1360 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1361 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1362 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1363 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1364 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1365 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1366 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1367 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1368 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1369 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 1370 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1371 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1372 // CHECK9: arrayctor.loop: 1373 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1374 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1375 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1376 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1377 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1378 // CHECK9: arrayctor.cont: 1379 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1380 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1381 // CHECK9-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 1382 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1383 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1384 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1385 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1386 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1387 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1388 // CHECK9: cond.true: 1389 // CHECK9-NEXT: br label [[COND_END:%.*]] 1390 // CHECK9: cond.false: 1391 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1392 // CHECK9-NEXT: br label [[COND_END]] 1393 // CHECK9: cond.end: 1394 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1395 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1396 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1397 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1398 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1399 // CHECK9: omp.inner.for.cond: 1400 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1401 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1402 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1403 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1404 // CHECK9: omp.inner.for.cond.cleanup: 1405 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1406 // CHECK9: omp.inner.for.body: 1407 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1408 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1409 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1410 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1411 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4 1412 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1413 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1414 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 1415 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 1416 // CHECK9-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 1417 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1418 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64 1419 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 1420 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8* 1421 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* 1422 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false) 1423 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1424 // CHECK9: omp.body.continue: 1425 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1426 // CHECK9: omp.inner.for.inc: 1427 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1428 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 1429 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 1430 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1431 // CHECK9: omp.inner.for.end: 1432 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1433 // CHECK9: omp.loop.exit: 1434 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1435 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1436 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1437 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1438 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1439 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1440 // CHECK9: .omp.lastprivate.then: 1441 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4 1442 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 1443 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1444 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 1445 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false) 1446 // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0 1447 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 1448 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2 1449 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP27]] 1450 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1451 // CHECK9: omp.arraycpy.body: 1452 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1453 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1454 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1455 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1456 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 4, i1 false) 1457 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1458 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1459 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 1460 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 1461 // CHECK9: omp.arraycpy.done12: 1462 // CHECK9-NEXT: [[TMP30:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 1463 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 1464 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP30]] to i8* 1465 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false) 1466 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1467 // CHECK9: .omp.lastprivate.done: 1468 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1469 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 1470 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 1471 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1472 // CHECK9: arraydestroy.body: 1473 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1474 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1475 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1476 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1477 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1478 // CHECK9: arraydestroy.done14: 1479 // CHECK9-NEXT: ret void 1480 // 1481 // 1482 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1483 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1484 // CHECK9-NEXT: entry: 1485 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1486 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1487 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1488 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1489 // CHECK9-NEXT: ret void 1490 // 1491 // 1492 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1493 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1494 // CHECK9-NEXT: entry: 1495 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1496 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1497 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1498 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1499 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1500 // CHECK9-NEXT: ret void 1501 // 1502 // 1503 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1504 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1505 // CHECK9-NEXT: entry: 1506 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1507 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1508 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1509 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1510 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1511 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1512 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1513 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1514 // CHECK9-NEXT: ret void 1515 // 1516 // 1517 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1518 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1519 // CHECK9-NEXT: entry: 1520 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1521 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1522 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1523 // CHECK9-NEXT: ret void 1524 // 1525 // 1526 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1527 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1528 // CHECK9-NEXT: entry: 1529 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1530 // CHECK9-NEXT: ret void 1531 // 1532 // 1533 // CHECK10-LABEL: define {{[^@]+}}@main 1534 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1535 // CHECK10-NEXT: entry: 1536 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1537 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1538 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1539 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1540 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1541 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1542 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1543 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1544 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1545 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1546 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1547 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1548 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1549 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1550 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1551 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1552 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1553 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1554 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1555 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1556 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1557 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1558 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1559 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1560 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1561 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1562 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1563 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 1564 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 1565 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1566 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1567 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1568 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1569 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1570 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 1571 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1572 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1573 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1574 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1575 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 1576 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8 1577 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1578 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 1579 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 8 1580 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1581 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 1582 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1583 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1584 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 1585 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1586 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1587 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 1588 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1589 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 1590 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1591 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]** 1592 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 8 1593 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1594 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 1595 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 1596 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1597 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 8 1598 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1599 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S** 1600 // CHECK10-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 8 1601 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1602 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 1603 // CHECK10-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 8 1604 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1605 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 8 1606 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1607 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 1608 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP28]], align 8 1609 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1610 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1611 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1612 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1613 // CHECK10-NEXT: store i8* null, i8** [[TMP31]], align 8 1614 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1615 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1616 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1617 // CHECK10-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 5, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1618 // CHECK10-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1619 // CHECK10-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1620 // CHECK10: omp_offload.failed: 1621 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 1622 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1623 // CHECK10: omp_offload.cont: 1624 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1625 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1626 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1627 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1628 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1629 // CHECK10: arraydestroy.body: 1630 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1631 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1632 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1633 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1634 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1635 // CHECK10: arraydestroy.done3: 1636 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1637 // CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[RETVAL]], align 4 1638 // CHECK10-NEXT: ret i32 [[TMP37]] 1639 // 1640 // 1641 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1642 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1643 // CHECK10-NEXT: entry: 1644 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1645 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1646 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1647 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1648 // CHECK10-NEXT: ret void 1649 // 1650 // 1651 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1652 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1653 // CHECK10-NEXT: entry: 1654 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1655 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1656 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1657 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1658 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1659 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1660 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1661 // CHECK10-NEXT: ret void 1662 // 1663 // 1664 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1665 // CHECK10-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1666 // CHECK10-NEXT: entry: 1667 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1668 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1669 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1670 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1671 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1672 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1673 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1674 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1675 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1676 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1677 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1678 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1679 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1680 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1681 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1682 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1683 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1684 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1685 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1686 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 1687 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1688 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 1689 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1690 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1691 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4 1692 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1693 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4 1694 // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1695 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i64 [[TMP7]]) 1696 // CHECK10-NEXT: ret void 1697 // 1698 // 1699 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1700 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] { 1701 // CHECK10-NEXT: entry: 1702 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1703 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1704 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1705 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1706 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1707 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1708 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1709 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1710 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1711 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1712 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1713 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1714 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1715 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1716 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1717 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1718 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1719 // CHECK10-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1720 // CHECK10-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8 1721 // CHECK10-NEXT: [[SVAR8:%.*]] = alloca i32, align 4 1722 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1723 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1724 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1725 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1726 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1727 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1728 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1729 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1730 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1731 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1732 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1733 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1734 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1735 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1736 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1737 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1738 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1739 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1740 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1741 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1742 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1743 // CHECK10: arrayctor.loop: 1744 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1745 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1746 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1747 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1748 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1749 // CHECK10: arrayctor.cont: 1750 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1751 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) 1752 // CHECK10-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8 1753 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1754 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1755 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1756 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1757 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1758 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1759 // CHECK10: cond.true: 1760 // CHECK10-NEXT: br label [[COND_END:%.*]] 1761 // CHECK10: cond.false: 1762 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1763 // CHECK10-NEXT: br label [[COND_END]] 1764 // CHECK10: cond.end: 1765 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1766 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1767 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1768 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1769 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1770 // CHECK10: omp.inner.for.cond: 1771 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1772 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1773 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1774 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1775 // CHECK10: omp.inner.for.cond.cleanup: 1776 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1777 // CHECK10: omp.inner.for.body: 1778 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1779 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1780 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1781 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1782 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR3]], align 4 1783 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1784 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1785 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1786 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 1787 // CHECK10-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 1788 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1789 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP15]] to i64 1790 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 1791 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* 1792 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* 1793 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false) 1794 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1795 // CHECK10: omp.body.continue: 1796 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1797 // CHECK10: omp.inner.for.inc: 1798 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1799 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP18]], 1 1800 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1801 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1802 // CHECK10: omp.inner.for.end: 1803 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1804 // CHECK10: omp.loop.exit: 1805 // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1806 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1807 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1808 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1809 // CHECK10-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1810 // CHECK10-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1811 // CHECK10: .omp.lastprivate.then: 1812 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4 1813 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 1814 // CHECK10-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1815 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1816 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false) 1817 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0 1818 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S* 1819 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2 1820 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP27]] 1821 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1822 // CHECK10: omp.arraycpy.body: 1823 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1824 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1825 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1826 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1827 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 4, i1 false) 1828 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1829 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1830 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 1831 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] 1832 // CHECK10: omp.arraycpy.done14: 1833 // CHECK10-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 1834 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 1835 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP30]] to i8* 1836 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false) 1837 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[SVAR8]], align 4 1838 // CHECK10-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 4 1839 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1840 // CHECK10: .omp.lastprivate.done: 1841 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]] 1842 // CHECK10-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1843 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 1844 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1845 // CHECK10: arraydestroy.body: 1846 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1847 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1848 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1849 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]] 1850 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]] 1851 // CHECK10: arraydestroy.done16: 1852 // CHECK10-NEXT: ret void 1853 // 1854 // 1855 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1856 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1857 // CHECK10-NEXT: entry: 1858 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1859 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1860 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1861 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1862 // CHECK10-NEXT: ret void 1863 // 1864 // 1865 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1866 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 1867 // CHECK10-NEXT: entry: 1868 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1869 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1870 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1871 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1872 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1873 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1874 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1875 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1876 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1877 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1878 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1879 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1880 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1881 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1882 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1883 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1884 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1885 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1886 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1887 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1888 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1889 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1890 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1891 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1892 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1893 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1894 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1895 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1896 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1897 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]** 1898 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 8 1899 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1900 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 1901 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8 1902 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1903 // CHECK10-NEXT: store i8* null, i8** [[TMP9]], align 8 1904 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1905 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 1906 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 1907 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1908 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1909 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 1910 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1911 // CHECK10-NEXT: store i8* null, i8** [[TMP14]], align 8 1912 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1913 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]** 1914 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 8 1915 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1916 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1917 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1918 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1919 // CHECK10-NEXT: store i8* null, i8** [[TMP19]], align 8 1920 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1921 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0** 1922 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 8 1923 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1924 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1925 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 8 1926 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1927 // CHECK10-NEXT: store i8* null, i8** [[TMP24]], align 8 1928 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1929 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1930 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1931 // CHECK10-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1932 // CHECK10-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 1933 // CHECK10-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1934 // CHECK10: omp_offload.failed: 1935 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1936 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1937 // CHECK10: omp_offload.cont: 1938 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1939 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1940 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1941 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1942 // CHECK10: arraydestroy.body: 1943 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1944 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1945 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1946 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1947 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1948 // CHECK10: arraydestroy.done2: 1949 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1950 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4 1951 // CHECK10-NEXT: ret i32 [[TMP30]] 1952 // 1953 // 1954 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1955 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1956 // CHECK10-NEXT: entry: 1957 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1958 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1959 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1960 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1961 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 1962 // CHECK10-NEXT: ret void 1963 // 1964 // 1965 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1966 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1967 // CHECK10-NEXT: entry: 1968 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1969 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1970 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1971 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1972 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1973 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1974 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1975 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 1976 // CHECK10-NEXT: ret void 1977 // 1978 // 1979 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1980 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1981 // CHECK10-NEXT: entry: 1982 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1983 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1984 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1985 // CHECK10-NEXT: ret void 1986 // 1987 // 1988 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1989 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1990 // CHECK10-NEXT: entry: 1991 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1992 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1993 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1994 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1995 // CHECK10-NEXT: ret void 1996 // 1997 // 1998 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1999 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2000 // CHECK10-NEXT: entry: 2001 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2002 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2003 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2004 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2005 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2006 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2007 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 2008 // CHECK10-NEXT: ret void 2009 // 2010 // 2011 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2012 // CHECK10-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2013 // CHECK10-NEXT: entry: 2014 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2015 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2016 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2017 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2018 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2019 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2020 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2021 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2022 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2023 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2024 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2025 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2026 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2027 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2028 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2029 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 2030 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2031 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 2032 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2033 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2034 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) 2035 // CHECK10-NEXT: ret void 2036 // 2037 // 2038 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2039 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2040 // CHECK10-NEXT: entry: 2041 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2042 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2043 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2044 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2045 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2046 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2047 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2048 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2049 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2050 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2051 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2052 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2053 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2054 // CHECK10-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2055 // CHECK10-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2056 // CHECK10-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2057 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2058 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 2059 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2060 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2061 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2062 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2063 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2064 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2065 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2066 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2067 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2068 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2069 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2070 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2071 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2072 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2073 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2074 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2075 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2076 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2077 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2078 // CHECK10: arrayctor.loop: 2079 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2080 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2081 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2082 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2083 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2084 // CHECK10: arrayctor.cont: 2085 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2086 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2087 // CHECK10-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 2088 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2089 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2090 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2091 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2092 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 2093 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2094 // CHECK10: cond.true: 2095 // CHECK10-NEXT: br label [[COND_END:%.*]] 2096 // CHECK10: cond.false: 2097 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2098 // CHECK10-NEXT: br label [[COND_END]] 2099 // CHECK10: cond.end: 2100 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 2101 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2102 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2103 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2104 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2105 // CHECK10: omp.inner.for.cond: 2106 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2107 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2108 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2109 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2110 // CHECK10: omp.inner.for.cond.cleanup: 2111 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2112 // CHECK10: omp.inner.for.body: 2113 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2114 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2115 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2116 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2117 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4 2118 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2119 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 2120 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 2121 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 2122 // CHECK10-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 2123 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 2124 // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64 2125 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 2126 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8* 2127 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* 2128 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false) 2129 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2130 // CHECK10: omp.body.continue: 2131 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2132 // CHECK10: omp.inner.for.inc: 2133 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2134 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 2135 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 2136 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2137 // CHECK10: omp.inner.for.end: 2138 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2139 // CHECK10: omp.loop.exit: 2140 // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2141 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2142 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2143 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2144 // CHECK10-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2145 // CHECK10-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2146 // CHECK10: .omp.lastprivate.then: 2147 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4 2148 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 2149 // CHECK10-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2150 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2151 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false) 2152 // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0 2153 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 2154 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2 2155 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP27]] 2156 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2157 // CHECK10: omp.arraycpy.body: 2158 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2159 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2160 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2161 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2162 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 4, i1 false) 2163 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2164 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2165 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 2166 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 2167 // CHECK10: omp.arraycpy.done12: 2168 // CHECK10-NEXT: [[TMP30:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 2169 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 2170 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP30]] to i8* 2171 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false) 2172 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2173 // CHECK10: .omp.lastprivate.done: 2174 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 2175 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2176 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 2177 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2178 // CHECK10: arraydestroy.body: 2179 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2180 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2181 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2182 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2183 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2184 // CHECK10: arraydestroy.done14: 2185 // CHECK10-NEXT: ret void 2186 // 2187 // 2188 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2189 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2190 // CHECK10-NEXT: entry: 2191 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2192 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2193 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2194 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2195 // CHECK10-NEXT: ret void 2196 // 2197 // 2198 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2199 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2200 // CHECK10-NEXT: entry: 2201 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2202 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2203 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2204 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2205 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 2206 // CHECK10-NEXT: ret void 2207 // 2208 // 2209 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2210 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2211 // CHECK10-NEXT: entry: 2212 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2213 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2214 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2215 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2216 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2217 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2218 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2219 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2220 // CHECK10-NEXT: ret void 2221 // 2222 // 2223 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2224 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2225 // CHECK10-NEXT: entry: 2226 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2227 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2228 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2229 // CHECK10-NEXT: ret void 2230 // 2231 // 2232 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2233 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 2234 // CHECK10-NEXT: entry: 2235 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2236 // CHECK10-NEXT: ret void 2237 // 2238 // 2239 // CHECK11-LABEL: define {{[^@]+}}@main 2240 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2241 // CHECK11-NEXT: entry: 2242 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2243 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 2244 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 2245 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2246 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2247 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2248 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2249 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2250 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2251 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2252 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2253 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2254 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2255 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2256 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2257 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2258 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2259 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 2260 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2261 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2262 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2263 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2264 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2265 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2266 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2267 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2268 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2269 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2270 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2271 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2272 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2273 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2274 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2275 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2276 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2277 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2278 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2279 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 2280 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4 2281 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2282 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 2283 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 4 2284 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2285 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2286 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2287 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2288 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 2289 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2290 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2291 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 2292 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2293 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2294 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2295 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]** 2296 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 4 2297 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2298 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2299 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 2300 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2301 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 2302 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2303 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S** 2304 // CHECK11-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 4 2305 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2306 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2307 // CHECK11-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 4 2308 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2309 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 2310 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2311 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 2312 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP28]], align 4 2313 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2314 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2315 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 2316 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2317 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4 2318 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2319 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2320 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2321 // CHECK11-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 5, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2322 // CHECK11-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 2323 // CHECK11-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2324 // CHECK11: omp_offload.failed: 2325 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 2326 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2327 // CHECK11: omp_offload.cont: 2328 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2329 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2330 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2331 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2332 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2333 // CHECK11: arraydestroy.body: 2334 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2335 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2336 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2337 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2338 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2339 // CHECK11: arraydestroy.done2: 2340 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2341 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[RETVAL]], align 4 2342 // CHECK11-NEXT: ret i32 [[TMP37]] 2343 // 2344 // 2345 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2346 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2347 // CHECK11-NEXT: entry: 2348 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2349 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2350 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2351 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2352 // CHECK11-NEXT: ret void 2353 // 2354 // 2355 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2356 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2357 // CHECK11-NEXT: entry: 2358 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2359 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2360 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2361 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2362 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2363 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2364 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2365 // CHECK11-NEXT: ret void 2366 // 2367 // 2368 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 2369 // CHECK11-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 2370 // CHECK11-NEXT: entry: 2371 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2372 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2373 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2374 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2375 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 2376 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2377 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2378 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2379 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2380 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2381 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2382 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2383 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 2384 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2385 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2386 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2387 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 2388 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 2389 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 2390 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2391 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2392 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 2393 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[SVAR_CASTED]], align 4 2394 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2395 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i32 [[TMP7]]) 2396 // CHECK11-NEXT: ret void 2397 // 2398 // 2399 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2400 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] { 2401 // CHECK11-NEXT: entry: 2402 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2403 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2404 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2405 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2406 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2407 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2408 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 2409 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2410 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2411 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2412 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2413 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2414 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2415 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2416 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2417 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2418 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 2419 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2420 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 2421 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 2422 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2423 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2424 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2425 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2426 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2427 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2428 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2429 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 2430 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2431 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2432 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2433 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 2434 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2435 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2436 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2437 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2438 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 2439 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2440 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2441 // CHECK11: arrayctor.loop: 2442 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2443 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2444 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2445 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2446 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2447 // CHECK11: arrayctor.cont: 2448 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2449 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2450 // CHECK11-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 2451 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2452 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2453 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2454 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2455 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 2456 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2457 // CHECK11: cond.true: 2458 // CHECK11-NEXT: br label [[COND_END:%.*]] 2459 // CHECK11: cond.false: 2460 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2461 // CHECK11-NEXT: br label [[COND_END]] 2462 // CHECK11: cond.end: 2463 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 2464 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2465 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2466 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2467 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2468 // CHECK11: omp.inner.for.cond: 2469 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2470 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2471 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2472 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2473 // CHECK11: omp.inner.for.cond.cleanup: 2474 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2475 // CHECK11: omp.inner.for.body: 2476 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2477 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2478 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2479 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2480 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4 2481 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2482 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] 2483 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 2484 // CHECK11-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 2485 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 2486 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP15]] 2487 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* 2488 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* 2489 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false) 2490 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2491 // CHECK11: omp.body.continue: 2492 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2493 // CHECK11: omp.inner.for.inc: 2494 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2495 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 2496 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 2497 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2498 // CHECK11: omp.inner.for.end: 2499 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2500 // CHECK11: omp.loop.exit: 2501 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2502 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2503 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2504 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2505 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2506 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2507 // CHECK11: .omp.lastprivate.then: 2508 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4 2509 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[T_VAR_ADDR]], align 4 2510 // CHECK11-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2511 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2512 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 8, i1 false) 2513 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0 2514 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 2515 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 2516 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP27]] 2517 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2518 // CHECK11: omp.arraycpy.body: 2519 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2520 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2521 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2522 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2523 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 4, i1 false) 2524 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2525 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2526 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 2527 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 2528 // CHECK11: omp.arraycpy.done12: 2529 // CHECK11-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 2530 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 2531 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP30]] to i8* 2532 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false) 2533 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[SVAR7]], align 4 2534 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[SVAR_ADDR]], align 4 2535 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2536 // CHECK11: .omp.lastprivate.done: 2537 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 2538 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 2539 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 2540 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2541 // CHECK11: arraydestroy.body: 2542 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2543 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2544 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2545 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2546 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2547 // CHECK11: arraydestroy.done14: 2548 // CHECK11-NEXT: ret void 2549 // 2550 // 2551 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2552 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2553 // CHECK11-NEXT: entry: 2554 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2555 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2556 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2557 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2558 // CHECK11-NEXT: ret void 2559 // 2560 // 2561 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2562 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 2563 // CHECK11-NEXT: entry: 2564 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2565 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2566 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2567 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2568 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2569 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2570 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2571 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2572 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 2573 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 2574 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 2575 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2576 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2577 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2578 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2579 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2580 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2581 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 2582 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2583 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2584 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2585 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 2586 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 2587 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2588 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2589 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2590 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2591 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2592 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]** 2593 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 4 2594 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2595 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 2596 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4 2597 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2598 // CHECK11-NEXT: store i8* null, i8** [[TMP9]], align 4 2599 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2600 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 2601 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 2602 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2603 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2604 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 2605 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2606 // CHECK11-NEXT: store i8* null, i8** [[TMP14]], align 4 2607 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2608 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]** 2609 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 4 2610 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2611 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 2612 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 2613 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2614 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 4 2615 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2616 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0** 2617 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 4 2618 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2619 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 2620 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 4 2621 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2622 // CHECK11-NEXT: store i8* null, i8** [[TMP24]], align 4 2623 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2624 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2625 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2626 // CHECK11-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2627 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2628 // CHECK11-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2629 // CHECK11: omp_offload.failed: 2630 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 2631 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2632 // CHECK11: omp_offload.cont: 2633 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2634 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2635 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2636 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2637 // CHECK11: arraydestroy.body: 2638 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2639 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2640 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2641 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2642 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2643 // CHECK11: arraydestroy.done2: 2644 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2645 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4 2646 // CHECK11-NEXT: ret i32 [[TMP30]] 2647 // 2648 // 2649 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2650 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2651 // CHECK11-NEXT: entry: 2652 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2653 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2654 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2655 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2656 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2657 // CHECK11-NEXT: ret void 2658 // 2659 // 2660 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2661 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2662 // CHECK11-NEXT: entry: 2663 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2664 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2665 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2666 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2667 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2668 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2669 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2670 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2671 // CHECK11-NEXT: ret void 2672 // 2673 // 2674 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2675 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2676 // CHECK11-NEXT: entry: 2677 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2678 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2679 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2680 // CHECK11-NEXT: ret void 2681 // 2682 // 2683 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2684 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2685 // CHECK11-NEXT: entry: 2686 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2687 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2688 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2689 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2690 // CHECK11-NEXT: ret void 2691 // 2692 // 2693 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2694 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2695 // CHECK11-NEXT: entry: 2696 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2697 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2698 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2699 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2700 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2701 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2702 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2703 // CHECK11-NEXT: ret void 2704 // 2705 // 2706 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2707 // CHECK11-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2708 // CHECK11-NEXT: entry: 2709 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2710 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2711 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2712 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2713 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2714 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2715 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2716 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2717 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2718 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2719 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2720 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2721 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2722 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 2723 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 2724 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 2725 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2726 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2727 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) 2728 // CHECK11-NEXT: ret void 2729 // 2730 // 2731 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2732 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2733 // CHECK11-NEXT: entry: 2734 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2735 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2736 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2737 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2738 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2739 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2740 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2741 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2742 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2743 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2744 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2745 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2746 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2747 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2748 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2749 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2750 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2751 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 2752 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2753 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2754 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2755 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2756 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2757 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2758 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2759 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2760 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2761 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2762 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 2763 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2764 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2765 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2766 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2767 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2768 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2769 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2770 // CHECK11: arrayctor.loop: 2771 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2772 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2773 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2774 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2775 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2776 // CHECK11: arrayctor.cont: 2777 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2778 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2779 // CHECK11-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 2780 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2781 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2782 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2783 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2784 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 2785 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2786 // CHECK11: cond.true: 2787 // CHECK11-NEXT: br label [[COND_END:%.*]] 2788 // CHECK11: cond.false: 2789 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2790 // CHECK11-NEXT: br label [[COND_END]] 2791 // CHECK11: cond.end: 2792 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 2793 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2794 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2795 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2796 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2797 // CHECK11: omp.inner.for.cond: 2798 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2799 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2800 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2801 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2802 // CHECK11: omp.inner.for.cond.cleanup: 2803 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2804 // CHECK11: omp.inner.for.body: 2805 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2806 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2807 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2808 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2809 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4 2810 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2811 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] 2812 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 2813 // CHECK11-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 2814 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 2815 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP15]] 2816 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 2817 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* 2818 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false) 2819 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2820 // CHECK11: omp.body.continue: 2821 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2822 // CHECK11: omp.inner.for.inc: 2823 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2824 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1 2825 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 2826 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2827 // CHECK11: omp.inner.for.end: 2828 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2829 // CHECK11: omp.loop.exit: 2830 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2831 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2832 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 2833 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2834 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2835 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2836 // CHECK11: .omp.lastprivate.then: 2837 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4 2838 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[T_VAR_ADDR]], align 4 2839 // CHECK11-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2840 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 2841 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 8, i1 false) 2842 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0 2843 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 2844 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 2845 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP27]] 2846 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2847 // CHECK11: omp.arraycpy.body: 2848 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2849 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2850 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2851 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2852 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 4, i1 false) 2853 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2854 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2855 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 2856 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 2857 // CHECK11: omp.arraycpy.done11: 2858 // CHECK11-NEXT: [[TMP30:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 2859 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 2860 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP30]] to i8* 2861 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false) 2862 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2863 // CHECK11: .omp.lastprivate.done: 2864 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 2865 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 2866 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 2867 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2868 // CHECK11: arraydestroy.body: 2869 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2870 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2871 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2872 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2873 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2874 // CHECK11: arraydestroy.done13: 2875 // CHECK11-NEXT: ret void 2876 // 2877 // 2878 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2879 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2880 // CHECK11-NEXT: entry: 2881 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2882 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2883 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2884 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2885 // CHECK11-NEXT: ret void 2886 // 2887 // 2888 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2889 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2890 // CHECK11-NEXT: entry: 2891 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2892 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2893 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2894 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2895 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 2896 // CHECK11-NEXT: ret void 2897 // 2898 // 2899 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2900 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2901 // CHECK11-NEXT: entry: 2902 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2903 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2904 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2905 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2906 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2907 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2908 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2909 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2910 // CHECK11-NEXT: ret void 2911 // 2912 // 2913 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2914 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2915 // CHECK11-NEXT: entry: 2916 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2917 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2918 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2919 // CHECK11-NEXT: ret void 2920 // 2921 // 2922 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2923 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2924 // CHECK11-NEXT: entry: 2925 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2926 // CHECK11-NEXT: ret void 2927 // 2928 // 2929 // CHECK12-LABEL: define {{[^@]+}}@main 2930 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2931 // CHECK12-NEXT: entry: 2932 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2933 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 2934 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 2935 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2936 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2937 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2938 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2939 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2940 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2941 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2942 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2943 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2944 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2945 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2946 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2947 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2948 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2949 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 2950 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2951 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2952 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2953 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2954 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2955 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2956 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2957 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2958 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2959 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2960 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2961 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2962 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2963 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2964 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2965 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2966 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2967 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2968 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2969 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 2970 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4 2971 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2972 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]** 2973 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 4 2974 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2975 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 2976 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2977 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2978 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 2979 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2980 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2981 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 2982 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2983 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 2984 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2985 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]** 2986 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 4 2987 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2988 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2989 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 2990 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2991 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4 2992 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2993 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S** 2994 // CHECK12-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 4 2995 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2996 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2997 // CHECK12-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 4 2998 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2999 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4 3000 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3001 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 3002 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP28]], align 4 3003 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3004 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 3005 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 3006 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 3007 // CHECK12-NEXT: store i8* null, i8** [[TMP31]], align 4 3008 // CHECK12-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3009 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3010 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 3011 // CHECK12-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 5, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3012 // CHECK12-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 3013 // CHECK12-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3014 // CHECK12: omp_offload.failed: 3015 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 3016 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3017 // CHECK12: omp_offload.cont: 3018 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 3019 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3020 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3021 // CHECK12-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3022 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3023 // CHECK12: arraydestroy.body: 3024 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3025 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3026 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3027 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3028 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3029 // CHECK12: arraydestroy.done2: 3030 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3031 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[RETVAL]], align 4 3032 // CHECK12-NEXT: ret i32 [[TMP37]] 3033 // 3034 // 3035 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3036 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3037 // CHECK12-NEXT: entry: 3038 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3039 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3040 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3041 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3042 // CHECK12-NEXT: ret void 3043 // 3044 // 3045 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3046 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3047 // CHECK12-NEXT: entry: 3048 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3049 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3050 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3051 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3052 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3053 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3054 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3055 // CHECK12-NEXT: ret void 3056 // 3057 // 3058 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 3059 // CHECK12-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 3060 // CHECK12-NEXT: entry: 3061 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3062 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3063 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3064 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3065 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3066 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3067 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3068 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 3069 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3070 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3071 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3072 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3073 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3074 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3075 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3076 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3077 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3078 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 3079 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 3080 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3081 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3082 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 3083 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[SVAR_CASTED]], align 4 3084 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 3085 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i32 [[TMP7]]) 3086 // CHECK12-NEXT: ret void 3087 // 3088 // 3089 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 3090 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] { 3091 // CHECK12-NEXT: entry: 3092 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3093 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3094 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3095 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3096 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3097 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3098 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3099 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3100 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3101 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3102 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3103 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3104 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3105 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3106 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3107 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3108 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 3109 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3110 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 3111 // CHECK12-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 3112 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3113 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3114 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3115 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3116 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3117 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3118 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3119 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3120 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3121 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3122 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3123 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3124 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3125 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3126 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3127 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3128 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3129 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3130 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3131 // CHECK12: arrayctor.loop: 3132 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3133 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3134 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3135 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3136 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3137 // CHECK12: arrayctor.cont: 3138 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3139 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3140 // CHECK12-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 3141 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3142 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3143 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3144 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3145 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 3146 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3147 // CHECK12: cond.true: 3148 // CHECK12-NEXT: br label [[COND_END:%.*]] 3149 // CHECK12: cond.false: 3150 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3151 // CHECK12-NEXT: br label [[COND_END]] 3152 // CHECK12: cond.end: 3153 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 3154 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3155 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3156 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3157 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3158 // CHECK12: omp.inner.for.cond: 3159 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3160 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3161 // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3162 // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3163 // CHECK12: omp.inner.for.cond.cleanup: 3164 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3165 // CHECK12: omp.inner.for.body: 3166 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3167 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3168 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3169 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3170 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4 3171 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 3172 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] 3173 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 3174 // CHECK12-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3175 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 3176 // CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP15]] 3177 // CHECK12-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* 3178 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* 3179 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false) 3180 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3181 // CHECK12: omp.body.continue: 3182 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3183 // CHECK12: omp.inner.for.inc: 3184 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3185 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 3186 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 3187 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3188 // CHECK12: omp.inner.for.end: 3189 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3190 // CHECK12: omp.loop.exit: 3191 // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3192 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3193 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3194 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3195 // CHECK12-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 3196 // CHECK12-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3197 // CHECK12: .omp.lastprivate.then: 3198 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4 3199 // CHECK12-NEXT: store i32 [[TMP23]], i32* [[T_VAR_ADDR]], align 4 3200 // CHECK12-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3201 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3202 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 8, i1 false) 3203 // CHECK12-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0 3204 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S* 3205 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 3206 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP27]] 3207 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3208 // CHECK12: omp.arraycpy.body: 3209 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3210 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3211 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3212 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3213 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 4, i1 false) 3214 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3215 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3216 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 3217 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 3218 // CHECK12: omp.arraycpy.done12: 3219 // CHECK12-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 3220 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 3221 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP30]] to i8* 3222 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false) 3223 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[SVAR7]], align 4 3224 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[SVAR_ADDR]], align 4 3225 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3226 // CHECK12: .omp.lastprivate.done: 3227 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3228 // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3229 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 3230 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3231 // CHECK12: arraydestroy.body: 3232 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3233 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3234 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3235 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 3236 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 3237 // CHECK12: arraydestroy.done14: 3238 // CHECK12-NEXT: ret void 3239 // 3240 // 3241 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3242 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3243 // CHECK12-NEXT: entry: 3244 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3245 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3246 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3247 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3248 // CHECK12-NEXT: ret void 3249 // 3250 // 3251 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3252 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 3253 // CHECK12-NEXT: entry: 3254 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3255 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3256 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3257 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3258 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3259 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3260 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3261 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3262 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3263 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3264 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3265 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3266 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3267 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 3268 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3269 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3270 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3271 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 3272 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3273 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 3274 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3275 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 3276 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 3277 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3278 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3279 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3280 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3281 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3282 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]** 3283 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 4 3284 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3285 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]** 3286 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4 3287 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3288 // CHECK12-NEXT: store i8* null, i8** [[TMP9]], align 4 3289 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3290 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 3291 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 3292 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3293 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 3294 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 3295 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3296 // CHECK12-NEXT: store i8* null, i8** [[TMP14]], align 4 3297 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3298 // CHECK12-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]** 3299 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 4 3300 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3301 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 3302 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 3303 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3304 // CHECK12-NEXT: store i8* null, i8** [[TMP19]], align 4 3305 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3306 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0** 3307 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 4 3308 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3309 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 3310 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 4 3311 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3312 // CHECK12-NEXT: store i8* null, i8** [[TMP24]], align 4 3313 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3314 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3315 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 3316 // CHECK12-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3317 // CHECK12-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 3318 // CHECK12-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3319 // CHECK12: omp_offload.failed: 3320 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 3321 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3322 // CHECK12: omp_offload.cont: 3323 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3324 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3325 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3326 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3327 // CHECK12: arraydestroy.body: 3328 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3329 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3330 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3331 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3332 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3333 // CHECK12: arraydestroy.done2: 3334 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3335 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4 3336 // CHECK12-NEXT: ret i32 [[TMP30]] 3337 // 3338 // 3339 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3340 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3341 // CHECK12-NEXT: entry: 3342 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3343 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3344 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3345 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3346 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 3347 // CHECK12-NEXT: ret void 3348 // 3349 // 3350 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3351 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3352 // CHECK12-NEXT: entry: 3353 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3354 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3355 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3356 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3357 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3358 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3359 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3360 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 3361 // CHECK12-NEXT: ret void 3362 // 3363 // 3364 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3365 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3366 // CHECK12-NEXT: entry: 3367 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3368 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3369 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3370 // CHECK12-NEXT: ret void 3371 // 3372 // 3373 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3374 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3375 // CHECK12-NEXT: entry: 3376 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3377 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3378 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3379 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3380 // CHECK12-NEXT: ret void 3381 // 3382 // 3383 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3384 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3385 // CHECK12-NEXT: entry: 3386 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3387 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3388 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3389 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3390 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3391 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3392 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 3393 // CHECK12-NEXT: ret void 3394 // 3395 // 3396 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 3397 // CHECK12-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3398 // CHECK12-NEXT: entry: 3399 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3400 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3401 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3402 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3403 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3404 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3405 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3406 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3407 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3408 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3409 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3410 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3411 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3412 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3413 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4 3414 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 3415 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3416 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3417 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) 3418 // CHECK12-NEXT: ret void 3419 // 3420 // 3421 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3422 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3423 // CHECK12-NEXT: entry: 3424 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3425 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3426 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3427 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3428 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3429 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3430 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3431 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3432 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3433 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3434 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3435 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3436 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3437 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3438 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3439 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 3440 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3441 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 3442 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3443 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3444 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3445 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3446 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3447 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3448 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3449 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3450 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3451 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3452 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3453 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3454 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3455 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3456 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3457 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3458 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3459 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3460 // CHECK12: arrayctor.loop: 3461 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3462 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3463 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3464 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3465 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3466 // CHECK12: arrayctor.cont: 3467 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3468 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3469 // CHECK12-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 3470 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3471 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3472 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3473 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3474 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 3475 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3476 // CHECK12: cond.true: 3477 // CHECK12-NEXT: br label [[COND_END:%.*]] 3478 // CHECK12: cond.false: 3479 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3480 // CHECK12-NEXT: br label [[COND_END]] 3481 // CHECK12: cond.end: 3482 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 3483 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3484 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3485 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3486 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3487 // CHECK12: omp.inner.for.cond: 3488 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3489 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3490 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3491 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3492 // CHECK12: omp.inner.for.cond.cleanup: 3493 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3494 // CHECK12: omp.inner.for.body: 3495 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3496 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3497 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3498 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3499 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4 3500 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 3501 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] 3502 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4 3503 // CHECK12-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 3504 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 3505 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP15]] 3506 // CHECK12-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 3507 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* 3508 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false) 3509 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3510 // CHECK12: omp.body.continue: 3511 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3512 // CHECK12: omp.inner.for.inc: 3513 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3514 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1 3515 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 3516 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3517 // CHECK12: omp.inner.for.end: 3518 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3519 // CHECK12: omp.loop.exit: 3520 // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3521 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3522 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3523 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3524 // CHECK12-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 3525 // CHECK12-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3526 // CHECK12: .omp.lastprivate.then: 3527 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4 3528 // CHECK12-NEXT: store i32 [[TMP23]], i32* [[T_VAR_ADDR]], align 4 3529 // CHECK12-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3530 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8* 3531 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 8, i1 false) 3532 // CHECK12-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0 3533 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0* 3534 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 3535 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP27]] 3536 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3537 // CHECK12: omp.arraycpy.body: 3538 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3539 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3540 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3541 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3542 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 4, i1 false) 3543 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3544 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3545 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 3546 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 3547 // CHECK12: omp.arraycpy.done11: 3548 // CHECK12-NEXT: [[TMP30:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 3549 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 3550 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP30]] to i8* 3551 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false) 3552 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3553 // CHECK12: .omp.lastprivate.done: 3554 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3555 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3556 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 3557 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3558 // CHECK12: arraydestroy.body: 3559 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3560 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3561 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3562 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 3563 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 3564 // CHECK12: arraydestroy.done13: 3565 // CHECK12-NEXT: ret void 3566 // 3567 // 3568 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3569 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3570 // CHECK12-NEXT: entry: 3571 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3572 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3573 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3574 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3575 // CHECK12-NEXT: ret void 3576 // 3577 // 3578 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3579 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3580 // CHECK12-NEXT: entry: 3581 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3582 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3583 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3584 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3585 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 3586 // CHECK12-NEXT: ret void 3587 // 3588 // 3589 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3590 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3591 // CHECK12-NEXT: entry: 3592 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3593 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3594 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3595 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3596 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3597 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3598 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3599 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3600 // CHECK12-NEXT: ret void 3601 // 3602 // 3603 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3604 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3605 // CHECK12-NEXT: entry: 3606 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3607 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3608 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3609 // CHECK12-NEXT: ret void 3610 // 3611 // 3612 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3613 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 3614 // CHECK12-NEXT: entry: 3615 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3616 // CHECK12-NEXT: ret void 3617 // 3618