1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
8 
9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 
16 // RUN: %clang_cc1 -no-opaque-pointers  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -no-opaque-pointers  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
22 
23 // RUN: %clang_cc1 -no-opaque-pointers  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
26 // RUN: %clang_cc1 -no-opaque-pointers  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32 
33 template <class T>
34 struct S {
35   T f;
36   S(T a) : f(a) {}
37   S() : f() {}
38   operator T() { return T(); }
39   ~S() {}
40 };
41 
42 template <typename T>
43 T tmain() {
44   S<T> test;
45   T t_var = T();
46   T vec[] = {1, 2};
47   S<T> s_arr[] = {1, 2};
48   S<T> &var = test;
49   #pragma omp target teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var)
50   for (int i = 0; i < 2; ++i) {
51     vec[i] = t_var;
52     s_arr[i] = var;
53   }
54   return T();
55 }
56 
57 int main() {
58   static int svar;
59   volatile double g;
60   volatile double &g1 = g;
61 
62   #ifdef LAMBDA
63   [&]() {
64     static float sfvar;
65 
66     #pragma omp target teams distribute lastprivate(g, g1, svar, sfvar)
67     for (int i = 0; i < 2; ++i) {
68       // loop variables
69 
70       // init private variables
71       g = 1;
72       g1 = 1;
73       svar = 3;
74       sfvar = 4.0;
75 
76 
77       [&]() {
78         g = 2;
79         g1 = 2;
80         svar = 4;
81         sfvar = 8.0;
82 
83       }();
84     }
85   }();
86   return 0;
87   #else
88   S<float> test;
89   int t_var = 0;
90   int vec[] = {1, 2};
91   S<float> s_arr[] = {1, 2};
92   S<float> &var = test;
93 
94   #pragma omp target teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)
95   for (int i = 0; i < 2; ++i) {
96     vec[i] = t_var;
97     s_arr[i] = var;
98   }
99   int i;
100 
101   return tmain<int>();
102   #endif
103 }
104 
105 
106 // skip loop variables
107 
108 // copy from parameters to local address variables
109 
110 // load content of local address variables
111 // the distribute loop
112 // assignment: vec[i] = t_var;
113 
114 // assignment: s_arr[i] = var;
115 
116 // lastprivates
117 
118 
119 // template tmain
120 
121 
122 
123 // skip alloca of global_tid and bound_tid
124 // skip loop variables
125 
126 // skip init of bound and global tid
127 // copy from parameters to local address variables
128 
129 // load content of local address variables
130 // assignment: vec[i] = t_var;
131 
132 // assignment: s_arr[i] = var;
133 
134 // lastprivates
135 
136 #endif
137 // CHECK1-LABEL: define {{[^@]+}}@main
138 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
139 // CHECK1-NEXT:  entry:
140 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
141 // CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8
142 // CHECK1-NEXT:    [[G1:%.*]] = alloca double*, align 8
143 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
144 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
145 // CHECK1-NEXT:    store double* [[G]], double** [[G1]], align 8
146 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
147 // CHECK1-NEXT:    store double* [[G]], double** [[TMP0]], align 8
148 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
149 // CHECK1-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 8
150 // CHECK1-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 8
151 // CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
152 // CHECK1-NEXT:    ret i32 0
153 //
154 //
155 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66
156 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
157 // CHECK1-NEXT:  entry:
158 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8
159 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8
160 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
161 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8
162 // CHECK1-NEXT:    [[TMP:%.*]] = alloca double*, align 8
163 // CHECK1-NEXT:    [[G_CASTED:%.*]] = alloca i64, align 8
164 // CHECK1-NEXT:    [[G1_CASTED:%.*]] = alloca i64, align 8
165 // CHECK1-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
166 // CHECK1-NEXT:    [[SFVAR_CASTED:%.*]] = alloca i64, align 8
167 // CHECK1-NEXT:    store i64 [[G]], i64* [[G_ADDR]], align 8
168 // CHECK1-NEXT:    store i64 [[G1]], i64* [[G1_ADDR]], align 8
169 // CHECK1-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
170 // CHECK1-NEXT:    store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
171 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
172 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
173 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
174 // CHECK1-NEXT:    [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
175 // CHECK1-NEXT:    store double* [[CONV1]], double** [[TMP]], align 8
176 // CHECK1-NEXT:    [[TMP0:%.*]] = load double, double* [[CONV]], align 8
177 // CHECK1-NEXT:    [[CONV4:%.*]] = bitcast i64* [[G_CASTED]] to double*
178 // CHECK1-NEXT:    store double [[TMP0]], double* [[CONV4]], align 8
179 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[G_CASTED]], align 8
180 // CHECK1-NEXT:    [[TMP2:%.*]] = load double*, double** [[TMP]], align 8
181 // CHECK1-NEXT:    [[TMP3:%.*]] = load volatile double, double* [[TMP2]], align 8
182 // CHECK1-NEXT:    [[CONV5:%.*]] = bitcast i64* [[G1_CASTED]] to double*
183 // CHECK1-NEXT:    store double [[TMP3]], double* [[CONV5]], align 8
184 // CHECK1-NEXT:    [[TMP4:%.*]] = load i64, i64* [[G1_CASTED]], align 8
185 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 4
186 // CHECK1-NEXT:    [[CONV6:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
187 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[CONV6]], align 4
188 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
189 // CHECK1-NEXT:    [[TMP7:%.*]] = load float, float* [[CONV3]], align 4
190 // CHECK1-NEXT:    [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float*
191 // CHECK1-NEXT:    store float [[TMP7]], float* [[CONV7]], align 4
192 // CHECK1-NEXT:    [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8
193 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]])
194 // CHECK1-NEXT:    ret void
195 //
196 //
197 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
198 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] {
199 // CHECK1-NEXT:  entry:
200 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
201 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
202 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8
203 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8
204 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
205 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8
206 // CHECK1-NEXT:    [[TMP:%.*]] = alloca double*, align 8
207 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
208 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
209 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
210 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
211 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
212 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
213 // CHECK1-NEXT:    [[G5:%.*]] = alloca double, align 8
214 // CHECK1-NEXT:    [[G16:%.*]] = alloca double, align 8
215 // CHECK1-NEXT:    [[_TMP7:%.*]] = alloca double*, align 8
216 // CHECK1-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4
217 // CHECK1-NEXT:    [[SFVAR9:%.*]] = alloca float, align 4
218 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
219 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
220 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
221 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
222 // CHECK1-NEXT:    store i64 [[G]], i64* [[G_ADDR]], align 8
223 // CHECK1-NEXT:    store i64 [[G1]], i64* [[G1_ADDR]], align 8
224 // CHECK1-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
225 // CHECK1-NEXT:    store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
226 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
227 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
228 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
229 // CHECK1-NEXT:    [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
230 // CHECK1-NEXT:    store double* [[CONV1]], double** [[TMP]], align 8
231 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
232 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
233 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
234 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
235 // CHECK1-NEXT:    [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
236 // CHECK1-NEXT:    store double* [[G16]], double** [[_TMP7]], align 8
237 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
238 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
239 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
240 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
241 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
242 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
243 // CHECK1:       cond.true:
244 // CHECK1-NEXT:    br label [[COND_END:%.*]]
245 // CHECK1:       cond.false:
246 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
247 // CHECK1-NEXT:    br label [[COND_END]]
248 // CHECK1:       cond.end:
249 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
250 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
251 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
252 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
253 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
254 // CHECK1:       omp.inner.for.cond:
255 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
256 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
257 // CHECK1-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
258 // CHECK1-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
259 // CHECK1:       omp.inner.for.body:
260 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
261 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
262 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
263 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
264 // CHECK1-NEXT:    store double 1.000000e+00, double* [[G5]], align 8
265 // CHECK1-NEXT:    [[TMP9:%.*]] = load double*, double** [[_TMP7]], align 8
266 // CHECK1-NEXT:    store volatile double 1.000000e+00, double* [[TMP9]], align 8
267 // CHECK1-NEXT:    store i32 3, i32* [[SVAR8]], align 4
268 // CHECK1-NEXT:    store float 4.000000e+00, float* [[SFVAR9]], align 4
269 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
270 // CHECK1-NEXT:    store double* [[G5]], double** [[TMP10]], align 8
271 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
272 // CHECK1-NEXT:    [[TMP12:%.*]] = load double*, double** [[_TMP7]], align 8
273 // CHECK1-NEXT:    store double* [[TMP12]], double** [[TMP11]], align 8
274 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
275 // CHECK1-NEXT:    store i32* [[SVAR8]], i32** [[TMP13]], align 8
276 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
277 // CHECK1-NEXT:    store float* [[SFVAR9]], float** [[TMP14]], align 8
278 // CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
279 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
280 // CHECK1:       omp.body.continue:
281 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
282 // CHECK1:       omp.inner.for.inc:
283 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
284 // CHECK1-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP15]], 1
285 // CHECK1-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
286 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
287 // CHECK1:       omp.inner.for.end:
288 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
289 // CHECK1:       omp.loop.exit:
290 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
291 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
292 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
293 // CHECK1-NEXT:    br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
294 // CHECK1:       .omp.lastprivate.then:
295 // CHECK1-NEXT:    [[TMP18:%.*]] = load double, double* [[G5]], align 8
296 // CHECK1-NEXT:    store volatile double [[TMP18]], double* [[CONV]], align 8
297 // CHECK1-NEXT:    [[TMP19:%.*]] = load double*, double** [[_TMP7]], align 8
298 // CHECK1-NEXT:    [[TMP20:%.*]] = load double, double* [[TMP19]], align 8
299 // CHECK1-NEXT:    store volatile double [[TMP20]], double* [[TMP0]], align 8
300 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, i32* [[SVAR8]], align 4
301 // CHECK1-NEXT:    store i32 [[TMP21]], i32* [[CONV2]], align 4
302 // CHECK1-NEXT:    [[TMP22:%.*]] = load float, float* [[SFVAR9]], align 4
303 // CHECK1-NEXT:    store float [[TMP22]], float* [[CONV3]], align 4
304 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
305 // CHECK1:       .omp.lastprivate.done:
306 // CHECK1-NEXT:    ret void
307 //
308 //
309 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
310 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
311 // CHECK1-NEXT:  entry:
312 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
313 // CHECK1-NEXT:    ret void
314 //
315 //
316 // CHECK3-LABEL: define {{[^@]+}}@main
317 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
318 // CHECK3-NEXT:  entry:
319 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
320 // CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8
321 // CHECK3-NEXT:    [[G1:%.*]] = alloca double*, align 4
322 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
323 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
324 // CHECK3-NEXT:    store double* [[G]], double** [[G1]], align 4
325 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
326 // CHECK3-NEXT:    store double* [[G]], double** [[TMP0]], align 4
327 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
328 // CHECK3-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 4
329 // CHECK3-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 4
330 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
331 // CHECK3-NEXT:    ret i32 0
332 //
333 //
334 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66
335 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
336 // CHECK3-NEXT:  entry:
337 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 4
338 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 4
339 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
340 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4
341 // CHECK3-NEXT:    [[TMP:%.*]] = alloca double*, align 4
342 // CHECK3-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
343 // CHECK3-NEXT:    [[SFVAR_CASTED:%.*]] = alloca i32, align 4
344 // CHECK3-NEXT:    store double* [[G]], double** [[G_ADDR]], align 4
345 // CHECK3-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 4
346 // CHECK3-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
347 // CHECK3-NEXT:    store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
348 // CHECK3-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
349 // CHECK3-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
350 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
351 // CHECK3-NEXT:    store double* [[TMP1]], double** [[TMP]], align 4
352 // CHECK3-NEXT:    [[TMP2:%.*]] = load double*, double** [[TMP]], align 4
353 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4
354 // CHECK3-NEXT:    store i32 [[TMP3]], i32* [[SVAR_CASTED]], align 4
355 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
356 // CHECK3-NEXT:    [[TMP5:%.*]] = load float, float* [[CONV]], align 4
357 // CHECK3-NEXT:    [[CONV1:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float*
358 // CHECK3-NEXT:    store float [[TMP5]], float* [[CONV1]], align 4
359 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4
360 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[TMP0]], double* [[TMP2]], i32 [[TMP4]], i32 [[TMP6]])
361 // CHECK3-NEXT:    ret void
362 //
363 //
364 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
365 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] {
366 // CHECK3-NEXT:  entry:
367 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
368 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
369 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 4
370 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 4
371 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
372 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4
373 // CHECK3-NEXT:    [[TMP:%.*]] = alloca double*, align 4
374 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
375 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
376 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
377 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
378 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
379 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
380 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
381 // CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8
382 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca double*, align 4
383 // CHECK3-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4
384 // CHECK3-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4
385 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
386 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
387 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
388 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
389 // CHECK3-NEXT:    store double* [[G]], double** [[G_ADDR]], align 4
390 // CHECK3-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 4
391 // CHECK3-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
392 // CHECK3-NEXT:    store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
393 // CHECK3-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
394 // CHECK3-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
395 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
396 // CHECK3-NEXT:    store double* [[TMP1]], double** [[TMP]], align 4
397 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
398 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
399 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
400 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
401 // CHECK3-NEXT:    [[TMP2:%.*]] = load double*, double** [[TMP]], align 4
402 // CHECK3-NEXT:    store double* [[G13]], double** [[_TMP4]], align 4
403 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
404 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
405 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
406 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
407 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
408 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
409 // CHECK3:       cond.true:
410 // CHECK3-NEXT:    br label [[COND_END:%.*]]
411 // CHECK3:       cond.false:
412 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
413 // CHECK3-NEXT:    br label [[COND_END]]
414 // CHECK3:       cond.end:
415 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
416 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
417 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
418 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
419 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
420 // CHECK3:       omp.inner.for.cond:
421 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
422 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
423 // CHECK3-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
424 // CHECK3-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
425 // CHECK3:       omp.inner.for.body:
426 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
427 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
428 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
429 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
430 // CHECK3-NEXT:    store double 1.000000e+00, double* [[G2]], align 8
431 // CHECK3-NEXT:    [[TMP11:%.*]] = load double*, double** [[_TMP4]], align 4
432 // CHECK3-NEXT:    store volatile double 1.000000e+00, double* [[TMP11]], align 4
433 // CHECK3-NEXT:    store i32 3, i32* [[SVAR5]], align 4
434 // CHECK3-NEXT:    store float 4.000000e+00, float* [[SFVAR6]], align 4
435 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
436 // CHECK3-NEXT:    store double* [[G2]], double** [[TMP12]], align 4
437 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
438 // CHECK3-NEXT:    [[TMP14:%.*]] = load double*, double** [[_TMP4]], align 4
439 // CHECK3-NEXT:    store double* [[TMP14]], double** [[TMP13]], align 4
440 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
441 // CHECK3-NEXT:    store i32* [[SVAR5]], i32** [[TMP15]], align 4
442 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
443 // CHECK3-NEXT:    store float* [[SFVAR6]], float** [[TMP16]], align 4
444 // CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]])
445 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
446 // CHECK3:       omp.body.continue:
447 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
448 // CHECK3:       omp.inner.for.inc:
449 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
450 // CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1
451 // CHECK3-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
452 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
453 // CHECK3:       omp.inner.for.end:
454 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
455 // CHECK3:       omp.loop.exit:
456 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
457 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
458 // CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
459 // CHECK3-NEXT:    br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
460 // CHECK3:       .omp.lastprivate.then:
461 // CHECK3-NEXT:    [[TMP20:%.*]] = load double, double* [[G2]], align 8
462 // CHECK3-NEXT:    store volatile double [[TMP20]], double* [[TMP0]], align 8
463 // CHECK3-NEXT:    [[TMP21:%.*]] = load double*, double** [[_TMP4]], align 4
464 // CHECK3-NEXT:    [[TMP22:%.*]] = load double, double* [[TMP21]], align 4
465 // CHECK3-NEXT:    store volatile double [[TMP22]], double* [[TMP2]], align 4
466 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, i32* [[SVAR5]], align 4
467 // CHECK3-NEXT:    store i32 [[TMP23]], i32* [[SVAR_ADDR]], align 4
468 // CHECK3-NEXT:    [[TMP24:%.*]] = load float, float* [[SFVAR6]], align 4
469 // CHECK3-NEXT:    store float [[TMP24]], float* [[CONV]], align 4
470 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
471 // CHECK3:       .omp.lastprivate.done:
472 // CHECK3-NEXT:    ret void
473 //
474 //
475 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
476 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
477 // CHECK3-NEXT:  entry:
478 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
479 // CHECK3-NEXT:    ret void
480 //
481 //
482 // CHECK9-LABEL: define {{[^@]+}}@main
483 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
484 // CHECK9-NEXT:  entry:
485 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
486 // CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8
487 // CHECK9-NEXT:    [[G1:%.*]] = alloca double*, align 8
488 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
489 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
490 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
491 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
492 // CHECK9-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 8
493 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
494 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
495 // CHECK9-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
496 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
497 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
498 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
499 // CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
500 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
501 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
502 // CHECK9-NEXT:    store double* [[G]], double** [[G1]], align 8
503 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
504 // CHECK9-NEXT:    store i32 0, i32* [[T_VAR]], align 4
505 // CHECK9-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
506 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
507 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
508 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
509 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
510 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
511 // CHECK9-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
512 // CHECK9-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
513 // CHECK9-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
514 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
515 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
516 // CHECK9-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
517 // CHECK9-NEXT:    [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
518 // CHECK9-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
519 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
520 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
521 // CHECK9-NEXT:    store i32 [[TMP5]], i32* [[CONV1]], align 4
522 // CHECK9-NEXT:    [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
523 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
524 // CHECK9-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]**
525 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8
526 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
527 // CHECK9-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]**
528 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 8
529 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
530 // CHECK9-NEXT:    store i8* null, i8** [[TMP11]], align 8
531 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
532 // CHECK9-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
533 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP13]], align 8
534 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
535 // CHECK9-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
536 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP15]], align 8
537 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
538 // CHECK9-NEXT:    store i8* null, i8** [[TMP16]], align 8
539 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
540 // CHECK9-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]**
541 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 8
542 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
543 // CHECK9-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
544 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
545 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
546 // CHECK9-NEXT:    store i8* null, i8** [[TMP21]], align 8
547 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
548 // CHECK9-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S**
549 // CHECK9-NEXT:    store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 8
550 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
551 // CHECK9-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
552 // CHECK9-NEXT:    store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 8
553 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
554 // CHECK9-NEXT:    store i8* null, i8** [[TMP26]], align 8
555 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
556 // CHECK9-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64*
557 // CHECK9-NEXT:    store i64 [[TMP6]], i64* [[TMP28]], align 8
558 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
559 // CHECK9-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
560 // CHECK9-NEXT:    store i64 [[TMP6]], i64* [[TMP30]], align 8
561 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
562 // CHECK9-NEXT:    store i8* null, i8** [[TMP31]], align 8
563 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
564 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
565 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
566 // CHECK9-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 5, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
567 // CHECK9-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
568 // CHECK9-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
569 // CHECK9:       omp_offload.failed:
570 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
571 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
572 // CHECK9:       omp_offload.cont:
573 // CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
574 // CHECK9-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
575 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
576 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
577 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
578 // CHECK9:       arraydestroy.body:
579 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
580 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
581 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
582 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
583 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
584 // CHECK9:       arraydestroy.done3:
585 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
586 // CHECK9-NEXT:    [[TMP37:%.*]] = load i32, i32* [[RETVAL]], align 4
587 // CHECK9-NEXT:    ret i32 [[TMP37]]
588 //
589 //
590 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
591 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
592 // CHECK9-NEXT:  entry:
593 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
594 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
595 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
596 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
597 // CHECK9-NEXT:    ret void
598 //
599 //
600 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
601 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
602 // CHECK9-NEXT:  entry:
603 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
604 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
605 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
606 // CHECK9-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
607 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
608 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
609 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
610 // CHECK9-NEXT:    ret void
611 //
612 //
613 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
614 // CHECK9-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
615 // CHECK9-NEXT:  entry:
616 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
617 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
618 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
619 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
620 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
621 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
622 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
623 // CHECK9-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
624 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
625 // CHECK9-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
626 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
627 // CHECK9-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
628 // CHECK9-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
629 // CHECK9-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
630 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
631 // CHECK9-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
632 // CHECK9-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
633 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
634 // CHECK9-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
635 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
636 // CHECK9-NEXT:    [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
637 // CHECK9-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
638 // CHECK9-NEXT:    [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
639 // CHECK9-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
640 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
641 // CHECK9-NEXT:    [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
642 // CHECK9-NEXT:    store i32 [[TMP6]], i32* [[CONV3]], align 4
643 // CHECK9-NEXT:    [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
644 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i64 [[TMP7]])
645 // CHECK9-NEXT:    ret void
646 //
647 //
648 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
649 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] {
650 // CHECK9-NEXT:  entry:
651 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
652 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
653 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
654 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
655 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
656 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
657 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
658 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
659 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
660 // CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
661 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
662 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
663 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
664 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
665 // CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
666 // CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
667 // CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
668 // CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
669 // CHECK9-NEXT:    [[_TMP7:%.*]] = alloca %struct.S*, align 8
670 // CHECK9-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4
671 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
672 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
673 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
674 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
675 // CHECK9-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
676 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
677 // CHECK9-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
678 // CHECK9-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
679 // CHECK9-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
680 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
681 // CHECK9-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
682 // CHECK9-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
683 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
684 // CHECK9-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
685 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
686 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
687 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
688 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
689 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
690 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
691 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
692 // CHECK9:       arrayctor.loop:
693 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
694 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
695 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
696 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
697 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
698 // CHECK9:       arrayctor.cont:
699 // CHECK9-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
700 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]])
701 // CHECK9-NEXT:    store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
702 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
703 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
704 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
705 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
706 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
707 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
708 // CHECK9:       cond.true:
709 // CHECK9-NEXT:    br label [[COND_END:%.*]]
710 // CHECK9:       cond.false:
711 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
712 // CHECK9-NEXT:    br label [[COND_END]]
713 // CHECK9:       cond.end:
714 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
715 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
716 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
717 // CHECK9-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
718 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
719 // CHECK9:       omp.inner.for.cond:
720 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
721 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
722 // CHECK9-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
723 // CHECK9-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
724 // CHECK9:       omp.inner.for.cond.cleanup:
725 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
726 // CHECK9:       omp.inner.for.body:
727 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
728 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
729 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
730 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
731 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[T_VAR3]], align 4
732 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
733 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
734 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
735 // CHECK9-NEXT:    store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4
736 // CHECK9-NEXT:    [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
737 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
738 // CHECK9-NEXT:    [[IDXPROM10:%.*]] = sext i32 [[TMP15]] to i64
739 // CHECK9-NEXT:    [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
740 // CHECK9-NEXT:    [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8*
741 // CHECK9-NEXT:    [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8*
742 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false)
743 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
744 // CHECK9:       omp.body.continue:
745 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
746 // CHECK9:       omp.inner.for.inc:
747 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
748 // CHECK9-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP18]], 1
749 // CHECK9-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
750 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
751 // CHECK9:       omp.inner.for.end:
752 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
753 // CHECK9:       omp.loop.exit:
754 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
755 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
756 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
757 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
758 // CHECK9-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
759 // CHECK9-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
760 // CHECK9:       .omp.lastprivate.then:
761 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
762 // CHECK9-NEXT:    store i32 [[TMP23]], i32* [[CONV]], align 4
763 // CHECK9-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
764 // CHECK9-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
765 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false)
766 // CHECK9-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0
767 // CHECK9-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
768 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2
769 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP27]]
770 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
771 // CHECK9:       omp.arraycpy.body:
772 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
773 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
774 // CHECK9-NEXT:    [[TMP28:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
775 // CHECK9-NEXT:    [[TMP29:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
776 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 4, i1 false)
777 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
778 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
779 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
780 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
781 // CHECK9:       omp.arraycpy.done14:
782 // CHECK9-NEXT:    [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
783 // CHECK9-NEXT:    [[TMP31:%.*]] = bitcast %struct.S* [[TMP3]] to i8*
784 // CHECK9-NEXT:    [[TMP32:%.*]] = bitcast %struct.S* [[TMP30]] to i8*
785 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
786 // CHECK9-NEXT:    [[TMP33:%.*]] = load i32, i32* [[SVAR8]], align 4
787 // CHECK9-NEXT:    store i32 [[TMP33]], i32* [[CONV1]], align 4
788 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
789 // CHECK9:       .omp.lastprivate.done:
790 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
791 // CHECK9-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
792 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
793 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
794 // CHECK9:       arraydestroy.body:
795 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
796 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
797 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
798 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
799 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
800 // CHECK9:       arraydestroy.done16:
801 // CHECK9-NEXT:    ret void
802 //
803 //
804 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
805 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
806 // CHECK9-NEXT:  entry:
807 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
808 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
809 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
810 // CHECK9-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
811 // CHECK9-NEXT:    ret void
812 //
813 //
814 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
815 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
816 // CHECK9-NEXT:  entry:
817 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
818 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
819 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
820 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
821 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
822 // CHECK9-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
823 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
824 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
825 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
826 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
827 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
828 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
829 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
830 // CHECK9-NEXT:    store i32 0, i32* [[T_VAR]], align 4
831 // CHECK9-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
832 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
833 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
834 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
835 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
836 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
837 // CHECK9-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
838 // CHECK9-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
839 // CHECK9-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
840 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
841 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
842 // CHECK9-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
843 // CHECK9-NEXT:    [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
844 // CHECK9-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
845 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
846 // CHECK9-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]**
847 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 8
848 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
849 // CHECK9-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]**
850 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8
851 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
852 // CHECK9-NEXT:    store i8* null, i8** [[TMP9]], align 8
853 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
854 // CHECK9-NEXT:    [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
855 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP11]], align 8
856 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
857 // CHECK9-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
858 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP13]], align 8
859 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
860 // CHECK9-NEXT:    store i8* null, i8** [[TMP14]], align 8
861 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
862 // CHECK9-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]**
863 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 8
864 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
865 // CHECK9-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
866 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
867 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
868 // CHECK9-NEXT:    store i8* null, i8** [[TMP19]], align 8
869 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
870 // CHECK9-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0**
871 // CHECK9-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 8
872 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
873 // CHECK9-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
874 // CHECK9-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 8
875 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
876 // CHECK9-NEXT:    store i8* null, i8** [[TMP24]], align 8
877 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
878 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
879 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
880 // CHECK9-NEXT:    [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
881 // CHECK9-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
882 // CHECK9-NEXT:    br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
883 // CHECK9:       omp_offload.failed:
884 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
885 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
886 // CHECK9:       omp_offload.cont:
887 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
888 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
889 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
890 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
891 // CHECK9:       arraydestroy.body:
892 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
893 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
894 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
895 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
896 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
897 // CHECK9:       arraydestroy.done2:
898 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
899 // CHECK9-NEXT:    [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
900 // CHECK9-NEXT:    ret i32 [[TMP30]]
901 //
902 //
903 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
904 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
905 // CHECK9-NEXT:  entry:
906 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
907 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
908 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
909 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
910 // CHECK9-NEXT:    store float 0.000000e+00, float* [[F]], align 4
911 // CHECK9-NEXT:    ret void
912 //
913 //
914 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
915 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
916 // CHECK9-NEXT:  entry:
917 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
918 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
919 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
920 // CHECK9-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
921 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
922 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
923 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
924 // CHECK9-NEXT:    store float [[TMP0]], float* [[F]], align 4
925 // CHECK9-NEXT:    ret void
926 //
927 //
928 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
929 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
930 // CHECK9-NEXT:  entry:
931 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
932 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
933 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
934 // CHECK9-NEXT:    ret void
935 //
936 //
937 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
938 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
939 // CHECK9-NEXT:  entry:
940 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
941 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
942 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
943 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
944 // CHECK9-NEXT:    ret void
945 //
946 //
947 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
948 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
949 // CHECK9-NEXT:  entry:
950 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
951 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
952 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
953 // CHECK9-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
954 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
955 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
956 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
957 // CHECK9-NEXT:    ret void
958 //
959 //
960 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
961 // CHECK9-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
962 // CHECK9-NEXT:  entry:
963 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
964 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
965 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
966 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
967 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
968 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
969 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
970 // CHECK9-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
971 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
972 // CHECK9-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
973 // CHECK9-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
974 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
975 // CHECK9-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
976 // CHECK9-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
977 // CHECK9-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
978 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
979 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
980 // CHECK9-NEXT:    store i32 [[TMP3]], i32* [[CONV1]], align 4
981 // CHECK9-NEXT:    [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
982 // CHECK9-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
983 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]])
984 // CHECK9-NEXT:    ret void
985 //
986 //
987 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
988 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
989 // CHECK9-NEXT:  entry:
990 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
991 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
992 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
993 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
994 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
995 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
996 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
997 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
998 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
999 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1000 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1001 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1002 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1003 // CHECK9-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
1004 // CHECK9-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
1005 // CHECK9-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
1006 // CHECK9-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1007 // CHECK9-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 8
1008 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1009 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1010 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1011 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1012 // CHECK9-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1013 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1014 // CHECK9-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1015 // CHECK9-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1016 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1017 // CHECK9-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1018 // CHECK9-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1019 // CHECK9-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1020 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1021 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1022 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1023 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1024 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
1025 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1026 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1027 // CHECK9:       arrayctor.loop:
1028 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1029 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1030 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1031 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1032 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1033 // CHECK9:       arrayctor.cont:
1034 // CHECK9-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1035 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
1036 // CHECK9-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8
1037 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1038 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
1039 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1040 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1041 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
1042 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1043 // CHECK9:       cond.true:
1044 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1045 // CHECK9:       cond.false:
1046 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1047 // CHECK9-NEXT:    br label [[COND_END]]
1048 // CHECK9:       cond.end:
1049 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1050 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1051 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1052 // CHECK9-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1053 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1054 // CHECK9:       omp.inner.for.cond:
1055 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1056 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1057 // CHECK9-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1058 // CHECK9-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1059 // CHECK9:       omp.inner.for.cond.cleanup:
1060 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1061 // CHECK9:       omp.inner.for.body:
1062 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1063 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1064 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1065 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1066 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4
1067 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1068 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
1069 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
1070 // CHECK9-NEXT:    store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4
1071 // CHECK9-NEXT:    [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8
1072 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1073 // CHECK9-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64
1074 // CHECK9-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]]
1075 // CHECK9-NEXT:    [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
1076 // CHECK9-NEXT:    [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8*
1077 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false)
1078 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1079 // CHECK9:       omp.body.continue:
1080 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1081 // CHECK9:       omp.inner.for.inc:
1082 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1083 // CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1
1084 // CHECK9-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1085 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
1086 // CHECK9:       omp.inner.for.end:
1087 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1088 // CHECK9:       omp.loop.exit:
1089 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1090 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
1091 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
1092 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1093 // CHECK9-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1094 // CHECK9-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1095 // CHECK9:       .omp.lastprivate.then:
1096 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4
1097 // CHECK9-NEXT:    store i32 [[TMP23]], i32* [[CONV]], align 4
1098 // CHECK9-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1099 // CHECK9-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
1100 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false)
1101 // CHECK9-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0
1102 // CHECK9-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
1103 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
1104 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP27]]
1105 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1106 // CHECK9:       omp.arraycpy.body:
1107 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1108 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1109 // CHECK9-NEXT:    [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1110 // CHECK9-NEXT:    [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1111 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 4, i1 false)
1112 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1113 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1114 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
1115 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
1116 // CHECK9:       omp.arraycpy.done12:
1117 // CHECK9-NEXT:    [[TMP30:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8
1118 // CHECK9-NEXT:    [[TMP31:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8*
1119 // CHECK9-NEXT:    [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP30]] to i8*
1120 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
1121 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1122 // CHECK9:       .omp.lastprivate.done:
1123 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
1124 // CHECK9-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
1125 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
1126 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1127 // CHECK9:       arraydestroy.body:
1128 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1129 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1130 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1131 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
1132 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
1133 // CHECK9:       arraydestroy.done14:
1134 // CHECK9-NEXT:    ret void
1135 //
1136 //
1137 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1138 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1139 // CHECK9-NEXT:  entry:
1140 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1141 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1142 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1143 // CHECK9-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1144 // CHECK9-NEXT:    ret void
1145 //
1146 //
1147 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1148 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1149 // CHECK9-NEXT:  entry:
1150 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1151 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1152 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1153 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1154 // CHECK9-NEXT:    store i32 0, i32* [[F]], align 4
1155 // CHECK9-NEXT:    ret void
1156 //
1157 //
1158 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1159 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1160 // CHECK9-NEXT:  entry:
1161 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1162 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1163 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1164 // CHECK9-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1165 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1166 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1167 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1168 // CHECK9-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
1169 // CHECK9-NEXT:    ret void
1170 //
1171 //
1172 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1173 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1174 // CHECK9-NEXT:  entry:
1175 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1176 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1177 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1178 // CHECK9-NEXT:    ret void
1179 //
1180 //
1181 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1182 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1183 // CHECK9-NEXT:  entry:
1184 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
1185 // CHECK9-NEXT:    ret void
1186 //
1187 //
1188 // CHECK11-LABEL: define {{[^@]+}}@main
1189 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
1190 // CHECK11-NEXT:  entry:
1191 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1192 // CHECK11-NEXT:    [[G:%.*]] = alloca double, align 8
1193 // CHECK11-NEXT:    [[G1:%.*]] = alloca double*, align 4
1194 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1195 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1196 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1197 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1198 // CHECK11-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 4
1199 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
1200 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1201 // CHECK11-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
1202 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
1203 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
1204 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
1205 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1206 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1207 // CHECK11-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1208 // CHECK11-NEXT:    store double* [[G]], double** [[G1]], align 4
1209 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1210 // CHECK11-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1211 // CHECK11-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1212 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
1213 // CHECK11-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1214 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1215 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
1216 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1217 // CHECK11-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
1218 // CHECK11-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
1219 // CHECK11-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
1220 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1221 // CHECK11-NEXT:    store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
1222 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1223 // CHECK11-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1224 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
1225 // CHECK11-NEXT:    store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
1226 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
1227 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1228 // CHECK11-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]**
1229 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4
1230 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1231 // CHECK11-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]**
1232 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 4
1233 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1234 // CHECK11-NEXT:    store i8* null, i8** [[TMP11]], align 4
1235 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1236 // CHECK11-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
1237 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP13]], align 4
1238 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1239 // CHECK11-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
1240 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP15]], align 4
1241 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1242 // CHECK11-NEXT:    store i8* null, i8** [[TMP16]], align 4
1243 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1244 // CHECK11-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]**
1245 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 4
1246 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1247 // CHECK11-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
1248 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
1249 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1250 // CHECK11-NEXT:    store i8* null, i8** [[TMP21]], align 4
1251 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1252 // CHECK11-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S**
1253 // CHECK11-NEXT:    store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 4
1254 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1255 // CHECK11-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
1256 // CHECK11-NEXT:    store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 4
1257 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1258 // CHECK11-NEXT:    store i8* null, i8** [[TMP26]], align 4
1259 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1260 // CHECK11-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32*
1261 // CHECK11-NEXT:    store i32 [[TMP6]], i32* [[TMP28]], align 4
1262 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1263 // CHECK11-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
1264 // CHECK11-NEXT:    store i32 [[TMP6]], i32* [[TMP30]], align 4
1265 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1266 // CHECK11-NEXT:    store i8* null, i8** [[TMP31]], align 4
1267 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1268 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1269 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
1270 // CHECK11-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 5, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1271 // CHECK11-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1272 // CHECK11-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1273 // CHECK11:       omp_offload.failed:
1274 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
1275 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1276 // CHECK11:       omp_offload.cont:
1277 // CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1278 // CHECK11-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
1279 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1280 // CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1281 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1282 // CHECK11:       arraydestroy.body:
1283 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1284 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1285 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1286 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1287 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1288 // CHECK11:       arraydestroy.done2:
1289 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1290 // CHECK11-NEXT:    [[TMP37:%.*]] = load i32, i32* [[RETVAL]], align 4
1291 // CHECK11-NEXT:    ret i32 [[TMP37]]
1292 //
1293 //
1294 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1295 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1296 // CHECK11-NEXT:  entry:
1297 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1298 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1299 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1300 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1301 // CHECK11-NEXT:    ret void
1302 //
1303 //
1304 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1305 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1306 // CHECK11-NEXT:  entry:
1307 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1308 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1309 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1310 // CHECK11-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1311 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1312 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1313 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1314 // CHECK11-NEXT:    ret void
1315 //
1316 //
1317 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
1318 // CHECK11-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1319 // CHECK11-NEXT:  entry:
1320 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
1321 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1322 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
1323 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
1324 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
1325 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
1326 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1327 // CHECK11-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
1328 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
1329 // CHECK11-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1330 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1331 // CHECK11-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
1332 // CHECK11-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
1333 // CHECK11-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
1334 // CHECK11-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1335 // CHECK11-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
1336 // CHECK11-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
1337 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4
1338 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4
1339 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1340 // CHECK11-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1341 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4
1342 // CHECK11-NEXT:    store i32 [[TMP6]], i32* [[SVAR_CASTED]], align 4
1343 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
1344 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i32 [[TMP7]])
1345 // CHECK11-NEXT:    ret void
1346 //
1347 //
1348 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
1349 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] {
1350 // CHECK11-NEXT:  entry:
1351 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1352 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1353 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
1354 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1355 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
1356 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
1357 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
1358 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
1359 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1360 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1361 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1362 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1363 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1364 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1365 // CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
1366 // CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
1367 // CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
1368 // CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1369 // CHECK11-NEXT:    [[_TMP6:%.*]] = alloca %struct.S*, align 4
1370 // CHECK11-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4
1371 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1372 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1373 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1374 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
1375 // CHECK11-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1376 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1377 // CHECK11-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
1378 // CHECK11-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
1379 // CHECK11-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
1380 // CHECK11-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
1381 // CHECK11-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
1382 // CHECK11-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
1383 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1384 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1385 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1386 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1387 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
1388 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1389 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1390 // CHECK11:       arrayctor.loop:
1391 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1392 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1393 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
1394 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1395 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1396 // CHECK11:       arrayctor.cont:
1397 // CHECK11-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1398 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
1399 // CHECK11-NEXT:    store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
1400 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1401 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
1402 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1403 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1404 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
1405 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1406 // CHECK11:       cond.true:
1407 // CHECK11-NEXT:    br label [[COND_END:%.*]]
1408 // CHECK11:       cond.false:
1409 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1410 // CHECK11-NEXT:    br label [[COND_END]]
1411 // CHECK11:       cond.end:
1412 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1413 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1414 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1415 // CHECK11-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1416 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1417 // CHECK11:       omp.inner.for.cond:
1418 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1419 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1420 // CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1421 // CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1422 // CHECK11:       omp.inner.for.cond.cleanup:
1423 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1424 // CHECK11:       omp.inner.for.body:
1425 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1426 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1427 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1428 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1429 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4
1430 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1431 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]]
1432 // CHECK11-NEXT:    store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4
1433 // CHECK11-NEXT:    [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
1434 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1435 // CHECK11-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP15]]
1436 // CHECK11-NEXT:    [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8*
1437 // CHECK11-NEXT:    [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8*
1438 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false)
1439 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1440 // CHECK11:       omp.body.continue:
1441 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1442 // CHECK11:       omp.inner.for.inc:
1443 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1444 // CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1
1445 // CHECK11-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1446 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]
1447 // CHECK11:       omp.inner.for.end:
1448 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1449 // CHECK11:       omp.loop.exit:
1450 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1451 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
1452 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
1453 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1454 // CHECK11-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1455 // CHECK11-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1456 // CHECK11:       .omp.lastprivate.then:
1457 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4
1458 // CHECK11-NEXT:    store i32 [[TMP23]], i32* [[T_VAR_ADDR]], align 4
1459 // CHECK11-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1460 // CHECK11-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
1461 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 8, i1 false)
1462 // CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0
1463 // CHECK11-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
1464 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
1465 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP27]]
1466 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1467 // CHECK11:       omp.arraycpy.body:
1468 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1469 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1470 // CHECK11-NEXT:    [[TMP28:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1471 // CHECK11-NEXT:    [[TMP29:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1472 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 4, i1 false)
1473 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1474 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1475 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
1476 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
1477 // CHECK11:       omp.arraycpy.done12:
1478 // CHECK11-NEXT:    [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
1479 // CHECK11-NEXT:    [[TMP31:%.*]] = bitcast %struct.S* [[TMP3]] to i8*
1480 // CHECK11-NEXT:    [[TMP32:%.*]] = bitcast %struct.S* [[TMP30]] to i8*
1481 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
1482 // CHECK11-NEXT:    [[TMP33:%.*]] = load i32, i32* [[SVAR7]], align 4
1483 // CHECK11-NEXT:    store i32 [[TMP33]], i32* [[SVAR_ADDR]], align 4
1484 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1485 // CHECK11:       .omp.lastprivate.done:
1486 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
1487 // CHECK11-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
1488 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
1489 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1490 // CHECK11:       arraydestroy.body:
1491 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1492 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1493 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1494 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
1495 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
1496 // CHECK11:       arraydestroy.done14:
1497 // CHECK11-NEXT:    ret void
1498 //
1499 //
1500 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1501 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1502 // CHECK11-NEXT:  entry:
1503 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1504 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1505 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1506 // CHECK11-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1507 // CHECK11-NEXT:    ret void
1508 //
1509 //
1510 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1511 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
1512 // CHECK11-NEXT:  entry:
1513 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1514 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1515 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1516 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1517 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1518 // CHECK11-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
1519 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
1520 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1521 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
1522 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
1523 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
1524 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1525 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1526 // CHECK11-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1527 // CHECK11-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1528 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
1529 // CHECK11-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1530 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
1531 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
1532 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
1533 // CHECK11-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
1534 // CHECK11-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
1535 // CHECK11-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
1536 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1537 // CHECK11-NEXT:    store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
1538 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1539 // CHECK11-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
1540 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1541 // CHECK11-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]**
1542 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 4
1543 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1544 // CHECK11-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]**
1545 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4
1546 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1547 // CHECK11-NEXT:    store i8* null, i8** [[TMP9]], align 4
1548 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1549 // CHECK11-NEXT:    [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
1550 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP11]], align 4
1551 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1552 // CHECK11-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
1553 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP13]], align 4
1554 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1555 // CHECK11-NEXT:    store i8* null, i8** [[TMP14]], align 4
1556 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1557 // CHECK11-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]**
1558 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 4
1559 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1560 // CHECK11-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1561 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
1562 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1563 // CHECK11-NEXT:    store i8* null, i8** [[TMP19]], align 4
1564 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1565 // CHECK11-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0**
1566 // CHECK11-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 4
1567 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1568 // CHECK11-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1569 // CHECK11-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 4
1570 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1571 // CHECK11-NEXT:    store i8* null, i8** [[TMP24]], align 4
1572 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1573 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1574 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
1575 // CHECK11-NEXT:    [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1576 // CHECK11-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
1577 // CHECK11-NEXT:    br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1578 // CHECK11:       omp_offload.failed:
1579 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1580 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1581 // CHECK11:       omp_offload.cont:
1582 // CHECK11-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1583 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1584 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
1585 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1586 // CHECK11:       arraydestroy.body:
1587 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1588 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1589 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1590 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1591 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1592 // CHECK11:       arraydestroy.done2:
1593 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1594 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
1595 // CHECK11-NEXT:    ret i32 [[TMP30]]
1596 //
1597 //
1598 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1599 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1600 // CHECK11-NEXT:  entry:
1601 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1602 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1603 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1604 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1605 // CHECK11-NEXT:    store float 0.000000e+00, float* [[F]], align 4
1606 // CHECK11-NEXT:    ret void
1607 //
1608 //
1609 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1610 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1611 // CHECK11-NEXT:  entry:
1612 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1613 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1614 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1615 // CHECK11-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1616 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1617 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1618 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1619 // CHECK11-NEXT:    store float [[TMP0]], float* [[F]], align 4
1620 // CHECK11-NEXT:    ret void
1621 //
1622 //
1623 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1624 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1625 // CHECK11-NEXT:  entry:
1626 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1627 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1628 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1629 // CHECK11-NEXT:    ret void
1630 //
1631 //
1632 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1633 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1634 // CHECK11-NEXT:  entry:
1635 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1636 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1637 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1638 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1639 // CHECK11-NEXT:    ret void
1640 //
1641 //
1642 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1643 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1644 // CHECK11-NEXT:  entry:
1645 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1646 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1647 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1648 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1649 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1650 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1651 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
1652 // CHECK11-NEXT:    ret void
1653 //
1654 //
1655 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1656 // CHECK11-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1657 // CHECK11-NEXT:  entry:
1658 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
1659 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1660 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
1661 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
1662 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
1663 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1664 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
1665 // CHECK11-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1666 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
1667 // CHECK11-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
1668 // CHECK11-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
1669 // CHECK11-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
1670 // CHECK11-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
1671 // CHECK11-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
1672 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4
1673 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4
1674 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1675 // CHECK11-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
1676 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]])
1677 // CHECK11-NEXT:    ret void
1678 //
1679 //
1680 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
1681 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1682 // CHECK11-NEXT:  entry:
1683 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1684 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1685 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
1686 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1687 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
1688 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
1689 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
1690 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1691 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1692 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1693 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1694 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1695 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1696 // CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
1697 // CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
1698 // CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
1699 // CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1700 // CHECK11-NEXT:    [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
1701 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1702 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1703 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1704 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
1705 // CHECK11-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1706 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
1707 // CHECK11-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
1708 // CHECK11-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
1709 // CHECK11-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
1710 // CHECK11-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
1711 // CHECK11-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
1712 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1713 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1714 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1715 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1716 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
1717 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
1718 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1719 // CHECK11:       arrayctor.loop:
1720 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1721 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1722 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
1723 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1724 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1725 // CHECK11:       arrayctor.cont:
1726 // CHECK11-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
1727 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
1728 // CHECK11-NEXT:    store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
1729 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1730 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
1731 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1732 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1733 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
1734 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1735 // CHECK11:       cond.true:
1736 // CHECK11-NEXT:    br label [[COND_END:%.*]]
1737 // CHECK11:       cond.false:
1738 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1739 // CHECK11-NEXT:    br label [[COND_END]]
1740 // CHECK11:       cond.end:
1741 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1742 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1743 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1744 // CHECK11-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1745 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1746 // CHECK11:       omp.inner.for.cond:
1747 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1748 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1749 // CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1750 // CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1751 // CHECK11:       omp.inner.for.cond.cleanup:
1752 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1753 // CHECK11:       omp.inner.for.body:
1754 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1755 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1756 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1757 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1758 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4
1759 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1760 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]]
1761 // CHECK11-NEXT:    store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4
1762 // CHECK11-NEXT:    [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
1763 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1764 // CHECK11-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP15]]
1765 // CHECK11-NEXT:    [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
1766 // CHECK11-NEXT:    [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8*
1767 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false)
1768 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1769 // CHECK11:       omp.body.continue:
1770 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1771 // CHECK11:       omp.inner.for.inc:
1772 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1773 // CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1
1774 // CHECK11-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
1775 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]
1776 // CHECK11:       omp.inner.for.end:
1777 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1778 // CHECK11:       omp.loop.exit:
1779 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1780 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
1781 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
1782 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1783 // CHECK11-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1784 // CHECK11-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1785 // CHECK11:       .omp.lastprivate.then:
1786 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4
1787 // CHECK11-NEXT:    store i32 [[TMP23]], i32* [[T_VAR_ADDR]], align 4
1788 // CHECK11-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1789 // CHECK11-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
1790 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 8, i1 false)
1791 // CHECK11-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0
1792 // CHECK11-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
1793 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
1794 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP27]]
1795 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1796 // CHECK11:       omp.arraycpy.body:
1797 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1798 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1799 // CHECK11-NEXT:    [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1800 // CHECK11-NEXT:    [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1801 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 4, i1 false)
1802 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1803 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1804 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
1805 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
1806 // CHECK11:       omp.arraycpy.done11:
1807 // CHECK11-NEXT:    [[TMP30:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
1808 // CHECK11-NEXT:    [[TMP31:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8*
1809 // CHECK11-NEXT:    [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP30]] to i8*
1810 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
1811 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1812 // CHECK11:       .omp.lastprivate.done:
1813 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
1814 // CHECK11-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
1815 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
1816 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1817 // CHECK11:       arraydestroy.body:
1818 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1819 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1820 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1821 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
1822 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
1823 // CHECK11:       arraydestroy.done13:
1824 // CHECK11-NEXT:    ret void
1825 //
1826 //
1827 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1828 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1829 // CHECK11-NEXT:  entry:
1830 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1831 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1832 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1833 // CHECK11-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1834 // CHECK11-NEXT:    ret void
1835 //
1836 //
1837 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1838 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1839 // CHECK11-NEXT:  entry:
1840 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1841 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1842 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1843 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1844 // CHECK11-NEXT:    store i32 0, i32* [[F]], align 4
1845 // CHECK11-NEXT:    ret void
1846 //
1847 //
1848 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1849 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1850 // CHECK11-NEXT:  entry:
1851 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1852 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1853 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1854 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1855 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1856 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1857 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1858 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
1859 // CHECK11-NEXT:    ret void
1860 //
1861 //
1862 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1863 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1864 // CHECK11-NEXT:  entry:
1865 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1866 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1867 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1868 // CHECK11-NEXT:    ret void
1869 //
1870 //
1871 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1872 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
1873 // CHECK11-NEXT:  entry:
1874 // CHECK11-NEXT:    call void @__tgt_register_requires(i64 1)
1875 // CHECK11-NEXT:    ret void
1876 //
1877