1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X][Y]; 25 26 int foo(void) { 27 28 #pragma omp target teams distribute collapse(2) 29 for(int i = 0; i < X; i++) { 30 for(int j = 0; j < Y; j++) { 31 a[i][j] = (T)0; 32 } 33 } 34 35 // discard loop variables not needed here 36 37 return a[0][0]; 38 } 39 }; 40 41 int teams_template_struct(void) { 42 SS<int, 123, 456> V; 43 return V.foo(); 44 45 } 46 #endif // CK1 47 48 // Test host codegen. 49 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 50 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 51 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 52 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 53 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 54 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 55 56 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 57 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 62 #ifdef CK2 63 64 template <typename T, int n, int m> 65 int tmain(T argc) { 66 T a[n][m]; 67 #pragma omp target teams distribute collapse(2) 68 for(int i = 0; i < n; i++) { 69 for(int j = 0; j < m; j++) { 70 a[i][j] = (T)0; 71 } 72 } 73 return 0; 74 } 75 76 int main (int argc, char **argv) { 77 int n = 100; 78 int m = 2; 79 int a[n][m]; 80 #pragma omp target teams distribute collapse(2) 81 for(int i = 0; i < n; i++) { 82 for(int j = 0; j < m; j++) { 83 a[i][j] = 0; 84 } 85 } 86 return tmain<int, 10, 2>(argc); 87 } 88 89 90 91 92 93 // discard loop variables not needed here 94 95 #endif // CK2 96 #endif // #ifndef HEADER 97 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 98 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 99 // CHECK1-NEXT: entry: 100 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 101 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 102 // CHECK1-NEXT: ret i32 [[CALL]] 103 // 104 // 105 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 106 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 107 // CHECK1-NEXT: entry: 108 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 109 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 110 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 111 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 112 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 113 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 114 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 115 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 116 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 117 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 118 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 119 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 120 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 121 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 122 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8 123 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 124 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 125 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 126 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 127 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 56088) 128 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 129 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 130 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 131 // CHECK1: omp_offload.failed: 132 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 133 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 134 // CHECK1: omp_offload.cont: 135 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 136 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0 137 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0 138 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 139 // CHECK1-NEXT: ret i32 [[TMP9]] 140 // 141 // 142 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 143 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 144 // CHECK1-NEXT: entry: 145 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 146 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 147 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 148 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 149 // CHECK1-NEXT: ret void 150 // 151 // 152 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 153 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 154 // CHECK1-NEXT: entry: 155 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 156 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 157 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 158 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 159 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 160 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 161 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 162 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 163 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 166 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 168 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 169 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 170 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 171 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 172 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 173 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 174 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 175 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 176 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 177 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 178 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 179 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 180 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 181 // CHECK1: cond.true: 182 // CHECK1-NEXT: br label [[COND_END:%.*]] 183 // CHECK1: cond.false: 184 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 185 // CHECK1-NEXT: br label [[COND_END]] 186 // CHECK1: cond.end: 187 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 188 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 189 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 190 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 191 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 192 // CHECK1: omp.inner.for.cond: 193 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 194 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 195 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 196 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 197 // CHECK1: omp.inner.for.body: 198 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 199 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 456 200 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 201 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 202 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 203 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 204 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 205 // CHECK1-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456 206 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 207 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 208 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 209 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 210 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 211 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 212 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 213 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 214 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 215 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 216 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64 217 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]] 218 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX8]], align 4 219 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 220 // CHECK1: omp.body.continue: 221 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 222 // CHECK1: omp.inner.for.inc: 223 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 224 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1 225 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 226 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 227 // CHECK1: omp.inner.for.end: 228 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 229 // CHECK1: omp.loop.exit: 230 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 231 // CHECK1-NEXT: ret void 232 // 233 // 234 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 235 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 236 // CHECK1-NEXT: entry: 237 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 238 // CHECK1-NEXT: ret void 239 // 240 // 241 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 242 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 243 // CHECK3-NEXT: entry: 244 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 245 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 246 // CHECK3-NEXT: ret i32 [[CALL]] 247 // 248 // 249 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 250 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 251 // CHECK3-NEXT: entry: 252 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 253 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 254 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 255 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 256 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 257 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 258 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 259 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 260 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 261 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 262 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 263 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 264 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 265 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 266 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4 267 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 268 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 269 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 270 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 271 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 56088) 272 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 273 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 274 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 275 // CHECK3: omp_offload.failed: 276 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 277 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 278 // CHECK3: omp_offload.cont: 279 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 280 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0 281 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0 282 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 283 // CHECK3-NEXT: ret i32 [[TMP9]] 284 // 285 // 286 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 287 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 288 // CHECK3-NEXT: entry: 289 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 290 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 291 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 292 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 293 // CHECK3-NEXT: ret void 294 // 295 // 296 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 297 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 298 // CHECK3-NEXT: entry: 299 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 300 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 301 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 302 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 303 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 304 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 305 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 306 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 307 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 308 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 309 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 310 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 311 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 312 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 313 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 314 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 315 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 316 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 317 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 318 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 319 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 320 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 321 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 322 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 323 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 324 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 325 // CHECK3: cond.true: 326 // CHECK3-NEXT: br label [[COND_END:%.*]] 327 // CHECK3: cond.false: 328 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 329 // CHECK3-NEXT: br label [[COND_END]] 330 // CHECK3: cond.end: 331 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 332 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 333 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 334 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 335 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 336 // CHECK3: omp.inner.for.cond: 337 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 338 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 339 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 340 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 341 // CHECK3: omp.inner.for.body: 342 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 343 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 456 344 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 345 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 346 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 347 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 348 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 349 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456 350 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 351 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 352 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 353 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 354 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 355 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 356 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 357 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP11]] 358 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 359 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP12]] 360 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 361 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 362 // CHECK3: omp.body.continue: 363 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 364 // CHECK3: omp.inner.for.inc: 365 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 366 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1 367 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 368 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 369 // CHECK3: omp.inner.for.end: 370 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 371 // CHECK3: omp.loop.exit: 372 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 373 // CHECK3-NEXT: ret void 374 // 375 // 376 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 377 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 378 // CHECK3-NEXT: entry: 379 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 380 // CHECK3-NEXT: ret void 381 // 382 // 383 // CHECK9-LABEL: define {{[^@]+}}@main 384 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 385 // CHECK9-NEXT: entry: 386 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 387 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 388 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 389 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 390 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 391 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 392 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 393 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 394 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 395 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 396 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 397 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 398 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 399 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 400 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 401 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 402 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 403 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 404 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 405 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 406 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 407 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 408 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 409 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4 410 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 411 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 412 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4 413 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 414 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave() 415 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8 416 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 417 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 418 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 419 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 420 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4 421 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 422 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4 423 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8 424 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4 425 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32* 426 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4 427 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8 428 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 429 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 430 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 431 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP12]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes to i8*), i64 40, i1 false) 432 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 433 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64* 434 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP14]], align 8 435 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 436 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 437 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP16]], align 8 438 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 439 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8 440 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 441 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 442 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8 443 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 444 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 445 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8 446 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 447 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 448 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 449 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64* 450 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP24]], align 8 451 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 452 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 453 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP26]], align 8 454 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 455 // CHECK9-NEXT: store i8* null, i8** [[TMP27]], align 8 456 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 457 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 458 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP29]], align 8 459 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 460 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 461 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8 462 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 463 // CHECK9-NEXT: store i8* null, i8** [[TMP32]], align 8 464 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 465 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32** 466 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP34]], align 8 467 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 468 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32** 469 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 8 470 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 471 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP37]], align 8 472 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 473 // CHECK9-NEXT: store i8* null, i8** [[TMP38]], align 8 474 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 475 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 476 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 477 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[N]], align 4 478 // CHECK9-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_]], align 4 479 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 480 // CHECK9-NEXT: store i32 [[TMP43]], i32* [[DOTCAPTURE_EXPR_3]], align 4 481 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 482 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP44]], 0 483 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 484 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64 485 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 486 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP45]], 0 487 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 488 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 489 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]] 490 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 491 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8 492 // CHECK9-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8 493 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP46]], 1 494 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[ADD]]) 495 // CHECK9-NEXT: [[TMP47:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.region_id, i32 5, i8** [[TMP39]], i8** [[TMP40]], i64* [[TMP41]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 496 // CHECK9-NEXT: [[TMP48:%.*]] = icmp ne i32 [[TMP47]], 0 497 // CHECK9-NEXT: br i1 [[TMP48]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 498 // CHECK9: omp_offload.failed: 499 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 500 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 501 // CHECK9: omp_offload.cont: 502 // CHECK9-NEXT: [[TMP49:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 503 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP49]]) 504 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 505 // CHECK9-NEXT: [[TMP50:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 506 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP50]]) 507 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, i32* [[RETVAL]], align 4 508 // CHECK9-NEXT: ret i32 [[TMP51]] 509 // 510 // 511 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80 512 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 513 // CHECK9-NEXT: entry: 514 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 515 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 516 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 517 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 518 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 519 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 520 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 521 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 522 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 523 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 524 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 525 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 526 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 527 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32* 528 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 529 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 530 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 531 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 532 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32* 533 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4 534 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 535 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4 536 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32* 537 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4 538 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8 539 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 540 // CHECK9-NEXT: ret void 541 // 542 // 543 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 544 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 545 // CHECK9-NEXT: entry: 546 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 547 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 548 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 549 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 550 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 551 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 552 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 553 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 554 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 555 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 556 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 557 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 558 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8 559 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 560 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 561 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 562 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 563 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 564 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 565 // CHECK9-NEXT: [[I13:%.*]] = alloca i32, align 4 566 // CHECK9-NEXT: [[J14:%.*]] = alloca i32, align 4 567 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 568 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 569 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 570 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 571 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 572 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 573 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 574 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 575 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32* 576 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 577 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 578 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 579 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 580 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 581 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4 582 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4 583 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 584 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 585 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 586 // CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[DIV]] to i64 587 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 588 // CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP6]], 0 589 // CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 590 // CHECK9-NEXT: [[CONV10:%.*]] = sext i32 [[DIV9]] to i64 591 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV7]], [[CONV10]] 592 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i64 [[MUL]], 1 593 // CHECK9-NEXT: store i64 [[SUB11]], i64* [[DOTCAPTURE_EXPR_6]], align 8 594 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 595 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4 596 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 597 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 598 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 599 // CHECK9: land.lhs.true: 600 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 601 // CHECK9-NEXT: [[CMP12:%.*]] = icmp slt i32 0, [[TMP8]] 602 // CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 603 // CHECK9: omp.precond.then: 604 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 605 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8 606 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8 607 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 608 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 609 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 610 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 611 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 612 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 613 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8 614 // CHECK9-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]] 615 // CHECK9-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 616 // CHECK9: cond.true: 617 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8 618 // CHECK9-NEXT: br label [[COND_END:%.*]] 619 // CHECK9: cond.false: 620 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 621 // CHECK9-NEXT: br label [[COND_END]] 622 // CHECK9: cond.end: 623 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 624 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 625 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 626 // CHECK9-NEXT: store i64 [[TMP16]], i64* [[DOTOMP_IV]], align 8 627 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 628 // CHECK9: omp.inner.for.cond: 629 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 630 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 631 // CHECK9-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]] 632 // CHECK9-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 633 // CHECK9: omp.inner.for.body: 634 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 635 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 636 // CHECK9-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP20]], 0 637 // CHECK9-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 638 // CHECK9-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]] 639 // CHECK9-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64 640 // CHECK9-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP19]], [[CONV20]] 641 // CHECK9-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1 642 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]] 643 // CHECK9-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32 644 // CHECK9-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4 645 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 646 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 647 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 648 // CHECK9-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP23]], 0 649 // CHECK9-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 650 // CHECK9-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]] 651 // CHECK9-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64 652 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP22]], [[CONV27]] 653 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 654 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP24]], 0 655 // CHECK9-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 656 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]] 657 // CHECK9-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64 658 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]] 659 // CHECK9-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP21]], [[MUL33]] 660 // CHECK9-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1 661 // CHECK9-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]] 662 // CHECK9-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32 663 // CHECK9-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4 664 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I13]], align 4 665 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP25]] to i64 666 // CHECK9-NEXT: [[TMP26:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP1]] 667 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP26]] 668 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[J14]], align 4 669 // CHECK9-NEXT: [[IDXPROM38:%.*]] = sext i32 [[TMP27]] to i64 670 // CHECK9-NEXT: [[ARRAYIDX39:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM38]] 671 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX39]], align 4 672 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 673 // CHECK9: omp.body.continue: 674 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 675 // CHECK9: omp.inner.for.inc: 676 // CHECK9-NEXT: [[TMP28:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 677 // CHECK9-NEXT: [[ADD40:%.*]] = add nsw i64 [[TMP28]], 1 678 // CHECK9-NEXT: store i64 [[ADD40]], i64* [[DOTOMP_IV]], align 8 679 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 680 // CHECK9: omp.inner.for.end: 681 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 682 // CHECK9: omp.loop.exit: 683 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 684 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 685 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 686 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 687 // CHECK9: omp.precond.end: 688 // CHECK9-NEXT: ret void 689 // 690 // 691 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 692 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 693 // CHECK9-NEXT: entry: 694 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 695 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 696 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 697 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 698 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 699 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 700 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 701 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 702 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 703 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 704 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8 705 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 706 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 707 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8 708 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 709 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 710 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 711 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 712 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 20) 713 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 714 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 715 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 716 // CHECK9: omp_offload.failed: 717 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 718 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 719 // CHECK9: omp_offload.cont: 720 // CHECK9-NEXT: ret i32 0 721 // 722 // 723 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67 724 // CHECK9-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 725 // CHECK9-NEXT: entry: 726 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 727 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 728 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 729 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 730 // CHECK9-NEXT: ret void 731 // 732 // 733 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 734 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 735 // CHECK9-NEXT: entry: 736 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 737 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 738 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 739 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 740 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 741 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 742 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 743 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 744 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 745 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 746 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 747 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 748 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 749 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 750 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 751 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 752 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 753 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 754 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 755 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 756 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 757 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 758 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 759 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 760 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 761 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 762 // CHECK9: cond.true: 763 // CHECK9-NEXT: br label [[COND_END:%.*]] 764 // CHECK9: cond.false: 765 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 766 // CHECK9-NEXT: br label [[COND_END]] 767 // CHECK9: cond.end: 768 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 769 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 770 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 771 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 772 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 773 // CHECK9: omp.inner.for.cond: 774 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 775 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 776 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 777 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 778 // CHECK9: omp.inner.for.body: 779 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 780 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 2 781 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 782 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 783 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 784 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 785 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 786 // CHECK9-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2 787 // CHECK9-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 788 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 789 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 790 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 791 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 792 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 793 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 794 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]] 795 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 796 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64 797 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]] 798 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX8]], align 4 799 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 800 // CHECK9: omp.body.continue: 801 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 802 // CHECK9: omp.inner.for.inc: 803 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 804 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1 805 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 806 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 807 // CHECK9: omp.inner.for.end: 808 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 809 // CHECK9: omp.loop.exit: 810 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 811 // CHECK9-NEXT: ret void 812 // 813 // 814 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 815 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 816 // CHECK9-NEXT: entry: 817 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 818 // CHECK9-NEXT: ret void 819 // 820 // 821 // CHECK11-LABEL: define {{[^@]+}}@main 822 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 823 // CHECK11-NEXT: entry: 824 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 825 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 826 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 827 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 828 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 829 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 830 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 831 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 832 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 833 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 834 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 835 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 836 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 837 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 838 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 839 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 840 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 841 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 842 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 843 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 844 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 845 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 846 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 847 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4 848 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 849 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4 850 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 851 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 852 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 853 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 854 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 855 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4 856 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 857 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 858 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 859 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4 860 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4 861 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4 862 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 863 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 864 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 865 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 866 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes to i8*), i32 40, i1 false) 867 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 868 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 869 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP13]], align 4 870 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 871 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 872 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 873 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 874 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 875 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 876 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 877 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4 878 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 879 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 880 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4 881 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 882 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 883 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 884 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 885 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4 886 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 887 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 888 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4 889 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 890 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 891 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 892 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 893 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP28]], align 4 894 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 895 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 896 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4 897 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 898 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4 899 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 900 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32** 901 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP33]], align 4 902 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 903 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32** 904 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP35]], align 4 905 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 906 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP36]], align 4 907 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 908 // CHECK11-NEXT: store i8* null, i8** [[TMP37]], align 4 909 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 910 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 911 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 912 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4 913 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[DOTCAPTURE_EXPR_]], align 4 914 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[M]], align 4 915 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_2]], align 4 916 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 917 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP43]], 0 918 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 919 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 920 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 921 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP44]], 0 922 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 923 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 924 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 925 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 926 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8 927 // CHECK11-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8 928 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP45]], 1 929 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[ADD]]) 930 // CHECK11-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.region_id, i32 5, i8** [[TMP38]], i8** [[TMP39]], i64* [[TMP40]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 931 // CHECK11-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 932 // CHECK11-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 933 // CHECK11: omp_offload.failed: 934 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 935 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 936 // CHECK11: omp_offload.cont: 937 // CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 938 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP48]]) 939 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 940 // CHECK11-NEXT: [[TMP49:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 941 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP49]]) 942 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, i32* [[RETVAL]], align 4 943 // CHECK11-NEXT: ret i32 [[TMP50]] 944 // 945 // 946 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80 947 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 948 // CHECK11-NEXT: entry: 949 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 950 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 951 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 952 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 953 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 954 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 955 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 956 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 957 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 958 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 959 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 960 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 961 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 962 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 963 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 964 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4 965 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4 966 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4 967 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[M_ADDR]], align 4 968 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[M_CASTED]], align 4 969 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M_CASTED]], align 4 970 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 971 // CHECK11-NEXT: ret void 972 // 973 // 974 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 975 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 976 // CHECK11-NEXT: entry: 977 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 978 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 979 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 980 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 981 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 982 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 983 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 984 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 985 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 986 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 987 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 988 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 989 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 990 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 991 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 992 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 993 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 994 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 995 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 996 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4 997 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4 998 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 999 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1000 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1001 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 1002 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 1003 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 1004 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1005 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 1006 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 1007 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1008 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4 1009 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 1010 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[M_ADDR]], align 4 1011 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1012 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1013 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1014 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1015 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1016 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1017 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0 1018 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1019 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1020 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1021 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1022 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1023 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 1024 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4 1025 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1026 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1027 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1028 // CHECK11: land.lhs.true: 1029 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1030 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]] 1031 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1032 // CHECK11: omp.precond.then: 1033 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 1034 // CHECK11-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1035 // CHECK11-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8 1036 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1037 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1038 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1039 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1040 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1041 // CHECK11-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1042 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1043 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]] 1044 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1045 // CHECK11: cond.true: 1046 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1047 // CHECK11-NEXT: br label [[COND_END:%.*]] 1048 // CHECK11: cond.false: 1049 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1050 // CHECK11-NEXT: br label [[COND_END]] 1051 // CHECK11: cond.end: 1052 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1053 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 1054 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 1055 // CHECK11-NEXT: store i64 [[TMP16]], i64* [[DOTOMP_IV]], align 8 1056 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1057 // CHECK11: omp.inner.for.cond: 1058 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1059 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1060 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]] 1061 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1062 // CHECK11: omp.inner.for.body: 1063 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1064 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1065 // CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP20]], 0 1066 // CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1067 // CHECK11-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 1068 // CHECK11-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 1069 // CHECK11-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP19]], [[CONV18]] 1070 // CHECK11-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 1071 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 1072 // CHECK11-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 1073 // CHECK11-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4 1074 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1075 // CHECK11-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1076 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1077 // CHECK11-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP23]], 0 1078 // CHECK11-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 1079 // CHECK11-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 1080 // CHECK11-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 1081 // CHECK11-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP22]], [[CONV25]] 1082 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1083 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP24]], 0 1084 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 1085 // CHECK11-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 1086 // CHECK11-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 1087 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 1088 // CHECK11-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP21]], [[MUL31]] 1089 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 1090 // CHECK11-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 1091 // CHECK11-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 1092 // CHECK11-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4 1093 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I11]], align 4 1094 // CHECK11-NEXT: [[TMP26:%.*]] = mul nsw i32 [[TMP25]], [[TMP1]] 1095 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP26]] 1096 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[J12]], align 4 1097 // CHECK11-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP27]] 1098 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX36]], align 4 1099 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1100 // CHECK11: omp.body.continue: 1101 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1102 // CHECK11: omp.inner.for.inc: 1103 // CHECK11-NEXT: [[TMP28:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1104 // CHECK11-NEXT: [[ADD37:%.*]] = add nsw i64 [[TMP28]], 1 1105 // CHECK11-NEXT: store i64 [[ADD37]], i64* [[DOTOMP_IV]], align 8 1106 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1107 // CHECK11: omp.inner.for.end: 1108 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1109 // CHECK11: omp.loop.exit: 1110 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1111 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 1112 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 1113 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1114 // CHECK11: omp.precond.end: 1115 // CHECK11-NEXT: ret void 1116 // 1117 // 1118 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1119 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1120 // CHECK11-NEXT: entry: 1121 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1122 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1123 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1124 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1125 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1126 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1127 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1128 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1129 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1130 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 1131 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4 1132 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1133 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 1134 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4 1135 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1136 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 1137 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1138 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1139 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 20) 1140 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1141 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1142 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1143 // CHECK11: omp_offload.failed: 1144 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 1145 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1146 // CHECK11: omp_offload.cont: 1147 // CHECK11-NEXT: ret i32 0 1148 // 1149 // 1150 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67 1151 // CHECK11-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1152 // CHECK11-NEXT: entry: 1153 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 1154 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 1155 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 1156 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 1157 // CHECK11-NEXT: ret void 1158 // 1159 // 1160 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 1161 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1162 // CHECK11-NEXT: entry: 1163 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1164 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1165 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 1166 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1167 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1168 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1169 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1170 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1171 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1172 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1173 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1174 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1175 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1176 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1177 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 1178 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 1179 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1180 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 1181 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1182 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1183 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1184 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1185 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1186 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1187 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1188 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1189 // CHECK11: cond.true: 1190 // CHECK11-NEXT: br label [[COND_END:%.*]] 1191 // CHECK11: cond.false: 1192 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1193 // CHECK11-NEXT: br label [[COND_END]] 1194 // CHECK11: cond.end: 1195 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1196 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1197 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1198 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1199 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1200 // CHECK11: omp.inner.for.cond: 1201 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1202 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1203 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1204 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1205 // CHECK11: omp.inner.for.body: 1206 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1207 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 2 1208 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1209 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1210 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1211 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1212 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1213 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2 1214 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 1215 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 1216 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 1217 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 1218 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 1219 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1220 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP11]] 1221 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 1222 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP12]] 1223 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 1224 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1225 // CHECK11: omp.body.continue: 1226 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1227 // CHECK11: omp.inner.for.inc: 1228 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1229 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1 1230 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1231 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1232 // CHECK11: omp.inner.for.end: 1233 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1234 // CHECK11: omp.loop.exit: 1235 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1236 // CHECK11-NEXT: ret void 1237 // 1238 // 1239 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1240 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 1241 // CHECK11-NEXT: entry: 1242 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 1243 // CHECK11-NEXT: ret void 1244 // 1245