1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test host codegen. 3 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 5 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK2 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK4 9 10 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 17 // Test target codegen - host bc file has to be created first. 18 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK9 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK10 22 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK11 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK12 26 27 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 28 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 30 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 31 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 32 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 34 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 35 36 // Test host codegen. 37 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK17 38 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 39 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK18 40 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK19 41 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 42 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK20 43 44 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 45 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 46 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 47 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 48 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 49 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 50 51 // Test target codegen - host bc file has to be created first. 52 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 53 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK25 54 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 55 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK26 56 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 57 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK27 58 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 59 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK28 60 61 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 62 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 63 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 64 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 65 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 66 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 67 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 68 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 69 70 // expected-no-diagnostics 71 #ifndef HEADER 72 #define HEADER 73 74 75 76 77 // We have 8 target regions, but only 7 that actually will generate offloading 78 // code, only 6 will have mapped arguments, and only 4 have all-constant map 79 // sizes. 80 81 82 83 // Check target registration is registered as a Ctor. 84 85 86 template<typename tx, typename ty> 87 struct TT{ 88 tx X; 89 ty Y; 90 }; 91 92 int global; 93 94 int foo(int n) { 95 int a = 0; 96 short aa = 0; 97 float b[10]; 98 float bn[n]; 99 double c[5][10]; 100 double cn[5][n]; 101 TT<long long, char> d; 102 103 #pragma omp target teams distribute num_teams(a) thread_limit(a) firstprivate(aa) nowait 104 for (int i = 0; i < 10; ++i) { 105 } 106 107 #pragma omp target teams distribute if(target: 0) 108 for (int i = 0; i < 10; ++i) { 109 a += 1; 110 } 111 112 113 #pragma omp target teams distribute if(target: 1) 114 for (int i = 0; i < 10; ++i) { 115 aa += 1; 116 } 117 118 119 120 #pragma omp target teams distribute if(target: n>10) 121 for (int i = 0; i < 10; ++i) { 122 a += 1; 123 aa += 1; 124 } 125 126 // We capture 3 VLA sizes in this target region 127 128 129 130 131 132 // The names below are not necessarily consistent with the names used for the 133 // addresses above as some are repeated. 134 135 136 137 138 139 140 141 142 143 144 145 #pragma omp target teams distribute if(target: n>20) dist_schedule(static, n) 146 for (int i = 0; i < 10; ++i) { 147 a += 1; 148 b[2] += 1.0; 149 bn[3] += 1.0; 150 c[1][2] += 1.0; 151 cn[1][3] += 1.0; 152 d.X += 1; 153 d.Y += 1; 154 } 155 156 return a; 157 } 158 159 // Check that the offloading functions are emitted and that the arguments are 160 // correct and loaded correctly for the target regions in foo(). 161 162 163 164 165 // Create stack storage and store argument in there. 166 167 // Create stack storage and store argument in there. 168 169 // Create stack storage and store argument in there. 170 171 // Create local storage for each capture. 172 173 174 175 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. 176 177 template<typename tx> 178 tx ftemplate(int n) { 179 tx a = 0; 180 short aa = 0; 181 tx b[10]; 182 183 #pragma omp target teams distribute if(target: n>40) 184 for (int i = 0; i < 10; ++i) { 185 a += 1; 186 aa += 1; 187 b[2] += 1; 188 } 189 190 return a; 191 } 192 193 static 194 int fstatic(int n) { 195 int a = 0; 196 short aa = 0; 197 char aaa = 0; 198 int b[10]; 199 200 #pragma omp target teams distribute if(target: n>50) 201 for (int i = a; i < n; ++i) { 202 a += 1; 203 aa += 1; 204 aaa += 1; 205 b[2] += 1; 206 } 207 208 return a; 209 } 210 211 struct S1 { 212 double a; 213 214 int r1(int n){ 215 int b = n+1; 216 short int c[2][n]; 217 218 #pragma omp target teams distribute if(target: n>60) 219 for (int i = 0; i < 10; ++i) { 220 this->a = (double)b + 1.5; 221 c[1][1] = ++a; 222 } 223 224 return c[1][1] + (int)b; 225 } 226 }; 227 228 int bar(int n){ 229 int a = 0; 230 231 a += foo(n); 232 233 S1 S; 234 a += S.r1(n); 235 236 a += fstatic(n); 237 238 a += ftemplate<int>(n); 239 240 return a; 241 } 242 243 244 245 // We capture 2 VLA sizes in this target region 246 247 248 // The names below are not necessarily consistent with the names used for the 249 // addresses above as some are repeated. 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 // Check that the offloading functions are emitted and that the arguments are 272 // correct and loaded correctly for the target regions of the callees of bar(). 273 274 // Create local storage for each capture. 275 // Store captures in the context. 276 277 278 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. 279 280 281 // Create local storage for each capture. 282 // Store captures in the context. 283 284 285 286 287 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. 288 289 // Create local storage for each capture. 290 // Store captures in the context. 291 292 293 294 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. 295 296 #endif 297 // CHECK1-LABEL: define {{[^@]+}}@_Z3fooi 298 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 299 // CHECK1-NEXT: entry: 300 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 301 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 302 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 303 // CHECK1-NEXT: [[B:%.*]] = alloca [10 x float], align 4 304 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 305 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 306 // CHECK1-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 307 // CHECK1-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 308 // CHECK1-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8 309 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 310 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 311 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 312 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 313 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8 314 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 315 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 316 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 317 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 318 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 319 // CHECK1-NEXT: [[AA_CASTED7:%.*]] = alloca i64, align 8 320 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [1 x i8*], align 8 321 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [1 x i8*], align 8 322 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [1 x i8*], align 8 323 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 324 // CHECK1-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8 325 // CHECK1-NEXT: [[AA_CASTED14:%.*]] = alloca i64, align 8 326 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [2 x i8*], align 8 327 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [2 x i8*], align 8 328 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [2 x i8*], align 8 329 // CHECK1-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 330 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 331 // CHECK1-NEXT: [[A_CASTED23:%.*]] = alloca i64, align 8 332 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED25:%.*]] = alloca i64, align 8 333 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [10 x i8*], align 8 334 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [10 x i8*], align 8 335 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [10 x i8*], align 8 336 // CHECK1-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 8 337 // CHECK1-NEXT: [[_TMP32:%.*]] = alloca i32, align 4 338 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 339 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 340 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 341 // CHECK1-NEXT: store i16 0, i16* [[AA]], align 2 342 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 343 // CHECK1-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 344 // CHECK1-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 345 // CHECK1-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 346 // CHECK1-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4 347 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 348 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 349 // CHECK1-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 350 // CHECK1-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]] 351 // CHECK1-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8 352 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 353 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 354 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_]], align 4 355 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 356 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_2]], align 4 357 // CHECK1-NEXT: [[TMP9:%.*]] = load i16, i16* [[AA]], align 2 358 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 359 // CHECK1-NEXT: store i16 [[TMP9]], i16* [[CONV]], align 2 360 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[AA_CASTED]], align 8 361 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 362 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 363 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4 364 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 365 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 366 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32* 367 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[CONV5]], align 4 368 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8 369 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 370 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 371 // CHECK1-NEXT: store i64 [[TMP10]], i64* [[TMP16]], align 8 372 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 373 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 374 // CHECK1-NEXT: store i64 [[TMP10]], i64* [[TMP18]], align 8 375 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 376 // CHECK1-NEXT: store i8* null, i8** [[TMP19]], align 8 377 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 378 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 379 // CHECK1-NEXT: store i64 [[TMP12]], i64* [[TMP21]], align 8 380 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 381 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 382 // CHECK1-NEXT: store i64 [[TMP12]], i64* [[TMP23]], align 8 383 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 384 // CHECK1-NEXT: store i8* null, i8** [[TMP24]], align 8 385 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 386 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 387 // CHECK1-NEXT: store i64 [[TMP14]], i64* [[TMP26]], align 8 388 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 389 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 390 // CHECK1-NEXT: store i64 [[TMP14]], i64* [[TMP28]], align 8 391 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 392 // CHECK1-NEXT: store i8* null, i8** [[TMP29]], align 8 393 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 394 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 395 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0 396 // CHECK1-NEXT: [[TMP33:%.*]] = load i16, i16* [[AA]], align 2 397 // CHECK1-NEXT: store i16 [[TMP33]], i16* [[TMP32]], align 4 398 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1 399 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 400 // CHECK1-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4 401 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2 402 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 403 // CHECK1-NEXT: store i32 [[TMP37]], i32* [[TMP36]], align 4 404 // CHECK1-NEXT: [[TMP38:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i64 120, i64 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 405 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8* [[TMP38]] to %struct.kmp_task_t_with_privates* 406 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 0 407 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP40]], i32 0, i32 0 408 // CHECK1-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 8 409 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8* 410 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP42]], i8* align 4 [[TMP43]], i64 12, i1 false) 411 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 1 412 // CHECK1-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to %struct.anon* 413 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 0 414 // CHECK1-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8* 415 // CHECK1-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP30]] to i8* 416 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP47]], i8* align 8 [[TMP48]], i64 24, i1 false) 417 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 1 418 // CHECK1-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8* 419 // CHECK1-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP31]] to i8* 420 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP50]], i8* align 8 [[TMP51]], i64 24, i1 false) 421 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 2 422 // CHECK1-NEXT: [[TMP53:%.*]] = bitcast [3 x i64]* [[TMP52]] to i8* 423 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP53]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 424 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 3 425 // CHECK1-NEXT: [[TMP55:%.*]] = load i16, i16* [[AA]], align 2 426 // CHECK1-NEXT: store i16 [[TMP55]], i16* [[TMP54]], align 8 427 // CHECK1-NEXT: [[TMP56:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP38]]) 428 // CHECK1-NEXT: [[TMP57:%.*]] = load i32, i32* [[A]], align 4 429 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 430 // CHECK1-NEXT: store i32 [[TMP57]], i32* [[CONV6]], align 4 431 // CHECK1-NEXT: [[TMP58:%.*]] = load i64, i64* [[A_CASTED]], align 8 432 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i64 [[TMP58]]) #[[ATTR3:[0-9]+]] 433 // CHECK1-NEXT: [[TMP59:%.*]] = load i16, i16* [[AA]], align 2 434 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[AA_CASTED7]] to i16* 435 // CHECK1-NEXT: store i16 [[TMP59]], i16* [[CONV8]], align 2 436 // CHECK1-NEXT: [[TMP60:%.*]] = load i64, i64* [[AA_CASTED7]], align 8 437 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 438 // CHECK1-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64* 439 // CHECK1-NEXT: store i64 [[TMP60]], i64* [[TMP62]], align 8 440 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 441 // CHECK1-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64* 442 // CHECK1-NEXT: store i64 [[TMP60]], i64* [[TMP64]], align 8 443 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0 444 // CHECK1-NEXT: store i8* null, i8** [[TMP65]], align 8 445 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 446 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 447 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 448 // CHECK1-NEXT: [[TMP68:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP66]], i8** [[TMP67]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 449 // CHECK1-NEXT: [[TMP69:%.*]] = icmp ne i32 [[TMP68]], 0 450 // CHECK1-NEXT: br i1 [[TMP69]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 451 // CHECK1: omp_offload.failed: 452 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i64 [[TMP60]]) #[[ATTR3]] 453 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 454 // CHECK1: omp_offload.cont: 455 // CHECK1-NEXT: [[TMP70:%.*]] = load i32, i32* [[A]], align 4 456 // CHECK1-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32* 457 // CHECK1-NEXT: store i32 [[TMP70]], i32* [[CONV13]], align 4 458 // CHECK1-NEXT: [[TMP71:%.*]] = load i64, i64* [[A_CASTED12]], align 8 459 // CHECK1-NEXT: [[TMP72:%.*]] = load i16, i16* [[AA]], align 2 460 // CHECK1-NEXT: [[CONV15:%.*]] = bitcast i64* [[AA_CASTED14]] to i16* 461 // CHECK1-NEXT: store i16 [[TMP72]], i16* [[CONV15]], align 2 462 // CHECK1-NEXT: [[TMP73:%.*]] = load i64, i64* [[AA_CASTED14]], align 8 463 // CHECK1-NEXT: [[TMP74:%.*]] = load i32, i32* [[N_ADDR]], align 4 464 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP74]], 10 465 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 466 // CHECK1: omp_if.then: 467 // CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 468 // CHECK1-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 469 // CHECK1-NEXT: store i64 [[TMP71]], i64* [[TMP76]], align 8 470 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 471 // CHECK1-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64* 472 // CHECK1-NEXT: store i64 [[TMP71]], i64* [[TMP78]], align 8 473 // CHECK1-NEXT: [[TMP79:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0 474 // CHECK1-NEXT: store i8* null, i8** [[TMP79]], align 8 475 // CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1 476 // CHECK1-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 477 // CHECK1-NEXT: store i64 [[TMP73]], i64* [[TMP81]], align 8 478 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1 479 // CHECK1-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* 480 // CHECK1-NEXT: store i64 [[TMP73]], i64* [[TMP83]], align 8 481 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1 482 // CHECK1-NEXT: store i8* null, i8** [[TMP84]], align 8 483 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 484 // CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 485 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 486 // CHECK1-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP85]], i8** [[TMP86]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 487 // CHECK1-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0 488 // CHECK1-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 489 // CHECK1: omp_offload.failed20: 490 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]] 491 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT21]] 492 // CHECK1: omp_offload.cont21: 493 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 494 // CHECK1: omp_if.else: 495 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]] 496 // CHECK1-NEXT: br label [[OMP_IF_END]] 497 // CHECK1: omp_if.end: 498 // CHECK1-NEXT: [[TMP89:%.*]] = load i32, i32* [[N_ADDR]], align 4 499 // CHECK1-NEXT: store i32 [[TMP89]], i32* [[DOTCAPTURE_EXPR_22]], align 4 500 // CHECK1-NEXT: [[TMP90:%.*]] = load i32, i32* [[A]], align 4 501 // CHECK1-NEXT: [[CONV24:%.*]] = bitcast i64* [[A_CASTED23]] to i32* 502 // CHECK1-NEXT: store i32 [[TMP90]], i32* [[CONV24]], align 4 503 // CHECK1-NEXT: [[TMP91:%.*]] = load i64, i64* [[A_CASTED23]], align 8 504 // CHECK1-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4 505 // CHECK1-NEXT: [[CONV26:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED25]] to i32* 506 // CHECK1-NEXT: store i32 [[TMP92]], i32* [[CONV26]], align 4 507 // CHECK1-NEXT: [[TMP93:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED25]], align 8 508 // CHECK1-NEXT: [[TMP94:%.*]] = load i32, i32* [[N_ADDR]], align 4 509 // CHECK1-NEXT: [[CMP27:%.*]] = icmp sgt i32 [[TMP94]], 20 510 // CHECK1-NEXT: br i1 [[CMP27]], label [[OMP_IF_THEN28:%.*]], label [[OMP_IF_ELSE35:%.*]] 511 // CHECK1: omp_if.then28: 512 // CHECK1-NEXT: [[TMP95:%.*]] = mul nuw i64 [[TMP2]], 4 513 // CHECK1-NEXT: [[TMP96:%.*]] = mul nuw i64 5, [[TMP5]] 514 // CHECK1-NEXT: [[TMP97:%.*]] = mul nuw i64 [[TMP96]], 8 515 // CHECK1-NEXT: [[TMP98:%.*]] = bitcast [10 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 516 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP98]], i8* align 8 bitcast ([10 x i64]* @.offload_sizes.10 to i8*), i64 80, i1 false) 517 // CHECK1-NEXT: [[TMP99:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 518 // CHECK1-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to i64* 519 // CHECK1-NEXT: store i64 [[TMP91]], i64* [[TMP100]], align 8 520 // CHECK1-NEXT: [[TMP101:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 521 // CHECK1-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i64* 522 // CHECK1-NEXT: store i64 [[TMP91]], i64* [[TMP102]], align 8 523 // CHECK1-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0 524 // CHECK1-NEXT: store i8* null, i8** [[TMP103]], align 8 525 // CHECK1-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 1 526 // CHECK1-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]** 527 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 8 528 // CHECK1-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 1 529 // CHECK1-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]** 530 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 8 531 // CHECK1-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 1 532 // CHECK1-NEXT: store i8* null, i8** [[TMP108]], align 8 533 // CHECK1-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 2 534 // CHECK1-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i64* 535 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP110]], align 8 536 // CHECK1-NEXT: [[TMP111:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 2 537 // CHECK1-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64* 538 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP112]], align 8 539 // CHECK1-NEXT: [[TMP113:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 2 540 // CHECK1-NEXT: store i8* null, i8** [[TMP113]], align 8 541 // CHECK1-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 3 542 // CHECK1-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to float** 543 // CHECK1-NEXT: store float* [[VLA]], float** [[TMP115]], align 8 544 // CHECK1-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 3 545 // CHECK1-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float** 546 // CHECK1-NEXT: store float* [[VLA]], float** [[TMP117]], align 8 547 // CHECK1-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 548 // CHECK1-NEXT: store i64 [[TMP95]], i64* [[TMP118]], align 8 549 // CHECK1-NEXT: [[TMP119:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 3 550 // CHECK1-NEXT: store i8* null, i8** [[TMP119]], align 8 551 // CHECK1-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 4 552 // CHECK1-NEXT: [[TMP121:%.*]] = bitcast i8** [[TMP120]] to [5 x [10 x double]]** 553 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP121]], align 8 554 // CHECK1-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 4 555 // CHECK1-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]** 556 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 8 557 // CHECK1-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 4 558 // CHECK1-NEXT: store i8* null, i8** [[TMP124]], align 8 559 // CHECK1-NEXT: [[TMP125:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 5 560 // CHECK1-NEXT: [[TMP126:%.*]] = bitcast i8** [[TMP125]] to i64* 561 // CHECK1-NEXT: store i64 5, i64* [[TMP126]], align 8 562 // CHECK1-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 5 563 // CHECK1-NEXT: [[TMP128:%.*]] = bitcast i8** [[TMP127]] to i64* 564 // CHECK1-NEXT: store i64 5, i64* [[TMP128]], align 8 565 // CHECK1-NEXT: [[TMP129:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 5 566 // CHECK1-NEXT: store i8* null, i8** [[TMP129]], align 8 567 // CHECK1-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 6 568 // CHECK1-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i64* 569 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP131]], align 8 570 // CHECK1-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 6 571 // CHECK1-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i64* 572 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP133]], align 8 573 // CHECK1-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 6 574 // CHECK1-NEXT: store i8* null, i8** [[TMP134]], align 8 575 // CHECK1-NEXT: [[TMP135:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 7 576 // CHECK1-NEXT: [[TMP136:%.*]] = bitcast i8** [[TMP135]] to double** 577 // CHECK1-NEXT: store double* [[VLA1]], double** [[TMP136]], align 8 578 // CHECK1-NEXT: [[TMP137:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 7 579 // CHECK1-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to double** 580 // CHECK1-NEXT: store double* [[VLA1]], double** [[TMP138]], align 8 581 // CHECK1-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 582 // CHECK1-NEXT: store i64 [[TMP97]], i64* [[TMP139]], align 8 583 // CHECK1-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 7 584 // CHECK1-NEXT: store i8* null, i8** [[TMP140]], align 8 585 // CHECK1-NEXT: [[TMP141:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 8 586 // CHECK1-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to %struct.TT** 587 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP142]], align 8 588 // CHECK1-NEXT: [[TMP143:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 8 589 // CHECK1-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to %struct.TT** 590 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP144]], align 8 591 // CHECK1-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 8 592 // CHECK1-NEXT: store i8* null, i8** [[TMP145]], align 8 593 // CHECK1-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 9 594 // CHECK1-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64* 595 // CHECK1-NEXT: store i64 [[TMP93]], i64* [[TMP147]], align 8 596 // CHECK1-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 9 597 // CHECK1-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 598 // CHECK1-NEXT: store i64 [[TMP93]], i64* [[TMP149]], align 8 599 // CHECK1-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 9 600 // CHECK1-NEXT: store i8* null, i8** [[TMP150]], align 8 601 // CHECK1-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 602 // CHECK1-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 603 // CHECK1-NEXT: [[TMP153:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 604 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 605 // CHECK1-NEXT: [[TMP154:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP151]], i8** [[TMP152]], i64* [[TMP153]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 606 // CHECK1-NEXT: [[TMP155:%.*]] = icmp ne i32 [[TMP154]], 0 607 // CHECK1-NEXT: br i1 [[TMP155]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 608 // CHECK1: omp_offload.failed33: 609 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]] 610 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT34]] 611 // CHECK1: omp_offload.cont34: 612 // CHECK1-NEXT: br label [[OMP_IF_END36:%.*]] 613 // CHECK1: omp_if.else35: 614 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]] 615 // CHECK1-NEXT: br label [[OMP_IF_END36]] 616 // CHECK1: omp_if.end36: 617 // CHECK1-NEXT: [[TMP156:%.*]] = load i32, i32* [[A]], align 4 618 // CHECK1-NEXT: [[TMP157:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 619 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP157]]) 620 // CHECK1-NEXT: ret i32 [[TMP156]] 621 // 622 // 623 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 624 // CHECK1-SAME: (i64 noundef [[AA:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] { 625 // CHECK1-NEXT: entry: 626 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 627 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 628 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 629 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 630 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 631 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 632 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 633 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 634 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 635 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 636 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 637 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 4 638 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 4 639 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 640 // CHECK1-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 641 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 642 // CHECK1-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2 643 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 644 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]]) 645 // CHECK1-NEXT: ret void 646 // 647 // 648 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 649 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 650 // CHECK1-NEXT: entry: 651 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 652 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 653 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 654 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 655 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 656 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 657 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 658 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 659 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 660 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 661 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 662 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 663 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 664 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 665 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 666 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 667 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 668 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 669 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 670 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 671 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 672 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 673 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 674 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 675 // CHECK1: cond.true: 676 // CHECK1-NEXT: br label [[COND_END:%.*]] 677 // CHECK1: cond.false: 678 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 679 // CHECK1-NEXT: br label [[COND_END]] 680 // CHECK1: cond.end: 681 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 682 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 683 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 684 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 685 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 686 // CHECK1: omp.inner.for.cond: 687 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 688 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 689 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 690 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 691 // CHECK1: omp.inner.for.body: 692 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 693 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 694 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 695 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 696 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 697 // CHECK1: omp.body.continue: 698 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 699 // CHECK1: omp.inner.for.inc: 700 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 701 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 702 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 703 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 704 // CHECK1: omp.inner.for.end: 705 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 706 // CHECK1: omp.loop.exit: 707 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 708 // CHECK1-NEXT: ret void 709 // 710 // 711 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map. 712 // CHECK1-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i16** noalias noundef [[TMP1:%.*]], [3 x i8*]** noalias noundef [[TMP2:%.*]], [3 x i8*]** noalias noundef [[TMP3:%.*]], [3 x i64]** noalias noundef [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] { 713 // CHECK1-NEXT: entry: 714 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 715 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 8 716 // CHECK1-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 8 717 // CHECK1-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 8 718 // CHECK1-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 8 719 // CHECK1-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 720 // CHECK1-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 8 721 // CHECK1-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 8 722 // CHECK1-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 8 723 // CHECK1-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 8 724 // CHECK1-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 725 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0 726 // CHECK1-NEXT: [[TMP7:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 8 727 // CHECK1-NEXT: store [3 x i8*]* [[TMP6]], [3 x i8*]** [[TMP7]], align 8 728 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1 729 // CHECK1-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 8 730 // CHECK1-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 8 731 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2 732 // CHECK1-NEXT: [[TMP11:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 8 733 // CHECK1-NEXT: store [3 x i64]* [[TMP10]], [3 x i64]** [[TMP11]], align 8 734 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3 735 // CHECK1-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 8 736 // CHECK1-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 8 737 // CHECK1-NEXT: ret void 738 // 739 // 740 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry. 741 // CHECK1-SAME: (i32 noundef signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] { 742 // CHECK1-NEXT: entry: 743 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 744 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 745 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 746 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 747 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 748 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8 749 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 8 750 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 8 751 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 8 752 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 8 753 // CHECK1-NEXT: [[AA_CASTED_I:%.*]] = alloca i64, align 8 754 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i64, align 8 755 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED5_I:%.*]] = alloca i64, align 8 756 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 757 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 758 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 759 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 760 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 761 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 762 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 763 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 764 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 765 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 766 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 767 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1 768 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 769 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 770 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 771 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]]) 772 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]]) 773 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]]) 774 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21 775 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21 776 // CHECK1-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 777 // CHECK1-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 778 // CHECK1-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21 779 // CHECK1-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 780 // CHECK1-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 781 // CHECK1-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 782 // CHECK1-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 783 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* 784 // CHECK1-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]] 785 // CHECK1-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !21 786 // CHECK1-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !21 787 // CHECK1-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias !21 788 // CHECK1-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias !21 789 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i64 0, i64 0 790 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i64 0, i64 0 791 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i64 0, i64 0 792 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1 793 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2 794 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4 795 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4 796 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]] 797 // CHECK1-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]] 798 // CHECK1-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 799 // CHECK1-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 800 // CHECK1: omp_offload.failed.i: 801 // CHECK1-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2 802 // CHECK1-NEXT: [[CONV_I:%.*]] = bitcast i64* [[AA_CASTED_I]] to i16* 803 // CHECK1-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !21 804 // CHECK1-NEXT: [[TMP30:%.*]] = load i64, i64* [[AA_CASTED_I]], align 8, !noalias !21 805 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4 806 // CHECK1-NEXT: [[CONV4_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED_I]] to i32* 807 // CHECK1-NEXT: store i32 [[TMP31]], i32* [[CONV4_I]], align 4, !noalias !21 808 // CHECK1-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED_I]], align 8, !noalias !21 809 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4 810 // CHECK1-NEXT: [[CONV6_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED5_I]] to i32* 811 // CHECK1-NEXT: store i32 [[TMP33]], i32* [[CONV6_I]], align 4, !noalias !21 812 // CHECK1-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED5_I]], align 8, !noalias !21 813 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i64 [[TMP30]], i64 [[TMP32]], i64 [[TMP34]]) #[[ATTR3]] 814 // CHECK1-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 815 // CHECK1: .omp_outlined..1.exit: 816 // CHECK1-NEXT: ret i32 0 817 // 818 // 819 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107 820 // CHECK1-SAME: (i64 noundef [[A:%.*]]) #[[ATTR2]] { 821 // CHECK1-NEXT: entry: 822 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 823 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 824 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 825 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 826 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 827 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32* 828 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4 829 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 830 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 831 // CHECK1-NEXT: ret void 832 // 833 // 834 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 835 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR2]] { 836 // CHECK1-NEXT: entry: 837 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 838 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 839 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 840 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 841 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 842 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 843 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 844 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 845 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 846 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 847 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 848 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 849 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 850 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 851 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 852 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 853 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 854 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 855 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 856 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 857 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 858 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 859 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 860 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 861 // CHECK1: cond.true: 862 // CHECK1-NEXT: br label [[COND_END:%.*]] 863 // CHECK1: cond.false: 864 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 865 // CHECK1-NEXT: br label [[COND_END]] 866 // CHECK1: cond.end: 867 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 868 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 869 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 870 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 871 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 872 // CHECK1: omp.inner.for.cond: 873 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 874 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 875 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 876 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 877 // CHECK1: omp.inner.for.body: 878 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 879 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 880 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 881 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 882 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 883 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 884 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[CONV]], align 4 885 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 886 // CHECK1: omp.body.continue: 887 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 888 // CHECK1: omp.inner.for.inc: 889 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 890 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 891 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 892 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 893 // CHECK1: omp.inner.for.end: 894 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 895 // CHECK1: omp.loop.exit: 896 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 897 // CHECK1-NEXT: ret void 898 // 899 // 900 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 901 // CHECK1-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR2]] { 902 // CHECK1-NEXT: entry: 903 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 904 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 905 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 906 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 907 // CHECK1-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 908 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 909 // CHECK1-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 910 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8 911 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 912 // CHECK1-NEXT: ret void 913 // 914 // 915 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 916 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 917 // CHECK1-NEXT: entry: 918 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 919 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 920 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 921 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 922 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 923 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 924 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 925 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 926 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 927 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 928 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 929 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 930 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 931 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 932 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 933 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 934 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 935 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 936 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 937 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 938 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 939 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 940 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 941 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 942 // CHECK1: cond.true: 943 // CHECK1-NEXT: br label [[COND_END:%.*]] 944 // CHECK1: cond.false: 945 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 946 // CHECK1-NEXT: br label [[COND_END]] 947 // CHECK1: cond.end: 948 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 949 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 950 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 951 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 952 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 953 // CHECK1: omp.inner.for.cond: 954 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 955 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 956 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 957 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 958 // CHECK1: omp.inner.for.body: 959 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 960 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 961 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 962 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 963 // CHECK1-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 964 // CHECK1-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 965 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 966 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 967 // CHECK1-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 968 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 969 // CHECK1: omp.body.continue: 970 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 971 // CHECK1: omp.inner.for.inc: 972 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 973 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 974 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 975 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 976 // CHECK1: omp.inner.for.end: 977 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 978 // CHECK1: omp.loop.exit: 979 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 980 // CHECK1-NEXT: ret void 981 // 982 // 983 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 984 // CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 985 // CHECK1-NEXT: entry: 986 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 987 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 988 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 989 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 990 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 991 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 992 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 993 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 994 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 995 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 996 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4 997 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 998 // CHECK1-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 2 999 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 1000 // CHECK1-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2 1001 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 1002 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]]) 1003 // CHECK1-NEXT: ret void 1004 // 1005 // 1006 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 1007 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 1008 // CHECK1-NEXT: entry: 1009 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1010 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1011 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1012 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 1013 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1014 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1015 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1016 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1017 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1018 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1019 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1020 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1021 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1022 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1023 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 1024 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1025 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 1026 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1027 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1028 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1029 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1030 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1031 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1032 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1033 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1034 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 1035 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1036 // CHECK1: cond.true: 1037 // CHECK1-NEXT: br label [[COND_END:%.*]] 1038 // CHECK1: cond.false: 1039 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1040 // CHECK1-NEXT: br label [[COND_END]] 1041 // CHECK1: cond.end: 1042 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1043 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1044 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1045 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1046 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1047 // CHECK1: omp.inner.for.cond: 1048 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1049 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1050 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1051 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1052 // CHECK1: omp.inner.for.body: 1053 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1054 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1055 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1056 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1057 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 1058 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 1059 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 1060 // CHECK1-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 2 1061 // CHECK1-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32 1062 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 1063 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 1064 // CHECK1-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 1065 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1066 // CHECK1: omp.body.continue: 1067 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1068 // CHECK1: omp.inner.for.inc: 1069 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1070 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1 1071 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 1072 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1073 // CHECK1: omp.inner.for.end: 1074 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1075 // CHECK1: omp.loop.exit: 1076 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1077 // CHECK1-NEXT: ret void 1078 // 1079 // 1080 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 1081 // CHECK1-SAME: (i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1082 // CHECK1-NEXT: entry: 1083 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1084 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 1085 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1086 // CHECK1-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 1087 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 1088 // CHECK1-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1089 // CHECK1-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 1090 // CHECK1-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 1091 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 1092 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1093 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1094 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1095 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1096 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 1097 // CHECK1-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1098 // CHECK1-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 1099 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 1100 // CHECK1-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1101 // CHECK1-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 1102 // CHECK1-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 1103 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 1104 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1105 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1106 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 1107 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1108 // CHECK1-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 1109 // CHECK1-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 1110 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1111 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 1112 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 1113 // CHECK1-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 1114 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1115 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 1116 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 1117 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4 1118 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8 1119 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 4 1120 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1121 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4 1122 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1123 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]]) 1124 // CHECK1-NEXT: ret void 1125 // 1126 // 1127 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 1128 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1129 // CHECK1-NEXT: entry: 1130 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1131 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1132 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1133 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 1134 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1135 // CHECK1-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 1136 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 1137 // CHECK1-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1138 // CHECK1-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 1139 // CHECK1-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 1140 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 1141 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1142 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1143 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1144 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1145 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1146 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1147 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1148 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1149 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1150 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1151 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1152 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 1153 // CHECK1-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1154 // CHECK1-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 1155 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 1156 // CHECK1-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1157 // CHECK1-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 1158 // CHECK1-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 1159 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 1160 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1161 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1162 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 1163 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1164 // CHECK1-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 1165 // CHECK1-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 1166 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1167 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 1168 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 1169 // CHECK1-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 1170 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1171 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1172 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1173 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1174 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1175 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 4 1176 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1177 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1178 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 1179 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1180 // CHECK1: omp.dispatch.cond: 1181 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1182 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 1183 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1184 // CHECK1: cond.true: 1185 // CHECK1-NEXT: br label [[COND_END:%.*]] 1186 // CHECK1: cond.false: 1187 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1188 // CHECK1-NEXT: br label [[COND_END]] 1189 // CHECK1: cond.end: 1190 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1191 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1192 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1193 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1194 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1195 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1196 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1197 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1198 // CHECK1: omp.dispatch.body: 1199 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1200 // CHECK1: omp.inner.for.cond: 1201 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 1202 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 1203 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 1204 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1205 // CHECK1: omp.inner.for.body: 1206 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 1207 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1208 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1209 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 1210 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !22 1211 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 1212 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group !22 1213 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2 1214 // CHECK1-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !22 1215 // CHECK1-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double 1216 // CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00 1217 // CHECK1-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float 1218 // CHECK1-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !22 1219 // CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3 1220 // CHECK1-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !22 1221 // CHECK1-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double 1222 // CHECK1-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00 1223 // CHECK1-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float 1224 // CHECK1-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !22 1225 // CHECK1-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1 1226 // CHECK1-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2 1227 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !22 1228 // CHECK1-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00 1229 // CHECK1-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !22 1230 // CHECK1-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]] 1231 // CHECK1-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]] 1232 // CHECK1-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3 1233 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !22 1234 // CHECK1-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00 1235 // CHECK1-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !22 1236 // CHECK1-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 1237 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !22 1238 // CHECK1-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1 1239 // CHECK1-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !22 1240 // CHECK1-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 1241 // CHECK1-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !22 1242 // CHECK1-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32 1243 // CHECK1-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1 1244 // CHECK1-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8 1245 // CHECK1-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !22 1246 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1247 // CHECK1: omp.body.continue: 1248 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1249 // CHECK1: omp.inner.for.inc: 1250 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 1251 // CHECK1-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1 1252 // CHECK1-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 1253 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 1254 // CHECK1: omp.inner.for.end: 1255 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1256 // CHECK1: omp.dispatch.inc: 1257 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1258 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1259 // CHECK1-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 1260 // CHECK1-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4 1261 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1262 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1263 // CHECK1-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 1264 // CHECK1-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4 1265 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 1266 // CHECK1: omp.dispatch.end: 1267 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 1268 // CHECK1-NEXT: ret void 1269 // 1270 // 1271 // CHECK1-LABEL: define {{[^@]+}}@_Z3bari 1272 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 1273 // CHECK1-NEXT: entry: 1274 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1275 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 1276 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 1277 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1278 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1279 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1280 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z3fooi(i32 noundef signext [[TMP0]]) 1281 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 1282 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 1283 // CHECK1-NEXT: store i32 [[ADD]], i32* [[A]], align 4 1284 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 1285 // CHECK1-NEXT: [[CALL1:%.*]] = call noundef signext i32 @_ZN2S12r1Ei(%struct.S1* noundef nonnull align 8 dereferenceable(8) [[S]], i32 noundef signext [[TMP2]]) 1286 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 1287 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 1288 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 1289 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 1290 // CHECK1-NEXT: [[CALL3:%.*]] = call noundef signext i32 @_ZL7fstatici(i32 noundef signext [[TMP4]]) 1291 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 1292 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 1293 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 1294 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 1295 // CHECK1-NEXT: [[CALL5:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_i(i32 noundef signext [[TMP6]]) 1296 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 1297 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 1298 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 1299 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 1300 // CHECK1-NEXT: ret i32 [[TMP8]] 1301 // 1302 // 1303 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 1304 // CHECK1-SAME: (%struct.S1* noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat align 2 { 1305 // CHECK1-NEXT: entry: 1306 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1307 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1308 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 1309 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1310 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1311 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 1312 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1313 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1314 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1315 // CHECK1-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 1316 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1317 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1318 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1319 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1320 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1321 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 1322 // CHECK1-NEXT: store i32 [[ADD]], i32* [[B]], align 4 1323 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1324 // CHECK1-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 1325 // CHECK1-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 1326 // CHECK1-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 1327 // CHECK1-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]] 1328 // CHECK1-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2 1329 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 1330 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 1331 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32* 1332 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4 1333 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8 1334 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4 1335 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60 1336 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1337 // CHECK1: omp_if.then: 1338 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 1339 // CHECK1-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]] 1340 // CHECK1-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2 1341 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1342 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP10]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes.13 to i8*), i64 40, i1 false) 1343 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1344 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to %struct.S1** 1345 // CHECK1-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP12]], align 8 1346 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1347 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to double** 1348 // CHECK1-NEXT: store double* [[A]], double** [[TMP14]], align 8 1349 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1350 // CHECK1-NEXT: store i8* null, i8** [[TMP15]], align 8 1351 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1352 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 1353 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8 1354 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1355 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 1356 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8 1357 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1358 // CHECK1-NEXT: store i8* null, i8** [[TMP20]], align 8 1359 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1360 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64* 1361 // CHECK1-NEXT: store i64 2, i64* [[TMP22]], align 8 1362 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1363 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64* 1364 // CHECK1-NEXT: store i64 2, i64* [[TMP24]], align 8 1365 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1366 // CHECK1-NEXT: store i8* null, i8** [[TMP25]], align 8 1367 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1368 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 1369 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP27]], align 8 1370 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1371 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 1372 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8 1373 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1374 // CHECK1-NEXT: store i8* null, i8** [[TMP30]], align 8 1375 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1376 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i16** 1377 // CHECK1-NEXT: store i16* [[VLA]], i16** [[TMP32]], align 8 1378 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1379 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i16** 1380 // CHECK1-NEXT: store i16* [[VLA]], i16** [[TMP34]], align 8 1381 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 1382 // CHECK1-NEXT: store i64 [[TMP9]], i64* [[TMP35]], align 8 1383 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1384 // CHECK1-NEXT: store i8* null, i8** [[TMP36]], align 8 1385 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1386 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1387 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1388 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1389 // CHECK1-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP37]], i8** [[TMP38]], i64* [[TMP39]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.14, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1390 // CHECK1-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 1391 // CHECK1-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1392 // CHECK1: omp_offload.failed: 1393 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 1394 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 1395 // CHECK1: omp_offload.cont: 1396 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1397 // CHECK1: omp_if.else: 1398 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 1399 // CHECK1-NEXT: br label [[OMP_IF_END]] 1400 // CHECK1: omp_if.end: 1401 // CHECK1-NEXT: [[TMP42:%.*]] = mul nsw i64 1, [[TMP2]] 1402 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP42]] 1403 // CHECK1-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 1404 // CHECK1-NEXT: [[TMP43:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 1405 // CHECK1-NEXT: [[CONV3:%.*]] = sext i16 [[TMP43]] to i32 1406 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[B]], align 4 1407 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP44]] 1408 // CHECK1-NEXT: [[TMP45:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1409 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP45]]) 1410 // CHECK1-NEXT: ret i32 [[ADD4]] 1411 // 1412 // 1413 // CHECK1-LABEL: define {{[^@]+}}@_ZL7fstatici 1414 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 1415 // CHECK1-NEXT: entry: 1416 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1417 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 1418 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 1419 // CHECK1-NEXT: [[AAA:%.*]] = alloca i8, align 1 1420 // CHECK1-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 1421 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1422 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1423 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 1424 // CHECK1-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 1425 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1426 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1427 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1428 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1429 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1430 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1431 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 1432 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1433 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1434 // CHECK1-NEXT: store i16 0, i16* [[AA]], align 2 1435 // CHECK1-NEXT: store i8 0, i8* [[AAA]], align 1 1436 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1437 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1438 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 1439 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8 1440 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 1441 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32* 1442 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 1443 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[A_CASTED]], align 8 1444 // CHECK1-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2 1445 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 1446 // CHECK1-NEXT: store i16 [[TMP4]], i16* [[CONV2]], align 2 1447 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[AA_CASTED]], align 8 1448 // CHECK1-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1 1449 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 1450 // CHECK1-NEXT: store i8 [[TMP6]], i8* [[CONV3]], align 1 1451 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 1452 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4 1453 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50 1454 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1455 // CHECK1: omp_if.then: 1456 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1457 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1458 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 1459 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1460 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 1461 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8 1462 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1463 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 1464 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1465 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1466 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 1467 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1468 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 1469 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP17]], align 8 1470 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1471 // CHECK1-NEXT: store i8* null, i8** [[TMP18]], align 8 1472 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1473 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 1474 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8 1475 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1476 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64* 1477 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 1478 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1479 // CHECK1-NEXT: store i8* null, i8** [[TMP23]], align 8 1480 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1481 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 1482 // CHECK1-NEXT: store i64 [[TMP7]], i64* [[TMP25]], align 8 1483 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1484 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 1485 // CHECK1-NEXT: store i64 [[TMP7]], i64* [[TMP27]], align 8 1486 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1487 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8 1488 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1489 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]** 1490 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 8 1491 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1492 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]** 1493 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 8 1494 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1495 // CHECK1-NEXT: store i8* null, i8** [[TMP33]], align 8 1496 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1497 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1498 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4 1499 // CHECK1-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4 1500 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 1501 // CHECK1-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1502 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1503 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1504 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]] 1505 // CHECK1-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 1506 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 1507 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 1508 // CHECK1-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 1509 // CHECK1-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 1510 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 1511 // CHECK1-NEXT: [[ADD8:%.*]] = add i32 [[TMP40]], 1 1512 // CHECK1-NEXT: [[TMP41:%.*]] = zext i32 [[ADD8]] to i64 1513 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]]) 1514 // CHECK1-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1515 // CHECK1-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 1516 // CHECK1-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1517 // CHECK1: omp_offload.failed: 1518 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 1519 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 1520 // CHECK1: omp_offload.cont: 1521 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1522 // CHECK1: omp_if.else: 1523 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 1524 // CHECK1-NEXT: br label [[OMP_IF_END]] 1525 // CHECK1: omp_if.end: 1526 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4 1527 // CHECK1-NEXT: ret i32 [[TMP44]] 1528 // 1529 // 1530 // CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 1531 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat { 1532 // CHECK1-NEXT: entry: 1533 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1534 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 1535 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 1536 // CHECK1-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 1537 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1538 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 1539 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 1540 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 1541 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 1542 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1543 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1544 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1545 // CHECK1-NEXT: store i16 0, i16* [[AA]], align 2 1546 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 1547 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 1548 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 1549 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 1550 // CHECK1-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 1551 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 1552 // CHECK1-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 1553 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 1554 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 1555 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 1556 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1557 // CHECK1: omp_if.then: 1558 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1559 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 1560 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 1561 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1562 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1563 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 1564 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1565 // CHECK1-NEXT: store i8* null, i8** [[TMP9]], align 8 1566 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1567 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 1568 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 1569 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1570 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1571 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 1572 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1573 // CHECK1-NEXT: store i8* null, i8** [[TMP14]], align 8 1574 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1575 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 1576 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8 1577 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1578 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 1579 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8 1580 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1581 // CHECK1-NEXT: store i8* null, i8** [[TMP19]], align 8 1582 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1583 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1584 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1585 // CHECK1-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1586 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1587 // CHECK1-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1588 // CHECK1: omp_offload.failed: 1589 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 1590 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 1591 // CHECK1: omp_offload.cont: 1592 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1593 // CHECK1: omp_if.else: 1594 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 1595 // CHECK1-NEXT: br label [[OMP_IF_END]] 1596 // CHECK1: omp_if.end: 1597 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 1598 // CHECK1-NEXT: ret i32 [[TMP24]] 1599 // 1600 // 1601 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 1602 // CHECK1-SAME: (%struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 1603 // CHECK1-NEXT: entry: 1604 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1605 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1606 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1607 // CHECK1-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1608 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 1609 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 1610 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1611 // CHECK1-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 1612 // CHECK1-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1613 // CHECK1-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1614 // CHECK1-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 1615 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1616 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 1617 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1618 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1619 // CHECK1-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 1620 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 1621 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32* 1622 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 1623 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8 1624 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..12 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]]) 1625 // CHECK1-NEXT: ret void 1626 // 1627 // 1628 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12 1629 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 1630 // CHECK1-NEXT: entry: 1631 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1632 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1633 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1634 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1635 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1636 // CHECK1-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1637 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 1638 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1639 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1640 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1641 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1642 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1643 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1644 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1645 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1646 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1647 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1648 // CHECK1-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 1649 // CHECK1-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1650 // CHECK1-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1651 // CHECK1-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 1652 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1653 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 1654 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1655 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1656 // CHECK1-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 1657 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1658 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1659 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1660 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1661 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1662 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1663 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1664 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1665 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 1666 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1667 // CHECK1: cond.true: 1668 // CHECK1-NEXT: br label [[COND_END:%.*]] 1669 // CHECK1: cond.false: 1670 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1671 // CHECK1-NEXT: br label [[COND_END]] 1672 // CHECK1: cond.end: 1673 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1674 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1675 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1676 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1677 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1678 // CHECK1: omp.inner.for.cond: 1679 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1680 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1681 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1682 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1683 // CHECK1: omp.inner.for.body: 1684 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1685 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1686 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1687 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1688 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 1689 // CHECK1-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double 1690 // CHECK1-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00 1691 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 1692 // CHECK1-NEXT: store double [[ADD5]], double* [[A]], align 8 1693 // CHECK1-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 1694 // CHECK1-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8 1695 // CHECK1-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 1696 // CHECK1-NEXT: store double [[INC]], double* [[A6]], align 8 1697 // CHECK1-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16 1698 // CHECK1-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]] 1699 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]] 1700 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 1701 // CHECK1-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2 1702 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1703 // CHECK1: omp.body.continue: 1704 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1705 // CHECK1: omp.inner.for.inc: 1706 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1707 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 1708 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 1709 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1710 // CHECK1: omp.inner.for.end: 1711 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1712 // CHECK1: omp.loop.exit: 1713 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1714 // CHECK1-NEXT: ret void 1715 // 1716 // 1717 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 1718 // CHECK1-SAME: (i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 1719 // CHECK1-NEXT: entry: 1720 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1721 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1722 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 1723 // CHECK1-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 1724 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1725 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1726 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1727 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 1728 // CHECK1-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 1729 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1730 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1731 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 1732 // CHECK1-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 1733 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1734 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1735 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1736 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 1737 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 1738 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1739 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1740 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1741 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4 1742 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 1743 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 1744 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32* 1745 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4 1746 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8 1747 // CHECK1-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 2 1748 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 1749 // CHECK1-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2 1750 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8 1751 // CHECK1-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 1 1752 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 1753 // CHECK1-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1 1754 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 1755 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]]) 1756 // CHECK1-NEXT: ret void 1757 // 1758 // 1759 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1760 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 1761 // CHECK1-NEXT: entry: 1762 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1763 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1764 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1765 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1766 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 1767 // CHECK1-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 1768 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1769 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1770 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1771 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1772 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1773 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 1774 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1775 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1776 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1777 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1778 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1779 // CHECK1-NEXT: [[I8:%.*]] = alloca i32, align 4 1780 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1781 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1782 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1783 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1784 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 1785 // CHECK1-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 1786 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1787 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1788 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1789 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 1790 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 1791 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1792 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4 1793 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1794 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1795 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1796 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1797 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1798 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 1799 // CHECK1-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 1800 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 1801 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 1802 // CHECK1-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 1803 // CHECK1-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 1804 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1805 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 1806 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1807 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1808 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 1809 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1810 // CHECK1: omp.precond.then: 1811 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1812 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 1813 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 1814 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1815 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1816 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1817 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1818 // CHECK1-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1819 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1820 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 1821 // CHECK1-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 1822 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1823 // CHECK1: cond.true: 1824 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 1825 // CHECK1-NEXT: br label [[COND_END:%.*]] 1826 // CHECK1: cond.false: 1827 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1828 // CHECK1-NEXT: br label [[COND_END]] 1829 // CHECK1: cond.end: 1830 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 1831 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1832 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1833 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1834 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1835 // CHECK1: omp.inner.for.cond: 1836 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1837 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1838 // CHECK1-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1 1839 // CHECK1-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]] 1840 // CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1841 // CHECK1: omp.inner.for.body: 1842 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1843 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1844 // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 1845 // CHECK1-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]] 1846 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4 1847 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4 1848 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1 1849 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 4 1850 // CHECK1-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 2 1851 // CHECK1-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32 1852 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 1853 // CHECK1-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16 1854 // CHECK1-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 2 1855 // CHECK1-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 1 1856 // CHECK1-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32 1857 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1 1858 // CHECK1-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8 1859 // CHECK1-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 1 1860 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 1861 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1862 // CHECK1-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1 1863 // CHECK1-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4 1864 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1865 // CHECK1: omp.body.continue: 1866 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1867 // CHECK1: omp.inner.for.inc: 1868 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1869 // CHECK1-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1 1870 // CHECK1-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 1871 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1872 // CHECK1: omp.inner.for.end: 1873 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1874 // CHECK1: omp.loop.exit: 1875 // CHECK1-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1876 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1877 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 1878 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1879 // CHECK1: omp.precond.end: 1880 // CHECK1-NEXT: ret void 1881 // 1882 // 1883 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 1884 // CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 1885 // CHECK1-NEXT: entry: 1886 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1887 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 1888 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1889 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1890 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 1891 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1892 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 1893 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1894 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1895 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 1896 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1897 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1898 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 1899 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4 1900 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8 1901 // CHECK1-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 2 1902 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 1903 // CHECK1-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 1904 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 1905 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]]) 1906 // CHECK1-NEXT: ret void 1907 // 1908 // 1909 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..18 1910 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 1911 // CHECK1-NEXT: entry: 1912 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1913 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1914 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1915 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 1916 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1917 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1918 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1919 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1920 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1921 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1922 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1923 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1924 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1925 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1926 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1927 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 1928 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1929 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1930 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 1931 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1932 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1933 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1934 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1935 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1936 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1937 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1938 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1939 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1940 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1941 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1942 // CHECK1: cond.true: 1943 // CHECK1-NEXT: br label [[COND_END:%.*]] 1944 // CHECK1: cond.false: 1945 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1946 // CHECK1-NEXT: br label [[COND_END]] 1947 // CHECK1: cond.end: 1948 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1949 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1950 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1951 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1952 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1953 // CHECK1: omp.inner.for.cond: 1954 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1955 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1956 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1957 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1958 // CHECK1: omp.inner.for.body: 1959 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1960 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1961 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1962 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1963 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 1964 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 1965 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 1966 // CHECK1-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 2 1967 // CHECK1-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32 1968 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 1969 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 1970 // CHECK1-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 1971 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 1972 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1973 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1 1974 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4 1975 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1976 // CHECK1: omp.body.continue: 1977 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1978 // CHECK1: omp.inner.for.inc: 1979 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1980 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1 1981 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1982 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1983 // CHECK1: omp.inner.for.end: 1984 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1985 // CHECK1: omp.loop.exit: 1986 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1987 // CHECK1-NEXT: ret void 1988 // 1989 // 1990 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1991 // CHECK1-SAME: () #[[ATTR4]] { 1992 // CHECK1-NEXT: entry: 1993 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1994 // CHECK1-NEXT: ret void 1995 // 1996 // 1997 // CHECK2-LABEL: define {{[^@]+}}@_Z3fooi 1998 // CHECK2-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1999 // CHECK2-NEXT: entry: 2000 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2001 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 2002 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2 2003 // CHECK2-NEXT: [[B:%.*]] = alloca [10 x float], align 4 2004 // CHECK2-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2005 // CHECK2-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2006 // CHECK2-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 2007 // CHECK2-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 2008 // CHECK2-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8 2009 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2010 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2011 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 2012 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2013 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8 2014 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 2015 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 2016 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 2017 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 2018 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 2019 // CHECK2-NEXT: [[AA_CASTED7:%.*]] = alloca i64, align 8 2020 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [1 x i8*], align 8 2021 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [1 x i8*], align 8 2022 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [1 x i8*], align 8 2023 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2024 // CHECK2-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8 2025 // CHECK2-NEXT: [[AA_CASTED14:%.*]] = alloca i64, align 8 2026 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [2 x i8*], align 8 2027 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [2 x i8*], align 8 2028 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [2 x i8*], align 8 2029 // CHECK2-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 2030 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 2031 // CHECK2-NEXT: [[A_CASTED23:%.*]] = alloca i64, align 8 2032 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED25:%.*]] = alloca i64, align 8 2033 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [10 x i8*], align 8 2034 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [10 x i8*], align 8 2035 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [10 x i8*], align 8 2036 // CHECK2-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 8 2037 // CHECK2-NEXT: [[_TMP32:%.*]] = alloca i32, align 4 2038 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 2039 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2040 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 2041 // CHECK2-NEXT: store i16 0, i16* [[AA]], align 2 2042 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2043 // CHECK2-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 2044 // CHECK2-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 2045 // CHECK2-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 2046 // CHECK2-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4 2047 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 2048 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 2049 // CHECK2-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 2050 // CHECK2-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]] 2051 // CHECK2-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8 2052 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 2053 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 2054 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_]], align 4 2055 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 2056 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2057 // CHECK2-NEXT: [[TMP9:%.*]] = load i16, i16* [[AA]], align 2 2058 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 2059 // CHECK2-NEXT: store i16 [[TMP9]], i16* [[CONV]], align 2 2060 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, i64* [[AA_CASTED]], align 8 2061 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2062 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 2063 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4 2064 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2065 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2066 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32* 2067 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[CONV5]], align 4 2068 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8 2069 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2070 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 2071 // CHECK2-NEXT: store i64 [[TMP10]], i64* [[TMP16]], align 8 2072 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2073 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 2074 // CHECK2-NEXT: store i64 [[TMP10]], i64* [[TMP18]], align 8 2075 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2076 // CHECK2-NEXT: store i8* null, i8** [[TMP19]], align 8 2077 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2078 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 2079 // CHECK2-NEXT: store i64 [[TMP12]], i64* [[TMP21]], align 8 2080 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2081 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 2082 // CHECK2-NEXT: store i64 [[TMP12]], i64* [[TMP23]], align 8 2083 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2084 // CHECK2-NEXT: store i8* null, i8** [[TMP24]], align 8 2085 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2086 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 2087 // CHECK2-NEXT: store i64 [[TMP14]], i64* [[TMP26]], align 8 2088 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2089 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 2090 // CHECK2-NEXT: store i64 [[TMP14]], i64* [[TMP28]], align 8 2091 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2092 // CHECK2-NEXT: store i8* null, i8** [[TMP29]], align 8 2093 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2094 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2095 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0 2096 // CHECK2-NEXT: [[TMP33:%.*]] = load i16, i16* [[AA]], align 2 2097 // CHECK2-NEXT: store i16 [[TMP33]], i16* [[TMP32]], align 4 2098 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1 2099 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2100 // CHECK2-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4 2101 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2 2102 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2103 // CHECK2-NEXT: store i32 [[TMP37]], i32* [[TMP36]], align 4 2104 // CHECK2-NEXT: [[TMP38:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i64 120, i64 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 2105 // CHECK2-NEXT: [[TMP39:%.*]] = bitcast i8* [[TMP38]] to %struct.kmp_task_t_with_privates* 2106 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 0 2107 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP40]], i32 0, i32 0 2108 // CHECK2-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 8 2109 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8* 2110 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP42]], i8* align 4 [[TMP43]], i64 12, i1 false) 2111 // CHECK2-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 1 2112 // CHECK2-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to %struct.anon* 2113 // CHECK2-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 0 2114 // CHECK2-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8* 2115 // CHECK2-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP30]] to i8* 2116 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP47]], i8* align 8 [[TMP48]], i64 24, i1 false) 2117 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 1 2118 // CHECK2-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8* 2119 // CHECK2-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP31]] to i8* 2120 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP50]], i8* align 8 [[TMP51]], i64 24, i1 false) 2121 // CHECK2-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 2 2122 // CHECK2-NEXT: [[TMP53:%.*]] = bitcast [3 x i64]* [[TMP52]] to i8* 2123 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP53]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 2124 // CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 3 2125 // CHECK2-NEXT: [[TMP55:%.*]] = load i16, i16* [[AA]], align 2 2126 // CHECK2-NEXT: store i16 [[TMP55]], i16* [[TMP54]], align 8 2127 // CHECK2-NEXT: [[TMP56:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP38]]) 2128 // CHECK2-NEXT: [[TMP57:%.*]] = load i32, i32* [[A]], align 4 2129 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 2130 // CHECK2-NEXT: store i32 [[TMP57]], i32* [[CONV6]], align 4 2131 // CHECK2-NEXT: [[TMP58:%.*]] = load i64, i64* [[A_CASTED]], align 8 2132 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i64 [[TMP58]]) #[[ATTR3:[0-9]+]] 2133 // CHECK2-NEXT: [[TMP59:%.*]] = load i16, i16* [[AA]], align 2 2134 // CHECK2-NEXT: [[CONV8:%.*]] = bitcast i64* [[AA_CASTED7]] to i16* 2135 // CHECK2-NEXT: store i16 [[TMP59]], i16* [[CONV8]], align 2 2136 // CHECK2-NEXT: [[TMP60:%.*]] = load i64, i64* [[AA_CASTED7]], align 8 2137 // CHECK2-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 2138 // CHECK2-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64* 2139 // CHECK2-NEXT: store i64 [[TMP60]], i64* [[TMP62]], align 8 2140 // CHECK2-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 2141 // CHECK2-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64* 2142 // CHECK2-NEXT: store i64 [[TMP60]], i64* [[TMP64]], align 8 2143 // CHECK2-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0 2144 // CHECK2-NEXT: store i8* null, i8** [[TMP65]], align 8 2145 // CHECK2-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 2146 // CHECK2-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 2147 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2148 // CHECK2-NEXT: [[TMP68:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP66]], i8** [[TMP67]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2149 // CHECK2-NEXT: [[TMP69:%.*]] = icmp ne i32 [[TMP68]], 0 2150 // CHECK2-NEXT: br i1 [[TMP69]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2151 // CHECK2: omp_offload.failed: 2152 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i64 [[TMP60]]) #[[ATTR3]] 2153 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 2154 // CHECK2: omp_offload.cont: 2155 // CHECK2-NEXT: [[TMP70:%.*]] = load i32, i32* [[A]], align 4 2156 // CHECK2-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32* 2157 // CHECK2-NEXT: store i32 [[TMP70]], i32* [[CONV13]], align 4 2158 // CHECK2-NEXT: [[TMP71:%.*]] = load i64, i64* [[A_CASTED12]], align 8 2159 // CHECK2-NEXT: [[TMP72:%.*]] = load i16, i16* [[AA]], align 2 2160 // CHECK2-NEXT: [[CONV15:%.*]] = bitcast i64* [[AA_CASTED14]] to i16* 2161 // CHECK2-NEXT: store i16 [[TMP72]], i16* [[CONV15]], align 2 2162 // CHECK2-NEXT: [[TMP73:%.*]] = load i64, i64* [[AA_CASTED14]], align 8 2163 // CHECK2-NEXT: [[TMP74:%.*]] = load i32, i32* [[N_ADDR]], align 4 2164 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP74]], 10 2165 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 2166 // CHECK2: omp_if.then: 2167 // CHECK2-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 2168 // CHECK2-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 2169 // CHECK2-NEXT: store i64 [[TMP71]], i64* [[TMP76]], align 8 2170 // CHECK2-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 2171 // CHECK2-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64* 2172 // CHECK2-NEXT: store i64 [[TMP71]], i64* [[TMP78]], align 8 2173 // CHECK2-NEXT: [[TMP79:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0 2174 // CHECK2-NEXT: store i8* null, i8** [[TMP79]], align 8 2175 // CHECK2-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1 2176 // CHECK2-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 2177 // CHECK2-NEXT: store i64 [[TMP73]], i64* [[TMP81]], align 8 2178 // CHECK2-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1 2179 // CHECK2-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* 2180 // CHECK2-NEXT: store i64 [[TMP73]], i64* [[TMP83]], align 8 2181 // CHECK2-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1 2182 // CHECK2-NEXT: store i8* null, i8** [[TMP84]], align 8 2183 // CHECK2-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 2184 // CHECK2-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 2185 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2186 // CHECK2-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP85]], i8** [[TMP86]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2187 // CHECK2-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0 2188 // CHECK2-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 2189 // CHECK2: omp_offload.failed20: 2190 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]] 2191 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT21]] 2192 // CHECK2: omp_offload.cont21: 2193 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 2194 // CHECK2: omp_if.else: 2195 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]] 2196 // CHECK2-NEXT: br label [[OMP_IF_END]] 2197 // CHECK2: omp_if.end: 2198 // CHECK2-NEXT: [[TMP89:%.*]] = load i32, i32* [[N_ADDR]], align 4 2199 // CHECK2-NEXT: store i32 [[TMP89]], i32* [[DOTCAPTURE_EXPR_22]], align 4 2200 // CHECK2-NEXT: [[TMP90:%.*]] = load i32, i32* [[A]], align 4 2201 // CHECK2-NEXT: [[CONV24:%.*]] = bitcast i64* [[A_CASTED23]] to i32* 2202 // CHECK2-NEXT: store i32 [[TMP90]], i32* [[CONV24]], align 4 2203 // CHECK2-NEXT: [[TMP91:%.*]] = load i64, i64* [[A_CASTED23]], align 8 2204 // CHECK2-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4 2205 // CHECK2-NEXT: [[CONV26:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED25]] to i32* 2206 // CHECK2-NEXT: store i32 [[TMP92]], i32* [[CONV26]], align 4 2207 // CHECK2-NEXT: [[TMP93:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED25]], align 8 2208 // CHECK2-NEXT: [[TMP94:%.*]] = load i32, i32* [[N_ADDR]], align 4 2209 // CHECK2-NEXT: [[CMP27:%.*]] = icmp sgt i32 [[TMP94]], 20 2210 // CHECK2-NEXT: br i1 [[CMP27]], label [[OMP_IF_THEN28:%.*]], label [[OMP_IF_ELSE35:%.*]] 2211 // CHECK2: omp_if.then28: 2212 // CHECK2-NEXT: [[TMP95:%.*]] = mul nuw i64 [[TMP2]], 4 2213 // CHECK2-NEXT: [[TMP96:%.*]] = mul nuw i64 5, [[TMP5]] 2214 // CHECK2-NEXT: [[TMP97:%.*]] = mul nuw i64 [[TMP96]], 8 2215 // CHECK2-NEXT: [[TMP98:%.*]] = bitcast [10 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2216 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP98]], i8* align 8 bitcast ([10 x i64]* @.offload_sizes.10 to i8*), i64 80, i1 false) 2217 // CHECK2-NEXT: [[TMP99:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 2218 // CHECK2-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to i64* 2219 // CHECK2-NEXT: store i64 [[TMP91]], i64* [[TMP100]], align 8 2220 // CHECK2-NEXT: [[TMP101:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 2221 // CHECK2-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i64* 2222 // CHECK2-NEXT: store i64 [[TMP91]], i64* [[TMP102]], align 8 2223 // CHECK2-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0 2224 // CHECK2-NEXT: store i8* null, i8** [[TMP103]], align 8 2225 // CHECK2-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 1 2226 // CHECK2-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]** 2227 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 8 2228 // CHECK2-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 1 2229 // CHECK2-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]** 2230 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 8 2231 // CHECK2-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 1 2232 // CHECK2-NEXT: store i8* null, i8** [[TMP108]], align 8 2233 // CHECK2-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 2 2234 // CHECK2-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i64* 2235 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP110]], align 8 2236 // CHECK2-NEXT: [[TMP111:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 2 2237 // CHECK2-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64* 2238 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP112]], align 8 2239 // CHECK2-NEXT: [[TMP113:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 2 2240 // CHECK2-NEXT: store i8* null, i8** [[TMP113]], align 8 2241 // CHECK2-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 3 2242 // CHECK2-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to float** 2243 // CHECK2-NEXT: store float* [[VLA]], float** [[TMP115]], align 8 2244 // CHECK2-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 3 2245 // CHECK2-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float** 2246 // CHECK2-NEXT: store float* [[VLA]], float** [[TMP117]], align 8 2247 // CHECK2-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 2248 // CHECK2-NEXT: store i64 [[TMP95]], i64* [[TMP118]], align 8 2249 // CHECK2-NEXT: [[TMP119:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 3 2250 // CHECK2-NEXT: store i8* null, i8** [[TMP119]], align 8 2251 // CHECK2-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 4 2252 // CHECK2-NEXT: [[TMP121:%.*]] = bitcast i8** [[TMP120]] to [5 x [10 x double]]** 2253 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP121]], align 8 2254 // CHECK2-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 4 2255 // CHECK2-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]** 2256 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 8 2257 // CHECK2-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 4 2258 // CHECK2-NEXT: store i8* null, i8** [[TMP124]], align 8 2259 // CHECK2-NEXT: [[TMP125:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 5 2260 // CHECK2-NEXT: [[TMP126:%.*]] = bitcast i8** [[TMP125]] to i64* 2261 // CHECK2-NEXT: store i64 5, i64* [[TMP126]], align 8 2262 // CHECK2-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 5 2263 // CHECK2-NEXT: [[TMP128:%.*]] = bitcast i8** [[TMP127]] to i64* 2264 // CHECK2-NEXT: store i64 5, i64* [[TMP128]], align 8 2265 // CHECK2-NEXT: [[TMP129:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 5 2266 // CHECK2-NEXT: store i8* null, i8** [[TMP129]], align 8 2267 // CHECK2-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 6 2268 // CHECK2-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i64* 2269 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP131]], align 8 2270 // CHECK2-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 6 2271 // CHECK2-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i64* 2272 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP133]], align 8 2273 // CHECK2-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 6 2274 // CHECK2-NEXT: store i8* null, i8** [[TMP134]], align 8 2275 // CHECK2-NEXT: [[TMP135:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 7 2276 // CHECK2-NEXT: [[TMP136:%.*]] = bitcast i8** [[TMP135]] to double** 2277 // CHECK2-NEXT: store double* [[VLA1]], double** [[TMP136]], align 8 2278 // CHECK2-NEXT: [[TMP137:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 7 2279 // CHECK2-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to double** 2280 // CHECK2-NEXT: store double* [[VLA1]], double** [[TMP138]], align 8 2281 // CHECK2-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 2282 // CHECK2-NEXT: store i64 [[TMP97]], i64* [[TMP139]], align 8 2283 // CHECK2-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 7 2284 // CHECK2-NEXT: store i8* null, i8** [[TMP140]], align 8 2285 // CHECK2-NEXT: [[TMP141:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 8 2286 // CHECK2-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to %struct.TT** 2287 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP142]], align 8 2288 // CHECK2-NEXT: [[TMP143:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 8 2289 // CHECK2-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to %struct.TT** 2290 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP144]], align 8 2291 // CHECK2-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 8 2292 // CHECK2-NEXT: store i8* null, i8** [[TMP145]], align 8 2293 // CHECK2-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 9 2294 // CHECK2-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64* 2295 // CHECK2-NEXT: store i64 [[TMP93]], i64* [[TMP147]], align 8 2296 // CHECK2-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 9 2297 // CHECK2-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 2298 // CHECK2-NEXT: store i64 [[TMP93]], i64* [[TMP149]], align 8 2299 // CHECK2-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 9 2300 // CHECK2-NEXT: store i8* null, i8** [[TMP150]], align 8 2301 // CHECK2-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 2302 // CHECK2-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 2303 // CHECK2-NEXT: [[TMP153:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2304 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2305 // CHECK2-NEXT: [[TMP154:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP151]], i8** [[TMP152]], i64* [[TMP153]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2306 // CHECK2-NEXT: [[TMP155:%.*]] = icmp ne i32 [[TMP154]], 0 2307 // CHECK2-NEXT: br i1 [[TMP155]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 2308 // CHECK2: omp_offload.failed33: 2309 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]] 2310 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT34]] 2311 // CHECK2: omp_offload.cont34: 2312 // CHECK2-NEXT: br label [[OMP_IF_END36:%.*]] 2313 // CHECK2: omp_if.else35: 2314 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]] 2315 // CHECK2-NEXT: br label [[OMP_IF_END36]] 2316 // CHECK2: omp_if.end36: 2317 // CHECK2-NEXT: [[TMP156:%.*]] = load i32, i32* [[A]], align 4 2318 // CHECK2-NEXT: [[TMP157:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2319 // CHECK2-NEXT: call void @llvm.stackrestore(i8* [[TMP157]]) 2320 // CHECK2-NEXT: ret i32 [[TMP156]] 2321 // 2322 // 2323 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 2324 // CHECK2-SAME: (i64 noundef [[AA:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] { 2325 // CHECK2-NEXT: entry: 2326 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 2327 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2328 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 2329 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 2330 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 2331 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 2332 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2333 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 2334 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 2335 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2336 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 2337 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 4 2338 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 4 2339 // CHECK2-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 2340 // CHECK2-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 2341 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 2342 // CHECK2-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2 2343 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 2344 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]]) 2345 // CHECK2-NEXT: ret void 2346 // 2347 // 2348 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 2349 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 2350 // CHECK2-NEXT: entry: 2351 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2352 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2353 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 2354 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2355 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2356 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2357 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2358 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2359 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2360 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2361 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2362 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2363 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 2364 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 2365 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2366 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2367 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2368 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2369 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2370 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2371 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2372 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2373 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 2374 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2375 // CHECK2: cond.true: 2376 // CHECK2-NEXT: br label [[COND_END:%.*]] 2377 // CHECK2: cond.false: 2378 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2379 // CHECK2-NEXT: br label [[COND_END]] 2380 // CHECK2: cond.end: 2381 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2382 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2383 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2384 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2385 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2386 // CHECK2: omp.inner.for.cond: 2387 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2388 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2389 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2390 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2391 // CHECK2: omp.inner.for.body: 2392 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2393 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2394 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2395 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2396 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2397 // CHECK2: omp.body.continue: 2398 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2399 // CHECK2: omp.inner.for.inc: 2400 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2401 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 2402 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2403 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2404 // CHECK2: omp.inner.for.end: 2405 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2406 // CHECK2: omp.loop.exit: 2407 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2408 // CHECK2-NEXT: ret void 2409 // 2410 // 2411 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_privates_map. 2412 // CHECK2-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i16** noalias noundef [[TMP1:%.*]], [3 x i8*]** noalias noundef [[TMP2:%.*]], [3 x i8*]** noalias noundef [[TMP3:%.*]], [3 x i64]** noalias noundef [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] { 2413 // CHECK2-NEXT: entry: 2414 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 2415 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 8 2416 // CHECK2-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 8 2417 // CHECK2-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 8 2418 // CHECK2-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 8 2419 // CHECK2-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 2420 // CHECK2-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 8 2421 // CHECK2-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 8 2422 // CHECK2-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 8 2423 // CHECK2-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 8 2424 // CHECK2-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 2425 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0 2426 // CHECK2-NEXT: [[TMP7:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 8 2427 // CHECK2-NEXT: store [3 x i8*]* [[TMP6]], [3 x i8*]** [[TMP7]], align 8 2428 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1 2429 // CHECK2-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 8 2430 // CHECK2-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 8 2431 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2 2432 // CHECK2-NEXT: [[TMP11:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 8 2433 // CHECK2-NEXT: store [3 x i64]* [[TMP10]], [3 x i64]** [[TMP11]], align 8 2434 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3 2435 // CHECK2-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 8 2436 // CHECK2-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 8 2437 // CHECK2-NEXT: ret void 2438 // 2439 // 2440 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry. 2441 // CHECK2-SAME: (i32 noundef signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] { 2442 // CHECK2-NEXT: entry: 2443 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 2444 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 2445 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 2446 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 2447 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 2448 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8 2449 // CHECK2-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 8 2450 // CHECK2-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 8 2451 // CHECK2-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 8 2452 // CHECK2-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 8 2453 // CHECK2-NEXT: [[AA_CASTED_I:%.*]] = alloca i64, align 8 2454 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i64, align 8 2455 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED5_I:%.*]] = alloca i64, align 8 2456 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 2457 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 2458 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 2459 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 2460 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 2461 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 2462 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 2463 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 2464 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 2465 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2466 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 2467 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1 2468 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 2469 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 2470 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 2471 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]]) 2472 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]]) 2473 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]]) 2474 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21 2475 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21 2476 // CHECK2-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 2477 // CHECK2-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 2478 // CHECK2-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21 2479 // CHECK2-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 2480 // CHECK2-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 2481 // CHECK2-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 2482 // CHECK2-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 2483 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* 2484 // CHECK2-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]] 2485 // CHECK2-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !21 2486 // CHECK2-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !21 2487 // CHECK2-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias !21 2488 // CHECK2-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias !21 2489 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i64 0, i64 0 2490 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i64 0, i64 0 2491 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i64 0, i64 0 2492 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1 2493 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2 2494 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4 2495 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4 2496 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]] 2497 // CHECK2-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]] 2498 // CHECK2-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2499 // CHECK2-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 2500 // CHECK2: omp_offload.failed.i: 2501 // CHECK2-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2 2502 // CHECK2-NEXT: [[CONV_I:%.*]] = bitcast i64* [[AA_CASTED_I]] to i16* 2503 // CHECK2-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !21 2504 // CHECK2-NEXT: [[TMP30:%.*]] = load i64, i64* [[AA_CASTED_I]], align 8, !noalias !21 2505 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4 2506 // CHECK2-NEXT: [[CONV4_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED_I]] to i32* 2507 // CHECK2-NEXT: store i32 [[TMP31]], i32* [[CONV4_I]], align 4, !noalias !21 2508 // CHECK2-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED_I]], align 8, !noalias !21 2509 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4 2510 // CHECK2-NEXT: [[CONV6_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED5_I]] to i32* 2511 // CHECK2-NEXT: store i32 [[TMP33]], i32* [[CONV6_I]], align 4, !noalias !21 2512 // CHECK2-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED5_I]], align 8, !noalias !21 2513 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i64 [[TMP30]], i64 [[TMP32]], i64 [[TMP34]]) #[[ATTR3]] 2514 // CHECK2-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 2515 // CHECK2: .omp_outlined..1.exit: 2516 // CHECK2-NEXT: ret i32 0 2517 // 2518 // 2519 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107 2520 // CHECK2-SAME: (i64 noundef [[A:%.*]]) #[[ATTR2]] { 2521 // CHECK2-NEXT: entry: 2522 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2523 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 2524 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2525 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 2526 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 2527 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32* 2528 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4 2529 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 2530 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 2531 // CHECK2-NEXT: ret void 2532 // 2533 // 2534 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 2535 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR2]] { 2536 // CHECK2-NEXT: entry: 2537 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2538 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2539 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2540 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2541 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2542 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2543 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2544 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2545 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2546 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2547 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2548 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2549 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2550 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 2551 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2552 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2553 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2554 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2555 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2556 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2557 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2558 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2559 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 2560 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2561 // CHECK2: cond.true: 2562 // CHECK2-NEXT: br label [[COND_END:%.*]] 2563 // CHECK2: cond.false: 2564 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2565 // CHECK2-NEXT: br label [[COND_END]] 2566 // CHECK2: cond.end: 2567 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2568 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2569 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2570 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2571 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2572 // CHECK2: omp.inner.for.cond: 2573 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2574 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2575 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2576 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2577 // CHECK2: omp.inner.for.body: 2578 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2579 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2580 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2581 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2582 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 2583 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 2584 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[CONV]], align 4 2585 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2586 // CHECK2: omp.body.continue: 2587 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2588 // CHECK2: omp.inner.for.inc: 2589 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2590 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 2591 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2592 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2593 // CHECK2: omp.inner.for.end: 2594 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2595 // CHECK2: omp.loop.exit: 2596 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2597 // CHECK2-NEXT: ret void 2598 // 2599 // 2600 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 2601 // CHECK2-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR2]] { 2602 // CHECK2-NEXT: entry: 2603 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 2604 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 2605 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 2606 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 2607 // CHECK2-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 2608 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 2609 // CHECK2-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 2610 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8 2611 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 2612 // CHECK2-NEXT: ret void 2613 // 2614 // 2615 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 2616 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 2617 // CHECK2-NEXT: entry: 2618 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2619 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2620 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 2621 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2622 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2623 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2624 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2625 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2626 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2627 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2628 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2629 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2630 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 2631 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 2632 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2633 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2634 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2635 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2636 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2637 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2638 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2639 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2640 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 2641 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2642 // CHECK2: cond.true: 2643 // CHECK2-NEXT: br label [[COND_END:%.*]] 2644 // CHECK2: cond.false: 2645 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2646 // CHECK2-NEXT: br label [[COND_END]] 2647 // CHECK2: cond.end: 2648 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2649 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2650 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2651 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2652 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2653 // CHECK2: omp.inner.for.cond: 2654 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2655 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2656 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2657 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2658 // CHECK2: omp.inner.for.body: 2659 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2660 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2661 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2662 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2663 // CHECK2-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 2664 // CHECK2-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 2665 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 2666 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 2667 // CHECK2-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 2668 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2669 // CHECK2: omp.body.continue: 2670 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2671 // CHECK2: omp.inner.for.inc: 2672 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2673 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 2674 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2675 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2676 // CHECK2: omp.inner.for.end: 2677 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2678 // CHECK2: omp.loop.exit: 2679 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2680 // CHECK2-NEXT: ret void 2681 // 2682 // 2683 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 2684 // CHECK2-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 2685 // CHECK2-NEXT: entry: 2686 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2687 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 2688 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 2689 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 2690 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2691 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 2692 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 2693 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 2694 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 2695 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 2696 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4 2697 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 2698 // CHECK2-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 2 2699 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 2700 // CHECK2-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2 2701 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 2702 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]]) 2703 // CHECK2-NEXT: ret void 2704 // 2705 // 2706 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6 2707 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 2708 // CHECK2-NEXT: entry: 2709 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2710 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2711 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2712 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 2713 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2714 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2715 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2716 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2717 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2718 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2719 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2720 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2721 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2722 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2723 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 2724 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 2725 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 2726 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2727 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2728 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2729 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2730 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2731 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2732 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2733 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2734 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 2735 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2736 // CHECK2: cond.true: 2737 // CHECK2-NEXT: br label [[COND_END:%.*]] 2738 // CHECK2: cond.false: 2739 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2740 // CHECK2-NEXT: br label [[COND_END]] 2741 // CHECK2: cond.end: 2742 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2743 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2744 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2745 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2746 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2747 // CHECK2: omp.inner.for.cond: 2748 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2749 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2750 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2751 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2752 // CHECK2: omp.inner.for.body: 2753 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2754 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2755 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2756 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2757 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 2758 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 2759 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 2760 // CHECK2-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 2 2761 // CHECK2-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32 2762 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 2763 // CHECK2-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 2764 // CHECK2-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 2765 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2766 // CHECK2: omp.body.continue: 2767 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2768 // CHECK2: omp.inner.for.inc: 2769 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2770 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1 2771 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2772 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2773 // CHECK2: omp.inner.for.end: 2774 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2775 // CHECK2: omp.loop.exit: 2776 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2777 // CHECK2-NEXT: ret void 2778 // 2779 // 2780 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 2781 // CHECK2-SAME: (i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2782 // CHECK2-NEXT: entry: 2783 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2784 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 2785 // CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2786 // CHECK2-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 2787 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 2788 // CHECK2-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 2789 // CHECK2-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 2790 // CHECK2-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 2791 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 2792 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2793 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 2794 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2795 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2796 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 2797 // CHECK2-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2798 // CHECK2-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 2799 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 2800 // CHECK2-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 2801 // CHECK2-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 2802 // CHECK2-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 2803 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 2804 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2805 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 2806 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 2807 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2808 // CHECK2-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 2809 // CHECK2-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 2810 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 2811 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 2812 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 2813 // CHECK2-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 2814 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2815 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 2816 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 2817 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4 2818 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8 2819 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 4 2820 // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 2821 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4 2822 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2823 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]]) 2824 // CHECK2-NEXT: ret void 2825 // 2826 // 2827 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9 2828 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2829 // CHECK2-NEXT: entry: 2830 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2831 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2832 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2833 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 2834 // CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2835 // CHECK2-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 2836 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 2837 // CHECK2-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 2838 // CHECK2-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 2839 // CHECK2-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 2840 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 2841 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2842 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2843 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2844 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2845 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2846 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2847 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2848 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2849 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2850 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2851 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2852 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 2853 // CHECK2-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2854 // CHECK2-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 2855 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 2856 // CHECK2-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 2857 // CHECK2-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 2858 // CHECK2-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 2859 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 2860 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2861 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 2862 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 2863 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2864 // CHECK2-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 2865 // CHECK2-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 2866 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 2867 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 2868 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 2869 // CHECK2-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 2870 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2871 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2872 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2873 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2874 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2875 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 4 2876 // CHECK2-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2877 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 2878 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 2879 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2880 // CHECK2: omp.dispatch.cond: 2881 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2882 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 2883 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2884 // CHECK2: cond.true: 2885 // CHECK2-NEXT: br label [[COND_END:%.*]] 2886 // CHECK2: cond.false: 2887 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2888 // CHECK2-NEXT: br label [[COND_END]] 2889 // CHECK2: cond.end: 2890 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2891 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2892 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2893 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2894 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2895 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2896 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2897 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2898 // CHECK2: omp.dispatch.body: 2899 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2900 // CHECK2: omp.inner.for.cond: 2901 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2902 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 2903 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2904 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2905 // CHECK2: omp.inner.for.body: 2906 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2907 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2908 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2909 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 2910 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !22 2911 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 2912 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group !22 2913 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2 2914 // CHECK2-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !22 2915 // CHECK2-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double 2916 // CHECK2-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00 2917 // CHECK2-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float 2918 // CHECK2-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !22 2919 // CHECK2-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3 2920 // CHECK2-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !22 2921 // CHECK2-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double 2922 // CHECK2-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00 2923 // CHECK2-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float 2924 // CHECK2-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !22 2925 // CHECK2-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1 2926 // CHECK2-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2 2927 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !22 2928 // CHECK2-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00 2929 // CHECK2-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !22 2930 // CHECK2-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]] 2931 // CHECK2-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]] 2932 // CHECK2-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3 2933 // CHECK2-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !22 2934 // CHECK2-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00 2935 // CHECK2-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !22 2936 // CHECK2-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 2937 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !22 2938 // CHECK2-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1 2939 // CHECK2-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !22 2940 // CHECK2-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 2941 // CHECK2-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !22 2942 // CHECK2-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32 2943 // CHECK2-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1 2944 // CHECK2-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8 2945 // CHECK2-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !22 2946 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2947 // CHECK2: omp.body.continue: 2948 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2949 // CHECK2: omp.inner.for.inc: 2950 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2951 // CHECK2-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1 2952 // CHECK2-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2953 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 2954 // CHECK2: omp.inner.for.end: 2955 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2956 // CHECK2: omp.dispatch.inc: 2957 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2958 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2959 // CHECK2-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 2960 // CHECK2-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4 2961 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2962 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2963 // CHECK2-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 2964 // CHECK2-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4 2965 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 2966 // CHECK2: omp.dispatch.end: 2967 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 2968 // CHECK2-NEXT: ret void 2969 // 2970 // 2971 // CHECK2-LABEL: define {{[^@]+}}@_Z3bari 2972 // CHECK2-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 2973 // CHECK2-NEXT: entry: 2974 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2975 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 2976 // CHECK2-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 2977 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2978 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 2979 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 2980 // CHECK2-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z3fooi(i32 noundef signext [[TMP0]]) 2981 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 2982 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 2983 // CHECK2-NEXT: store i32 [[ADD]], i32* [[A]], align 4 2984 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2985 // CHECK2-NEXT: [[CALL1:%.*]] = call noundef signext i32 @_ZN2S12r1Ei(%struct.S1* noundef nonnull align 8 dereferenceable(8) [[S]], i32 noundef signext [[TMP2]]) 2986 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 2987 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 2988 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 2989 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 2990 // CHECK2-NEXT: [[CALL3:%.*]] = call noundef signext i32 @_ZL7fstatici(i32 noundef signext [[TMP4]]) 2991 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 2992 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 2993 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 2994 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 2995 // CHECK2-NEXT: [[CALL5:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_i(i32 noundef signext [[TMP6]]) 2996 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 2997 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 2998 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 2999 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 3000 // CHECK2-NEXT: ret i32 [[TMP8]] 3001 // 3002 // 3003 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 3004 // CHECK2-SAME: (%struct.S1* noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat align 2 { 3005 // CHECK2-NEXT: entry: 3006 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 3007 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3008 // CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4 3009 // CHECK2-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3010 // CHECK2-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3011 // CHECK2-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 3012 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 3013 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 3014 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 3015 // CHECK2-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 3016 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3017 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 3018 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3019 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 3020 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 3021 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 3022 // CHECK2-NEXT: store i32 [[ADD]], i32* [[B]], align 4 3023 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 3024 // CHECK2-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 3025 // CHECK2-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 3026 // CHECK2-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 3027 // CHECK2-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]] 3028 // CHECK2-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2 3029 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 3030 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 3031 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32* 3032 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4 3033 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8 3034 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4 3035 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60 3036 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3037 // CHECK2: omp_if.then: 3038 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 3039 // CHECK2-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]] 3040 // CHECK2-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2 3041 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3042 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP10]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes.13 to i8*), i64 40, i1 false) 3043 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3044 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to %struct.S1** 3045 // CHECK2-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP12]], align 8 3046 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3047 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to double** 3048 // CHECK2-NEXT: store double* [[A]], double** [[TMP14]], align 8 3049 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3050 // CHECK2-NEXT: store i8* null, i8** [[TMP15]], align 8 3051 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3052 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 3053 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8 3054 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3055 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 3056 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8 3057 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3058 // CHECK2-NEXT: store i8* null, i8** [[TMP20]], align 8 3059 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3060 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64* 3061 // CHECK2-NEXT: store i64 2, i64* [[TMP22]], align 8 3062 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3063 // CHECK2-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64* 3064 // CHECK2-NEXT: store i64 2, i64* [[TMP24]], align 8 3065 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3066 // CHECK2-NEXT: store i8* null, i8** [[TMP25]], align 8 3067 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3068 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 3069 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP27]], align 8 3070 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3071 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 3072 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8 3073 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 3074 // CHECK2-NEXT: store i8* null, i8** [[TMP30]], align 8 3075 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3076 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i16** 3077 // CHECK2-NEXT: store i16* [[VLA]], i16** [[TMP32]], align 8 3078 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3079 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i16** 3080 // CHECK2-NEXT: store i16* [[VLA]], i16** [[TMP34]], align 8 3081 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 3082 // CHECK2-NEXT: store i64 [[TMP9]], i64* [[TMP35]], align 8 3083 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 3084 // CHECK2-NEXT: store i8* null, i8** [[TMP36]], align 8 3085 // CHECK2-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3086 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3087 // CHECK2-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3088 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3089 // CHECK2-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP37]], i8** [[TMP38]], i64* [[TMP39]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.14, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3090 // CHECK2-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 3091 // CHECK2-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3092 // CHECK2: omp_offload.failed: 3093 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 3094 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 3095 // CHECK2: omp_offload.cont: 3096 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 3097 // CHECK2: omp_if.else: 3098 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 3099 // CHECK2-NEXT: br label [[OMP_IF_END]] 3100 // CHECK2: omp_if.end: 3101 // CHECK2-NEXT: [[TMP42:%.*]] = mul nsw i64 1, [[TMP2]] 3102 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP42]] 3103 // CHECK2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 3104 // CHECK2-NEXT: [[TMP43:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 3105 // CHECK2-NEXT: [[CONV3:%.*]] = sext i16 [[TMP43]] to i32 3106 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[B]], align 4 3107 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP44]] 3108 // CHECK2-NEXT: [[TMP45:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3109 // CHECK2-NEXT: call void @llvm.stackrestore(i8* [[TMP45]]) 3110 // CHECK2-NEXT: ret i32 [[ADD4]] 3111 // 3112 // 3113 // CHECK2-LABEL: define {{[^@]+}}@_ZL7fstatici 3114 // CHECK2-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 3115 // CHECK2-NEXT: entry: 3116 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3117 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 3118 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2 3119 // CHECK2-NEXT: [[AAA:%.*]] = alloca i8, align 1 3120 // CHECK2-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 3121 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3122 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 3123 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 3124 // CHECK2-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 3125 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 3126 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 3127 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 3128 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3129 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3130 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 3131 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 3132 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3133 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 3134 // CHECK2-NEXT: store i16 0, i16* [[AA]], align 2 3135 // CHECK2-NEXT: store i8 0, i8* [[AAA]], align 1 3136 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 3137 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3138 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 3139 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8 3140 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 3141 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32* 3142 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 3143 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[A_CASTED]], align 8 3144 // CHECK2-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2 3145 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 3146 // CHECK2-NEXT: store i16 [[TMP4]], i16* [[CONV2]], align 2 3147 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[AA_CASTED]], align 8 3148 // CHECK2-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1 3149 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 3150 // CHECK2-NEXT: store i8 [[TMP6]], i8* [[CONV3]], align 1 3151 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 3152 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4 3153 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50 3154 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3155 // CHECK2: omp_if.then: 3156 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3157 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3158 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 3159 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3160 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 3161 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8 3162 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3163 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8 3164 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3165 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 3166 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 3167 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3168 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 3169 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP17]], align 8 3170 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3171 // CHECK2-NEXT: store i8* null, i8** [[TMP18]], align 8 3172 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3173 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 3174 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8 3175 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3176 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64* 3177 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 3178 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3179 // CHECK2-NEXT: store i8* null, i8** [[TMP23]], align 8 3180 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3181 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 3182 // CHECK2-NEXT: store i64 [[TMP7]], i64* [[TMP25]], align 8 3183 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3184 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 3185 // CHECK2-NEXT: store i64 [[TMP7]], i64* [[TMP27]], align 8 3186 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 3187 // CHECK2-NEXT: store i8* null, i8** [[TMP28]], align 8 3188 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3189 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]** 3190 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 8 3191 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3192 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]** 3193 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 8 3194 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 3195 // CHECK2-NEXT: store i8* null, i8** [[TMP33]], align 8 3196 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3197 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3198 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4 3199 // CHECK2-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4 3200 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 3201 // CHECK2-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_4]], align 4 3202 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3203 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3204 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]] 3205 // CHECK2-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 3206 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 3207 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 3208 // CHECK2-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 3209 // CHECK2-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 3210 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 3211 // CHECK2-NEXT: [[ADD8:%.*]] = add i32 [[TMP40]], 1 3212 // CHECK2-NEXT: [[TMP41:%.*]] = zext i32 [[ADD8]] to i64 3213 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]]) 3214 // CHECK2-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3215 // CHECK2-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 3216 // CHECK2-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3217 // CHECK2: omp_offload.failed: 3218 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 3219 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 3220 // CHECK2: omp_offload.cont: 3221 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 3222 // CHECK2: omp_if.else: 3223 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 3224 // CHECK2-NEXT: br label [[OMP_IF_END]] 3225 // CHECK2: omp_if.end: 3226 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4 3227 // CHECK2-NEXT: ret i32 [[TMP44]] 3228 // 3229 // 3230 // CHECK2-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 3231 // CHECK2-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat { 3232 // CHECK2-NEXT: entry: 3233 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3234 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 3235 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2 3236 // CHECK2-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 3237 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 3238 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 3239 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3240 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3241 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3242 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3243 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3244 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 3245 // CHECK2-NEXT: store i16 0, i16* [[AA]], align 2 3246 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 3247 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 3248 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 3249 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 3250 // CHECK2-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 3251 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 3252 // CHECK2-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 3253 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 3254 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 3255 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 3256 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3257 // CHECK2: omp_if.then: 3258 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3259 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 3260 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 3261 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3262 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 3263 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 3264 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3265 // CHECK2-NEXT: store i8* null, i8** [[TMP9]], align 8 3266 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3267 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 3268 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 3269 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3270 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 3271 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 3272 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3273 // CHECK2-NEXT: store i8* null, i8** [[TMP14]], align 8 3274 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3275 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 3276 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8 3277 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3278 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 3279 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8 3280 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3281 // CHECK2-NEXT: store i8* null, i8** [[TMP19]], align 8 3282 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3283 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3284 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3285 // CHECK2-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3286 // CHECK2-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 3287 // CHECK2-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3288 // CHECK2: omp_offload.failed: 3289 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 3290 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 3291 // CHECK2: omp_offload.cont: 3292 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 3293 // CHECK2: omp_if.else: 3294 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 3295 // CHECK2-NEXT: br label [[OMP_IF_END]] 3296 // CHECK2: omp_if.end: 3297 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 3298 // CHECK2-NEXT: ret i32 [[TMP24]] 3299 // 3300 // 3301 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 3302 // CHECK2-SAME: (%struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 3303 // CHECK2-NEXT: entry: 3304 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 3305 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 3306 // CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3307 // CHECK2-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 3308 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 3309 // CHECK2-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 3310 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 3311 // CHECK2-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 3312 // CHECK2-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3313 // CHECK2-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 3314 // CHECK2-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 3315 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 3316 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 3317 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3318 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 3319 // CHECK2-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 3320 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 3321 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32* 3322 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 3323 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8 3324 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..12 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]]) 3325 // CHECK2-NEXT: ret void 3326 // 3327 // 3328 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..12 3329 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 3330 // CHECK2-NEXT: entry: 3331 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3332 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3333 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 3334 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 3335 // CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3336 // CHECK2-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 3337 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 3338 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3339 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3340 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3341 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3342 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3343 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3344 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3345 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3346 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3347 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 3348 // CHECK2-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 3349 // CHECK2-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3350 // CHECK2-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 3351 // CHECK2-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 3352 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 3353 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 3354 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3355 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 3356 // CHECK2-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 3357 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3358 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3359 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3360 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3361 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3362 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3363 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3364 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3365 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 3366 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3367 // CHECK2: cond.true: 3368 // CHECK2-NEXT: br label [[COND_END:%.*]] 3369 // CHECK2: cond.false: 3370 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3371 // CHECK2-NEXT: br label [[COND_END]] 3372 // CHECK2: cond.end: 3373 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 3374 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3375 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3376 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3377 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3378 // CHECK2: omp.inner.for.cond: 3379 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3380 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3381 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3382 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3383 // CHECK2: omp.inner.for.body: 3384 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3385 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3386 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3387 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3388 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 3389 // CHECK2-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double 3390 // CHECK2-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00 3391 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 3392 // CHECK2-NEXT: store double [[ADD5]], double* [[A]], align 8 3393 // CHECK2-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 3394 // CHECK2-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8 3395 // CHECK2-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 3396 // CHECK2-NEXT: store double [[INC]], double* [[A6]], align 8 3397 // CHECK2-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16 3398 // CHECK2-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]] 3399 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]] 3400 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 3401 // CHECK2-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2 3402 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3403 // CHECK2: omp.body.continue: 3404 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3405 // CHECK2: omp.inner.for.inc: 3406 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3407 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 3408 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 3409 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3410 // CHECK2: omp.inner.for.end: 3411 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3412 // CHECK2: omp.loop.exit: 3413 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 3414 // CHECK2-NEXT: ret void 3415 // 3416 // 3417 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 3418 // CHECK2-SAME: (i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 3419 // CHECK2-NEXT: entry: 3420 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3421 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3422 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 3423 // CHECK2-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 3424 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 3425 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3426 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 3427 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 3428 // CHECK2-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 3429 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3430 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3431 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 3432 // CHECK2-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 3433 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 3434 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3435 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 3436 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 3437 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 3438 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 3439 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 3440 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3441 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4 3442 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 3443 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 3444 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32* 3445 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4 3446 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8 3447 // CHECK2-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 2 3448 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 3449 // CHECK2-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2 3450 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8 3451 // CHECK2-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 1 3452 // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 3453 // CHECK2-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1 3454 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 3455 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]]) 3456 // CHECK2-NEXT: ret void 3457 // 3458 // 3459 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15 3460 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 3461 // CHECK2-NEXT: entry: 3462 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3463 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3464 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3465 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3466 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 3467 // CHECK2-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 3468 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 3469 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3470 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3471 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3472 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 3473 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 3474 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3475 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3476 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3477 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3478 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3479 // CHECK2-NEXT: [[I8:%.*]] = alloca i32, align 4 3480 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3481 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3482 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3483 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3484 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 3485 // CHECK2-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 3486 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 3487 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3488 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 3489 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 3490 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 3491 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 3492 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4 3493 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 3494 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3495 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4 3496 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3497 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3498 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 3499 // CHECK2-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 3500 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 3501 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 3502 // CHECK2-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 3503 // CHECK2-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 3504 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3505 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 3506 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3507 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3508 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 3509 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3510 // CHECK2: omp.precond.then: 3511 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3512 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 3513 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3514 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3515 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3516 // CHECK2-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3517 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3518 // CHECK2-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3519 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3520 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 3521 // CHECK2-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 3522 // CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3523 // CHECK2: cond.true: 3524 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 3525 // CHECK2-NEXT: br label [[COND_END:%.*]] 3526 // CHECK2: cond.false: 3527 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3528 // CHECK2-NEXT: br label [[COND_END]] 3529 // CHECK2: cond.end: 3530 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 3531 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3532 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3533 // CHECK2-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3534 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3535 // CHECK2: omp.inner.for.cond: 3536 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3537 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3538 // CHECK2-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1 3539 // CHECK2-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]] 3540 // CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3541 // CHECK2: omp.inner.for.body: 3542 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3543 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3544 // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 3545 // CHECK2-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]] 3546 // CHECK2-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4 3547 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4 3548 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1 3549 // CHECK2-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 4 3550 // CHECK2-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 2 3551 // CHECK2-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32 3552 // CHECK2-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 3553 // CHECK2-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16 3554 // CHECK2-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 2 3555 // CHECK2-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 1 3556 // CHECK2-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32 3557 // CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1 3558 // CHECK2-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8 3559 // CHECK2-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 1 3560 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 3561 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3562 // CHECK2-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1 3563 // CHECK2-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4 3564 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3565 // CHECK2: omp.body.continue: 3566 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3567 // CHECK2: omp.inner.for.inc: 3568 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3569 // CHECK2-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1 3570 // CHECK2-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 3571 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3572 // CHECK2: omp.inner.for.end: 3573 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3574 // CHECK2: omp.loop.exit: 3575 // CHECK2-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3576 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 3577 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 3578 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 3579 // CHECK2: omp.precond.end: 3580 // CHECK2-NEXT: ret void 3581 // 3582 // 3583 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 3584 // CHECK2-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 3585 // CHECK2-NEXT: entry: 3586 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3587 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 3588 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 3589 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 3590 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 3591 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3592 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 3593 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 3594 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 3595 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 3596 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 3597 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 3598 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 3599 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4 3600 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8 3601 // CHECK2-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 2 3602 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 3603 // CHECK2-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 3604 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 3605 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]]) 3606 // CHECK2-NEXT: ret void 3607 // 3608 // 3609 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..18 3610 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 3611 // CHECK2-NEXT: entry: 3612 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3613 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3614 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3615 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 3616 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 3617 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3618 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3619 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3620 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3621 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3622 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3623 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3624 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3625 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3626 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3627 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 3628 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 3629 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 3630 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 3631 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 3632 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3633 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3634 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3635 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3636 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3637 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3638 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3639 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3640 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3641 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3642 // CHECK2: cond.true: 3643 // CHECK2-NEXT: br label [[COND_END:%.*]] 3644 // CHECK2: cond.false: 3645 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3646 // CHECK2-NEXT: br label [[COND_END]] 3647 // CHECK2: cond.end: 3648 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3649 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3650 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3651 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3652 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3653 // CHECK2: omp.inner.for.cond: 3654 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3655 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3656 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3657 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3658 // CHECK2: omp.inner.for.body: 3659 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3660 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3661 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3662 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3663 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 3664 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 3665 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 3666 // CHECK2-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 2 3667 // CHECK2-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32 3668 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 3669 // CHECK2-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 3670 // CHECK2-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 3671 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 3672 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3673 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1 3674 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4 3675 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3676 // CHECK2: omp.body.continue: 3677 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3678 // CHECK2: omp.inner.for.inc: 3679 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3680 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1 3681 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 3682 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3683 // CHECK2: omp.inner.for.end: 3684 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3685 // CHECK2: omp.loop.exit: 3686 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3687 // CHECK2-NEXT: ret void 3688 // 3689 // 3690 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3691 // CHECK2-SAME: () #[[ATTR4]] { 3692 // CHECK2-NEXT: entry: 3693 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 3694 // CHECK2-NEXT: ret void 3695 // 3696 // 3697 // CHECK3-LABEL: define {{[^@]+}}@_Z3fooi 3698 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 3699 // CHECK3-NEXT: entry: 3700 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3701 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 3702 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 3703 // CHECK3-NEXT: [[B:%.*]] = alloca [10 x float], align 4 3704 // CHECK3-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3705 // CHECK3-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3706 // CHECK3-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 3707 // CHECK3-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 3708 // CHECK3-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4 3709 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3710 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3711 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 3712 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 3713 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i32, align 4 3714 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 3715 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 3716 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 3717 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 3718 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 3719 // CHECK3-NEXT: [[AA_CASTED4:%.*]] = alloca i32, align 4 3720 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS6:%.*]] = alloca [1 x i8*], align 4 3721 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS7:%.*]] = alloca [1 x i8*], align 4 3722 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS8:%.*]] = alloca [1 x i8*], align 4 3723 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3724 // CHECK3-NEXT: [[A_CASTED9:%.*]] = alloca i32, align 4 3725 // CHECK3-NEXT: [[AA_CASTED10:%.*]] = alloca i32, align 4 3726 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x i8*], align 4 3727 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x i8*], align 4 3728 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x i8*], align 4 3729 // CHECK3-NEXT: [[_TMP15:%.*]] = alloca i32, align 4 3730 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 3731 // CHECK3-NEXT: [[A_CASTED19:%.*]] = alloca i32, align 4 3732 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4 3733 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [10 x i8*], align 4 3734 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [10 x i8*], align 4 3735 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [10 x i8*], align 4 3736 // CHECK3-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 4 3737 // CHECK3-NEXT: [[_TMP26:%.*]] = alloca i32, align 4 3738 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 3739 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3740 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 3741 // CHECK3-NEXT: store i16 0, i16* [[AA]], align 2 3742 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 3743 // CHECK3-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3744 // CHECK3-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 3745 // CHECK3-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4 3746 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 3747 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4 3748 // CHECK3-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]] 3749 // CHECK3-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8 3750 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4 3751 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 3752 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3753 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4 3754 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3755 // CHECK3-NEXT: [[TMP7:%.*]] = load i16, i16* [[AA]], align 2 3756 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 3757 // CHECK3-NEXT: store i16 [[TMP7]], i16* [[CONV]], align 2 3758 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[AA_CASTED]], align 4 3759 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3760 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 3761 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 3762 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3763 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4 3764 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4 3765 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3766 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 3767 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[TMP14]], align 4 3768 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3769 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32* 3770 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[TMP16]], align 4 3771 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3772 // CHECK3-NEXT: store i8* null, i8** [[TMP17]], align 4 3773 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3774 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 3775 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[TMP19]], align 4 3776 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3777 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 3778 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[TMP21]], align 4 3779 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3780 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 3781 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3782 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32* 3783 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[TMP24]], align 4 3784 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3785 // CHECK3-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 3786 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[TMP26]], align 4 3787 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3788 // CHECK3-NEXT: store i8* null, i8** [[TMP27]], align 4 3789 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3790 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3791 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0 3792 // CHECK3-NEXT: [[TMP31:%.*]] = load i16, i16* [[AA]], align 2 3793 // CHECK3-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 4 3794 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1 3795 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3796 // CHECK3-NEXT: store i32 [[TMP33]], i32* [[TMP32]], align 4 3797 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2 3798 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3799 // CHECK3-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4 3800 // CHECK3-NEXT: [[TMP36:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i32 72, i32 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 3801 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8* [[TMP36]] to %struct.kmp_task_t_with_privates* 3802 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 0 3803 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP38]], i32 0, i32 0 3804 // CHECK3-NEXT: [[TMP40:%.*]] = load i8*, i8** [[TMP39]], align 4 3805 // CHECK3-NEXT: [[TMP41:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8* 3806 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP40]], i8* align 4 [[TMP41]], i32 12, i1 false) 3807 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 1 3808 // CHECK3-NEXT: [[TMP43:%.*]] = bitcast i8* [[TMP40]] to %struct.anon* 3809 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 0 3810 // CHECK3-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[TMP44]] to i8* 3811 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 3812 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 1 3813 // CHECK3-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8* 3814 // CHECK3-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP28]] to i8* 3815 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP47]], i8* align 4 [[TMP48]], i32 12, i1 false) 3816 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 2 3817 // CHECK3-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8* 3818 // CHECK3-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP29]] to i8* 3819 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP50]], i8* align 4 [[TMP51]], i32 12, i1 false) 3820 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 3 3821 // CHECK3-NEXT: [[TMP53:%.*]] = load i16, i16* [[AA]], align 2 3822 // CHECK3-NEXT: store i16 [[TMP53]], i16* [[TMP52]], align 4 3823 // CHECK3-NEXT: [[TMP54:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP36]]) 3824 // CHECK3-NEXT: [[TMP55:%.*]] = load i32, i32* [[A]], align 4 3825 // CHECK3-NEXT: store i32 [[TMP55]], i32* [[A_CASTED]], align 4 3826 // CHECK3-NEXT: [[TMP56:%.*]] = load i32, i32* [[A_CASTED]], align 4 3827 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i32 [[TMP56]]) #[[ATTR3:[0-9]+]] 3828 // CHECK3-NEXT: [[TMP57:%.*]] = load i16, i16* [[AA]], align 2 3829 // CHECK3-NEXT: [[CONV5:%.*]] = bitcast i32* [[AA_CASTED4]] to i16* 3830 // CHECK3-NEXT: store i16 [[TMP57]], i16* [[CONV5]], align 2 3831 // CHECK3-NEXT: [[TMP58:%.*]] = load i32, i32* [[AA_CASTED4]], align 4 3832 // CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0 3833 // CHECK3-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32* 3834 // CHECK3-NEXT: store i32 [[TMP58]], i32* [[TMP60]], align 4 3835 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0 3836 // CHECK3-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32* 3837 // CHECK3-NEXT: store i32 [[TMP58]], i32* [[TMP62]], align 4 3838 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS8]], i32 0, i32 0 3839 // CHECK3-NEXT: store i8* null, i8** [[TMP63]], align 4 3840 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0 3841 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0 3842 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3843 // CHECK3-NEXT: [[TMP66:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3844 // CHECK3-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0 3845 // CHECK3-NEXT: br i1 [[TMP67]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3846 // CHECK3: omp_offload.failed: 3847 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i32 [[TMP58]]) #[[ATTR3]] 3848 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 3849 // CHECK3: omp_offload.cont: 3850 // CHECK3-NEXT: [[TMP68:%.*]] = load i32, i32* [[A]], align 4 3851 // CHECK3-NEXT: store i32 [[TMP68]], i32* [[A_CASTED9]], align 4 3852 // CHECK3-NEXT: [[TMP69:%.*]] = load i32, i32* [[A_CASTED9]], align 4 3853 // CHECK3-NEXT: [[TMP70:%.*]] = load i16, i16* [[AA]], align 2 3854 // CHECK3-NEXT: [[CONV11:%.*]] = bitcast i32* [[AA_CASTED10]] to i16* 3855 // CHECK3-NEXT: store i16 [[TMP70]], i16* [[CONV11]], align 2 3856 // CHECK3-NEXT: [[TMP71:%.*]] = load i32, i32* [[AA_CASTED10]], align 4 3857 // CHECK3-NEXT: [[TMP72:%.*]] = load i32, i32* [[N_ADDR]], align 4 3858 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP72]], 10 3859 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3860 // CHECK3: omp_if.then: 3861 // CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 3862 // CHECK3-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32* 3863 // CHECK3-NEXT: store i32 [[TMP69]], i32* [[TMP74]], align 4 3864 // CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 3865 // CHECK3-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 3866 // CHECK3-NEXT: store i32 [[TMP69]], i32* [[TMP76]], align 4 3867 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 0 3868 // CHECK3-NEXT: store i8* null, i8** [[TMP77]], align 4 3869 // CHECK3-NEXT: [[TMP78:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1 3870 // CHECK3-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 3871 // CHECK3-NEXT: store i32 [[TMP71]], i32* [[TMP79]], align 4 3872 // CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1 3873 // CHECK3-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32* 3874 // CHECK3-NEXT: store i32 [[TMP71]], i32* [[TMP81]], align 4 3875 // CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 1 3876 // CHECK3-NEXT: store i8* null, i8** [[TMP82]], align 4 3877 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 3878 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 3879 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3880 // CHECK3-NEXT: [[TMP85:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP83]], i8** [[TMP84]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3881 // CHECK3-NEXT: [[TMP86:%.*]] = icmp ne i32 [[TMP85]], 0 3882 // CHECK3-NEXT: br i1 [[TMP86]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 3883 // CHECK3: omp_offload.failed16: 3884 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]] 3885 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]] 3886 // CHECK3: omp_offload.cont17: 3887 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 3888 // CHECK3: omp_if.else: 3889 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]] 3890 // CHECK3-NEXT: br label [[OMP_IF_END]] 3891 // CHECK3: omp_if.end: 3892 // CHECK3-NEXT: [[TMP87:%.*]] = load i32, i32* [[N_ADDR]], align 4 3893 // CHECK3-NEXT: store i32 [[TMP87]], i32* [[DOTCAPTURE_EXPR_18]], align 4 3894 // CHECK3-NEXT: [[TMP88:%.*]] = load i32, i32* [[A]], align 4 3895 // CHECK3-NEXT: store i32 [[TMP88]], i32* [[A_CASTED19]], align 4 3896 // CHECK3-NEXT: [[TMP89:%.*]] = load i32, i32* [[A_CASTED19]], align 4 3897 // CHECK3-NEXT: [[TMP90:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4 3898 // CHECK3-NEXT: store i32 [[TMP90]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4 3899 // CHECK3-NEXT: [[TMP91:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4 3900 // CHECK3-NEXT: [[TMP92:%.*]] = load i32, i32* [[N_ADDR]], align 4 3901 // CHECK3-NEXT: [[CMP21:%.*]] = icmp sgt i32 [[TMP92]], 20 3902 // CHECK3-NEXT: br i1 [[CMP21]], label [[OMP_IF_THEN22:%.*]], label [[OMP_IF_ELSE29:%.*]] 3903 // CHECK3: omp_if.then22: 3904 // CHECK3-NEXT: [[TMP93:%.*]] = mul nuw i32 [[TMP1]], 4 3905 // CHECK3-NEXT: [[TMP94:%.*]] = sext i32 [[TMP93]] to i64 3906 // CHECK3-NEXT: [[TMP95:%.*]] = mul nuw i32 5, [[TMP3]] 3907 // CHECK3-NEXT: [[TMP96:%.*]] = mul nuw i32 [[TMP95]], 8 3908 // CHECK3-NEXT: [[TMP97:%.*]] = sext i32 [[TMP96]] to i64 3909 // CHECK3-NEXT: [[TMP98:%.*]] = bitcast [10 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3910 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP98]], i8* align 4 bitcast ([10 x i64]* @.offload_sizes.10 to i8*), i32 80, i1 false) 3911 // CHECK3-NEXT: [[TMP99:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0 3912 // CHECK3-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to i32* 3913 // CHECK3-NEXT: store i32 [[TMP89]], i32* [[TMP100]], align 4 3914 // CHECK3-NEXT: [[TMP101:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0 3915 // CHECK3-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i32* 3916 // CHECK3-NEXT: store i32 [[TMP89]], i32* [[TMP102]], align 4 3917 // CHECK3-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0 3918 // CHECK3-NEXT: store i8* null, i8** [[TMP103]], align 4 3919 // CHECK3-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1 3920 // CHECK3-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]** 3921 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 4 3922 // CHECK3-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1 3923 // CHECK3-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]** 3924 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 4 3925 // CHECK3-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1 3926 // CHECK3-NEXT: store i8* null, i8** [[TMP108]], align 4 3927 // CHECK3-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2 3928 // CHECK3-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 3929 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP110]], align 4 3930 // CHECK3-NEXT: [[TMP111:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2 3931 // CHECK3-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 3932 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP112]], align 4 3933 // CHECK3-NEXT: [[TMP113:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 2 3934 // CHECK3-NEXT: store i8* null, i8** [[TMP113]], align 4 3935 // CHECK3-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3 3936 // CHECK3-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to float** 3937 // CHECK3-NEXT: store float* [[VLA]], float** [[TMP115]], align 4 3938 // CHECK3-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3 3939 // CHECK3-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float** 3940 // CHECK3-NEXT: store float* [[VLA]], float** [[TMP117]], align 4 3941 // CHECK3-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 3942 // CHECK3-NEXT: store i64 [[TMP94]], i64* [[TMP118]], align 4 3943 // CHECK3-NEXT: [[TMP119:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 3 3944 // CHECK3-NEXT: store i8* null, i8** [[TMP119]], align 4 3945 // CHECK3-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 4 3946 // CHECK3-NEXT: [[TMP121:%.*]] = bitcast i8** [[TMP120]] to [5 x [10 x double]]** 3947 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP121]], align 4 3948 // CHECK3-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 4 3949 // CHECK3-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]** 3950 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 4 3951 // CHECK3-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 4 3952 // CHECK3-NEXT: store i8* null, i8** [[TMP124]], align 4 3953 // CHECK3-NEXT: [[TMP125:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 5 3954 // CHECK3-NEXT: [[TMP126:%.*]] = bitcast i8** [[TMP125]] to i32* 3955 // CHECK3-NEXT: store i32 5, i32* [[TMP126]], align 4 3956 // CHECK3-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 5 3957 // CHECK3-NEXT: [[TMP128:%.*]] = bitcast i8** [[TMP127]] to i32* 3958 // CHECK3-NEXT: store i32 5, i32* [[TMP128]], align 4 3959 // CHECK3-NEXT: [[TMP129:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 5 3960 // CHECK3-NEXT: store i8* null, i8** [[TMP129]], align 4 3961 // CHECK3-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 6 3962 // CHECK3-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i32* 3963 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP131]], align 4 3964 // CHECK3-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 6 3965 // CHECK3-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i32* 3966 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP133]], align 4 3967 // CHECK3-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 6 3968 // CHECK3-NEXT: store i8* null, i8** [[TMP134]], align 4 3969 // CHECK3-NEXT: [[TMP135:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 7 3970 // CHECK3-NEXT: [[TMP136:%.*]] = bitcast i8** [[TMP135]] to double** 3971 // CHECK3-NEXT: store double* [[VLA1]], double** [[TMP136]], align 4 3972 // CHECK3-NEXT: [[TMP137:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 7 3973 // CHECK3-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to double** 3974 // CHECK3-NEXT: store double* [[VLA1]], double** [[TMP138]], align 4 3975 // CHECK3-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 3976 // CHECK3-NEXT: store i64 [[TMP97]], i64* [[TMP139]], align 4 3977 // CHECK3-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 7 3978 // CHECK3-NEXT: store i8* null, i8** [[TMP140]], align 4 3979 // CHECK3-NEXT: [[TMP141:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 8 3980 // CHECK3-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to %struct.TT** 3981 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP142]], align 4 3982 // CHECK3-NEXT: [[TMP143:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 8 3983 // CHECK3-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to %struct.TT** 3984 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP144]], align 4 3985 // CHECK3-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 8 3986 // CHECK3-NEXT: store i8* null, i8** [[TMP145]], align 4 3987 // CHECK3-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 9 3988 // CHECK3-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 3989 // CHECK3-NEXT: store i32 [[TMP91]], i32* [[TMP147]], align 4 3990 // CHECK3-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 9 3991 // CHECK3-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 3992 // CHECK3-NEXT: store i32 [[TMP91]], i32* [[TMP149]], align 4 3993 // CHECK3-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 9 3994 // CHECK3-NEXT: store i8* null, i8** [[TMP150]], align 4 3995 // CHECK3-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0 3996 // CHECK3-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0 3997 // CHECK3-NEXT: [[TMP153:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3998 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3999 // CHECK3-NEXT: [[TMP154:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP151]], i8** [[TMP152]], i64* [[TMP153]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4000 // CHECK3-NEXT: [[TMP155:%.*]] = icmp ne i32 [[TMP154]], 0 4001 // CHECK3-NEXT: br i1 [[TMP155]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 4002 // CHECK3: omp_offload.failed27: 4003 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]] 4004 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT28]] 4005 // CHECK3: omp_offload.cont28: 4006 // CHECK3-NEXT: br label [[OMP_IF_END30:%.*]] 4007 // CHECK3: omp_if.else29: 4008 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]] 4009 // CHECK3-NEXT: br label [[OMP_IF_END30]] 4010 // CHECK3: omp_if.end30: 4011 // CHECK3-NEXT: [[TMP156:%.*]] = load i32, i32* [[A]], align 4 4012 // CHECK3-NEXT: [[TMP157:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4013 // CHECK3-NEXT: call void @llvm.stackrestore(i8* [[TMP157]]) 4014 // CHECK3-NEXT: ret i32 [[TMP156]] 4015 // 4016 // 4017 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 4018 // CHECK3-SAME: (i32 noundef [[AA:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] { 4019 // CHECK3-NEXT: entry: 4020 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 4021 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4022 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 4023 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 4024 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 4025 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 4026 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4027 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 4028 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 4029 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4030 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 4031 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 4032 // CHECK3-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 4033 // CHECK3-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 4034 // CHECK3-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 4035 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 4036 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]]) 4037 // CHECK3-NEXT: ret void 4038 // 4039 // 4040 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 4041 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 4042 // CHECK3-NEXT: entry: 4043 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4044 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4045 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 4046 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4047 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4048 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4049 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4050 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4051 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4052 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4053 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4054 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4055 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 4056 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 4057 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4058 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4059 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4060 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4061 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4062 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4063 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4064 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4065 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 4066 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4067 // CHECK3: cond.true: 4068 // CHECK3-NEXT: br label [[COND_END:%.*]] 4069 // CHECK3: cond.false: 4070 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4071 // CHECK3-NEXT: br label [[COND_END]] 4072 // CHECK3: cond.end: 4073 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4074 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4075 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4076 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4077 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4078 // CHECK3: omp.inner.for.cond: 4079 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4080 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4081 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4082 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4083 // CHECK3: omp.inner.for.body: 4084 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4085 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 4086 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4087 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4088 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4089 // CHECK3: omp.body.continue: 4090 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4091 // CHECK3: omp.inner.for.inc: 4092 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4093 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 4094 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4095 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4096 // CHECK3: omp.inner.for.end: 4097 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4098 // CHECK3: omp.loop.exit: 4099 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4100 // CHECK3-NEXT: ret void 4101 // 4102 // 4103 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_privates_map. 4104 // CHECK3-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i16** noalias noundef [[TMP1:%.*]], [3 x i8*]** noalias noundef [[TMP2:%.*]], [3 x i8*]** noalias noundef [[TMP3:%.*]], [3 x i64]** noalias noundef [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] { 4105 // CHECK3-NEXT: entry: 4106 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 4 4107 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 4 4108 // CHECK3-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 4 4109 // CHECK3-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 4 4110 // CHECK3-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 4 4111 // CHECK3-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 4 4112 // CHECK3-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 4 4113 // CHECK3-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 4 4114 // CHECK3-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 4 4115 // CHECK3-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 4 4116 // CHECK3-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 4 4117 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0 4118 // CHECK3-NEXT: [[TMP7:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 4 4119 // CHECK3-NEXT: store [3 x i64]* [[TMP6]], [3 x i64]** [[TMP7]], align 4 4120 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1 4121 // CHECK3-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 4 4122 // CHECK3-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 4 4123 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2 4124 // CHECK3-NEXT: [[TMP11:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 4 4125 // CHECK3-NEXT: store [3 x i8*]* [[TMP10]], [3 x i8*]** [[TMP11]], align 4 4126 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3 4127 // CHECK3-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 4 4128 // CHECK3-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 4 4129 // CHECK3-NEXT: ret void 4130 // 4131 // 4132 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry. 4133 // CHECK3-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] { 4134 // CHECK3-NEXT: entry: 4135 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 4136 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4 4137 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4 4138 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4 4139 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4 4140 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 4 4141 // CHECK3-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 4 4142 // CHECK3-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 4 4143 // CHECK3-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 4 4144 // CHECK3-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 4 4145 // CHECK3-NEXT: [[AA_CASTED_I:%.*]] = alloca i32, align 4 4146 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i32, align 4 4147 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED4_I:%.*]] = alloca i32, align 4 4148 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 4149 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4 4150 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 4151 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 4152 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 4153 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 4154 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 4155 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 4156 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 4157 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 4158 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 4159 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1 4160 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 4161 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 4162 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]]) 4163 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]]) 4164 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]]) 4165 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 4166 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22 4167 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22 4168 // CHECK3-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 4169 // CHECK3-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 4170 // CHECK3-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22 4171 // CHECK3-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 4172 // CHECK3-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 4173 // CHECK3-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 4174 // CHECK3-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 4175 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* 4176 // CHECK3-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]] 4177 // CHECK3-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 4, !noalias !22 4178 // CHECK3-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 4, !noalias !22 4179 // CHECK3-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 4, !noalias !22 4180 // CHECK3-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 4, !noalias !22 4181 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i32 0, i32 0 4182 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i32 0, i32 0 4183 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i32 0, i32 0 4184 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1 4185 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2 4186 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4 4187 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4 4188 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]] 4189 // CHECK3-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]] 4190 // CHECK3-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 4191 // CHECK3-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 4192 // CHECK3: omp_offload.failed.i: 4193 // CHECK3-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2 4194 // CHECK3-NEXT: [[CONV_I:%.*]] = bitcast i32* [[AA_CASTED_I]] to i16* 4195 // CHECK3-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !22 4196 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[AA_CASTED_I]], align 4, !noalias !22 4197 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4 4198 // CHECK3-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22 4199 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22 4200 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4 4201 // CHECK3-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22 4202 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22 4203 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i32 [[TMP30]], i32 [[TMP32]], i32 [[TMP34]]) #[[ATTR3]] 4204 // CHECK3-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 4205 // CHECK3: .omp_outlined..1.exit: 4206 // CHECK3-NEXT: ret i32 0 4207 // 4208 // 4209 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107 4210 // CHECK3-SAME: (i32 noundef [[A:%.*]]) #[[ATTR2]] { 4211 // CHECK3-NEXT: entry: 4212 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4213 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 4214 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4215 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4216 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 4217 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 4218 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 4219 // CHECK3-NEXT: ret void 4220 // 4221 // 4222 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 4223 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR2]] { 4224 // CHECK3-NEXT: entry: 4225 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4226 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4227 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4228 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4229 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4230 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4231 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4232 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4233 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4234 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4235 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4236 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4237 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4238 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4239 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4240 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4241 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4242 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4243 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4244 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4245 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4246 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 4247 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4248 // CHECK3: cond.true: 4249 // CHECK3-NEXT: br label [[COND_END:%.*]] 4250 // CHECK3: cond.false: 4251 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4252 // CHECK3-NEXT: br label [[COND_END]] 4253 // CHECK3: cond.end: 4254 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4255 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4256 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4257 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4258 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4259 // CHECK3: omp.inner.for.cond: 4260 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4261 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4262 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4263 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4264 // CHECK3: omp.inner.for.body: 4265 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4266 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 4267 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4268 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4269 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 4270 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 4271 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 4272 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4273 // CHECK3: omp.body.continue: 4274 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4275 // CHECK3: omp.inner.for.inc: 4276 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4277 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 4278 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4279 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4280 // CHECK3: omp.inner.for.end: 4281 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4282 // CHECK3: omp.loop.exit: 4283 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4284 // CHECK3-NEXT: ret void 4285 // 4286 // 4287 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 4288 // CHECK3-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR2]] { 4289 // CHECK3-NEXT: entry: 4290 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 4291 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 4292 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 4293 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 4294 // CHECK3-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 4295 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 4296 // CHECK3-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 4297 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4 4298 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 4299 // CHECK3-NEXT: ret void 4300 // 4301 // 4302 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 4303 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 4304 // CHECK3-NEXT: entry: 4305 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4306 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4307 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 4308 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4309 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4310 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4311 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4312 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4313 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4314 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4315 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4316 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4317 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 4318 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 4319 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4320 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4321 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4322 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4323 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4324 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4325 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4326 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4327 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 4328 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4329 // CHECK3: cond.true: 4330 // CHECK3-NEXT: br label [[COND_END:%.*]] 4331 // CHECK3: cond.false: 4332 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4333 // CHECK3-NEXT: br label [[COND_END]] 4334 // CHECK3: cond.end: 4335 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4336 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4337 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4338 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4339 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4340 // CHECK3: omp.inner.for.cond: 4341 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4342 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4343 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4344 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4345 // CHECK3: omp.inner.for.body: 4346 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4347 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 4348 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4349 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4350 // CHECK3-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 4351 // CHECK3-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 4352 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 4353 // CHECK3-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 4354 // CHECK3-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 4355 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4356 // CHECK3: omp.body.continue: 4357 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4358 // CHECK3: omp.inner.for.inc: 4359 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4360 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 4361 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 4362 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4363 // CHECK3: omp.inner.for.end: 4364 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4365 // CHECK3: omp.loop.exit: 4366 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4367 // CHECK3-NEXT: ret void 4368 // 4369 // 4370 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 4371 // CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 4372 // CHECK3-NEXT: entry: 4373 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4374 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 4375 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 4376 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 4377 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4378 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 4379 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 4380 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4381 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 4382 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 4383 // CHECK3-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 2 4384 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 4385 // CHECK3-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 4386 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 4387 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]]) 4388 // CHECK3-NEXT: ret void 4389 // 4390 // 4391 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6 4392 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 4393 // CHECK3-NEXT: entry: 4394 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4395 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4396 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4397 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 4398 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4399 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4400 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4401 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4402 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4403 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4404 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4405 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4406 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4407 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4408 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 4409 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 4410 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4411 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4412 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4413 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4414 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4415 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4416 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4417 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4418 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 4419 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4420 // CHECK3: cond.true: 4421 // CHECK3-NEXT: br label [[COND_END:%.*]] 4422 // CHECK3: cond.false: 4423 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4424 // CHECK3-NEXT: br label [[COND_END]] 4425 // CHECK3: cond.end: 4426 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4427 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4428 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4429 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4430 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4431 // CHECK3: omp.inner.for.cond: 4432 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4433 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4434 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4435 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4436 // CHECK3: omp.inner.for.body: 4437 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4438 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 4439 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4440 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4441 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 4442 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 4443 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 4444 // CHECK3-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 2 4445 // CHECK3-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32 4446 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 4447 // CHECK3-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 4448 // CHECK3-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 4449 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4450 // CHECK3: omp.body.continue: 4451 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4452 // CHECK3: omp.inner.for.inc: 4453 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4454 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 4455 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4456 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4457 // CHECK3: omp.inner.for.end: 4458 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4459 // CHECK3: omp.loop.exit: 4460 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4461 // CHECK3-NEXT: ret void 4462 // 4463 // 4464 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 4465 // CHECK3-SAME: (i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4466 // CHECK3-NEXT: entry: 4467 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4468 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 4469 // CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4470 // CHECK3-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 4471 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 4472 // CHECK3-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 4473 // CHECK3-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 4474 // CHECK3-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 4475 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 4476 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4477 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 4478 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4479 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4480 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 4481 // CHECK3-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4482 // CHECK3-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 4483 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 4484 // CHECK3-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 4485 // CHECK3-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 4486 // CHECK3-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 4487 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 4488 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4489 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 4490 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4491 // CHECK3-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 4492 // CHECK3-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 4493 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 4494 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 4495 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 4496 // CHECK3-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 4497 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 4498 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4 4499 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4 4500 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4501 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4502 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4503 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]]) 4504 // CHECK3-NEXT: ret void 4505 // 4506 // 4507 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..9 4508 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4509 // CHECK3-NEXT: entry: 4510 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4511 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4512 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4513 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 4514 // CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4515 // CHECK3-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 4516 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 4517 // CHECK3-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 4518 // CHECK3-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 4519 // CHECK3-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 4520 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 4521 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4522 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4523 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4524 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4525 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4526 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4527 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4528 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4529 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4530 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4531 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4532 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 4533 // CHECK3-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4534 // CHECK3-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 4535 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 4536 // CHECK3-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 4537 // CHECK3-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 4538 // CHECK3-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 4539 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 4540 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4541 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 4542 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4543 // CHECK3-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 4544 // CHECK3-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 4545 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 4546 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 4547 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 4548 // CHECK3-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 4549 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4550 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4551 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4552 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4553 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4554 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4555 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 4556 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 4557 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4558 // CHECK3: omp.dispatch.cond: 4559 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4560 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 4561 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4562 // CHECK3: cond.true: 4563 // CHECK3-NEXT: br label [[COND_END:%.*]] 4564 // CHECK3: cond.false: 4565 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4566 // CHECK3-NEXT: br label [[COND_END]] 4567 // CHECK3: cond.end: 4568 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4569 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4570 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4571 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4572 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4573 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4574 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4575 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4576 // CHECK3: omp.dispatch.body: 4577 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4578 // CHECK3: omp.inner.for.cond: 4579 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 4580 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 4581 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 4582 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4583 // CHECK3: omp.inner.for.body: 4584 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 4585 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 4586 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4587 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23 4588 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !23 4589 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 4590 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !23 4591 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2 4592 // CHECK3-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !23 4593 // CHECK3-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 4594 // CHECK3-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00 4595 // CHECK3-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float 4596 // CHECK3-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !23 4597 // CHECK3-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3 4598 // CHECK3-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !23 4599 // CHECK3-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double 4600 // CHECK3-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00 4601 // CHECK3-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 4602 // CHECK3-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !23 4603 // CHECK3-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1 4604 // CHECK3-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2 4605 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !23 4606 // CHECK3-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00 4607 // CHECK3-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !23 4608 // CHECK3-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]] 4609 // CHECK3-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]] 4610 // CHECK3-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3 4611 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !23 4612 // CHECK3-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00 4613 // CHECK3-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !23 4614 // CHECK3-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 4615 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !23 4616 // CHECK3-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1 4617 // CHECK3-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !23 4618 // CHECK3-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 4619 // CHECK3-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !23 4620 // CHECK3-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32 4621 // CHECK3-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1 4622 // CHECK3-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8 4623 // CHECK3-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !23 4624 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4625 // CHECK3: omp.body.continue: 4626 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4627 // CHECK3: omp.inner.for.inc: 4628 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 4629 // CHECK3-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1 4630 // CHECK3-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 4631 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 4632 // CHECK3: omp.inner.for.end: 4633 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4634 // CHECK3: omp.dispatch.inc: 4635 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4636 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4637 // CHECK3-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 4638 // CHECK3-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4 4639 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4640 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4641 // CHECK3-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 4642 // CHECK3-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4 4643 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 4644 // CHECK3: omp.dispatch.end: 4645 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 4646 // CHECK3-NEXT: ret void 4647 // 4648 // 4649 // CHECK3-LABEL: define {{[^@]+}}@_Z3bari 4650 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 4651 // CHECK3-NEXT: entry: 4652 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4653 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 4654 // CHECK3-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 4655 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4656 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 4657 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 4658 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooi(i32 noundef [[TMP0]]) 4659 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 4660 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 4661 // CHECK3-NEXT: store i32 [[ADD]], i32* [[A]], align 4 4662 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4663 // CHECK3-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZN2S12r1Ei(%struct.S1* noundef nonnull align 4 dereferenceable(8) [[S]], i32 noundef [[TMP2]]) 4664 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 4665 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 4666 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 4667 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 4668 // CHECK3-NEXT: [[CALL3:%.*]] = call noundef i32 @_ZL7fstatici(i32 noundef [[TMP4]]) 4669 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 4670 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 4671 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 4672 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 4673 // CHECK3-NEXT: [[CALL5:%.*]] = call noundef i32 @_Z9ftemplateIiET_i(i32 noundef [[TMP6]]) 4674 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 4675 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 4676 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 4677 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 4678 // CHECK3-NEXT: ret i32 [[TMP8]] 4679 // 4680 // 4681 // CHECK3-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 4682 // CHECK3-SAME: (%struct.S1* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[N:%.*]]) #[[ATTR0]] comdat align 2 { 4683 // CHECK3-NEXT: entry: 4684 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 4685 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4686 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 4687 // CHECK3-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4688 // CHECK3-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4689 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 4690 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 4691 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 4692 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 4693 // CHECK3-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 4694 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4695 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 4696 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4697 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 4698 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 4699 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 4700 // CHECK3-NEXT: store i32 [[ADD]], i32* [[B]], align 4 4701 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 4702 // CHECK3-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 4703 // CHECK3-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 4704 // CHECK3-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]] 4705 // CHECK3-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2 4706 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 4707 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4 4708 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 4709 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 4710 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 4711 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60 4712 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 4713 // CHECK3: omp_if.then: 4714 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 4715 // CHECK3-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]] 4716 // CHECK3-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2 4717 // CHECK3-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 4718 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 4719 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes.13 to i8*), i32 40, i1 false) 4720 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4721 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to %struct.S1** 4722 // CHECK3-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP12]], align 4 4723 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4724 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to double** 4725 // CHECK3-NEXT: store double* [[A]], double** [[TMP14]], align 4 4726 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4727 // CHECK3-NEXT: store i8* null, i8** [[TMP15]], align 4 4728 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4729 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 4730 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4 4731 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4732 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 4733 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4 4734 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4735 // CHECK3-NEXT: store i8* null, i8** [[TMP20]], align 4 4736 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4737 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32* 4738 // CHECK3-NEXT: store i32 2, i32* [[TMP22]], align 4 4739 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4740 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32* 4741 // CHECK3-NEXT: store i32 2, i32* [[TMP24]], align 4 4742 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4743 // CHECK3-NEXT: store i8* null, i8** [[TMP25]], align 4 4744 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4745 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 4746 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP27]], align 4 4747 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4748 // CHECK3-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32* 4749 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4 4750 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4751 // CHECK3-NEXT: store i8* null, i8** [[TMP30]], align 4 4752 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 4753 // CHECK3-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i16** 4754 // CHECK3-NEXT: store i16* [[VLA]], i16** [[TMP32]], align 4 4755 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 4756 // CHECK3-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i16** 4757 // CHECK3-NEXT: store i16* [[VLA]], i16** [[TMP34]], align 4 4758 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 4759 // CHECK3-NEXT: store i64 [[TMP9]], i64* [[TMP35]], align 4 4760 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 4761 // CHECK3-NEXT: store i8* null, i8** [[TMP36]], align 4 4762 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4763 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4764 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4765 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4766 // CHECK3-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP37]], i8** [[TMP38]], i64* [[TMP39]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.14, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4767 // CHECK3-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 4768 // CHECK3-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4769 // CHECK3: omp_offload.failed: 4770 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 4771 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 4772 // CHECK3: omp_offload.cont: 4773 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 4774 // CHECK3: omp_if.else: 4775 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 4776 // CHECK3-NEXT: br label [[OMP_IF_END]] 4777 // CHECK3: omp_if.end: 4778 // CHECK3-NEXT: [[TMP42:%.*]] = mul nsw i32 1, [[TMP1]] 4779 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP42]] 4780 // CHECK3-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 4781 // CHECK3-NEXT: [[TMP43:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 4782 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP43]] to i32 4783 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[B]], align 4 4784 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP44]] 4785 // CHECK3-NEXT: [[TMP45:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4786 // CHECK3-NEXT: call void @llvm.stackrestore(i8* [[TMP45]]) 4787 // CHECK3-NEXT: ret i32 [[ADD3]] 4788 // 4789 // 4790 // CHECK3-LABEL: define {{[^@]+}}@_ZL7fstatici 4791 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 4792 // CHECK3-NEXT: entry: 4793 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4794 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 4795 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 4796 // CHECK3-NEXT: [[AAA:%.*]] = alloca i8, align 1 4797 // CHECK3-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 4798 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4799 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 4800 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 4801 // CHECK3-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 4802 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 4803 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 4804 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 4805 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4806 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4807 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4808 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 4809 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4810 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 4811 // CHECK3-NEXT: store i16 0, i16* [[AA]], align 2 4812 // CHECK3-NEXT: store i8 0, i8* [[AAA]], align 1 4813 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 4814 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4 4815 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4 4816 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 4817 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[A_CASTED]], align 4 4818 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_CASTED]], align 4 4819 // CHECK3-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2 4820 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 4821 // CHECK3-NEXT: store i16 [[TMP4]], i16* [[CONV]], align 2 4822 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[AA_CASTED]], align 4 4823 // CHECK3-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1 4824 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 4825 // CHECK3-NEXT: store i8 [[TMP6]], i8* [[CONV1]], align 1 4826 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 4827 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4 4828 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50 4829 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 4830 // CHECK3: omp_if.then: 4831 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4832 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4833 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4 4834 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4835 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 4836 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP12]], align 4 4837 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4838 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 4839 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4840 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 4841 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 4842 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4843 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 4844 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP17]], align 4 4845 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4846 // CHECK3-NEXT: store i8* null, i8** [[TMP18]], align 4 4847 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4848 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 4849 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4 4850 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4851 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32* 4852 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP22]], align 4 4853 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4854 // CHECK3-NEXT: store i8* null, i8** [[TMP23]], align 4 4855 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4856 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 4857 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[TMP25]], align 4 4858 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4859 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 4860 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[TMP27]], align 4 4861 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4862 // CHECK3-NEXT: store i8* null, i8** [[TMP28]], align 4 4863 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 4864 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]** 4865 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 4 4866 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 4867 // CHECK3-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]** 4868 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 4 4869 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 4870 // CHECK3-NEXT: store i8* null, i8** [[TMP33]], align 4 4871 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4872 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4873 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4 4874 // CHECK3-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4 4875 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 4876 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_2]], align 4 4877 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4878 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4879 // CHECK3-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]] 4880 // CHECK3-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 4881 // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 4882 // CHECK3-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 4883 // CHECK3-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 4884 // CHECK3-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 4885 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4886 // CHECK3-NEXT: [[ADD6:%.*]] = add i32 [[TMP40]], 1 4887 // CHECK3-NEXT: [[TMP41:%.*]] = zext i32 [[ADD6]] to i64 4888 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]]) 4889 // CHECK3-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4890 // CHECK3-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 4891 // CHECK3-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4892 // CHECK3: omp_offload.failed: 4893 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 4894 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 4895 // CHECK3: omp_offload.cont: 4896 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 4897 // CHECK3: omp_if.else: 4898 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 4899 // CHECK3-NEXT: br label [[OMP_IF_END]] 4900 // CHECK3: omp_if.end: 4901 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4 4902 // CHECK3-NEXT: ret i32 [[TMP44]] 4903 // 4904 // 4905 // CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 4906 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] comdat { 4907 // CHECK3-NEXT: entry: 4908 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4909 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 4910 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 4911 // CHECK3-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 4912 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 4913 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 4914 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4915 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4916 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4917 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4918 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4919 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 4920 // CHECK3-NEXT: store i16 0, i16* [[AA]], align 2 4921 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 4922 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 4923 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 4924 // CHECK3-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 4925 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 4926 // CHECK3-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 4927 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 4928 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 4929 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 4930 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 4931 // CHECK3: omp_if.then: 4932 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4933 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 4934 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 4935 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4936 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 4937 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 4938 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4939 // CHECK3-NEXT: store i8* null, i8** [[TMP9]], align 4 4940 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4941 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 4942 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 4943 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4944 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 4945 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 4946 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4947 // CHECK3-NEXT: store i8* null, i8** [[TMP14]], align 4 4948 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4949 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 4950 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4 4951 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4952 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 4953 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4 4954 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4955 // CHECK3-NEXT: store i8* null, i8** [[TMP19]], align 4 4956 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4957 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4958 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4959 // CHECK3-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4960 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 4961 // CHECK3-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4962 // CHECK3: omp_offload.failed: 4963 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 4964 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 4965 // CHECK3: omp_offload.cont: 4966 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 4967 // CHECK3: omp_if.else: 4968 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 4969 // CHECK3-NEXT: br label [[OMP_IF_END]] 4970 // CHECK3: omp_if.end: 4971 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 4972 // CHECK3-NEXT: ret i32 [[TMP24]] 4973 // 4974 // 4975 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 4976 // CHECK3-SAME: (%struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 4977 // CHECK3-NEXT: entry: 4978 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 4979 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 4980 // CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4981 // CHECK3-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 4982 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 4983 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 4984 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 4985 // CHECK3-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 4986 // CHECK3-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4987 // CHECK3-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 4988 // CHECK3-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 4989 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 4990 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4991 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 4992 // CHECK3-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 4993 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4 4994 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 4995 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 4996 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..12 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]]) 4997 // CHECK3-NEXT: ret void 4998 // 4999 // 5000 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..12 5001 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 5002 // CHECK3-NEXT: entry: 5003 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5004 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5005 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 5006 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 5007 // CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 5008 // CHECK3-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 5009 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 5010 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5011 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5012 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5013 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5014 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5015 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5016 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5017 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5018 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5019 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 5020 // CHECK3-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 5021 // CHECK3-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 5022 // CHECK3-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 5023 // CHECK3-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 5024 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 5025 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 5026 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 5027 // CHECK3-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 5028 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5029 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5030 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5031 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5032 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5033 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 5034 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5035 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5036 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 5037 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5038 // CHECK3: cond.true: 5039 // CHECK3-NEXT: br label [[COND_END:%.*]] 5040 // CHECK3: cond.false: 5041 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5042 // CHECK3-NEXT: br label [[COND_END]] 5043 // CHECK3: cond.end: 5044 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 5045 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5046 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5047 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 5048 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5049 // CHECK3: omp.inner.for.cond: 5050 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5051 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5052 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 5053 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5054 // CHECK3: omp.inner.for.body: 5055 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5056 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 5057 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5058 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5059 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4 5060 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double 5061 // CHECK3-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00 5062 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 5063 // CHECK3-NEXT: store double [[ADD4]], double* [[A]], align 4 5064 // CHECK3-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 5065 // CHECK3-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4 5066 // CHECK3-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 5067 // CHECK3-NEXT: store double [[INC]], double* [[A5]], align 4 5068 // CHECK3-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16 5069 // CHECK3-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]] 5070 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]] 5071 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 5072 // CHECK3-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2 5073 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5074 // CHECK3: omp.body.continue: 5075 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5076 // CHECK3: omp.inner.for.inc: 5077 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5078 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 5079 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 5080 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5081 // CHECK3: omp.inner.for.end: 5082 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5083 // CHECK3: omp.loop.exit: 5084 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 5085 // CHECK3-NEXT: ret void 5086 // 5087 // 5088 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 5089 // CHECK3-SAME: (i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 5090 // CHECK3-NEXT: entry: 5091 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5092 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5093 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5094 // CHECK3-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 5095 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 5096 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 5097 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 5098 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 5099 // CHECK3-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 5100 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5101 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5102 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5103 // CHECK3-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 5104 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 5105 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5106 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 5107 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 5108 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 5109 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 5110 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 5111 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4 5112 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4 5113 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4 5114 // CHECK3-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 2 5115 // CHECK3-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 5116 // CHECK3-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2 5117 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4 5118 // CHECK3-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 1 5119 // CHECK3-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 5120 // CHECK3-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1 5121 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 5122 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]]) 5123 // CHECK3-NEXT: ret void 5124 // 5125 // 5126 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15 5127 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 5128 // CHECK3-NEXT: entry: 5129 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5130 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5131 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5132 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5133 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5134 // CHECK3-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 5135 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 5136 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5137 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5138 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5139 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5140 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 5141 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5142 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5143 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5144 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5145 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5146 // CHECK3-NEXT: [[I6:%.*]] = alloca i32, align 4 5147 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5148 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5149 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5150 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5151 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5152 // CHECK3-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 5153 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 5154 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5155 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 5156 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 5157 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 5158 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 5159 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 5160 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5161 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5162 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5163 // CHECK3-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 5164 // CHECK3-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 5165 // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 5166 // CHECK3-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 5167 // CHECK3-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 5168 // CHECK3-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 5169 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5170 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 5171 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5172 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5173 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 5174 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5175 // CHECK3: omp.precond.then: 5176 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5177 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 5178 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 5179 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5180 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5181 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5182 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 5183 // CHECK3-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5184 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5185 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 5186 // CHECK3-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 5187 // CHECK3-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5188 // CHECK3: cond.true: 5189 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 5190 // CHECK3-NEXT: br label [[COND_END:%.*]] 5191 // CHECK3: cond.false: 5192 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5193 // CHECK3-NEXT: br label [[COND_END]] 5194 // CHECK3: cond.end: 5195 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 5196 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5197 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5198 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 5199 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5200 // CHECK3: omp.inner.for.cond: 5201 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5202 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5203 // CHECK3-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1 5204 // CHECK3-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]] 5205 // CHECK3-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5206 // CHECK3: omp.inner.for.body: 5207 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5208 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5209 // CHECK3-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 5210 // CHECK3-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]] 5211 // CHECK3-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4 5212 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4 5213 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 5214 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4 5215 // CHECK3-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 2 5216 // CHECK3-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32 5217 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1 5218 // CHECK3-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16 5219 // CHECK3-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 2 5220 // CHECK3-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 1 5221 // CHECK3-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32 5222 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1 5223 // CHECK3-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8 5224 // CHECK3-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 1 5225 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 5226 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 5227 // CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1 5228 // CHECK3-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4 5229 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5230 // CHECK3: omp.body.continue: 5231 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5232 // CHECK3: omp.inner.for.inc: 5233 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5234 // CHECK3-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1 5235 // CHECK3-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 5236 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5237 // CHECK3: omp.inner.for.end: 5238 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5239 // CHECK3: omp.loop.exit: 5240 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5241 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 5242 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 5243 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 5244 // CHECK3: omp.precond.end: 5245 // CHECK3-NEXT: ret void 5246 // 5247 // 5248 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 5249 // CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 5250 // CHECK3-NEXT: entry: 5251 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5252 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5253 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 5254 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 5255 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 5256 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5257 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5258 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 5259 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5260 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 5261 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 5262 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4 5263 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4 5264 // CHECK3-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 5265 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 5266 // CHECK3-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2 5267 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 5268 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]]) 5269 // CHECK3-NEXT: ret void 5270 // 5271 // 5272 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..18 5273 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 5274 // CHECK3-NEXT: entry: 5275 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5276 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5277 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5278 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5279 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 5280 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5281 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5282 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5283 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5284 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5285 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5286 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5287 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5288 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5289 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5290 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5291 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 5292 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5293 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 5294 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5295 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5296 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5297 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5298 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5299 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5300 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5301 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5302 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5303 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5304 // CHECK3: cond.true: 5305 // CHECK3-NEXT: br label [[COND_END:%.*]] 5306 // CHECK3: cond.false: 5307 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5308 // CHECK3-NEXT: br label [[COND_END]] 5309 // CHECK3: cond.end: 5310 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5311 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5312 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5313 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5314 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5315 // CHECK3: omp.inner.for.cond: 5316 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5317 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5318 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5319 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5320 // CHECK3: omp.inner.for.body: 5321 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5322 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5323 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5324 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5325 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 5326 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1 5327 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 5328 // CHECK3-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 2 5329 // CHECK3-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32 5330 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 5331 // CHECK3-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 5332 // CHECK3-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 5333 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 5334 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 5335 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1 5336 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 5337 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5338 // CHECK3: omp.body.continue: 5339 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5340 // CHECK3: omp.inner.for.inc: 5341 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5342 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 5343 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 5344 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5345 // CHECK3: omp.inner.for.end: 5346 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5347 // CHECK3: omp.loop.exit: 5348 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5349 // CHECK3-NEXT: ret void 5350 // 5351 // 5352 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5353 // CHECK3-SAME: () #[[ATTR4]] { 5354 // CHECK3-NEXT: entry: 5355 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 5356 // CHECK3-NEXT: ret void 5357 // 5358 // 5359 // CHECK4-LABEL: define {{[^@]+}}@_Z3fooi 5360 // CHECK4-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 5361 // CHECK4-NEXT: entry: 5362 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5363 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 5364 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2 5365 // CHECK4-NEXT: [[B:%.*]] = alloca [10 x float], align 4 5366 // CHECK4-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 5367 // CHECK4-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 5368 // CHECK4-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 5369 // CHECK4-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 5370 // CHECK4-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4 5371 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5372 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5373 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 5374 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 5375 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i32, align 4 5376 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 5377 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 5378 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 5379 // CHECK4-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 5380 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 5381 // CHECK4-NEXT: [[AA_CASTED4:%.*]] = alloca i32, align 4 5382 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS6:%.*]] = alloca [1 x i8*], align 4 5383 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS7:%.*]] = alloca [1 x i8*], align 4 5384 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS8:%.*]] = alloca [1 x i8*], align 4 5385 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 5386 // CHECK4-NEXT: [[A_CASTED9:%.*]] = alloca i32, align 4 5387 // CHECK4-NEXT: [[AA_CASTED10:%.*]] = alloca i32, align 4 5388 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x i8*], align 4 5389 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x i8*], align 4 5390 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x i8*], align 4 5391 // CHECK4-NEXT: [[_TMP15:%.*]] = alloca i32, align 4 5392 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 5393 // CHECK4-NEXT: [[A_CASTED19:%.*]] = alloca i32, align 4 5394 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4 5395 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [10 x i8*], align 4 5396 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [10 x i8*], align 4 5397 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [10 x i8*], align 4 5398 // CHECK4-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 4 5399 // CHECK4-NEXT: [[_TMP26:%.*]] = alloca i32, align 4 5400 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 5401 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5402 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 5403 // CHECK4-NEXT: store i16 0, i16* [[AA]], align 2 5404 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 5405 // CHECK4-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 5406 // CHECK4-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 5407 // CHECK4-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4 5408 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 5409 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4 5410 // CHECK4-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]] 5411 // CHECK4-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8 5412 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4 5413 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 5414 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 5415 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4 5416 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5417 // CHECK4-NEXT: [[TMP7:%.*]] = load i16, i16* [[AA]], align 2 5418 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 5419 // CHECK4-NEXT: store i16 [[TMP7]], i16* [[CONV]], align 2 5420 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[AA_CASTED]], align 4 5421 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5422 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 5423 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 5424 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5425 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4 5426 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4 5427 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5428 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 5429 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP14]], align 4 5430 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5431 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32* 5432 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP16]], align 4 5433 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 5434 // CHECK4-NEXT: store i8* null, i8** [[TMP17]], align 4 5435 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 5436 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 5437 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[TMP19]], align 4 5438 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 5439 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 5440 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[TMP21]], align 4 5441 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 5442 // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 4 5443 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 5444 // CHECK4-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32* 5445 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[TMP24]], align 4 5446 // CHECK4-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 5447 // CHECK4-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 5448 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[TMP26]], align 4 5449 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 5450 // CHECK4-NEXT: store i8* null, i8** [[TMP27]], align 4 5451 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5452 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5453 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0 5454 // CHECK4-NEXT: [[TMP31:%.*]] = load i16, i16* [[AA]], align 2 5455 // CHECK4-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 4 5456 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1 5457 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5458 // CHECK4-NEXT: store i32 [[TMP33]], i32* [[TMP32]], align 4 5459 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2 5460 // CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5461 // CHECK4-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4 5462 // CHECK4-NEXT: [[TMP36:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i32 72, i32 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 5463 // CHECK4-NEXT: [[TMP37:%.*]] = bitcast i8* [[TMP36]] to %struct.kmp_task_t_with_privates* 5464 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 0 5465 // CHECK4-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP38]], i32 0, i32 0 5466 // CHECK4-NEXT: [[TMP40:%.*]] = load i8*, i8** [[TMP39]], align 4 5467 // CHECK4-NEXT: [[TMP41:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8* 5468 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP40]], i8* align 4 [[TMP41]], i32 12, i1 false) 5469 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 1 5470 // CHECK4-NEXT: [[TMP43:%.*]] = bitcast i8* [[TMP40]] to %struct.anon* 5471 // CHECK4-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 0 5472 // CHECK4-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[TMP44]] to i8* 5473 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 5474 // CHECK4-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 1 5475 // CHECK4-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8* 5476 // CHECK4-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP28]] to i8* 5477 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP47]], i8* align 4 [[TMP48]], i32 12, i1 false) 5478 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 2 5479 // CHECK4-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8* 5480 // CHECK4-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP29]] to i8* 5481 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP50]], i8* align 4 [[TMP51]], i32 12, i1 false) 5482 // CHECK4-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 3 5483 // CHECK4-NEXT: [[TMP53:%.*]] = load i16, i16* [[AA]], align 2 5484 // CHECK4-NEXT: store i16 [[TMP53]], i16* [[TMP52]], align 4 5485 // CHECK4-NEXT: [[TMP54:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP36]]) 5486 // CHECK4-NEXT: [[TMP55:%.*]] = load i32, i32* [[A]], align 4 5487 // CHECK4-NEXT: store i32 [[TMP55]], i32* [[A_CASTED]], align 4 5488 // CHECK4-NEXT: [[TMP56:%.*]] = load i32, i32* [[A_CASTED]], align 4 5489 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i32 [[TMP56]]) #[[ATTR3:[0-9]+]] 5490 // CHECK4-NEXT: [[TMP57:%.*]] = load i16, i16* [[AA]], align 2 5491 // CHECK4-NEXT: [[CONV5:%.*]] = bitcast i32* [[AA_CASTED4]] to i16* 5492 // CHECK4-NEXT: store i16 [[TMP57]], i16* [[CONV5]], align 2 5493 // CHECK4-NEXT: [[TMP58:%.*]] = load i32, i32* [[AA_CASTED4]], align 4 5494 // CHECK4-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0 5495 // CHECK4-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32* 5496 // CHECK4-NEXT: store i32 [[TMP58]], i32* [[TMP60]], align 4 5497 // CHECK4-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0 5498 // CHECK4-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32* 5499 // CHECK4-NEXT: store i32 [[TMP58]], i32* [[TMP62]], align 4 5500 // CHECK4-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS8]], i32 0, i32 0 5501 // CHECK4-NEXT: store i8* null, i8** [[TMP63]], align 4 5502 // CHECK4-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0 5503 // CHECK4-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0 5504 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 5505 // CHECK4-NEXT: [[TMP66:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5506 // CHECK4-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0 5507 // CHECK4-NEXT: br i1 [[TMP67]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5508 // CHECK4: omp_offload.failed: 5509 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i32 [[TMP58]]) #[[ATTR3]] 5510 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 5511 // CHECK4: omp_offload.cont: 5512 // CHECK4-NEXT: [[TMP68:%.*]] = load i32, i32* [[A]], align 4 5513 // CHECK4-NEXT: store i32 [[TMP68]], i32* [[A_CASTED9]], align 4 5514 // CHECK4-NEXT: [[TMP69:%.*]] = load i32, i32* [[A_CASTED9]], align 4 5515 // CHECK4-NEXT: [[TMP70:%.*]] = load i16, i16* [[AA]], align 2 5516 // CHECK4-NEXT: [[CONV11:%.*]] = bitcast i32* [[AA_CASTED10]] to i16* 5517 // CHECK4-NEXT: store i16 [[TMP70]], i16* [[CONV11]], align 2 5518 // CHECK4-NEXT: [[TMP71:%.*]] = load i32, i32* [[AA_CASTED10]], align 4 5519 // CHECK4-NEXT: [[TMP72:%.*]] = load i32, i32* [[N_ADDR]], align 4 5520 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP72]], 10 5521 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 5522 // CHECK4: omp_if.then: 5523 // CHECK4-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 5524 // CHECK4-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32* 5525 // CHECK4-NEXT: store i32 [[TMP69]], i32* [[TMP74]], align 4 5526 // CHECK4-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 5527 // CHECK4-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 5528 // CHECK4-NEXT: store i32 [[TMP69]], i32* [[TMP76]], align 4 5529 // CHECK4-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 0 5530 // CHECK4-NEXT: store i8* null, i8** [[TMP77]], align 4 5531 // CHECK4-NEXT: [[TMP78:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1 5532 // CHECK4-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 5533 // CHECK4-NEXT: store i32 [[TMP71]], i32* [[TMP79]], align 4 5534 // CHECK4-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1 5535 // CHECK4-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32* 5536 // CHECK4-NEXT: store i32 [[TMP71]], i32* [[TMP81]], align 4 5537 // CHECK4-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 1 5538 // CHECK4-NEXT: store i8* null, i8** [[TMP82]], align 4 5539 // CHECK4-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 5540 // CHECK4-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 5541 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 5542 // CHECK4-NEXT: [[TMP85:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP83]], i8** [[TMP84]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5543 // CHECK4-NEXT: [[TMP86:%.*]] = icmp ne i32 [[TMP85]], 0 5544 // CHECK4-NEXT: br i1 [[TMP86]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 5545 // CHECK4: omp_offload.failed16: 5546 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]] 5547 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT17]] 5548 // CHECK4: omp_offload.cont17: 5549 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]] 5550 // CHECK4: omp_if.else: 5551 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]] 5552 // CHECK4-NEXT: br label [[OMP_IF_END]] 5553 // CHECK4: omp_if.end: 5554 // CHECK4-NEXT: [[TMP87:%.*]] = load i32, i32* [[N_ADDR]], align 4 5555 // CHECK4-NEXT: store i32 [[TMP87]], i32* [[DOTCAPTURE_EXPR_18]], align 4 5556 // CHECK4-NEXT: [[TMP88:%.*]] = load i32, i32* [[A]], align 4 5557 // CHECK4-NEXT: store i32 [[TMP88]], i32* [[A_CASTED19]], align 4 5558 // CHECK4-NEXT: [[TMP89:%.*]] = load i32, i32* [[A_CASTED19]], align 4 5559 // CHECK4-NEXT: [[TMP90:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4 5560 // CHECK4-NEXT: store i32 [[TMP90]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4 5561 // CHECK4-NEXT: [[TMP91:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4 5562 // CHECK4-NEXT: [[TMP92:%.*]] = load i32, i32* [[N_ADDR]], align 4 5563 // CHECK4-NEXT: [[CMP21:%.*]] = icmp sgt i32 [[TMP92]], 20 5564 // CHECK4-NEXT: br i1 [[CMP21]], label [[OMP_IF_THEN22:%.*]], label [[OMP_IF_ELSE29:%.*]] 5565 // CHECK4: omp_if.then22: 5566 // CHECK4-NEXT: [[TMP93:%.*]] = mul nuw i32 [[TMP1]], 4 5567 // CHECK4-NEXT: [[TMP94:%.*]] = sext i32 [[TMP93]] to i64 5568 // CHECK4-NEXT: [[TMP95:%.*]] = mul nuw i32 5, [[TMP3]] 5569 // CHECK4-NEXT: [[TMP96:%.*]] = mul nuw i32 [[TMP95]], 8 5570 // CHECK4-NEXT: [[TMP97:%.*]] = sext i32 [[TMP96]] to i64 5571 // CHECK4-NEXT: [[TMP98:%.*]] = bitcast [10 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 5572 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP98]], i8* align 4 bitcast ([10 x i64]* @.offload_sizes.10 to i8*), i32 80, i1 false) 5573 // CHECK4-NEXT: [[TMP99:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0 5574 // CHECK4-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to i32* 5575 // CHECK4-NEXT: store i32 [[TMP89]], i32* [[TMP100]], align 4 5576 // CHECK4-NEXT: [[TMP101:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0 5577 // CHECK4-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i32* 5578 // CHECK4-NEXT: store i32 [[TMP89]], i32* [[TMP102]], align 4 5579 // CHECK4-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0 5580 // CHECK4-NEXT: store i8* null, i8** [[TMP103]], align 4 5581 // CHECK4-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1 5582 // CHECK4-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]** 5583 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 4 5584 // CHECK4-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1 5585 // CHECK4-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]** 5586 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 4 5587 // CHECK4-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1 5588 // CHECK4-NEXT: store i8* null, i8** [[TMP108]], align 4 5589 // CHECK4-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2 5590 // CHECK4-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 5591 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP110]], align 4 5592 // CHECK4-NEXT: [[TMP111:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2 5593 // CHECK4-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 5594 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP112]], align 4 5595 // CHECK4-NEXT: [[TMP113:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 2 5596 // CHECK4-NEXT: store i8* null, i8** [[TMP113]], align 4 5597 // CHECK4-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3 5598 // CHECK4-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to float** 5599 // CHECK4-NEXT: store float* [[VLA]], float** [[TMP115]], align 4 5600 // CHECK4-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3 5601 // CHECK4-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float** 5602 // CHECK4-NEXT: store float* [[VLA]], float** [[TMP117]], align 4 5603 // CHECK4-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 5604 // CHECK4-NEXT: store i64 [[TMP94]], i64* [[TMP118]], align 4 5605 // CHECK4-NEXT: [[TMP119:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 3 5606 // CHECK4-NEXT: store i8* null, i8** [[TMP119]], align 4 5607 // CHECK4-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 4 5608 // CHECK4-NEXT: [[TMP121:%.*]] = bitcast i8** [[TMP120]] to [5 x [10 x double]]** 5609 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP121]], align 4 5610 // CHECK4-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 4 5611 // CHECK4-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]** 5612 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 4 5613 // CHECK4-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 4 5614 // CHECK4-NEXT: store i8* null, i8** [[TMP124]], align 4 5615 // CHECK4-NEXT: [[TMP125:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 5 5616 // CHECK4-NEXT: [[TMP126:%.*]] = bitcast i8** [[TMP125]] to i32* 5617 // CHECK4-NEXT: store i32 5, i32* [[TMP126]], align 4 5618 // CHECK4-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 5 5619 // CHECK4-NEXT: [[TMP128:%.*]] = bitcast i8** [[TMP127]] to i32* 5620 // CHECK4-NEXT: store i32 5, i32* [[TMP128]], align 4 5621 // CHECK4-NEXT: [[TMP129:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 5 5622 // CHECK4-NEXT: store i8* null, i8** [[TMP129]], align 4 5623 // CHECK4-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 6 5624 // CHECK4-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i32* 5625 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP131]], align 4 5626 // CHECK4-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 6 5627 // CHECK4-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i32* 5628 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP133]], align 4 5629 // CHECK4-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 6 5630 // CHECK4-NEXT: store i8* null, i8** [[TMP134]], align 4 5631 // CHECK4-NEXT: [[TMP135:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 7 5632 // CHECK4-NEXT: [[TMP136:%.*]] = bitcast i8** [[TMP135]] to double** 5633 // CHECK4-NEXT: store double* [[VLA1]], double** [[TMP136]], align 4 5634 // CHECK4-NEXT: [[TMP137:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 7 5635 // CHECK4-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to double** 5636 // CHECK4-NEXT: store double* [[VLA1]], double** [[TMP138]], align 4 5637 // CHECK4-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 5638 // CHECK4-NEXT: store i64 [[TMP97]], i64* [[TMP139]], align 4 5639 // CHECK4-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 7 5640 // CHECK4-NEXT: store i8* null, i8** [[TMP140]], align 4 5641 // CHECK4-NEXT: [[TMP141:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 8 5642 // CHECK4-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to %struct.TT** 5643 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP142]], align 4 5644 // CHECK4-NEXT: [[TMP143:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 8 5645 // CHECK4-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to %struct.TT** 5646 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP144]], align 4 5647 // CHECK4-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 8 5648 // CHECK4-NEXT: store i8* null, i8** [[TMP145]], align 4 5649 // CHECK4-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 9 5650 // CHECK4-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 5651 // CHECK4-NEXT: store i32 [[TMP91]], i32* [[TMP147]], align 4 5652 // CHECK4-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 9 5653 // CHECK4-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 5654 // CHECK4-NEXT: store i32 [[TMP91]], i32* [[TMP149]], align 4 5655 // CHECK4-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 9 5656 // CHECK4-NEXT: store i8* null, i8** [[TMP150]], align 4 5657 // CHECK4-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0 5658 // CHECK4-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0 5659 // CHECK4-NEXT: [[TMP153:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 5660 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 5661 // CHECK4-NEXT: [[TMP154:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP151]], i8** [[TMP152]], i64* [[TMP153]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5662 // CHECK4-NEXT: [[TMP155:%.*]] = icmp ne i32 [[TMP154]], 0 5663 // CHECK4-NEXT: br i1 [[TMP155]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 5664 // CHECK4: omp_offload.failed27: 5665 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]] 5666 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT28]] 5667 // CHECK4: omp_offload.cont28: 5668 // CHECK4-NEXT: br label [[OMP_IF_END30:%.*]] 5669 // CHECK4: omp_if.else29: 5670 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]] 5671 // CHECK4-NEXT: br label [[OMP_IF_END30]] 5672 // CHECK4: omp_if.end30: 5673 // CHECK4-NEXT: [[TMP156:%.*]] = load i32, i32* [[A]], align 4 5674 // CHECK4-NEXT: [[TMP157:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 5675 // CHECK4-NEXT: call void @llvm.stackrestore(i8* [[TMP157]]) 5676 // CHECK4-NEXT: ret i32 [[TMP156]] 5677 // 5678 // 5679 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 5680 // CHECK4-SAME: (i32 noundef [[AA:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] { 5681 // CHECK4-NEXT: entry: 5682 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5683 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 5684 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 5685 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 5686 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 5687 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5688 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 5689 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 5690 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5691 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 5692 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 5693 // CHECK4-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 5694 // CHECK4-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 5695 // CHECK4-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 5696 // CHECK4-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 5697 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 5698 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]]) 5699 // CHECK4-NEXT: ret void 5700 // 5701 // 5702 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 5703 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 5704 // CHECK4-NEXT: entry: 5705 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5706 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5707 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5708 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5709 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 5710 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5711 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5712 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5713 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5714 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 5715 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5716 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5717 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5718 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5719 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5720 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5721 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5722 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5723 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5724 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5725 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5726 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5727 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 5728 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5729 // CHECK4: cond.true: 5730 // CHECK4-NEXT: br label [[COND_END:%.*]] 5731 // CHECK4: cond.false: 5732 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5733 // CHECK4-NEXT: br label [[COND_END]] 5734 // CHECK4: cond.end: 5735 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5736 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5737 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5738 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5739 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5740 // CHECK4: omp.inner.for.cond: 5741 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5742 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5743 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5744 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5745 // CHECK4: omp.inner.for.body: 5746 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5747 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 5748 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5749 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5750 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5751 // CHECK4: omp.body.continue: 5752 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5753 // CHECK4: omp.inner.for.inc: 5754 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5755 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 5756 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 5757 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 5758 // CHECK4: omp.inner.for.end: 5759 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5760 // CHECK4: omp.loop.exit: 5761 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 5762 // CHECK4-NEXT: ret void 5763 // 5764 // 5765 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_privates_map. 5766 // CHECK4-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i16** noalias noundef [[TMP1:%.*]], [3 x i8*]** noalias noundef [[TMP2:%.*]], [3 x i8*]** noalias noundef [[TMP3:%.*]], [3 x i64]** noalias noundef [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] { 5767 // CHECK4-NEXT: entry: 5768 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 4 5769 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 4 5770 // CHECK4-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 4 5771 // CHECK4-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 4 5772 // CHECK4-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 4 5773 // CHECK4-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 4 5774 // CHECK4-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 4 5775 // CHECK4-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 4 5776 // CHECK4-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 4 5777 // CHECK4-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 4 5778 // CHECK4-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 4 5779 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0 5780 // CHECK4-NEXT: [[TMP7:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 4 5781 // CHECK4-NEXT: store [3 x i64]* [[TMP6]], [3 x i64]** [[TMP7]], align 4 5782 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1 5783 // CHECK4-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 4 5784 // CHECK4-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 4 5785 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2 5786 // CHECK4-NEXT: [[TMP11:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 4 5787 // CHECK4-NEXT: store [3 x i8*]* [[TMP10]], [3 x i8*]** [[TMP11]], align 4 5788 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3 5789 // CHECK4-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 4 5790 // CHECK4-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 4 5791 // CHECK4-NEXT: ret void 5792 // 5793 // 5794 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry. 5795 // CHECK4-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] { 5796 // CHECK4-NEXT: entry: 5797 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 5798 // CHECK4-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4 5799 // CHECK4-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4 5800 // CHECK4-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4 5801 // CHECK4-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4 5802 // CHECK4-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 4 5803 // CHECK4-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 4 5804 // CHECK4-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 4 5805 // CHECK4-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 4 5806 // CHECK4-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 4 5807 // CHECK4-NEXT: [[AA_CASTED_I:%.*]] = alloca i32, align 4 5808 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i32, align 4 5809 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED4_I:%.*]] = alloca i32, align 4 5810 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 5811 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4 5812 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 5813 // CHECK4-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 5814 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 5815 // CHECK4-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 5816 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 5817 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 5818 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 5819 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 5820 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 5821 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1 5822 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 5823 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 5824 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]]) 5825 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]]) 5826 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]]) 5827 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 5828 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22 5829 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22 5830 // CHECK4-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 5831 // CHECK4-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 5832 // CHECK4-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22 5833 // CHECK4-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 5834 // CHECK4-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 5835 // CHECK4-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 5836 // CHECK4-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 5837 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* 5838 // CHECK4-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]] 5839 // CHECK4-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 4, !noalias !22 5840 // CHECK4-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 4, !noalias !22 5841 // CHECK4-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 4, !noalias !22 5842 // CHECK4-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 4, !noalias !22 5843 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i32 0, i32 0 5844 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i32 0, i32 0 5845 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i32 0, i32 0 5846 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1 5847 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2 5848 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4 5849 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4 5850 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]] 5851 // CHECK4-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]] 5852 // CHECK4-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 5853 // CHECK4-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 5854 // CHECK4: omp_offload.failed.i: 5855 // CHECK4-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2 5856 // CHECK4-NEXT: [[CONV_I:%.*]] = bitcast i32* [[AA_CASTED_I]] to i16* 5857 // CHECK4-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !22 5858 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[AA_CASTED_I]], align 4, !noalias !22 5859 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4 5860 // CHECK4-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22 5861 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22 5862 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4 5863 // CHECK4-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22 5864 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22 5865 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i32 [[TMP30]], i32 [[TMP32]], i32 [[TMP34]]) #[[ATTR3]] 5866 // CHECK4-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 5867 // CHECK4: .omp_outlined..1.exit: 5868 // CHECK4-NEXT: ret i32 0 5869 // 5870 // 5871 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107 5872 // CHECK4-SAME: (i32 noundef [[A:%.*]]) #[[ATTR2]] { 5873 // CHECK4-NEXT: entry: 5874 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5875 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 5876 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5877 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5878 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 5879 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 5880 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 5881 // CHECK4-NEXT: ret void 5882 // 5883 // 5884 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 5885 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR2]] { 5886 // CHECK4-NEXT: entry: 5887 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5888 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5889 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5890 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5891 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 5892 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5893 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5894 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5895 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5896 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 5897 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5898 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5899 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5900 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5901 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5902 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5903 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5904 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5905 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5906 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5907 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5908 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 5909 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5910 // CHECK4: cond.true: 5911 // CHECK4-NEXT: br label [[COND_END:%.*]] 5912 // CHECK4: cond.false: 5913 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5914 // CHECK4-NEXT: br label [[COND_END]] 5915 // CHECK4: cond.end: 5916 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5917 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5918 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5919 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5920 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5921 // CHECK4: omp.inner.for.cond: 5922 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5923 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5924 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5925 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5926 // CHECK4: omp.inner.for.body: 5927 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5928 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 5929 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5930 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5931 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 5932 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 5933 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 5934 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5935 // CHECK4: omp.body.continue: 5936 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5937 // CHECK4: omp.inner.for.inc: 5938 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5939 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 5940 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5941 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 5942 // CHECK4: omp.inner.for.end: 5943 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5944 // CHECK4: omp.loop.exit: 5945 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 5946 // CHECK4-NEXT: ret void 5947 // 5948 // 5949 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 5950 // CHECK4-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR2]] { 5951 // CHECK4-NEXT: entry: 5952 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5953 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 5954 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5955 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5956 // CHECK4-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 5957 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 5958 // CHECK4-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 5959 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4 5960 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 5961 // CHECK4-NEXT: ret void 5962 // 5963 // 5964 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 5965 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 5966 // CHECK4-NEXT: entry: 5967 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5968 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5969 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5970 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5971 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 5972 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5973 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5974 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5975 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5976 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 5977 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5978 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5979 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5980 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5981 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5982 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5983 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5984 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5985 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5986 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5987 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5988 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5989 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 5990 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5991 // CHECK4: cond.true: 5992 // CHECK4-NEXT: br label [[COND_END:%.*]] 5993 // CHECK4: cond.false: 5994 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5995 // CHECK4-NEXT: br label [[COND_END]] 5996 // CHECK4: cond.end: 5997 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5998 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5999 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6000 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6001 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6002 // CHECK4: omp.inner.for.cond: 6003 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6004 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6005 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6006 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6007 // CHECK4: omp.inner.for.body: 6008 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6009 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 6010 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6011 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6012 // CHECK4-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 6013 // CHECK4-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 6014 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 6015 // CHECK4-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 6016 // CHECK4-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 6017 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6018 // CHECK4: omp.body.continue: 6019 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6020 // CHECK4: omp.inner.for.inc: 6021 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6022 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 6023 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 6024 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6025 // CHECK4: omp.inner.for.end: 6026 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6027 // CHECK4: omp.loop.exit: 6028 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6029 // CHECK4-NEXT: ret void 6030 // 6031 // 6032 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 6033 // CHECK4-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 6034 // CHECK4-NEXT: entry: 6035 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6036 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 6037 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 6038 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 6039 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6040 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 6041 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 6042 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6043 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 6044 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 6045 // CHECK4-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 2 6046 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 6047 // CHECK4-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 6048 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 6049 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]]) 6050 // CHECK4-NEXT: ret void 6051 // 6052 // 6053 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6 6054 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 6055 // CHECK4-NEXT: entry: 6056 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6057 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6058 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6059 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 6060 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6061 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6062 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6063 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6064 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6065 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6066 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6067 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6068 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6069 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6070 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 6071 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 6072 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6073 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 6074 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6075 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6076 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6077 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6078 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6079 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6080 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 6081 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6082 // CHECK4: cond.true: 6083 // CHECK4-NEXT: br label [[COND_END:%.*]] 6084 // CHECK4: cond.false: 6085 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6086 // CHECK4-NEXT: br label [[COND_END]] 6087 // CHECK4: cond.end: 6088 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6089 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6090 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6091 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6092 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6093 // CHECK4: omp.inner.for.cond: 6094 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6095 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6096 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6097 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6098 // CHECK4: omp.inner.for.body: 6099 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6100 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 6101 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6102 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6103 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 6104 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 6105 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 6106 // CHECK4-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 2 6107 // CHECK4-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32 6108 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 6109 // CHECK4-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 6110 // CHECK4-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 6111 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6112 // CHECK4: omp.body.continue: 6113 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6114 // CHECK4: omp.inner.for.inc: 6115 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6116 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 6117 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 6118 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6119 // CHECK4: omp.inner.for.end: 6120 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6121 // CHECK4: omp.loop.exit: 6122 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6123 // CHECK4-NEXT: ret void 6124 // 6125 // 6126 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 6127 // CHECK4-SAME: (i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6128 // CHECK4-NEXT: entry: 6129 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6130 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 6131 // CHECK4-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6132 // CHECK4-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 6133 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 6134 // CHECK4-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 6135 // CHECK4-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 6136 // CHECK4-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 6137 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 6138 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 6139 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 6140 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 6141 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6142 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 6143 // CHECK4-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6144 // CHECK4-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 6145 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 6146 // CHECK4-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 6147 // CHECK4-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 6148 // CHECK4-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 6149 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 6150 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 6151 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 6152 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6153 // CHECK4-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 6154 // CHECK4-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 6155 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 6156 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 6157 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 6158 // CHECK4-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 6159 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 6160 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4 6161 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4 6162 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 6163 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 6164 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 6165 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]]) 6166 // CHECK4-NEXT: ret void 6167 // 6168 // 6169 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..9 6170 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6171 // CHECK4-NEXT: entry: 6172 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6173 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6174 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6175 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 6176 // CHECK4-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6177 // CHECK4-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 6178 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 6179 // CHECK4-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 6180 // CHECK4-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 6181 // CHECK4-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 6182 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 6183 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 6184 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6185 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6186 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6187 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6188 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6189 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6190 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6191 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6192 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6193 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6194 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 6195 // CHECK4-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6196 // CHECK4-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 6197 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 6198 // CHECK4-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 6199 // CHECK4-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 6200 // CHECK4-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 6201 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 6202 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 6203 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 6204 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6205 // CHECK4-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 6206 // CHECK4-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 6207 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 6208 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 6209 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 6210 // CHECK4-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 6211 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6212 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 6213 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6214 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6215 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 6216 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6217 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 6218 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 6219 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6220 // CHECK4: omp.dispatch.cond: 6221 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6222 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 6223 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6224 // CHECK4: cond.true: 6225 // CHECK4-NEXT: br label [[COND_END:%.*]] 6226 // CHECK4: cond.false: 6227 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6228 // CHECK4-NEXT: br label [[COND_END]] 6229 // CHECK4: cond.end: 6230 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 6231 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6232 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6233 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 6234 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6235 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6236 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 6237 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6238 // CHECK4: omp.dispatch.body: 6239 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6240 // CHECK4: omp.inner.for.cond: 6241 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 6242 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 6243 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 6244 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6245 // CHECK4: omp.inner.for.body: 6246 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 6247 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 6248 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6249 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23 6250 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !23 6251 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 6252 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !23 6253 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2 6254 // CHECK4-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !23 6255 // CHECK4-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 6256 // CHECK4-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00 6257 // CHECK4-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float 6258 // CHECK4-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !23 6259 // CHECK4-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3 6260 // CHECK4-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !23 6261 // CHECK4-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double 6262 // CHECK4-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00 6263 // CHECK4-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 6264 // CHECK4-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !23 6265 // CHECK4-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1 6266 // CHECK4-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2 6267 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !23 6268 // CHECK4-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00 6269 // CHECK4-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !23 6270 // CHECK4-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]] 6271 // CHECK4-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]] 6272 // CHECK4-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3 6273 // CHECK4-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !23 6274 // CHECK4-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00 6275 // CHECK4-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !23 6276 // CHECK4-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 6277 // CHECK4-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !23 6278 // CHECK4-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1 6279 // CHECK4-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !23 6280 // CHECK4-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 6281 // CHECK4-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !23 6282 // CHECK4-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32 6283 // CHECK4-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1 6284 // CHECK4-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8 6285 // CHECK4-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !23 6286 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6287 // CHECK4: omp.body.continue: 6288 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6289 // CHECK4: omp.inner.for.inc: 6290 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 6291 // CHECK4-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1 6292 // CHECK4-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 6293 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 6294 // CHECK4: omp.inner.for.end: 6295 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6296 // CHECK4: omp.dispatch.inc: 6297 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6298 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6299 // CHECK4-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 6300 // CHECK4-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4 6301 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6302 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6303 // CHECK4-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 6304 // CHECK4-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4 6305 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 6306 // CHECK4: omp.dispatch.end: 6307 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 6308 // CHECK4-NEXT: ret void 6309 // 6310 // 6311 // CHECK4-LABEL: define {{[^@]+}}@_Z3bari 6312 // CHECK4-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 6313 // CHECK4-NEXT: entry: 6314 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6315 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 6316 // CHECK4-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 6317 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6318 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 6319 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 6320 // CHECK4-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooi(i32 noundef [[TMP0]]) 6321 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 6322 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 6323 // CHECK4-NEXT: store i32 [[ADD]], i32* [[A]], align 4 6324 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 6325 // CHECK4-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZN2S12r1Ei(%struct.S1* noundef nonnull align 4 dereferenceable(8) [[S]], i32 noundef [[TMP2]]) 6326 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 6327 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 6328 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 6329 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 6330 // CHECK4-NEXT: [[CALL3:%.*]] = call noundef i32 @_ZL7fstatici(i32 noundef [[TMP4]]) 6331 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 6332 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 6333 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 6334 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 6335 // CHECK4-NEXT: [[CALL5:%.*]] = call noundef i32 @_Z9ftemplateIiET_i(i32 noundef [[TMP6]]) 6336 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 6337 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 6338 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 6339 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 6340 // CHECK4-NEXT: ret i32 [[TMP8]] 6341 // 6342 // 6343 // CHECK4-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 6344 // CHECK4-SAME: (%struct.S1* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[N:%.*]]) #[[ATTR0]] comdat align 2 { 6345 // CHECK4-NEXT: entry: 6346 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 6347 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6348 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 6349 // CHECK4-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 6350 // CHECK4-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 6351 // CHECK4-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 6352 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 6353 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 6354 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 6355 // CHECK4-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 6356 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6357 // CHECK4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 6358 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6359 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 6360 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 6361 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 6362 // CHECK4-NEXT: store i32 [[ADD]], i32* [[B]], align 4 6363 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 6364 // CHECK4-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 6365 // CHECK4-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 6366 // CHECK4-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]] 6367 // CHECK4-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2 6368 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 6369 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4 6370 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 6371 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 6372 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 6373 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60 6374 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 6375 // CHECK4: omp_if.then: 6376 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 6377 // CHECK4-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]] 6378 // CHECK4-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2 6379 // CHECK4-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 6380 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 6381 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes.13 to i8*), i32 40, i1 false) 6382 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6383 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to %struct.S1** 6384 // CHECK4-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP12]], align 4 6385 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6386 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to double** 6387 // CHECK4-NEXT: store double* [[A]], double** [[TMP14]], align 4 6388 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6389 // CHECK4-NEXT: store i8* null, i8** [[TMP15]], align 4 6390 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 6391 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 6392 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4 6393 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 6394 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 6395 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4 6396 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 6397 // CHECK4-NEXT: store i8* null, i8** [[TMP20]], align 4 6398 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 6399 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32* 6400 // CHECK4-NEXT: store i32 2, i32* [[TMP22]], align 4 6401 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 6402 // CHECK4-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32* 6403 // CHECK4-NEXT: store i32 2, i32* [[TMP24]], align 4 6404 // CHECK4-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 6405 // CHECK4-NEXT: store i8* null, i8** [[TMP25]], align 4 6406 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 6407 // CHECK4-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 6408 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP27]], align 4 6409 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 6410 // CHECK4-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32* 6411 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4 6412 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 6413 // CHECK4-NEXT: store i8* null, i8** [[TMP30]], align 4 6414 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 6415 // CHECK4-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i16** 6416 // CHECK4-NEXT: store i16* [[VLA]], i16** [[TMP32]], align 4 6417 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 6418 // CHECK4-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i16** 6419 // CHECK4-NEXT: store i16* [[VLA]], i16** [[TMP34]], align 4 6420 // CHECK4-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 6421 // CHECK4-NEXT: store i64 [[TMP9]], i64* [[TMP35]], align 4 6422 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 6423 // CHECK4-NEXT: store i8* null, i8** [[TMP36]], align 4 6424 // CHECK4-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6425 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6426 // CHECK4-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 6427 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 6428 // CHECK4-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP37]], i8** [[TMP38]], i64* [[TMP39]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.14, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6429 // CHECK4-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 6430 // CHECK4-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6431 // CHECK4: omp_offload.failed: 6432 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 6433 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 6434 // CHECK4: omp_offload.cont: 6435 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]] 6436 // CHECK4: omp_if.else: 6437 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 6438 // CHECK4-NEXT: br label [[OMP_IF_END]] 6439 // CHECK4: omp_if.end: 6440 // CHECK4-NEXT: [[TMP42:%.*]] = mul nsw i32 1, [[TMP1]] 6441 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP42]] 6442 // CHECK4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 6443 // CHECK4-NEXT: [[TMP43:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 6444 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP43]] to i32 6445 // CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[B]], align 4 6446 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP44]] 6447 // CHECK4-NEXT: [[TMP45:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 6448 // CHECK4-NEXT: call void @llvm.stackrestore(i8* [[TMP45]]) 6449 // CHECK4-NEXT: ret i32 [[ADD3]] 6450 // 6451 // 6452 // CHECK4-LABEL: define {{[^@]+}}@_ZL7fstatici 6453 // CHECK4-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 6454 // CHECK4-NEXT: entry: 6455 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6456 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 6457 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2 6458 // CHECK4-NEXT: [[AAA:%.*]] = alloca i8, align 1 6459 // CHECK4-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 6460 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 6461 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 6462 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 6463 // CHECK4-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 6464 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 6465 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 6466 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 6467 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6468 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6469 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 6470 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 6471 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6472 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 6473 // CHECK4-NEXT: store i16 0, i16* [[AA]], align 2 6474 // CHECK4-NEXT: store i8 0, i8* [[AAA]], align 1 6475 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 6476 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4 6477 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4 6478 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 6479 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[A_CASTED]], align 4 6480 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_CASTED]], align 4 6481 // CHECK4-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2 6482 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 6483 // CHECK4-NEXT: store i16 [[TMP4]], i16* [[CONV]], align 2 6484 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[AA_CASTED]], align 4 6485 // CHECK4-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1 6486 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 6487 // CHECK4-NEXT: store i8 [[TMP6]], i8* [[CONV1]], align 1 6488 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 6489 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4 6490 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50 6491 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 6492 // CHECK4: omp_if.then: 6493 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6494 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 6495 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4 6496 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6497 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 6498 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP12]], align 4 6499 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6500 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4 6501 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 6502 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 6503 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 6504 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 6505 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 6506 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP17]], align 4 6507 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 6508 // CHECK4-NEXT: store i8* null, i8** [[TMP18]], align 4 6509 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 6510 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 6511 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4 6512 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 6513 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32* 6514 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP22]], align 4 6515 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 6516 // CHECK4-NEXT: store i8* null, i8** [[TMP23]], align 4 6517 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 6518 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 6519 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[TMP25]], align 4 6520 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 6521 // CHECK4-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 6522 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[TMP27]], align 4 6523 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 6524 // CHECK4-NEXT: store i8* null, i8** [[TMP28]], align 4 6525 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 6526 // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]** 6527 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 4 6528 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 6529 // CHECK4-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]** 6530 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 4 6531 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 6532 // CHECK4-NEXT: store i8* null, i8** [[TMP33]], align 4 6533 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6534 // CHECK4-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6535 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4 6536 // CHECK4-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4 6537 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 6538 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_2]], align 4 6539 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 6540 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6541 // CHECK4-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]] 6542 // CHECK4-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 6543 // CHECK4-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 6544 // CHECK4-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 6545 // CHECK4-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 6546 // CHECK4-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 6547 // CHECK4-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 6548 // CHECK4-NEXT: [[ADD6:%.*]] = add i32 [[TMP40]], 1 6549 // CHECK4-NEXT: [[TMP41:%.*]] = zext i32 [[ADD6]] to i64 6550 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]]) 6551 // CHECK4-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6552 // CHECK4-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 6553 // CHECK4-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6554 // CHECK4: omp_offload.failed: 6555 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 6556 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 6557 // CHECK4: omp_offload.cont: 6558 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]] 6559 // CHECK4: omp_if.else: 6560 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 6561 // CHECK4-NEXT: br label [[OMP_IF_END]] 6562 // CHECK4: omp_if.end: 6563 // CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4 6564 // CHECK4-NEXT: ret i32 [[TMP44]] 6565 // 6566 // 6567 // CHECK4-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 6568 // CHECK4-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] comdat { 6569 // CHECK4-NEXT: entry: 6570 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6571 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 6572 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2 6573 // CHECK4-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 6574 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 6575 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 6576 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 6577 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 6578 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 6579 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6580 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6581 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 6582 // CHECK4-NEXT: store i16 0, i16* [[AA]], align 2 6583 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 6584 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 6585 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 6586 // CHECK4-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 6587 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 6588 // CHECK4-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 6589 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 6590 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 6591 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 6592 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 6593 // CHECK4: omp_if.then: 6594 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6595 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 6596 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 6597 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6598 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 6599 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 6600 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6601 // CHECK4-NEXT: store i8* null, i8** [[TMP9]], align 4 6602 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 6603 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 6604 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 6605 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 6606 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 6607 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 6608 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 6609 // CHECK4-NEXT: store i8* null, i8** [[TMP14]], align 4 6610 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 6611 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 6612 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4 6613 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 6614 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 6615 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4 6616 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 6617 // CHECK4-NEXT: store i8* null, i8** [[TMP19]], align 4 6618 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6619 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6620 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 6621 // CHECK4-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6622 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 6623 // CHECK4-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6624 // CHECK4: omp_offload.failed: 6625 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 6626 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 6627 // CHECK4: omp_offload.cont: 6628 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]] 6629 // CHECK4: omp_if.else: 6630 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 6631 // CHECK4-NEXT: br label [[OMP_IF_END]] 6632 // CHECK4: omp_if.end: 6633 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 6634 // CHECK4-NEXT: ret i32 [[TMP24]] 6635 // 6636 // 6637 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 6638 // CHECK4-SAME: (%struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 6639 // CHECK4-NEXT: entry: 6640 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 6641 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 6642 // CHECK4-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6643 // CHECK4-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 6644 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 6645 // CHECK4-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 6646 // CHECK4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 6647 // CHECK4-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 6648 // CHECK4-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6649 // CHECK4-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 6650 // CHECK4-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 6651 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 6652 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6653 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 6654 // CHECK4-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 6655 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4 6656 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 6657 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 6658 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..12 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]]) 6659 // CHECK4-NEXT: ret void 6660 // 6661 // 6662 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..12 6663 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 6664 // CHECK4-NEXT: entry: 6665 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6666 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6667 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 6668 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 6669 // CHECK4-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6670 // CHECK4-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 6671 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 6672 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6673 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6674 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6675 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6676 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6677 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6678 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6679 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6680 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6681 // CHECK4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 6682 // CHECK4-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 6683 // CHECK4-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6684 // CHECK4-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 6685 // CHECK4-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 6686 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 6687 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6688 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 6689 // CHECK4-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 6690 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6691 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 6692 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6693 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6694 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6695 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 6696 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6697 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6698 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 6699 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6700 // CHECK4: cond.true: 6701 // CHECK4-NEXT: br label [[COND_END:%.*]] 6702 // CHECK4: cond.false: 6703 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6704 // CHECK4-NEXT: br label [[COND_END]] 6705 // CHECK4: cond.end: 6706 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 6707 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6708 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6709 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 6710 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6711 // CHECK4: omp.inner.for.cond: 6712 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6713 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6714 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 6715 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6716 // CHECK4: omp.inner.for.body: 6717 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6718 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 6719 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6720 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6721 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4 6722 // CHECK4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double 6723 // CHECK4-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00 6724 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 6725 // CHECK4-NEXT: store double [[ADD4]], double* [[A]], align 4 6726 // CHECK4-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 6727 // CHECK4-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4 6728 // CHECK4-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 6729 // CHECK4-NEXT: store double [[INC]], double* [[A5]], align 4 6730 // CHECK4-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16 6731 // CHECK4-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]] 6732 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]] 6733 // CHECK4-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 6734 // CHECK4-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2 6735 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6736 // CHECK4: omp.body.continue: 6737 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6738 // CHECK4: omp.inner.for.inc: 6739 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6740 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 6741 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 6742 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6743 // CHECK4: omp.inner.for.end: 6744 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6745 // CHECK4: omp.loop.exit: 6746 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 6747 // CHECK4-NEXT: ret void 6748 // 6749 // 6750 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 6751 // CHECK4-SAME: (i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 6752 // CHECK4-NEXT: entry: 6753 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6754 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6755 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 6756 // CHECK4-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 6757 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 6758 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 6759 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 6760 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 6761 // CHECK4-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 6762 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6763 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6764 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 6765 // CHECK4-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 6766 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 6767 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 6768 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 6769 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 6770 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 6771 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 6772 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 6773 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4 6774 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4 6775 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4 6776 // CHECK4-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 2 6777 // CHECK4-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 6778 // CHECK4-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2 6779 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4 6780 // CHECK4-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 1 6781 // CHECK4-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 6782 // CHECK4-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1 6783 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 6784 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]]) 6785 // CHECK4-NEXT: ret void 6786 // 6787 // 6788 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..15 6789 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 6790 // CHECK4-NEXT: entry: 6791 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6792 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6793 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6794 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6795 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 6796 // CHECK4-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 6797 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 6798 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6799 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6800 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6801 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 6802 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 6803 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6804 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6805 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6806 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6807 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6808 // CHECK4-NEXT: [[I6:%.*]] = alloca i32, align 4 6809 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6810 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6811 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6812 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6813 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 6814 // CHECK4-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 6815 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 6816 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 6817 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 6818 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 6819 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 6820 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 6821 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 6822 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 6823 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 6824 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6825 // CHECK4-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 6826 // CHECK4-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 6827 // CHECK4-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 6828 // CHECK4-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 6829 // CHECK4-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 6830 // CHECK4-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 6831 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6832 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 6833 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6834 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 6835 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 6836 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6837 // CHECK4: omp.precond.then: 6838 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6839 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 6840 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 6841 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6842 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6843 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6844 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 6845 // CHECK4-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6846 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6847 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 6848 // CHECK4-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 6849 // CHECK4-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6850 // CHECK4: cond.true: 6851 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 6852 // CHECK4-NEXT: br label [[COND_END:%.*]] 6853 // CHECK4: cond.false: 6854 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6855 // CHECK4-NEXT: br label [[COND_END]] 6856 // CHECK4: cond.end: 6857 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 6858 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6859 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6860 // CHECK4-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 6861 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6862 // CHECK4: omp.inner.for.cond: 6863 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6864 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6865 // CHECK4-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1 6866 // CHECK4-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]] 6867 // CHECK4-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6868 // CHECK4: omp.inner.for.body: 6869 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6870 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6871 // CHECK4-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 6872 // CHECK4-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]] 6873 // CHECK4-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4 6874 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4 6875 // CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 6876 // CHECK4-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4 6877 // CHECK4-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 2 6878 // CHECK4-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32 6879 // CHECK4-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1 6880 // CHECK4-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16 6881 // CHECK4-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 2 6882 // CHECK4-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 1 6883 // CHECK4-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32 6884 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1 6885 // CHECK4-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8 6886 // CHECK4-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 1 6887 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 6888 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 6889 // CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1 6890 // CHECK4-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4 6891 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6892 // CHECK4: omp.body.continue: 6893 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6894 // CHECK4: omp.inner.for.inc: 6895 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6896 // CHECK4-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1 6897 // CHECK4-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 6898 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6899 // CHECK4: omp.inner.for.end: 6900 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6901 // CHECK4: omp.loop.exit: 6902 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6903 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 6904 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 6905 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 6906 // CHECK4: omp.precond.end: 6907 // CHECK4-NEXT: ret void 6908 // 6909 // 6910 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 6911 // CHECK4-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 6912 // CHECK4-NEXT: entry: 6913 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6914 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 6915 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 6916 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 6917 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 6918 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6919 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 6920 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 6921 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 6922 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 6923 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 6924 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4 6925 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4 6926 // CHECK4-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 6927 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 6928 // CHECK4-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2 6929 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 6930 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]]) 6931 // CHECK4-NEXT: ret void 6932 // 6933 // 6934 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..18 6935 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 6936 // CHECK4-NEXT: entry: 6937 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6938 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6939 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6940 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 6941 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 6942 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6943 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6944 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6945 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6946 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6947 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6948 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6949 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6950 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6951 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6952 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 6953 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 6954 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 6955 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 6956 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6957 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 6958 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6959 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6960 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6961 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6962 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6963 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6964 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 6965 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6966 // CHECK4: cond.true: 6967 // CHECK4-NEXT: br label [[COND_END:%.*]] 6968 // CHECK4: cond.false: 6969 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6970 // CHECK4-NEXT: br label [[COND_END]] 6971 // CHECK4: cond.end: 6972 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6973 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6974 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6975 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6976 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6977 // CHECK4: omp.inner.for.cond: 6978 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6979 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6980 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6981 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6982 // CHECK4: omp.inner.for.body: 6983 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6984 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 6985 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6986 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6987 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 6988 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1 6989 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 6990 // CHECK4-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 2 6991 // CHECK4-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32 6992 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 6993 // CHECK4-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 6994 // CHECK4-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 6995 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 6996 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 6997 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1 6998 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 6999 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7000 // CHECK4: omp.body.continue: 7001 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7002 // CHECK4: omp.inner.for.inc: 7003 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7004 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 7005 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 7006 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 7007 // CHECK4: omp.inner.for.end: 7008 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7009 // CHECK4: omp.loop.exit: 7010 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7011 // CHECK4-NEXT: ret void 7012 // 7013 // 7014 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 7015 // CHECK4-SAME: () #[[ATTR4]] { 7016 // CHECK4-NEXT: entry: 7017 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 7018 // CHECK4-NEXT: ret void 7019 // 7020 // 7021 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 7022 // CHECK9-SAME: (i64 noundef [[AA:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 7023 // CHECK9-NEXT: entry: 7024 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7025 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7026 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 7027 // CHECK9-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 7028 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 7029 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7030 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 7031 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 7032 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7033 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 7034 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 7035 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 4 7036 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 4 7037 // CHECK9-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 7038 // CHECK9-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 7039 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 7040 // CHECK9-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2 7041 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 7042 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]]) 7043 // CHECK9-NEXT: ret void 7044 // 7045 // 7046 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 7047 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 7048 // CHECK9-NEXT: entry: 7049 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7050 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7051 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7052 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7053 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7054 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7055 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7056 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7057 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7058 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7059 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7060 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7061 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7062 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7063 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7064 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7065 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7066 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7067 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7068 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7069 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7070 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7071 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 7072 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7073 // CHECK9: cond.true: 7074 // CHECK9-NEXT: br label [[COND_END:%.*]] 7075 // CHECK9: cond.false: 7076 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7077 // CHECK9-NEXT: br label [[COND_END]] 7078 // CHECK9: cond.end: 7079 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7080 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7081 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7082 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7083 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7084 // CHECK9: omp.inner.for.cond: 7085 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7086 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7087 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7088 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7089 // CHECK9: omp.inner.for.body: 7090 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7091 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 7092 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7093 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7094 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7095 // CHECK9: omp.body.continue: 7096 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7097 // CHECK9: omp.inner.for.inc: 7098 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7099 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 7100 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 7101 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7102 // CHECK9: omp.inner.for.end: 7103 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7104 // CHECK9: omp.loop.exit: 7105 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7106 // CHECK9-NEXT: ret void 7107 // 7108 // 7109 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 7110 // CHECK9-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR0]] { 7111 // CHECK9-NEXT: entry: 7112 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7113 // CHECK9-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 7114 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7115 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7116 // CHECK9-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 7117 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 7118 // CHECK9-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 7119 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8 7120 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 7121 // CHECK9-NEXT: ret void 7122 // 7123 // 7124 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 7125 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 7126 // CHECK9-NEXT: entry: 7127 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7128 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7129 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7130 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7131 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7132 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7133 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7134 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7135 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7136 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7137 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7138 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7139 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7140 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7141 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7142 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7143 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7144 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7145 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7146 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7147 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7148 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7149 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 7150 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7151 // CHECK9: cond.true: 7152 // CHECK9-NEXT: br label [[COND_END:%.*]] 7153 // CHECK9: cond.false: 7154 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7155 // CHECK9-NEXT: br label [[COND_END]] 7156 // CHECK9: cond.end: 7157 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7158 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7159 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7160 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7161 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7162 // CHECK9: omp.inner.for.cond: 7163 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7164 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7165 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7166 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7167 // CHECK9: omp.inner.for.body: 7168 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7169 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 7170 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7171 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7172 // CHECK9-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 7173 // CHECK9-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 7174 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 7175 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 7176 // CHECK9-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 7177 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7178 // CHECK9: omp.body.continue: 7179 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7180 // CHECK9: omp.inner.for.inc: 7181 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7182 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 7183 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 7184 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7185 // CHECK9: omp.inner.for.end: 7186 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7187 // CHECK9: omp.loop.exit: 7188 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7189 // CHECK9-NEXT: ret void 7190 // 7191 // 7192 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 7193 // CHECK9-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 7194 // CHECK9-NEXT: entry: 7195 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7196 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7197 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 7198 // CHECK9-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 7199 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7200 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7201 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7202 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7203 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 7204 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 7205 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4 7206 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 7207 // CHECK9-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 2 7208 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 7209 // CHECK9-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2 7210 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 7211 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]]) 7212 // CHECK9-NEXT: ret void 7213 // 7214 // 7215 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 7216 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 7217 // CHECK9-NEXT: entry: 7218 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7219 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7220 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7221 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7222 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7223 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7224 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7225 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7226 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7227 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7228 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7229 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7230 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7231 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7232 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7233 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7234 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7235 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7236 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7237 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7238 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7239 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7240 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7241 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7242 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7243 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 7244 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7245 // CHECK9: cond.true: 7246 // CHECK9-NEXT: br label [[COND_END:%.*]] 7247 // CHECK9: cond.false: 7248 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7249 // CHECK9-NEXT: br label [[COND_END]] 7250 // CHECK9: cond.end: 7251 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7252 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7253 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7254 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7255 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7256 // CHECK9: omp.inner.for.cond: 7257 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7258 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7259 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7260 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7261 // CHECK9: omp.inner.for.body: 7262 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7263 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 7264 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7265 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7266 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 7267 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 7268 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 7269 // CHECK9-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 2 7270 // CHECK9-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32 7271 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 7272 // CHECK9-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 7273 // CHECK9-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 7274 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7275 // CHECK9: omp.body.continue: 7276 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7277 // CHECK9: omp.inner.for.inc: 7278 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7279 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1 7280 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 7281 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7282 // CHECK9: omp.inner.for.end: 7283 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7284 // CHECK9: omp.loop.exit: 7285 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7286 // CHECK9-NEXT: ret void 7287 // 7288 // 7289 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 7290 // CHECK9-SAME: (i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 7291 // CHECK9-NEXT: entry: 7292 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7293 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 7294 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7295 // CHECK9-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 7296 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 7297 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 7298 // CHECK9-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 7299 // CHECK9-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 7300 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 7301 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7302 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 7303 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 7304 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7305 // CHECK9-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 7306 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7307 // CHECK9-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 7308 // CHECK9-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 7309 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 7310 // CHECK9-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 7311 // CHECK9-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 7312 // CHECK9-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 7313 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 7314 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7315 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 7316 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7317 // CHECK9-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 7318 // CHECK9-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 7319 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 7320 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 7321 // CHECK9-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 7322 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 7323 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 7324 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 7325 // CHECK9-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 7326 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4 7327 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8 7328 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 4 7329 // CHECK9-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 7330 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4 7331 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 7332 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]]) 7333 // CHECK9-NEXT: ret void 7334 // 7335 // 7336 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 7337 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 7338 // CHECK9-NEXT: entry: 7339 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7340 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7341 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7342 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 7343 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7344 // CHECK9-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 7345 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 7346 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 7347 // CHECK9-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 7348 // CHECK9-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 7349 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 7350 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7351 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7352 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7353 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7354 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7355 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7356 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7357 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7358 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7359 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7360 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7361 // CHECK9-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 7362 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7363 // CHECK9-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 7364 // CHECK9-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 7365 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 7366 // CHECK9-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 7367 // CHECK9-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 7368 // CHECK9-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 7369 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 7370 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7371 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 7372 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7373 // CHECK9-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 7374 // CHECK9-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 7375 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 7376 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 7377 // CHECK9-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 7378 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 7379 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 7380 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7381 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7382 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7383 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7384 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 4 7385 // CHECK9-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7386 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 7387 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 7388 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7389 // CHECK9: omp.dispatch.cond: 7390 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7391 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 7392 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7393 // CHECK9: cond.true: 7394 // CHECK9-NEXT: br label [[COND_END:%.*]] 7395 // CHECK9: cond.false: 7396 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7397 // CHECK9-NEXT: br label [[COND_END]] 7398 // CHECK9: cond.end: 7399 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 7400 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7401 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7402 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 7403 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7404 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7405 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 7406 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7407 // CHECK9: omp.dispatch.body: 7408 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7409 // CHECK9: omp.inner.for.cond: 7410 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7411 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 7412 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 7413 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7414 // CHECK9: omp.inner.for.body: 7415 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7416 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 7417 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7418 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 7419 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !13 7420 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 7421 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group !13 7422 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2 7423 // CHECK9-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !13 7424 // CHECK9-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double 7425 // CHECK9-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00 7426 // CHECK9-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float 7427 // CHECK9-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !13 7428 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3 7429 // CHECK9-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !13 7430 // CHECK9-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double 7431 // CHECK9-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00 7432 // CHECK9-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float 7433 // CHECK9-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !13 7434 // CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1 7435 // CHECK9-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2 7436 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !13 7437 // CHECK9-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00 7438 // CHECK9-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !13 7439 // CHECK9-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]] 7440 // CHECK9-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]] 7441 // CHECK9-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3 7442 // CHECK9-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !13 7443 // CHECK9-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00 7444 // CHECK9-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !13 7445 // CHECK9-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 7446 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !13 7447 // CHECK9-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1 7448 // CHECK9-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !13 7449 // CHECK9-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 7450 // CHECK9-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !13 7451 // CHECK9-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32 7452 // CHECK9-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1 7453 // CHECK9-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8 7454 // CHECK9-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !13 7455 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7456 // CHECK9: omp.body.continue: 7457 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7458 // CHECK9: omp.inner.for.inc: 7459 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7460 // CHECK9-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1 7461 // CHECK9-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7462 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 7463 // CHECK9: omp.inner.for.end: 7464 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7465 // CHECK9: omp.dispatch.inc: 7466 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7467 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7468 // CHECK9-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 7469 // CHECK9-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4 7470 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7471 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7472 // CHECK9-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 7473 // CHECK9-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4 7474 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 7475 // CHECK9: omp.dispatch.end: 7476 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 7477 // CHECK9-NEXT: ret void 7478 // 7479 // 7480 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 7481 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 7482 // CHECK9-NEXT: entry: 7483 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7484 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7485 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7486 // CHECK9-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 7487 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 7488 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 7489 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 7490 // CHECK9-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 7491 // CHECK9-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 7492 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 7493 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7494 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7495 // CHECK9-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 7496 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 7497 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 7498 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7499 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7500 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 7501 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 7502 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 7503 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32* 7504 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4 7505 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 7506 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 7507 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32* 7508 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4 7509 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8 7510 // CHECK9-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 2 7511 // CHECK9-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 7512 // CHECK9-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2 7513 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8 7514 // CHECK9-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 1 7515 // CHECK9-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 7516 // CHECK9-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1 7517 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 7518 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]]) 7519 // CHECK9-NEXT: ret void 7520 // 7521 // 7522 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 7523 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 7524 // CHECK9-NEXT: entry: 7525 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7526 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7527 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7528 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7529 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7530 // CHECK9-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 7531 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 7532 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7533 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7534 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7535 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 7536 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 7537 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7538 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7539 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7540 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7541 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7542 // CHECK9-NEXT: [[I8:%.*]] = alloca i32, align 4 7543 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7544 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7545 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 7546 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7547 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7548 // CHECK9-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 7549 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 7550 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 7551 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7552 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7553 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 7554 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 7555 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4 7556 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 7557 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 7558 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4 7559 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 7560 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7561 // CHECK9-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 7562 // CHECK9-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 7563 // CHECK9-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 7564 // CHECK9-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 7565 // CHECK9-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 7566 // CHECK9-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 7567 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7568 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 7569 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7570 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 7571 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 7572 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7573 // CHECK9: omp.precond.then: 7574 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7575 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 7576 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 7577 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7578 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7579 // CHECK9-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7580 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 7581 // CHECK9-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7582 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7583 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 7584 // CHECK9-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 7585 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7586 // CHECK9: cond.true: 7587 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 7588 // CHECK9-NEXT: br label [[COND_END:%.*]] 7589 // CHECK9: cond.false: 7590 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7591 // CHECK9-NEXT: br label [[COND_END]] 7592 // CHECK9: cond.end: 7593 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 7594 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7595 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7596 // CHECK9-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 7597 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7598 // CHECK9: omp.inner.for.cond: 7599 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7600 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7601 // CHECK9-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1 7602 // CHECK9-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]] 7603 // CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7604 // CHECK9: omp.inner.for.body: 7605 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7606 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7607 // CHECK9-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 7608 // CHECK9-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]] 7609 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4 7610 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4 7611 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1 7612 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 4 7613 // CHECK9-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 2 7614 // CHECK9-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32 7615 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 7616 // CHECK9-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16 7617 // CHECK9-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 2 7618 // CHECK9-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 1 7619 // CHECK9-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32 7620 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1 7621 // CHECK9-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8 7622 // CHECK9-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 1 7623 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 7624 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 7625 // CHECK9-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1 7626 // CHECK9-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4 7627 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7628 // CHECK9: omp.body.continue: 7629 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7630 // CHECK9: omp.inner.for.inc: 7631 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7632 // CHECK9-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1 7633 // CHECK9-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 7634 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7635 // CHECK9: omp.inner.for.end: 7636 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7637 // CHECK9: omp.loop.exit: 7638 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7639 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 7640 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 7641 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7642 // CHECK9: omp.precond.end: 7643 // CHECK9-NEXT: ret void 7644 // 7645 // 7646 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 7647 // CHECK9-SAME: (%struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 7648 // CHECK9-NEXT: entry: 7649 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 7650 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 7651 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7652 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 7653 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 7654 // CHECK9-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 7655 // CHECK9-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 7656 // CHECK9-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 7657 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7658 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 7659 // CHECK9-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 7660 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 7661 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 7662 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7663 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 7664 // CHECK9-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 7665 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 7666 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32* 7667 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 7668 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8 7669 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]]) 7670 // CHECK9-NEXT: ret void 7671 // 7672 // 7673 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 7674 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 7675 // CHECK9-NEXT: entry: 7676 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7677 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7678 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 7679 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 7680 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7681 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 7682 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 7683 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7684 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7685 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7686 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7687 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7688 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7689 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7690 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7691 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7692 // CHECK9-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 7693 // CHECK9-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 7694 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7695 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 7696 // CHECK9-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 7697 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 7698 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 7699 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7700 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 7701 // CHECK9-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 7702 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7703 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7704 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7705 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7706 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7707 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 7708 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7709 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7710 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 7711 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7712 // CHECK9: cond.true: 7713 // CHECK9-NEXT: br label [[COND_END:%.*]] 7714 // CHECK9: cond.false: 7715 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7716 // CHECK9-NEXT: br label [[COND_END]] 7717 // CHECK9: cond.end: 7718 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 7719 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7720 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7721 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 7722 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7723 // CHECK9: omp.inner.for.cond: 7724 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7725 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7726 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 7727 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7728 // CHECK9: omp.inner.for.body: 7729 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7730 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 7731 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7732 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7733 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 7734 // CHECK9-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double 7735 // CHECK9-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00 7736 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 7737 // CHECK9-NEXT: store double [[ADD5]], double* [[A]], align 8 7738 // CHECK9-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 7739 // CHECK9-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8 7740 // CHECK9-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 7741 // CHECK9-NEXT: store double [[INC]], double* [[A6]], align 8 7742 // CHECK9-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16 7743 // CHECK9-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]] 7744 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]] 7745 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 7746 // CHECK9-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2 7747 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7748 // CHECK9: omp.body.continue: 7749 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7750 // CHECK9: omp.inner.for.inc: 7751 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7752 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 7753 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 7754 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7755 // CHECK9: omp.inner.for.end: 7756 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7757 // CHECK9: omp.loop.exit: 7758 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 7759 // CHECK9-NEXT: ret void 7760 // 7761 // 7762 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 7763 // CHECK9-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 7764 // CHECK9-NEXT: entry: 7765 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7766 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7767 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 7768 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 7769 // CHECK9-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 7770 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7771 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7772 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 7773 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7774 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7775 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 7776 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 7777 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 7778 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4 7779 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8 7780 // CHECK9-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 2 7781 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 7782 // CHECK9-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 7783 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 7784 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]]) 7785 // CHECK9-NEXT: ret void 7786 // 7787 // 7788 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 7789 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 7790 // CHECK9-NEXT: entry: 7791 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7792 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7793 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7794 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7795 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 7796 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7797 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7798 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7799 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7800 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7801 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7802 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7803 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7804 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7805 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7806 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7807 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 7808 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7809 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7810 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 7811 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7812 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7813 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7814 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7815 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7816 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7817 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7818 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7819 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 7820 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7821 // CHECK9: cond.true: 7822 // CHECK9-NEXT: br label [[COND_END:%.*]] 7823 // CHECK9: cond.false: 7824 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7825 // CHECK9-NEXT: br label [[COND_END]] 7826 // CHECK9: cond.end: 7827 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7828 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7829 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7830 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7831 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7832 // CHECK9: omp.inner.for.cond: 7833 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7834 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7835 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7836 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7837 // CHECK9: omp.inner.for.body: 7838 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7839 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 7840 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7841 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7842 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 7843 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 7844 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 7845 // CHECK9-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 2 7846 // CHECK9-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32 7847 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 7848 // CHECK9-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 7849 // CHECK9-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 7850 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 7851 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 7852 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1 7853 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4 7854 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7855 // CHECK9: omp.body.continue: 7856 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7857 // CHECK9: omp.inner.for.inc: 7858 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7859 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1 7860 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 7861 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7862 // CHECK9: omp.inner.for.end: 7863 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7864 // CHECK9: omp.loop.exit: 7865 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7866 // CHECK9-NEXT: ret void 7867 // 7868 // 7869 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 7870 // CHECK10-SAME: (i64 noundef [[AA:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 7871 // CHECK10-NEXT: entry: 7872 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7873 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7874 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 7875 // CHECK10-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 7876 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 7877 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7878 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 7879 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 7880 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7881 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 7882 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 7883 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 4 7884 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 4 7885 // CHECK10-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 7886 // CHECK10-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 7887 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 7888 // CHECK10-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2 7889 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 7890 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]]) 7891 // CHECK10-NEXT: ret void 7892 // 7893 // 7894 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 7895 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 7896 // CHECK10-NEXT: entry: 7897 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7898 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7899 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7900 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7901 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7902 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7903 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7904 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7905 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7906 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7907 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7908 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7909 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7910 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7911 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7912 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7913 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7914 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7915 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7916 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7917 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7918 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7919 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 7920 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7921 // CHECK10: cond.true: 7922 // CHECK10-NEXT: br label [[COND_END:%.*]] 7923 // CHECK10: cond.false: 7924 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7925 // CHECK10-NEXT: br label [[COND_END]] 7926 // CHECK10: cond.end: 7927 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7928 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7929 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7930 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7931 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7932 // CHECK10: omp.inner.for.cond: 7933 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7934 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7935 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7936 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7937 // CHECK10: omp.inner.for.body: 7938 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7939 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 7940 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7941 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7942 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7943 // CHECK10: omp.body.continue: 7944 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7945 // CHECK10: omp.inner.for.inc: 7946 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7947 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 7948 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 7949 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7950 // CHECK10: omp.inner.for.end: 7951 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7952 // CHECK10: omp.loop.exit: 7953 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7954 // CHECK10-NEXT: ret void 7955 // 7956 // 7957 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 7958 // CHECK10-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR0]] { 7959 // CHECK10-NEXT: entry: 7960 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7961 // CHECK10-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 7962 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7963 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7964 // CHECK10-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 7965 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 7966 // CHECK10-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 7967 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8 7968 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 7969 // CHECK10-NEXT: ret void 7970 // 7971 // 7972 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 7973 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 7974 // CHECK10-NEXT: entry: 7975 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7976 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7977 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7978 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7979 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7980 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7981 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7982 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7983 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7984 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7985 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7986 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7987 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7988 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7989 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7990 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7991 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7992 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7993 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7994 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7995 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7996 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7997 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 7998 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7999 // CHECK10: cond.true: 8000 // CHECK10-NEXT: br label [[COND_END:%.*]] 8001 // CHECK10: cond.false: 8002 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8003 // CHECK10-NEXT: br label [[COND_END]] 8004 // CHECK10: cond.end: 8005 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8006 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8007 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8008 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8009 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8010 // CHECK10: omp.inner.for.cond: 8011 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8012 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8013 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8014 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8015 // CHECK10: omp.inner.for.body: 8016 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8017 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 8018 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8019 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8020 // CHECK10-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 8021 // CHECK10-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 8022 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 8023 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 8024 // CHECK10-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 8025 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8026 // CHECK10: omp.body.continue: 8027 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8028 // CHECK10: omp.inner.for.inc: 8029 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8030 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 8031 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 8032 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8033 // CHECK10: omp.inner.for.end: 8034 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8035 // CHECK10: omp.loop.exit: 8036 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8037 // CHECK10-NEXT: ret void 8038 // 8039 // 8040 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 8041 // CHECK10-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 8042 // CHECK10-NEXT: entry: 8043 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8044 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 8045 // CHECK10-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 8046 // CHECK10-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 8047 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8048 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 8049 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 8050 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 8051 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 8052 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 8053 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4 8054 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 8055 // CHECK10-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 2 8056 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 8057 // CHECK10-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2 8058 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 8059 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]]) 8060 // CHECK10-NEXT: ret void 8061 // 8062 // 8063 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 8064 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 8065 // CHECK10-NEXT: entry: 8066 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8067 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8068 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8069 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 8070 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8071 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8072 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8073 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8074 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8075 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8076 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8077 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8078 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8079 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8080 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 8081 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 8082 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 8083 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8084 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8085 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8086 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8087 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8088 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8089 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8090 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8091 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 8092 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8093 // CHECK10: cond.true: 8094 // CHECK10-NEXT: br label [[COND_END:%.*]] 8095 // CHECK10: cond.false: 8096 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8097 // CHECK10-NEXT: br label [[COND_END]] 8098 // CHECK10: cond.end: 8099 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8100 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8101 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8102 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8103 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8104 // CHECK10: omp.inner.for.cond: 8105 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8106 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8107 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8108 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8109 // CHECK10: omp.inner.for.body: 8110 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8111 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 8112 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8113 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8114 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 8115 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 8116 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 8117 // CHECK10-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 2 8118 // CHECK10-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32 8119 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 8120 // CHECK10-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 8121 // CHECK10-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 8122 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8123 // CHECK10: omp.body.continue: 8124 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8125 // CHECK10: omp.inner.for.inc: 8126 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8127 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1 8128 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 8129 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8130 // CHECK10: omp.inner.for.end: 8131 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8132 // CHECK10: omp.loop.exit: 8133 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8134 // CHECK10-NEXT: ret void 8135 // 8136 // 8137 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 8138 // CHECK10-SAME: (i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 8139 // CHECK10-NEXT: entry: 8140 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8141 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 8142 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8143 // CHECK10-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 8144 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 8145 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 8146 // CHECK10-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 8147 // CHECK10-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 8148 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 8149 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8150 // CHECK10-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 8151 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8152 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8153 // CHECK10-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 8154 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8155 // CHECK10-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 8156 // CHECK10-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 8157 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 8158 // CHECK10-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 8159 // CHECK10-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 8160 // CHECK10-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 8161 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8162 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 8163 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 8164 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8165 // CHECK10-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 8166 // CHECK10-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 8167 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 8168 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 8169 // CHECK10-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 8170 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 8171 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8172 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 8173 // CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 8174 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4 8175 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8 8176 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 4 8177 // CHECK10-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8178 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4 8179 // CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8180 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]]) 8181 // CHECK10-NEXT: ret void 8182 // 8183 // 8184 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 8185 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 8186 // CHECK10-NEXT: entry: 8187 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8188 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8189 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8190 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 8191 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8192 // CHECK10-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 8193 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 8194 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 8195 // CHECK10-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 8196 // CHECK10-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 8197 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 8198 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8199 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8200 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8201 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8202 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8203 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8204 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8205 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8206 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8207 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8208 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8209 // CHECK10-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 8210 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8211 // CHECK10-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 8212 // CHECK10-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 8213 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 8214 // CHECK10-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 8215 // CHECK10-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 8216 // CHECK10-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 8217 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8218 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 8219 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 8220 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8221 // CHECK10-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 8222 // CHECK10-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 8223 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 8224 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 8225 // CHECK10-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 8226 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 8227 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8228 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8229 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8230 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8231 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8232 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 4 8233 // CHECK10-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8234 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 8235 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 8236 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8237 // CHECK10: omp.dispatch.cond: 8238 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8239 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 8240 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8241 // CHECK10: cond.true: 8242 // CHECK10-NEXT: br label [[COND_END:%.*]] 8243 // CHECK10: cond.false: 8244 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8245 // CHECK10-NEXT: br label [[COND_END]] 8246 // CHECK10: cond.end: 8247 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 8248 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8249 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8250 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 8251 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8252 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8253 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 8254 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8255 // CHECK10: omp.dispatch.body: 8256 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8257 // CHECK10: omp.inner.for.cond: 8258 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 8259 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 8260 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 8261 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8262 // CHECK10: omp.inner.for.body: 8263 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 8264 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 8265 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8266 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 8267 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !13 8268 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 8269 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group !13 8270 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2 8271 // CHECK10-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !13 8272 // CHECK10-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double 8273 // CHECK10-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00 8274 // CHECK10-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float 8275 // CHECK10-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !13 8276 // CHECK10-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3 8277 // CHECK10-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !13 8278 // CHECK10-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double 8279 // CHECK10-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00 8280 // CHECK10-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float 8281 // CHECK10-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !13 8282 // CHECK10-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1 8283 // CHECK10-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2 8284 // CHECK10-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !13 8285 // CHECK10-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00 8286 // CHECK10-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !13 8287 // CHECK10-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]] 8288 // CHECK10-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]] 8289 // CHECK10-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3 8290 // CHECK10-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !13 8291 // CHECK10-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00 8292 // CHECK10-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !13 8293 // CHECK10-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 8294 // CHECK10-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !13 8295 // CHECK10-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1 8296 // CHECK10-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !13 8297 // CHECK10-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 8298 // CHECK10-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !13 8299 // CHECK10-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32 8300 // CHECK10-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1 8301 // CHECK10-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8 8302 // CHECK10-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !13 8303 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8304 // CHECK10: omp.body.continue: 8305 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8306 // CHECK10: omp.inner.for.inc: 8307 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 8308 // CHECK10-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1 8309 // CHECK10-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 8310 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 8311 // CHECK10: omp.inner.for.end: 8312 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8313 // CHECK10: omp.dispatch.inc: 8314 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8315 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8316 // CHECK10-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 8317 // CHECK10-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4 8318 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8319 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8320 // CHECK10-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 8321 // CHECK10-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4 8322 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 8323 // CHECK10: omp.dispatch.end: 8324 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 8325 // CHECK10-NEXT: ret void 8326 // 8327 // 8328 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 8329 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 8330 // CHECK10-NEXT: entry: 8331 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8332 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8333 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 8334 // CHECK10-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 8335 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 8336 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 8337 // CHECK10-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 8338 // CHECK10-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 8339 // CHECK10-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 8340 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8341 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8342 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 8343 // CHECK10-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 8344 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 8345 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8346 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 8347 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 8348 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 8349 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 8350 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 8351 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32* 8352 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4 8353 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 8354 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 8355 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32* 8356 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4 8357 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8 8358 // CHECK10-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 2 8359 // CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 8360 // CHECK10-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2 8361 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8 8362 // CHECK10-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 1 8363 // CHECK10-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 8364 // CHECK10-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1 8365 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 8366 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]]) 8367 // CHECK10-NEXT: ret void 8368 // 8369 // 8370 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4 8371 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 8372 // CHECK10-NEXT: entry: 8373 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8374 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8375 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8376 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8377 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 8378 // CHECK10-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 8379 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 8380 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8381 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8382 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8383 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 8384 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 8385 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8386 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8387 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8388 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8389 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8390 // CHECK10-NEXT: [[I8:%.*]] = alloca i32, align 4 8391 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8392 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8393 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8394 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8395 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 8396 // CHECK10-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 8397 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 8398 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8399 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 8400 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 8401 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 8402 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 8403 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4 8404 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 8405 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 8406 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4 8407 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 8408 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8409 // CHECK10-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 8410 // CHECK10-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 8411 // CHECK10-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 8412 // CHECK10-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 8413 // CHECK10-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 8414 // CHECK10-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 8415 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8416 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 8417 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8418 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 8419 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 8420 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8421 // CHECK10: omp.precond.then: 8422 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8423 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 8424 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 8425 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8426 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8427 // CHECK10-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8428 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 8429 // CHECK10-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8430 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8431 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 8432 // CHECK10-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 8433 // CHECK10-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8434 // CHECK10: cond.true: 8435 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 8436 // CHECK10-NEXT: br label [[COND_END:%.*]] 8437 // CHECK10: cond.false: 8438 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8439 // CHECK10-NEXT: br label [[COND_END]] 8440 // CHECK10: cond.end: 8441 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 8442 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8443 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8444 // CHECK10-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 8445 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8446 // CHECK10: omp.inner.for.cond: 8447 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8448 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8449 // CHECK10-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1 8450 // CHECK10-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]] 8451 // CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8452 // CHECK10: omp.inner.for.body: 8453 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8454 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8455 // CHECK10-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 8456 // CHECK10-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]] 8457 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4 8458 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4 8459 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1 8460 // CHECK10-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 4 8461 // CHECK10-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 2 8462 // CHECK10-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32 8463 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 8464 // CHECK10-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16 8465 // CHECK10-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 2 8466 // CHECK10-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 1 8467 // CHECK10-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32 8468 // CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1 8469 // CHECK10-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8 8470 // CHECK10-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 1 8471 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 8472 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 8473 // CHECK10-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1 8474 // CHECK10-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4 8475 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8476 // CHECK10: omp.body.continue: 8477 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8478 // CHECK10: omp.inner.for.inc: 8479 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8480 // CHECK10-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1 8481 // CHECK10-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 8482 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8483 // CHECK10: omp.inner.for.end: 8484 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8485 // CHECK10: omp.loop.exit: 8486 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8487 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 8488 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 8489 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 8490 // CHECK10: omp.precond.end: 8491 // CHECK10-NEXT: ret void 8492 // 8493 // 8494 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 8495 // CHECK10-SAME: (%struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 8496 // CHECK10-NEXT: entry: 8497 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 8498 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 8499 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8500 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 8501 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 8502 // CHECK10-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 8503 // CHECK10-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 8504 // CHECK10-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 8505 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8506 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 8507 // CHECK10-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 8508 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 8509 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 8510 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8511 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 8512 // CHECK10-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 8513 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 8514 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32* 8515 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 8516 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8 8517 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]]) 8518 // CHECK10-NEXT: ret void 8519 // 8520 // 8521 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5 8522 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 8523 // CHECK10-NEXT: entry: 8524 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8525 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8526 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 8527 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 8528 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8529 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 8530 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 8531 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8532 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8533 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8534 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8535 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8536 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8537 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8538 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8539 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8540 // CHECK10-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 8541 // CHECK10-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 8542 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8543 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 8544 // CHECK10-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 8545 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 8546 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 8547 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8548 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 8549 // CHECK10-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 8550 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8551 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8552 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8553 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8554 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8555 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 8556 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8557 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8558 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 8559 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8560 // CHECK10: cond.true: 8561 // CHECK10-NEXT: br label [[COND_END:%.*]] 8562 // CHECK10: cond.false: 8563 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8564 // CHECK10-NEXT: br label [[COND_END]] 8565 // CHECK10: cond.end: 8566 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 8567 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8568 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8569 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 8570 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8571 // CHECK10: omp.inner.for.cond: 8572 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8573 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8574 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 8575 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8576 // CHECK10: omp.inner.for.body: 8577 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8578 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 8579 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8580 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8581 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 8582 // CHECK10-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double 8583 // CHECK10-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00 8584 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 8585 // CHECK10-NEXT: store double [[ADD5]], double* [[A]], align 8 8586 // CHECK10-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 8587 // CHECK10-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8 8588 // CHECK10-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 8589 // CHECK10-NEXT: store double [[INC]], double* [[A6]], align 8 8590 // CHECK10-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16 8591 // CHECK10-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]] 8592 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]] 8593 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 8594 // CHECK10-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2 8595 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8596 // CHECK10: omp.body.continue: 8597 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8598 // CHECK10: omp.inner.for.inc: 8599 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8600 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 8601 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 8602 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8603 // CHECK10: omp.inner.for.end: 8604 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8605 // CHECK10: omp.loop.exit: 8606 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 8607 // CHECK10-NEXT: ret void 8608 // 8609 // 8610 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 8611 // CHECK10-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 8612 // CHECK10-NEXT: entry: 8613 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8614 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 8615 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 8616 // CHECK10-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 8617 // CHECK10-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 8618 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8619 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 8620 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 8621 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 8622 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 8623 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 8624 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 8625 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 8626 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4 8627 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8 8628 // CHECK10-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 2 8629 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 8630 // CHECK10-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 8631 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 8632 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]]) 8633 // CHECK10-NEXT: ret void 8634 // 8635 // 8636 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6 8637 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 8638 // CHECK10-NEXT: entry: 8639 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8640 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8641 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8642 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 8643 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 8644 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8645 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8646 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8647 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8648 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8649 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8650 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8651 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8652 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8653 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8654 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 8655 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 8656 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 8657 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 8658 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 8659 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8660 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8661 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8662 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8663 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8664 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8665 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8666 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8667 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 8668 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8669 // CHECK10: cond.true: 8670 // CHECK10-NEXT: br label [[COND_END:%.*]] 8671 // CHECK10: cond.false: 8672 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8673 // CHECK10-NEXT: br label [[COND_END]] 8674 // CHECK10: cond.end: 8675 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8676 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8677 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8678 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 8679 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8680 // CHECK10: omp.inner.for.cond: 8681 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8682 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8683 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8684 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8685 // CHECK10: omp.inner.for.body: 8686 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8687 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 8688 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8689 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8690 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 8691 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 8692 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 8693 // CHECK10-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 2 8694 // CHECK10-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32 8695 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 8696 // CHECK10-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 8697 // CHECK10-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 8698 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 8699 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 8700 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1 8701 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4 8702 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8703 // CHECK10: omp.body.continue: 8704 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8705 // CHECK10: omp.inner.for.inc: 8706 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8707 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1 8708 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 8709 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8710 // CHECK10: omp.inner.for.end: 8711 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8712 // CHECK10: omp.loop.exit: 8713 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 8714 // CHECK10-NEXT: ret void 8715 // 8716 // 8717 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 8718 // CHECK11-SAME: (i32 noundef [[AA:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 8719 // CHECK11-NEXT: entry: 8720 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 8721 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8722 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 8723 // CHECK11-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 8724 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 8725 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 8726 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 8727 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 8728 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 8729 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 8730 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 8731 // CHECK11-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 8732 // CHECK11-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 8733 // CHECK11-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 8734 // CHECK11-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 8735 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 8736 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]]) 8737 // CHECK11-NEXT: ret void 8738 // 8739 // 8740 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 8741 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 8742 // CHECK11-NEXT: entry: 8743 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8744 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8745 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 8746 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8747 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 8748 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8749 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8750 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8751 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8752 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 8753 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8754 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8755 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 8756 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 8757 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8758 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8759 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8760 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8761 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8762 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8763 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8764 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8765 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 8766 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8767 // CHECK11: cond.true: 8768 // CHECK11-NEXT: br label [[COND_END:%.*]] 8769 // CHECK11: cond.false: 8770 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8771 // CHECK11-NEXT: br label [[COND_END]] 8772 // CHECK11: cond.end: 8773 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8774 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8775 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8776 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8777 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8778 // CHECK11: omp.inner.for.cond: 8779 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8780 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8781 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8782 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8783 // CHECK11: omp.inner.for.body: 8784 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8785 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 8786 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8787 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8788 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8789 // CHECK11: omp.body.continue: 8790 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8791 // CHECK11: omp.inner.for.inc: 8792 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8793 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 8794 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 8795 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 8796 // CHECK11: omp.inner.for.end: 8797 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8798 // CHECK11: omp.loop.exit: 8799 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8800 // CHECK11-NEXT: ret void 8801 // 8802 // 8803 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 8804 // CHECK11-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR0]] { 8805 // CHECK11-NEXT: entry: 8806 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 8807 // CHECK11-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 8808 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 8809 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 8810 // CHECK11-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 8811 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 8812 // CHECK11-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 8813 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4 8814 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 8815 // CHECK11-NEXT: ret void 8816 // 8817 // 8818 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 8819 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 8820 // CHECK11-NEXT: entry: 8821 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8822 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8823 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 8824 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8825 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 8826 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8827 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8828 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8829 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8830 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 8831 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8832 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8833 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 8834 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 8835 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8836 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8837 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8838 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8839 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8840 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8841 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8842 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8843 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 8844 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8845 // CHECK11: cond.true: 8846 // CHECK11-NEXT: br label [[COND_END:%.*]] 8847 // CHECK11: cond.false: 8848 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8849 // CHECK11-NEXT: br label [[COND_END]] 8850 // CHECK11: cond.end: 8851 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8852 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8853 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8854 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8855 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8856 // CHECK11: omp.inner.for.cond: 8857 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8858 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8859 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8860 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8861 // CHECK11: omp.inner.for.body: 8862 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8863 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 8864 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8865 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8866 // CHECK11-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 8867 // CHECK11-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 8868 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 8869 // CHECK11-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 8870 // CHECK11-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 8871 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8872 // CHECK11: omp.body.continue: 8873 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8874 // CHECK11: omp.inner.for.inc: 8875 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8876 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 8877 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 8878 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 8879 // CHECK11: omp.inner.for.end: 8880 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8881 // CHECK11: omp.loop.exit: 8882 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8883 // CHECK11-NEXT: ret void 8884 // 8885 // 8886 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 8887 // CHECK11-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 8888 // CHECK11-NEXT: entry: 8889 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 8890 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 8891 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 8892 // CHECK11-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 8893 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 8894 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 8895 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 8896 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 8897 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 8898 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 8899 // CHECK11-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 2 8900 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 8901 // CHECK11-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 8902 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 8903 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]]) 8904 // CHECK11-NEXT: ret void 8905 // 8906 // 8907 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 8908 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 8909 // CHECK11-NEXT: entry: 8910 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8911 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8912 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 8913 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 8914 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8915 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 8916 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8917 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8918 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8919 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8920 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 8921 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8922 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8923 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 8924 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 8925 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 8926 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8927 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8928 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8929 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8930 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8931 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8932 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8933 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8934 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 8935 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8936 // CHECK11: cond.true: 8937 // CHECK11-NEXT: br label [[COND_END:%.*]] 8938 // CHECK11: cond.false: 8939 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8940 // CHECK11-NEXT: br label [[COND_END]] 8941 // CHECK11: cond.end: 8942 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8943 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8944 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8945 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8946 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8947 // CHECK11: omp.inner.for.cond: 8948 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8949 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8950 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8951 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8952 // CHECK11: omp.inner.for.body: 8953 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8954 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 8955 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8956 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8957 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 8958 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 8959 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 8960 // CHECK11-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 2 8961 // CHECK11-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32 8962 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 8963 // CHECK11-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 8964 // CHECK11-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 8965 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8966 // CHECK11: omp.body.continue: 8967 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8968 // CHECK11: omp.inner.for.inc: 8969 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8970 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 8971 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 8972 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 8973 // CHECK11: omp.inner.for.end: 8974 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8975 // CHECK11: omp.loop.exit: 8976 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8977 // CHECK11-NEXT: ret void 8978 // 8979 // 8980 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 8981 // CHECK11-SAME: (i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 8982 // CHECK11-NEXT: entry: 8983 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 8984 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 8985 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8986 // CHECK11-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 8987 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 8988 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 8989 // CHECK11-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 8990 // CHECK11-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 8991 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 8992 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8993 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 8994 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 8995 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 8996 // CHECK11-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 8997 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 8998 // CHECK11-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 8999 // CHECK11-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 9000 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 9001 // CHECK11-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 9002 // CHECK11-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 9003 // CHECK11-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 9004 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 9005 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 9006 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 9007 // CHECK11-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 9008 // CHECK11-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 9009 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 9010 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 9011 // CHECK11-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 9012 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 9013 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 9014 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4 9015 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4 9016 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 9017 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 9018 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 9019 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]]) 9020 // CHECK11-NEXT: ret void 9021 // 9022 // 9023 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 9024 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 9025 // CHECK11-NEXT: entry: 9026 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9027 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9028 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9029 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 9030 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9031 // CHECK11-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 9032 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 9033 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 9034 // CHECK11-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 9035 // CHECK11-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 9036 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 9037 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9038 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9039 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9040 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9041 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9042 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9043 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9044 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9045 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9046 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9047 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9048 // CHECK11-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 9049 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 9050 // CHECK11-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 9051 // CHECK11-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 9052 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 9053 // CHECK11-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 9054 // CHECK11-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 9055 // CHECK11-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 9056 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 9057 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 9058 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 9059 // CHECK11-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 9060 // CHECK11-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 9061 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 9062 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 9063 // CHECK11-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 9064 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 9065 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9066 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9067 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9068 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9069 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 9070 // CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9071 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 9072 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 9073 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9074 // CHECK11: omp.dispatch.cond: 9075 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9076 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 9077 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9078 // CHECK11: cond.true: 9079 // CHECK11-NEXT: br label [[COND_END:%.*]] 9080 // CHECK11: cond.false: 9081 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9082 // CHECK11-NEXT: br label [[COND_END]] 9083 // CHECK11: cond.end: 9084 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 9085 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9086 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9087 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 9088 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9089 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9090 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 9091 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9092 // CHECK11: omp.dispatch.body: 9093 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9094 // CHECK11: omp.inner.for.cond: 9095 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 9096 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 9097 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 9098 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9099 // CHECK11: omp.inner.for.body: 9100 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 9101 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 9102 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9103 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 9104 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !14 9105 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 9106 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !14 9107 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2 9108 // CHECK11-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !14 9109 // CHECK11-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 9110 // CHECK11-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00 9111 // CHECK11-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float 9112 // CHECK11-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !14 9113 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3 9114 // CHECK11-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !14 9115 // CHECK11-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double 9116 // CHECK11-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00 9117 // CHECK11-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 9118 // CHECK11-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !14 9119 // CHECK11-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1 9120 // CHECK11-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2 9121 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !14 9122 // CHECK11-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00 9123 // CHECK11-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !14 9124 // CHECK11-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]] 9125 // CHECK11-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]] 9126 // CHECK11-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3 9127 // CHECK11-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !14 9128 // CHECK11-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00 9129 // CHECK11-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !14 9130 // CHECK11-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 9131 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !14 9132 // CHECK11-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1 9133 // CHECK11-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !14 9134 // CHECK11-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 9135 // CHECK11-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !14 9136 // CHECK11-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32 9137 // CHECK11-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1 9138 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8 9139 // CHECK11-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !14 9140 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9141 // CHECK11: omp.body.continue: 9142 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9143 // CHECK11: omp.inner.for.inc: 9144 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 9145 // CHECK11-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1 9146 // CHECK11-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 9147 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 9148 // CHECK11: omp.inner.for.end: 9149 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9150 // CHECK11: omp.dispatch.inc: 9151 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9152 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9153 // CHECK11-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 9154 // CHECK11-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4 9155 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9156 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9157 // CHECK11-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 9158 // CHECK11-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4 9159 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 9160 // CHECK11: omp.dispatch.end: 9161 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 9162 // CHECK11-NEXT: ret void 9163 // 9164 // 9165 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 9166 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 9167 // CHECK11-NEXT: entry: 9168 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9169 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9170 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9171 // CHECK11-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 9172 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 9173 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 9174 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 9175 // CHECK11-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 9176 // CHECK11-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 9177 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 9178 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9179 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9180 // CHECK11-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 9181 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 9182 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9183 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 9184 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 9185 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 9186 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 9187 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 9188 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4 9189 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4 9190 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4 9191 // CHECK11-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 2 9192 // CHECK11-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 9193 // CHECK11-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2 9194 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4 9195 // CHECK11-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 1 9196 // CHECK11-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 9197 // CHECK11-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1 9198 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 9199 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]]) 9200 // CHECK11-NEXT: ret void 9201 // 9202 // 9203 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 9204 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 9205 // CHECK11-NEXT: entry: 9206 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9207 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9208 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9209 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9210 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9211 // CHECK11-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 9212 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 9213 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9214 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9215 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9216 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9217 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 9218 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9219 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9220 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9221 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9222 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9223 // CHECK11-NEXT: [[I6:%.*]] = alloca i32, align 4 9224 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9225 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9226 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 9227 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9228 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9229 // CHECK11-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 9230 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 9231 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9232 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 9233 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 9234 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 9235 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 9236 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 9237 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 9238 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9239 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9240 // CHECK11-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 9241 // CHECK11-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 9242 // CHECK11-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 9243 // CHECK11-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 9244 // CHECK11-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 9245 // CHECK11-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 9246 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9247 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 9248 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9249 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9250 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 9251 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9252 // CHECK11: omp.precond.then: 9253 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9254 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 9255 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 9256 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9257 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9258 // CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9259 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 9260 // CHECK11-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9261 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9262 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 9263 // CHECK11-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 9264 // CHECK11-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9265 // CHECK11: cond.true: 9266 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 9267 // CHECK11-NEXT: br label [[COND_END:%.*]] 9268 // CHECK11: cond.false: 9269 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9270 // CHECK11-NEXT: br label [[COND_END]] 9271 // CHECK11: cond.end: 9272 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 9273 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9274 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9275 // CHECK11-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 9276 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9277 // CHECK11: omp.inner.for.cond: 9278 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9279 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9280 // CHECK11-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1 9281 // CHECK11-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]] 9282 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9283 // CHECK11: omp.inner.for.body: 9284 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9285 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9286 // CHECK11-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 9287 // CHECK11-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]] 9288 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4 9289 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4 9290 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 9291 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4 9292 // CHECK11-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 2 9293 // CHECK11-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32 9294 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1 9295 // CHECK11-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16 9296 // CHECK11-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 2 9297 // CHECK11-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 1 9298 // CHECK11-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32 9299 // CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1 9300 // CHECK11-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8 9301 // CHECK11-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 1 9302 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 9303 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 9304 // CHECK11-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1 9305 // CHECK11-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4 9306 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9307 // CHECK11: omp.body.continue: 9308 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9309 // CHECK11: omp.inner.for.inc: 9310 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9311 // CHECK11-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1 9312 // CHECK11-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 9313 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 9314 // CHECK11: omp.inner.for.end: 9315 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9316 // CHECK11: omp.loop.exit: 9317 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9318 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 9319 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 9320 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 9321 // CHECK11: omp.precond.end: 9322 // CHECK11-NEXT: ret void 9323 // 9324 // 9325 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 9326 // CHECK11-SAME: (%struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 9327 // CHECK11-NEXT: entry: 9328 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 9329 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 9330 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9331 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 9332 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 9333 // CHECK11-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 9334 // CHECK11-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 9335 // CHECK11-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 9336 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 9337 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 9338 // CHECK11-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 9339 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 9340 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 9341 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 9342 // CHECK11-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 9343 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4 9344 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 9345 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 9346 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]]) 9347 // CHECK11-NEXT: ret void 9348 // 9349 // 9350 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5 9351 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 9352 // CHECK11-NEXT: entry: 9353 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9354 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9355 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 9356 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 9357 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9358 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 9359 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 9360 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9361 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9362 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9363 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9364 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9365 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9366 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9367 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9368 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9369 // CHECK11-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 9370 // CHECK11-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 9371 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 9372 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 9373 // CHECK11-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 9374 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 9375 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 9376 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 9377 // CHECK11-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 9378 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9379 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9380 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9381 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9382 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9383 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 9384 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9385 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9386 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 9387 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9388 // CHECK11: cond.true: 9389 // CHECK11-NEXT: br label [[COND_END:%.*]] 9390 // CHECK11: cond.false: 9391 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9392 // CHECK11-NEXT: br label [[COND_END]] 9393 // CHECK11: cond.end: 9394 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 9395 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9396 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9397 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 9398 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9399 // CHECK11: omp.inner.for.cond: 9400 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9401 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9402 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 9403 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9404 // CHECK11: omp.inner.for.body: 9405 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9406 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 9407 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9408 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9409 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4 9410 // CHECK11-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double 9411 // CHECK11-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00 9412 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 9413 // CHECK11-NEXT: store double [[ADD4]], double* [[A]], align 4 9414 // CHECK11-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 9415 // CHECK11-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4 9416 // CHECK11-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 9417 // CHECK11-NEXT: store double [[INC]], double* [[A5]], align 4 9418 // CHECK11-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16 9419 // CHECK11-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]] 9420 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]] 9421 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 9422 // CHECK11-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2 9423 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9424 // CHECK11: omp.body.continue: 9425 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9426 // CHECK11: omp.inner.for.inc: 9427 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9428 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 9429 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 9430 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 9431 // CHECK11: omp.inner.for.end: 9432 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9433 // CHECK11: omp.loop.exit: 9434 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 9435 // CHECK11-NEXT: ret void 9436 // 9437 // 9438 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 9439 // CHECK11-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 9440 // CHECK11-NEXT: entry: 9441 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9442 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9443 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 9444 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 9445 // CHECK11-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 9446 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9447 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9448 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 9449 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9450 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 9451 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 9452 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4 9453 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4 9454 // CHECK11-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 9455 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 9456 // CHECK11-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2 9457 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 9458 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]]) 9459 // CHECK11-NEXT: ret void 9460 // 9461 // 9462 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6 9463 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 9464 // CHECK11-NEXT: entry: 9465 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9466 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9467 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9468 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9469 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 9470 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9471 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9472 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9473 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9474 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9475 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9476 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9477 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9478 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9479 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9480 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9481 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 9482 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9483 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 9484 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9485 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9486 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9487 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9488 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9489 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9490 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9491 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9492 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9493 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9494 // CHECK11: cond.true: 9495 // CHECK11-NEXT: br label [[COND_END:%.*]] 9496 // CHECK11: cond.false: 9497 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9498 // CHECK11-NEXT: br label [[COND_END]] 9499 // CHECK11: cond.end: 9500 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9501 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9502 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9503 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9504 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9505 // CHECK11: omp.inner.for.cond: 9506 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9507 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9508 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9509 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9510 // CHECK11: omp.inner.for.body: 9511 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9512 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 9513 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9514 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9515 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 9516 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1 9517 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 9518 // CHECK11-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 2 9519 // CHECK11-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32 9520 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 9521 // CHECK11-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 9522 // CHECK11-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 9523 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 9524 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 9525 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1 9526 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 9527 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9528 // CHECK11: omp.body.continue: 9529 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9530 // CHECK11: omp.inner.for.inc: 9531 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9532 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 9533 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 9534 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 9535 // CHECK11: omp.inner.for.end: 9536 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9537 // CHECK11: omp.loop.exit: 9538 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9539 // CHECK11-NEXT: ret void 9540 // 9541 // 9542 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 9543 // CHECK12-SAME: (i32 noundef [[AA:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 9544 // CHECK12-NEXT: entry: 9545 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9546 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9547 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 9548 // CHECK12-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 9549 // CHECK12-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 9550 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9551 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 9552 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 9553 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9554 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 9555 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 9556 // CHECK12-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 9557 // CHECK12-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 9558 // CHECK12-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 9559 // CHECK12-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 9560 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 9561 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]]) 9562 // CHECK12-NEXT: ret void 9563 // 9564 // 9565 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 9566 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 9567 // CHECK12-NEXT: entry: 9568 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9569 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9570 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9571 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9572 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 9573 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9574 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9575 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9576 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9577 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 9578 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9579 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9580 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9581 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9582 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9583 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9584 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9585 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9586 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9587 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9588 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9589 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9590 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 9591 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9592 // CHECK12: cond.true: 9593 // CHECK12-NEXT: br label [[COND_END:%.*]] 9594 // CHECK12: cond.false: 9595 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9596 // CHECK12-NEXT: br label [[COND_END]] 9597 // CHECK12: cond.end: 9598 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9599 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9600 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9601 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9602 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9603 // CHECK12: omp.inner.for.cond: 9604 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9605 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9606 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9607 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9608 // CHECK12: omp.inner.for.body: 9609 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9610 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 9611 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9612 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9613 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9614 // CHECK12: omp.body.continue: 9615 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9616 // CHECK12: omp.inner.for.inc: 9617 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9618 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 9619 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 9620 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 9621 // CHECK12: omp.inner.for.end: 9622 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9623 // CHECK12: omp.loop.exit: 9624 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9625 // CHECK12-NEXT: ret void 9626 // 9627 // 9628 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 9629 // CHECK12-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR0]] { 9630 // CHECK12-NEXT: entry: 9631 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9632 // CHECK12-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 9633 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9634 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9635 // CHECK12-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 9636 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 9637 // CHECK12-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 9638 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4 9639 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 9640 // CHECK12-NEXT: ret void 9641 // 9642 // 9643 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 9644 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 9645 // CHECK12-NEXT: entry: 9646 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9647 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9648 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9649 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9650 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 9651 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9652 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9653 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9654 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9655 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 9656 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9657 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9658 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9659 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9660 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9661 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9662 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9663 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9664 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9665 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9666 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9667 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9668 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 9669 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9670 // CHECK12: cond.true: 9671 // CHECK12-NEXT: br label [[COND_END:%.*]] 9672 // CHECK12: cond.false: 9673 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9674 // CHECK12-NEXT: br label [[COND_END]] 9675 // CHECK12: cond.end: 9676 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9677 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9678 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9679 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9680 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9681 // CHECK12: omp.inner.for.cond: 9682 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9683 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9684 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9685 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9686 // CHECK12: omp.inner.for.body: 9687 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9688 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 9689 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9690 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9691 // CHECK12-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 9692 // CHECK12-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 9693 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 9694 // CHECK12-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 9695 // CHECK12-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 9696 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9697 // CHECK12: omp.body.continue: 9698 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9699 // CHECK12: omp.inner.for.inc: 9700 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9701 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 9702 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 9703 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 9704 // CHECK12: omp.inner.for.end: 9705 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9706 // CHECK12: omp.loop.exit: 9707 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9708 // CHECK12-NEXT: ret void 9709 // 9710 // 9711 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 9712 // CHECK12-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 9713 // CHECK12-NEXT: entry: 9714 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9715 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9716 // CHECK12-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 9717 // CHECK12-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 9718 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9719 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9720 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9721 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 9722 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 9723 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 9724 // CHECK12-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 2 9725 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 9726 // CHECK12-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 9727 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 9728 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]]) 9729 // CHECK12-NEXT: ret void 9730 // 9731 // 9732 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 9733 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 9734 // CHECK12-NEXT: entry: 9735 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9736 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9737 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9738 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9739 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9740 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 9741 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9742 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9743 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9744 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9745 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 9746 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9747 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9748 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9749 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9750 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9751 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9752 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9753 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9754 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9755 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9756 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9757 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9758 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9759 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 9760 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9761 // CHECK12: cond.true: 9762 // CHECK12-NEXT: br label [[COND_END:%.*]] 9763 // CHECK12: cond.false: 9764 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9765 // CHECK12-NEXT: br label [[COND_END]] 9766 // CHECK12: cond.end: 9767 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9768 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9769 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9770 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9771 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9772 // CHECK12: omp.inner.for.cond: 9773 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9774 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9775 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9776 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9777 // CHECK12: omp.inner.for.body: 9778 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9779 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 9780 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9781 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9782 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 9783 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 9784 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 9785 // CHECK12-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 2 9786 // CHECK12-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32 9787 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 9788 // CHECK12-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 9789 // CHECK12-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 9790 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9791 // CHECK12: omp.body.continue: 9792 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9793 // CHECK12: omp.inner.for.inc: 9794 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9795 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 9796 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 9797 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 9798 // CHECK12: omp.inner.for.end: 9799 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9800 // CHECK12: omp.loop.exit: 9801 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9802 // CHECK12-NEXT: ret void 9803 // 9804 // 9805 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 9806 // CHECK12-SAME: (i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 9807 // CHECK12-NEXT: entry: 9808 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9809 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 9810 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9811 // CHECK12-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 9812 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 9813 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 9814 // CHECK12-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 9815 // CHECK12-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 9816 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 9817 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9818 // CHECK12-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 9819 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 9820 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9821 // CHECK12-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 9822 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 9823 // CHECK12-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 9824 // CHECK12-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 9825 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 9826 // CHECK12-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 9827 // CHECK12-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 9828 // CHECK12-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 9829 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 9830 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 9831 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 9832 // CHECK12-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 9833 // CHECK12-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 9834 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 9835 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 9836 // CHECK12-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 9837 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 9838 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 9839 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4 9840 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4 9841 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 9842 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 9843 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 9844 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]]) 9845 // CHECK12-NEXT: ret void 9846 // 9847 // 9848 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 9849 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 9850 // CHECK12-NEXT: entry: 9851 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9852 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9853 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9854 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 9855 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9856 // CHECK12-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 9857 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 9858 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 9859 // CHECK12-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 9860 // CHECK12-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 9861 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 9862 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9863 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9864 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 9865 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9866 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9867 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9868 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9869 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 9870 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9871 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9872 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9873 // CHECK12-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 9874 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 9875 // CHECK12-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 9876 // CHECK12-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 9877 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 9878 // CHECK12-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 9879 // CHECK12-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 9880 // CHECK12-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 9881 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 9882 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 9883 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 9884 // CHECK12-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 9885 // CHECK12-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 9886 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 9887 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 9888 // CHECK12-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 9889 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 9890 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9891 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9892 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9893 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9894 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 9895 // CHECK12-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9896 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 9897 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 9898 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9899 // CHECK12: omp.dispatch.cond: 9900 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9901 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 9902 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9903 // CHECK12: cond.true: 9904 // CHECK12-NEXT: br label [[COND_END:%.*]] 9905 // CHECK12: cond.false: 9906 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9907 // CHECK12-NEXT: br label [[COND_END]] 9908 // CHECK12: cond.end: 9909 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 9910 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9911 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9912 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 9913 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9914 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9915 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 9916 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9917 // CHECK12: omp.dispatch.body: 9918 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9919 // CHECK12: omp.inner.for.cond: 9920 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 9921 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 9922 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 9923 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9924 // CHECK12: omp.inner.for.body: 9925 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 9926 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 9927 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9928 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 9929 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !14 9930 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 9931 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !14 9932 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2 9933 // CHECK12-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !14 9934 // CHECK12-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 9935 // CHECK12-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00 9936 // CHECK12-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float 9937 // CHECK12-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !14 9938 // CHECK12-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3 9939 // CHECK12-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !14 9940 // CHECK12-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double 9941 // CHECK12-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00 9942 // CHECK12-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 9943 // CHECK12-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !14 9944 // CHECK12-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1 9945 // CHECK12-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2 9946 // CHECK12-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !14 9947 // CHECK12-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00 9948 // CHECK12-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !14 9949 // CHECK12-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]] 9950 // CHECK12-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]] 9951 // CHECK12-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3 9952 // CHECK12-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !14 9953 // CHECK12-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00 9954 // CHECK12-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !14 9955 // CHECK12-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 9956 // CHECK12-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !14 9957 // CHECK12-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1 9958 // CHECK12-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !14 9959 // CHECK12-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 9960 // CHECK12-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !14 9961 // CHECK12-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32 9962 // CHECK12-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1 9963 // CHECK12-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8 9964 // CHECK12-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !14 9965 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9966 // CHECK12: omp.body.continue: 9967 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9968 // CHECK12: omp.inner.for.inc: 9969 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 9970 // CHECK12-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1 9971 // CHECK12-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 9972 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 9973 // CHECK12: omp.inner.for.end: 9974 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9975 // CHECK12: omp.dispatch.inc: 9976 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9977 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9978 // CHECK12-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 9979 // CHECK12-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4 9980 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9981 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9982 // CHECK12-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 9983 // CHECK12-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4 9984 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 9985 // CHECK12: omp.dispatch.end: 9986 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 9987 // CHECK12-NEXT: ret void 9988 // 9989 // 9990 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 9991 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 9992 // CHECK12-NEXT: entry: 9993 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9994 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9995 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9996 // CHECK12-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 9997 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 9998 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 9999 // CHECK12-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 10000 // CHECK12-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 10001 // CHECK12-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 10002 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 10003 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 10004 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 10005 // CHECK12-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 10006 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 10007 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 10008 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 10009 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 10010 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 10011 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 10012 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 10013 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4 10014 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4 10015 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4 10016 // CHECK12-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 2 10017 // CHECK12-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 10018 // CHECK12-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2 10019 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4 10020 // CHECK12-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 1 10021 // CHECK12-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 10022 // CHECK12-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1 10023 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 10024 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]]) 10025 // CHECK12-NEXT: ret void 10026 // 10027 // 10028 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..4 10029 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 10030 // CHECK12-NEXT: entry: 10031 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10032 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10033 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10034 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 10035 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 10036 // CHECK12-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 10037 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 10038 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10039 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 10040 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10041 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10042 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 10043 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 10044 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10045 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10046 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10047 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10048 // CHECK12-NEXT: [[I6:%.*]] = alloca i32, align 4 10049 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10050 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10051 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 10052 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 10053 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 10054 // CHECK12-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 10055 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 10056 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 10057 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 10058 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 10059 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 10060 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 10061 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 10062 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10063 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10064 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10065 // CHECK12-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 10066 // CHECK12-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 10067 // CHECK12-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 10068 // CHECK12-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 10069 // CHECK12-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 10070 // CHECK12-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 10071 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10072 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 10073 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10074 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10075 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 10076 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10077 // CHECK12: omp.precond.then: 10078 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10079 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 10080 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 10081 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10082 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10083 // CHECK12-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10084 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 10085 // CHECK12-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10086 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10087 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 10088 // CHECK12-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 10089 // CHECK12-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10090 // CHECK12: cond.true: 10091 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 10092 // CHECK12-NEXT: br label [[COND_END:%.*]] 10093 // CHECK12: cond.false: 10094 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10095 // CHECK12-NEXT: br label [[COND_END]] 10096 // CHECK12: cond.end: 10097 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 10098 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10099 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10100 // CHECK12-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 10101 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10102 // CHECK12: omp.inner.for.cond: 10103 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10104 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10105 // CHECK12-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1 10106 // CHECK12-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]] 10107 // CHECK12-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10108 // CHECK12: omp.inner.for.body: 10109 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10110 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10111 // CHECK12-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 10112 // CHECK12-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]] 10113 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4 10114 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4 10115 // CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 10116 // CHECK12-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4 10117 // CHECK12-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 2 10118 // CHECK12-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32 10119 // CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1 10120 // CHECK12-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16 10121 // CHECK12-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 2 10122 // CHECK12-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 1 10123 // CHECK12-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32 10124 // CHECK12-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1 10125 // CHECK12-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8 10126 // CHECK12-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 1 10127 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 10128 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 10129 // CHECK12-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1 10130 // CHECK12-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4 10131 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10132 // CHECK12: omp.body.continue: 10133 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10134 // CHECK12: omp.inner.for.inc: 10135 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10136 // CHECK12-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1 10137 // CHECK12-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 10138 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 10139 // CHECK12: omp.inner.for.end: 10140 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10141 // CHECK12: omp.loop.exit: 10142 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10143 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 10144 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 10145 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 10146 // CHECK12: omp.precond.end: 10147 // CHECK12-NEXT: ret void 10148 // 10149 // 10150 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 10151 // CHECK12-SAME: (%struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 10152 // CHECK12-NEXT: entry: 10153 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 10154 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 10155 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 10156 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 10157 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 10158 // CHECK12-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 10159 // CHECK12-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 10160 // CHECK12-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 10161 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 10162 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 10163 // CHECK12-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 10164 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 10165 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 10166 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 10167 // CHECK12-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 10168 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4 10169 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 10170 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 10171 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]]) 10172 // CHECK12-NEXT: ret void 10173 // 10174 // 10175 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..5 10176 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 10177 // CHECK12-NEXT: entry: 10178 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10179 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10180 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 10181 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 10182 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 10183 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 10184 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 10185 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10186 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 10187 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10188 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10189 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10190 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10191 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 10192 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10193 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10194 // CHECK12-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 10195 // CHECK12-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 10196 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 10197 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 10198 // CHECK12-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 10199 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 10200 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 10201 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 10202 // CHECK12-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 10203 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10204 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 10205 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10206 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10207 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10208 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 10209 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10210 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10211 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 10212 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10213 // CHECK12: cond.true: 10214 // CHECK12-NEXT: br label [[COND_END:%.*]] 10215 // CHECK12: cond.false: 10216 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10217 // CHECK12-NEXT: br label [[COND_END]] 10218 // CHECK12: cond.end: 10219 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 10220 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10221 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10222 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 10223 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10224 // CHECK12: omp.inner.for.cond: 10225 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10226 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10227 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 10228 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10229 // CHECK12: omp.inner.for.body: 10230 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10231 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 10232 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10233 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10234 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4 10235 // CHECK12-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double 10236 // CHECK12-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00 10237 // CHECK12-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 10238 // CHECK12-NEXT: store double [[ADD4]], double* [[A]], align 4 10239 // CHECK12-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 10240 // CHECK12-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4 10241 // CHECK12-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 10242 // CHECK12-NEXT: store double [[INC]], double* [[A5]], align 4 10243 // CHECK12-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16 10244 // CHECK12-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]] 10245 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]] 10246 // CHECK12-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 10247 // CHECK12-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2 10248 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10249 // CHECK12: omp.body.continue: 10250 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10251 // CHECK12: omp.inner.for.inc: 10252 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10253 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 10254 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 10255 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 10256 // CHECK12: omp.inner.for.end: 10257 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10258 // CHECK12: omp.loop.exit: 10259 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 10260 // CHECK12-NEXT: ret void 10261 // 10262 // 10263 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 10264 // CHECK12-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 10265 // CHECK12-NEXT: entry: 10266 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 10267 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 10268 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 10269 // CHECK12-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 10270 // CHECK12-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 10271 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 10272 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 10273 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 10274 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 10275 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 10276 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 10277 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4 10278 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4 10279 // CHECK12-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 10280 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 10281 // CHECK12-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2 10282 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 10283 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]]) 10284 // CHECK12-NEXT: ret void 10285 // 10286 // 10287 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..6 10288 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 10289 // CHECK12-NEXT: entry: 10290 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10291 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10292 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 10293 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 10294 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 10295 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10296 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 10297 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10298 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10299 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10300 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10301 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 10302 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10303 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10304 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 10305 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 10306 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 10307 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 10308 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 10309 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10310 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 10311 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10312 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10313 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10314 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 10315 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10316 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10317 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 10318 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10319 // CHECK12: cond.true: 10320 // CHECK12-NEXT: br label [[COND_END:%.*]] 10321 // CHECK12: cond.false: 10322 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10323 // CHECK12-NEXT: br label [[COND_END]] 10324 // CHECK12: cond.end: 10325 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 10326 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10327 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10328 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 10329 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10330 // CHECK12: omp.inner.for.cond: 10331 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10332 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10333 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 10334 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10335 // CHECK12: omp.inner.for.body: 10336 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10337 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 10338 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10339 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10340 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 10341 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1 10342 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 10343 // CHECK12-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 2 10344 // CHECK12-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32 10345 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 10346 // CHECK12-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 10347 // CHECK12-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 10348 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 10349 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 10350 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1 10351 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 10352 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10353 // CHECK12: omp.body.continue: 10354 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10355 // CHECK12: omp.inner.for.inc: 10356 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10357 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 10358 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 10359 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 10360 // CHECK12: omp.inner.for.end: 10361 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10362 // CHECK12: omp.loop.exit: 10363 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 10364 // CHECK12-NEXT: ret void 10365 // 10366 // 10367 // CHECK17-LABEL: define {{[^@]+}}@_Z3fooi 10368 // CHECK17-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 10369 // CHECK17-NEXT: entry: 10370 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10371 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 10372 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2 10373 // CHECK17-NEXT: [[B:%.*]] = alloca [10 x float], align 4 10374 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 10375 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 10376 // CHECK17-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 10377 // CHECK17-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 10378 // CHECK17-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8 10379 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10380 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10381 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 10382 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10383 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8 10384 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 10385 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 10386 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 10387 // CHECK17-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 10388 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 10389 // CHECK17-NEXT: [[AA_CASTED7:%.*]] = alloca i64, align 8 10390 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [1 x i8*], align 8 10391 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [1 x i8*], align 8 10392 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [1 x i8*], align 8 10393 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10394 // CHECK17-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8 10395 // CHECK17-NEXT: [[AA_CASTED14:%.*]] = alloca i64, align 8 10396 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [2 x i8*], align 8 10397 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [2 x i8*], align 8 10398 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [2 x i8*], align 8 10399 // CHECK17-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 10400 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 10401 // CHECK17-NEXT: [[A_CASTED23:%.*]] = alloca i64, align 8 10402 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED25:%.*]] = alloca i64, align 8 10403 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [10 x i8*], align 8 10404 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [10 x i8*], align 8 10405 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [10 x i8*], align 8 10406 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 8 10407 // CHECK17-NEXT: [[_TMP32:%.*]] = alloca i32, align 4 10408 // CHECK17-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 10409 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 10410 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4 10411 // CHECK17-NEXT: store i16 0, i16* [[AA]], align 2 10412 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 10413 // CHECK17-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 10414 // CHECK17-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 10415 // CHECK17-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 10416 // CHECK17-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4 10417 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 10418 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 10419 // CHECK17-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 10420 // CHECK17-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]] 10421 // CHECK17-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8 10422 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 10423 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 10424 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_]], align 4 10425 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 10426 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10427 // CHECK17-NEXT: [[TMP9:%.*]] = load i16, i16* [[AA]], align 2 10428 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 10429 // CHECK17-NEXT: store i16 [[TMP9]], i16* [[CONV]], align 2 10430 // CHECK17-NEXT: [[TMP10:%.*]] = load i64, i64* [[AA_CASTED]], align 8 10431 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10432 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 10433 // CHECK17-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4 10434 // CHECK17-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 10435 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10436 // CHECK17-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32* 10437 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[CONV5]], align 4 10438 // CHECK17-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8 10439 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10440 // CHECK17-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 10441 // CHECK17-NEXT: store i64 [[TMP10]], i64* [[TMP16]], align 8 10442 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10443 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 10444 // CHECK17-NEXT: store i64 [[TMP10]], i64* [[TMP18]], align 8 10445 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 10446 // CHECK17-NEXT: store i8* null, i8** [[TMP19]], align 8 10447 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 10448 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 10449 // CHECK17-NEXT: store i64 [[TMP12]], i64* [[TMP21]], align 8 10450 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 10451 // CHECK17-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 10452 // CHECK17-NEXT: store i64 [[TMP12]], i64* [[TMP23]], align 8 10453 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 10454 // CHECK17-NEXT: store i8* null, i8** [[TMP24]], align 8 10455 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 10456 // CHECK17-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 10457 // CHECK17-NEXT: store i64 [[TMP14]], i64* [[TMP26]], align 8 10458 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 10459 // CHECK17-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 10460 // CHECK17-NEXT: store i64 [[TMP14]], i64* [[TMP28]], align 8 10461 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 10462 // CHECK17-NEXT: store i8* null, i8** [[TMP29]], align 8 10463 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10464 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10465 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0 10466 // CHECK17-NEXT: [[TMP33:%.*]] = load i16, i16* [[AA]], align 2 10467 // CHECK17-NEXT: store i16 [[TMP33]], i16* [[TMP32]], align 4 10468 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1 10469 // CHECK17-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10470 // CHECK17-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4 10471 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2 10472 // CHECK17-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10473 // CHECK17-NEXT: store i32 [[TMP37]], i32* [[TMP36]], align 4 10474 // CHECK17-NEXT: [[TMP38:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i64 120, i64 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 10475 // CHECK17-NEXT: [[TMP39:%.*]] = bitcast i8* [[TMP38]] to %struct.kmp_task_t_with_privates* 10476 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 0 10477 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP40]], i32 0, i32 0 10478 // CHECK17-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 8 10479 // CHECK17-NEXT: [[TMP43:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8* 10480 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP42]], i8* align 4 [[TMP43]], i64 12, i1 false) 10481 // CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 1 10482 // CHECK17-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to %struct.anon* 10483 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 0 10484 // CHECK17-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8* 10485 // CHECK17-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP30]] to i8* 10486 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP47]], i8* align 8 [[TMP48]], i64 24, i1 false) 10487 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 1 10488 // CHECK17-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8* 10489 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP31]] to i8* 10490 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP50]], i8* align 8 [[TMP51]], i64 24, i1 false) 10491 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 2 10492 // CHECK17-NEXT: [[TMP53:%.*]] = bitcast [3 x i64]* [[TMP52]] to i8* 10493 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP53]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 10494 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 3 10495 // CHECK17-NEXT: [[TMP55:%.*]] = load i16, i16* [[AA]], align 2 10496 // CHECK17-NEXT: store i16 [[TMP55]], i16* [[TMP54]], align 8 10497 // CHECK17-NEXT: [[TMP56:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP38]]) 10498 // CHECK17-NEXT: [[TMP57:%.*]] = load i32, i32* [[A]], align 4 10499 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 10500 // CHECK17-NEXT: store i32 [[TMP57]], i32* [[CONV6]], align 4 10501 // CHECK17-NEXT: [[TMP58:%.*]] = load i64, i64* [[A_CASTED]], align 8 10502 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i64 [[TMP58]]) #[[ATTR3:[0-9]+]] 10503 // CHECK17-NEXT: [[TMP59:%.*]] = load i16, i16* [[AA]], align 2 10504 // CHECK17-NEXT: [[CONV8:%.*]] = bitcast i64* [[AA_CASTED7]] to i16* 10505 // CHECK17-NEXT: store i16 [[TMP59]], i16* [[CONV8]], align 2 10506 // CHECK17-NEXT: [[TMP60:%.*]] = load i64, i64* [[AA_CASTED7]], align 8 10507 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 10508 // CHECK17-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64* 10509 // CHECK17-NEXT: store i64 [[TMP60]], i64* [[TMP62]], align 8 10510 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 10511 // CHECK17-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64* 10512 // CHECK17-NEXT: store i64 [[TMP60]], i64* [[TMP64]], align 8 10513 // CHECK17-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0 10514 // CHECK17-NEXT: store i8* null, i8** [[TMP65]], align 8 10515 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 10516 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 10517 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 10518 // CHECK17-NEXT: [[TMP68:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP66]], i8** [[TMP67]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10519 // CHECK17-NEXT: [[TMP69:%.*]] = icmp ne i32 [[TMP68]], 0 10520 // CHECK17-NEXT: br i1 [[TMP69]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10521 // CHECK17: omp_offload.failed: 10522 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i64 [[TMP60]]) #[[ATTR3]] 10523 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 10524 // CHECK17: omp_offload.cont: 10525 // CHECK17-NEXT: [[TMP70:%.*]] = load i32, i32* [[A]], align 4 10526 // CHECK17-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32* 10527 // CHECK17-NEXT: store i32 [[TMP70]], i32* [[CONV13]], align 4 10528 // CHECK17-NEXT: [[TMP71:%.*]] = load i64, i64* [[A_CASTED12]], align 8 10529 // CHECK17-NEXT: [[TMP72:%.*]] = load i16, i16* [[AA]], align 2 10530 // CHECK17-NEXT: [[CONV15:%.*]] = bitcast i64* [[AA_CASTED14]] to i16* 10531 // CHECK17-NEXT: store i16 [[TMP72]], i16* [[CONV15]], align 2 10532 // CHECK17-NEXT: [[TMP73:%.*]] = load i64, i64* [[AA_CASTED14]], align 8 10533 // CHECK17-NEXT: [[TMP74:%.*]] = load i32, i32* [[N_ADDR]], align 4 10534 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP74]], 10 10535 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 10536 // CHECK17: omp_if.then: 10537 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 10538 // CHECK17-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 10539 // CHECK17-NEXT: store i64 [[TMP71]], i64* [[TMP76]], align 8 10540 // CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 10541 // CHECK17-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64* 10542 // CHECK17-NEXT: store i64 [[TMP71]], i64* [[TMP78]], align 8 10543 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0 10544 // CHECK17-NEXT: store i8* null, i8** [[TMP79]], align 8 10545 // CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1 10546 // CHECK17-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 10547 // CHECK17-NEXT: store i64 [[TMP73]], i64* [[TMP81]], align 8 10548 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1 10549 // CHECK17-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* 10550 // CHECK17-NEXT: store i64 [[TMP73]], i64* [[TMP83]], align 8 10551 // CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1 10552 // CHECK17-NEXT: store i8* null, i8** [[TMP84]], align 8 10553 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 10554 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 10555 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 10556 // CHECK17-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP85]], i8** [[TMP86]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10557 // CHECK17-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0 10558 // CHECK17-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 10559 // CHECK17: omp_offload.failed20: 10560 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]] 10561 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT21]] 10562 // CHECK17: omp_offload.cont21: 10563 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]] 10564 // CHECK17: omp_if.else: 10565 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]] 10566 // CHECK17-NEXT: br label [[OMP_IF_END]] 10567 // CHECK17: omp_if.end: 10568 // CHECK17-NEXT: [[TMP89:%.*]] = load i32, i32* [[N_ADDR]], align 4 10569 // CHECK17-NEXT: store i32 [[TMP89]], i32* [[DOTCAPTURE_EXPR_22]], align 4 10570 // CHECK17-NEXT: [[TMP90:%.*]] = load i32, i32* [[A]], align 4 10571 // CHECK17-NEXT: [[CONV24:%.*]] = bitcast i64* [[A_CASTED23]] to i32* 10572 // CHECK17-NEXT: store i32 [[TMP90]], i32* [[CONV24]], align 4 10573 // CHECK17-NEXT: [[TMP91:%.*]] = load i64, i64* [[A_CASTED23]], align 8 10574 // CHECK17-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4 10575 // CHECK17-NEXT: [[CONV26:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED25]] to i32* 10576 // CHECK17-NEXT: store i32 [[TMP92]], i32* [[CONV26]], align 4 10577 // CHECK17-NEXT: [[TMP93:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED25]], align 8 10578 // CHECK17-NEXT: [[TMP94:%.*]] = load i32, i32* [[N_ADDR]], align 4 10579 // CHECK17-NEXT: [[CMP27:%.*]] = icmp sgt i32 [[TMP94]], 20 10580 // CHECK17-NEXT: br i1 [[CMP27]], label [[OMP_IF_THEN28:%.*]], label [[OMP_IF_ELSE35:%.*]] 10581 // CHECK17: omp_if.then28: 10582 // CHECK17-NEXT: [[TMP95:%.*]] = mul nuw i64 [[TMP2]], 4 10583 // CHECK17-NEXT: [[TMP96:%.*]] = mul nuw i64 5, [[TMP5]] 10584 // CHECK17-NEXT: [[TMP97:%.*]] = mul nuw i64 [[TMP96]], 8 10585 // CHECK17-NEXT: [[TMP98:%.*]] = bitcast [10 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 10586 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP98]], i8* align 8 bitcast ([10 x i64]* @.offload_sizes.10 to i8*), i64 80, i1 false) 10587 // CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 10588 // CHECK17-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to i64* 10589 // CHECK17-NEXT: store i64 [[TMP91]], i64* [[TMP100]], align 8 10590 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 10591 // CHECK17-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i64* 10592 // CHECK17-NEXT: store i64 [[TMP91]], i64* [[TMP102]], align 8 10593 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0 10594 // CHECK17-NEXT: store i8* null, i8** [[TMP103]], align 8 10595 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 1 10596 // CHECK17-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]** 10597 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 8 10598 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 1 10599 // CHECK17-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]** 10600 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 8 10601 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 1 10602 // CHECK17-NEXT: store i8* null, i8** [[TMP108]], align 8 10603 // CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 2 10604 // CHECK17-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i64* 10605 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP110]], align 8 10606 // CHECK17-NEXT: [[TMP111:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 2 10607 // CHECK17-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64* 10608 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP112]], align 8 10609 // CHECK17-NEXT: [[TMP113:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 2 10610 // CHECK17-NEXT: store i8* null, i8** [[TMP113]], align 8 10611 // CHECK17-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 3 10612 // CHECK17-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to float** 10613 // CHECK17-NEXT: store float* [[VLA]], float** [[TMP115]], align 8 10614 // CHECK17-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 3 10615 // CHECK17-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float** 10616 // CHECK17-NEXT: store float* [[VLA]], float** [[TMP117]], align 8 10617 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 10618 // CHECK17-NEXT: store i64 [[TMP95]], i64* [[TMP118]], align 8 10619 // CHECK17-NEXT: [[TMP119:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 3 10620 // CHECK17-NEXT: store i8* null, i8** [[TMP119]], align 8 10621 // CHECK17-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 4 10622 // CHECK17-NEXT: [[TMP121:%.*]] = bitcast i8** [[TMP120]] to [5 x [10 x double]]** 10623 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP121]], align 8 10624 // CHECK17-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 4 10625 // CHECK17-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]** 10626 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 8 10627 // CHECK17-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 4 10628 // CHECK17-NEXT: store i8* null, i8** [[TMP124]], align 8 10629 // CHECK17-NEXT: [[TMP125:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 5 10630 // CHECK17-NEXT: [[TMP126:%.*]] = bitcast i8** [[TMP125]] to i64* 10631 // CHECK17-NEXT: store i64 5, i64* [[TMP126]], align 8 10632 // CHECK17-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 5 10633 // CHECK17-NEXT: [[TMP128:%.*]] = bitcast i8** [[TMP127]] to i64* 10634 // CHECK17-NEXT: store i64 5, i64* [[TMP128]], align 8 10635 // CHECK17-NEXT: [[TMP129:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 5 10636 // CHECK17-NEXT: store i8* null, i8** [[TMP129]], align 8 10637 // CHECK17-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 6 10638 // CHECK17-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i64* 10639 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP131]], align 8 10640 // CHECK17-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 6 10641 // CHECK17-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i64* 10642 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP133]], align 8 10643 // CHECK17-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 6 10644 // CHECK17-NEXT: store i8* null, i8** [[TMP134]], align 8 10645 // CHECK17-NEXT: [[TMP135:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 7 10646 // CHECK17-NEXT: [[TMP136:%.*]] = bitcast i8** [[TMP135]] to double** 10647 // CHECK17-NEXT: store double* [[VLA1]], double** [[TMP136]], align 8 10648 // CHECK17-NEXT: [[TMP137:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 7 10649 // CHECK17-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to double** 10650 // CHECK17-NEXT: store double* [[VLA1]], double** [[TMP138]], align 8 10651 // CHECK17-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 10652 // CHECK17-NEXT: store i64 [[TMP97]], i64* [[TMP139]], align 8 10653 // CHECK17-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 7 10654 // CHECK17-NEXT: store i8* null, i8** [[TMP140]], align 8 10655 // CHECK17-NEXT: [[TMP141:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 8 10656 // CHECK17-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to %struct.TT** 10657 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP142]], align 8 10658 // CHECK17-NEXT: [[TMP143:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 8 10659 // CHECK17-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to %struct.TT** 10660 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP144]], align 8 10661 // CHECK17-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 8 10662 // CHECK17-NEXT: store i8* null, i8** [[TMP145]], align 8 10663 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 9 10664 // CHECK17-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64* 10665 // CHECK17-NEXT: store i64 [[TMP93]], i64* [[TMP147]], align 8 10666 // CHECK17-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 9 10667 // CHECK17-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 10668 // CHECK17-NEXT: store i64 [[TMP93]], i64* [[TMP149]], align 8 10669 // CHECK17-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 9 10670 // CHECK17-NEXT: store i8* null, i8** [[TMP150]], align 8 10671 // CHECK17-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 10672 // CHECK17-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 10673 // CHECK17-NEXT: [[TMP153:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 10674 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 10675 // CHECK17-NEXT: [[TMP154:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP151]], i8** [[TMP152]], i64* [[TMP153]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10676 // CHECK17-NEXT: [[TMP155:%.*]] = icmp ne i32 [[TMP154]], 0 10677 // CHECK17-NEXT: br i1 [[TMP155]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 10678 // CHECK17: omp_offload.failed33: 10679 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]] 10680 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT34]] 10681 // CHECK17: omp_offload.cont34: 10682 // CHECK17-NEXT: br label [[OMP_IF_END36:%.*]] 10683 // CHECK17: omp_if.else35: 10684 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]] 10685 // CHECK17-NEXT: br label [[OMP_IF_END36]] 10686 // CHECK17: omp_if.end36: 10687 // CHECK17-NEXT: [[TMP156:%.*]] = load i32, i32* [[A]], align 4 10688 // CHECK17-NEXT: [[TMP157:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 10689 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP157]]) 10690 // CHECK17-NEXT: ret i32 [[TMP156]] 10691 // 10692 // 10693 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 10694 // CHECK17-SAME: (i64 noundef [[AA:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] { 10695 // CHECK17-NEXT: entry: 10696 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 10697 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10698 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 10699 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 10700 // CHECK17-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 10701 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 10702 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 10703 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 10704 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 10705 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 10706 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 10707 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 4 10708 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 4 10709 // CHECK17-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 10710 // CHECK17-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 10711 // CHECK17-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 10712 // CHECK17-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2 10713 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 10714 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]]) 10715 // CHECK17-NEXT: ret void 10716 // 10717 // 10718 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 10719 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 10720 // CHECK17-NEXT: entry: 10721 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10722 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10723 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 10724 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10725 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10726 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10727 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10728 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10729 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10730 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10731 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10732 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10733 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 10734 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 10735 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10736 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 10737 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10738 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10739 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10740 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 10741 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10742 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10743 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 10744 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10745 // CHECK17: cond.true: 10746 // CHECK17-NEXT: br label [[COND_END:%.*]] 10747 // CHECK17: cond.false: 10748 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10749 // CHECK17-NEXT: br label [[COND_END]] 10750 // CHECK17: cond.end: 10751 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 10752 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10753 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10754 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 10755 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10756 // CHECK17: omp.inner.for.cond: 10757 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10758 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10759 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 10760 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10761 // CHECK17: omp.inner.for.body: 10762 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10763 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 10764 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10765 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10766 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10767 // CHECK17: omp.body.continue: 10768 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10769 // CHECK17: omp.inner.for.inc: 10770 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10771 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 10772 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 10773 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10774 // CHECK17: omp.inner.for.end: 10775 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10776 // CHECK17: omp.loop.exit: 10777 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 10778 // CHECK17-NEXT: ret void 10779 // 10780 // 10781 // CHECK17-LABEL: define {{[^@]+}}@.omp_task_privates_map. 10782 // CHECK17-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i16** noalias noundef [[TMP1:%.*]], [3 x i8*]** noalias noundef [[TMP2:%.*]], [3 x i8*]** noalias noundef [[TMP3:%.*]], [3 x i64]** noalias noundef [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] { 10783 // CHECK17-NEXT: entry: 10784 // CHECK17-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 10785 // CHECK17-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 8 10786 // CHECK17-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 8 10787 // CHECK17-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 8 10788 // CHECK17-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 8 10789 // CHECK17-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 10790 // CHECK17-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 8 10791 // CHECK17-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 8 10792 // CHECK17-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 8 10793 // CHECK17-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 8 10794 // CHECK17-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 10795 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0 10796 // CHECK17-NEXT: [[TMP7:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 8 10797 // CHECK17-NEXT: store [3 x i8*]* [[TMP6]], [3 x i8*]** [[TMP7]], align 8 10798 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1 10799 // CHECK17-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 8 10800 // CHECK17-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 8 10801 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2 10802 // CHECK17-NEXT: [[TMP11:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 8 10803 // CHECK17-NEXT: store [3 x i64]* [[TMP10]], [3 x i64]** [[TMP11]], align 8 10804 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3 10805 // CHECK17-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 8 10806 // CHECK17-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 8 10807 // CHECK17-NEXT: ret void 10808 // 10809 // 10810 // CHECK17-LABEL: define {{[^@]+}}@.omp_task_entry. 10811 // CHECK17-SAME: (i32 noundef signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] { 10812 // CHECK17-NEXT: entry: 10813 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 10814 // CHECK17-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 10815 // CHECK17-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 10816 // CHECK17-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 10817 // CHECK17-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 10818 // CHECK17-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8 10819 // CHECK17-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 8 10820 // CHECK17-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 8 10821 // CHECK17-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 8 10822 // CHECK17-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 8 10823 // CHECK17-NEXT: [[AA_CASTED_I:%.*]] = alloca i64, align 8 10824 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i64, align 8 10825 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED5_I:%.*]] = alloca i64, align 8 10826 // CHECK17-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 10827 // CHECK17-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 10828 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 10829 // CHECK17-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 10830 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 10831 // CHECK17-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 10832 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 10833 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 10834 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 10835 // CHECK17-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 10836 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 10837 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1 10838 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 10839 // CHECK17-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 10840 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 10841 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]]) 10842 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]]) 10843 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]]) 10844 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21 10845 // CHECK17-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21 10846 // CHECK17-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 10847 // CHECK17-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 10848 // CHECK17-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21 10849 // CHECK17-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 10850 // CHECK17-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 10851 // CHECK17-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 10852 // CHECK17-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 10853 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* 10854 // CHECK17-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]] 10855 // CHECK17-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !21 10856 // CHECK17-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !21 10857 // CHECK17-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias !21 10858 // CHECK17-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias !21 10859 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i64 0, i64 0 10860 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i64 0, i64 0 10861 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i64 0, i64 0 10862 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1 10863 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2 10864 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4 10865 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4 10866 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]] 10867 // CHECK17-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]] 10868 // CHECK17-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 10869 // CHECK17-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 10870 // CHECK17: omp_offload.failed.i: 10871 // CHECK17-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2 10872 // CHECK17-NEXT: [[CONV_I:%.*]] = bitcast i64* [[AA_CASTED_I]] to i16* 10873 // CHECK17-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !21 10874 // CHECK17-NEXT: [[TMP30:%.*]] = load i64, i64* [[AA_CASTED_I]], align 8, !noalias !21 10875 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4 10876 // CHECK17-NEXT: [[CONV4_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED_I]] to i32* 10877 // CHECK17-NEXT: store i32 [[TMP31]], i32* [[CONV4_I]], align 4, !noalias !21 10878 // CHECK17-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED_I]], align 8, !noalias !21 10879 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4 10880 // CHECK17-NEXT: [[CONV6_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED5_I]] to i32* 10881 // CHECK17-NEXT: store i32 [[TMP33]], i32* [[CONV6_I]], align 4, !noalias !21 10882 // CHECK17-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED5_I]], align 8, !noalias !21 10883 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i64 [[TMP30]], i64 [[TMP32]], i64 [[TMP34]]) #[[ATTR3]] 10884 // CHECK17-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 10885 // CHECK17: .omp_outlined..1.exit: 10886 // CHECK17-NEXT: ret i32 0 10887 // 10888 // 10889 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107 10890 // CHECK17-SAME: (i64 noundef [[A:%.*]]) #[[ATTR2]] { 10891 // CHECK17-NEXT: entry: 10892 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 10893 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 10894 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 10895 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 10896 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 10897 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32* 10898 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4 10899 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 10900 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 10901 // CHECK17-NEXT: ret void 10902 // 10903 // 10904 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2 10905 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR2]] { 10906 // CHECK17-NEXT: entry: 10907 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10908 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10909 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 10910 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10911 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10912 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10913 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10914 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10915 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10916 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10917 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10918 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10919 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 10920 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 10921 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10922 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 10923 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10924 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10925 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10926 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 10927 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10928 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10929 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 10930 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10931 // CHECK17: cond.true: 10932 // CHECK17-NEXT: br label [[COND_END:%.*]] 10933 // CHECK17: cond.false: 10934 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10935 // CHECK17-NEXT: br label [[COND_END]] 10936 // CHECK17: cond.end: 10937 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 10938 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10939 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10940 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 10941 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10942 // CHECK17: omp.inner.for.cond: 10943 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10944 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10945 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 10946 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10947 // CHECK17: omp.inner.for.body: 10948 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10949 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 10950 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10951 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10952 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 10953 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 10954 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[CONV]], align 4 10955 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10956 // CHECK17: omp.body.continue: 10957 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10958 // CHECK17: omp.inner.for.inc: 10959 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10960 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 10961 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10962 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10963 // CHECK17: omp.inner.for.end: 10964 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10965 // CHECK17: omp.loop.exit: 10966 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 10967 // CHECK17-NEXT: ret void 10968 // 10969 // 10970 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 10971 // CHECK17-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR2]] { 10972 // CHECK17-NEXT: entry: 10973 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 10974 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 10975 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 10976 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 10977 // CHECK17-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 10978 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 10979 // CHECK17-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 10980 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8 10981 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 10982 // CHECK17-NEXT: ret void 10983 // 10984 // 10985 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3 10986 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 10987 // CHECK17-NEXT: entry: 10988 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10989 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10990 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 10991 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10992 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10993 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10994 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10995 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10996 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10997 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10998 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10999 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11000 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11001 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 11002 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11003 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11004 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11005 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11006 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11007 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 11008 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11009 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11010 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 11011 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11012 // CHECK17: cond.true: 11013 // CHECK17-NEXT: br label [[COND_END:%.*]] 11014 // CHECK17: cond.false: 11015 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11016 // CHECK17-NEXT: br label [[COND_END]] 11017 // CHECK17: cond.end: 11018 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 11019 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11020 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11021 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 11022 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11023 // CHECK17: omp.inner.for.cond: 11024 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11025 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11026 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 11027 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11028 // CHECK17: omp.inner.for.body: 11029 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11030 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 11031 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11032 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11033 // CHECK17-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 11034 // CHECK17-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 11035 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 11036 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 11037 // CHECK17-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 11038 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11039 // CHECK17: omp.body.continue: 11040 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11041 // CHECK17: omp.inner.for.inc: 11042 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11043 // CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 11044 // CHECK17-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 11045 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11046 // CHECK17: omp.inner.for.end: 11047 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11048 // CHECK17: omp.loop.exit: 11049 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 11050 // CHECK17-NEXT: ret void 11051 // 11052 // 11053 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 11054 // CHECK17-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 11055 // CHECK17-NEXT: entry: 11056 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11057 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 11058 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 11059 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 11060 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11061 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11062 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11063 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 11064 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 11065 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 11066 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4 11067 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 11068 // CHECK17-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 2 11069 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 11070 // CHECK17-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2 11071 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 11072 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]]) 11073 // CHECK17-NEXT: ret void 11074 // 11075 // 11076 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6 11077 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 11078 // CHECK17-NEXT: entry: 11079 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11080 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11081 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11082 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 11083 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11084 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11085 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11086 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11087 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11088 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11089 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11090 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11091 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11092 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11093 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11094 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11095 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 11096 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11097 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11098 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11099 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11100 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11101 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 11102 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11103 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11104 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 11105 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11106 // CHECK17: cond.true: 11107 // CHECK17-NEXT: br label [[COND_END:%.*]] 11108 // CHECK17: cond.false: 11109 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11110 // CHECK17-NEXT: br label [[COND_END]] 11111 // CHECK17: cond.end: 11112 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 11113 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11114 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11115 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 11116 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11117 // CHECK17: omp.inner.for.cond: 11118 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11119 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11120 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 11121 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11122 // CHECK17: omp.inner.for.body: 11123 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11124 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 11125 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11126 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11127 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 11128 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 11129 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 11130 // CHECK17-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 2 11131 // CHECK17-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32 11132 // CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 11133 // CHECK17-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 11134 // CHECK17-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 11135 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11136 // CHECK17: omp.body.continue: 11137 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11138 // CHECK17: omp.inner.for.inc: 11139 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11140 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1 11141 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 11142 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11143 // CHECK17: omp.inner.for.end: 11144 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11145 // CHECK17: omp.loop.exit: 11146 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 11147 // CHECK17-NEXT: ret void 11148 // 11149 // 11150 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 11151 // CHECK17-SAME: (i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11152 // CHECK17-NEXT: entry: 11153 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11154 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 11155 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11156 // CHECK17-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 11157 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 11158 // CHECK17-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 11159 // CHECK17-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 11160 // CHECK17-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 11161 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 11162 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11163 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 11164 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11165 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11166 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 11167 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11168 // CHECK17-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 11169 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 11170 // CHECK17-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 11171 // CHECK17-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 11172 // CHECK17-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 11173 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 11174 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11175 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11176 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 11177 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11178 // CHECK17-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 11179 // CHECK17-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 11180 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 11181 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 11182 // CHECK17-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 11183 // CHECK17-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 11184 // CHECK17-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11185 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 11186 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 11187 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4 11188 // CHECK17-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8 11189 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 4 11190 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 11191 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4 11192 // CHECK17-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 11193 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]]) 11194 // CHECK17-NEXT: ret void 11195 // 11196 // 11197 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..9 11198 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11199 // CHECK17-NEXT: entry: 11200 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11201 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11202 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11203 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 11204 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11205 // CHECK17-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 11206 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 11207 // CHECK17-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 11208 // CHECK17-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 11209 // CHECK17-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 11210 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 11211 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11212 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11213 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11214 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11215 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11216 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11217 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11218 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11219 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11220 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11221 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11222 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 11223 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11224 // CHECK17-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 11225 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 11226 // CHECK17-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 11227 // CHECK17-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 11228 // CHECK17-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 11229 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 11230 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11231 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11232 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 11233 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11234 // CHECK17-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 11235 // CHECK17-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 11236 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 11237 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 11238 // CHECK17-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 11239 // CHECK17-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 11240 // CHECK17-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11241 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11242 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11243 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11244 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11245 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 4 11246 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11247 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 11248 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 11249 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11250 // CHECK17: omp.dispatch.cond: 11251 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11252 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 11253 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11254 // CHECK17: cond.true: 11255 // CHECK17-NEXT: br label [[COND_END:%.*]] 11256 // CHECK17: cond.false: 11257 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11258 // CHECK17-NEXT: br label [[COND_END]] 11259 // CHECK17: cond.end: 11260 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 11261 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11262 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11263 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 11264 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11265 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11266 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 11267 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11268 // CHECK17: omp.dispatch.body: 11269 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11270 // CHECK17: omp.inner.for.cond: 11271 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 11272 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 11273 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 11274 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11275 // CHECK17: omp.inner.for.body: 11276 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 11277 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 11278 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11279 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 11280 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !22 11281 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 11282 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group !22 11283 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2 11284 // CHECK17-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !22 11285 // CHECK17-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double 11286 // CHECK17-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00 11287 // CHECK17-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float 11288 // CHECK17-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !22 11289 // CHECK17-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3 11290 // CHECK17-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !22 11291 // CHECK17-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double 11292 // CHECK17-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00 11293 // CHECK17-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float 11294 // CHECK17-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !22 11295 // CHECK17-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1 11296 // CHECK17-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2 11297 // CHECK17-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !22 11298 // CHECK17-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00 11299 // CHECK17-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !22 11300 // CHECK17-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]] 11301 // CHECK17-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]] 11302 // CHECK17-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3 11303 // CHECK17-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !22 11304 // CHECK17-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00 11305 // CHECK17-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !22 11306 // CHECK17-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 11307 // CHECK17-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !22 11308 // CHECK17-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1 11309 // CHECK17-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !22 11310 // CHECK17-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 11311 // CHECK17-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !22 11312 // CHECK17-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32 11313 // CHECK17-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1 11314 // CHECK17-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8 11315 // CHECK17-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !22 11316 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11317 // CHECK17: omp.body.continue: 11318 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11319 // CHECK17: omp.inner.for.inc: 11320 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 11321 // CHECK17-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1 11322 // CHECK17-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 11323 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 11324 // CHECK17: omp.inner.for.end: 11325 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11326 // CHECK17: omp.dispatch.inc: 11327 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11328 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11329 // CHECK17-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 11330 // CHECK17-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4 11331 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11332 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11333 // CHECK17-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 11334 // CHECK17-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4 11335 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 11336 // CHECK17: omp.dispatch.end: 11337 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 11338 // CHECK17-NEXT: ret void 11339 // 11340 // 11341 // CHECK17-LABEL: define {{[^@]+}}@_Z3bari 11342 // CHECK17-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 11343 // CHECK17-NEXT: entry: 11344 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11345 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 11346 // CHECK17-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 11347 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 11348 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4 11349 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 11350 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z3fooi(i32 noundef signext [[TMP0]]) 11351 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 11352 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 11353 // CHECK17-NEXT: store i32 [[ADD]], i32* [[A]], align 4 11354 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 11355 // CHECK17-NEXT: [[CALL1:%.*]] = call noundef signext i32 @_ZN2S12r1Ei(%struct.S1* noundef nonnull align 8 dereferenceable(8) [[S]], i32 noundef signext [[TMP2]]) 11356 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 11357 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 11358 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 11359 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 11360 // CHECK17-NEXT: [[CALL3:%.*]] = call noundef signext i32 @_ZL7fstatici(i32 noundef signext [[TMP4]]) 11361 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 11362 // CHECK17-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 11363 // CHECK17-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 11364 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 11365 // CHECK17-NEXT: [[CALL5:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_i(i32 noundef signext [[TMP6]]) 11366 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 11367 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 11368 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 11369 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 11370 // CHECK17-NEXT: ret i32 [[TMP8]] 11371 // 11372 // 11373 // CHECK17-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 11374 // CHECK17-SAME: (%struct.S1* noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat align 2 { 11375 // CHECK17-NEXT: entry: 11376 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 11377 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11378 // CHECK17-NEXT: [[B:%.*]] = alloca i32, align 4 11379 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 11380 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 11381 // CHECK17-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 11382 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 11383 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 11384 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 11385 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 11386 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11387 // CHECK17-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 11388 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 11389 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 11390 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 11391 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 11392 // CHECK17-NEXT: store i32 [[ADD]], i32* [[B]], align 4 11393 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 11394 // CHECK17-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 11395 // CHECK17-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 11396 // CHECK17-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 11397 // CHECK17-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]] 11398 // CHECK17-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2 11399 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 11400 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 11401 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32* 11402 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4 11403 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8 11404 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4 11405 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60 11406 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 11407 // CHECK17: omp_if.then: 11408 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 11409 // CHECK17-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]] 11410 // CHECK17-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2 11411 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 11412 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP10]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes.13 to i8*), i64 40, i1 false) 11413 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11414 // CHECK17-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to %struct.S1** 11415 // CHECK17-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP12]], align 8 11416 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11417 // CHECK17-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to double** 11418 // CHECK17-NEXT: store double* [[A]], double** [[TMP14]], align 8 11419 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 11420 // CHECK17-NEXT: store i8* null, i8** [[TMP15]], align 8 11421 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 11422 // CHECK17-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 11423 // CHECK17-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8 11424 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 11425 // CHECK17-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 11426 // CHECK17-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8 11427 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 11428 // CHECK17-NEXT: store i8* null, i8** [[TMP20]], align 8 11429 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 11430 // CHECK17-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64* 11431 // CHECK17-NEXT: store i64 2, i64* [[TMP22]], align 8 11432 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 11433 // CHECK17-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64* 11434 // CHECK17-NEXT: store i64 2, i64* [[TMP24]], align 8 11435 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 11436 // CHECK17-NEXT: store i8* null, i8** [[TMP25]], align 8 11437 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 11438 // CHECK17-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 11439 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP27]], align 8 11440 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 11441 // CHECK17-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 11442 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8 11443 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 11444 // CHECK17-NEXT: store i8* null, i8** [[TMP30]], align 8 11445 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 11446 // CHECK17-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i16** 11447 // CHECK17-NEXT: store i16* [[VLA]], i16** [[TMP32]], align 8 11448 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 11449 // CHECK17-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i16** 11450 // CHECK17-NEXT: store i16* [[VLA]], i16** [[TMP34]], align 8 11451 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 11452 // CHECK17-NEXT: store i64 [[TMP9]], i64* [[TMP35]], align 8 11453 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 11454 // CHECK17-NEXT: store i8* null, i8** [[TMP36]], align 8 11455 // CHECK17-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11456 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11457 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 11458 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 11459 // CHECK17-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP37]], i8** [[TMP38]], i64* [[TMP39]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.14, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11460 // CHECK17-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 11461 // CHECK17-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 11462 // CHECK17: omp_offload.failed: 11463 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 11464 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 11465 // CHECK17: omp_offload.cont: 11466 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]] 11467 // CHECK17: omp_if.else: 11468 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 11469 // CHECK17-NEXT: br label [[OMP_IF_END]] 11470 // CHECK17: omp_if.end: 11471 // CHECK17-NEXT: [[TMP42:%.*]] = mul nsw i64 1, [[TMP2]] 11472 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP42]] 11473 // CHECK17-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 11474 // CHECK17-NEXT: [[TMP43:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 11475 // CHECK17-NEXT: [[CONV3:%.*]] = sext i16 [[TMP43]] to i32 11476 // CHECK17-NEXT: [[TMP44:%.*]] = load i32, i32* [[B]], align 4 11477 // CHECK17-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP44]] 11478 // CHECK17-NEXT: [[TMP45:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 11479 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP45]]) 11480 // CHECK17-NEXT: ret i32 [[ADD4]] 11481 // 11482 // 11483 // CHECK17-LABEL: define {{[^@]+}}@_ZL7fstatici 11484 // CHECK17-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 11485 // CHECK17-NEXT: entry: 11486 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11487 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 11488 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2 11489 // CHECK17-NEXT: [[AAA:%.*]] = alloca i8, align 1 11490 // CHECK17-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 11491 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 11492 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 11493 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 11494 // CHECK17-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 11495 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 11496 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 11497 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 11498 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11499 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11500 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 11501 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 11502 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 11503 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4 11504 // CHECK17-NEXT: store i16 0, i16* [[AA]], align 2 11505 // CHECK17-NEXT: store i8 0, i8* [[AAA]], align 1 11506 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 11507 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 11508 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 11509 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8 11510 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 11511 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32* 11512 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 11513 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[A_CASTED]], align 8 11514 // CHECK17-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2 11515 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 11516 // CHECK17-NEXT: store i16 [[TMP4]], i16* [[CONV2]], align 2 11517 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[AA_CASTED]], align 8 11518 // CHECK17-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1 11519 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 11520 // CHECK17-NEXT: store i8 [[TMP6]], i8* [[CONV3]], align 1 11521 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 11522 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4 11523 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50 11524 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 11525 // CHECK17: omp_if.then: 11526 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11527 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 11528 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 11529 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11530 // CHECK17-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 11531 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8 11532 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 11533 // CHECK17-NEXT: store i8* null, i8** [[TMP13]], align 8 11534 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 11535 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 11536 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 11537 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 11538 // CHECK17-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 11539 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP17]], align 8 11540 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 11541 // CHECK17-NEXT: store i8* null, i8** [[TMP18]], align 8 11542 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 11543 // CHECK17-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 11544 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8 11545 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 11546 // CHECK17-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64* 11547 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 11548 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 11549 // CHECK17-NEXT: store i8* null, i8** [[TMP23]], align 8 11550 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 11551 // CHECK17-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 11552 // CHECK17-NEXT: store i64 [[TMP7]], i64* [[TMP25]], align 8 11553 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 11554 // CHECK17-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 11555 // CHECK17-NEXT: store i64 [[TMP7]], i64* [[TMP27]], align 8 11556 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 11557 // CHECK17-NEXT: store i8* null, i8** [[TMP28]], align 8 11558 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 11559 // CHECK17-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]** 11560 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 8 11561 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 11562 // CHECK17-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]** 11563 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 8 11564 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 11565 // CHECK17-NEXT: store i8* null, i8** [[TMP33]], align 8 11566 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11567 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11568 // CHECK17-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4 11569 // CHECK17-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4 11570 // CHECK17-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 11571 // CHECK17-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_4]], align 4 11572 // CHECK17-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 11573 // CHECK17-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11574 // CHECK17-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]] 11575 // CHECK17-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 11576 // CHECK17-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 11577 // CHECK17-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 11578 // CHECK17-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 11579 // CHECK17-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 11580 // CHECK17-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 11581 // CHECK17-NEXT: [[ADD8:%.*]] = add i32 [[TMP40]], 1 11582 // CHECK17-NEXT: [[TMP41:%.*]] = zext i32 [[ADD8]] to i64 11583 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]]) 11584 // CHECK17-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11585 // CHECK17-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 11586 // CHECK17-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 11587 // CHECK17: omp_offload.failed: 11588 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 11589 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 11590 // CHECK17: omp_offload.cont: 11591 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]] 11592 // CHECK17: omp_if.else: 11593 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 11594 // CHECK17-NEXT: br label [[OMP_IF_END]] 11595 // CHECK17: omp_if.end: 11596 // CHECK17-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4 11597 // CHECK17-NEXT: ret i32 [[TMP44]] 11598 // 11599 // 11600 // CHECK17-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 11601 // CHECK17-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat { 11602 // CHECK17-NEXT: entry: 11603 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11604 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 11605 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2 11606 // CHECK17-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 11607 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 11608 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 11609 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 11610 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 11611 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 11612 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11613 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 11614 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4 11615 // CHECK17-NEXT: store i16 0, i16* [[AA]], align 2 11616 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 11617 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 11618 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 11619 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 11620 // CHECK17-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 11621 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 11622 // CHECK17-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 11623 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 11624 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 11625 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 11626 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 11627 // CHECK17: omp_if.then: 11628 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11629 // CHECK17-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 11630 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 11631 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11632 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 11633 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 11634 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 11635 // CHECK17-NEXT: store i8* null, i8** [[TMP9]], align 8 11636 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 11637 // CHECK17-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 11638 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 11639 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 11640 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 11641 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 11642 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 11643 // CHECK17-NEXT: store i8* null, i8** [[TMP14]], align 8 11644 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 11645 // CHECK17-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 11646 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8 11647 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 11648 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 11649 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8 11650 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 11651 // CHECK17-NEXT: store i8* null, i8** [[TMP19]], align 8 11652 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11653 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11654 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 11655 // CHECK17-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11656 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 11657 // CHECK17-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 11658 // CHECK17: omp_offload.failed: 11659 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 11660 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 11661 // CHECK17: omp_offload.cont: 11662 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]] 11663 // CHECK17: omp_if.else: 11664 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 11665 // CHECK17-NEXT: br label [[OMP_IF_END]] 11666 // CHECK17: omp_if.end: 11667 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 11668 // CHECK17-NEXT: ret i32 [[TMP24]] 11669 // 11670 // 11671 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 11672 // CHECK17-SAME: (%struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 11673 // CHECK17-NEXT: entry: 11674 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 11675 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 11676 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11677 // CHECK17-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 11678 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 11679 // CHECK17-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 11680 // CHECK17-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 11681 // CHECK17-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 11682 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11683 // CHECK17-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 11684 // CHECK17-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 11685 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 11686 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 11687 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11688 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 11689 // CHECK17-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 11690 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 11691 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32* 11692 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 11693 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8 11694 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..12 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]]) 11695 // CHECK17-NEXT: ret void 11696 // 11697 // 11698 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..12 11699 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 11700 // CHECK17-NEXT: entry: 11701 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11702 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11703 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 11704 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 11705 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11706 // CHECK17-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 11707 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 11708 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11709 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11710 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11711 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11712 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11713 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11714 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11715 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11716 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11717 // CHECK17-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 11718 // CHECK17-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 11719 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11720 // CHECK17-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 11721 // CHECK17-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 11722 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 11723 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 11724 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11725 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 11726 // CHECK17-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 11727 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11728 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11729 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11730 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11731 // CHECK17-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11732 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 11733 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11734 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11735 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 11736 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11737 // CHECK17: cond.true: 11738 // CHECK17-NEXT: br label [[COND_END:%.*]] 11739 // CHECK17: cond.false: 11740 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11741 // CHECK17-NEXT: br label [[COND_END]] 11742 // CHECK17: cond.end: 11743 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 11744 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11745 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11746 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 11747 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11748 // CHECK17: omp.inner.for.cond: 11749 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11750 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11751 // CHECK17-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 11752 // CHECK17-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11753 // CHECK17: omp.inner.for.body: 11754 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11755 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 11756 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11757 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11758 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 11759 // CHECK17-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double 11760 // CHECK17-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00 11761 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 11762 // CHECK17-NEXT: store double [[ADD5]], double* [[A]], align 8 11763 // CHECK17-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 11764 // CHECK17-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8 11765 // CHECK17-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 11766 // CHECK17-NEXT: store double [[INC]], double* [[A6]], align 8 11767 // CHECK17-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16 11768 // CHECK17-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]] 11769 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]] 11770 // CHECK17-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 11771 // CHECK17-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2 11772 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11773 // CHECK17: omp.body.continue: 11774 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11775 // CHECK17: omp.inner.for.inc: 11776 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11777 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 11778 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 11779 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11780 // CHECK17: omp.inner.for.end: 11781 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11782 // CHECK17: omp.loop.exit: 11783 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 11784 // CHECK17-NEXT: ret void 11785 // 11786 // 11787 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 11788 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 11789 // CHECK17-NEXT: entry: 11790 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11791 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11792 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 11793 // CHECK17-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 11794 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 11795 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 11796 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 11797 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 11798 // CHECK17-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 11799 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 11800 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11801 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11802 // CHECK17-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 11803 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 11804 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 11805 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11806 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 11807 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 11808 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 11809 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 11810 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32* 11811 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4 11812 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 11813 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 11814 // CHECK17-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32* 11815 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4 11816 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8 11817 // CHECK17-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 2 11818 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 11819 // CHECK17-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2 11820 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8 11821 // CHECK17-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 1 11822 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 11823 // CHECK17-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1 11824 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 11825 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]]) 11826 // CHECK17-NEXT: ret void 11827 // 11828 // 11829 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15 11830 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 11831 // CHECK17-NEXT: entry: 11832 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11833 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11834 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11835 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11836 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 11837 // CHECK17-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 11838 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 11839 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11840 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11841 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11842 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 11843 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 11844 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11845 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11846 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11847 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11848 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11849 // CHECK17-NEXT: [[I8:%.*]] = alloca i32, align 4 11850 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11851 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11852 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 11853 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11854 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11855 // CHECK17-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 11856 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 11857 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 11858 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11859 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 11860 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 11861 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 11862 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4 11863 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 11864 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 11865 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4 11866 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 11867 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11868 // CHECK17-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 11869 // CHECK17-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 11870 // CHECK17-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 11871 // CHECK17-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 11872 // CHECK17-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 11873 // CHECK17-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 11874 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11875 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 11876 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11877 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 11878 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 11879 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11880 // CHECK17: omp.precond.then: 11881 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11882 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 11883 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 11884 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11885 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11886 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11887 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 11888 // CHECK17-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11889 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11890 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 11891 // CHECK17-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 11892 // CHECK17-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11893 // CHECK17: cond.true: 11894 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 11895 // CHECK17-NEXT: br label [[COND_END:%.*]] 11896 // CHECK17: cond.false: 11897 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11898 // CHECK17-NEXT: br label [[COND_END]] 11899 // CHECK17: cond.end: 11900 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 11901 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11902 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11903 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 11904 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11905 // CHECK17: omp.inner.for.cond: 11906 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11907 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11908 // CHECK17-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1 11909 // CHECK17-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]] 11910 // CHECK17-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11911 // CHECK17: omp.inner.for.body: 11912 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11913 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11914 // CHECK17-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 11915 // CHECK17-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]] 11916 // CHECK17-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4 11917 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4 11918 // CHECK17-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1 11919 // CHECK17-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 4 11920 // CHECK17-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 2 11921 // CHECK17-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32 11922 // CHECK17-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 11923 // CHECK17-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16 11924 // CHECK17-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 2 11925 // CHECK17-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 1 11926 // CHECK17-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32 11927 // CHECK17-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1 11928 // CHECK17-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8 11929 // CHECK17-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 1 11930 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 11931 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 11932 // CHECK17-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1 11933 // CHECK17-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4 11934 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11935 // CHECK17: omp.body.continue: 11936 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11937 // CHECK17: omp.inner.for.inc: 11938 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11939 // CHECK17-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1 11940 // CHECK17-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 11941 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11942 // CHECK17: omp.inner.for.end: 11943 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11944 // CHECK17: omp.loop.exit: 11945 // CHECK17-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11946 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 11947 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 11948 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 11949 // CHECK17: omp.precond.end: 11950 // CHECK17-NEXT: ret void 11951 // 11952 // 11953 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 11954 // CHECK17-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 11955 // CHECK17-NEXT: entry: 11956 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11957 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 11958 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 11959 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 11960 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 11961 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11962 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11963 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 11964 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11965 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 11966 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 11967 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 11968 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 11969 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4 11970 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8 11971 // CHECK17-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 2 11972 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 11973 // CHECK17-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 11974 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 11975 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]]) 11976 // CHECK17-NEXT: ret void 11977 // 11978 // 11979 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18 11980 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 11981 // CHECK17-NEXT: entry: 11982 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11983 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11984 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11985 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 11986 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 11987 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11988 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11989 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11990 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11991 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11992 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11993 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11994 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11995 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11996 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11997 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11998 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 11999 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 12000 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 12001 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 12002 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12003 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12004 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12005 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12006 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12007 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 12008 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12009 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12010 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12011 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12012 // CHECK17: cond.true: 12013 // CHECK17-NEXT: br label [[COND_END:%.*]] 12014 // CHECK17: cond.false: 12015 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12016 // CHECK17-NEXT: br label [[COND_END]] 12017 // CHECK17: cond.end: 12018 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12019 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12020 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12021 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 12022 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12023 // CHECK17: omp.inner.for.cond: 12024 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12025 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12026 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12027 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12028 // CHECK17: omp.inner.for.body: 12029 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12030 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 12031 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12032 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 12033 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 12034 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 12035 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 12036 // CHECK17-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 2 12037 // CHECK17-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32 12038 // CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 12039 // CHECK17-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 12040 // CHECK17-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 12041 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 12042 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 12043 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1 12044 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4 12045 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12046 // CHECK17: omp.body.continue: 12047 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12048 // CHECK17: omp.inner.for.inc: 12049 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12050 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1 12051 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 12052 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 12053 // CHECK17: omp.inner.for.end: 12054 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12055 // CHECK17: omp.loop.exit: 12056 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 12057 // CHECK17-NEXT: ret void 12058 // 12059 // 12060 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 12061 // CHECK17-SAME: () #[[ATTR4]] { 12062 // CHECK17-NEXT: entry: 12063 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 12064 // CHECK17-NEXT: ret void 12065 // 12066 // 12067 // CHECK18-LABEL: define {{[^@]+}}@_Z3fooi 12068 // CHECK18-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 12069 // CHECK18-NEXT: entry: 12070 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12071 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 12072 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2 12073 // CHECK18-NEXT: [[B:%.*]] = alloca [10 x float], align 4 12074 // CHECK18-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 12075 // CHECK18-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 12076 // CHECK18-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 12077 // CHECK18-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 12078 // CHECK18-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8 12079 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12080 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12081 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 12082 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12083 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8 12084 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 12085 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 12086 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 12087 // CHECK18-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 12088 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 12089 // CHECK18-NEXT: [[AA_CASTED7:%.*]] = alloca i64, align 8 12090 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [1 x i8*], align 8 12091 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [1 x i8*], align 8 12092 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [1 x i8*], align 8 12093 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 12094 // CHECK18-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8 12095 // CHECK18-NEXT: [[AA_CASTED14:%.*]] = alloca i64, align 8 12096 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [2 x i8*], align 8 12097 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [2 x i8*], align 8 12098 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [2 x i8*], align 8 12099 // CHECK18-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 12100 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 12101 // CHECK18-NEXT: [[A_CASTED23:%.*]] = alloca i64, align 8 12102 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED25:%.*]] = alloca i64, align 8 12103 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [10 x i8*], align 8 12104 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [10 x i8*], align 8 12105 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [10 x i8*], align 8 12106 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 8 12107 // CHECK18-NEXT: [[_TMP32:%.*]] = alloca i32, align 4 12108 // CHECK18-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 12109 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12110 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4 12111 // CHECK18-NEXT: store i16 0, i16* [[AA]], align 2 12112 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 12113 // CHECK18-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 12114 // CHECK18-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 12115 // CHECK18-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 12116 // CHECK18-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4 12117 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 12118 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 12119 // CHECK18-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 12120 // CHECK18-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]] 12121 // CHECK18-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8 12122 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 12123 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 12124 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_]], align 4 12125 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 12126 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_2]], align 4 12127 // CHECK18-NEXT: [[TMP9:%.*]] = load i16, i16* [[AA]], align 2 12128 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 12129 // CHECK18-NEXT: store i16 [[TMP9]], i16* [[CONV]], align 2 12130 // CHECK18-NEXT: [[TMP10:%.*]] = load i64, i64* [[AA_CASTED]], align 8 12131 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12132 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 12133 // CHECK18-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4 12134 // CHECK18-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 12135 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12136 // CHECK18-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32* 12137 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[CONV5]], align 4 12138 // CHECK18-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8 12139 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12140 // CHECK18-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 12141 // CHECK18-NEXT: store i64 [[TMP10]], i64* [[TMP16]], align 8 12142 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12143 // CHECK18-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 12144 // CHECK18-NEXT: store i64 [[TMP10]], i64* [[TMP18]], align 8 12145 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 12146 // CHECK18-NEXT: store i8* null, i8** [[TMP19]], align 8 12147 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 12148 // CHECK18-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 12149 // CHECK18-NEXT: store i64 [[TMP12]], i64* [[TMP21]], align 8 12150 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 12151 // CHECK18-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 12152 // CHECK18-NEXT: store i64 [[TMP12]], i64* [[TMP23]], align 8 12153 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 12154 // CHECK18-NEXT: store i8* null, i8** [[TMP24]], align 8 12155 // CHECK18-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 12156 // CHECK18-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 12157 // CHECK18-NEXT: store i64 [[TMP14]], i64* [[TMP26]], align 8 12158 // CHECK18-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 12159 // CHECK18-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 12160 // CHECK18-NEXT: store i64 [[TMP14]], i64* [[TMP28]], align 8 12161 // CHECK18-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 12162 // CHECK18-NEXT: store i8* null, i8** [[TMP29]], align 8 12163 // CHECK18-NEXT: [[TMP30:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12164 // CHECK18-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12165 // CHECK18-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0 12166 // CHECK18-NEXT: [[TMP33:%.*]] = load i16, i16* [[AA]], align 2 12167 // CHECK18-NEXT: store i16 [[TMP33]], i16* [[TMP32]], align 4 12168 // CHECK18-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1 12169 // CHECK18-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12170 // CHECK18-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4 12171 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2 12172 // CHECK18-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12173 // CHECK18-NEXT: store i32 [[TMP37]], i32* [[TMP36]], align 4 12174 // CHECK18-NEXT: [[TMP38:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i64 120, i64 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 12175 // CHECK18-NEXT: [[TMP39:%.*]] = bitcast i8* [[TMP38]] to %struct.kmp_task_t_with_privates* 12176 // CHECK18-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 0 12177 // CHECK18-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP40]], i32 0, i32 0 12178 // CHECK18-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 8 12179 // CHECK18-NEXT: [[TMP43:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8* 12180 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP42]], i8* align 4 [[TMP43]], i64 12, i1 false) 12181 // CHECK18-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 1 12182 // CHECK18-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to %struct.anon* 12183 // CHECK18-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 0 12184 // CHECK18-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8* 12185 // CHECK18-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP30]] to i8* 12186 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP47]], i8* align 8 [[TMP48]], i64 24, i1 false) 12187 // CHECK18-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 1 12188 // CHECK18-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8* 12189 // CHECK18-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP31]] to i8* 12190 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP50]], i8* align 8 [[TMP51]], i64 24, i1 false) 12191 // CHECK18-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 2 12192 // CHECK18-NEXT: [[TMP53:%.*]] = bitcast [3 x i64]* [[TMP52]] to i8* 12193 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP53]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 12194 // CHECK18-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 3 12195 // CHECK18-NEXT: [[TMP55:%.*]] = load i16, i16* [[AA]], align 2 12196 // CHECK18-NEXT: store i16 [[TMP55]], i16* [[TMP54]], align 8 12197 // CHECK18-NEXT: [[TMP56:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP38]]) 12198 // CHECK18-NEXT: [[TMP57:%.*]] = load i32, i32* [[A]], align 4 12199 // CHECK18-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 12200 // CHECK18-NEXT: store i32 [[TMP57]], i32* [[CONV6]], align 4 12201 // CHECK18-NEXT: [[TMP58:%.*]] = load i64, i64* [[A_CASTED]], align 8 12202 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i64 [[TMP58]]) #[[ATTR3:[0-9]+]] 12203 // CHECK18-NEXT: [[TMP59:%.*]] = load i16, i16* [[AA]], align 2 12204 // CHECK18-NEXT: [[CONV8:%.*]] = bitcast i64* [[AA_CASTED7]] to i16* 12205 // CHECK18-NEXT: store i16 [[TMP59]], i16* [[CONV8]], align 2 12206 // CHECK18-NEXT: [[TMP60:%.*]] = load i64, i64* [[AA_CASTED7]], align 8 12207 // CHECK18-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 12208 // CHECK18-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64* 12209 // CHECK18-NEXT: store i64 [[TMP60]], i64* [[TMP62]], align 8 12210 // CHECK18-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 12211 // CHECK18-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64* 12212 // CHECK18-NEXT: store i64 [[TMP60]], i64* [[TMP64]], align 8 12213 // CHECK18-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0 12214 // CHECK18-NEXT: store i8* null, i8** [[TMP65]], align 8 12215 // CHECK18-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0 12216 // CHECK18-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0 12217 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 12218 // CHECK18-NEXT: [[TMP68:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP66]], i8** [[TMP67]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12219 // CHECK18-NEXT: [[TMP69:%.*]] = icmp ne i32 [[TMP68]], 0 12220 // CHECK18-NEXT: br i1 [[TMP69]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 12221 // CHECK18: omp_offload.failed: 12222 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i64 [[TMP60]]) #[[ATTR3]] 12223 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 12224 // CHECK18: omp_offload.cont: 12225 // CHECK18-NEXT: [[TMP70:%.*]] = load i32, i32* [[A]], align 4 12226 // CHECK18-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32* 12227 // CHECK18-NEXT: store i32 [[TMP70]], i32* [[CONV13]], align 4 12228 // CHECK18-NEXT: [[TMP71:%.*]] = load i64, i64* [[A_CASTED12]], align 8 12229 // CHECK18-NEXT: [[TMP72:%.*]] = load i16, i16* [[AA]], align 2 12230 // CHECK18-NEXT: [[CONV15:%.*]] = bitcast i64* [[AA_CASTED14]] to i16* 12231 // CHECK18-NEXT: store i16 [[TMP72]], i16* [[CONV15]], align 2 12232 // CHECK18-NEXT: [[TMP73:%.*]] = load i64, i64* [[AA_CASTED14]], align 8 12233 // CHECK18-NEXT: [[TMP74:%.*]] = load i32, i32* [[N_ADDR]], align 4 12234 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP74]], 10 12235 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 12236 // CHECK18: omp_if.then: 12237 // CHECK18-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 12238 // CHECK18-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 12239 // CHECK18-NEXT: store i64 [[TMP71]], i64* [[TMP76]], align 8 12240 // CHECK18-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 12241 // CHECK18-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64* 12242 // CHECK18-NEXT: store i64 [[TMP71]], i64* [[TMP78]], align 8 12243 // CHECK18-NEXT: [[TMP79:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0 12244 // CHECK18-NEXT: store i8* null, i8** [[TMP79]], align 8 12245 // CHECK18-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1 12246 // CHECK18-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 12247 // CHECK18-NEXT: store i64 [[TMP73]], i64* [[TMP81]], align 8 12248 // CHECK18-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1 12249 // CHECK18-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* 12250 // CHECK18-NEXT: store i64 [[TMP73]], i64* [[TMP83]], align 8 12251 // CHECK18-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1 12252 // CHECK18-NEXT: store i8* null, i8** [[TMP84]], align 8 12253 // CHECK18-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 12254 // CHECK18-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 12255 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 12256 // CHECK18-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP85]], i8** [[TMP86]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12257 // CHECK18-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0 12258 // CHECK18-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 12259 // CHECK18: omp_offload.failed20: 12260 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]] 12261 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT21]] 12262 // CHECK18: omp_offload.cont21: 12263 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]] 12264 // CHECK18: omp_if.else: 12265 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]] 12266 // CHECK18-NEXT: br label [[OMP_IF_END]] 12267 // CHECK18: omp_if.end: 12268 // CHECK18-NEXT: [[TMP89:%.*]] = load i32, i32* [[N_ADDR]], align 4 12269 // CHECK18-NEXT: store i32 [[TMP89]], i32* [[DOTCAPTURE_EXPR_22]], align 4 12270 // CHECK18-NEXT: [[TMP90:%.*]] = load i32, i32* [[A]], align 4 12271 // CHECK18-NEXT: [[CONV24:%.*]] = bitcast i64* [[A_CASTED23]] to i32* 12272 // CHECK18-NEXT: store i32 [[TMP90]], i32* [[CONV24]], align 4 12273 // CHECK18-NEXT: [[TMP91:%.*]] = load i64, i64* [[A_CASTED23]], align 8 12274 // CHECK18-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4 12275 // CHECK18-NEXT: [[CONV26:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED25]] to i32* 12276 // CHECK18-NEXT: store i32 [[TMP92]], i32* [[CONV26]], align 4 12277 // CHECK18-NEXT: [[TMP93:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED25]], align 8 12278 // CHECK18-NEXT: [[TMP94:%.*]] = load i32, i32* [[N_ADDR]], align 4 12279 // CHECK18-NEXT: [[CMP27:%.*]] = icmp sgt i32 [[TMP94]], 20 12280 // CHECK18-NEXT: br i1 [[CMP27]], label [[OMP_IF_THEN28:%.*]], label [[OMP_IF_ELSE35:%.*]] 12281 // CHECK18: omp_if.then28: 12282 // CHECK18-NEXT: [[TMP95:%.*]] = mul nuw i64 [[TMP2]], 4 12283 // CHECK18-NEXT: [[TMP96:%.*]] = mul nuw i64 5, [[TMP5]] 12284 // CHECK18-NEXT: [[TMP97:%.*]] = mul nuw i64 [[TMP96]], 8 12285 // CHECK18-NEXT: [[TMP98:%.*]] = bitcast [10 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 12286 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP98]], i8* align 8 bitcast ([10 x i64]* @.offload_sizes.10 to i8*), i64 80, i1 false) 12287 // CHECK18-NEXT: [[TMP99:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 12288 // CHECK18-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to i64* 12289 // CHECK18-NEXT: store i64 [[TMP91]], i64* [[TMP100]], align 8 12290 // CHECK18-NEXT: [[TMP101:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 12291 // CHECK18-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i64* 12292 // CHECK18-NEXT: store i64 [[TMP91]], i64* [[TMP102]], align 8 12293 // CHECK18-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0 12294 // CHECK18-NEXT: store i8* null, i8** [[TMP103]], align 8 12295 // CHECK18-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 1 12296 // CHECK18-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]** 12297 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 8 12298 // CHECK18-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 1 12299 // CHECK18-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]** 12300 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 8 12301 // CHECK18-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 1 12302 // CHECK18-NEXT: store i8* null, i8** [[TMP108]], align 8 12303 // CHECK18-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 2 12304 // CHECK18-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i64* 12305 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP110]], align 8 12306 // CHECK18-NEXT: [[TMP111:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 2 12307 // CHECK18-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64* 12308 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP112]], align 8 12309 // CHECK18-NEXT: [[TMP113:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 2 12310 // CHECK18-NEXT: store i8* null, i8** [[TMP113]], align 8 12311 // CHECK18-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 3 12312 // CHECK18-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to float** 12313 // CHECK18-NEXT: store float* [[VLA]], float** [[TMP115]], align 8 12314 // CHECK18-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 3 12315 // CHECK18-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float** 12316 // CHECK18-NEXT: store float* [[VLA]], float** [[TMP117]], align 8 12317 // CHECK18-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 12318 // CHECK18-NEXT: store i64 [[TMP95]], i64* [[TMP118]], align 8 12319 // CHECK18-NEXT: [[TMP119:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 3 12320 // CHECK18-NEXT: store i8* null, i8** [[TMP119]], align 8 12321 // CHECK18-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 4 12322 // CHECK18-NEXT: [[TMP121:%.*]] = bitcast i8** [[TMP120]] to [5 x [10 x double]]** 12323 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP121]], align 8 12324 // CHECK18-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 4 12325 // CHECK18-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]** 12326 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 8 12327 // CHECK18-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 4 12328 // CHECK18-NEXT: store i8* null, i8** [[TMP124]], align 8 12329 // CHECK18-NEXT: [[TMP125:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 5 12330 // CHECK18-NEXT: [[TMP126:%.*]] = bitcast i8** [[TMP125]] to i64* 12331 // CHECK18-NEXT: store i64 5, i64* [[TMP126]], align 8 12332 // CHECK18-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 5 12333 // CHECK18-NEXT: [[TMP128:%.*]] = bitcast i8** [[TMP127]] to i64* 12334 // CHECK18-NEXT: store i64 5, i64* [[TMP128]], align 8 12335 // CHECK18-NEXT: [[TMP129:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 5 12336 // CHECK18-NEXT: store i8* null, i8** [[TMP129]], align 8 12337 // CHECK18-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 6 12338 // CHECK18-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i64* 12339 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP131]], align 8 12340 // CHECK18-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 6 12341 // CHECK18-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i64* 12342 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP133]], align 8 12343 // CHECK18-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 6 12344 // CHECK18-NEXT: store i8* null, i8** [[TMP134]], align 8 12345 // CHECK18-NEXT: [[TMP135:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 7 12346 // CHECK18-NEXT: [[TMP136:%.*]] = bitcast i8** [[TMP135]] to double** 12347 // CHECK18-NEXT: store double* [[VLA1]], double** [[TMP136]], align 8 12348 // CHECK18-NEXT: [[TMP137:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 7 12349 // CHECK18-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to double** 12350 // CHECK18-NEXT: store double* [[VLA1]], double** [[TMP138]], align 8 12351 // CHECK18-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 12352 // CHECK18-NEXT: store i64 [[TMP97]], i64* [[TMP139]], align 8 12353 // CHECK18-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 7 12354 // CHECK18-NEXT: store i8* null, i8** [[TMP140]], align 8 12355 // CHECK18-NEXT: [[TMP141:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 8 12356 // CHECK18-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to %struct.TT** 12357 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP142]], align 8 12358 // CHECK18-NEXT: [[TMP143:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 8 12359 // CHECK18-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to %struct.TT** 12360 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP144]], align 8 12361 // CHECK18-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 8 12362 // CHECK18-NEXT: store i8* null, i8** [[TMP145]], align 8 12363 // CHECK18-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 9 12364 // CHECK18-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64* 12365 // CHECK18-NEXT: store i64 [[TMP93]], i64* [[TMP147]], align 8 12366 // CHECK18-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 9 12367 // CHECK18-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 12368 // CHECK18-NEXT: store i64 [[TMP93]], i64* [[TMP149]], align 8 12369 // CHECK18-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 9 12370 // CHECK18-NEXT: store i8* null, i8** [[TMP150]], align 8 12371 // CHECK18-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 12372 // CHECK18-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 12373 // CHECK18-NEXT: [[TMP153:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 12374 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 12375 // CHECK18-NEXT: [[TMP154:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP151]], i8** [[TMP152]], i64* [[TMP153]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12376 // CHECK18-NEXT: [[TMP155:%.*]] = icmp ne i32 [[TMP154]], 0 12377 // CHECK18-NEXT: br i1 [[TMP155]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 12378 // CHECK18: omp_offload.failed33: 12379 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]] 12380 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT34]] 12381 // CHECK18: omp_offload.cont34: 12382 // CHECK18-NEXT: br label [[OMP_IF_END36:%.*]] 12383 // CHECK18: omp_if.else35: 12384 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]] 12385 // CHECK18-NEXT: br label [[OMP_IF_END36]] 12386 // CHECK18: omp_if.end36: 12387 // CHECK18-NEXT: [[TMP156:%.*]] = load i32, i32* [[A]], align 4 12388 // CHECK18-NEXT: [[TMP157:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 12389 // CHECK18-NEXT: call void @llvm.stackrestore(i8* [[TMP157]]) 12390 // CHECK18-NEXT: ret i32 [[TMP156]] 12391 // 12392 // 12393 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 12394 // CHECK18-SAME: (i64 noundef [[AA:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] { 12395 // CHECK18-NEXT: entry: 12396 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 12397 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12398 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 12399 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 12400 // CHECK18-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 12401 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 12402 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 12403 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 12404 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 12405 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 12406 // CHECK18-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 12407 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 4 12408 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 4 12409 // CHECK18-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 12410 // CHECK18-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 12411 // CHECK18-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 12412 // CHECK18-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2 12413 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 12414 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]]) 12415 // CHECK18-NEXT: ret void 12416 // 12417 // 12418 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined. 12419 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 12420 // CHECK18-NEXT: entry: 12421 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12422 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12423 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 12424 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12425 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 12426 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12427 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12428 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12429 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12430 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 12431 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12432 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12433 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 12434 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 12435 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12436 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12437 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12438 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12439 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12440 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 12441 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12442 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12443 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 12444 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12445 // CHECK18: cond.true: 12446 // CHECK18-NEXT: br label [[COND_END:%.*]] 12447 // CHECK18: cond.false: 12448 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12449 // CHECK18-NEXT: br label [[COND_END]] 12450 // CHECK18: cond.end: 12451 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 12452 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12453 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12454 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 12455 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12456 // CHECK18: omp.inner.for.cond: 12457 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12458 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12459 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 12460 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12461 // CHECK18: omp.inner.for.body: 12462 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12463 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 12464 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12465 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 12466 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12467 // CHECK18: omp.body.continue: 12468 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12469 // CHECK18: omp.inner.for.inc: 12470 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12471 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 12472 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 12473 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 12474 // CHECK18: omp.inner.for.end: 12475 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12476 // CHECK18: omp.loop.exit: 12477 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 12478 // CHECK18-NEXT: ret void 12479 // 12480 // 12481 // CHECK18-LABEL: define {{[^@]+}}@.omp_task_privates_map. 12482 // CHECK18-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i16** noalias noundef [[TMP1:%.*]], [3 x i8*]** noalias noundef [[TMP2:%.*]], [3 x i8*]** noalias noundef [[TMP3:%.*]], [3 x i64]** noalias noundef [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] { 12483 // CHECK18-NEXT: entry: 12484 // CHECK18-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 12485 // CHECK18-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 8 12486 // CHECK18-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 8 12487 // CHECK18-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 8 12488 // CHECK18-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 8 12489 // CHECK18-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 12490 // CHECK18-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 8 12491 // CHECK18-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 8 12492 // CHECK18-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 8 12493 // CHECK18-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 8 12494 // CHECK18-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 12495 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0 12496 // CHECK18-NEXT: [[TMP7:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 8 12497 // CHECK18-NEXT: store [3 x i8*]* [[TMP6]], [3 x i8*]** [[TMP7]], align 8 12498 // CHECK18-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1 12499 // CHECK18-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 8 12500 // CHECK18-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 8 12501 // CHECK18-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2 12502 // CHECK18-NEXT: [[TMP11:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 8 12503 // CHECK18-NEXT: store [3 x i64]* [[TMP10]], [3 x i64]** [[TMP11]], align 8 12504 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3 12505 // CHECK18-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 8 12506 // CHECK18-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 8 12507 // CHECK18-NEXT: ret void 12508 // 12509 // 12510 // CHECK18-LABEL: define {{[^@]+}}@.omp_task_entry. 12511 // CHECK18-SAME: (i32 noundef signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] { 12512 // CHECK18-NEXT: entry: 12513 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 12514 // CHECK18-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 12515 // CHECK18-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 12516 // CHECK18-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 12517 // CHECK18-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 12518 // CHECK18-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8 12519 // CHECK18-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 8 12520 // CHECK18-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 8 12521 // CHECK18-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 8 12522 // CHECK18-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 8 12523 // CHECK18-NEXT: [[AA_CASTED_I:%.*]] = alloca i64, align 8 12524 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i64, align 8 12525 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED5_I:%.*]] = alloca i64, align 8 12526 // CHECK18-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 12527 // CHECK18-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 12528 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 12529 // CHECK18-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 12530 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 12531 // CHECK18-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 12532 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 12533 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 12534 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 12535 // CHECK18-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 12536 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 12537 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1 12538 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 12539 // CHECK18-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 12540 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 12541 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]]) 12542 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]]) 12543 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]]) 12544 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21 12545 // CHECK18-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21 12546 // CHECK18-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 12547 // CHECK18-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 12548 // CHECK18-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21 12549 // CHECK18-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 12550 // CHECK18-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 12551 // CHECK18-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 12552 // CHECK18-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 12553 // CHECK18-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* 12554 // CHECK18-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]] 12555 // CHECK18-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !21 12556 // CHECK18-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !21 12557 // CHECK18-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias !21 12558 // CHECK18-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias !21 12559 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i64 0, i64 0 12560 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i64 0, i64 0 12561 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i64 0, i64 0 12562 // CHECK18-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1 12563 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2 12564 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4 12565 // CHECK18-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4 12566 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]] 12567 // CHECK18-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]] 12568 // CHECK18-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 12569 // CHECK18-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 12570 // CHECK18: omp_offload.failed.i: 12571 // CHECK18-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2 12572 // CHECK18-NEXT: [[CONV_I:%.*]] = bitcast i64* [[AA_CASTED_I]] to i16* 12573 // CHECK18-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !21 12574 // CHECK18-NEXT: [[TMP30:%.*]] = load i64, i64* [[AA_CASTED_I]], align 8, !noalias !21 12575 // CHECK18-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4 12576 // CHECK18-NEXT: [[CONV4_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED_I]] to i32* 12577 // CHECK18-NEXT: store i32 [[TMP31]], i32* [[CONV4_I]], align 4, !noalias !21 12578 // CHECK18-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED_I]], align 8, !noalias !21 12579 // CHECK18-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4 12580 // CHECK18-NEXT: [[CONV6_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED5_I]] to i32* 12581 // CHECK18-NEXT: store i32 [[TMP33]], i32* [[CONV6_I]], align 4, !noalias !21 12582 // CHECK18-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED5_I]], align 8, !noalias !21 12583 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i64 [[TMP30]], i64 [[TMP32]], i64 [[TMP34]]) #[[ATTR3]] 12584 // CHECK18-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 12585 // CHECK18: .omp_outlined..1.exit: 12586 // CHECK18-NEXT: ret i32 0 12587 // 12588 // 12589 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107 12590 // CHECK18-SAME: (i64 noundef [[A:%.*]]) #[[ATTR2]] { 12591 // CHECK18-NEXT: entry: 12592 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 12593 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 12594 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 12595 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 12596 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 12597 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32* 12598 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4 12599 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 12600 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 12601 // CHECK18-NEXT: ret void 12602 // 12603 // 12604 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..2 12605 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR2]] { 12606 // CHECK18-NEXT: entry: 12607 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12608 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12609 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 12610 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12611 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 12612 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12613 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12614 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12615 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12616 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 12617 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12618 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12619 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 12620 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 12621 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12622 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12623 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12624 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12625 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12626 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 12627 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12628 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12629 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 12630 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12631 // CHECK18: cond.true: 12632 // CHECK18-NEXT: br label [[COND_END:%.*]] 12633 // CHECK18: cond.false: 12634 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12635 // CHECK18-NEXT: br label [[COND_END]] 12636 // CHECK18: cond.end: 12637 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 12638 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12639 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12640 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 12641 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12642 // CHECK18: omp.inner.for.cond: 12643 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12644 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12645 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 12646 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12647 // CHECK18: omp.inner.for.body: 12648 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12649 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 12650 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12651 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 12652 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 12653 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 12654 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[CONV]], align 4 12655 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12656 // CHECK18: omp.body.continue: 12657 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12658 // CHECK18: omp.inner.for.inc: 12659 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12660 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 12661 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 12662 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 12663 // CHECK18: omp.inner.for.end: 12664 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12665 // CHECK18: omp.loop.exit: 12666 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 12667 // CHECK18-NEXT: ret void 12668 // 12669 // 12670 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 12671 // CHECK18-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR2]] { 12672 // CHECK18-NEXT: entry: 12673 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 12674 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 12675 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 12676 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 12677 // CHECK18-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 12678 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 12679 // CHECK18-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 12680 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8 12681 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 12682 // CHECK18-NEXT: ret void 12683 // 12684 // 12685 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..3 12686 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 12687 // CHECK18-NEXT: entry: 12688 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12689 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12690 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 12691 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12692 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 12693 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12694 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12695 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12696 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12697 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 12698 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12699 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12700 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 12701 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 12702 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12703 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12704 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12705 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12706 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12707 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 12708 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12709 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12710 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 12711 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12712 // CHECK18: cond.true: 12713 // CHECK18-NEXT: br label [[COND_END:%.*]] 12714 // CHECK18: cond.false: 12715 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12716 // CHECK18-NEXT: br label [[COND_END]] 12717 // CHECK18: cond.end: 12718 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 12719 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12720 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12721 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 12722 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12723 // CHECK18: omp.inner.for.cond: 12724 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12725 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12726 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 12727 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12728 // CHECK18: omp.inner.for.body: 12729 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12730 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 12731 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12732 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 12733 // CHECK18-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 12734 // CHECK18-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 12735 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 12736 // CHECK18-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 12737 // CHECK18-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 12738 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12739 // CHECK18: omp.body.continue: 12740 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12741 // CHECK18: omp.inner.for.inc: 12742 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12743 // CHECK18-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 12744 // CHECK18-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 12745 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 12746 // CHECK18: omp.inner.for.end: 12747 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12748 // CHECK18: omp.loop.exit: 12749 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 12750 // CHECK18-NEXT: ret void 12751 // 12752 // 12753 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 12754 // CHECK18-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 12755 // CHECK18-NEXT: entry: 12756 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 12757 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 12758 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 12759 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 12760 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 12761 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 12762 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 12763 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 12764 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 12765 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 12766 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4 12767 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 12768 // CHECK18-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 2 12769 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 12770 // CHECK18-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2 12771 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 12772 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]]) 12773 // CHECK18-NEXT: ret void 12774 // 12775 // 12776 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..6 12777 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR2]] { 12778 // CHECK18-NEXT: entry: 12779 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12780 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12781 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 12782 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 12783 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12784 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 12785 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12786 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12787 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12788 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12789 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 12790 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12791 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12792 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 12793 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 12794 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 12795 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 12796 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12797 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12798 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12799 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12800 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12801 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 12802 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12803 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12804 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 12805 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12806 // CHECK18: cond.true: 12807 // CHECK18-NEXT: br label [[COND_END:%.*]] 12808 // CHECK18: cond.false: 12809 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12810 // CHECK18-NEXT: br label [[COND_END]] 12811 // CHECK18: cond.end: 12812 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 12813 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12814 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12815 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 12816 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12817 // CHECK18: omp.inner.for.cond: 12818 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12819 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12820 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 12821 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12822 // CHECK18: omp.inner.for.body: 12823 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12824 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 12825 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12826 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 12827 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 12828 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 12829 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 12830 // CHECK18-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 2 12831 // CHECK18-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32 12832 // CHECK18-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 12833 // CHECK18-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 12834 // CHECK18-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 12835 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12836 // CHECK18: omp.body.continue: 12837 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12838 // CHECK18: omp.inner.for.inc: 12839 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12840 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1 12841 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 12842 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 12843 // CHECK18: omp.inner.for.end: 12844 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12845 // CHECK18: omp.loop.exit: 12846 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 12847 // CHECK18-NEXT: ret void 12848 // 12849 // 12850 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 12851 // CHECK18-SAME: (i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12852 // CHECK18-NEXT: entry: 12853 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 12854 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 12855 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 12856 // CHECK18-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 12857 // CHECK18-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 12858 // CHECK18-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 12859 // CHECK18-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 12860 // CHECK18-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 12861 // CHECK18-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 12862 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12863 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 12864 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12865 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 12866 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 12867 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 12868 // CHECK18-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 12869 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 12870 // CHECK18-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 12871 // CHECK18-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 12872 // CHECK18-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 12873 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 12874 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 12875 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 12876 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 12877 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 12878 // CHECK18-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 12879 // CHECK18-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 12880 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 12881 // CHECK18-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 12882 // CHECK18-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 12883 // CHECK18-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 12884 // CHECK18-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 12885 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 12886 // CHECK18-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 12887 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4 12888 // CHECK18-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8 12889 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 4 12890 // CHECK18-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 12891 // CHECK18-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4 12892 // CHECK18-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 12893 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]]) 12894 // CHECK18-NEXT: ret void 12895 // 12896 // 12897 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..9 12898 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12899 // CHECK18-NEXT: entry: 12900 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12901 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12902 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 12903 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 12904 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 12905 // CHECK18-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 12906 // CHECK18-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 12907 // CHECK18-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 12908 // CHECK18-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 12909 // CHECK18-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 12910 // CHECK18-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 12911 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12912 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12913 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 12914 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12915 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12916 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12917 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12918 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 12919 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12920 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12921 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 12922 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 12923 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 12924 // CHECK18-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 12925 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 12926 // CHECK18-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 12927 // CHECK18-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 12928 // CHECK18-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 12929 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 12930 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 12931 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 12932 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 12933 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 12934 // CHECK18-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 12935 // CHECK18-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 12936 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 12937 // CHECK18-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 12938 // CHECK18-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 12939 // CHECK18-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 12940 // CHECK18-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 12941 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12942 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12943 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12944 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12945 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 4 12946 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12947 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 12948 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 12949 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12950 // CHECK18: omp.dispatch.cond: 12951 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12952 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 12953 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12954 // CHECK18: cond.true: 12955 // CHECK18-NEXT: br label [[COND_END:%.*]] 12956 // CHECK18: cond.false: 12957 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12958 // CHECK18-NEXT: br label [[COND_END]] 12959 // CHECK18: cond.end: 12960 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 12961 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12962 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12963 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 12964 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12965 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12966 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 12967 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12968 // CHECK18: omp.dispatch.body: 12969 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12970 // CHECK18: omp.inner.for.cond: 12971 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 12972 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 12973 // CHECK18-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 12974 // CHECK18-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12975 // CHECK18: omp.inner.for.body: 12976 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 12977 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 12978 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12979 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 12980 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !22 12981 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 12982 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group !22 12983 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2 12984 // CHECK18-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !22 12985 // CHECK18-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double 12986 // CHECK18-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00 12987 // CHECK18-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float 12988 // CHECK18-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !22 12989 // CHECK18-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3 12990 // CHECK18-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !22 12991 // CHECK18-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double 12992 // CHECK18-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00 12993 // CHECK18-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float 12994 // CHECK18-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !22 12995 // CHECK18-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1 12996 // CHECK18-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2 12997 // CHECK18-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !22 12998 // CHECK18-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00 12999 // CHECK18-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !22 13000 // CHECK18-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]] 13001 // CHECK18-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]] 13002 // CHECK18-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3 13003 // CHECK18-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !22 13004 // CHECK18-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00 13005 // CHECK18-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !22 13006 // CHECK18-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 13007 // CHECK18-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !22 13008 // CHECK18-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1 13009 // CHECK18-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !22 13010 // CHECK18-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 13011 // CHECK18-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !22 13012 // CHECK18-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32 13013 // CHECK18-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1 13014 // CHECK18-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8 13015 // CHECK18-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !22 13016 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13017 // CHECK18: omp.body.continue: 13018 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13019 // CHECK18: omp.inner.for.inc: 13020 // CHECK18-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 13021 // CHECK18-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1 13022 // CHECK18-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 13023 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 13024 // CHECK18: omp.inner.for.end: 13025 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13026 // CHECK18: omp.dispatch.inc: 13027 // CHECK18-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13028 // CHECK18-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13029 // CHECK18-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 13030 // CHECK18-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4 13031 // CHECK18-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13032 // CHECK18-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13033 // CHECK18-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 13034 // CHECK18-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4 13035 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 13036 // CHECK18: omp.dispatch.end: 13037 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 13038 // CHECK18-NEXT: ret void 13039 // 13040 // 13041 // CHECK18-LABEL: define {{[^@]+}}@_Z3bari 13042 // CHECK18-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 13043 // CHECK18-NEXT: entry: 13044 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13045 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 13046 // CHECK18-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 13047 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13048 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4 13049 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 13050 // CHECK18-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z3fooi(i32 noundef signext [[TMP0]]) 13051 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 13052 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 13053 // CHECK18-NEXT: store i32 [[ADD]], i32* [[A]], align 4 13054 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 13055 // CHECK18-NEXT: [[CALL1:%.*]] = call noundef signext i32 @_ZN2S12r1Ei(%struct.S1* noundef nonnull align 8 dereferenceable(8) [[S]], i32 noundef signext [[TMP2]]) 13056 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 13057 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 13058 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 13059 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 13060 // CHECK18-NEXT: [[CALL3:%.*]] = call noundef signext i32 @_ZL7fstatici(i32 noundef signext [[TMP4]]) 13061 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 13062 // CHECK18-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 13063 // CHECK18-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 13064 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 13065 // CHECK18-NEXT: [[CALL5:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_i(i32 noundef signext [[TMP6]]) 13066 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 13067 // CHECK18-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 13068 // CHECK18-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 13069 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 13070 // CHECK18-NEXT: ret i32 [[TMP8]] 13071 // 13072 // 13073 // CHECK18-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 13074 // CHECK18-SAME: (%struct.S1* noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat align 2 { 13075 // CHECK18-NEXT: entry: 13076 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 13077 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13078 // CHECK18-NEXT: [[B:%.*]] = alloca i32, align 4 13079 // CHECK18-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 13080 // CHECK18-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 13081 // CHECK18-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 13082 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 13083 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 13084 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 13085 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 13086 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 13087 // CHECK18-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 13088 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13089 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 13090 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 13091 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 13092 // CHECK18-NEXT: store i32 [[ADD]], i32* [[B]], align 4 13093 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 13094 // CHECK18-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 13095 // CHECK18-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 13096 // CHECK18-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 13097 // CHECK18-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]] 13098 // CHECK18-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2 13099 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 13100 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 13101 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32* 13102 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4 13103 // CHECK18-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8 13104 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4 13105 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60 13106 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 13107 // CHECK18: omp_if.then: 13108 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 13109 // CHECK18-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]] 13110 // CHECK18-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2 13111 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 13112 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP10]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes.13 to i8*), i64 40, i1 false) 13113 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13114 // CHECK18-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to %struct.S1** 13115 // CHECK18-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP12]], align 8 13116 // CHECK18-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13117 // CHECK18-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to double** 13118 // CHECK18-NEXT: store double* [[A]], double** [[TMP14]], align 8 13119 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 13120 // CHECK18-NEXT: store i8* null, i8** [[TMP15]], align 8 13121 // CHECK18-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 13122 // CHECK18-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 13123 // CHECK18-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8 13124 // CHECK18-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 13125 // CHECK18-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 13126 // CHECK18-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8 13127 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 13128 // CHECK18-NEXT: store i8* null, i8** [[TMP20]], align 8 13129 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 13130 // CHECK18-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64* 13131 // CHECK18-NEXT: store i64 2, i64* [[TMP22]], align 8 13132 // CHECK18-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 13133 // CHECK18-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64* 13134 // CHECK18-NEXT: store i64 2, i64* [[TMP24]], align 8 13135 // CHECK18-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 13136 // CHECK18-NEXT: store i8* null, i8** [[TMP25]], align 8 13137 // CHECK18-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 13138 // CHECK18-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 13139 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP27]], align 8 13140 // CHECK18-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 13141 // CHECK18-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 13142 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8 13143 // CHECK18-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 13144 // CHECK18-NEXT: store i8* null, i8** [[TMP30]], align 8 13145 // CHECK18-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 13146 // CHECK18-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i16** 13147 // CHECK18-NEXT: store i16* [[VLA]], i16** [[TMP32]], align 8 13148 // CHECK18-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 13149 // CHECK18-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i16** 13150 // CHECK18-NEXT: store i16* [[VLA]], i16** [[TMP34]], align 8 13151 // CHECK18-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 13152 // CHECK18-NEXT: store i64 [[TMP9]], i64* [[TMP35]], align 8 13153 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 13154 // CHECK18-NEXT: store i8* null, i8** [[TMP36]], align 8 13155 // CHECK18-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13156 // CHECK18-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13157 // CHECK18-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 13158 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 13159 // CHECK18-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP37]], i8** [[TMP38]], i64* [[TMP39]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.14, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13160 // CHECK18-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 13161 // CHECK18-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 13162 // CHECK18: omp_offload.failed: 13163 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 13164 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 13165 // CHECK18: omp_offload.cont: 13166 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]] 13167 // CHECK18: omp_if.else: 13168 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 13169 // CHECK18-NEXT: br label [[OMP_IF_END]] 13170 // CHECK18: omp_if.end: 13171 // CHECK18-NEXT: [[TMP42:%.*]] = mul nsw i64 1, [[TMP2]] 13172 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP42]] 13173 // CHECK18-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 13174 // CHECK18-NEXT: [[TMP43:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 13175 // CHECK18-NEXT: [[CONV3:%.*]] = sext i16 [[TMP43]] to i32 13176 // CHECK18-NEXT: [[TMP44:%.*]] = load i32, i32* [[B]], align 4 13177 // CHECK18-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP44]] 13178 // CHECK18-NEXT: [[TMP45:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 13179 // CHECK18-NEXT: call void @llvm.stackrestore(i8* [[TMP45]]) 13180 // CHECK18-NEXT: ret i32 [[ADD4]] 13181 // 13182 // 13183 // CHECK18-LABEL: define {{[^@]+}}@_ZL7fstatici 13184 // CHECK18-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 13185 // CHECK18-NEXT: entry: 13186 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13187 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 13188 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2 13189 // CHECK18-NEXT: [[AAA:%.*]] = alloca i8, align 1 13190 // CHECK18-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 13191 // CHECK18-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 13192 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 13193 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 13194 // CHECK18-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 13195 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 13196 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 13197 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 13198 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 13199 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13200 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 13201 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 13202 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13203 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4 13204 // CHECK18-NEXT: store i16 0, i16* [[AA]], align 2 13205 // CHECK18-NEXT: store i8 0, i8* [[AAA]], align 1 13206 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 13207 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 13208 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 13209 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8 13210 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 13211 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32* 13212 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 13213 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[A_CASTED]], align 8 13214 // CHECK18-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2 13215 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 13216 // CHECK18-NEXT: store i16 [[TMP4]], i16* [[CONV2]], align 2 13217 // CHECK18-NEXT: [[TMP5:%.*]] = load i64, i64* [[AA_CASTED]], align 8 13218 // CHECK18-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1 13219 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 13220 // CHECK18-NEXT: store i8 [[TMP6]], i8* [[CONV3]], align 1 13221 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 13222 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4 13223 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50 13224 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 13225 // CHECK18: omp_if.then: 13226 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13227 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 13228 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 13229 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13230 // CHECK18-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 13231 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8 13232 // CHECK18-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 13233 // CHECK18-NEXT: store i8* null, i8** [[TMP13]], align 8 13234 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 13235 // CHECK18-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 13236 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 13237 // CHECK18-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 13238 // CHECK18-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 13239 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP17]], align 8 13240 // CHECK18-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 13241 // CHECK18-NEXT: store i8* null, i8** [[TMP18]], align 8 13242 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 13243 // CHECK18-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 13244 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8 13245 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 13246 // CHECK18-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64* 13247 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 13248 // CHECK18-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 13249 // CHECK18-NEXT: store i8* null, i8** [[TMP23]], align 8 13250 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 13251 // CHECK18-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 13252 // CHECK18-NEXT: store i64 [[TMP7]], i64* [[TMP25]], align 8 13253 // CHECK18-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 13254 // CHECK18-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 13255 // CHECK18-NEXT: store i64 [[TMP7]], i64* [[TMP27]], align 8 13256 // CHECK18-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 13257 // CHECK18-NEXT: store i8* null, i8** [[TMP28]], align 8 13258 // CHECK18-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 13259 // CHECK18-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]** 13260 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 8 13261 // CHECK18-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 13262 // CHECK18-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]** 13263 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 8 13264 // CHECK18-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 13265 // CHECK18-NEXT: store i8* null, i8** [[TMP33]], align 8 13266 // CHECK18-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13267 // CHECK18-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13268 // CHECK18-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4 13269 // CHECK18-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4 13270 // CHECK18-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 13271 // CHECK18-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_4]], align 4 13272 // CHECK18-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 13273 // CHECK18-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13274 // CHECK18-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]] 13275 // CHECK18-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 13276 // CHECK18-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 13277 // CHECK18-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 13278 // CHECK18-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 13279 // CHECK18-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 13280 // CHECK18-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 13281 // CHECK18-NEXT: [[ADD8:%.*]] = add i32 [[TMP40]], 1 13282 // CHECK18-NEXT: [[TMP41:%.*]] = zext i32 [[ADD8]] to i64 13283 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]]) 13284 // CHECK18-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13285 // CHECK18-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 13286 // CHECK18-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 13287 // CHECK18: omp_offload.failed: 13288 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 13289 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 13290 // CHECK18: omp_offload.cont: 13291 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]] 13292 // CHECK18: omp_if.else: 13293 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 13294 // CHECK18-NEXT: br label [[OMP_IF_END]] 13295 // CHECK18: omp_if.end: 13296 // CHECK18-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4 13297 // CHECK18-NEXT: ret i32 [[TMP44]] 13298 // 13299 // 13300 // CHECK18-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 13301 // CHECK18-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat { 13302 // CHECK18-NEXT: entry: 13303 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13304 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 13305 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2 13306 // CHECK18-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 13307 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 13308 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 13309 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 13310 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 13311 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 13312 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 13313 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13314 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4 13315 // CHECK18-NEXT: store i16 0, i16* [[AA]], align 2 13316 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 13317 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 13318 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 13319 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 13320 // CHECK18-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 13321 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 13322 // CHECK18-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 13323 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 13324 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 13325 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 13326 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 13327 // CHECK18: omp_if.then: 13328 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13329 // CHECK18-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 13330 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 13331 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13332 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 13333 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 13334 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 13335 // CHECK18-NEXT: store i8* null, i8** [[TMP9]], align 8 13336 // CHECK18-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 13337 // CHECK18-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 13338 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 13339 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 13340 // CHECK18-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 13341 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 13342 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 13343 // CHECK18-NEXT: store i8* null, i8** [[TMP14]], align 8 13344 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 13345 // CHECK18-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 13346 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8 13347 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 13348 // CHECK18-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 13349 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8 13350 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 13351 // CHECK18-NEXT: store i8* null, i8** [[TMP19]], align 8 13352 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13353 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13354 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 13355 // CHECK18-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13356 // CHECK18-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 13357 // CHECK18-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 13358 // CHECK18: omp_offload.failed: 13359 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 13360 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 13361 // CHECK18: omp_offload.cont: 13362 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]] 13363 // CHECK18: omp_if.else: 13364 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 13365 // CHECK18-NEXT: br label [[OMP_IF_END]] 13366 // CHECK18: omp_if.end: 13367 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 13368 // CHECK18-NEXT: ret i32 [[TMP24]] 13369 // 13370 // 13371 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 13372 // CHECK18-SAME: (%struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 13373 // CHECK18-NEXT: entry: 13374 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 13375 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 13376 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 13377 // CHECK18-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 13378 // CHECK18-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 13379 // CHECK18-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 13380 // CHECK18-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 13381 // CHECK18-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 13382 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 13383 // CHECK18-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 13384 // CHECK18-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 13385 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 13386 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 13387 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 13388 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 13389 // CHECK18-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 13390 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 13391 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32* 13392 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 13393 // CHECK18-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8 13394 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..12 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]]) 13395 // CHECK18-NEXT: ret void 13396 // 13397 // 13398 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..12 13399 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 13400 // CHECK18-NEXT: entry: 13401 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13402 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13403 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 13404 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 13405 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 13406 // CHECK18-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 13407 // CHECK18-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 13408 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13409 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 13410 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13411 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13412 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13413 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13414 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 13415 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13416 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13417 // CHECK18-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 13418 // CHECK18-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 13419 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 13420 // CHECK18-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 13421 // CHECK18-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 13422 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 13423 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 13424 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 13425 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 13426 // CHECK18-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 13427 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13428 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 13429 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13430 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13431 // CHECK18-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13432 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 13433 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13434 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13435 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 13436 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13437 // CHECK18: cond.true: 13438 // CHECK18-NEXT: br label [[COND_END:%.*]] 13439 // CHECK18: cond.false: 13440 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13441 // CHECK18-NEXT: br label [[COND_END]] 13442 // CHECK18: cond.end: 13443 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 13444 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13445 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13446 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 13447 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13448 // CHECK18: omp.inner.for.cond: 13449 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13450 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13451 // CHECK18-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 13452 // CHECK18-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13453 // CHECK18: omp.inner.for.body: 13454 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13455 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 13456 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13457 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 13458 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 13459 // CHECK18-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double 13460 // CHECK18-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00 13461 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 13462 // CHECK18-NEXT: store double [[ADD5]], double* [[A]], align 8 13463 // CHECK18-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 13464 // CHECK18-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8 13465 // CHECK18-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 13466 // CHECK18-NEXT: store double [[INC]], double* [[A6]], align 8 13467 // CHECK18-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16 13468 // CHECK18-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]] 13469 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]] 13470 // CHECK18-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 13471 // CHECK18-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2 13472 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13473 // CHECK18: omp.body.continue: 13474 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13475 // CHECK18: omp.inner.for.inc: 13476 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13477 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 13478 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 13479 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 13480 // CHECK18: omp.inner.for.end: 13481 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13482 // CHECK18: omp.loop.exit: 13483 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 13484 // CHECK18-NEXT: ret void 13485 // 13486 // 13487 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 13488 // CHECK18-SAME: (i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 13489 // CHECK18-NEXT: entry: 13490 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 13491 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 13492 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 13493 // CHECK18-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 13494 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 13495 // CHECK18-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 13496 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 13497 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 13498 // CHECK18-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 13499 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 13500 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 13501 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 13502 // CHECK18-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 13503 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 13504 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 13505 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 13506 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 13507 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 13508 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 13509 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 13510 // CHECK18-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32* 13511 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4 13512 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 13513 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 13514 // CHECK18-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32* 13515 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4 13516 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8 13517 // CHECK18-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 2 13518 // CHECK18-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 13519 // CHECK18-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2 13520 // CHECK18-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8 13521 // CHECK18-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 1 13522 // CHECK18-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 13523 // CHECK18-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1 13524 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 13525 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]]) 13526 // CHECK18-NEXT: ret void 13527 // 13528 // 13529 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..15 13530 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 13531 // CHECK18-NEXT: entry: 13532 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13533 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13534 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 13535 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 13536 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 13537 // CHECK18-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 13538 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 13539 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13540 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 13541 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13542 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 13543 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 13544 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 13545 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13546 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13547 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13548 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13549 // CHECK18-NEXT: [[I8:%.*]] = alloca i32, align 4 13550 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13551 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13552 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 13553 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 13554 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 13555 // CHECK18-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 13556 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 13557 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 13558 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 13559 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 13560 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 13561 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 13562 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4 13563 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 13564 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 13565 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4 13566 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 13567 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13568 // CHECK18-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 13569 // CHECK18-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 13570 // CHECK18-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 13571 // CHECK18-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 13572 // CHECK18-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 13573 // CHECK18-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 13574 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13575 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 13576 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13577 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 13578 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 13579 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13580 // CHECK18: omp.precond.then: 13581 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13582 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 13583 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 13584 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13585 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13586 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13587 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 13588 // CHECK18-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13589 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13590 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 13591 // CHECK18-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 13592 // CHECK18-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13593 // CHECK18: cond.true: 13594 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 13595 // CHECK18-NEXT: br label [[COND_END:%.*]] 13596 // CHECK18: cond.false: 13597 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13598 // CHECK18-NEXT: br label [[COND_END]] 13599 // CHECK18: cond.end: 13600 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 13601 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13602 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13603 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 13604 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13605 // CHECK18: omp.inner.for.cond: 13606 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13607 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13608 // CHECK18-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1 13609 // CHECK18-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]] 13610 // CHECK18-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13611 // CHECK18: omp.inner.for.body: 13612 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13613 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13614 // CHECK18-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 13615 // CHECK18-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]] 13616 // CHECK18-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4 13617 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4 13618 // CHECK18-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1 13619 // CHECK18-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 4 13620 // CHECK18-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 2 13621 // CHECK18-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32 13622 // CHECK18-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 13623 // CHECK18-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16 13624 // CHECK18-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 2 13625 // CHECK18-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 1 13626 // CHECK18-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32 13627 // CHECK18-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1 13628 // CHECK18-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8 13629 // CHECK18-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 1 13630 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 13631 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 13632 // CHECK18-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1 13633 // CHECK18-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4 13634 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13635 // CHECK18: omp.body.continue: 13636 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13637 // CHECK18: omp.inner.for.inc: 13638 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13639 // CHECK18-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1 13640 // CHECK18-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 13641 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 13642 // CHECK18: omp.inner.for.end: 13643 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13644 // CHECK18: omp.loop.exit: 13645 // CHECK18-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13646 // CHECK18-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 13647 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 13648 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 13649 // CHECK18: omp.precond.end: 13650 // CHECK18-NEXT: ret void 13651 // 13652 // 13653 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 13654 // CHECK18-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 13655 // CHECK18-NEXT: entry: 13656 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 13657 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 13658 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 13659 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 13660 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 13661 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 13662 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 13663 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 13664 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 13665 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 13666 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 13667 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 13668 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 13669 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4 13670 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8 13671 // CHECK18-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 2 13672 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 13673 // CHECK18-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 13674 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 13675 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]]) 13676 // CHECK18-NEXT: ret void 13677 // 13678 // 13679 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..18 13680 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 13681 // CHECK18-NEXT: entry: 13682 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13683 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13684 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 13685 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 13686 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 13687 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13688 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 13689 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13690 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13691 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13692 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13693 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 13694 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13695 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13696 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 13697 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 13698 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 13699 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 13700 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 13701 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 13702 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13703 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 13704 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13705 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13706 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13707 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 13708 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13709 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13710 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 13711 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13712 // CHECK18: cond.true: 13713 // CHECK18-NEXT: br label [[COND_END:%.*]] 13714 // CHECK18: cond.false: 13715 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13716 // CHECK18-NEXT: br label [[COND_END]] 13717 // CHECK18: cond.end: 13718 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 13719 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13720 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13721 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 13722 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13723 // CHECK18: omp.inner.for.cond: 13724 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13725 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13726 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 13727 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13728 // CHECK18: omp.inner.for.body: 13729 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13730 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 13731 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13732 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 13733 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 13734 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 13735 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 13736 // CHECK18-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 2 13737 // CHECK18-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32 13738 // CHECK18-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 13739 // CHECK18-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 13740 // CHECK18-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 13741 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 13742 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 13743 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1 13744 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4 13745 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13746 // CHECK18: omp.body.continue: 13747 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13748 // CHECK18: omp.inner.for.inc: 13749 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13750 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1 13751 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 13752 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 13753 // CHECK18: omp.inner.for.end: 13754 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13755 // CHECK18: omp.loop.exit: 13756 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 13757 // CHECK18-NEXT: ret void 13758 // 13759 // 13760 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 13761 // CHECK18-SAME: () #[[ATTR4]] { 13762 // CHECK18-NEXT: entry: 13763 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1) 13764 // CHECK18-NEXT: ret void 13765 // 13766 // 13767 // CHECK19-LABEL: define {{[^@]+}}@_Z3fooi 13768 // CHECK19-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 13769 // CHECK19-NEXT: entry: 13770 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13771 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 13772 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2 13773 // CHECK19-NEXT: [[B:%.*]] = alloca [10 x float], align 4 13774 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 13775 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 13776 // CHECK19-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 13777 // CHECK19-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 13778 // CHECK19-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4 13779 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13780 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13781 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 13782 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13783 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i32, align 4 13784 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 13785 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 13786 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 13787 // CHECK19-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 13788 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 13789 // CHECK19-NEXT: [[AA_CASTED4:%.*]] = alloca i32, align 4 13790 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS6:%.*]] = alloca [1 x i8*], align 4 13791 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS7:%.*]] = alloca [1 x i8*], align 4 13792 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS8:%.*]] = alloca [1 x i8*], align 4 13793 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13794 // CHECK19-NEXT: [[A_CASTED9:%.*]] = alloca i32, align 4 13795 // CHECK19-NEXT: [[AA_CASTED10:%.*]] = alloca i32, align 4 13796 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x i8*], align 4 13797 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x i8*], align 4 13798 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x i8*], align 4 13799 // CHECK19-NEXT: [[_TMP15:%.*]] = alloca i32, align 4 13800 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 13801 // CHECK19-NEXT: [[A_CASTED19:%.*]] = alloca i32, align 4 13802 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4 13803 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [10 x i8*], align 4 13804 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [10 x i8*], align 4 13805 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [10 x i8*], align 4 13806 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 4 13807 // CHECK19-NEXT: [[_TMP26:%.*]] = alloca i32, align 4 13808 // CHECK19-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 13809 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13810 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4 13811 // CHECK19-NEXT: store i16 0, i16* [[AA]], align 2 13812 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 13813 // CHECK19-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 13814 // CHECK19-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 13815 // CHECK19-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4 13816 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 13817 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4 13818 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]] 13819 // CHECK19-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8 13820 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4 13821 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 13822 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 13823 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4 13824 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13825 // CHECK19-NEXT: [[TMP7:%.*]] = load i16, i16* [[AA]], align 2 13826 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 13827 // CHECK19-NEXT: store i16 [[TMP7]], i16* [[CONV]], align 2 13828 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[AA_CASTED]], align 4 13829 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13830 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13831 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13832 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13833 // CHECK19-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4 13834 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4 13835 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13836 // CHECK19-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 13837 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[TMP14]], align 4 13838 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13839 // CHECK19-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32* 13840 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[TMP16]], align 4 13841 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 13842 // CHECK19-NEXT: store i8* null, i8** [[TMP17]], align 4 13843 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 13844 // CHECK19-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 13845 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[TMP19]], align 4 13846 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 13847 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 13848 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[TMP21]], align 4 13849 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 13850 // CHECK19-NEXT: store i8* null, i8** [[TMP22]], align 4 13851 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 13852 // CHECK19-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32* 13853 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[TMP24]], align 4 13854 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 13855 // CHECK19-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 13856 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[TMP26]], align 4 13857 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 13858 // CHECK19-NEXT: store i8* null, i8** [[TMP27]], align 4 13859 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13860 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13861 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0 13862 // CHECK19-NEXT: [[TMP31:%.*]] = load i16, i16* [[AA]], align 2 13863 // CHECK19-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 4 13864 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1 13865 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13866 // CHECK19-NEXT: store i32 [[TMP33]], i32* [[TMP32]], align 4 13867 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2 13868 // CHECK19-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13869 // CHECK19-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4 13870 // CHECK19-NEXT: [[TMP36:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i32 72, i32 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 13871 // CHECK19-NEXT: [[TMP37:%.*]] = bitcast i8* [[TMP36]] to %struct.kmp_task_t_with_privates* 13872 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 0 13873 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP38]], i32 0, i32 0 13874 // CHECK19-NEXT: [[TMP40:%.*]] = load i8*, i8** [[TMP39]], align 4 13875 // CHECK19-NEXT: [[TMP41:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8* 13876 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP40]], i8* align 4 [[TMP41]], i32 12, i1 false) 13877 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 1 13878 // CHECK19-NEXT: [[TMP43:%.*]] = bitcast i8* [[TMP40]] to %struct.anon* 13879 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 0 13880 // CHECK19-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[TMP44]] to i8* 13881 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 13882 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 1 13883 // CHECK19-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8* 13884 // CHECK19-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP28]] to i8* 13885 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP47]], i8* align 4 [[TMP48]], i32 12, i1 false) 13886 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 2 13887 // CHECK19-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8* 13888 // CHECK19-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP29]] to i8* 13889 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP50]], i8* align 4 [[TMP51]], i32 12, i1 false) 13890 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 3 13891 // CHECK19-NEXT: [[TMP53:%.*]] = load i16, i16* [[AA]], align 2 13892 // CHECK19-NEXT: store i16 [[TMP53]], i16* [[TMP52]], align 4 13893 // CHECK19-NEXT: [[TMP54:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP36]]) 13894 // CHECK19-NEXT: [[TMP55:%.*]] = load i32, i32* [[A]], align 4 13895 // CHECK19-NEXT: store i32 [[TMP55]], i32* [[A_CASTED]], align 4 13896 // CHECK19-NEXT: [[TMP56:%.*]] = load i32, i32* [[A_CASTED]], align 4 13897 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i32 [[TMP56]]) #[[ATTR3:[0-9]+]] 13898 // CHECK19-NEXT: [[TMP57:%.*]] = load i16, i16* [[AA]], align 2 13899 // CHECK19-NEXT: [[CONV5:%.*]] = bitcast i32* [[AA_CASTED4]] to i16* 13900 // CHECK19-NEXT: store i16 [[TMP57]], i16* [[CONV5]], align 2 13901 // CHECK19-NEXT: [[TMP58:%.*]] = load i32, i32* [[AA_CASTED4]], align 4 13902 // CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0 13903 // CHECK19-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32* 13904 // CHECK19-NEXT: store i32 [[TMP58]], i32* [[TMP60]], align 4 13905 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0 13906 // CHECK19-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32* 13907 // CHECK19-NEXT: store i32 [[TMP58]], i32* [[TMP62]], align 4 13908 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS8]], i32 0, i32 0 13909 // CHECK19-NEXT: store i8* null, i8** [[TMP63]], align 4 13910 // CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0 13911 // CHECK19-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0 13912 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 13913 // CHECK19-NEXT: [[TMP66:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13914 // CHECK19-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0 13915 // CHECK19-NEXT: br i1 [[TMP67]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 13916 // CHECK19: omp_offload.failed: 13917 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i32 [[TMP58]]) #[[ATTR3]] 13918 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 13919 // CHECK19: omp_offload.cont: 13920 // CHECK19-NEXT: [[TMP68:%.*]] = load i32, i32* [[A]], align 4 13921 // CHECK19-NEXT: store i32 [[TMP68]], i32* [[A_CASTED9]], align 4 13922 // CHECK19-NEXT: [[TMP69:%.*]] = load i32, i32* [[A_CASTED9]], align 4 13923 // CHECK19-NEXT: [[TMP70:%.*]] = load i16, i16* [[AA]], align 2 13924 // CHECK19-NEXT: [[CONV11:%.*]] = bitcast i32* [[AA_CASTED10]] to i16* 13925 // CHECK19-NEXT: store i16 [[TMP70]], i16* [[CONV11]], align 2 13926 // CHECK19-NEXT: [[TMP71:%.*]] = load i32, i32* [[AA_CASTED10]], align 4 13927 // CHECK19-NEXT: [[TMP72:%.*]] = load i32, i32* [[N_ADDR]], align 4 13928 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP72]], 10 13929 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 13930 // CHECK19: omp_if.then: 13931 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 13932 // CHECK19-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32* 13933 // CHECK19-NEXT: store i32 [[TMP69]], i32* [[TMP74]], align 4 13934 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 13935 // CHECK19-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 13936 // CHECK19-NEXT: store i32 [[TMP69]], i32* [[TMP76]], align 4 13937 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 0 13938 // CHECK19-NEXT: store i8* null, i8** [[TMP77]], align 4 13939 // CHECK19-NEXT: [[TMP78:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1 13940 // CHECK19-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 13941 // CHECK19-NEXT: store i32 [[TMP71]], i32* [[TMP79]], align 4 13942 // CHECK19-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1 13943 // CHECK19-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32* 13944 // CHECK19-NEXT: store i32 [[TMP71]], i32* [[TMP81]], align 4 13945 // CHECK19-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 1 13946 // CHECK19-NEXT: store i8* null, i8** [[TMP82]], align 4 13947 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 13948 // CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 13949 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 13950 // CHECK19-NEXT: [[TMP85:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP83]], i8** [[TMP84]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13951 // CHECK19-NEXT: [[TMP86:%.*]] = icmp ne i32 [[TMP85]], 0 13952 // CHECK19-NEXT: br i1 [[TMP86]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 13953 // CHECK19: omp_offload.failed16: 13954 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]] 13955 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT17]] 13956 // CHECK19: omp_offload.cont17: 13957 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]] 13958 // CHECK19: omp_if.else: 13959 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]] 13960 // CHECK19-NEXT: br label [[OMP_IF_END]] 13961 // CHECK19: omp_if.end: 13962 // CHECK19-NEXT: [[TMP87:%.*]] = load i32, i32* [[N_ADDR]], align 4 13963 // CHECK19-NEXT: store i32 [[TMP87]], i32* [[DOTCAPTURE_EXPR_18]], align 4 13964 // CHECK19-NEXT: [[TMP88:%.*]] = load i32, i32* [[A]], align 4 13965 // CHECK19-NEXT: store i32 [[TMP88]], i32* [[A_CASTED19]], align 4 13966 // CHECK19-NEXT: [[TMP89:%.*]] = load i32, i32* [[A_CASTED19]], align 4 13967 // CHECK19-NEXT: [[TMP90:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4 13968 // CHECK19-NEXT: store i32 [[TMP90]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4 13969 // CHECK19-NEXT: [[TMP91:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4 13970 // CHECK19-NEXT: [[TMP92:%.*]] = load i32, i32* [[N_ADDR]], align 4 13971 // CHECK19-NEXT: [[CMP21:%.*]] = icmp sgt i32 [[TMP92]], 20 13972 // CHECK19-NEXT: br i1 [[CMP21]], label [[OMP_IF_THEN22:%.*]], label [[OMP_IF_ELSE29:%.*]] 13973 // CHECK19: omp_if.then22: 13974 // CHECK19-NEXT: [[TMP93:%.*]] = mul nuw i32 [[TMP1]], 4 13975 // CHECK19-NEXT: [[TMP94:%.*]] = sext i32 [[TMP93]] to i64 13976 // CHECK19-NEXT: [[TMP95:%.*]] = mul nuw i32 5, [[TMP3]] 13977 // CHECK19-NEXT: [[TMP96:%.*]] = mul nuw i32 [[TMP95]], 8 13978 // CHECK19-NEXT: [[TMP97:%.*]] = sext i32 [[TMP96]] to i64 13979 // CHECK19-NEXT: [[TMP98:%.*]] = bitcast [10 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 13980 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP98]], i8* align 4 bitcast ([10 x i64]* @.offload_sizes.10 to i8*), i32 80, i1 false) 13981 // CHECK19-NEXT: [[TMP99:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0 13982 // CHECK19-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to i32* 13983 // CHECK19-NEXT: store i32 [[TMP89]], i32* [[TMP100]], align 4 13984 // CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0 13985 // CHECK19-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i32* 13986 // CHECK19-NEXT: store i32 [[TMP89]], i32* [[TMP102]], align 4 13987 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0 13988 // CHECK19-NEXT: store i8* null, i8** [[TMP103]], align 4 13989 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1 13990 // CHECK19-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]** 13991 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 4 13992 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1 13993 // CHECK19-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]** 13994 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 4 13995 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1 13996 // CHECK19-NEXT: store i8* null, i8** [[TMP108]], align 4 13997 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2 13998 // CHECK19-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 13999 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP110]], align 4 14000 // CHECK19-NEXT: [[TMP111:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2 14001 // CHECK19-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 14002 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP112]], align 4 14003 // CHECK19-NEXT: [[TMP113:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 2 14004 // CHECK19-NEXT: store i8* null, i8** [[TMP113]], align 4 14005 // CHECK19-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3 14006 // CHECK19-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to float** 14007 // CHECK19-NEXT: store float* [[VLA]], float** [[TMP115]], align 4 14008 // CHECK19-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3 14009 // CHECK19-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float** 14010 // CHECK19-NEXT: store float* [[VLA]], float** [[TMP117]], align 4 14011 // CHECK19-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 14012 // CHECK19-NEXT: store i64 [[TMP94]], i64* [[TMP118]], align 4 14013 // CHECK19-NEXT: [[TMP119:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 3 14014 // CHECK19-NEXT: store i8* null, i8** [[TMP119]], align 4 14015 // CHECK19-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 4 14016 // CHECK19-NEXT: [[TMP121:%.*]] = bitcast i8** [[TMP120]] to [5 x [10 x double]]** 14017 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP121]], align 4 14018 // CHECK19-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 4 14019 // CHECK19-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]** 14020 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 4 14021 // CHECK19-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 4 14022 // CHECK19-NEXT: store i8* null, i8** [[TMP124]], align 4 14023 // CHECK19-NEXT: [[TMP125:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 5 14024 // CHECK19-NEXT: [[TMP126:%.*]] = bitcast i8** [[TMP125]] to i32* 14025 // CHECK19-NEXT: store i32 5, i32* [[TMP126]], align 4 14026 // CHECK19-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 5 14027 // CHECK19-NEXT: [[TMP128:%.*]] = bitcast i8** [[TMP127]] to i32* 14028 // CHECK19-NEXT: store i32 5, i32* [[TMP128]], align 4 14029 // CHECK19-NEXT: [[TMP129:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 5 14030 // CHECK19-NEXT: store i8* null, i8** [[TMP129]], align 4 14031 // CHECK19-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 6 14032 // CHECK19-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i32* 14033 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP131]], align 4 14034 // CHECK19-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 6 14035 // CHECK19-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i32* 14036 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP133]], align 4 14037 // CHECK19-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 6 14038 // CHECK19-NEXT: store i8* null, i8** [[TMP134]], align 4 14039 // CHECK19-NEXT: [[TMP135:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 7 14040 // CHECK19-NEXT: [[TMP136:%.*]] = bitcast i8** [[TMP135]] to double** 14041 // CHECK19-NEXT: store double* [[VLA1]], double** [[TMP136]], align 4 14042 // CHECK19-NEXT: [[TMP137:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 7 14043 // CHECK19-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to double** 14044 // CHECK19-NEXT: store double* [[VLA1]], double** [[TMP138]], align 4 14045 // CHECK19-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 14046 // CHECK19-NEXT: store i64 [[TMP97]], i64* [[TMP139]], align 4 14047 // CHECK19-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 7 14048 // CHECK19-NEXT: store i8* null, i8** [[TMP140]], align 4 14049 // CHECK19-NEXT: [[TMP141:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 8 14050 // CHECK19-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to %struct.TT** 14051 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP142]], align 4 14052 // CHECK19-NEXT: [[TMP143:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 8 14053 // CHECK19-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to %struct.TT** 14054 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP144]], align 4 14055 // CHECK19-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 8 14056 // CHECK19-NEXT: store i8* null, i8** [[TMP145]], align 4 14057 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 9 14058 // CHECK19-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 14059 // CHECK19-NEXT: store i32 [[TMP91]], i32* [[TMP147]], align 4 14060 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 9 14061 // CHECK19-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 14062 // CHECK19-NEXT: store i32 [[TMP91]], i32* [[TMP149]], align 4 14063 // CHECK19-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 9 14064 // CHECK19-NEXT: store i8* null, i8** [[TMP150]], align 4 14065 // CHECK19-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0 14066 // CHECK19-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0 14067 // CHECK19-NEXT: [[TMP153:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 14068 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 14069 // CHECK19-NEXT: [[TMP154:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP151]], i8** [[TMP152]], i64* [[TMP153]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14070 // CHECK19-NEXT: [[TMP155:%.*]] = icmp ne i32 [[TMP154]], 0 14071 // CHECK19-NEXT: br i1 [[TMP155]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 14072 // CHECK19: omp_offload.failed27: 14073 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]] 14074 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT28]] 14075 // CHECK19: omp_offload.cont28: 14076 // CHECK19-NEXT: br label [[OMP_IF_END30:%.*]] 14077 // CHECK19: omp_if.else29: 14078 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]] 14079 // CHECK19-NEXT: br label [[OMP_IF_END30]] 14080 // CHECK19: omp_if.end30: 14081 // CHECK19-NEXT: [[TMP156:%.*]] = load i32, i32* [[A]], align 4 14082 // CHECK19-NEXT: [[TMP157:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 14083 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP157]]) 14084 // CHECK19-NEXT: ret i32 [[TMP156]] 14085 // 14086 // 14087 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 14088 // CHECK19-SAME: (i32 noundef [[AA:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] { 14089 // CHECK19-NEXT: entry: 14090 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 14091 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14092 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 14093 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 14094 // CHECK19-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 14095 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 14096 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14097 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 14098 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 14099 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14100 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 14101 // CHECK19-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 14102 // CHECK19-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 14103 // CHECK19-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 14104 // CHECK19-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 14105 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 14106 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]]) 14107 // CHECK19-NEXT: ret void 14108 // 14109 // 14110 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 14111 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 14112 // CHECK19-NEXT: entry: 14113 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14114 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14115 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 14116 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14117 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14118 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14119 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14120 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14121 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14122 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14123 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14124 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14125 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 14126 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 14127 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14128 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14129 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14130 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14131 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14132 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 14133 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14134 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14135 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 14136 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14137 // CHECK19: cond.true: 14138 // CHECK19-NEXT: br label [[COND_END:%.*]] 14139 // CHECK19: cond.false: 14140 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14141 // CHECK19-NEXT: br label [[COND_END]] 14142 // CHECK19: cond.end: 14143 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 14144 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14145 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14146 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 14147 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14148 // CHECK19: omp.inner.for.cond: 14149 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14150 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14151 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 14152 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14153 // CHECK19: omp.inner.for.body: 14154 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14155 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 14156 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14157 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 14158 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14159 // CHECK19: omp.body.continue: 14160 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14161 // CHECK19: omp.inner.for.inc: 14162 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14163 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 14164 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 14165 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14166 // CHECK19: omp.inner.for.end: 14167 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14168 // CHECK19: omp.loop.exit: 14169 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 14170 // CHECK19-NEXT: ret void 14171 // 14172 // 14173 // CHECK19-LABEL: define {{[^@]+}}@.omp_task_privates_map. 14174 // CHECK19-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i16** noalias noundef [[TMP1:%.*]], [3 x i8*]** noalias noundef [[TMP2:%.*]], [3 x i8*]** noalias noundef [[TMP3:%.*]], [3 x i64]** noalias noundef [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] { 14175 // CHECK19-NEXT: entry: 14176 // CHECK19-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 4 14177 // CHECK19-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 4 14178 // CHECK19-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 4 14179 // CHECK19-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 4 14180 // CHECK19-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 4 14181 // CHECK19-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 4 14182 // CHECK19-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 4 14183 // CHECK19-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 4 14184 // CHECK19-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 4 14185 // CHECK19-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 4 14186 // CHECK19-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 4 14187 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0 14188 // CHECK19-NEXT: [[TMP7:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 4 14189 // CHECK19-NEXT: store [3 x i64]* [[TMP6]], [3 x i64]** [[TMP7]], align 4 14190 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1 14191 // CHECK19-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 4 14192 // CHECK19-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 4 14193 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2 14194 // CHECK19-NEXT: [[TMP11:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 4 14195 // CHECK19-NEXT: store [3 x i8*]* [[TMP10]], [3 x i8*]** [[TMP11]], align 4 14196 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3 14197 // CHECK19-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 4 14198 // CHECK19-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 4 14199 // CHECK19-NEXT: ret void 14200 // 14201 // 14202 // CHECK19-LABEL: define {{[^@]+}}@.omp_task_entry. 14203 // CHECK19-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] { 14204 // CHECK19-NEXT: entry: 14205 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 14206 // CHECK19-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4 14207 // CHECK19-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4 14208 // CHECK19-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4 14209 // CHECK19-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4 14210 // CHECK19-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 4 14211 // CHECK19-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 4 14212 // CHECK19-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 4 14213 // CHECK19-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 4 14214 // CHECK19-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 4 14215 // CHECK19-NEXT: [[AA_CASTED_I:%.*]] = alloca i32, align 4 14216 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i32, align 4 14217 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED4_I:%.*]] = alloca i32, align 4 14218 // CHECK19-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 14219 // CHECK19-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4 14220 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 14221 // CHECK19-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 14222 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 14223 // CHECK19-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 14224 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 14225 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 14226 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 14227 // CHECK19-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 14228 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 14229 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1 14230 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 14231 // CHECK19-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 14232 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]]) 14233 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]]) 14234 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]]) 14235 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 14236 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22 14237 // CHECK19-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22 14238 // CHECK19-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 14239 // CHECK19-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 14240 // CHECK19-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22 14241 // CHECK19-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 14242 // CHECK19-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 14243 // CHECK19-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 14244 // CHECK19-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 14245 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* 14246 // CHECK19-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]] 14247 // CHECK19-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 4, !noalias !22 14248 // CHECK19-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 4, !noalias !22 14249 // CHECK19-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 4, !noalias !22 14250 // CHECK19-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 4, !noalias !22 14251 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i32 0, i32 0 14252 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i32 0, i32 0 14253 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i32 0, i32 0 14254 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1 14255 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2 14256 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4 14257 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4 14258 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]] 14259 // CHECK19-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]] 14260 // CHECK19-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 14261 // CHECK19-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 14262 // CHECK19: omp_offload.failed.i: 14263 // CHECK19-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2 14264 // CHECK19-NEXT: [[CONV_I:%.*]] = bitcast i32* [[AA_CASTED_I]] to i16* 14265 // CHECK19-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !22 14266 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[AA_CASTED_I]], align 4, !noalias !22 14267 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4 14268 // CHECK19-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22 14269 // CHECK19-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22 14270 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4 14271 // CHECK19-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22 14272 // CHECK19-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22 14273 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i32 [[TMP30]], i32 [[TMP32]], i32 [[TMP34]]) #[[ATTR3]] 14274 // CHECK19-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 14275 // CHECK19: .omp_outlined..1.exit: 14276 // CHECK19-NEXT: ret i32 0 14277 // 14278 // 14279 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107 14280 // CHECK19-SAME: (i32 noundef [[A:%.*]]) #[[ATTR2]] { 14281 // CHECK19-NEXT: entry: 14282 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 14283 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 14284 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 14285 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 14286 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 14287 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 14288 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 14289 // CHECK19-NEXT: ret void 14290 // 14291 // 14292 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2 14293 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR2]] { 14294 // CHECK19-NEXT: entry: 14295 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14296 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14297 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 14298 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14299 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14300 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14301 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14302 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14303 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14304 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14305 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14306 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14307 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 14308 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14309 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14310 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14311 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14312 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14313 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 14314 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14315 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14316 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 14317 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14318 // CHECK19: cond.true: 14319 // CHECK19-NEXT: br label [[COND_END:%.*]] 14320 // CHECK19: cond.false: 14321 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14322 // CHECK19-NEXT: br label [[COND_END]] 14323 // CHECK19: cond.end: 14324 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 14325 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14326 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14327 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 14328 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14329 // CHECK19: omp.inner.for.cond: 14330 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14331 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14332 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 14333 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14334 // CHECK19: omp.inner.for.body: 14335 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14336 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 14337 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14338 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 14339 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 14340 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 14341 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 14342 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14343 // CHECK19: omp.body.continue: 14344 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14345 // CHECK19: omp.inner.for.inc: 14346 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14347 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 14348 // CHECK19-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 14349 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14350 // CHECK19: omp.inner.for.end: 14351 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14352 // CHECK19: omp.loop.exit: 14353 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 14354 // CHECK19-NEXT: ret void 14355 // 14356 // 14357 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 14358 // CHECK19-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR2]] { 14359 // CHECK19-NEXT: entry: 14360 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 14361 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 14362 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 14363 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 14364 // CHECK19-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 14365 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 14366 // CHECK19-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 14367 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4 14368 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 14369 // CHECK19-NEXT: ret void 14370 // 14371 // 14372 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3 14373 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 14374 // CHECK19-NEXT: entry: 14375 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14376 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14377 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 14378 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14379 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14380 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14381 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14382 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14383 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14384 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14385 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14386 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14387 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 14388 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 14389 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14390 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14391 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14392 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14393 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14394 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 14395 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14396 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14397 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 14398 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14399 // CHECK19: cond.true: 14400 // CHECK19-NEXT: br label [[COND_END:%.*]] 14401 // CHECK19: cond.false: 14402 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14403 // CHECK19-NEXT: br label [[COND_END]] 14404 // CHECK19: cond.end: 14405 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 14406 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14407 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14408 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 14409 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14410 // CHECK19: omp.inner.for.cond: 14411 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14412 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14413 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 14414 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14415 // CHECK19: omp.inner.for.body: 14416 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14417 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 14418 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14419 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 14420 // CHECK19-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 14421 // CHECK19-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 14422 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 14423 // CHECK19-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 14424 // CHECK19-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 14425 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14426 // CHECK19: omp.body.continue: 14427 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14428 // CHECK19: omp.inner.for.inc: 14429 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14430 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 14431 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 14432 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14433 // CHECK19: omp.inner.for.end: 14434 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14435 // CHECK19: omp.loop.exit: 14436 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 14437 // CHECK19-NEXT: ret void 14438 // 14439 // 14440 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 14441 // CHECK19-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 14442 // CHECK19-NEXT: entry: 14443 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 14444 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 14445 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 14446 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 14447 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 14448 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 14449 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 14450 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 14451 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 14452 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 14453 // CHECK19-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 2 14454 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 14455 // CHECK19-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 14456 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 14457 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]]) 14458 // CHECK19-NEXT: ret void 14459 // 14460 // 14461 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6 14462 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 14463 // CHECK19-NEXT: entry: 14464 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14465 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14466 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 14467 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 14468 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14469 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14470 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14471 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14472 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14473 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14474 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14475 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14476 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14477 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 14478 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 14479 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 14480 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14481 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14482 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14483 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14484 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14485 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 14486 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14487 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14488 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 14489 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14490 // CHECK19: cond.true: 14491 // CHECK19-NEXT: br label [[COND_END:%.*]] 14492 // CHECK19: cond.false: 14493 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14494 // CHECK19-NEXT: br label [[COND_END]] 14495 // CHECK19: cond.end: 14496 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 14497 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14498 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14499 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 14500 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14501 // CHECK19: omp.inner.for.cond: 14502 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14503 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14504 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 14505 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14506 // CHECK19: omp.inner.for.body: 14507 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14508 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 14509 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14510 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 14511 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 14512 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 14513 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 14514 // CHECK19-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 2 14515 // CHECK19-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32 14516 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 14517 // CHECK19-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 14518 // CHECK19-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 14519 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14520 // CHECK19: omp.body.continue: 14521 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14522 // CHECK19: omp.inner.for.inc: 14523 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14524 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 14525 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 14526 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14527 // CHECK19: omp.inner.for.end: 14528 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14529 // CHECK19: omp.loop.exit: 14530 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 14531 // CHECK19-NEXT: ret void 14532 // 14533 // 14534 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 14535 // CHECK19-SAME: (i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14536 // CHECK19-NEXT: entry: 14537 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 14538 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 14539 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14540 // CHECK19-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 14541 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 14542 // CHECK19-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 14543 // CHECK19-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 14544 // CHECK19-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 14545 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 14546 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14547 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 14548 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14549 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 14550 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 14551 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 14552 // CHECK19-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 14553 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 14554 // CHECK19-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 14555 // CHECK19-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 14556 // CHECK19-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 14557 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 14558 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14559 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 14560 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 14561 // CHECK19-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 14562 // CHECK19-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 14563 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 14564 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 14565 // CHECK19-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 14566 // CHECK19-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 14567 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 14568 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4 14569 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4 14570 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14571 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14572 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14573 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]]) 14574 // CHECK19-NEXT: ret void 14575 // 14576 // 14577 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..9 14578 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14579 // CHECK19-NEXT: entry: 14580 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14581 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14582 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 14583 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 14584 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14585 // CHECK19-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 14586 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 14587 // CHECK19-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 14588 // CHECK19-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 14589 // CHECK19-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 14590 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 14591 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14592 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14593 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14594 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14595 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14596 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14597 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14598 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14599 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14600 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14601 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 14602 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 14603 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 14604 // CHECK19-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 14605 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 14606 // CHECK19-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 14607 // CHECK19-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 14608 // CHECK19-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 14609 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 14610 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14611 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 14612 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 14613 // CHECK19-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 14614 // CHECK19-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 14615 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 14616 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 14617 // CHECK19-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 14618 // CHECK19-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 14619 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14620 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14621 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14622 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14623 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14624 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14625 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 14626 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 14627 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14628 // CHECK19: omp.dispatch.cond: 14629 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14630 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 14631 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14632 // CHECK19: cond.true: 14633 // CHECK19-NEXT: br label [[COND_END:%.*]] 14634 // CHECK19: cond.false: 14635 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14636 // CHECK19-NEXT: br label [[COND_END]] 14637 // CHECK19: cond.end: 14638 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 14639 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14640 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14641 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 14642 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14643 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14644 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 14645 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14646 // CHECK19: omp.dispatch.body: 14647 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14648 // CHECK19: omp.inner.for.cond: 14649 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 14650 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 14651 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 14652 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14653 // CHECK19: omp.inner.for.body: 14654 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 14655 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 14656 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14657 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23 14658 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !23 14659 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 14660 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !23 14661 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2 14662 // CHECK19-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !23 14663 // CHECK19-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 14664 // CHECK19-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00 14665 // CHECK19-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float 14666 // CHECK19-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !23 14667 // CHECK19-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3 14668 // CHECK19-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !23 14669 // CHECK19-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double 14670 // CHECK19-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00 14671 // CHECK19-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 14672 // CHECK19-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !23 14673 // CHECK19-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1 14674 // CHECK19-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2 14675 // CHECK19-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !23 14676 // CHECK19-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00 14677 // CHECK19-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !23 14678 // CHECK19-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]] 14679 // CHECK19-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]] 14680 // CHECK19-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3 14681 // CHECK19-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !23 14682 // CHECK19-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00 14683 // CHECK19-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !23 14684 // CHECK19-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 14685 // CHECK19-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !23 14686 // CHECK19-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1 14687 // CHECK19-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !23 14688 // CHECK19-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 14689 // CHECK19-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !23 14690 // CHECK19-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32 14691 // CHECK19-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1 14692 // CHECK19-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8 14693 // CHECK19-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !23 14694 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14695 // CHECK19: omp.body.continue: 14696 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14697 // CHECK19: omp.inner.for.inc: 14698 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 14699 // CHECK19-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1 14700 // CHECK19-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 14701 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 14702 // CHECK19: omp.inner.for.end: 14703 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14704 // CHECK19: omp.dispatch.inc: 14705 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14706 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14707 // CHECK19-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 14708 // CHECK19-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4 14709 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14710 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14711 // CHECK19-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 14712 // CHECK19-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4 14713 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 14714 // CHECK19: omp.dispatch.end: 14715 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 14716 // CHECK19-NEXT: ret void 14717 // 14718 // 14719 // CHECK19-LABEL: define {{[^@]+}}@_Z3bari 14720 // CHECK19-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 14721 // CHECK19-NEXT: entry: 14722 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14723 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 14724 // CHECK19-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 14725 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 14726 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4 14727 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 14728 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooi(i32 noundef [[TMP0]]) 14729 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 14730 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 14731 // CHECK19-NEXT: store i32 [[ADD]], i32* [[A]], align 4 14732 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 14733 // CHECK19-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZN2S12r1Ei(%struct.S1* noundef nonnull align 4 dereferenceable(8) [[S]], i32 noundef [[TMP2]]) 14734 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 14735 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 14736 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 14737 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 14738 // CHECK19-NEXT: [[CALL3:%.*]] = call noundef i32 @_ZL7fstatici(i32 noundef [[TMP4]]) 14739 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 14740 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 14741 // CHECK19-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 14742 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 14743 // CHECK19-NEXT: [[CALL5:%.*]] = call noundef i32 @_Z9ftemplateIiET_i(i32 noundef [[TMP6]]) 14744 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 14745 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 14746 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 14747 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 14748 // CHECK19-NEXT: ret i32 [[TMP8]] 14749 // 14750 // 14751 // CHECK19-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 14752 // CHECK19-SAME: (%struct.S1* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[N:%.*]]) #[[ATTR0]] comdat align 2 { 14753 // CHECK19-NEXT: entry: 14754 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 14755 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14756 // CHECK19-NEXT: [[B:%.*]] = alloca i32, align 4 14757 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 14758 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 14759 // CHECK19-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 14760 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 14761 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 14762 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 14763 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 14764 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14765 // CHECK19-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 14766 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 14767 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 14768 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 14769 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 14770 // CHECK19-NEXT: store i32 [[ADD]], i32* [[B]], align 4 14771 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 14772 // CHECK19-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 14773 // CHECK19-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 14774 // CHECK19-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]] 14775 // CHECK19-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2 14776 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 14777 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4 14778 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 14779 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 14780 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 14781 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60 14782 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 14783 // CHECK19: omp_if.then: 14784 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 14785 // CHECK19-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]] 14786 // CHECK19-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2 14787 // CHECK19-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 14788 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 14789 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes.13 to i8*), i32 40, i1 false) 14790 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 14791 // CHECK19-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to %struct.S1** 14792 // CHECK19-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP12]], align 4 14793 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 14794 // CHECK19-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to double** 14795 // CHECK19-NEXT: store double* [[A]], double** [[TMP14]], align 4 14796 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 14797 // CHECK19-NEXT: store i8* null, i8** [[TMP15]], align 4 14798 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 14799 // CHECK19-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 14800 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4 14801 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 14802 // CHECK19-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 14803 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4 14804 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 14805 // CHECK19-NEXT: store i8* null, i8** [[TMP20]], align 4 14806 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 14807 // CHECK19-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32* 14808 // CHECK19-NEXT: store i32 2, i32* [[TMP22]], align 4 14809 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 14810 // CHECK19-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32* 14811 // CHECK19-NEXT: store i32 2, i32* [[TMP24]], align 4 14812 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 14813 // CHECK19-NEXT: store i8* null, i8** [[TMP25]], align 4 14814 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 14815 // CHECK19-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 14816 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP27]], align 4 14817 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 14818 // CHECK19-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32* 14819 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4 14820 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 14821 // CHECK19-NEXT: store i8* null, i8** [[TMP30]], align 4 14822 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 14823 // CHECK19-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i16** 14824 // CHECK19-NEXT: store i16* [[VLA]], i16** [[TMP32]], align 4 14825 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 14826 // CHECK19-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i16** 14827 // CHECK19-NEXT: store i16* [[VLA]], i16** [[TMP34]], align 4 14828 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 14829 // CHECK19-NEXT: store i64 [[TMP9]], i64* [[TMP35]], align 4 14830 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 14831 // CHECK19-NEXT: store i8* null, i8** [[TMP36]], align 4 14832 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 14833 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 14834 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 14835 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 14836 // CHECK19-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP37]], i8** [[TMP38]], i64* [[TMP39]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.14, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14837 // CHECK19-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 14838 // CHECK19-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 14839 // CHECK19: omp_offload.failed: 14840 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 14841 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 14842 // CHECK19: omp_offload.cont: 14843 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]] 14844 // CHECK19: omp_if.else: 14845 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 14846 // CHECK19-NEXT: br label [[OMP_IF_END]] 14847 // CHECK19: omp_if.end: 14848 // CHECK19-NEXT: [[TMP42:%.*]] = mul nsw i32 1, [[TMP1]] 14849 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP42]] 14850 // CHECK19-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 14851 // CHECK19-NEXT: [[TMP43:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 14852 // CHECK19-NEXT: [[CONV:%.*]] = sext i16 [[TMP43]] to i32 14853 // CHECK19-NEXT: [[TMP44:%.*]] = load i32, i32* [[B]], align 4 14854 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP44]] 14855 // CHECK19-NEXT: [[TMP45:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 14856 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP45]]) 14857 // CHECK19-NEXT: ret i32 [[ADD3]] 14858 // 14859 // 14860 // CHECK19-LABEL: define {{[^@]+}}@_ZL7fstatici 14861 // CHECK19-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 14862 // CHECK19-NEXT: entry: 14863 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14864 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 14865 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2 14866 // CHECK19-NEXT: [[AAA:%.*]] = alloca i8, align 1 14867 // CHECK19-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 14868 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14869 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 14870 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 14871 // CHECK19-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 14872 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 14873 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 14874 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 14875 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14876 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14877 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 14878 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 14879 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 14880 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4 14881 // CHECK19-NEXT: store i16 0, i16* [[AA]], align 2 14882 // CHECK19-NEXT: store i8 0, i8* [[AAA]], align 1 14883 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 14884 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4 14885 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4 14886 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 14887 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[A_CASTED]], align 4 14888 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_CASTED]], align 4 14889 // CHECK19-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2 14890 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 14891 // CHECK19-NEXT: store i16 [[TMP4]], i16* [[CONV]], align 2 14892 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[AA_CASTED]], align 4 14893 // CHECK19-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1 14894 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 14895 // CHECK19-NEXT: store i8 [[TMP6]], i8* [[CONV1]], align 1 14896 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 14897 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4 14898 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50 14899 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 14900 // CHECK19: omp_if.then: 14901 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 14902 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 14903 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4 14904 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 14905 // CHECK19-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 14906 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP12]], align 4 14907 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 14908 // CHECK19-NEXT: store i8* null, i8** [[TMP13]], align 4 14909 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 14910 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 14911 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 14912 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 14913 // CHECK19-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 14914 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP17]], align 4 14915 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 14916 // CHECK19-NEXT: store i8* null, i8** [[TMP18]], align 4 14917 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 14918 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 14919 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4 14920 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 14921 // CHECK19-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32* 14922 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP22]], align 4 14923 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 14924 // CHECK19-NEXT: store i8* null, i8** [[TMP23]], align 4 14925 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 14926 // CHECK19-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 14927 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[TMP25]], align 4 14928 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 14929 // CHECK19-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 14930 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[TMP27]], align 4 14931 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 14932 // CHECK19-NEXT: store i8* null, i8** [[TMP28]], align 4 14933 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 14934 // CHECK19-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]** 14935 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 4 14936 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 14937 // CHECK19-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]** 14938 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 4 14939 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 14940 // CHECK19-NEXT: store i8* null, i8** [[TMP33]], align 4 14941 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 14942 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 14943 // CHECK19-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4 14944 // CHECK19-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4 14945 // CHECK19-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 14946 // CHECK19-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_2]], align 4 14947 // CHECK19-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 14948 // CHECK19-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14949 // CHECK19-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]] 14950 // CHECK19-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 14951 // CHECK19-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 14952 // CHECK19-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 14953 // CHECK19-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 14954 // CHECK19-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 14955 // CHECK19-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 14956 // CHECK19-NEXT: [[ADD6:%.*]] = add i32 [[TMP40]], 1 14957 // CHECK19-NEXT: [[TMP41:%.*]] = zext i32 [[ADD6]] to i64 14958 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]]) 14959 // CHECK19-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14960 // CHECK19-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 14961 // CHECK19-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 14962 // CHECK19: omp_offload.failed: 14963 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 14964 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 14965 // CHECK19: omp_offload.cont: 14966 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]] 14967 // CHECK19: omp_if.else: 14968 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 14969 // CHECK19-NEXT: br label [[OMP_IF_END]] 14970 // CHECK19: omp_if.end: 14971 // CHECK19-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4 14972 // CHECK19-NEXT: ret i32 [[TMP44]] 14973 // 14974 // 14975 // CHECK19-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 14976 // CHECK19-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] comdat { 14977 // CHECK19-NEXT: entry: 14978 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14979 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 14980 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2 14981 // CHECK19-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 14982 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 14983 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 14984 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 14985 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 14986 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 14987 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14988 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 14989 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4 14990 // CHECK19-NEXT: store i16 0, i16* [[AA]], align 2 14991 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 14992 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 14993 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 14994 // CHECK19-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 14995 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 14996 // CHECK19-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 14997 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 14998 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 14999 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 15000 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 15001 // CHECK19: omp_if.then: 15002 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 15003 // CHECK19-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 15004 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 15005 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 15006 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 15007 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 15008 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 15009 // CHECK19-NEXT: store i8* null, i8** [[TMP9]], align 4 15010 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 15011 // CHECK19-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 15012 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 15013 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 15014 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 15015 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 15016 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 15017 // CHECK19-NEXT: store i8* null, i8** [[TMP14]], align 4 15018 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 15019 // CHECK19-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 15020 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4 15021 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 15022 // CHECK19-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 15023 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4 15024 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 15025 // CHECK19-NEXT: store i8* null, i8** [[TMP19]], align 4 15026 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 15027 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 15028 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 15029 // CHECK19-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 15030 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 15031 // CHECK19-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 15032 // CHECK19: omp_offload.failed: 15033 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 15034 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 15035 // CHECK19: omp_offload.cont: 15036 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]] 15037 // CHECK19: omp_if.else: 15038 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 15039 // CHECK19-NEXT: br label [[OMP_IF_END]] 15040 // CHECK19: omp_if.end: 15041 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 15042 // CHECK19-NEXT: ret i32 [[TMP24]] 15043 // 15044 // 15045 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 15046 // CHECK19-SAME: (%struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 15047 // CHECK19-NEXT: entry: 15048 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 15049 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 15050 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15051 // CHECK19-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 15052 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 15053 // CHECK19-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 15054 // CHECK19-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 15055 // CHECK19-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 15056 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15057 // CHECK19-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 15058 // CHECK19-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 15059 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 15060 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15061 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 15062 // CHECK19-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 15063 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4 15064 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 15065 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 15066 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..12 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]]) 15067 // CHECK19-NEXT: ret void 15068 // 15069 // 15070 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..12 15071 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 15072 // CHECK19-NEXT: entry: 15073 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15074 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15075 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 15076 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 15077 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15078 // CHECK19-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 15079 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 15080 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15081 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15082 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15083 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15084 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15085 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15086 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15087 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15088 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15089 // CHECK19-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 15090 // CHECK19-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 15091 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15092 // CHECK19-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 15093 // CHECK19-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 15094 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 15095 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15096 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 15097 // CHECK19-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 15098 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15099 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 15100 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15101 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15102 // CHECK19-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15103 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 15104 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15105 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15106 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 15107 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15108 // CHECK19: cond.true: 15109 // CHECK19-NEXT: br label [[COND_END:%.*]] 15110 // CHECK19: cond.false: 15111 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15112 // CHECK19-NEXT: br label [[COND_END]] 15113 // CHECK19: cond.end: 15114 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 15115 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15116 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15117 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 15118 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15119 // CHECK19: omp.inner.for.cond: 15120 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15121 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15122 // CHECK19-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 15123 // CHECK19-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15124 // CHECK19: omp.inner.for.body: 15125 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15126 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 15127 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15128 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 15129 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4 15130 // CHECK19-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double 15131 // CHECK19-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00 15132 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 15133 // CHECK19-NEXT: store double [[ADD4]], double* [[A]], align 4 15134 // CHECK19-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 15135 // CHECK19-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4 15136 // CHECK19-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 15137 // CHECK19-NEXT: store double [[INC]], double* [[A5]], align 4 15138 // CHECK19-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16 15139 // CHECK19-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]] 15140 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]] 15141 // CHECK19-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 15142 // CHECK19-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2 15143 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15144 // CHECK19: omp.body.continue: 15145 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15146 // CHECK19: omp.inner.for.inc: 15147 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15148 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 15149 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 15150 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 15151 // CHECK19: omp.inner.for.end: 15152 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15153 // CHECK19: omp.loop.exit: 15154 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 15155 // CHECK19-NEXT: ret void 15156 // 15157 // 15158 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 15159 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 15160 // CHECK19-NEXT: entry: 15161 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15162 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 15163 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 15164 // CHECK19-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 15165 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 15166 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 15167 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 15168 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 15169 // CHECK19-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 15170 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15171 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 15172 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 15173 // CHECK19-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 15174 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 15175 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 15176 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 15177 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 15178 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 15179 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 15180 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 15181 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4 15182 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4 15183 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4 15184 // CHECK19-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 2 15185 // CHECK19-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 15186 // CHECK19-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2 15187 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4 15188 // CHECK19-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 1 15189 // CHECK19-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 15190 // CHECK19-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1 15191 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 15192 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]]) 15193 // CHECK19-NEXT: ret void 15194 // 15195 // 15196 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15 15197 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 15198 // CHECK19-NEXT: entry: 15199 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15200 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15201 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15202 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 15203 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 15204 // CHECK19-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 15205 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 15206 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15207 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15208 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15209 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 15210 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 15211 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15212 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15213 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15214 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15215 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15216 // CHECK19-NEXT: [[I6:%.*]] = alloca i32, align 4 15217 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15218 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15219 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15220 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 15221 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 15222 // CHECK19-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 15223 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 15224 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 15225 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 15226 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 15227 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 15228 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 15229 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 15230 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 15231 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15232 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15233 // CHECK19-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 15234 // CHECK19-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 15235 // CHECK19-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 15236 // CHECK19-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 15237 // CHECK19-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 15238 // CHECK19-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 15239 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15240 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 15241 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15242 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15243 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 15244 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15245 // CHECK19: omp.precond.then: 15246 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15247 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 15248 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 15249 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15250 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15251 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15252 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 15253 // CHECK19-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15254 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15255 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 15256 // CHECK19-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 15257 // CHECK19-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15258 // CHECK19: cond.true: 15259 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 15260 // CHECK19-NEXT: br label [[COND_END:%.*]] 15261 // CHECK19: cond.false: 15262 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15263 // CHECK19-NEXT: br label [[COND_END]] 15264 // CHECK19: cond.end: 15265 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 15266 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15267 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15268 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 15269 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15270 // CHECK19: omp.inner.for.cond: 15271 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15272 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15273 // CHECK19-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1 15274 // CHECK19-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]] 15275 // CHECK19-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15276 // CHECK19: omp.inner.for.body: 15277 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15278 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15279 // CHECK19-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 15280 // CHECK19-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]] 15281 // CHECK19-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4 15282 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4 15283 // CHECK19-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 15284 // CHECK19-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4 15285 // CHECK19-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 2 15286 // CHECK19-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32 15287 // CHECK19-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1 15288 // CHECK19-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16 15289 // CHECK19-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 2 15290 // CHECK19-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 1 15291 // CHECK19-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32 15292 // CHECK19-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1 15293 // CHECK19-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8 15294 // CHECK19-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 1 15295 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 15296 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 15297 // CHECK19-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1 15298 // CHECK19-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4 15299 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15300 // CHECK19: omp.body.continue: 15301 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15302 // CHECK19: omp.inner.for.inc: 15303 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15304 // CHECK19-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1 15305 // CHECK19-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 15306 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 15307 // CHECK19: omp.inner.for.end: 15308 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15309 // CHECK19: omp.loop.exit: 15310 // CHECK19-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15311 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 15312 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 15313 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 15314 // CHECK19: omp.precond.end: 15315 // CHECK19-NEXT: ret void 15316 // 15317 // 15318 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 15319 // CHECK19-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 15320 // CHECK19-NEXT: entry: 15321 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 15322 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 15323 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 15324 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 15325 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 15326 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 15327 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 15328 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 15329 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 15330 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 15331 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 15332 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4 15333 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4 15334 // CHECK19-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 15335 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 15336 // CHECK19-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2 15337 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 15338 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]]) 15339 // CHECK19-NEXT: ret void 15340 // 15341 // 15342 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18 15343 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 15344 // CHECK19-NEXT: entry: 15345 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15346 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15347 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 15348 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 15349 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 15350 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15351 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15352 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15353 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15354 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15355 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15356 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15357 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15358 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15359 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 15360 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 15361 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 15362 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 15363 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 15364 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15365 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 15366 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15367 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15368 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15369 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 15370 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15371 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15372 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 15373 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15374 // CHECK19: cond.true: 15375 // CHECK19-NEXT: br label [[COND_END:%.*]] 15376 // CHECK19: cond.false: 15377 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15378 // CHECK19-NEXT: br label [[COND_END]] 15379 // CHECK19: cond.end: 15380 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 15381 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15382 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15383 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 15384 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15385 // CHECK19: omp.inner.for.cond: 15386 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15387 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15388 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 15389 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15390 // CHECK19: omp.inner.for.body: 15391 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15392 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 15393 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15394 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 15395 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 15396 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1 15397 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 15398 // CHECK19-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 2 15399 // CHECK19-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32 15400 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 15401 // CHECK19-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 15402 // CHECK19-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 15403 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 15404 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 15405 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1 15406 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 15407 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15408 // CHECK19: omp.body.continue: 15409 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15410 // CHECK19: omp.inner.for.inc: 15411 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15412 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 15413 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 15414 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 15415 // CHECK19: omp.inner.for.end: 15416 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15417 // CHECK19: omp.loop.exit: 15418 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 15419 // CHECK19-NEXT: ret void 15420 // 15421 // 15422 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 15423 // CHECK19-SAME: () #[[ATTR4]] { 15424 // CHECK19-NEXT: entry: 15425 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 15426 // CHECK19-NEXT: ret void 15427 // 15428 // 15429 // CHECK20-LABEL: define {{[^@]+}}@_Z3fooi 15430 // CHECK20-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 15431 // CHECK20-NEXT: entry: 15432 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15433 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 15434 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2 15435 // CHECK20-NEXT: [[B:%.*]] = alloca [10 x float], align 4 15436 // CHECK20-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 15437 // CHECK20-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 15438 // CHECK20-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 15439 // CHECK20-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 15440 // CHECK20-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4 15441 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15442 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 15443 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 15444 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15445 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i32, align 4 15446 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 15447 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 15448 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 15449 // CHECK20-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 15450 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 15451 // CHECK20-NEXT: [[AA_CASTED4:%.*]] = alloca i32, align 4 15452 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS6:%.*]] = alloca [1 x i8*], align 4 15453 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS7:%.*]] = alloca [1 x i8*], align 4 15454 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS8:%.*]] = alloca [1 x i8*], align 4 15455 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 15456 // CHECK20-NEXT: [[A_CASTED9:%.*]] = alloca i32, align 4 15457 // CHECK20-NEXT: [[AA_CASTED10:%.*]] = alloca i32, align 4 15458 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x i8*], align 4 15459 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x i8*], align 4 15460 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x i8*], align 4 15461 // CHECK20-NEXT: [[_TMP15:%.*]] = alloca i32, align 4 15462 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 15463 // CHECK20-NEXT: [[A_CASTED19:%.*]] = alloca i32, align 4 15464 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4 15465 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [10 x i8*], align 4 15466 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [10 x i8*], align 4 15467 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [10 x i8*], align 4 15468 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 4 15469 // CHECK20-NEXT: [[_TMP26:%.*]] = alloca i32, align 4 15470 // CHECK20-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 15471 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15472 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4 15473 // CHECK20-NEXT: store i16 0, i16* [[AA]], align 2 15474 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 15475 // CHECK20-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 15476 // CHECK20-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 15477 // CHECK20-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4 15478 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 15479 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4 15480 // CHECK20-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]] 15481 // CHECK20-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8 15482 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4 15483 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 15484 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 15485 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4 15486 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_2]], align 4 15487 // CHECK20-NEXT: [[TMP7:%.*]] = load i16, i16* [[AA]], align 2 15488 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 15489 // CHECK20-NEXT: store i16 [[TMP7]], i16* [[CONV]], align 2 15490 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[AA_CASTED]], align 4 15491 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15492 // CHECK20-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15493 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15494 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15495 // CHECK20-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4 15496 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4 15497 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 15498 // CHECK20-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 15499 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[TMP14]], align 4 15500 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 15501 // CHECK20-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32* 15502 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[TMP16]], align 4 15503 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 15504 // CHECK20-NEXT: store i8* null, i8** [[TMP17]], align 4 15505 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 15506 // CHECK20-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 15507 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[TMP19]], align 4 15508 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 15509 // CHECK20-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 15510 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[TMP21]], align 4 15511 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 15512 // CHECK20-NEXT: store i8* null, i8** [[TMP22]], align 4 15513 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 15514 // CHECK20-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32* 15515 // CHECK20-NEXT: store i32 [[TMP12]], i32* [[TMP24]], align 4 15516 // CHECK20-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 15517 // CHECK20-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32* 15518 // CHECK20-NEXT: store i32 [[TMP12]], i32* [[TMP26]], align 4 15519 // CHECK20-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 15520 // CHECK20-NEXT: store i8* null, i8** [[TMP27]], align 4 15521 // CHECK20-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 15522 // CHECK20-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 15523 // CHECK20-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0 15524 // CHECK20-NEXT: [[TMP31:%.*]] = load i16, i16* [[AA]], align 2 15525 // CHECK20-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 4 15526 // CHECK20-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1 15527 // CHECK20-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15528 // CHECK20-NEXT: store i32 [[TMP33]], i32* [[TMP32]], align 4 15529 // CHECK20-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2 15530 // CHECK20-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15531 // CHECK20-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4 15532 // CHECK20-NEXT: [[TMP36:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i32 72, i32 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 15533 // CHECK20-NEXT: [[TMP37:%.*]] = bitcast i8* [[TMP36]] to %struct.kmp_task_t_with_privates* 15534 // CHECK20-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 0 15535 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP38]], i32 0, i32 0 15536 // CHECK20-NEXT: [[TMP40:%.*]] = load i8*, i8** [[TMP39]], align 4 15537 // CHECK20-NEXT: [[TMP41:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8* 15538 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP40]], i8* align 4 [[TMP41]], i32 12, i1 false) 15539 // CHECK20-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 1 15540 // CHECK20-NEXT: [[TMP43:%.*]] = bitcast i8* [[TMP40]] to %struct.anon* 15541 // CHECK20-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 0 15542 // CHECK20-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[TMP44]] to i8* 15543 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 15544 // CHECK20-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 1 15545 // CHECK20-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8* 15546 // CHECK20-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP28]] to i8* 15547 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP47]], i8* align 4 [[TMP48]], i32 12, i1 false) 15548 // CHECK20-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 2 15549 // CHECK20-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8* 15550 // CHECK20-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP29]] to i8* 15551 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP50]], i8* align 4 [[TMP51]], i32 12, i1 false) 15552 // CHECK20-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 3 15553 // CHECK20-NEXT: [[TMP53:%.*]] = load i16, i16* [[AA]], align 2 15554 // CHECK20-NEXT: store i16 [[TMP53]], i16* [[TMP52]], align 4 15555 // CHECK20-NEXT: [[TMP54:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP36]]) 15556 // CHECK20-NEXT: [[TMP55:%.*]] = load i32, i32* [[A]], align 4 15557 // CHECK20-NEXT: store i32 [[TMP55]], i32* [[A_CASTED]], align 4 15558 // CHECK20-NEXT: [[TMP56:%.*]] = load i32, i32* [[A_CASTED]], align 4 15559 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i32 [[TMP56]]) #[[ATTR3:[0-9]+]] 15560 // CHECK20-NEXT: [[TMP57:%.*]] = load i16, i16* [[AA]], align 2 15561 // CHECK20-NEXT: [[CONV5:%.*]] = bitcast i32* [[AA_CASTED4]] to i16* 15562 // CHECK20-NEXT: store i16 [[TMP57]], i16* [[CONV5]], align 2 15563 // CHECK20-NEXT: [[TMP58:%.*]] = load i32, i32* [[AA_CASTED4]], align 4 15564 // CHECK20-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0 15565 // CHECK20-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32* 15566 // CHECK20-NEXT: store i32 [[TMP58]], i32* [[TMP60]], align 4 15567 // CHECK20-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0 15568 // CHECK20-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32* 15569 // CHECK20-NEXT: store i32 [[TMP58]], i32* [[TMP62]], align 4 15570 // CHECK20-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS8]], i32 0, i32 0 15571 // CHECK20-NEXT: store i8* null, i8** [[TMP63]], align 4 15572 // CHECK20-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0 15573 // CHECK20-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0 15574 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 15575 // CHECK20-NEXT: [[TMP66:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 15576 // CHECK20-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0 15577 // CHECK20-NEXT: br i1 [[TMP67]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 15578 // CHECK20: omp_offload.failed: 15579 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i32 [[TMP58]]) #[[ATTR3]] 15580 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 15581 // CHECK20: omp_offload.cont: 15582 // CHECK20-NEXT: [[TMP68:%.*]] = load i32, i32* [[A]], align 4 15583 // CHECK20-NEXT: store i32 [[TMP68]], i32* [[A_CASTED9]], align 4 15584 // CHECK20-NEXT: [[TMP69:%.*]] = load i32, i32* [[A_CASTED9]], align 4 15585 // CHECK20-NEXT: [[TMP70:%.*]] = load i16, i16* [[AA]], align 2 15586 // CHECK20-NEXT: [[CONV11:%.*]] = bitcast i32* [[AA_CASTED10]] to i16* 15587 // CHECK20-NEXT: store i16 [[TMP70]], i16* [[CONV11]], align 2 15588 // CHECK20-NEXT: [[TMP71:%.*]] = load i32, i32* [[AA_CASTED10]], align 4 15589 // CHECK20-NEXT: [[TMP72:%.*]] = load i32, i32* [[N_ADDR]], align 4 15590 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP72]], 10 15591 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 15592 // CHECK20: omp_if.then: 15593 // CHECK20-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 15594 // CHECK20-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32* 15595 // CHECK20-NEXT: store i32 [[TMP69]], i32* [[TMP74]], align 4 15596 // CHECK20-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 15597 // CHECK20-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 15598 // CHECK20-NEXT: store i32 [[TMP69]], i32* [[TMP76]], align 4 15599 // CHECK20-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 0 15600 // CHECK20-NEXT: store i8* null, i8** [[TMP77]], align 4 15601 // CHECK20-NEXT: [[TMP78:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1 15602 // CHECK20-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 15603 // CHECK20-NEXT: store i32 [[TMP71]], i32* [[TMP79]], align 4 15604 // CHECK20-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1 15605 // CHECK20-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32* 15606 // CHECK20-NEXT: store i32 [[TMP71]], i32* [[TMP81]], align 4 15607 // CHECK20-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 1 15608 // CHECK20-NEXT: store i8* null, i8** [[TMP82]], align 4 15609 // CHECK20-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 15610 // CHECK20-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 15611 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 15612 // CHECK20-NEXT: [[TMP85:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP83]], i8** [[TMP84]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 15613 // CHECK20-NEXT: [[TMP86:%.*]] = icmp ne i32 [[TMP85]], 0 15614 // CHECK20-NEXT: br i1 [[TMP86]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 15615 // CHECK20: omp_offload.failed16: 15616 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]] 15617 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT17]] 15618 // CHECK20: omp_offload.cont17: 15619 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]] 15620 // CHECK20: omp_if.else: 15621 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]] 15622 // CHECK20-NEXT: br label [[OMP_IF_END]] 15623 // CHECK20: omp_if.end: 15624 // CHECK20-NEXT: [[TMP87:%.*]] = load i32, i32* [[N_ADDR]], align 4 15625 // CHECK20-NEXT: store i32 [[TMP87]], i32* [[DOTCAPTURE_EXPR_18]], align 4 15626 // CHECK20-NEXT: [[TMP88:%.*]] = load i32, i32* [[A]], align 4 15627 // CHECK20-NEXT: store i32 [[TMP88]], i32* [[A_CASTED19]], align 4 15628 // CHECK20-NEXT: [[TMP89:%.*]] = load i32, i32* [[A_CASTED19]], align 4 15629 // CHECK20-NEXT: [[TMP90:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4 15630 // CHECK20-NEXT: store i32 [[TMP90]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4 15631 // CHECK20-NEXT: [[TMP91:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4 15632 // CHECK20-NEXT: [[TMP92:%.*]] = load i32, i32* [[N_ADDR]], align 4 15633 // CHECK20-NEXT: [[CMP21:%.*]] = icmp sgt i32 [[TMP92]], 20 15634 // CHECK20-NEXT: br i1 [[CMP21]], label [[OMP_IF_THEN22:%.*]], label [[OMP_IF_ELSE29:%.*]] 15635 // CHECK20: omp_if.then22: 15636 // CHECK20-NEXT: [[TMP93:%.*]] = mul nuw i32 [[TMP1]], 4 15637 // CHECK20-NEXT: [[TMP94:%.*]] = sext i32 [[TMP93]] to i64 15638 // CHECK20-NEXT: [[TMP95:%.*]] = mul nuw i32 5, [[TMP3]] 15639 // CHECK20-NEXT: [[TMP96:%.*]] = mul nuw i32 [[TMP95]], 8 15640 // CHECK20-NEXT: [[TMP97:%.*]] = sext i32 [[TMP96]] to i64 15641 // CHECK20-NEXT: [[TMP98:%.*]] = bitcast [10 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 15642 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP98]], i8* align 4 bitcast ([10 x i64]* @.offload_sizes.10 to i8*), i32 80, i1 false) 15643 // CHECK20-NEXT: [[TMP99:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0 15644 // CHECK20-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to i32* 15645 // CHECK20-NEXT: store i32 [[TMP89]], i32* [[TMP100]], align 4 15646 // CHECK20-NEXT: [[TMP101:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0 15647 // CHECK20-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i32* 15648 // CHECK20-NEXT: store i32 [[TMP89]], i32* [[TMP102]], align 4 15649 // CHECK20-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0 15650 // CHECK20-NEXT: store i8* null, i8** [[TMP103]], align 4 15651 // CHECK20-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1 15652 // CHECK20-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]** 15653 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 4 15654 // CHECK20-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1 15655 // CHECK20-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]** 15656 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 4 15657 // CHECK20-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1 15658 // CHECK20-NEXT: store i8* null, i8** [[TMP108]], align 4 15659 // CHECK20-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2 15660 // CHECK20-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 15661 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP110]], align 4 15662 // CHECK20-NEXT: [[TMP111:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2 15663 // CHECK20-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 15664 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP112]], align 4 15665 // CHECK20-NEXT: [[TMP113:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 2 15666 // CHECK20-NEXT: store i8* null, i8** [[TMP113]], align 4 15667 // CHECK20-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3 15668 // CHECK20-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to float** 15669 // CHECK20-NEXT: store float* [[VLA]], float** [[TMP115]], align 4 15670 // CHECK20-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3 15671 // CHECK20-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float** 15672 // CHECK20-NEXT: store float* [[VLA]], float** [[TMP117]], align 4 15673 // CHECK20-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 15674 // CHECK20-NEXT: store i64 [[TMP94]], i64* [[TMP118]], align 4 15675 // CHECK20-NEXT: [[TMP119:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 3 15676 // CHECK20-NEXT: store i8* null, i8** [[TMP119]], align 4 15677 // CHECK20-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 4 15678 // CHECK20-NEXT: [[TMP121:%.*]] = bitcast i8** [[TMP120]] to [5 x [10 x double]]** 15679 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP121]], align 4 15680 // CHECK20-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 4 15681 // CHECK20-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]** 15682 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 4 15683 // CHECK20-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 4 15684 // CHECK20-NEXT: store i8* null, i8** [[TMP124]], align 4 15685 // CHECK20-NEXT: [[TMP125:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 5 15686 // CHECK20-NEXT: [[TMP126:%.*]] = bitcast i8** [[TMP125]] to i32* 15687 // CHECK20-NEXT: store i32 5, i32* [[TMP126]], align 4 15688 // CHECK20-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 5 15689 // CHECK20-NEXT: [[TMP128:%.*]] = bitcast i8** [[TMP127]] to i32* 15690 // CHECK20-NEXT: store i32 5, i32* [[TMP128]], align 4 15691 // CHECK20-NEXT: [[TMP129:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 5 15692 // CHECK20-NEXT: store i8* null, i8** [[TMP129]], align 4 15693 // CHECK20-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 6 15694 // CHECK20-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i32* 15695 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP131]], align 4 15696 // CHECK20-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 6 15697 // CHECK20-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i32* 15698 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP133]], align 4 15699 // CHECK20-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 6 15700 // CHECK20-NEXT: store i8* null, i8** [[TMP134]], align 4 15701 // CHECK20-NEXT: [[TMP135:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 7 15702 // CHECK20-NEXT: [[TMP136:%.*]] = bitcast i8** [[TMP135]] to double** 15703 // CHECK20-NEXT: store double* [[VLA1]], double** [[TMP136]], align 4 15704 // CHECK20-NEXT: [[TMP137:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 7 15705 // CHECK20-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to double** 15706 // CHECK20-NEXT: store double* [[VLA1]], double** [[TMP138]], align 4 15707 // CHECK20-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 15708 // CHECK20-NEXT: store i64 [[TMP97]], i64* [[TMP139]], align 4 15709 // CHECK20-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 7 15710 // CHECK20-NEXT: store i8* null, i8** [[TMP140]], align 4 15711 // CHECK20-NEXT: [[TMP141:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 8 15712 // CHECK20-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to %struct.TT** 15713 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP142]], align 4 15714 // CHECK20-NEXT: [[TMP143:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 8 15715 // CHECK20-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to %struct.TT** 15716 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP144]], align 4 15717 // CHECK20-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 8 15718 // CHECK20-NEXT: store i8* null, i8** [[TMP145]], align 4 15719 // CHECK20-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 9 15720 // CHECK20-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 15721 // CHECK20-NEXT: store i32 [[TMP91]], i32* [[TMP147]], align 4 15722 // CHECK20-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 9 15723 // CHECK20-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 15724 // CHECK20-NEXT: store i32 [[TMP91]], i32* [[TMP149]], align 4 15725 // CHECK20-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 9 15726 // CHECK20-NEXT: store i8* null, i8** [[TMP150]], align 4 15727 // CHECK20-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0 15728 // CHECK20-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0 15729 // CHECK20-NEXT: [[TMP153:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 15730 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 15731 // CHECK20-NEXT: [[TMP154:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP151]], i8** [[TMP152]], i64* [[TMP153]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 15732 // CHECK20-NEXT: [[TMP155:%.*]] = icmp ne i32 [[TMP154]], 0 15733 // CHECK20-NEXT: br i1 [[TMP155]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 15734 // CHECK20: omp_offload.failed27: 15735 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]] 15736 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT28]] 15737 // CHECK20: omp_offload.cont28: 15738 // CHECK20-NEXT: br label [[OMP_IF_END30:%.*]] 15739 // CHECK20: omp_if.else29: 15740 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]] 15741 // CHECK20-NEXT: br label [[OMP_IF_END30]] 15742 // CHECK20: omp_if.end30: 15743 // CHECK20-NEXT: [[TMP156:%.*]] = load i32, i32* [[A]], align 4 15744 // CHECK20-NEXT: [[TMP157:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 15745 // CHECK20-NEXT: call void @llvm.stackrestore(i8* [[TMP157]]) 15746 // CHECK20-NEXT: ret i32 [[TMP156]] 15747 // 15748 // 15749 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 15750 // CHECK20-SAME: (i32 noundef [[AA:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] { 15751 // CHECK20-NEXT: entry: 15752 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 15753 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 15754 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 15755 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 15756 // CHECK20-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) 15757 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 15758 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15759 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 15760 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 15761 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15762 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 15763 // CHECK20-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 15764 // CHECK20-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 15765 // CHECK20-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 15766 // CHECK20-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 15767 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 15768 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]]) 15769 // CHECK20-NEXT: ret void 15770 // 15771 // 15772 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined. 15773 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 15774 // CHECK20-NEXT: entry: 15775 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15776 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15777 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 15778 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15779 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 15780 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15781 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15782 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15783 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15784 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 15785 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15786 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15787 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 15788 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 15789 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15790 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 15791 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15792 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15793 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15794 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 15795 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15796 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15797 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 15798 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15799 // CHECK20: cond.true: 15800 // CHECK20-NEXT: br label [[COND_END:%.*]] 15801 // CHECK20: cond.false: 15802 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15803 // CHECK20-NEXT: br label [[COND_END]] 15804 // CHECK20: cond.end: 15805 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 15806 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15807 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15808 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 15809 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15810 // CHECK20: omp.inner.for.cond: 15811 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15812 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15813 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 15814 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15815 // CHECK20: omp.inner.for.body: 15816 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15817 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 15818 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15819 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 15820 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15821 // CHECK20: omp.body.continue: 15822 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15823 // CHECK20: omp.inner.for.inc: 15824 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15825 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 15826 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 15827 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 15828 // CHECK20: omp.inner.for.end: 15829 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15830 // CHECK20: omp.loop.exit: 15831 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 15832 // CHECK20-NEXT: ret void 15833 // 15834 // 15835 // CHECK20-LABEL: define {{[^@]+}}@.omp_task_privates_map. 15836 // CHECK20-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i16** noalias noundef [[TMP1:%.*]], [3 x i8*]** noalias noundef [[TMP2:%.*]], [3 x i8*]** noalias noundef [[TMP3:%.*]], [3 x i64]** noalias noundef [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] { 15837 // CHECK20-NEXT: entry: 15838 // CHECK20-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 4 15839 // CHECK20-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 4 15840 // CHECK20-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 4 15841 // CHECK20-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 4 15842 // CHECK20-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 4 15843 // CHECK20-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 4 15844 // CHECK20-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 4 15845 // CHECK20-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 4 15846 // CHECK20-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 4 15847 // CHECK20-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 4 15848 // CHECK20-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 4 15849 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0 15850 // CHECK20-NEXT: [[TMP7:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 4 15851 // CHECK20-NEXT: store [3 x i64]* [[TMP6]], [3 x i64]** [[TMP7]], align 4 15852 // CHECK20-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1 15853 // CHECK20-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 4 15854 // CHECK20-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 4 15855 // CHECK20-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2 15856 // CHECK20-NEXT: [[TMP11:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 4 15857 // CHECK20-NEXT: store [3 x i8*]* [[TMP10]], [3 x i8*]** [[TMP11]], align 4 15858 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3 15859 // CHECK20-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 4 15860 // CHECK20-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 4 15861 // CHECK20-NEXT: ret void 15862 // 15863 // 15864 // CHECK20-LABEL: define {{[^@]+}}@.omp_task_entry. 15865 // CHECK20-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] { 15866 // CHECK20-NEXT: entry: 15867 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 15868 // CHECK20-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4 15869 // CHECK20-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4 15870 // CHECK20-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4 15871 // CHECK20-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4 15872 // CHECK20-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 4 15873 // CHECK20-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 4 15874 // CHECK20-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 4 15875 // CHECK20-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 4 15876 // CHECK20-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 4 15877 // CHECK20-NEXT: [[AA_CASTED_I:%.*]] = alloca i32, align 4 15878 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i32, align 4 15879 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED4_I:%.*]] = alloca i32, align 4 15880 // CHECK20-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 15881 // CHECK20-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4 15882 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 15883 // CHECK20-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 15884 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 15885 // CHECK20-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 15886 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 15887 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 15888 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 15889 // CHECK20-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 15890 // CHECK20-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 15891 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1 15892 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 15893 // CHECK20-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 15894 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]]) 15895 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]]) 15896 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]]) 15897 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 15898 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22 15899 // CHECK20-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22 15900 // CHECK20-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 15901 // CHECK20-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 15902 // CHECK20-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22 15903 // CHECK20-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 15904 // CHECK20-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 15905 // CHECK20-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 15906 // CHECK20-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 15907 // CHECK20-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* 15908 // CHECK20-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]] 15909 // CHECK20-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 4, !noalias !22 15910 // CHECK20-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 4, !noalias !22 15911 // CHECK20-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 4, !noalias !22 15912 // CHECK20-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 4, !noalias !22 15913 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i32 0, i32 0 15914 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i32 0, i32 0 15915 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i32 0, i32 0 15916 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1 15917 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2 15918 // CHECK20-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4 15919 // CHECK20-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4 15920 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]] 15921 // CHECK20-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]] 15922 // CHECK20-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 15923 // CHECK20-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 15924 // CHECK20: omp_offload.failed.i: 15925 // CHECK20-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2 15926 // CHECK20-NEXT: [[CONV_I:%.*]] = bitcast i32* [[AA_CASTED_I]] to i16* 15927 // CHECK20-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !22 15928 // CHECK20-NEXT: [[TMP30:%.*]] = load i32, i32* [[AA_CASTED_I]], align 4, !noalias !22 15929 // CHECK20-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4 15930 // CHECK20-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22 15931 // CHECK20-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22 15932 // CHECK20-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4 15933 // CHECK20-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22 15934 // CHECK20-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22 15935 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i32 [[TMP30]], i32 [[TMP32]], i32 [[TMP34]]) #[[ATTR3]] 15936 // CHECK20-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 15937 // CHECK20: .omp_outlined..1.exit: 15938 // CHECK20-NEXT: ret i32 0 15939 // 15940 // 15941 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107 15942 // CHECK20-SAME: (i32 noundef [[A:%.*]]) #[[ATTR2]] { 15943 // CHECK20-NEXT: entry: 15944 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 15945 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 15946 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 15947 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 15948 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 15949 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 15950 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 15951 // CHECK20-NEXT: ret void 15952 // 15953 // 15954 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..2 15955 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR2]] { 15956 // CHECK20-NEXT: entry: 15957 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15958 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15959 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 15960 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15961 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 15962 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15963 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15964 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15965 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15966 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 15967 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15968 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15969 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 15970 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15971 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 15972 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15973 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15974 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15975 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 15976 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15977 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15978 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 15979 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15980 // CHECK20: cond.true: 15981 // CHECK20-NEXT: br label [[COND_END:%.*]] 15982 // CHECK20: cond.false: 15983 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15984 // CHECK20-NEXT: br label [[COND_END]] 15985 // CHECK20: cond.end: 15986 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 15987 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15988 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15989 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 15990 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15991 // CHECK20: omp.inner.for.cond: 15992 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15993 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15994 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 15995 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15996 // CHECK20: omp.inner.for.body: 15997 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15998 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 15999 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16000 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 16001 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 16002 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 16003 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 16004 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16005 // CHECK20: omp.body.continue: 16006 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16007 // CHECK20: omp.inner.for.inc: 16008 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16009 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 16010 // CHECK20-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 16011 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 16012 // CHECK20: omp.inner.for.end: 16013 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16014 // CHECK20: omp.loop.exit: 16015 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 16016 // CHECK20-NEXT: ret void 16017 // 16018 // 16019 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 16020 // CHECK20-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR2]] { 16021 // CHECK20-NEXT: entry: 16022 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 16023 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 16024 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 16025 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 16026 // CHECK20-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 16027 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 16028 // CHECK20-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 16029 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4 16030 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 16031 // CHECK20-NEXT: ret void 16032 // 16033 // 16034 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..3 16035 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 16036 // CHECK20-NEXT: entry: 16037 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16038 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16039 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 16040 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16041 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 16042 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16043 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16044 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16045 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16046 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 16047 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16048 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16049 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 16050 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 16051 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16052 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16053 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16054 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16055 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16056 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 16057 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16058 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16059 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 16060 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16061 // CHECK20: cond.true: 16062 // CHECK20-NEXT: br label [[COND_END:%.*]] 16063 // CHECK20: cond.false: 16064 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16065 // CHECK20-NEXT: br label [[COND_END]] 16066 // CHECK20: cond.end: 16067 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 16068 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16069 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16070 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 16071 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16072 // CHECK20: omp.inner.for.cond: 16073 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16074 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16075 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 16076 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16077 // CHECK20: omp.inner.for.body: 16078 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16079 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 16080 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16081 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 16082 // CHECK20-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 16083 // CHECK20-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 16084 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 16085 // CHECK20-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 16086 // CHECK20-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 16087 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16088 // CHECK20: omp.body.continue: 16089 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16090 // CHECK20: omp.inner.for.inc: 16091 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16092 // CHECK20-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 16093 // CHECK20-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 16094 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 16095 // CHECK20: omp.inner.for.end: 16096 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16097 // CHECK20: omp.loop.exit: 16098 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 16099 // CHECK20-NEXT: ret void 16100 // 16101 // 16102 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 16103 // CHECK20-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 16104 // CHECK20-NEXT: entry: 16105 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 16106 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 16107 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 16108 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 16109 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 16110 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 16111 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 16112 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 16113 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 16114 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 16115 // CHECK20-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 2 16116 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 16117 // CHECK20-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 16118 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 16119 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]]) 16120 // CHECK20-NEXT: ret void 16121 // 16122 // 16123 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..6 16124 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR2]] { 16125 // CHECK20-NEXT: entry: 16126 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16127 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16128 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 16129 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 16130 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16131 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 16132 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16133 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16134 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16135 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16136 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 16137 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16138 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16139 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 16140 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 16141 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 16142 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16143 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16144 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16145 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16146 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16147 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 16148 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16149 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16150 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 16151 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16152 // CHECK20: cond.true: 16153 // CHECK20-NEXT: br label [[COND_END:%.*]] 16154 // CHECK20: cond.false: 16155 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16156 // CHECK20-NEXT: br label [[COND_END]] 16157 // CHECK20: cond.end: 16158 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 16159 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16160 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16161 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 16162 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16163 // CHECK20: omp.inner.for.cond: 16164 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16165 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16166 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 16167 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16168 // CHECK20: omp.inner.for.body: 16169 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16170 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 16171 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16172 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 16173 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 16174 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 16175 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 16176 // CHECK20-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 2 16177 // CHECK20-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32 16178 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 16179 // CHECK20-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 16180 // CHECK20-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 16181 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16182 // CHECK20: omp.body.continue: 16183 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16184 // CHECK20: omp.inner.for.inc: 16185 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16186 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 16187 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 16188 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 16189 // CHECK20: omp.inner.for.end: 16190 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16191 // CHECK20: omp.loop.exit: 16192 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 16193 // CHECK20-NEXT: ret void 16194 // 16195 // 16196 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 16197 // CHECK20-SAME: (i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16198 // CHECK20-NEXT: entry: 16199 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 16200 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 16201 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 16202 // CHECK20-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 16203 // CHECK20-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 16204 // CHECK20-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 16205 // CHECK20-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 16206 // CHECK20-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 16207 // CHECK20-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 16208 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16209 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 16210 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16211 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 16212 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 16213 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 16214 // CHECK20-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 16215 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 16216 // CHECK20-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 16217 // CHECK20-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 16218 // CHECK20-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 16219 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 16220 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16221 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 16222 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 16223 // CHECK20-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 16224 // CHECK20-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 16225 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 16226 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 16227 // CHECK20-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 16228 // CHECK20-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 16229 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 16230 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4 16231 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4 16232 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16233 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16234 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16235 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]]) 16236 // CHECK20-NEXT: ret void 16237 // 16238 // 16239 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..9 16240 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16241 // CHECK20-NEXT: entry: 16242 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16243 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16244 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 16245 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 16246 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 16247 // CHECK20-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 16248 // CHECK20-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 16249 // CHECK20-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 16250 // CHECK20-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 16251 // CHECK20-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 16252 // CHECK20-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 16253 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16254 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16255 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 16256 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16257 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16258 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16259 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16260 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 16261 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16262 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16263 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 16264 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 16265 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 16266 // CHECK20-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 16267 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 16268 // CHECK20-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 16269 // CHECK20-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 16270 // CHECK20-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 16271 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 16272 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16273 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 16274 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 16275 // CHECK20-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 16276 // CHECK20-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 16277 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 16278 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 16279 // CHECK20-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 16280 // CHECK20-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 16281 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16282 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16283 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16284 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16285 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16286 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16287 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 16288 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 16289 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16290 // CHECK20: omp.dispatch.cond: 16291 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16292 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 16293 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16294 // CHECK20: cond.true: 16295 // CHECK20-NEXT: br label [[COND_END:%.*]] 16296 // CHECK20: cond.false: 16297 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16298 // CHECK20-NEXT: br label [[COND_END]] 16299 // CHECK20: cond.end: 16300 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 16301 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16302 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16303 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 16304 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16305 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16306 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 16307 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16308 // CHECK20: omp.dispatch.body: 16309 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16310 // CHECK20: omp.inner.for.cond: 16311 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 16312 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 16313 // CHECK20-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 16314 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16315 // CHECK20: omp.inner.for.body: 16316 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 16317 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 16318 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16319 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23 16320 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !23 16321 // CHECK20-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 16322 // CHECK20-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !23 16323 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2 16324 // CHECK20-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !23 16325 // CHECK20-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 16326 // CHECK20-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00 16327 // CHECK20-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float 16328 // CHECK20-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !23 16329 // CHECK20-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3 16330 // CHECK20-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !23 16331 // CHECK20-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double 16332 // CHECK20-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00 16333 // CHECK20-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 16334 // CHECK20-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !23 16335 // CHECK20-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1 16336 // CHECK20-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2 16337 // CHECK20-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !23 16338 // CHECK20-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00 16339 // CHECK20-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !23 16340 // CHECK20-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]] 16341 // CHECK20-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]] 16342 // CHECK20-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3 16343 // CHECK20-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !23 16344 // CHECK20-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00 16345 // CHECK20-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !23 16346 // CHECK20-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 16347 // CHECK20-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !23 16348 // CHECK20-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1 16349 // CHECK20-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !23 16350 // CHECK20-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 16351 // CHECK20-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !23 16352 // CHECK20-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32 16353 // CHECK20-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1 16354 // CHECK20-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8 16355 // CHECK20-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !23 16356 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16357 // CHECK20: omp.body.continue: 16358 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16359 // CHECK20: omp.inner.for.inc: 16360 // CHECK20-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 16361 // CHECK20-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1 16362 // CHECK20-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 16363 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 16364 // CHECK20: omp.inner.for.end: 16365 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16366 // CHECK20: omp.dispatch.inc: 16367 // CHECK20-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16368 // CHECK20-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16369 // CHECK20-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 16370 // CHECK20-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4 16371 // CHECK20-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16372 // CHECK20-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16373 // CHECK20-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 16374 // CHECK20-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4 16375 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 16376 // CHECK20: omp.dispatch.end: 16377 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 16378 // CHECK20-NEXT: ret void 16379 // 16380 // 16381 // CHECK20-LABEL: define {{[^@]+}}@_Z3bari 16382 // CHECK20-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 16383 // CHECK20-NEXT: entry: 16384 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 16385 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 16386 // CHECK20-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 16387 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 16388 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4 16389 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 16390 // CHECK20-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooi(i32 noundef [[TMP0]]) 16391 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 16392 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 16393 // CHECK20-NEXT: store i32 [[ADD]], i32* [[A]], align 4 16394 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 16395 // CHECK20-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZN2S12r1Ei(%struct.S1* noundef nonnull align 4 dereferenceable(8) [[S]], i32 noundef [[TMP2]]) 16396 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 16397 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 16398 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 16399 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 16400 // CHECK20-NEXT: [[CALL3:%.*]] = call noundef i32 @_ZL7fstatici(i32 noundef [[TMP4]]) 16401 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 16402 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 16403 // CHECK20-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 16404 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 16405 // CHECK20-NEXT: [[CALL5:%.*]] = call noundef i32 @_Z9ftemplateIiET_i(i32 noundef [[TMP6]]) 16406 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 16407 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 16408 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 16409 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 16410 // CHECK20-NEXT: ret i32 [[TMP8]] 16411 // 16412 // 16413 // CHECK20-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 16414 // CHECK20-SAME: (%struct.S1* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[N:%.*]]) #[[ATTR0]] comdat align 2 { 16415 // CHECK20-NEXT: entry: 16416 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 16417 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 16418 // CHECK20-NEXT: [[B:%.*]] = alloca i32, align 4 16419 // CHECK20-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 16420 // CHECK20-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 16421 // CHECK20-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 16422 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 16423 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 16424 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 16425 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 16426 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 16427 // CHECK20-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 16428 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 16429 // CHECK20-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 16430 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 16431 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 16432 // CHECK20-NEXT: store i32 [[ADD]], i32* [[B]], align 4 16433 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 16434 // CHECK20-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 16435 // CHECK20-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 16436 // CHECK20-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]] 16437 // CHECK20-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2 16438 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 16439 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4 16440 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 16441 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 16442 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 16443 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60 16444 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 16445 // CHECK20: omp_if.then: 16446 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 16447 // CHECK20-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]] 16448 // CHECK20-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2 16449 // CHECK20-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 16450 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 16451 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes.13 to i8*), i32 40, i1 false) 16452 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16453 // CHECK20-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to %struct.S1** 16454 // CHECK20-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP12]], align 4 16455 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16456 // CHECK20-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to double** 16457 // CHECK20-NEXT: store double* [[A]], double** [[TMP14]], align 4 16458 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 16459 // CHECK20-NEXT: store i8* null, i8** [[TMP15]], align 4 16460 // CHECK20-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 16461 // CHECK20-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 16462 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4 16463 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 16464 // CHECK20-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 16465 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4 16466 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 16467 // CHECK20-NEXT: store i8* null, i8** [[TMP20]], align 4 16468 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 16469 // CHECK20-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32* 16470 // CHECK20-NEXT: store i32 2, i32* [[TMP22]], align 4 16471 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 16472 // CHECK20-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32* 16473 // CHECK20-NEXT: store i32 2, i32* [[TMP24]], align 4 16474 // CHECK20-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 16475 // CHECK20-NEXT: store i8* null, i8** [[TMP25]], align 4 16476 // CHECK20-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 16477 // CHECK20-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 16478 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP27]], align 4 16479 // CHECK20-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 16480 // CHECK20-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32* 16481 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4 16482 // CHECK20-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 16483 // CHECK20-NEXT: store i8* null, i8** [[TMP30]], align 4 16484 // CHECK20-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 16485 // CHECK20-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i16** 16486 // CHECK20-NEXT: store i16* [[VLA]], i16** [[TMP32]], align 4 16487 // CHECK20-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 16488 // CHECK20-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i16** 16489 // CHECK20-NEXT: store i16* [[VLA]], i16** [[TMP34]], align 4 16490 // CHECK20-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 16491 // CHECK20-NEXT: store i64 [[TMP9]], i64* [[TMP35]], align 4 16492 // CHECK20-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 16493 // CHECK20-NEXT: store i8* null, i8** [[TMP36]], align 4 16494 // CHECK20-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16495 // CHECK20-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16496 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 16497 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 16498 // CHECK20-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP37]], i8** [[TMP38]], i64* [[TMP39]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.14, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16499 // CHECK20-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 16500 // CHECK20-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 16501 // CHECK20: omp_offload.failed: 16502 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 16503 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 16504 // CHECK20: omp_offload.cont: 16505 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]] 16506 // CHECK20: omp_if.else: 16507 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 16508 // CHECK20-NEXT: br label [[OMP_IF_END]] 16509 // CHECK20: omp_if.end: 16510 // CHECK20-NEXT: [[TMP42:%.*]] = mul nsw i32 1, [[TMP1]] 16511 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP42]] 16512 // CHECK20-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 16513 // CHECK20-NEXT: [[TMP43:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 16514 // CHECK20-NEXT: [[CONV:%.*]] = sext i16 [[TMP43]] to i32 16515 // CHECK20-NEXT: [[TMP44:%.*]] = load i32, i32* [[B]], align 4 16516 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP44]] 16517 // CHECK20-NEXT: [[TMP45:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 16518 // CHECK20-NEXT: call void @llvm.stackrestore(i8* [[TMP45]]) 16519 // CHECK20-NEXT: ret i32 [[ADD3]] 16520 // 16521 // 16522 // CHECK20-LABEL: define {{[^@]+}}@_ZL7fstatici 16523 // CHECK20-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 16524 // CHECK20-NEXT: entry: 16525 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 16526 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 16527 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2 16528 // CHECK20-NEXT: [[AAA:%.*]] = alloca i8, align 1 16529 // CHECK20-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 16530 // CHECK20-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 16531 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 16532 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 16533 // CHECK20-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 16534 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 16535 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 16536 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 16537 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 16538 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16539 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 16540 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 16541 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 16542 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4 16543 // CHECK20-NEXT: store i16 0, i16* [[AA]], align 2 16544 // CHECK20-NEXT: store i8 0, i8* [[AAA]], align 1 16545 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 16546 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4 16547 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4 16548 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4 16549 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[A_CASTED]], align 4 16550 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_CASTED]], align 4 16551 // CHECK20-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2 16552 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 16553 // CHECK20-NEXT: store i16 [[TMP4]], i16* [[CONV]], align 2 16554 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[AA_CASTED]], align 4 16555 // CHECK20-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1 16556 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 16557 // CHECK20-NEXT: store i8 [[TMP6]], i8* [[CONV1]], align 1 16558 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 16559 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4 16560 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50 16561 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 16562 // CHECK20: omp_if.then: 16563 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16564 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 16565 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4 16566 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16567 // CHECK20-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 16568 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP12]], align 4 16569 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 16570 // CHECK20-NEXT: store i8* null, i8** [[TMP13]], align 4 16571 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 16572 // CHECK20-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 16573 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 16574 // CHECK20-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 16575 // CHECK20-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 16576 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP17]], align 4 16577 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 16578 // CHECK20-NEXT: store i8* null, i8** [[TMP18]], align 4 16579 // CHECK20-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 16580 // CHECK20-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 16581 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4 16582 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 16583 // CHECK20-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32* 16584 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP22]], align 4 16585 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 16586 // CHECK20-NEXT: store i8* null, i8** [[TMP23]], align 4 16587 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 16588 // CHECK20-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 16589 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[TMP25]], align 4 16590 // CHECK20-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 16591 // CHECK20-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 16592 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[TMP27]], align 4 16593 // CHECK20-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 16594 // CHECK20-NEXT: store i8* null, i8** [[TMP28]], align 4 16595 // CHECK20-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 16596 // CHECK20-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]** 16597 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 4 16598 // CHECK20-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 16599 // CHECK20-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]** 16600 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 4 16601 // CHECK20-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 16602 // CHECK20-NEXT: store i8* null, i8** [[TMP33]], align 4 16603 // CHECK20-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16604 // CHECK20-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16605 // CHECK20-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4 16606 // CHECK20-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4 16607 // CHECK20-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4 16608 // CHECK20-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_2]], align 4 16609 // CHECK20-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16610 // CHECK20-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16611 // CHECK20-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]] 16612 // CHECK20-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 16613 // CHECK20-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 16614 // CHECK20-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 16615 // CHECK20-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 16616 // CHECK20-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 16617 // CHECK20-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 16618 // CHECK20-NEXT: [[ADD6:%.*]] = add i32 [[TMP40]], 1 16619 // CHECK20-NEXT: [[TMP41:%.*]] = zext i32 [[ADD6]] to i64 16620 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]]) 16621 // CHECK20-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16622 // CHECK20-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 16623 // CHECK20-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 16624 // CHECK20: omp_offload.failed: 16625 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 16626 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 16627 // CHECK20: omp_offload.cont: 16628 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]] 16629 // CHECK20: omp_if.else: 16630 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]] 16631 // CHECK20-NEXT: br label [[OMP_IF_END]] 16632 // CHECK20: omp_if.end: 16633 // CHECK20-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4 16634 // CHECK20-NEXT: ret i32 [[TMP44]] 16635 // 16636 // 16637 // CHECK20-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 16638 // CHECK20-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] comdat { 16639 // CHECK20-NEXT: entry: 16640 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 16641 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 16642 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2 16643 // CHECK20-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 16644 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 16645 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 16646 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 16647 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 16648 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 16649 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 16650 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 16651 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4 16652 // CHECK20-NEXT: store i16 0, i16* [[AA]], align 2 16653 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 16654 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 16655 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 16656 // CHECK20-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 16657 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 16658 // CHECK20-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 16659 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 16660 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 16661 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 16662 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 16663 // CHECK20: omp_if.then: 16664 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16665 // CHECK20-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 16666 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 16667 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16668 // CHECK20-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 16669 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 16670 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 16671 // CHECK20-NEXT: store i8* null, i8** [[TMP9]], align 4 16672 // CHECK20-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 16673 // CHECK20-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 16674 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 16675 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 16676 // CHECK20-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 16677 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 16678 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 16679 // CHECK20-NEXT: store i8* null, i8** [[TMP14]], align 4 16680 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 16681 // CHECK20-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 16682 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4 16683 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 16684 // CHECK20-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 16685 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4 16686 // CHECK20-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 16687 // CHECK20-NEXT: store i8* null, i8** [[TMP19]], align 4 16688 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16689 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16690 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 16691 // CHECK20-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16692 // CHECK20-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 16693 // CHECK20-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 16694 // CHECK20: omp_offload.failed: 16695 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 16696 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 16697 // CHECK20: omp_offload.cont: 16698 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]] 16699 // CHECK20: omp_if.else: 16700 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 16701 // CHECK20-NEXT: br label [[OMP_IF_END]] 16702 // CHECK20: omp_if.end: 16703 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 16704 // CHECK20-NEXT: ret i32 [[TMP24]] 16705 // 16706 // 16707 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 16708 // CHECK20-SAME: (%struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 16709 // CHECK20-NEXT: entry: 16710 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 16711 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 16712 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 16713 // CHECK20-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 16714 // CHECK20-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 16715 // CHECK20-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 16716 // CHECK20-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 16717 // CHECK20-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 16718 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 16719 // CHECK20-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 16720 // CHECK20-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 16721 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 16722 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 16723 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 16724 // CHECK20-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 16725 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4 16726 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 16727 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 16728 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..12 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]]) 16729 // CHECK20-NEXT: ret void 16730 // 16731 // 16732 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..12 16733 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 16734 // CHECK20-NEXT: entry: 16735 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16736 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16737 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 16738 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 16739 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 16740 // CHECK20-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 16741 // CHECK20-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 16742 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16743 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 16744 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16745 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16746 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16747 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16748 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 16749 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16750 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16751 // CHECK20-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 16752 // CHECK20-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 16753 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 16754 // CHECK20-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 16755 // CHECK20-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 16756 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 16757 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 16758 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 16759 // CHECK20-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 16760 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16761 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16762 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16763 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16764 // CHECK20-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16765 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 16766 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16767 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16768 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 16769 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16770 // CHECK20: cond.true: 16771 // CHECK20-NEXT: br label [[COND_END:%.*]] 16772 // CHECK20: cond.false: 16773 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16774 // CHECK20-NEXT: br label [[COND_END]] 16775 // CHECK20: cond.end: 16776 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 16777 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16778 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16779 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 16780 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16781 // CHECK20: omp.inner.for.cond: 16782 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16783 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16784 // CHECK20-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 16785 // CHECK20-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16786 // CHECK20: omp.inner.for.body: 16787 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16788 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 16789 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16790 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 16791 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4 16792 // CHECK20-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double 16793 // CHECK20-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00 16794 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 16795 // CHECK20-NEXT: store double [[ADD4]], double* [[A]], align 4 16796 // CHECK20-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 16797 // CHECK20-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4 16798 // CHECK20-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 16799 // CHECK20-NEXT: store double [[INC]], double* [[A5]], align 4 16800 // CHECK20-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16 16801 // CHECK20-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]] 16802 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]] 16803 // CHECK20-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 16804 // CHECK20-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2 16805 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16806 // CHECK20: omp.body.continue: 16807 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16808 // CHECK20: omp.inner.for.inc: 16809 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16810 // CHECK20-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 16811 // CHECK20-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 16812 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 16813 // CHECK20: omp.inner.for.end: 16814 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16815 // CHECK20: omp.loop.exit: 16816 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 16817 // CHECK20-NEXT: ret void 16818 // 16819 // 16820 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 16821 // CHECK20-SAME: (i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 16822 // CHECK20-NEXT: entry: 16823 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 16824 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 16825 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 16826 // CHECK20-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 16827 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 16828 // CHECK20-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 16829 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 16830 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 16831 // CHECK20-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 16832 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 16833 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 16834 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 16835 // CHECK20-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 16836 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 16837 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 16838 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 16839 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 16840 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 16841 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 16842 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 16843 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4 16844 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4 16845 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4 16846 // CHECK20-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 2 16847 // CHECK20-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 16848 // CHECK20-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2 16849 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4 16850 // CHECK20-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 1 16851 // CHECK20-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 16852 // CHECK20-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1 16853 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 16854 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]]) 16855 // CHECK20-NEXT: ret void 16856 // 16857 // 16858 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..15 16859 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 16860 // CHECK20-NEXT: entry: 16861 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16862 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16863 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 16864 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 16865 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 16866 // CHECK20-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 16867 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 16868 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16869 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 16870 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16871 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 16872 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 16873 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 16874 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16875 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16876 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16877 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16878 // CHECK20-NEXT: [[I6:%.*]] = alloca i32, align 4 16879 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16880 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16881 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 16882 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 16883 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 16884 // CHECK20-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 16885 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 16886 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 16887 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 16888 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 16889 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 16890 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 16891 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 16892 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 16893 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16894 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16895 // CHECK20-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 16896 // CHECK20-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 16897 // CHECK20-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 16898 // CHECK20-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 16899 // CHECK20-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 16900 // CHECK20-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 16901 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16902 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 16903 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16904 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16905 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 16906 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 16907 // CHECK20: omp.precond.then: 16908 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16909 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 16910 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 16911 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16912 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16913 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16914 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 16915 // CHECK20-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16916 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16917 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 16918 // CHECK20-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 16919 // CHECK20-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16920 // CHECK20: cond.true: 16921 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 16922 // CHECK20-NEXT: br label [[COND_END:%.*]] 16923 // CHECK20: cond.false: 16924 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16925 // CHECK20-NEXT: br label [[COND_END]] 16926 // CHECK20: cond.end: 16927 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 16928 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16929 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16930 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 16931 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16932 // CHECK20: omp.inner.for.cond: 16933 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16934 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16935 // CHECK20-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1 16936 // CHECK20-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]] 16937 // CHECK20-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16938 // CHECK20: omp.inner.for.body: 16939 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16940 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16941 // CHECK20-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 16942 // CHECK20-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]] 16943 // CHECK20-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4 16944 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4 16945 // CHECK20-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 16946 // CHECK20-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4 16947 // CHECK20-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 2 16948 // CHECK20-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32 16949 // CHECK20-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1 16950 // CHECK20-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16 16951 // CHECK20-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 2 16952 // CHECK20-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 1 16953 // CHECK20-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32 16954 // CHECK20-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1 16955 // CHECK20-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8 16956 // CHECK20-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 1 16957 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 16958 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 16959 // CHECK20-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1 16960 // CHECK20-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4 16961 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16962 // CHECK20: omp.body.continue: 16963 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16964 // CHECK20: omp.inner.for.inc: 16965 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16966 // CHECK20-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1 16967 // CHECK20-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 16968 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 16969 // CHECK20: omp.inner.for.end: 16970 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16971 // CHECK20: omp.loop.exit: 16972 // CHECK20-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16973 // CHECK20-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 16974 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 16975 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 16976 // CHECK20: omp.precond.end: 16977 // CHECK20-NEXT: ret void 16978 // 16979 // 16980 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 16981 // CHECK20-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 16982 // CHECK20-NEXT: entry: 16983 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 16984 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 16985 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 16986 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 16987 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 16988 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 16989 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 16990 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 16991 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 16992 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 16993 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 16994 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4 16995 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4 16996 // CHECK20-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 16997 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 16998 // CHECK20-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2 16999 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 17000 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]]) 17001 // CHECK20-NEXT: ret void 17002 // 17003 // 17004 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..18 17005 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 17006 // CHECK20-NEXT: entry: 17007 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 17008 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 17009 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 17010 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 17011 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 17012 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17013 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 17014 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17015 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17016 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17017 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17018 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 17019 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17020 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17021 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 17022 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 17023 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 17024 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 17025 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 17026 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17027 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 17028 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17029 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17030 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17031 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 17032 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17033 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17034 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 17035 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17036 // CHECK20: cond.true: 17037 // CHECK20-NEXT: br label [[COND_END:%.*]] 17038 // CHECK20: cond.false: 17039 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17040 // CHECK20-NEXT: br label [[COND_END]] 17041 // CHECK20: cond.end: 17042 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 17043 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17044 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17045 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 17046 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17047 // CHECK20: omp.inner.for.cond: 17048 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17049 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17050 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 17051 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17052 // CHECK20: omp.inner.for.body: 17053 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17054 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 17055 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17056 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 17057 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 17058 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1 17059 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 17060 // CHECK20-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 2 17061 // CHECK20-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32 17062 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 17063 // CHECK20-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 17064 // CHECK20-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 17065 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 17066 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 17067 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1 17068 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 17069 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17070 // CHECK20: omp.body.continue: 17071 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17072 // CHECK20: omp.inner.for.inc: 17073 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17074 // CHECK20-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 17075 // CHECK20-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 17076 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 17077 // CHECK20: omp.inner.for.end: 17078 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17079 // CHECK20: omp.loop.exit: 17080 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 17081 // CHECK20-NEXT: ret void 17082 // 17083 // 17084 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 17085 // CHECK20-SAME: () #[[ATTR4]] { 17086 // CHECK20-NEXT: entry: 17087 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1) 17088 // CHECK20-NEXT: ret void 17089 // 17090 // 17091 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 17092 // CHECK25-SAME: (i64 noundef [[AA:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 17093 // CHECK25-NEXT: entry: 17094 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17095 // CHECK25-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 17096 // CHECK25-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 17097 // CHECK25-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 17098 // CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 17099 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17100 // CHECK25-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 17101 // CHECK25-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 17102 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17103 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 17104 // CHECK25-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 17105 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 4 17106 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 4 17107 // CHECK25-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 17108 // CHECK25-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 17109 // CHECK25-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 17110 // CHECK25-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2 17111 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 17112 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]]) 17113 // CHECK25-NEXT: ret void 17114 // 17115 // 17116 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined. 17117 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 17118 // CHECK25-NEXT: entry: 17119 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17120 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17121 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17122 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17123 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 17124 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17125 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17126 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17127 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17128 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 17129 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17130 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17131 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17132 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17133 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17134 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 17135 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17136 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17137 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17138 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 17139 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17140 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17141 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 17142 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17143 // CHECK25: cond.true: 17144 // CHECK25-NEXT: br label [[COND_END:%.*]] 17145 // CHECK25: cond.false: 17146 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17147 // CHECK25-NEXT: br label [[COND_END]] 17148 // CHECK25: cond.end: 17149 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 17150 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17151 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17152 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 17153 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17154 // CHECK25: omp.inner.for.cond: 17155 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17156 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17157 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 17158 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17159 // CHECK25: omp.inner.for.body: 17160 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17161 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 17162 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17163 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4 17164 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17165 // CHECK25: omp.body.continue: 17166 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17167 // CHECK25: omp.inner.for.inc: 17168 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17169 // CHECK25-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 17170 // CHECK25-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 17171 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 17172 // CHECK25: omp.inner.for.end: 17173 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17174 // CHECK25: omp.loop.exit: 17175 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 17176 // CHECK25-NEXT: ret void 17177 // 17178 // 17179 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 17180 // CHECK25-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR0]] { 17181 // CHECK25-NEXT: entry: 17182 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17183 // CHECK25-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 17184 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17185 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17186 // CHECK25-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 17187 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 17188 // CHECK25-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 17189 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8 17190 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 17191 // CHECK25-NEXT: ret void 17192 // 17193 // 17194 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1 17195 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 17196 // CHECK25-NEXT: entry: 17197 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17198 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17199 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17200 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17201 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 17202 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17203 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17204 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17205 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17206 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 17207 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17208 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17209 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17210 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17211 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17212 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 17213 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17214 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17215 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17216 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 17217 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17218 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17219 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 17220 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17221 // CHECK25: cond.true: 17222 // CHECK25-NEXT: br label [[COND_END:%.*]] 17223 // CHECK25: cond.false: 17224 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17225 // CHECK25-NEXT: br label [[COND_END]] 17226 // CHECK25: cond.end: 17227 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 17228 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17229 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17230 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 17231 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17232 // CHECK25: omp.inner.for.cond: 17233 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17234 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17235 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 17236 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17237 // CHECK25: omp.inner.for.body: 17238 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17239 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 17240 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17241 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4 17242 // CHECK25-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 17243 // CHECK25-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 17244 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 17245 // CHECK25-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 17246 // CHECK25-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 17247 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17248 // CHECK25: omp.body.continue: 17249 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17250 // CHECK25: omp.inner.for.inc: 17251 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17252 // CHECK25-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 17253 // CHECK25-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 17254 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 17255 // CHECK25: omp.inner.for.end: 17256 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17257 // CHECK25: omp.loop.exit: 17258 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 17259 // CHECK25-NEXT: ret void 17260 // 17261 // 17262 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 17263 // CHECK25-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 17264 // CHECK25-NEXT: entry: 17265 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 17266 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17267 // CHECK25-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 17268 // CHECK25-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 17269 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 17270 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17271 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 17272 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17273 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 17274 // CHECK25-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 17275 // CHECK25-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4 17276 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 17277 // CHECK25-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 2 17278 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 17279 // CHECK25-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2 17280 // CHECK25-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 17281 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]]) 17282 // CHECK25-NEXT: ret void 17283 // 17284 // 17285 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..2 17286 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 17287 // CHECK25-NEXT: entry: 17288 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17289 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17290 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 17291 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17292 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17293 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 17294 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17295 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17296 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17297 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17298 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 17299 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17300 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17301 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 17302 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17303 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 17304 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17305 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17306 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 17307 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17308 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17309 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17310 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 17311 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17312 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17313 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 17314 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17315 // CHECK25: cond.true: 17316 // CHECK25-NEXT: br label [[COND_END:%.*]] 17317 // CHECK25: cond.false: 17318 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17319 // CHECK25-NEXT: br label [[COND_END]] 17320 // CHECK25: cond.end: 17321 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 17322 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17323 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17324 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 17325 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17326 // CHECK25: omp.inner.for.cond: 17327 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17328 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17329 // CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 17330 // CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17331 // CHECK25: omp.inner.for.body: 17332 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17333 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 17334 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17335 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4 17336 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 17337 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 17338 // CHECK25-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 17339 // CHECK25-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 2 17340 // CHECK25-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32 17341 // CHECK25-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 17342 // CHECK25-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 17343 // CHECK25-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 17344 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17345 // CHECK25: omp.body.continue: 17346 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17347 // CHECK25: omp.inner.for.inc: 17348 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17349 // CHECK25-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1 17350 // CHECK25-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 17351 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 17352 // CHECK25: omp.inner.for.end: 17353 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17354 // CHECK25: omp.loop.exit: 17355 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 17356 // CHECK25-NEXT: ret void 17357 // 17358 // 17359 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 17360 // CHECK25-SAME: (i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 17361 // CHECK25-NEXT: entry: 17362 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 17363 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 17364 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17365 // CHECK25-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 17366 // CHECK25-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 17367 // CHECK25-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 17368 // CHECK25-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 17369 // CHECK25-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 17370 // CHECK25-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 17371 // CHECK25-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 17372 // CHECK25-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 17373 // CHECK25-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 17374 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 17375 // CHECK25-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 17376 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17377 // CHECK25-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 17378 // CHECK25-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 17379 // CHECK25-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 17380 // CHECK25-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 17381 // CHECK25-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 17382 // CHECK25-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 17383 // CHECK25-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 17384 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 17385 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 17386 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17387 // CHECK25-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 17388 // CHECK25-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 17389 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 17390 // CHECK25-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 17391 // CHECK25-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 17392 // CHECK25-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 17393 // CHECK25-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 17394 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 17395 // CHECK25-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 17396 // CHECK25-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4 17397 // CHECK25-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8 17398 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 4 17399 // CHECK25-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 17400 // CHECK25-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4 17401 // CHECK25-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 17402 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]]) 17403 // CHECK25-NEXT: ret void 17404 // 17405 // 17406 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..3 17407 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 17408 // CHECK25-NEXT: entry: 17409 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17410 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17411 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 17412 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 17413 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17414 // CHECK25-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 17415 // CHECK25-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 17416 // CHECK25-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 17417 // CHECK25-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 17418 // CHECK25-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 17419 // CHECK25-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 17420 // CHECK25-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 17421 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17422 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 17423 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17424 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17425 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17426 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17427 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 17428 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17429 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17430 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 17431 // CHECK25-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 17432 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17433 // CHECK25-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 17434 // CHECK25-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 17435 // CHECK25-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 17436 // CHECK25-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 17437 // CHECK25-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 17438 // CHECK25-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 17439 // CHECK25-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 17440 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 17441 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 17442 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17443 // CHECK25-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 17444 // CHECK25-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 17445 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 17446 // CHECK25-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 17447 // CHECK25-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 17448 // CHECK25-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 17449 // CHECK25-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 17450 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17451 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 17452 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17453 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17454 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 4 17455 // CHECK25-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17456 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 17457 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 17458 // CHECK25-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 17459 // CHECK25: omp.dispatch.cond: 17460 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17461 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 17462 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17463 // CHECK25: cond.true: 17464 // CHECK25-NEXT: br label [[COND_END:%.*]] 17465 // CHECK25: cond.false: 17466 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17467 // CHECK25-NEXT: br label [[COND_END]] 17468 // CHECK25: cond.end: 17469 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 17470 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17471 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17472 // CHECK25-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 17473 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17474 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17475 // CHECK25-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 17476 // CHECK25-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 17477 // CHECK25: omp.dispatch.body: 17478 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17479 // CHECK25: omp.inner.for.cond: 17480 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 17481 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 17482 // CHECK25-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 17483 // CHECK25-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17484 // CHECK25: omp.inner.for.body: 17485 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 17486 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 17487 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17488 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 17489 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !13 17490 // CHECK25-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 17491 // CHECK25-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group !13 17492 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2 17493 // CHECK25-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !13 17494 // CHECK25-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double 17495 // CHECK25-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00 17496 // CHECK25-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float 17497 // CHECK25-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !13 17498 // CHECK25-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3 17499 // CHECK25-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !13 17500 // CHECK25-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double 17501 // CHECK25-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00 17502 // CHECK25-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float 17503 // CHECK25-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !13 17504 // CHECK25-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1 17505 // CHECK25-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2 17506 // CHECK25-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !13 17507 // CHECK25-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00 17508 // CHECK25-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !13 17509 // CHECK25-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]] 17510 // CHECK25-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]] 17511 // CHECK25-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3 17512 // CHECK25-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !13 17513 // CHECK25-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00 17514 // CHECK25-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !13 17515 // CHECK25-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 17516 // CHECK25-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !13 17517 // CHECK25-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1 17518 // CHECK25-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !13 17519 // CHECK25-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 17520 // CHECK25-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !13 17521 // CHECK25-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32 17522 // CHECK25-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1 17523 // CHECK25-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8 17524 // CHECK25-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !13 17525 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17526 // CHECK25: omp.body.continue: 17527 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17528 // CHECK25: omp.inner.for.inc: 17529 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 17530 // CHECK25-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1 17531 // CHECK25-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 17532 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 17533 // CHECK25: omp.inner.for.end: 17534 // CHECK25-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 17535 // CHECK25: omp.dispatch.inc: 17536 // CHECK25-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17537 // CHECK25-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17538 // CHECK25-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 17539 // CHECK25-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4 17540 // CHECK25-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17541 // CHECK25-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17542 // CHECK25-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 17543 // CHECK25-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4 17544 // CHECK25-NEXT: br label [[OMP_DISPATCH_COND]] 17545 // CHECK25: omp.dispatch.end: 17546 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 17547 // CHECK25-NEXT: ret void 17548 // 17549 // 17550 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 17551 // CHECK25-SAME: (i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 17552 // CHECK25-NEXT: entry: 17553 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 17554 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 17555 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17556 // CHECK25-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 17557 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 17558 // CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 17559 // CHECK25-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 17560 // CHECK25-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 17561 // CHECK25-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 17562 // CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 17563 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 17564 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17565 // CHECK25-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 17566 // CHECK25-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 17567 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 17568 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 17569 // CHECK25-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17570 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 17571 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 17572 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 17573 // CHECK25-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32* 17574 // CHECK25-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4 17575 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 17576 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 17577 // CHECK25-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32* 17578 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4 17579 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8 17580 // CHECK25-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 2 17581 // CHECK25-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 17582 // CHECK25-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2 17583 // CHECK25-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8 17584 // CHECK25-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 1 17585 // CHECK25-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 17586 // CHECK25-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1 17587 // CHECK25-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 17588 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]]) 17589 // CHECK25-NEXT: ret void 17590 // 17591 // 17592 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..4 17593 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 17594 // CHECK25-NEXT: entry: 17595 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17596 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17597 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 17598 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 17599 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17600 // CHECK25-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 17601 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 17602 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17603 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 17604 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17605 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 17606 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 17607 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 17608 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17609 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17610 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17611 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17612 // CHECK25-NEXT: [[I8:%.*]] = alloca i32, align 4 17613 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17614 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17615 // CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 17616 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 17617 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17618 // CHECK25-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 17619 // CHECK25-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 17620 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 17621 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 17622 // CHECK25-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17623 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 17624 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 17625 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4 17626 // CHECK25-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 17627 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 17628 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4 17629 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 17630 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17631 // CHECK25-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 17632 // CHECK25-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 17633 // CHECK25-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 17634 // CHECK25-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 17635 // CHECK25-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 17636 // CHECK25-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 17637 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17638 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 17639 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17640 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 17641 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 17642 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17643 // CHECK25: omp.precond.then: 17644 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17645 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 17646 // CHECK25-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 17647 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17648 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17649 // CHECK25-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17650 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 17651 // CHECK25-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17652 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17653 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 17654 // CHECK25-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 17655 // CHECK25-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17656 // CHECK25: cond.true: 17657 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 17658 // CHECK25-NEXT: br label [[COND_END:%.*]] 17659 // CHECK25: cond.false: 17660 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17661 // CHECK25-NEXT: br label [[COND_END]] 17662 // CHECK25: cond.end: 17663 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 17664 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17665 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17666 // CHECK25-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 17667 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17668 // CHECK25: omp.inner.for.cond: 17669 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17670 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17671 // CHECK25-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1 17672 // CHECK25-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]] 17673 // CHECK25-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17674 // CHECK25: omp.inner.for.body: 17675 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17676 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17677 // CHECK25-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 17678 // CHECK25-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]] 17679 // CHECK25-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4 17680 // CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4 17681 // CHECK25-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1 17682 // CHECK25-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 4 17683 // CHECK25-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 2 17684 // CHECK25-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32 17685 // CHECK25-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 17686 // CHECK25-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16 17687 // CHECK25-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 2 17688 // CHECK25-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 1 17689 // CHECK25-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32 17690 // CHECK25-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1 17691 // CHECK25-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8 17692 // CHECK25-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 1 17693 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 17694 // CHECK25-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 17695 // CHECK25-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1 17696 // CHECK25-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4 17697 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17698 // CHECK25: omp.body.continue: 17699 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17700 // CHECK25: omp.inner.for.inc: 17701 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17702 // CHECK25-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1 17703 // CHECK25-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 17704 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 17705 // CHECK25: omp.inner.for.end: 17706 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17707 // CHECK25: omp.loop.exit: 17708 // CHECK25-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17709 // CHECK25-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 17710 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 17711 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 17712 // CHECK25: omp.precond.end: 17713 // CHECK25-NEXT: ret void 17714 // 17715 // 17716 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 17717 // CHECK25-SAME: (%struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 17718 // CHECK25-NEXT: entry: 17719 // CHECK25-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 17720 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 17721 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17722 // CHECK25-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 17723 // CHECK25-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 17724 // CHECK25-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 17725 // CHECK25-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 17726 // CHECK25-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 17727 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17728 // CHECK25-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 17729 // CHECK25-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 17730 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 17731 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 17732 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17733 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 17734 // CHECK25-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 17735 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 17736 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32* 17737 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 17738 // CHECK25-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8 17739 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]]) 17740 // CHECK25-NEXT: ret void 17741 // 17742 // 17743 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..5 17744 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 17745 // CHECK25-NEXT: entry: 17746 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17747 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17748 // CHECK25-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 17749 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 17750 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17751 // CHECK25-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 17752 // CHECK25-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 17753 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17754 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 17755 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17756 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17757 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17758 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17759 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 17760 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17761 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17762 // CHECK25-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 17763 // CHECK25-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 17764 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17765 // CHECK25-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 17766 // CHECK25-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 17767 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 17768 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 17769 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17770 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 17771 // CHECK25-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 17772 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17773 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 17774 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17775 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17776 // CHECK25-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17777 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 17778 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17779 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17780 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 17781 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17782 // CHECK25: cond.true: 17783 // CHECK25-NEXT: br label [[COND_END:%.*]] 17784 // CHECK25: cond.false: 17785 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17786 // CHECK25-NEXT: br label [[COND_END]] 17787 // CHECK25: cond.end: 17788 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 17789 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17790 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17791 // CHECK25-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 17792 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17793 // CHECK25: omp.inner.for.cond: 17794 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17795 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17796 // CHECK25-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 17797 // CHECK25-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17798 // CHECK25: omp.inner.for.body: 17799 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17800 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 17801 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17802 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4 17803 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 17804 // CHECK25-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double 17805 // CHECK25-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00 17806 // CHECK25-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 17807 // CHECK25-NEXT: store double [[ADD5]], double* [[A]], align 8 17808 // CHECK25-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 17809 // CHECK25-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8 17810 // CHECK25-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 17811 // CHECK25-NEXT: store double [[INC]], double* [[A6]], align 8 17812 // CHECK25-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16 17813 // CHECK25-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]] 17814 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]] 17815 // CHECK25-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 17816 // CHECK25-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2 17817 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17818 // CHECK25: omp.body.continue: 17819 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17820 // CHECK25: omp.inner.for.inc: 17821 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17822 // CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 17823 // CHECK25-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 17824 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 17825 // CHECK25: omp.inner.for.end: 17826 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17827 // CHECK25: omp.loop.exit: 17828 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 17829 // CHECK25-NEXT: ret void 17830 // 17831 // 17832 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 17833 // CHECK25-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 17834 // CHECK25-NEXT: entry: 17835 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 17836 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17837 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 17838 // CHECK25-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 17839 // CHECK25-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 17840 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 17841 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17842 // CHECK25-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 17843 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 17844 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17845 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 17846 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 17847 // CHECK25-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 17848 // CHECK25-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4 17849 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8 17850 // CHECK25-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 2 17851 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 17852 // CHECK25-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 17853 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 17854 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]]) 17855 // CHECK25-NEXT: ret void 17856 // 17857 // 17858 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..6 17859 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 17860 // CHECK25-NEXT: entry: 17861 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17862 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17863 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 17864 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17865 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 17866 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17867 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 17868 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17869 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17870 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17871 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17872 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 17873 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17874 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17875 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 17876 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17877 // CHECK25-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 17878 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 17879 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17880 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 17881 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17882 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 17883 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17884 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17885 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17886 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 17887 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17888 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17889 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 17890 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17891 // CHECK25: cond.true: 17892 // CHECK25-NEXT: br label [[COND_END:%.*]] 17893 // CHECK25: cond.false: 17894 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17895 // CHECK25-NEXT: br label [[COND_END]] 17896 // CHECK25: cond.end: 17897 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 17898 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17899 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17900 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 17901 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17902 // CHECK25: omp.inner.for.cond: 17903 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17904 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17905 // CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 17906 // CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17907 // CHECK25: omp.inner.for.body: 17908 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17909 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 17910 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17911 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4 17912 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 17913 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 17914 // CHECK25-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 17915 // CHECK25-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 2 17916 // CHECK25-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32 17917 // CHECK25-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 17918 // CHECK25-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 17919 // CHECK25-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 17920 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 17921 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 17922 // CHECK25-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1 17923 // CHECK25-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4 17924 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17925 // CHECK25: omp.body.continue: 17926 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17927 // CHECK25: omp.inner.for.inc: 17928 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17929 // CHECK25-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1 17930 // CHECK25-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 17931 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]] 17932 // CHECK25: omp.inner.for.end: 17933 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17934 // CHECK25: omp.loop.exit: 17935 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 17936 // CHECK25-NEXT: ret void 17937 // 17938 // 17939 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 17940 // CHECK26-SAME: (i64 noundef [[AA:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 17941 // CHECK26-NEXT: entry: 17942 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17943 // CHECK26-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 17944 // CHECK26-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 17945 // CHECK26-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 17946 // CHECK26-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 17947 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17948 // CHECK26-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 17949 // CHECK26-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 17950 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17951 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 17952 // CHECK26-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 17953 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 4 17954 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 4 17955 // CHECK26-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 17956 // CHECK26-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 17957 // CHECK26-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 17958 // CHECK26-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2 17959 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 17960 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]]) 17961 // CHECK26-NEXT: ret void 17962 // 17963 // 17964 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined. 17965 // CHECK26-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 17966 // CHECK26-NEXT: entry: 17967 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17968 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17969 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 17970 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17971 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 17972 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17973 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17974 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17975 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17976 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 17977 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17978 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17979 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 17980 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 17981 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17982 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 17983 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17984 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17985 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17986 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 17987 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17988 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17989 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 17990 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17991 // CHECK26: cond.true: 17992 // CHECK26-NEXT: br label [[COND_END:%.*]] 17993 // CHECK26: cond.false: 17994 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17995 // CHECK26-NEXT: br label [[COND_END]] 17996 // CHECK26: cond.end: 17997 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 17998 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17999 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18000 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 18001 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18002 // CHECK26: omp.inner.for.cond: 18003 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18004 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18005 // CHECK26-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 18006 // CHECK26-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18007 // CHECK26: omp.inner.for.body: 18008 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18009 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 18010 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18011 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4 18012 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18013 // CHECK26: omp.body.continue: 18014 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18015 // CHECK26: omp.inner.for.inc: 18016 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18017 // CHECK26-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 18018 // CHECK26-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 18019 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 18020 // CHECK26: omp.inner.for.end: 18021 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18022 // CHECK26: omp.loop.exit: 18023 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 18024 // CHECK26-NEXT: ret void 18025 // 18026 // 18027 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 18028 // CHECK26-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR0]] { 18029 // CHECK26-NEXT: entry: 18030 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 18031 // CHECK26-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 18032 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 18033 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 18034 // CHECK26-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 18035 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 18036 // CHECK26-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 18037 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8 18038 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP1]]) 18039 // CHECK26-NEXT: ret void 18040 // 18041 // 18042 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..1 18043 // CHECK26-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 18044 // CHECK26-NEXT: entry: 18045 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18046 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18047 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 18048 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18049 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 18050 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18051 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18052 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18053 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18054 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 18055 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18056 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18057 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 18058 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 18059 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18060 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18061 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18062 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18063 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18064 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 18065 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18066 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18067 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 18068 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18069 // CHECK26: cond.true: 18070 // CHECK26-NEXT: br label [[COND_END:%.*]] 18071 // CHECK26: cond.false: 18072 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18073 // CHECK26-NEXT: br label [[COND_END]] 18074 // CHECK26: cond.end: 18075 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 18076 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18077 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18078 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 18079 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18080 // CHECK26: omp.inner.for.cond: 18081 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18082 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18083 // CHECK26-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 18084 // CHECK26-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18085 // CHECK26: omp.inner.for.body: 18086 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18087 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 18088 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18089 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4 18090 // CHECK26-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 18091 // CHECK26-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 18092 // CHECK26-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 18093 // CHECK26-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 18094 // CHECK26-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 18095 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18096 // CHECK26: omp.body.continue: 18097 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18098 // CHECK26: omp.inner.for.inc: 18099 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18100 // CHECK26-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 18101 // CHECK26-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 18102 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 18103 // CHECK26: omp.inner.for.end: 18104 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18105 // CHECK26: omp.loop.exit: 18106 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 18107 // CHECK26-NEXT: ret void 18108 // 18109 // 18110 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 18111 // CHECK26-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 18112 // CHECK26-NEXT: entry: 18113 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 18114 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 18115 // CHECK26-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 18116 // CHECK26-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 18117 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 18118 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 18119 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 18120 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 18121 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4 18122 // CHECK26-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 18123 // CHECK26-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4 18124 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 18125 // CHECK26-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 2 18126 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 18127 // CHECK26-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2 18128 // CHECK26-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 18129 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]]) 18130 // CHECK26-NEXT: ret void 18131 // 18132 // 18133 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..2 18134 // CHECK26-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] { 18135 // CHECK26-NEXT: entry: 18136 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18137 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18138 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 18139 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 18140 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18141 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 18142 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18143 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18144 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18145 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18146 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 18147 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18148 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18149 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 18150 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 18151 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 18152 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 18153 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18154 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18155 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18156 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18157 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18158 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 18159 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18160 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18161 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 18162 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18163 // CHECK26: cond.true: 18164 // CHECK26-NEXT: br label [[COND_END:%.*]] 18165 // CHECK26: cond.false: 18166 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18167 // CHECK26-NEXT: br label [[COND_END]] 18168 // CHECK26: cond.end: 18169 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 18170 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18171 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18172 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 18173 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18174 // CHECK26: omp.inner.for.cond: 18175 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18176 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18177 // CHECK26-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 18178 // CHECK26-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18179 // CHECK26: omp.inner.for.body: 18180 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18181 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 18182 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18183 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4 18184 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 18185 // CHECK26-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 18186 // CHECK26-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 18187 // CHECK26-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 2 18188 // CHECK26-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32 18189 // CHECK26-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 18190 // CHECK26-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 18191 // CHECK26-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 18192 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18193 // CHECK26: omp.body.continue: 18194 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18195 // CHECK26: omp.inner.for.inc: 18196 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18197 // CHECK26-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1 18198 // CHECK26-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 18199 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 18200 // CHECK26: omp.inner.for.end: 18201 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18202 // CHECK26: omp.loop.exit: 18203 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 18204 // CHECK26-NEXT: ret void 18205 // 18206 // 18207 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 18208 // CHECK26-SAME: (i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 18209 // CHECK26-NEXT: entry: 18210 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 18211 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 18212 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18213 // CHECK26-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 18214 // CHECK26-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 18215 // CHECK26-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 18216 // CHECK26-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 18217 // CHECK26-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 18218 // CHECK26-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 18219 // CHECK26-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 18220 // CHECK26-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 18221 // CHECK26-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 18222 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 18223 // CHECK26-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 18224 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18225 // CHECK26-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 18226 // CHECK26-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 18227 // CHECK26-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 18228 // CHECK26-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 18229 // CHECK26-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 18230 // CHECK26-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 18231 // CHECK26-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 18232 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 18233 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 18234 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18235 // CHECK26-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 18236 // CHECK26-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 18237 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 18238 // CHECK26-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 18239 // CHECK26-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 18240 // CHECK26-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 18241 // CHECK26-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 18242 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 4 18243 // CHECK26-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32* 18244 // CHECK26-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4 18245 // CHECK26-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8 18246 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 4 18247 // CHECK26-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 18248 // CHECK26-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4 18249 // CHECK26-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 18250 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]]) 18251 // CHECK26-NEXT: ret void 18252 // 18253 // 18254 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..3 18255 // CHECK26-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 8 dereferenceable(400) [[C:%.*]], i64 noundef [[VLA1:%.*]], i64 noundef [[VLA3:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 8 dereferenceable(16) [[D:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 18256 // CHECK26-NEXT: entry: 18257 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18258 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18259 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 18260 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 18261 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18262 // CHECK26-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 18263 // CHECK26-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 18264 // CHECK26-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 18265 // CHECK26-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 18266 // CHECK26-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 18267 // CHECK26-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 18268 // CHECK26-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 18269 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18270 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 18271 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18272 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18273 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18274 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18275 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 18276 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18277 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18278 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 18279 // CHECK26-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 18280 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18281 // CHECK26-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 18282 // CHECK26-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 18283 // CHECK26-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 18284 // CHECK26-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 18285 // CHECK26-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 18286 // CHECK26-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 18287 // CHECK26-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 18288 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 18289 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 18290 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18291 // CHECK26-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 18292 // CHECK26-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 18293 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 18294 // CHECK26-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 18295 // CHECK26-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 18296 // CHECK26-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 18297 // CHECK26-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 18298 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18299 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18300 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18301 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18302 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 4 18303 // CHECK26-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18304 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 18305 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 18306 // CHECK26-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 18307 // CHECK26: omp.dispatch.cond: 18308 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18309 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 18310 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18311 // CHECK26: cond.true: 18312 // CHECK26-NEXT: br label [[COND_END:%.*]] 18313 // CHECK26: cond.false: 18314 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18315 // CHECK26-NEXT: br label [[COND_END]] 18316 // CHECK26: cond.end: 18317 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 18318 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18319 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18320 // CHECK26-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 18321 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18322 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18323 // CHECK26-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 18324 // CHECK26-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 18325 // CHECK26: omp.dispatch.body: 18326 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18327 // CHECK26: omp.inner.for.cond: 18328 // CHECK26-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 18329 // CHECK26-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 18330 // CHECK26-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 18331 // CHECK26-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18332 // CHECK26: omp.inner.for.body: 18333 // CHECK26-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 18334 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 18335 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18336 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 18337 // CHECK26-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !13 18338 // CHECK26-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 18339 // CHECK26-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 4, !llvm.access.group !13 18340 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2 18341 // CHECK26-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !13 18342 // CHECK26-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double 18343 // CHECK26-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00 18344 // CHECK26-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float 18345 // CHECK26-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !13 18346 // CHECK26-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3 18347 // CHECK26-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !13 18348 // CHECK26-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double 18349 // CHECK26-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00 18350 // CHECK26-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float 18351 // CHECK26-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !13 18352 // CHECK26-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1 18353 // CHECK26-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2 18354 // CHECK26-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !13 18355 // CHECK26-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00 18356 // CHECK26-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !13 18357 // CHECK26-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]] 18358 // CHECK26-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]] 18359 // CHECK26-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3 18360 // CHECK26-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !13 18361 // CHECK26-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00 18362 // CHECK26-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !13 18363 // CHECK26-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 18364 // CHECK26-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !13 18365 // CHECK26-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1 18366 // CHECK26-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !13 18367 // CHECK26-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 18368 // CHECK26-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !13 18369 // CHECK26-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32 18370 // CHECK26-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1 18371 // CHECK26-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8 18372 // CHECK26-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !13 18373 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18374 // CHECK26: omp.body.continue: 18375 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18376 // CHECK26: omp.inner.for.inc: 18377 // CHECK26-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 18378 // CHECK26-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1 18379 // CHECK26-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 18380 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 18381 // CHECK26: omp.inner.for.end: 18382 // CHECK26-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 18383 // CHECK26: omp.dispatch.inc: 18384 // CHECK26-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18385 // CHECK26-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18386 // CHECK26-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 18387 // CHECK26-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4 18388 // CHECK26-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18389 // CHECK26-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18390 // CHECK26-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 18391 // CHECK26-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4 18392 // CHECK26-NEXT: br label [[OMP_DISPATCH_COND]] 18393 // CHECK26: omp.dispatch.end: 18394 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 18395 // CHECK26-NEXT: ret void 18396 // 18397 // 18398 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 18399 // CHECK26-SAME: (i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 18400 // CHECK26-NEXT: entry: 18401 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 18402 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 18403 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 18404 // CHECK26-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 18405 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 18406 // CHECK26-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 18407 // CHECK26-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 18408 // CHECK26-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 18409 // CHECK26-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 18410 // CHECK26-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 18411 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 18412 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 18413 // CHECK26-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 18414 // CHECK26-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 18415 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 18416 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 18417 // CHECK26-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 18418 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 18419 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 18420 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 18421 // CHECK26-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32* 18422 // CHECK26-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4 18423 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8 18424 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4 18425 // CHECK26-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32* 18426 // CHECK26-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4 18427 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8 18428 // CHECK26-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 2 18429 // CHECK26-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 18430 // CHECK26-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2 18431 // CHECK26-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8 18432 // CHECK26-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 1 18433 // CHECK26-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 18434 // CHECK26-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1 18435 // CHECK26-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 18436 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]]) 18437 // CHECK26-NEXT: ret void 18438 // 18439 // 18440 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..4 18441 // CHECK26-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], i64 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 18442 // CHECK26-NEXT: entry: 18443 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18444 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18445 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 18446 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 18447 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 18448 // CHECK26-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 18449 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 18450 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18451 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 18452 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18453 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 18454 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 18455 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 18456 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18457 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18458 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18459 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18460 // CHECK26-NEXT: [[I8:%.*]] = alloca i32, align 4 18461 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18462 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18463 // CHECK26-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 18464 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 18465 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 18466 // CHECK26-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 18467 // CHECK26-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 18468 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 18469 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32* 18470 // CHECK26-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 18471 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 18472 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 18473 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4 18474 // CHECK26-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 18475 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 18476 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4 18477 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 18478 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18479 // CHECK26-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 18480 // CHECK26-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 18481 // CHECK26-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1 18482 // CHECK26-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 18483 // CHECK26-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1 18484 // CHECK26-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4 18485 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18486 // CHECK26-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 18487 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18488 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 18489 // CHECK26-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 18490 // CHECK26-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18491 // CHECK26: omp.precond.then: 18492 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18493 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 18494 // CHECK26-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 18495 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18496 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18497 // CHECK26-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18498 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 18499 // CHECK26-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18500 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18501 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 18502 // CHECK26-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 18503 // CHECK26-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18504 // CHECK26: cond.true: 18505 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 18506 // CHECK26-NEXT: br label [[COND_END:%.*]] 18507 // CHECK26: cond.false: 18508 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18509 // CHECK26-NEXT: br label [[COND_END]] 18510 // CHECK26: cond.end: 18511 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 18512 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18513 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18514 // CHECK26-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 18515 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18516 // CHECK26: omp.inner.for.cond: 18517 // CHECK26-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18518 // CHECK26-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18519 // CHECK26-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1 18520 // CHECK26-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]] 18521 // CHECK26-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18522 // CHECK26: omp.inner.for.body: 18523 // CHECK26-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18524 // CHECK26-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18525 // CHECK26-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 18526 // CHECK26-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]] 18527 // CHECK26-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4 18528 // CHECK26-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4 18529 // CHECK26-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1 18530 // CHECK26-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 4 18531 // CHECK26-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 2 18532 // CHECK26-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32 18533 // CHECK26-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 18534 // CHECK26-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16 18535 // CHECK26-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 2 18536 // CHECK26-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 1 18537 // CHECK26-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32 18538 // CHECK26-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1 18539 // CHECK26-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8 18540 // CHECK26-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 1 18541 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 18542 // CHECK26-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 18543 // CHECK26-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1 18544 // CHECK26-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4 18545 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18546 // CHECK26: omp.body.continue: 18547 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18548 // CHECK26: omp.inner.for.inc: 18549 // CHECK26-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18550 // CHECK26-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1 18551 // CHECK26-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 18552 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 18553 // CHECK26: omp.inner.for.end: 18554 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18555 // CHECK26: omp.loop.exit: 18556 // CHECK26-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18557 // CHECK26-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 18558 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 18559 // CHECK26-NEXT: br label [[OMP_PRECOND_END]] 18560 // CHECK26: omp.precond.end: 18561 // CHECK26-NEXT: ret void 18562 // 18563 // 18564 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 18565 // CHECK26-SAME: (%struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 18566 // CHECK26-NEXT: entry: 18567 // CHECK26-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 18568 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 18569 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18570 // CHECK26-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 18571 // CHECK26-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 18572 // CHECK26-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 18573 // CHECK26-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 18574 // CHECK26-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 18575 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18576 // CHECK26-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 18577 // CHECK26-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 18578 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 18579 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 18580 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18581 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 18582 // CHECK26-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 18583 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 18584 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32* 18585 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 18586 // CHECK26-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8 18587 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]]) 18588 // CHECK26-NEXT: ret void 18589 // 18590 // 18591 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..5 18592 // CHECK26-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 18593 // CHECK26-NEXT: entry: 18594 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18595 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18596 // CHECK26-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 18597 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 18598 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18599 // CHECK26-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 18600 // CHECK26-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 18601 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18602 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 18603 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18604 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18605 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18606 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18607 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 18608 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18609 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18610 // CHECK26-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 18611 // CHECK26-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 18612 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18613 // CHECK26-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 18614 // CHECK26-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 18615 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 18616 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 18617 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18618 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 18619 // CHECK26-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 18620 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18621 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18622 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18623 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18624 // CHECK26-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18625 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 18626 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18627 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18628 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 18629 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18630 // CHECK26: cond.true: 18631 // CHECK26-NEXT: br label [[COND_END:%.*]] 18632 // CHECK26: cond.false: 18633 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18634 // CHECK26-NEXT: br label [[COND_END]] 18635 // CHECK26: cond.end: 18636 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 18637 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18638 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18639 // CHECK26-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 18640 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18641 // CHECK26: omp.inner.for.cond: 18642 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18643 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18644 // CHECK26-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 18645 // CHECK26-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18646 // CHECK26: omp.inner.for.body: 18647 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18648 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 18649 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18650 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4 18651 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 18652 // CHECK26-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double 18653 // CHECK26-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00 18654 // CHECK26-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 18655 // CHECK26-NEXT: store double [[ADD5]], double* [[A]], align 8 18656 // CHECK26-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 18657 // CHECK26-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8 18658 // CHECK26-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 18659 // CHECK26-NEXT: store double [[INC]], double* [[A6]], align 8 18660 // CHECK26-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16 18661 // CHECK26-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]] 18662 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]] 18663 // CHECK26-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 18664 // CHECK26-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2 18665 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18666 // CHECK26: omp.body.continue: 18667 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18668 // CHECK26: omp.inner.for.inc: 18669 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18670 // CHECK26-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1 18671 // CHECK26-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 18672 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 18673 // CHECK26: omp.inner.for.end: 18674 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18675 // CHECK26: omp.loop.exit: 18676 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 18677 // CHECK26-NEXT: ret void 18678 // 18679 // 18680 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 18681 // CHECK26-SAME: (i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 18682 // CHECK26-NEXT: entry: 18683 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 18684 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 18685 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 18686 // CHECK26-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 18687 // CHECK26-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 18688 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 18689 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 18690 // CHECK26-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 18691 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 18692 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 18693 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 18694 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 18695 // CHECK26-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32* 18696 // CHECK26-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4 18697 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8 18698 // CHECK26-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 2 18699 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 18700 // CHECK26-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 18701 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8 18702 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]]) 18703 // CHECK26-NEXT: ret void 18704 // 18705 // 18706 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..6 18707 // CHECK26-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 18708 // CHECK26-NEXT: entry: 18709 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18710 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18711 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 18712 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 18713 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 18714 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18715 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4 18716 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18717 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18718 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18719 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18720 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4 18721 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18722 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18723 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 18724 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 18725 // CHECK26-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 18726 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 18727 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 18728 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 18729 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18730 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18731 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18732 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18733 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18734 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 18735 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18736 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18737 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 18738 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18739 // CHECK26: cond.true: 18740 // CHECK26-NEXT: br label [[COND_END:%.*]] 18741 // CHECK26: cond.false: 18742 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18743 // CHECK26-NEXT: br label [[COND_END]] 18744 // CHECK26: cond.end: 18745 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 18746 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18747 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18748 // CHECK26-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 18749 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18750 // CHECK26: omp.inner.for.cond: 18751 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18752 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18753 // CHECK26-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 18754 // CHECK26-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18755 // CHECK26: omp.inner.for.body: 18756 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18757 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 18758 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18759 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4 18760 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 18761 // CHECK26-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 18762 // CHECK26-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 4 18763 // CHECK26-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 2 18764 // CHECK26-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32 18765 // CHECK26-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1 18766 // CHECK26-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 18767 // CHECK26-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 2 18768 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2 18769 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 18770 // CHECK26-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1 18771 // CHECK26-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4 18772 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18773 // CHECK26: omp.body.continue: 18774 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18775 // CHECK26: omp.inner.for.inc: 18776 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18777 // CHECK26-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1 18778 // CHECK26-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 18779 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]] 18780 // CHECK26: omp.inner.for.end: 18781 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18782 // CHECK26: omp.loop.exit: 18783 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 18784 // CHECK26-NEXT: ret void 18785 // 18786 // 18787 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 18788 // CHECK27-SAME: (i32 noundef [[AA:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 18789 // CHECK27-NEXT: entry: 18790 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 18791 // CHECK27-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 18792 // CHECK27-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 18793 // CHECK27-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 18794 // CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 18795 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 18796 // CHECK27-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 18797 // CHECK27-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 18798 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 18799 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 18800 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 18801 // CHECK27-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 18802 // CHECK27-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 18803 // CHECK27-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 18804 // CHECK27-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 18805 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 18806 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]]) 18807 // CHECK27-NEXT: ret void 18808 // 18809 // 18810 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined. 18811 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 18812 // CHECK27-NEXT: entry: 18813 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 18814 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 18815 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 18816 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18817 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 18818 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18819 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18820 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18821 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18822 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 18823 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 18824 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 18825 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 18826 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 18827 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18828 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18829 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18830 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18831 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18832 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 18833 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18834 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18835 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 18836 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18837 // CHECK27: cond.true: 18838 // CHECK27-NEXT: br label [[COND_END:%.*]] 18839 // CHECK27: cond.false: 18840 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18841 // CHECK27-NEXT: br label [[COND_END]] 18842 // CHECK27: cond.end: 18843 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 18844 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18845 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18846 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 18847 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18848 // CHECK27: omp.inner.for.cond: 18849 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18850 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18851 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 18852 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18853 // CHECK27: omp.inner.for.body: 18854 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18855 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 18856 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18857 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4 18858 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18859 // CHECK27: omp.body.continue: 18860 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18861 // CHECK27: omp.inner.for.inc: 18862 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18863 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 18864 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 18865 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 18866 // CHECK27: omp.inner.for.end: 18867 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18868 // CHECK27: omp.loop.exit: 18869 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 18870 // CHECK27-NEXT: ret void 18871 // 18872 // 18873 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 18874 // CHECK27-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR0]] { 18875 // CHECK27-NEXT: entry: 18876 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 18877 // CHECK27-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 18878 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 18879 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 18880 // CHECK27-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 18881 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 18882 // CHECK27-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 18883 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4 18884 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 18885 // CHECK27-NEXT: ret void 18886 // 18887 // 18888 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1 18889 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 18890 // CHECK27-NEXT: entry: 18891 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 18892 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 18893 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 18894 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18895 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 18896 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18897 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18898 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18899 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18900 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 18901 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 18902 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 18903 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 18904 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 18905 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18906 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18907 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18908 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18909 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18910 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 18911 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18912 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18913 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 18914 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18915 // CHECK27: cond.true: 18916 // CHECK27-NEXT: br label [[COND_END:%.*]] 18917 // CHECK27: cond.false: 18918 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18919 // CHECK27-NEXT: br label [[COND_END]] 18920 // CHECK27: cond.end: 18921 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 18922 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18923 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18924 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 18925 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18926 // CHECK27: omp.inner.for.cond: 18927 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18928 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18929 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 18930 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18931 // CHECK27: omp.inner.for.body: 18932 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18933 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 18934 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18935 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4 18936 // CHECK27-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 18937 // CHECK27-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 18938 // CHECK27-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 18939 // CHECK27-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 18940 // CHECK27-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 18941 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18942 // CHECK27: omp.body.continue: 18943 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18944 // CHECK27: omp.inner.for.inc: 18945 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18946 // CHECK27-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 18947 // CHECK27-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 18948 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 18949 // CHECK27: omp.inner.for.end: 18950 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18951 // CHECK27: omp.loop.exit: 18952 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 18953 // CHECK27-NEXT: ret void 18954 // 18955 // 18956 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 18957 // CHECK27-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 18958 // CHECK27-NEXT: entry: 18959 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 18960 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 18961 // CHECK27-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 18962 // CHECK27-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 18963 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 18964 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 18965 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 18966 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 18967 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 18968 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 18969 // CHECK27-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 2 18970 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 18971 // CHECK27-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 18972 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 18973 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]]) 18974 // CHECK27-NEXT: ret void 18975 // 18976 // 18977 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..2 18978 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 18979 // CHECK27-NEXT: entry: 18980 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 18981 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 18982 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 18983 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 18984 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18985 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 18986 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18987 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18988 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18989 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18990 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 18991 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 18992 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 18993 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 18994 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 18995 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 18996 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18997 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18998 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18999 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19000 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19001 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 19002 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19003 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19004 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 19005 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19006 // CHECK27: cond.true: 19007 // CHECK27-NEXT: br label [[COND_END:%.*]] 19008 // CHECK27: cond.false: 19009 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19010 // CHECK27-NEXT: br label [[COND_END]] 19011 // CHECK27: cond.end: 19012 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 19013 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19014 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19015 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 19016 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19017 // CHECK27: omp.inner.for.cond: 19018 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19019 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19020 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 19021 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19022 // CHECK27: omp.inner.for.body: 19023 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19024 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 19025 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19026 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4 19027 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 19028 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 19029 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 19030 // CHECK27-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 2 19031 // CHECK27-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32 19032 // CHECK27-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 19033 // CHECK27-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 19034 // CHECK27-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 19035 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19036 // CHECK27: omp.body.continue: 19037 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19038 // CHECK27: omp.inner.for.inc: 19039 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19040 // CHECK27-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 19041 // CHECK27-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 19042 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 19043 // CHECK27: omp.inner.for.end: 19044 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19045 // CHECK27: omp.loop.exit: 19046 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 19047 // CHECK27-NEXT: ret void 19048 // 19049 // 19050 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 19051 // CHECK27-SAME: (i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 19052 // CHECK27-NEXT: entry: 19053 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 19054 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 19055 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 19056 // CHECK27-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 19057 // CHECK27-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 19058 // CHECK27-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 19059 // CHECK27-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 19060 // CHECK27-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 19061 // CHECK27-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 19062 // CHECK27-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 19063 // CHECK27-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 19064 // CHECK27-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 19065 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 19066 // CHECK27-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 19067 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 19068 // CHECK27-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 19069 // CHECK27-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 19070 // CHECK27-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 19071 // CHECK27-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 19072 // CHECK27-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 19073 // CHECK27-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 19074 // CHECK27-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 19075 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 19076 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 19077 // CHECK27-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 19078 // CHECK27-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 19079 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 19080 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 19081 // CHECK27-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 19082 // CHECK27-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 19083 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 19084 // CHECK27-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4 19085 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4 19086 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 19087 // CHECK27-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 19088 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 19089 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]]) 19090 // CHECK27-NEXT: ret void 19091 // 19092 // 19093 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..3 19094 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 19095 // CHECK27-NEXT: entry: 19096 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19097 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19098 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 19099 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 19100 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 19101 // CHECK27-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 19102 // CHECK27-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 19103 // CHECK27-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 19104 // CHECK27-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 19105 // CHECK27-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 19106 // CHECK27-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 19107 // CHECK27-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 19108 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19109 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 19110 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19111 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19112 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19113 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19114 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 19115 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19116 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19117 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 19118 // CHECK27-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 19119 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 19120 // CHECK27-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 19121 // CHECK27-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 19122 // CHECK27-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 19123 // CHECK27-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 19124 // CHECK27-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 19125 // CHECK27-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 19126 // CHECK27-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 19127 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 19128 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 19129 // CHECK27-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 19130 // CHECK27-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 19131 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 19132 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 19133 // CHECK27-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 19134 // CHECK27-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 19135 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19136 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19137 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19138 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19139 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 19140 // CHECK27-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19141 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 19142 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 19143 // CHECK27-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 19144 // CHECK27: omp.dispatch.cond: 19145 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19146 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 19147 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19148 // CHECK27: cond.true: 19149 // CHECK27-NEXT: br label [[COND_END:%.*]] 19150 // CHECK27: cond.false: 19151 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19152 // CHECK27-NEXT: br label [[COND_END]] 19153 // CHECK27: cond.end: 19154 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 19155 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19156 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19157 // CHECK27-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 19158 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19159 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19160 // CHECK27-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 19161 // CHECK27-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 19162 // CHECK27: omp.dispatch.body: 19163 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19164 // CHECK27: omp.inner.for.cond: 19165 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 19166 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 19167 // CHECK27-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 19168 // CHECK27-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19169 // CHECK27: omp.inner.for.body: 19170 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 19171 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 19172 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19173 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 19174 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !14 19175 // CHECK27-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 19176 // CHECK27-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !14 19177 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2 19178 // CHECK27-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !14 19179 // CHECK27-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 19180 // CHECK27-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00 19181 // CHECK27-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float 19182 // CHECK27-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !14 19183 // CHECK27-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3 19184 // CHECK27-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !14 19185 // CHECK27-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double 19186 // CHECK27-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00 19187 // CHECK27-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 19188 // CHECK27-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !14 19189 // CHECK27-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1 19190 // CHECK27-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2 19191 // CHECK27-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !14 19192 // CHECK27-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00 19193 // CHECK27-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !14 19194 // CHECK27-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]] 19195 // CHECK27-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]] 19196 // CHECK27-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3 19197 // CHECK27-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !14 19198 // CHECK27-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00 19199 // CHECK27-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !14 19200 // CHECK27-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 19201 // CHECK27-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !14 19202 // CHECK27-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1 19203 // CHECK27-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !14 19204 // CHECK27-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 19205 // CHECK27-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !14 19206 // CHECK27-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32 19207 // CHECK27-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1 19208 // CHECK27-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8 19209 // CHECK27-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !14 19210 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19211 // CHECK27: omp.body.continue: 19212 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19213 // CHECK27: omp.inner.for.inc: 19214 // CHECK27-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 19215 // CHECK27-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1 19216 // CHECK27-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 19217 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 19218 // CHECK27: omp.inner.for.end: 19219 // CHECK27-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 19220 // CHECK27: omp.dispatch.inc: 19221 // CHECK27-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19222 // CHECK27-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19223 // CHECK27-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 19224 // CHECK27-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4 19225 // CHECK27-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19226 // CHECK27-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19227 // CHECK27-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 19228 // CHECK27-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4 19229 // CHECK27-NEXT: br label [[OMP_DISPATCH_COND]] 19230 // CHECK27: omp.dispatch.end: 19231 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 19232 // CHECK27-NEXT: ret void 19233 // 19234 // 19235 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 19236 // CHECK27-SAME: (i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 19237 // CHECK27-NEXT: entry: 19238 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 19239 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 19240 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 19241 // CHECK27-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 19242 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 19243 // CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 19244 // CHECK27-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 19245 // CHECK27-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 19246 // CHECK27-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 19247 // CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 19248 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 19249 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 19250 // CHECK27-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 19251 // CHECK27-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 19252 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 19253 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 19254 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 19255 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 19256 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 19257 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 19258 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4 19259 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4 19260 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4 19261 // CHECK27-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 2 19262 // CHECK27-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 19263 // CHECK27-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2 19264 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4 19265 // CHECK27-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 1 19266 // CHECK27-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 19267 // CHECK27-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1 19268 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 19269 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]]) 19270 // CHECK27-NEXT: ret void 19271 // 19272 // 19273 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..4 19274 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 19275 // CHECK27-NEXT: entry: 19276 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19277 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19278 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 19279 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 19280 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 19281 // CHECK27-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 19282 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 19283 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19284 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 19285 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19286 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 19287 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 19288 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 19289 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19290 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19291 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19292 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19293 // CHECK27-NEXT: [[I6:%.*]] = alloca i32, align 4 19294 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19295 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19296 // CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 19297 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 19298 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 19299 // CHECK27-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 19300 // CHECK27-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 19301 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 19302 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 19303 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 19304 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 19305 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 19306 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 19307 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 19308 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 19309 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19310 // CHECK27-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 19311 // CHECK27-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 19312 // CHECK27-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 19313 // CHECK27-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 19314 // CHECK27-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 19315 // CHECK27-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 19316 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19317 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 19318 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19319 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 19320 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 19321 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 19322 // CHECK27: omp.precond.then: 19323 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19324 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 19325 // CHECK27-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 19326 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19327 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19328 // CHECK27-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19329 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 19330 // CHECK27-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19331 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19332 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 19333 // CHECK27-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 19334 // CHECK27-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19335 // CHECK27: cond.true: 19336 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 19337 // CHECK27-NEXT: br label [[COND_END:%.*]] 19338 // CHECK27: cond.false: 19339 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19340 // CHECK27-NEXT: br label [[COND_END]] 19341 // CHECK27: cond.end: 19342 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 19343 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19344 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19345 // CHECK27-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 19346 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19347 // CHECK27: omp.inner.for.cond: 19348 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19349 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19350 // CHECK27-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1 19351 // CHECK27-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]] 19352 // CHECK27-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19353 // CHECK27: omp.inner.for.body: 19354 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19355 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19356 // CHECK27-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 19357 // CHECK27-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]] 19358 // CHECK27-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4 19359 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4 19360 // CHECK27-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 19361 // CHECK27-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4 19362 // CHECK27-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 2 19363 // CHECK27-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32 19364 // CHECK27-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1 19365 // CHECK27-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16 19366 // CHECK27-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 2 19367 // CHECK27-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 1 19368 // CHECK27-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32 19369 // CHECK27-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1 19370 // CHECK27-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8 19371 // CHECK27-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 1 19372 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 19373 // CHECK27-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 19374 // CHECK27-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1 19375 // CHECK27-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4 19376 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19377 // CHECK27: omp.body.continue: 19378 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19379 // CHECK27: omp.inner.for.inc: 19380 // CHECK27-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19381 // CHECK27-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1 19382 // CHECK27-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 19383 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 19384 // CHECK27: omp.inner.for.end: 19385 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19386 // CHECK27: omp.loop.exit: 19387 // CHECK27-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19388 // CHECK27-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 19389 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 19390 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 19391 // CHECK27: omp.precond.end: 19392 // CHECK27-NEXT: ret void 19393 // 19394 // 19395 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 19396 // CHECK27-SAME: (%struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 19397 // CHECK27-NEXT: entry: 19398 // CHECK27-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 19399 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 19400 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 19401 // CHECK27-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 19402 // CHECK27-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 19403 // CHECK27-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 19404 // CHECK27-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 19405 // CHECK27-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 19406 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 19407 // CHECK27-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 19408 // CHECK27-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 19409 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 19410 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 19411 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 19412 // CHECK27-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 19413 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4 19414 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 19415 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 19416 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]]) 19417 // CHECK27-NEXT: ret void 19418 // 19419 // 19420 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..5 19421 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 19422 // CHECK27-NEXT: entry: 19423 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19424 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19425 // CHECK27-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 19426 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 19427 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 19428 // CHECK27-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 19429 // CHECK27-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 19430 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19431 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 19432 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19433 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19434 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19435 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19436 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 19437 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19438 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19439 // CHECK27-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 19440 // CHECK27-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 19441 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 19442 // CHECK27-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 19443 // CHECK27-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 19444 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 19445 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 19446 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 19447 // CHECK27-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 19448 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19449 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19450 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19451 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19452 // CHECK27-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19453 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 19454 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19455 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19456 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 19457 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19458 // CHECK27: cond.true: 19459 // CHECK27-NEXT: br label [[COND_END:%.*]] 19460 // CHECK27: cond.false: 19461 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19462 // CHECK27-NEXT: br label [[COND_END]] 19463 // CHECK27: cond.end: 19464 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 19465 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19466 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19467 // CHECK27-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 19468 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19469 // CHECK27: omp.inner.for.cond: 19470 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19471 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19472 // CHECK27-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 19473 // CHECK27-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19474 // CHECK27: omp.inner.for.body: 19475 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19476 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 19477 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19478 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4 19479 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4 19480 // CHECK27-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double 19481 // CHECK27-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00 19482 // CHECK27-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 19483 // CHECK27-NEXT: store double [[ADD4]], double* [[A]], align 4 19484 // CHECK27-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 19485 // CHECK27-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4 19486 // CHECK27-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 19487 // CHECK27-NEXT: store double [[INC]], double* [[A5]], align 4 19488 // CHECK27-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16 19489 // CHECK27-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]] 19490 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]] 19491 // CHECK27-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 19492 // CHECK27-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2 19493 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19494 // CHECK27: omp.body.continue: 19495 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19496 // CHECK27: omp.inner.for.inc: 19497 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19498 // CHECK27-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 19499 // CHECK27-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 19500 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 19501 // CHECK27: omp.inner.for.end: 19502 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19503 // CHECK27: omp.loop.exit: 19504 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 19505 // CHECK27-NEXT: ret void 19506 // 19507 // 19508 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 19509 // CHECK27-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 19510 // CHECK27-NEXT: entry: 19511 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 19512 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 19513 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 19514 // CHECK27-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 19515 // CHECK27-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 19516 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 19517 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 19518 // CHECK27-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 19519 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 19520 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 19521 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 19522 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4 19523 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4 19524 // CHECK27-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 19525 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 19526 // CHECK27-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2 19527 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 19528 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]]) 19529 // CHECK27-NEXT: ret void 19530 // 19531 // 19532 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..6 19533 // CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 19534 // CHECK27-NEXT: entry: 19535 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19536 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19537 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 19538 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 19539 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 19540 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19541 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 19542 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19543 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19544 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19545 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19546 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 19547 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19548 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19549 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 19550 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 19551 // CHECK27-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 19552 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 19553 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 19554 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19555 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19556 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19557 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19558 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19559 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 19560 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19561 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19562 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 19563 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19564 // CHECK27: cond.true: 19565 // CHECK27-NEXT: br label [[COND_END:%.*]] 19566 // CHECK27: cond.false: 19567 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19568 // CHECK27-NEXT: br label [[COND_END]] 19569 // CHECK27: cond.end: 19570 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 19571 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19572 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19573 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 19574 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19575 // CHECK27: omp.inner.for.cond: 19576 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19577 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19578 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 19579 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19580 // CHECK27: omp.inner.for.body: 19581 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19582 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 19583 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19584 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4 19585 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 19586 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1 19587 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 19588 // CHECK27-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 2 19589 // CHECK27-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32 19590 // CHECK27-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 19591 // CHECK27-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 19592 // CHECK27-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 19593 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 19594 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 19595 // CHECK27-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1 19596 // CHECK27-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 19597 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19598 // CHECK27: omp.body.continue: 19599 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19600 // CHECK27: omp.inner.for.inc: 19601 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19602 // CHECK27-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 19603 // CHECK27-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 19604 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]] 19605 // CHECK27: omp.inner.for.end: 19606 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19607 // CHECK27: omp.loop.exit: 19608 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 19609 // CHECK27-NEXT: ret void 19610 // 19611 // 19612 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103 19613 // CHECK28-SAME: (i32 noundef [[AA:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 19614 // CHECK28-NEXT: entry: 19615 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 19616 // CHECK28-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 19617 // CHECK28-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 19618 // CHECK28-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 19619 // CHECK28-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]]) 19620 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 19621 // CHECK28-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 19622 // CHECK28-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 19623 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 19624 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 19625 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4 19626 // CHECK28-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]]) 19627 // CHECK28-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 19628 // CHECK28-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 19629 // CHECK28-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2 19630 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 19631 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]]) 19632 // CHECK28-NEXT: ret void 19633 // 19634 // 19635 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined. 19636 // CHECK28-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 19637 // CHECK28-NEXT: entry: 19638 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19639 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19640 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 19641 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19642 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 19643 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19644 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19645 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19646 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19647 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 19648 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19649 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19650 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 19651 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 19652 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19653 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19654 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19655 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19656 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19657 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 19658 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19659 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19660 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 19661 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19662 // CHECK28: cond.true: 19663 // CHECK28-NEXT: br label [[COND_END:%.*]] 19664 // CHECK28: cond.false: 19665 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19666 // CHECK28-NEXT: br label [[COND_END]] 19667 // CHECK28: cond.end: 19668 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 19669 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19670 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19671 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 19672 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19673 // CHECK28: omp.inner.for.cond: 19674 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19675 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19676 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 19677 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19678 // CHECK28: omp.inner.for.body: 19679 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19680 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 19681 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19682 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4 19683 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19684 // CHECK28: omp.body.continue: 19685 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19686 // CHECK28: omp.inner.for.inc: 19687 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19688 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 19689 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 19690 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 19691 // CHECK28: omp.inner.for.end: 19692 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19693 // CHECK28: omp.loop.exit: 19694 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 19695 // CHECK28-NEXT: ret void 19696 // 19697 // 19698 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113 19699 // CHECK28-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR0]] { 19700 // CHECK28-NEXT: entry: 19701 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 19702 // CHECK28-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 19703 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 19704 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 19705 // CHECK28-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 19706 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 19707 // CHECK28-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2 19708 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4 19709 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP1]]) 19710 // CHECK28-NEXT: ret void 19711 // 19712 // 19713 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..1 19714 // CHECK28-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 19715 // CHECK28-NEXT: entry: 19716 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19717 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19718 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 19719 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19720 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 19721 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19722 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19723 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19724 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19725 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 19726 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19727 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19728 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 19729 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 19730 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19731 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19732 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19733 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19734 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19735 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 19736 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19737 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19738 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 19739 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19740 // CHECK28: cond.true: 19741 // CHECK28-NEXT: br label [[COND_END:%.*]] 19742 // CHECK28: cond.false: 19743 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19744 // CHECK28-NEXT: br label [[COND_END]] 19745 // CHECK28: cond.end: 19746 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 19747 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19748 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19749 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 19750 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19751 // CHECK28: omp.inner.for.cond: 19752 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19753 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19754 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 19755 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19756 // CHECK28: omp.inner.for.body: 19757 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19758 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 19759 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19760 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4 19761 // CHECK28-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 2 19762 // CHECK28-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32 19763 // CHECK28-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1 19764 // CHECK28-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16 19765 // CHECK28-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 2 19766 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19767 // CHECK28: omp.body.continue: 19768 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19769 // CHECK28: omp.inner.for.inc: 19770 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19771 // CHECK28-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1 19772 // CHECK28-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 19773 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 19774 // CHECK28: omp.inner.for.end: 19775 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19776 // CHECK28: omp.loop.exit: 19777 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 19778 // CHECK28-NEXT: ret void 19779 // 19780 // 19781 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120 19782 // CHECK28-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 19783 // CHECK28-NEXT: entry: 19784 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 19785 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 19786 // CHECK28-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 19787 // CHECK28-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 19788 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 19789 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 19790 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 19791 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 19792 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 19793 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 19794 // CHECK28-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 2 19795 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 19796 // CHECK28-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 19797 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 19798 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]]) 19799 // CHECK28-NEXT: ret void 19800 // 19801 // 19802 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..2 19803 // CHECK28-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] { 19804 // CHECK28-NEXT: entry: 19805 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19806 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19807 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 19808 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 19809 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19810 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 19811 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19812 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19813 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19814 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19815 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 19816 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19817 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19818 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 19819 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 19820 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 19821 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19822 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19823 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19824 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19825 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19826 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 19827 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19828 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19829 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 19830 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19831 // CHECK28: cond.true: 19832 // CHECK28-NEXT: br label [[COND_END:%.*]] 19833 // CHECK28: cond.false: 19834 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19835 // CHECK28-NEXT: br label [[COND_END]] 19836 // CHECK28: cond.end: 19837 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 19838 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19839 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19840 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 19841 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19842 // CHECK28: omp.inner.for.cond: 19843 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19844 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19845 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 19846 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19847 // CHECK28: omp.inner.for.body: 19848 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19849 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 19850 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19851 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4 19852 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 19853 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 19854 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 19855 // CHECK28-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 2 19856 // CHECK28-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32 19857 // CHECK28-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 19858 // CHECK28-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 19859 // CHECK28-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 19860 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19861 // CHECK28: omp.body.continue: 19862 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19863 // CHECK28: omp.inner.for.inc: 19864 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19865 // CHECK28-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 19866 // CHECK28-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 19867 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 19868 // CHECK28: omp.inner.for.end: 19869 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19870 // CHECK28: omp.loop.exit: 19871 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 19872 // CHECK28-NEXT: ret void 19873 // 19874 // 19875 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145 19876 // CHECK28-SAME: (i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 19877 // CHECK28-NEXT: entry: 19878 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 19879 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 19880 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 19881 // CHECK28-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 19882 // CHECK28-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 19883 // CHECK28-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 19884 // CHECK28-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 19885 // CHECK28-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 19886 // CHECK28-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 19887 // CHECK28-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 19888 // CHECK28-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 19889 // CHECK28-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 19890 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 19891 // CHECK28-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 19892 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 19893 // CHECK28-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 19894 // CHECK28-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 19895 // CHECK28-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 19896 // CHECK28-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 19897 // CHECK28-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 19898 // CHECK28-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 19899 // CHECK28-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 19900 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 19901 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 19902 // CHECK28-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 19903 // CHECK28-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 19904 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 19905 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 19906 // CHECK28-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 19907 // CHECK28-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 19908 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4 19909 // CHECK28-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4 19910 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4 19911 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 19912 // CHECK28-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 19913 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 19914 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]]) 19915 // CHECK28-NEXT: ret void 19916 // 19917 // 19918 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..3 19919 // CHECK28-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], [10 x float]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[VLA:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[VLA1:%.*]], i32 noundef [[VLA3:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* noundef nonnull align 4 dereferenceable(12) [[D:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 19920 // CHECK28-NEXT: entry: 19921 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19922 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19923 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 19924 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 19925 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 19926 // CHECK28-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 19927 // CHECK28-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 19928 // CHECK28-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 19929 // CHECK28-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 19930 // CHECK28-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 19931 // CHECK28-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 19932 // CHECK28-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 19933 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19934 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 19935 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19936 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19937 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19938 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19939 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 19940 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19941 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19942 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 19943 // CHECK28-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 19944 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 19945 // CHECK28-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 19946 // CHECK28-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 19947 // CHECK28-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 19948 // CHECK28-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 19949 // CHECK28-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 19950 // CHECK28-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 19951 // CHECK28-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 19952 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 19953 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 19954 // CHECK28-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 19955 // CHECK28-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 19956 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 19957 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 19958 // CHECK28-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 19959 // CHECK28-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 19960 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19961 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19962 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19963 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19964 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 19965 // CHECK28-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19966 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 19967 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]]) 19968 // CHECK28-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 19969 // CHECK28: omp.dispatch.cond: 19970 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19971 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9 19972 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19973 // CHECK28: cond.true: 19974 // CHECK28-NEXT: br label [[COND_END:%.*]] 19975 // CHECK28: cond.false: 19976 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19977 // CHECK28-NEXT: br label [[COND_END]] 19978 // CHECK28: cond.end: 19979 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 19980 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19981 // CHECK28-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19982 // CHECK28-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 19983 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19984 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19985 // CHECK28-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 19986 // CHECK28-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 19987 // CHECK28: omp.dispatch.body: 19988 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19989 // CHECK28: omp.inner.for.cond: 19990 // CHECK28-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 19991 // CHECK28-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 19992 // CHECK28-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 19993 // CHECK28-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19994 // CHECK28: omp.inner.for.body: 19995 // CHECK28-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 19996 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 19997 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19998 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 19999 // CHECK28-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !14 20000 // CHECK28-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 20001 // CHECK28-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !14 20002 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2 20003 // CHECK28-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !14 20004 // CHECK28-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 20005 // CHECK28-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00 20006 // CHECK28-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float 20007 // CHECK28-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !14 20008 // CHECK28-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3 20009 // CHECK28-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !14 20010 // CHECK28-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double 20011 // CHECK28-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00 20012 // CHECK28-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 20013 // CHECK28-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !14 20014 // CHECK28-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1 20015 // CHECK28-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2 20016 // CHECK28-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !14 20017 // CHECK28-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00 20018 // CHECK28-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !14 20019 // CHECK28-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]] 20020 // CHECK28-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]] 20021 // CHECK28-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3 20022 // CHECK28-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !14 20023 // CHECK28-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00 20024 // CHECK28-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !14 20025 // CHECK28-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0 20026 // CHECK28-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !14 20027 // CHECK28-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1 20028 // CHECK28-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !14 20029 // CHECK28-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1 20030 // CHECK28-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !14 20031 // CHECK28-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32 20032 // CHECK28-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1 20033 // CHECK28-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8 20034 // CHECK28-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !14 20035 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20036 // CHECK28: omp.body.continue: 20037 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20038 // CHECK28: omp.inner.for.inc: 20039 // CHECK28-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 20040 // CHECK28-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1 20041 // CHECK28-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 20042 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 20043 // CHECK28: omp.inner.for.end: 20044 // CHECK28-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 20045 // CHECK28: omp.dispatch.inc: 20046 // CHECK28-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20047 // CHECK28-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20048 // CHECK28-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 20049 // CHECK28-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4 20050 // CHECK28-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20051 // CHECK28-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20052 // CHECK28-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 20053 // CHECK28-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4 20054 // CHECK28-NEXT: br label [[OMP_DISPATCH_COND]] 20055 // CHECK28: omp.dispatch.end: 20056 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 20057 // CHECK28-NEXT: ret void 20058 // 20059 // 20060 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200 20061 // CHECK28-SAME: (i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 20062 // CHECK28-NEXT: entry: 20063 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 20064 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 20065 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 20066 // CHECK28-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 20067 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 20068 // CHECK28-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 20069 // CHECK28-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 20070 // CHECK28-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 20071 // CHECK28-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 20072 // CHECK28-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 20073 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 20074 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 20075 // CHECK28-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 20076 // CHECK28-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 20077 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 20078 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 20079 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 20080 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 20081 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4 20082 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4 20083 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4 20084 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4 20085 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4 20086 // CHECK28-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 2 20087 // CHECK28-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 20088 // CHECK28-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2 20089 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4 20090 // CHECK28-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 1 20091 // CHECK28-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 20092 // CHECK28-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1 20093 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 20094 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]]) 20095 // CHECK28-NEXT: ret void 20096 // 20097 // 20098 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..4 20099 // CHECK28-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], i32 noundef [[AAA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 20100 // CHECK28-NEXT: entry: 20101 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20102 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20103 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 20104 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 20105 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 20106 // CHECK28-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 20107 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 20108 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20109 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 20110 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20111 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20112 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 20113 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 20114 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20115 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20116 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20117 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20118 // CHECK28-NEXT: [[I6:%.*]] = alloca i32, align 4 20119 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20120 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20121 // CHECK28-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 20122 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 20123 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 20124 // CHECK28-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 20125 // CHECK28-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 20126 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 20127 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 20128 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 20129 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 20130 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 20131 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 20132 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20133 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20134 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20135 // CHECK28-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 20136 // CHECK28-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1 20137 // CHECK28-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1 20138 // CHECK28-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 20139 // CHECK28-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1 20140 // CHECK28-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4 20141 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20142 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[I]], align 4 20143 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20144 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20145 // CHECK28-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]] 20146 // CHECK28-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20147 // CHECK28: omp.precond.then: 20148 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20149 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 20150 // CHECK28-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 20151 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20152 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20153 // CHECK28-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20154 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 20155 // CHECK28-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20156 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20157 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 20158 // CHECK28-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]] 20159 // CHECK28-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20160 // CHECK28: cond.true: 20161 // CHECK28-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 20162 // CHECK28-NEXT: br label [[COND_END:%.*]] 20163 // CHECK28: cond.false: 20164 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20165 // CHECK28-NEXT: br label [[COND_END]] 20166 // CHECK28: cond.end: 20167 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 20168 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20169 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20170 // CHECK28-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 20171 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20172 // CHECK28: omp.inner.for.cond: 20173 // CHECK28-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20174 // CHECK28-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20175 // CHECK28-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1 20176 // CHECK28-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]] 20177 // CHECK28-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20178 // CHECK28: omp.inner.for.body: 20179 // CHECK28-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20180 // CHECK28-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20181 // CHECK28-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1 20182 // CHECK28-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]] 20183 // CHECK28-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4 20184 // CHECK28-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4 20185 // CHECK28-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 20186 // CHECK28-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4 20187 // CHECK28-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 2 20188 // CHECK28-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32 20189 // CHECK28-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1 20190 // CHECK28-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16 20191 // CHECK28-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 2 20192 // CHECK28-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 1 20193 // CHECK28-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32 20194 // CHECK28-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1 20195 // CHECK28-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8 20196 // CHECK28-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 1 20197 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 20198 // CHECK28-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 20199 // CHECK28-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1 20200 // CHECK28-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4 20201 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20202 // CHECK28: omp.body.continue: 20203 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20204 // CHECK28: omp.inner.for.inc: 20205 // CHECK28-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20206 // CHECK28-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1 20207 // CHECK28-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 20208 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 20209 // CHECK28: omp.inner.for.end: 20210 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20211 // CHECK28: omp.loop.exit: 20212 // CHECK28-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20213 // CHECK28-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 20214 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 20215 // CHECK28-NEXT: br label [[OMP_PRECOND_END]] 20216 // CHECK28: omp.precond.end: 20217 // CHECK28-NEXT: ret void 20218 // 20219 // 20220 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218 20221 // CHECK28-SAME: (%struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 20222 // CHECK28-NEXT: entry: 20223 // CHECK28-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 20224 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 20225 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 20226 // CHECK28-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 20227 // CHECK28-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 20228 // CHECK28-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 20229 // CHECK28-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 20230 // CHECK28-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 20231 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 20232 // CHECK28-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 20233 // CHECK28-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 20234 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 20235 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 20236 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 20237 // CHECK28-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 20238 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4 20239 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 20240 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 20241 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]]) 20242 // CHECK28-NEXT: ret void 20243 // 20244 // 20245 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..5 20246 // CHECK28-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i16* noundef nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 20247 // CHECK28-NEXT: entry: 20248 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20249 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20250 // CHECK28-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 20251 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 20252 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 20253 // CHECK28-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 20254 // CHECK28-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 20255 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20256 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 20257 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20258 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20259 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20260 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20261 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 20262 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20263 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20264 // CHECK28-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 20265 // CHECK28-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 20266 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 20267 // CHECK28-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 20268 // CHECK28-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 20269 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 20270 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 20271 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 20272 // CHECK28-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 20273 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20274 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 20275 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20276 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20277 // CHECK28-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20278 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 20279 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20280 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20281 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9 20282 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20283 // CHECK28: cond.true: 20284 // CHECK28-NEXT: br label [[COND_END:%.*]] 20285 // CHECK28: cond.false: 20286 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20287 // CHECK28-NEXT: br label [[COND_END]] 20288 // CHECK28: cond.end: 20289 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 20290 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20291 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20292 // CHECK28-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 20293 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20294 // CHECK28: omp.inner.for.cond: 20295 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20296 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20297 // CHECK28-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 20298 // CHECK28-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20299 // CHECK28: omp.inner.for.body: 20300 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20301 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 20302 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20303 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4 20304 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4 20305 // CHECK28-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double 20306 // CHECK28-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00 20307 // CHECK28-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 20308 // CHECK28-NEXT: store double [[ADD4]], double* [[A]], align 4 20309 // CHECK28-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0 20310 // CHECK28-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4 20311 // CHECK28-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00 20312 // CHECK28-NEXT: store double [[INC]], double* [[A5]], align 4 20313 // CHECK28-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16 20314 // CHECK28-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]] 20315 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]] 20316 // CHECK28-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 20317 // CHECK28-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2 20318 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20319 // CHECK28: omp.body.continue: 20320 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20321 // CHECK28: omp.inner.for.inc: 20322 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20323 // CHECK28-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 20324 // CHECK28-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 20325 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 20326 // CHECK28: omp.inner.for.end: 20327 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20328 // CHECK28: omp.loop.exit: 20329 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 20330 // CHECK28-NEXT: ret void 20331 // 20332 // 20333 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183 20334 // CHECK28-SAME: (i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 20335 // CHECK28-NEXT: entry: 20336 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 20337 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 20338 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 20339 // CHECK28-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 20340 // CHECK28-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 20341 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 20342 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 20343 // CHECK28-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 20344 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 20345 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 20346 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 20347 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4 20348 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4 20349 // CHECK28-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 2 20350 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 20351 // CHECK28-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2 20352 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4 20353 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]]) 20354 // CHECK28-NEXT: ret void 20355 // 20356 // 20357 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..6 20358 // CHECK28-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[AA:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 20359 // CHECK28-NEXT: entry: 20360 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20361 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20362 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 20363 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 20364 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 20365 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20366 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4 20367 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20368 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20369 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20370 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20371 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4 20372 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20373 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20374 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 20375 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 20376 // CHECK28-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 20377 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 20378 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 20379 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20380 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 20381 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20382 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20383 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20384 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 20385 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20386 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20387 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 20388 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20389 // CHECK28: cond.true: 20390 // CHECK28-NEXT: br label [[COND_END:%.*]] 20391 // CHECK28: cond.false: 20392 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20393 // CHECK28-NEXT: br label [[COND_END]] 20394 // CHECK28: cond.end: 20395 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 20396 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20397 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20398 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 20399 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20400 // CHECK28: omp.inner.for.cond: 20401 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20402 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20403 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 20404 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20405 // CHECK28: omp.inner.for.body: 20406 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20407 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 20408 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20409 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4 20410 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 20411 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1 20412 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4 20413 // CHECK28-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 2 20414 // CHECK28-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32 20415 // CHECK28-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 20416 // CHECK28-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16 20417 // CHECK28-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 2 20418 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2 20419 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 20420 // CHECK28-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1 20421 // CHECK28-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 20422 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20423 // CHECK28: omp.body.continue: 20424 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20425 // CHECK28: omp.inner.for.inc: 20426 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20427 // CHECK28-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 20428 // CHECK28-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 20429 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]] 20430 // CHECK28: omp.inner.for.end: 20431 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20432 // CHECK28: omp.loop.exit: 20433 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 20434 // CHECK28-NEXT: ret void 20435 // 20436