1 // Test host codegen. 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 6 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 8 9 // Test target codegen - host bc file has to be created first. 10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 11 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 12 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 13 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 14 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 15 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 16 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 17 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 18 19 // expected-no-diagnostics 20 #ifndef HEADER 21 #define HEADER 22 23 // CHECK-DAG: %ident_t = type { i32, i32, i32, i32, i8* } 24 // CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00" 25 // CHECK-DAG: [[DEF_LOC:@.+]] = private unnamed_addr constant %ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) } 26 27 // CHECK-DAG: [[S1:%.+]] = type { double } 28 // CHECK-DAG: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 } 29 // CHECK-DAG: [[DEVTY:%.+]] = type { i8*, i8*, [[ENTTY]]*, [[ENTTY]]* } 30 // CHECK-DAG: [[DSCTY:%.+]] = type { i32, [[DEVTY]]*, [[ENTTY]]*, [[ENTTY]]* } 31 32 // TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i{{32|64}}, i32, i32 } 33 34 // CHECK-DAG: $[[REGFN:\.omp_offloading\..+]] = comdat 35 36 // We have 6 target regions 37 38 // CHECK-DAG: @{{.*}} = private constant i8 0 39 // CHECK-DAG: @{{.*}} = private constant i8 0 40 // CHECK-DAG: @{{.*}} = private constant i8 0 41 // CHECK-DAG: @{{.*}} = private constant i8 0 42 // CHECK-DAG: @{{.*}} = private constant i8 0 43 // CHECK-DAG: @{{.*}} = private constant i8 0 44 45 // TCHECK: @{{.+}} = constant [[ENTTY]] 46 // TCHECK: @{{.+}} = constant [[ENTTY]] 47 // TCHECK: @{{.+}} = constant [[ENTTY]] 48 // TCHECK: @{{.+}} = constant [[ENTTY]] 49 // TCHECK: @{{.+}} = constant [[ENTTY]] 50 // TCHECK: @{{.+}} = constant [[ENTTY]] 51 52 // Check if offloading descriptor is created. 53 // CHECK: [[ENTBEGIN:@.+]] = external constant [[ENTTY]] 54 // CHECK: [[ENTEND:@.+]] = external constant [[ENTTY]] 55 // CHECK: [[DEVBEGIN:@.+]] = external constant i8 56 // CHECK: [[DEVEND:@.+]] = external constant i8 57 // CHECK: [[IMAGES:@.+]] = internal unnamed_addr constant [1 x [[DEVTY]]] [{{.+}} { i8* [[DEVBEGIN]], i8* [[DEVEND]], [[ENTTY]]* [[ENTBEGIN]], [[ENTTY]]* [[ENTEND]] }], comdat($[[REGFN]]) 58 // CHECK: [[DESC:@.+]] = internal constant [[DSCTY]] { i32 1, [[DEVTY]]* getelementptr inbounds ([1 x [[DEVTY]]], [1 x [[DEVTY]]]* [[IMAGES]], i32 0, i32 0), [[ENTTY]]* [[ENTBEGIN]], [[ENTTY]]* [[ENTEND]] }, comdat($[[REGFN]]) 59 60 // Check target registration is registered as a Ctor. 61 // CHECK: appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* bitcast (void (i8*)* @[[REGFN]] to void ()*), i8* bitcast (void (i8*)* @[[REGFN]] to i8*) }] 62 63 64 template<typename tx> 65 tx ftemplate(int n) { 66 tx a = 0; 67 68 #pragma omp target parallel num_threads(tx(20)) 69 { 70 } 71 72 short b = 1; 73 #pragma omp target parallel num_threads(b) 74 { 75 a += b; 76 } 77 78 return a; 79 } 80 81 static 82 int fstatic(int n) { 83 84 #pragma omp target parallel num_threads(n) 85 { 86 } 87 88 #pragma omp target parallel num_threads(32+n) 89 { 90 } 91 92 return n+1; 93 } 94 95 struct S1 { 96 double a; 97 98 int r1(int n){ 99 int b = 1; 100 101 #pragma omp target parallel num_threads(n-b) 102 { 103 this->a = (double)b + 1.5; 104 } 105 106 #pragma omp target parallel num_threads(1024) 107 { 108 this->a = 2.5; 109 } 110 111 return (int)a; 112 } 113 }; 114 115 // CHECK: define {{.*}}@{{.*}}bar{{.*}} 116 int bar(int n){ 117 int a = 0; 118 119 S1 S; 120 // CHECK: call {{.*}}i32 [[FS1:@.+]]([[S1]]* {{.*}}, i32 {{.*}}) 121 a += S.r1(n); 122 123 // CHECK: call {{.*}}i32 [[FSTATIC:@.+]](i32 {{.*}}) 124 a += fstatic(n); 125 126 // CHECK: call {{.*}}i32 [[FTEMPLATE:@.+]](i32 {{.*}}) 127 a += ftemplate<int>(n); 128 129 return a; 130 } 131 132 133 134 // 135 // CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) 136 // 137 // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align 138 // CHECK: store i32 1, i32* [[B:%.+]], align 139 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 140 // CHECK: [[BV:%.+]] = load i32, i32* [[B]], align 141 // CHECK: [[SUB:%.+]] = sub nsw i32 [[NV]], [[BV]] 142 // CHECK: store i32 [[SUB]], i32* [[CAPE_ADDR:%.+]], align 143 // CHECK: [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align 144 // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32* 145 // CHECK-64: store i32 [[CEV]], i32* [[CONV]], align 146 // CHECK-32: store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align 147 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 148 // CHECK: [[THREADS:%.+]] = load i32, i32* [[CAPE_ADDR]], align 149 // 150 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 1, i32 [[THREADS]]) 151 // CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 152 // CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 153 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0 154 // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 155 // 156 // CHECK: [[FAIL]] 157 // CHECK: call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) 158 // CHECK: br label {{%?}}[[END]] 159 // CHECK: [[END]] 160 // 161 // 162 // 163 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 1, {{.+}}, i32 1, i32 1024) 164 // CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 165 // CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 166 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0 167 // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 168 // 169 // CHECK: [[FAIL]] 170 // CHECK: call void [[HVT2:@.+]]([[S1]]* {{[^,]+}}) 171 // CHECK: br label {{%?}}[[END]] 172 // CHECK: [[END]] 173 // 174 175 176 177 178 179 180 // 181 // CHECK: define {{.*}}[[FSTATIC]](i32 {{[^%]*}}[[PARM:%.+]]) 182 // 183 // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align 184 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 185 // CHECK: store i32 [[NV]], i32* [[CAPE_ADDR:%.+]], align 186 // CHECK: [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align 187 // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32* 188 // CHECK-64: store i32 [[CEV]], i32* [[CONV]], align 189 // CHECK-32: store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align 190 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 191 // CHECK: [[THREADS:%.+]] = load i32, i32* [[CAPE_ADDR]], align 192 // 193 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 [[THREADS]]) 194 // CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 195 // CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 196 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0 197 // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 198 // 199 // CHECK: [[FAIL]] 200 // CHECK: call void [[HVT3:@.+]](i[[SZ]] [[ARG]]) 201 // CHECK: br label {{%?}}[[END]] 202 // CHECK: [[END]] 203 // 204 // 205 // 206 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 207 // CHECK: [[ADD:%.+]] = add nsw i32 32, [[NV]] 208 // CHECK: store i32 [[ADD]], i32* [[CAPE_ADDR:%.+]], align 209 // CHECK: [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align 210 // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32* 211 // CHECK-64: store i32 [[CEV]], i32* [[CONV]], align 212 // CHECK-32: store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align 213 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 214 // CHECK: [[THREADS:%.+]] = load i32, i32* [[CAPE_ADDR]], align 215 // 216 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 [[THREADS]]) 217 // CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 218 // CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 219 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0 220 // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 221 // 222 // CHECK: [[FAIL]] 223 // CHECK: call void [[HVT4:@.+]](i[[SZ]] [[ARG]]) 224 // CHECK: br label {{%?}}[[END]] 225 // CHECK: [[END]] 226 // 227 228 229 230 231 232 233 // 234 // CHECK: define {{.*}}[[FTEMPLATE]] 235 // 236 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 0, {{.*}}, i32 1, i32 20) 237 // CHECK-NEXT: store i32 [[RET]], i32* [[RHV:%.+]], align 238 // CHECK-NEXT: [[RET2:%.+]] = load i32, i32* [[RHV]], align 239 // CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0 240 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 241 // 242 // CHECK: [[FAIL]] 243 // CHECK: call void [[HVT5:@.+]]() 244 // CHECK: br label {{%?}}[[END]] 245 // 246 // CHECK: [[END]] 247 // 248 // 249 // 250 // CHECK: store i16 1, i16* [[B:%.+]], align 251 // CHECK: [[BV:%.+]] = load i16, i16* [[B]], align 252 // CHECK: store i16 [[BV]], i16* [[CAPE_ADDR:%.+]], align 253 // CHECK: [[CEV:%.+]] = load i16, i16* [[CAPE_ADDR]], align 254 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i16* 255 // CHECK: store i16 [[CEV]], i16* [[CONV]], align 256 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 257 // CHECK: [[T:%.+]] = load i16, i16* [[CAPE_ADDR]], align 258 // CHECK: [[THREADS:%.+]] = sext i16 [[T]] to i32 259 // 260 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 1, i32 [[THREADS]]) 261 // CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 262 // CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 263 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0 264 // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 265 // 266 // CHECK: [[FAIL]] 267 // CHECK: call void [[HVT6:@.+]](i[[SZ]] {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) 268 // CHECK: br label {{%?}}[[END]] 269 // CHECK: [[END]] 270 // 271 272 273 274 275 276 277 // Check that the offloading functions are emitted and that the parallel function 278 // is appropriately guarded. 279 280 // CHECK: define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]]) 281 // CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 282 // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* 283 // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align 284 // CHECK-32: [[NT:%.+]] = load i32, i32* [[CAPE_ADDR]], align 285 // CHECK: call void @__kmpc_push_num_threads(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]]) 286 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 2, 287 // 288 // 289 290 291 // CHECK: define internal void [[HVT2]]([[S1]]* {{%.+}}) 292 // CHECK: call void @__kmpc_push_num_threads(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 1024) 293 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 1, 294 // 295 // 296 297 298 299 300 301 302 303 304 // CHECK: define internal void [[HVT3]](i[[SZ]] [[PARM:%.+]]) 305 // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 306 // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* 307 // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align 308 // CHECK-32: [[NT:%.+]] = load i32, i32* [[CAPE_ADDR]], align 309 // CHECK: call void @__kmpc_push_num_threads(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]]) 310 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 0, 311 // 312 // 313 // CHECK: define internal void [[HVT4]](i[[SZ]] [[PARM:%.+]]) 314 // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 315 // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32* 316 // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align 317 // CHECK-32: [[NT:%.+]] = load i32, i32* [[CAPE_ADDR]], align 318 // CHECK: call void @__kmpc_push_num_threads(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]]) 319 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 0, 320 // 321 // 322 323 324 325 326 327 // CHECK: define internal void [[HVT5]]( 328 // CHECK: call void @__kmpc_push_num_threads(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 20) 329 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 0, 330 // 331 // 332 333 334 // CHECK: define internal void [[HVT6]](i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]], i[[SZ]] [[PARM3:%.+]]) 335 // CHECK-DAG: store i[[SZ]] [[PARM3]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 336 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i16* 337 // CHECK: [[T:%.+]] = load i16, i16* [[CONV]], align 338 // CHECK: [[NT:%.+]] = sext i16 [[T]] to i32 339 // CHECK: call void @__kmpc_push_num_threads(%ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]]) 340 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 2, 341 // 342 // 343 344 345 346 #endif 347