1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test host codegen. 3 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 5 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 9 10 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 17 // Test target codegen - host bc file has to be created first. 18 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 22 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 26 27 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 28 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 30 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 31 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 32 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 34 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 35 36 // Test host codegen. 37 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 38 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 39 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 40 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 41 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 42 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 43 44 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 45 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 46 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 47 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 48 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 49 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 50 51 // Test target codegen - host bc file has to be created first. 52 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 53 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9 54 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 55 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 56 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 57 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11 58 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 59 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 60 61 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 62 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 63 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 64 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 65 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 66 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 67 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 68 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 69 70 // expected-no-diagnostics 71 #ifndef HEADER 72 #define HEADER 73 74 75 76 77 // We have 6 target regions 78 79 80 81 // Check target registration is registered as a Ctor. 82 83 84 template<typename tx> 85 tx ftemplate(int n) { 86 tx a = 0; 87 88 #pragma omp target parallel num_threads(tx(20)) 89 { 90 } 91 92 short b = 1; 93 #pragma omp target parallel num_threads(b) 94 { 95 a += b; 96 } 97 98 return a; 99 } 100 101 static 102 int fstatic(int n) { 103 104 #pragma omp target parallel num_threads(n) 105 { 106 } 107 108 #pragma omp target parallel num_threads(32+n) 109 { 110 } 111 112 return n+1; 113 } 114 115 struct S1 { 116 double a; 117 118 int r1(int n){ 119 int b = 1; 120 121 #pragma omp target parallel num_threads(n-b) 122 { 123 this->a = (double)b + 1.5; 124 } 125 126 #pragma omp target parallel num_threads(1024) 127 { 128 this->a = 2.5; 129 } 130 131 return (int)a; 132 } 133 }; 134 135 int bar(int n){ 136 int a = 0; 137 138 S1 S; 139 a += S.r1(n); 140 141 a += fstatic(n); 142 143 a += ftemplate<int>(n); 144 145 return a; 146 } 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 // Check that the offloading functions are emitted and that the parallel function 169 // is appropriately guarded. 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 #endif 192 // CHECK1-LABEL: define {{[^@]+}}@_Z3bari 193 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 194 // CHECK1-NEXT: entry: 195 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 196 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 197 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 198 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 199 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 200 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 201 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2S12r1Ei(%struct.S1* noundef nonnull align 8 dereferenceable(8) [[S]], i32 noundef signext [[TMP0]]) 202 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 203 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 204 // CHECK1-NEXT: store i32 [[ADD]], i32* [[A]], align 4 205 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 206 // CHECK1-NEXT: [[CALL1:%.*]] = call noundef signext i32 @_ZL7fstatici(i32 noundef signext [[TMP2]]) 207 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 208 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 209 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 210 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 211 // CHECK1-NEXT: [[CALL3:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_i(i32 noundef signext [[TMP4]]) 212 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 213 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 214 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 215 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4 216 // CHECK1-NEXT: ret i32 [[TMP6]] 217 // 218 // 219 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 220 // CHECK1-SAME: (%struct.S1* noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat align 2 { 221 // CHECK1-NEXT: entry: 222 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 223 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 224 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 225 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 226 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 227 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 228 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 229 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 230 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 231 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8 232 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8 233 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8 234 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 235 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 236 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 237 // CHECK1-NEXT: store i32 1, i32* [[B]], align 4 238 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 239 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4 240 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]] 241 // CHECK1-NEXT: store i32 [[SUB]], i32* [[DOTCAPTURE_EXPR_]], align 4 242 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[B]], align 4 243 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32* 244 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 245 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8 246 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 247 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 248 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV2]], align 4 249 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 250 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 251 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 252 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to %struct.S1** 253 // CHECK1-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP7]], align 8 254 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 255 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to double** 256 // CHECK1-NEXT: store double* [[A]], double** [[TMP9]], align 8 257 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 258 // CHECK1-NEXT: store i8* null, i8** [[TMP10]], align 8 259 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 260 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 261 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 262 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 263 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64* 264 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP14]], align 8 265 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 266 // CHECK1-NEXT: store i8* null, i8** [[TMP15]], align 8 267 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 268 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 269 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP17]], align 8 270 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 271 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 272 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP19]], align 8 273 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 274 // CHECK1-NEXT: store i8* null, i8** [[TMP20]], align 8 275 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 276 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 277 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 278 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 279 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 280 // CHECK1-NEXT: store i32 1, i32* [[TMP24]], align 4 281 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 282 // CHECK1-NEXT: store i32 3, i32* [[TMP25]], align 4 283 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 284 // CHECK1-NEXT: store i8** [[TMP21]], i8*** [[TMP26]], align 8 285 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 286 // CHECK1-NEXT: store i8** [[TMP22]], i8*** [[TMP27]], align 8 287 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 288 // CHECK1-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP28]], align 8 289 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 290 // CHECK1-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP29]], align 8 291 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 292 // CHECK1-NEXT: store i8** null, i8*** [[TMP30]], align 8 293 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 294 // CHECK1-NEXT: store i8** null, i8*** [[TMP31]], align 8 295 // CHECK1-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 1, i32 [[TMP23]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 296 // CHECK1-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 297 // CHECK1-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 298 // CHECK1: omp_offload.failed: 299 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i64 [[TMP3]], i64 [[TMP5]]) #[[ATTR3:[0-9]+]] 300 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 301 // CHECK1: omp_offload.cont: 302 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0 303 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 304 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to %struct.S1** 305 // CHECK1-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP35]], align 8 306 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 307 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to double** 308 // CHECK1-NEXT: store double* [[A3]], double** [[TMP37]], align 8 309 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 310 // CHECK1-NEXT: store i8* null, i8** [[TMP38]], align 8 311 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 312 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 313 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 314 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0 315 // CHECK1-NEXT: store i32 1, i32* [[TMP41]], align 4 316 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1 317 // CHECK1-NEXT: store i32 1, i32* [[TMP42]], align 4 318 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2 319 // CHECK1-NEXT: store i8** [[TMP39]], i8*** [[TMP43]], align 8 320 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3 321 // CHECK1-NEXT: store i8** [[TMP40]], i8*** [[TMP44]], align 8 322 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4 323 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP45]], align 8 324 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5 325 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP46]], align 8 326 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6 327 // CHECK1-NEXT: store i8** null, i8*** [[TMP47]], align 8 328 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7 329 // CHECK1-NEXT: store i8** null, i8*** [[TMP48]], align 8 330 // CHECK1-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 1, i32 1024, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]]) 331 // CHECK1-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0 332 // CHECK1-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 333 // CHECK1: omp_offload.failed8: 334 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]]) #[[ATTR3]] 335 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]] 336 // CHECK1: omp_offload.cont9: 337 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0 338 // CHECK1-NEXT: [[TMP51:%.*]] = load double, double* [[A10]], align 8 339 // CHECK1-NEXT: [[CONV11:%.*]] = fptosi double [[TMP51]] to i32 340 // CHECK1-NEXT: ret i32 [[CONV11]] 341 // 342 // 343 // CHECK1-LABEL: define {{[^@]+}}@_ZL7fstatici 344 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 345 // CHECK1-NEXT: entry: 346 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 347 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 348 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 349 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 350 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 351 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 352 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 353 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8 354 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8 355 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8 356 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8 357 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 358 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 359 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4 360 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 361 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 362 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 363 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 364 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 365 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64* 366 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8 367 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 368 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 369 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8 370 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 371 // CHECK1-NEXT: store i8* null, i8** [[TMP7]], align 8 372 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 373 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 374 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 375 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 376 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 377 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4 378 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 379 // CHECK1-NEXT: store i32 1, i32* [[TMP12]], align 4 380 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 381 // CHECK1-NEXT: store i8** [[TMP8]], i8*** [[TMP13]], align 8 382 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 383 // CHECK1-NEXT: store i8** [[TMP9]], i8*** [[TMP14]], align 8 384 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 385 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP15]], align 8 386 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 387 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP16]], align 8 388 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 389 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8 390 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 391 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8 392 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 1, i32 [[TMP10]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 393 // CHECK1-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 394 // CHECK1-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 395 // CHECK1: omp_offload.failed: 396 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]] 397 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 398 // CHECK1: omp_offload.cont: 399 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4 400 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 32, [[TMP21]] 401 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTCAPTURE_EXPR_1]], align 4 402 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 403 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED2]] to i32* 404 // CHECK1-NEXT: store i32 [[TMP22]], i32* [[CONV3]], align 4 405 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED2]], align 8 406 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 407 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 408 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8 409 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 410 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 411 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8 412 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 413 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8 414 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 415 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 416 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 417 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 418 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0 419 // CHECK1-NEXT: store i32 1, i32* [[TMP32]], align 4 420 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1 421 // CHECK1-NEXT: store i32 1, i32* [[TMP33]], align 4 422 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2 423 // CHECK1-NEXT: store i8** [[TMP29]], i8*** [[TMP34]], align 8 424 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3 425 // CHECK1-NEXT: store i8** [[TMP30]], i8*** [[TMP35]], align 8 426 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4 427 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP36]], align 8 428 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5 429 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP37]], align 8 430 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6 431 // CHECK1-NEXT: store i8** null, i8*** [[TMP38]], align 8 432 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7 433 // CHECK1-NEXT: store i8** null, i8*** [[TMP39]], align 8 434 // CHECK1-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 1, i32 [[TMP31]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]]) 435 // CHECK1-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 436 // CHECK1-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 437 // CHECK1: omp_offload.failed8: 438 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108(i64 [[TMP23]]) #[[ATTR3]] 439 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]] 440 // CHECK1: omp_offload.cont9: 441 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_ADDR]], align 4 442 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP42]], 1 443 // CHECK1-NEXT: ret i32 [[ADD10]] 444 // 445 // 446 // CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 447 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat { 448 // CHECK1-NEXT: entry: 449 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 450 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 451 // CHECK1-NEXT: [[B:%.*]] = alloca i16, align 2 452 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i16, align 2 453 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 454 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 455 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 456 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 457 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 458 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 459 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 460 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 461 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 462 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 463 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4 464 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 465 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4 466 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 467 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8 468 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 469 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8 470 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 471 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8 472 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 473 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8 474 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 475 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8 476 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 477 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8 478 // CHECK1-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 1, i32 20, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 479 // CHECK1-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 480 // CHECK1-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 481 // CHECK1: omp_offload.failed: 482 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88() #[[ATTR3]] 483 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 484 // CHECK1: omp_offload.cont: 485 // CHECK1-NEXT: store i16 1, i16* [[B]], align 2 486 // CHECK1-NEXT: [[TMP10:%.*]] = load i16, i16* [[B]], align 2 487 // CHECK1-NEXT: store i16 [[TMP10]], i16* [[DOTCAPTURE_EXPR_]], align 2 488 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[A]], align 4 489 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 490 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV]], align 4 491 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[A_CASTED]], align 8 492 // CHECK1-NEXT: [[TMP13:%.*]] = load i16, i16* [[B]], align 2 493 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[B_CASTED]] to i16* 494 // CHECK1-NEXT: store i16 [[TMP13]], i16* [[CONV1]], align 2 495 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[B_CASTED]], align 8 496 // CHECK1-NEXT: [[TMP15:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2 497 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i16* 498 // CHECK1-NEXT: store i16 [[TMP15]], i16* [[CONV2]], align 2 499 // CHECK1-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 500 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 501 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 502 // CHECK1-NEXT: store i64 [[TMP12]], i64* [[TMP18]], align 8 503 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 504 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 505 // CHECK1-NEXT: store i64 [[TMP12]], i64* [[TMP20]], align 8 506 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 507 // CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8 508 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 509 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 510 // CHECK1-NEXT: store i64 [[TMP14]], i64* [[TMP23]], align 8 511 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 512 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 513 // CHECK1-NEXT: store i64 [[TMP14]], i64* [[TMP25]], align 8 514 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 515 // CHECK1-NEXT: store i8* null, i8** [[TMP26]], align 8 516 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 517 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64* 518 // CHECK1-NEXT: store i64 [[TMP16]], i64* [[TMP28]], align 8 519 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 520 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 521 // CHECK1-NEXT: store i64 [[TMP16]], i64* [[TMP30]], align 8 522 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 523 // CHECK1-NEXT: store i8* null, i8** [[TMP31]], align 8 524 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 525 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 526 // CHECK1-NEXT: [[TMP34:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2 527 // CHECK1-NEXT: [[TMP35:%.*]] = zext i16 [[TMP34]] to i32 528 // CHECK1-NEXT: [[KERNEL_ARGS3:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 529 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS3]], i32 0, i32 0 530 // CHECK1-NEXT: store i32 1, i32* [[TMP36]], align 4 531 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS3]], i32 0, i32 1 532 // CHECK1-NEXT: store i32 3, i32* [[TMP37]], align 4 533 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS3]], i32 0, i32 2 534 // CHECK1-NEXT: store i8** [[TMP32]], i8*** [[TMP38]], align 8 535 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS3]], i32 0, i32 3 536 // CHECK1-NEXT: store i8** [[TMP33]], i8*** [[TMP39]], align 8 537 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS3]], i32 0, i32 4 538 // CHECK1-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP40]], align 8 539 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS3]], i32 0, i32 5 540 // CHECK1-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP41]], align 8 541 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS3]], i32 0, i32 6 542 // CHECK1-NEXT: store i8** null, i8*** [[TMP42]], align 8 543 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS3]], i32 0, i32 7 544 // CHECK1-NEXT: store i8** null, i8*** [[TMP43]], align 8 545 // CHECK1-NEXT: [[TMP44:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 1, i32 [[TMP35]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS3]]) 546 // CHECK1-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0 547 // CHECK1-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED4:%.*]], label [[OMP_OFFLOAD_CONT5:%.*]] 548 // CHECK1: omp_offload.failed4: 549 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP12]], i64 [[TMP14]], i64 [[TMP16]]) #[[ATTR3]] 550 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT5]] 551 // CHECK1: omp_offload.cont5: 552 // CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[A]], align 4 553 // CHECK1-NEXT: ret i32 [[TMP46]] 554 // 555 // 556 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 557 // CHECK1-SAME: (%struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { 558 // CHECK1-NEXT: entry: 559 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 560 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 561 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 562 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 563 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 564 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 565 // CHECK1-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 566 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 567 // CHECK1-NEXT: [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 568 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 569 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 570 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 4 571 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]]) 572 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 573 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32* 574 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 575 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[B_CASTED]], align 8 576 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP4]]) 577 // CHECK1-NEXT: ret void 578 // 579 // 580 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 581 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]]) #[[ATTR2:[0-9]+]] { 582 // CHECK1-NEXT: entry: 583 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 584 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 585 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 586 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 587 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 588 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 589 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 590 // CHECK1-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 591 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 592 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 593 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 594 // CHECK1-NEXT: [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double 595 // CHECK1-NEXT: [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00 596 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 597 // CHECK1-NEXT: store double [[ADD]], double* [[A]], align 8 598 // CHECK1-NEXT: ret void 599 // 600 // 601 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 602 // CHECK1-SAME: (%struct.S1* noundef [[THIS:%.*]]) #[[ATTR1]] { 603 // CHECK1-NEXT: entry: 604 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 605 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 606 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 607 // CHECK1-NEXT: [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 608 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024) 609 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]]) 610 // CHECK1-NEXT: ret void 611 // 612 // 613 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 614 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]]) #[[ATTR2]] { 615 // CHECK1-NEXT: entry: 616 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 617 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 618 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 619 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 620 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 621 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 622 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 623 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 624 // CHECK1-NEXT: store double 2.500000e+00, double* [[A]], align 8 625 // CHECK1-NEXT: ret void 626 // 627 // 628 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 629 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 630 // CHECK1-NEXT: entry: 631 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 632 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 633 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 634 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 635 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 636 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]]) 637 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 638 // CHECK1-NEXT: ret void 639 // 640 // 641 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 642 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 643 // CHECK1-NEXT: entry: 644 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 645 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 646 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 647 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 648 // CHECK1-NEXT: ret void 649 // 650 // 651 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 652 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 653 // CHECK1-NEXT: entry: 654 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 655 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 656 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 657 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 658 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 659 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]]) 660 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*)) 661 // CHECK1-NEXT: ret void 662 // 663 // 664 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 665 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 666 // CHECK1-NEXT: entry: 667 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 668 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 669 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 670 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 671 // CHECK1-NEXT: ret void 672 // 673 // 674 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88 675 // CHECK1-SAME: () #[[ATTR1]] { 676 // CHECK1-NEXT: entry: 677 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 678 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20) 679 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 680 // CHECK1-NEXT: ret void 681 // 682 // 683 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 684 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 685 // CHECK1-NEXT: entry: 686 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 687 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 688 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 689 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 690 // CHECK1-NEXT: ret void 691 // 692 // 693 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 694 // CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 695 // CHECK1-NEXT: entry: 696 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 697 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 698 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 699 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 700 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 701 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 702 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 703 // CHECK1-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 704 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 705 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 706 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16* 707 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i16* 708 // CHECK1-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV2]], align 2 709 // CHECK1-NEXT: [[TMP2:%.*]] = sext i16 [[TMP1]] to i32 710 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]]) 711 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 712 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32* 713 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV3]], align 4 714 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8 715 // CHECK1-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV1]], align 2 716 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[B_CASTED]] to i16* 717 // CHECK1-NEXT: store i16 [[TMP5]], i16* [[CONV4]], align 2 718 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8 719 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]]) 720 // CHECK1-NEXT: ret void 721 // 722 // 723 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 724 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR2]] { 725 // CHECK1-NEXT: entry: 726 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 727 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 728 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 729 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 730 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 731 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 732 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 733 // CHECK1-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 734 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 735 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16* 736 // CHECK1-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 2 737 // CHECK1-NEXT: [[CONV2:%.*]] = sext i16 [[TMP0]] to i32 738 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 739 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]] 740 // CHECK1-NEXT: store i32 [[ADD]], i32* [[CONV]], align 4 741 // CHECK1-NEXT: ret void 742 // 743 // 744 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 745 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 746 // CHECK1-NEXT: entry: 747 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 748 // CHECK1-NEXT: ret void 749 // 750 // 751 // CHECK3-LABEL: define {{[^@]+}}@_Z3bari 752 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 753 // CHECK3-NEXT: entry: 754 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 755 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 756 // CHECK3-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 757 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 758 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 759 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 760 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2S12r1Ei(%struct.S1* noundef nonnull align 4 dereferenceable(8) [[S]], i32 noundef [[TMP0]]) 761 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 762 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 763 // CHECK3-NEXT: store i32 [[ADD]], i32* [[A]], align 4 764 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 765 // CHECK3-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZL7fstatici(i32 noundef [[TMP2]]) 766 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 767 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 768 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 769 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 770 // CHECK3-NEXT: [[CALL3:%.*]] = call noundef i32 @_Z9ftemplateIiET_i(i32 noundef [[TMP4]]) 771 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 772 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 773 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 774 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4 775 // CHECK3-NEXT: ret i32 [[TMP6]] 776 // 777 // 778 // CHECK3-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 779 // CHECK3-SAME: (%struct.S1* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[N:%.*]]) #[[ATTR0]] comdat align 2 { 780 // CHECK3-NEXT: entry: 781 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 782 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 783 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 784 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 785 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 786 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 787 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 788 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 789 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 790 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 791 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 792 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 793 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 794 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 795 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 796 // CHECK3-NEXT: store i32 1, i32* [[B]], align 4 797 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 798 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4 799 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]] 800 // CHECK3-NEXT: store i32 [[SUB]], i32* [[DOTCAPTURE_EXPR_]], align 4 801 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[B]], align 4 802 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[B_CASTED]], align 4 803 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4 804 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 805 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 806 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 807 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 808 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 809 // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to %struct.S1** 810 // CHECK3-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP7]], align 4 811 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 812 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to double** 813 // CHECK3-NEXT: store double* [[A]], double** [[TMP9]], align 4 814 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 815 // CHECK3-NEXT: store i8* null, i8** [[TMP10]], align 4 816 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 817 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 818 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 819 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 820 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 821 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP14]], align 4 822 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 823 // CHECK3-NEXT: store i8* null, i8** [[TMP15]], align 4 824 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 825 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 826 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4 827 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 828 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 829 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4 830 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 831 // CHECK3-NEXT: store i8* null, i8** [[TMP20]], align 4 832 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 833 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 834 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 835 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 836 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 837 // CHECK3-NEXT: store i32 1, i32* [[TMP24]], align 4 838 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 839 // CHECK3-NEXT: store i32 3, i32* [[TMP25]], align 4 840 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 841 // CHECK3-NEXT: store i8** [[TMP21]], i8*** [[TMP26]], align 4 842 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 843 // CHECK3-NEXT: store i8** [[TMP22]], i8*** [[TMP27]], align 4 844 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 845 // CHECK3-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP28]], align 4 846 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 847 // CHECK3-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP29]], align 4 848 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 849 // CHECK3-NEXT: store i8** null, i8*** [[TMP30]], align 4 850 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 851 // CHECK3-NEXT: store i8** null, i8*** [[TMP31]], align 4 852 // CHECK3-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 1, i32 [[TMP23]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 853 // CHECK3-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 854 // CHECK3-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 855 // CHECK3: omp_offload.failed: 856 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]] 857 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 858 // CHECK3: omp_offload.cont: 859 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0 860 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 861 // CHECK3-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to %struct.S1** 862 // CHECK3-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP35]], align 4 863 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 864 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to double** 865 // CHECK3-NEXT: store double* [[A2]], double** [[TMP37]], align 4 866 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 867 // CHECK3-NEXT: store i8* null, i8** [[TMP38]], align 4 868 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 869 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 870 // CHECK3-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 871 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0 872 // CHECK3-NEXT: store i32 1, i32* [[TMP41]], align 4 873 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1 874 // CHECK3-NEXT: store i32 1, i32* [[TMP42]], align 4 875 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2 876 // CHECK3-NEXT: store i8** [[TMP39]], i8*** [[TMP43]], align 4 877 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3 878 // CHECK3-NEXT: store i8** [[TMP40]], i8*** [[TMP44]], align 4 879 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4 880 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP45]], align 4 881 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5 882 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP46]], align 4 883 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6 884 // CHECK3-NEXT: store i8** null, i8*** [[TMP47]], align 4 885 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7 886 // CHECK3-NEXT: store i8** null, i8*** [[TMP48]], align 4 887 // CHECK3-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 1, i32 1024, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]]) 888 // CHECK3-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0 889 // CHECK3-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 890 // CHECK3: omp_offload.failed7: 891 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]]) #[[ATTR3]] 892 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 893 // CHECK3: omp_offload.cont8: 894 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0 895 // CHECK3-NEXT: [[TMP51:%.*]] = load double, double* [[A9]], align 4 896 // CHECK3-NEXT: [[CONV:%.*]] = fptosi double [[TMP51]] to i32 897 // CHECK3-NEXT: ret i32 [[CONV]] 898 // 899 // 900 // CHECK3-LABEL: define {{[^@]+}}@_ZL7fstatici 901 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 902 // CHECK3-NEXT: entry: 903 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 904 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 905 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 906 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 907 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 908 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 909 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 910 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4 911 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 912 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 913 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 914 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 915 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 916 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4 917 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 918 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 919 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 920 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 921 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32* 922 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4 923 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 924 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 925 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4 926 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 927 // CHECK3-NEXT: store i8* null, i8** [[TMP7]], align 4 928 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 929 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 930 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 931 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 932 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 933 // CHECK3-NEXT: store i32 1, i32* [[TMP11]], align 4 934 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 935 // CHECK3-NEXT: store i32 1, i32* [[TMP12]], align 4 936 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 937 // CHECK3-NEXT: store i8** [[TMP8]], i8*** [[TMP13]], align 4 938 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 939 // CHECK3-NEXT: store i8** [[TMP9]], i8*** [[TMP14]], align 4 940 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 941 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP15]], align 4 942 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 943 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP16]], align 4 944 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 945 // CHECK3-NEXT: store i8** null, i8*** [[TMP17]], align 4 946 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 947 // CHECK3-NEXT: store i8** null, i8*** [[TMP18]], align 4 948 // CHECK3-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 1, i32 [[TMP10]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 949 // CHECK3-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 950 // CHECK3-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 951 // CHECK3: omp_offload.failed: 952 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]] 953 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 954 // CHECK3: omp_offload.cont: 955 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4 956 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 32, [[TMP21]] 957 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTCAPTURE_EXPR_1]], align 4 958 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 959 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4 960 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4 961 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 962 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 963 // CHECK3-NEXT: store i32 [[TMP23]], i32* [[TMP25]], align 4 964 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 965 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32* 966 // CHECK3-NEXT: store i32 [[TMP23]], i32* [[TMP27]], align 4 967 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 968 // CHECK3-NEXT: store i8* null, i8** [[TMP28]], align 4 969 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 970 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 971 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 972 // CHECK3-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 973 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0 974 // CHECK3-NEXT: store i32 1, i32* [[TMP32]], align 4 975 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1 976 // CHECK3-NEXT: store i32 1, i32* [[TMP33]], align 4 977 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2 978 // CHECK3-NEXT: store i8** [[TMP29]], i8*** [[TMP34]], align 4 979 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3 980 // CHECK3-NEXT: store i8** [[TMP30]], i8*** [[TMP35]], align 4 981 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4 982 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP36]], align 4 983 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5 984 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP37]], align 4 985 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6 986 // CHECK3-NEXT: store i8** null, i8*** [[TMP38]], align 4 987 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7 988 // CHECK3-NEXT: store i8** null, i8*** [[TMP39]], align 4 989 // CHECK3-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 1, i32 [[TMP31]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]]) 990 // CHECK3-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 991 // CHECK3-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 992 // CHECK3: omp_offload.failed7: 993 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108(i32 [[TMP23]]) #[[ATTR3]] 994 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 995 // CHECK3: omp_offload.cont8: 996 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_ADDR]], align 4 997 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], 1 998 // CHECK3-NEXT: ret i32 [[ADD9]] 999 // 1000 // 1001 // CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 1002 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] comdat { 1003 // CHECK3-NEXT: entry: 1004 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1005 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 1006 // CHECK3-NEXT: [[B:%.*]] = alloca i16, align 2 1007 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i16, align 2 1008 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1009 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1010 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 1011 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 1012 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 1013 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 1014 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1015 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 1016 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1017 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1018 // CHECK3-NEXT: store i32 1, i32* [[TMP0]], align 4 1019 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1020 // CHECK3-NEXT: store i32 0, i32* [[TMP1]], align 4 1021 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1022 // CHECK3-NEXT: store i8** null, i8*** [[TMP2]], align 4 1023 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1024 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 4 1025 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1026 // CHECK3-NEXT: store i64* null, i64** [[TMP4]], align 4 1027 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1028 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 4 1029 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1030 // CHECK3-NEXT: store i8** null, i8*** [[TMP6]], align 4 1031 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1032 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 4 1033 // CHECK3-NEXT: [[TMP8:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 1, i32 20, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1034 // CHECK3-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 1035 // CHECK3-NEXT: br i1 [[TMP9]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1036 // CHECK3: omp_offload.failed: 1037 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88() #[[ATTR3]] 1038 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1039 // CHECK3: omp_offload.cont: 1040 // CHECK3-NEXT: store i16 1, i16* [[B]], align 2 1041 // CHECK3-NEXT: [[TMP10:%.*]] = load i16, i16* [[B]], align 2 1042 // CHECK3-NEXT: store i16 [[TMP10]], i16* [[DOTCAPTURE_EXPR_]], align 2 1043 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[A]], align 4 1044 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[A_CASTED]], align 4 1045 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[A_CASTED]], align 4 1046 // CHECK3-NEXT: [[TMP13:%.*]] = load i16, i16* [[B]], align 2 1047 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[B_CASTED]] to i16* 1048 // CHECK3-NEXT: store i16 [[TMP13]], i16* [[CONV]], align 2 1049 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[B_CASTED]], align 4 1050 // CHECK3-NEXT: [[TMP15:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2 1051 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i16* 1052 // CHECK3-NEXT: store i16 [[TMP15]], i16* [[CONV1]], align 2 1053 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 1054 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1055 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 1056 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[TMP18]], align 4 1057 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1058 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 1059 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[TMP20]], align 4 1060 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1061 // CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4 1062 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1063 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 1064 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[TMP23]], align 4 1065 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1066 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 1067 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[TMP25]], align 4 1068 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1069 // CHECK3-NEXT: store i8* null, i8** [[TMP26]], align 4 1070 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1071 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 1072 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[TMP28]], align 4 1073 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1074 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 1075 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[TMP30]], align 4 1076 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1077 // CHECK3-NEXT: store i8* null, i8** [[TMP31]], align 4 1078 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1079 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1080 // CHECK3-NEXT: [[TMP34:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2 1081 // CHECK3-NEXT: [[TMP35:%.*]] = zext i16 [[TMP34]] to i32 1082 // CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1083 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0 1084 // CHECK3-NEXT: store i32 1, i32* [[TMP36]], align 4 1085 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1 1086 // CHECK3-NEXT: store i32 3, i32* [[TMP37]], align 4 1087 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2 1088 // CHECK3-NEXT: store i8** [[TMP32]], i8*** [[TMP38]], align 4 1089 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3 1090 // CHECK3-NEXT: store i8** [[TMP33]], i8*** [[TMP39]], align 4 1091 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4 1092 // CHECK3-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP40]], align 4 1093 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5 1094 // CHECK3-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP41]], align 4 1095 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6 1096 // CHECK3-NEXT: store i8** null, i8*** [[TMP42]], align 4 1097 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7 1098 // CHECK3-NEXT: store i8** null, i8*** [[TMP43]], align 4 1099 // CHECK3-NEXT: [[TMP44:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 1, i32 [[TMP35]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]]) 1100 // CHECK3-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0 1101 // CHECK3-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1102 // CHECK3: omp_offload.failed3: 1103 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP12]], i32 [[TMP14]], i32 [[TMP16]]) #[[ATTR3]] 1104 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1105 // CHECK3: omp_offload.cont4: 1106 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[A]], align 4 1107 // CHECK3-NEXT: ret i32 [[TMP46]] 1108 // 1109 // 1110 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 1111 // CHECK3-SAME: (%struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { 1112 // CHECK3-NEXT: entry: 1113 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 1114 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1115 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1116 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1117 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1118 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 1119 // CHECK3-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 1120 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1121 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 1122 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1123 // CHECK3-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]]) 1124 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[B_ADDR]], align 4 1125 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[B_CASTED]], align 4 1126 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_CASTED]], align 4 1127 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP4]]) 1128 // CHECK3-NEXT: ret void 1129 // 1130 // 1131 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1132 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]]) #[[ATTR2:[0-9]+]] { 1133 // CHECK3-NEXT: entry: 1134 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1135 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1136 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 1137 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1138 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1139 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1140 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 1141 // CHECK3-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 1142 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 1143 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4 1144 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double 1145 // CHECK3-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 1146 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 1147 // CHECK3-NEXT: store double [[ADD]], double* [[A]], align 4 1148 // CHECK3-NEXT: ret void 1149 // 1150 // 1151 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 1152 // CHECK3-SAME: (%struct.S1* noundef [[THIS:%.*]]) #[[ATTR1]] { 1153 // CHECK3-NEXT: entry: 1154 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 1155 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1156 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 1157 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 1158 // CHECK3-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024) 1159 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]]) 1160 // CHECK3-NEXT: ret void 1161 // 1162 // 1163 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1164 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]]) #[[ATTR2]] { 1165 // CHECK3-NEXT: entry: 1166 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1167 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1168 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 1169 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1170 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1171 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 1172 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 1173 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 1174 // CHECK3-NEXT: store double 2.500000e+00, double* [[A]], align 4 1175 // CHECK3-NEXT: ret void 1176 // 1177 // 1178 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 1179 // CHECK3-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1180 // CHECK3-NEXT: entry: 1181 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1182 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1183 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1184 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1185 // CHECK3-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]]) 1186 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 1187 // CHECK3-NEXT: ret void 1188 // 1189 // 1190 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 1191 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 1192 // CHECK3-NEXT: entry: 1193 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1194 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1195 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1196 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1197 // CHECK3-NEXT: ret void 1198 // 1199 // 1200 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 1201 // CHECK3-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1202 // CHECK3-NEXT: entry: 1203 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1204 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1205 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1206 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1207 // CHECK3-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]]) 1208 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*)) 1209 // CHECK3-NEXT: ret void 1210 // 1211 // 1212 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 1213 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 1214 // CHECK3-NEXT: entry: 1215 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1216 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1217 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1218 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1219 // CHECK3-NEXT: ret void 1220 // 1221 // 1222 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88 1223 // CHECK3-SAME: () #[[ATTR1]] { 1224 // CHECK3-NEXT: entry: 1225 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1226 // CHECK3-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20) 1227 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 1228 // CHECK3-NEXT: ret void 1229 // 1230 // 1231 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 1232 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 1233 // CHECK3-NEXT: entry: 1234 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1235 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1236 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1237 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1238 // CHECK3-NEXT: ret void 1239 // 1240 // 1241 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 1242 // CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1243 // CHECK3-NEXT: entry: 1244 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1245 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1246 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1247 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1248 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1249 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1250 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1251 // CHECK3-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 1252 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1253 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16* 1254 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i16* 1255 // CHECK3-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV1]], align 2 1256 // CHECK3-NEXT: [[TMP2:%.*]] = sext i16 [[TMP1]] to i32 1257 // CHECK3-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]]) 1258 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4 1259 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4 1260 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4 1261 // CHECK3-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 2 1262 // CHECK3-NEXT: [[CONV2:%.*]] = bitcast i32* [[B_CASTED]] to i16* 1263 // CHECK3-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2 1264 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4 1265 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]]) 1266 // CHECK3-NEXT: ret void 1267 // 1268 // 1269 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 1270 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR2]] { 1271 // CHECK3-NEXT: entry: 1272 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1273 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1274 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1275 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1276 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1277 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1278 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1279 // CHECK3-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 1280 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16* 1281 // CHECK3-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 1282 // CHECK3-NEXT: [[CONV1:%.*]] = sext i16 [[TMP0]] to i32 1283 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 1284 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]] 1285 // CHECK3-NEXT: store i32 [[ADD]], i32* [[A_ADDR]], align 4 1286 // CHECK3-NEXT: ret void 1287 // 1288 // 1289 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1290 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 1291 // CHECK3-NEXT: entry: 1292 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1293 // CHECK3-NEXT: ret void 1294 // 1295 // 1296 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 1297 // CHECK9-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] { 1298 // CHECK9-NEXT: entry: 1299 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1300 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 1301 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1302 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1303 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1304 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]]) 1305 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1306 // CHECK9-NEXT: ret void 1307 // 1308 // 1309 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1310 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 1311 // CHECK9-NEXT: entry: 1312 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1313 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1314 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1315 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1316 // CHECK9-NEXT: ret void 1317 // 1318 // 1319 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 1320 // CHECK9-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1321 // CHECK9-NEXT: entry: 1322 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1323 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1324 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1325 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1326 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1327 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]]) 1328 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 1329 // CHECK9-NEXT: ret void 1330 // 1331 // 1332 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1333 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1334 // CHECK9-NEXT: entry: 1335 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1336 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1337 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1338 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1339 // CHECK9-NEXT: ret void 1340 // 1341 // 1342 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 1343 // CHECK9-SAME: (%struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1344 // CHECK9-NEXT: entry: 1345 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1346 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1347 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1348 // CHECK9-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 1349 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1350 // CHECK9-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1351 // CHECK9-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 1352 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1353 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1354 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 1355 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1356 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 4 1357 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]]) 1358 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 1359 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32* 1360 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 1361 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[B_CASTED]], align 8 1362 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP4]]) 1363 // CHECK9-NEXT: ret void 1364 // 1365 // 1366 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 1367 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i64 noundef [[B:%.*]]) #[[ATTR1]] { 1368 // CHECK9-NEXT: entry: 1369 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1370 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1371 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1372 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1373 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1374 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1375 // CHECK9-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1376 // CHECK9-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 1377 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1378 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 1379 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1380 // CHECK9-NEXT: [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double 1381 // CHECK9-NEXT: [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00 1382 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 1383 // CHECK9-NEXT: store double [[ADD]], double* [[A]], align 8 1384 // CHECK9-NEXT: ret void 1385 // 1386 // 1387 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 1388 // CHECK9-SAME: (%struct.S1* noundef [[THIS:%.*]]) #[[ATTR0]] { 1389 // CHECK9-NEXT: entry: 1390 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1391 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1392 // CHECK9-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1393 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1394 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024) 1395 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]]) 1396 // CHECK9-NEXT: ret void 1397 // 1398 // 1399 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 1400 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]]) #[[ATTR1]] { 1401 // CHECK9-NEXT: entry: 1402 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1403 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1404 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1405 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1406 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1407 // CHECK9-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1408 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1409 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 1410 // CHECK9-NEXT: store double 2.500000e+00, double* [[A]], align 8 1411 // CHECK9-NEXT: ret void 1412 // 1413 // 1414 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88 1415 // CHECK9-SAME: () #[[ATTR0]] { 1416 // CHECK9-NEXT: entry: 1417 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1418 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20) 1419 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 1420 // CHECK9-NEXT: ret void 1421 // 1422 // 1423 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 1424 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1425 // CHECK9-NEXT: entry: 1426 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1427 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1428 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1429 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1430 // CHECK9-NEXT: ret void 1431 // 1432 // 1433 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 1434 // CHECK9-SAME: (i64 noundef [[A:%.*]], i64 noundef [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1435 // CHECK9-NEXT: entry: 1436 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1437 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1438 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1439 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1440 // CHECK9-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 1441 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1442 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1443 // CHECK9-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 1444 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1445 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1446 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16* 1447 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i16* 1448 // CHECK9-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV2]], align 2 1449 // CHECK9-NEXT: [[TMP2:%.*]] = sext i16 [[TMP1]] to i32 1450 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]]) 1451 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 1452 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32* 1453 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV3]], align 4 1454 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8 1455 // CHECK9-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV1]], align 2 1456 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[B_CASTED]] to i16* 1457 // CHECK9-NEXT: store i16 [[TMP5]], i16* [[CONV4]], align 2 1458 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8 1459 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]]) 1460 // CHECK9-NEXT: ret void 1461 // 1462 // 1463 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 1464 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR1]] { 1465 // CHECK9-NEXT: entry: 1466 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1467 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1468 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1469 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1470 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1471 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1472 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1473 // CHECK9-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 1474 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1475 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16* 1476 // CHECK9-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 2 1477 // CHECK9-NEXT: [[CONV2:%.*]] = sext i16 [[TMP0]] to i32 1478 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 1479 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]] 1480 // CHECK9-NEXT: store i32 [[ADD]], i32* [[CONV]], align 4 1481 // CHECK9-NEXT: ret void 1482 // 1483 // 1484 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 1485 // CHECK11-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] { 1486 // CHECK11-NEXT: entry: 1487 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1488 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 1489 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1490 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1491 // CHECK11-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]]) 1492 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1493 // CHECK11-NEXT: ret void 1494 // 1495 // 1496 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 1497 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 1498 // CHECK11-NEXT: entry: 1499 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1500 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1501 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1502 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1503 // CHECK11-NEXT: ret void 1504 // 1505 // 1506 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 1507 // CHECK11-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1508 // CHECK11-NEXT: entry: 1509 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1510 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1511 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1512 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1513 // CHECK11-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]]) 1514 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 1515 // CHECK11-NEXT: ret void 1516 // 1517 // 1518 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 1519 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1520 // CHECK11-NEXT: entry: 1521 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1522 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1523 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1524 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1525 // CHECK11-NEXT: ret void 1526 // 1527 // 1528 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 1529 // CHECK11-SAME: (%struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1530 // CHECK11-NEXT: entry: 1531 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 1532 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1533 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1534 // CHECK11-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1535 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1536 // CHECK11-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 1537 // CHECK11-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 1538 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1539 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 1540 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1541 // CHECK11-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]]) 1542 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[B_ADDR]], align 4 1543 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[B_CASTED]], align 4 1544 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_CASTED]], align 4 1545 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP4]]) 1546 // CHECK11-NEXT: ret void 1547 // 1548 // 1549 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 1550 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1]] { 1551 // CHECK11-NEXT: entry: 1552 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1553 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1554 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 1555 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1556 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1557 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1558 // CHECK11-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 1559 // CHECK11-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 1560 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 1561 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4 1562 // CHECK11-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double 1563 // CHECK11-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 1564 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 1565 // CHECK11-NEXT: store double [[ADD]], double* [[A]], align 4 1566 // CHECK11-NEXT: ret void 1567 // 1568 // 1569 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 1570 // CHECK11-SAME: (%struct.S1* noundef [[THIS:%.*]]) #[[ATTR0]] { 1571 // CHECK11-NEXT: entry: 1572 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 1573 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1574 // CHECK11-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 1575 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 1576 // CHECK11-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024) 1577 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]]) 1578 // CHECK11-NEXT: ret void 1579 // 1580 // 1581 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 1582 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.S1* noundef [[THIS:%.*]]) #[[ATTR1]] { 1583 // CHECK11-NEXT: entry: 1584 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1585 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1586 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 1587 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1588 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1589 // CHECK11-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 1590 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 1591 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0 1592 // CHECK11-NEXT: store double 2.500000e+00, double* [[A]], align 4 1593 // CHECK11-NEXT: ret void 1594 // 1595 // 1596 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88 1597 // CHECK11-SAME: () #[[ATTR0]] { 1598 // CHECK11-NEXT: entry: 1599 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1600 // CHECK11-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20) 1601 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 1602 // CHECK11-NEXT: ret void 1603 // 1604 // 1605 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 1606 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1607 // CHECK11-NEXT: entry: 1608 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1609 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1610 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1611 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1612 // CHECK11-NEXT: ret void 1613 // 1614 // 1615 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 1616 // CHECK11-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1617 // CHECK11-NEXT: entry: 1618 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1619 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1620 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1621 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1622 // CHECK11-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1623 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) 1624 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1625 // CHECK11-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 1626 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 1627 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16* 1628 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i16* 1629 // CHECK11-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV1]], align 2 1630 // CHECK11-NEXT: [[TMP2:%.*]] = sext i16 [[TMP1]] to i32 1631 // CHECK11-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]]) 1632 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4 1633 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4 1634 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4 1635 // CHECK11-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 2 1636 // CHECK11-NEXT: [[CONV2:%.*]] = bitcast i32* [[B_CASTED]] to i16* 1637 // CHECK11-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2 1638 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4 1639 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]]) 1640 // CHECK11-NEXT: ret void 1641 // 1642 // 1643 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5 1644 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1]] { 1645 // CHECK11-NEXT: entry: 1646 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1647 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1648 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1649 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1650 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1651 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1652 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1653 // CHECK11-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 1654 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16* 1655 // CHECK11-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 2 1656 // CHECK11-NEXT: [[CONV1:%.*]] = sext i16 [[TMP0]] to i32 1657 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 1658 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]] 1659 // CHECK11-NEXT: store i32 [[ADD]], i32* [[A_ADDR]], align 4 1660 // CHECK11-NEXT: ret void 1661 // 1662