1 // Test host codegen. 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 6 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 8 9 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 10 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 12 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 13 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 15 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} 16 17 // Test target codegen - host bc file has to be created first. 18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 22 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 23 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 24 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 25 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 26 27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 28 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s 29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s 31 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 32 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s 33 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 34 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s 35 // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} 36 37 // expected-no-diagnostics 38 #ifndef HEADER 39 #define HEADER 40 41 // CHECK-DAG: %struct.ident_t = type { i32, i32, i32, i32, i8* } 42 // CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00" 43 // CHECK-DAG: [[DEF_LOC:@.+]] = private unnamed_addr global %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) } 44 45 // CHECK-DAG: [[S1:%.+]] = type { double } 46 // CHECK-DAG: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 } 47 48 // TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i{{32|64}}, i32, i32 } 49 50 // We have 6 target regions 51 52 // CHECK-DAG: @{{.*}} = weak constant i8 0 53 // CHECK-DAG: @{{.*}} = weak constant i8 0 54 // CHECK-DAG: @{{.*}} = weak constant i8 0 55 // CHECK-DAG: @{{.*}} = weak constant i8 0 56 // CHECK-DAG: @{{.*}} = weak constant i8 0 57 // CHECK-DAG: @{{.*}} = weak constant i8 0 58 59 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 60 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 61 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 62 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 63 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 64 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 65 66 // Check target registration is registered as a Ctor. 67 // CHECK: appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* @.omp_offloading.requires_reg, i8* null }] 68 69 70 template<typename tx> 71 tx ftemplate(int n) { 72 tx a = 0; 73 74 #pragma omp target parallel if(parallel: 0) 75 { 76 a += 1; 77 } 78 79 short b = 1; 80 #pragma omp target parallel if(parallel: 1) 81 { 82 a += b; 83 } 84 85 return a; 86 } 87 88 static 89 int fstatic(int n) { 90 91 #pragma omp target parallel if(n>1) 92 { 93 } 94 95 #pragma omp target parallel if(target: n-2>2) 96 { 97 } 98 99 return n+1; 100 } 101 102 struct S1 { 103 double a; 104 105 int r1(int n){ 106 int b = 1; 107 108 #pragma omp target parallel if(parallel: n>3) 109 { 110 this->a = (double)b + 1.5; 111 } 112 113 #pragma omp target parallel if(target: n>4) if(parallel: n>5) 114 { 115 this->a = 2.5; 116 } 117 118 return (int)a; 119 } 120 }; 121 122 // CHECK: define {{.*}}@{{.*}}bar{{.*}} 123 int bar(int n){ 124 int a = 0; 125 126 S1 S; 127 // CHECK: call {{.*}}i32 [[FS1:@.+]]([[S1]]* {{.*}}, i32 {{.*}}) 128 a += S.r1(n); 129 130 // CHECK: call {{.*}}i32 [[FSTATIC:@.+]](i32 {{.*}}) 131 a += fstatic(n); 132 133 // CHECK: call {{.*}}i32 [[FTEMPLATE:@.+]](i32 {{.*}}) 134 a += ftemplate<int>(n); 135 136 return a; 137 } 138 139 // 140 // CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) 141 // 142 // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align 143 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 144 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 3 145 // CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8 146 // CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align 147 // CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align 148 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1 149 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8* 150 // CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8 151 // CHECK: store i8 [[FB]], i8* [[CONV]], align 152 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 153 // 154 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, {{.*}}, i32 1, i32 [[NT:%.+]]) 155 // CHECK-DAG: [[NT]] = select i1 %{{.+}}, i32 0, i32 1 156 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 157 // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 158 // 159 // CHECK: [[FAIL]] 160 // CHECK: call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) 161 // CHECK: br label {{%?}}[[END]] 162 // CHECK: [[END]] 163 // 164 // 165 // 166 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 167 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 5 168 // CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8 169 // CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align 170 // CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align 171 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1 172 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8* 173 // CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8 174 // CHECK: store i8 [[FB]], i8* [[CONV]], align 175 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 176 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 177 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 4 178 // CHECK: br i1 [[CMP]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 179 // 180 // CHECK: [[IF_THEN]] 181 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 1, i32 [[NT:%.+]]) 182 // CHECK-DAG: [[NT]] = select i1 %{{.+}}, i32 0, i32 1 183 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 184 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 185 // CHECK: [[FAIL]] 186 // CHECK: call void [[HVT2:@.+]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]]) 187 // CHECK-NEXT: br label %[[END]] 188 // CHECK: [[END]] 189 // CHECK-NEXT: br label %[[IFEND:.+]] 190 // CHECK: [[IF_ELSE]] 191 // CHECK: call void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]]) 192 // CHECK-NEXT: br label %[[IFEND]] 193 // CHECK: [[IFEND]] 194 195 // 196 // CHECK: define {{.*}}[[FSTATIC]](i32 {{[^%]*}}[[PARM:%.+]]) 197 // 198 // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align 199 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 200 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 1 201 // CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8 202 // CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align 203 // CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align 204 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1 205 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8* 206 // CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8 207 // CHECK: store i8 [[FB]], i8* [[CONV]], align 208 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 209 // CHECK: [[CAPE2:%.+]] = load i8, i8* [[CAPE_ADDR]], align 210 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE2]] to i1 211 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 212 // 213 // CHECK: [[IF_THEN]] 214 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 [[NT:%.+]]) 215 // CHECK-DAG: [[NT]] = select i1 %{{.+}}, i32 0, i32 1 216 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 217 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 218 // CHECK: [[FAIL]] 219 // CHECK: call void [[HVT3:@.+]](i[[SZ]] [[ARG]]) 220 // CHECK-NEXT: br label %[[END]] 221 // CHECK: [[END]] 222 // CHECK-NEXT: br label %[[IFEND:.+]] 223 // CHECK: [[IF_ELSE]] 224 // CHECK: call void [[HVT3]](i[[SZ]] [[ARG]]) 225 // CHECK-NEXT: br label %[[IFEND]] 226 // CHECK: [[IFEND]] 227 // 228 // 229 // 230 // CHECK-DAG: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 231 // CHECK: [[SUB:%.+]] = sub nsw i32 [[NV]], 2 232 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[SUB]], 2 233 // CHECK: br i1 [[CMP]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 234 // 235 // CHECK: [[IF_THEN]] 236 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 0, {{.*}}, i32 1, i32 0) 237 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 238 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 239 // CHECK: [[FAIL]] 240 // CHECK: call void [[HVT4:@.+]]() 241 // CHECK-NEXT: br label %[[END]] 242 // CHECK: [[END]] 243 // CHECK-NEXT: br label %[[IFEND:.+]] 244 // CHECK: [[IF_ELSE]] 245 // CHECK: call void [[HVT4]]() 246 // CHECK-NEXT: br label %[[IFEND]] 247 // CHECK: [[IFEND]] 248 249 250 251 252 253 254 // 255 // CHECK: define {{.*}}[[FTEMPLATE]] 256 // 257 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 1) 258 // CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 259 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 260 // 261 // CHECK: [[FAIL]] 262 // CHECK: call void [[HVT5:@.+]]({{[^,]+}}) 263 // CHECK: br label {{%?}}[[END]] 264 // 265 // CHECK: [[END]] 266 // 267 // 268 // 269 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, {{.*}}, i32 1, i32 0) 270 // CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 271 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 272 // 273 // CHECK: [[FAIL]] 274 // CHECK: call void [[HVT6:@.+]]({{[^,]+}}, {{[^,]+}}) 275 // CHECK: br label {{%?}}[[END]] 276 // CHECK: [[END]] 277 278 279 280 281 282 283 // Check that the offloading functions are emitted and that the parallel function 284 // is appropriately guarded. 285 286 // CHECK: define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]]) 287 // CHECK-DAG: store i[[SZ]] [[PARM1]], i[[SZ]]* [[B_ADDR:%.+]], align 288 // CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 289 // CHECK-64: [[CONVB:%.+]] = bitcast i[[SZ]]* [[B_ADDR]] to i32* 290 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* 291 // CHECK-64: [[BV:%.+]] = load i32, i32* [[CONVB]], align 292 // CHECK-32: [[BV:%.+]] = load i32, i32* [[B_ADDR]], align 293 // CHECK-64: [[BC:%.+]] = bitcast i64* [[ARGA:%.+]] to i32* 294 // CHECK-64: store i32 [[BV]], i32* [[BC]], align 295 // CHECK-64: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[ARGA]], align 296 // CHECK-32: store i32 [[BV]], i32* [[ARGA:%.+]], align 297 // CHECK-32: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[ARGA]], align 298 // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align 299 // CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1 300 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 301 // 302 // CHECK: [[IF_THEN]] 303 // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*, i[[SZ]])* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), [[S1]]* {{.+}}, i[[SZ]] [[ARG]]) 304 // CHECK: br label {{%?}}[[END:.+]] 305 // 306 // CHECK: [[IF_ELSE]] 307 // CHECK: call void @__kmpc_serialized_parallel( 308 // CHECK: call void [[OMP_OUTLINED3]](i32* {{%.+}}, i32* {{%.+}}, [[S1]]* {{.+}}, i[[SZ]] [[ARG]]) 309 // CHECK: call void @__kmpc_end_serialized_parallel( 310 // CHECK: br label {{%?}}[[END]] 311 // 312 // CHECK: [[END]] 313 // 314 // 315 316 317 // CHECK: define internal void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM:%.+]]) 318 // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 319 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* 320 // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align 321 // CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1 322 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 323 // 324 // CHECK: [[IF_THEN]] 325 // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*)* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), [[S1]]* {{.+}}) 326 // CHECK: br label {{%?}}[[END:.+]] 327 // 328 // CHECK: [[IF_ELSE]] 329 // CHECK: call void @__kmpc_serialized_parallel( 330 // CHECK: call void [[OMP_OUTLINED4]](i32* {{%.+}}, i32* {{%.+}}, [[S1]]* {{.+}}) 331 // CHECK: call void @__kmpc_end_serialized_parallel( 332 // CHECK: br label {{%?}}[[END]] 333 // 334 // CHECK: [[END]] 335 // 336 // 337 338 339 340 341 342 343 344 345 // CHECK: define internal void [[HVT3]](i[[SZ]] [[PARM:%.+]]) 346 // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 347 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* 348 // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align 349 // CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1 350 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 351 // 352 // CHECK: [[IF_THEN]] 353 // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED1:@.+]] to void (i32*, i32*, ...)*)) 354 // CHECK: br label {{%?}}[[END:.+]] 355 // 356 // CHECK: [[IF_ELSE]] 357 // CHECK: call void @__kmpc_serialized_parallel( 358 // CHECK: call void [[OMP_OUTLINED1]](i32* {{%.+}}, i32* {{%.+}}) 359 // CHECK: call void @__kmpc_end_serialized_parallel( 360 // CHECK: br label {{%?}}[[END]] 361 // 362 // CHECK: [[END]] 363 // 364 // 365 // CHECK: define internal void [[HVT4]]() 366 // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*)) 367 // CHECK-NEXT: ret 368 // 369 // 370 371 372 373 374 375 // CHECK: define internal void [[HVT5]]( 376 // CHECK-NOT: @__kmpc_fork_call 377 // CHECK: call void @__kmpc_serialized_parallel( 378 // CHECK: call void [[OMP_OUTLINED5:@.+]](i32* {{%.+}}, i32* {{%.+}}, i[[SZ]] {{.+}}) 379 // CHECK: call void @__kmpc_end_serialized_parallel( 380 // CHECK: ret 381 // 382 // 383 384 385 // CHECK: define internal void [[HVT6]]( 386 // CHECK-NOT: call void @__kmpc_serialized_parallel( 387 // CHECK-NOT: call void [[OMP_OUTLINED5:@.+]](i32* {{%.+}}, i32* {{%.+}}, i[[SZ]] {{.+}}) 388 // CHECK-NOT: call void @__kmpc_end_serialized_parallel( 389 // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*), 390 // CHECK: ret 391 // 392 // 393 394 395 396 #endif 397