1 // Test host codegen. 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 6 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 8 9 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 10 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 12 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 13 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 15 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} 16 17 // Test target codegen - host bc file has to be created first. 18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 22 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 23 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 24 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 25 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 26 27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 28 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s 29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s 31 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 32 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s 33 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 34 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s 35 // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} 36 37 // expected-no-diagnostics 38 #ifndef HEADER 39 #define HEADER 40 41 // CHECK-DAG: %struct.ident_t = type { i32, i32, i32, i32, i8* } 42 // CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00" 43 // CHECK-DAG: [[DEF_LOC:@.+]] = private unnamed_addr global %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) } 44 45 // CHECK-DAG: [[S1:%.+]] = type { double } 46 // CHECK-DAG: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 } 47 // CHECK-DAG: [[DEVTY:%.+]] = type { i8*, i8*, [[ENTTY]]*, [[ENTTY]]* } 48 // CHECK-DAG: [[DSCTY:%.+]] = type { i32, [[DEVTY]]*, [[ENTTY]]*, [[ENTTY]]* } 49 50 // TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i{{32|64}}, i32, i32 } 51 52 // CHECK-DAG: $[[REGFN:\.omp_offloading\..+]] = comdat 53 54 // We have 6 target regions 55 56 // CHECK-DAG: @{{.*}} = weak constant i8 0 57 // CHECK-DAG: @{{.*}} = weak constant i8 0 58 // CHECK-DAG: @{{.*}} = weak constant i8 0 59 // CHECK-DAG: @{{.*}} = weak constant i8 0 60 // CHECK-DAG: @{{.*}} = weak constant i8 0 61 // CHECK-DAG: @{{.*}} = weak constant i8 0 62 63 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 64 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 65 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 66 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 67 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 68 // TCHECK: @{{.+}} = weak constant [[ENTTY]] 69 70 // Check if offloading descriptor is created. 71 // CHECK: [[ENTBEGIN:@.+]] = external constant [[ENTTY]] 72 // CHECK: [[ENTEND:@.+]] = external constant [[ENTTY]] 73 // CHECK: [[DEVBEGIN:@.+]] = extern_weak constant i8 74 // CHECK: [[DEVEND:@.+]] = extern_weak constant i8 75 // CHECK: [[IMAGES:@.+]] = internal unnamed_addr constant [1 x [[DEVTY]]] [{{.+}} { i8* [[DEVBEGIN]], i8* [[DEVEND]], [[ENTTY]]* [[ENTBEGIN]], [[ENTTY]]* [[ENTEND]] }], comdat($[[REGFN]]) 76 // CHECK: [[DESC:@.+]] = internal constant [[DSCTY]] { i32 1, [[DEVTY]]* getelementptr inbounds ([1 x [[DEVTY]]], [1 x [[DEVTY]]]* [[IMAGES]], i32 0, i32 0), [[ENTTY]]* [[ENTBEGIN]], [[ENTTY]]* [[ENTEND]] }, comdat($[[REGFN]]) 77 78 // Check target registration is registered as a Ctor. 79 // CHECK: appending global [2 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* @.omp_offloading.requires_reg, i8* null }, { i32, void ()*, i8* } { i32 0, void ()* @[[REGFN]], i8* bitcast (void ()* @[[REGFN]] to i8*) }] 80 81 82 template<typename tx> 83 tx ftemplate(int n) { 84 tx a = 0; 85 86 #pragma omp target parallel if(parallel: 0) 87 { 88 a += 1; 89 } 90 91 short b = 1; 92 #pragma omp target parallel if(parallel: 1) 93 { 94 a += b; 95 } 96 97 return a; 98 } 99 100 static 101 int fstatic(int n) { 102 103 #pragma omp target parallel if(n>1) 104 { 105 } 106 107 #pragma omp target parallel if(target: n-2>2) 108 { 109 } 110 111 return n+1; 112 } 113 114 struct S1 { 115 double a; 116 117 int r1(int n){ 118 int b = 1; 119 120 #pragma omp target parallel if(parallel: n>3) 121 { 122 this->a = (double)b + 1.5; 123 } 124 125 #pragma omp target parallel if(target: n>4) if(parallel: n>5) 126 { 127 this->a = 2.5; 128 } 129 130 return (int)a; 131 } 132 }; 133 134 // CHECK: define {{.*}}@{{.*}}bar{{.*}} 135 int bar(int n){ 136 int a = 0; 137 138 S1 S; 139 // CHECK: call {{.*}}i32 [[FS1:@.+]]([[S1]]* {{.*}}, i32 {{.*}}) 140 a += S.r1(n); 141 142 // CHECK: call {{.*}}i32 [[FSTATIC:@.+]](i32 {{.*}}) 143 a += fstatic(n); 144 145 // CHECK: call {{.*}}i32 [[FTEMPLATE:@.+]](i32 {{.*}}) 146 a += ftemplate<int>(n); 147 148 return a; 149 } 150 151 // 152 // CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) 153 // 154 // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align 155 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 156 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 3 157 // CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8 158 // CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align 159 // CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align 160 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1 161 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8* 162 // CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8 163 // CHECK: store i8 [[FB]], i8* [[CONV]], align 164 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 165 // 166 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, {{.*}}, i32 1, i32 [[NT:%.+]]) 167 // CHECK-DAG: [[NT]] = select i1 %{{.+}}, i32 0, i32 1 168 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 169 // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 170 // 171 // CHECK: [[FAIL]] 172 // CHECK: call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) 173 // CHECK: br label {{%?}}[[END]] 174 // CHECK: [[END]] 175 // 176 // 177 // 178 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 179 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 5 180 // CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8 181 // CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align 182 // CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align 183 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1 184 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8* 185 // CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8 186 // CHECK: store i8 [[FB]], i8* [[CONV]], align 187 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 188 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 189 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 4 190 // CHECK: br i1 [[CMP]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 191 // 192 // CHECK: [[IF_THEN]] 193 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 1, i32 [[NT:%.+]]) 194 // CHECK-DAG: [[NT]] = select i1 %{{.+}}, i32 0, i32 1 195 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 196 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 197 // CHECK: [[FAIL]] 198 // CHECK: call void [[HVT2:@.+]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]]) 199 // CHECK-NEXT: br label %[[END]] 200 // CHECK: [[END]] 201 // CHECK-NEXT: br label %[[IFEND:.+]] 202 // CHECK: [[IF_ELSE]] 203 // CHECK: call void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]]) 204 // CHECK-NEXT: br label %[[IFEND]] 205 // CHECK: [[IFEND]] 206 207 // 208 // CHECK: define {{.*}}[[FSTATIC]](i32 {{[^%]*}}[[PARM:%.+]]) 209 // 210 // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align 211 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 212 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 1 213 // CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8 214 // CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align 215 // CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align 216 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1 217 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8* 218 // CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8 219 // CHECK: store i8 [[FB]], i8* [[CONV]], align 220 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 221 // CHECK: [[CAPE2:%.+]] = load i8, i8* [[CAPE_ADDR]], align 222 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE2]] to i1 223 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 224 // 225 // CHECK: [[IF_THEN]] 226 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 [[NT:%.+]]) 227 // CHECK-DAG: [[NT]] = select i1 %{{.+}}, i32 0, i32 1 228 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 229 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 230 // CHECK: [[FAIL]] 231 // CHECK: call void [[HVT3:@.+]](i[[SZ]] [[ARG]]) 232 // CHECK-NEXT: br label %[[END]] 233 // CHECK: [[END]] 234 // CHECK-NEXT: br label %[[IFEND:.+]] 235 // CHECK: [[IF_ELSE]] 236 // CHECK: call void [[HVT3]](i[[SZ]] [[ARG]]) 237 // CHECK-NEXT: br label %[[IFEND]] 238 // CHECK: [[IFEND]] 239 // 240 // 241 // 242 // CHECK-DAG: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 243 // CHECK: [[SUB:%.+]] = sub nsw i32 [[NV]], 2 244 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[SUB]], 2 245 // CHECK: br i1 [[CMP]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 246 // 247 // CHECK: [[IF_THEN]] 248 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 0, {{.*}}, i32 1, i32 0) 249 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 250 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 251 // CHECK: [[FAIL]] 252 // CHECK: call void [[HVT4:@.+]]() 253 // CHECK-NEXT: br label %[[END]] 254 // CHECK: [[END]] 255 // CHECK-NEXT: br label %[[IFEND:.+]] 256 // CHECK: [[IF_ELSE]] 257 // CHECK: call void [[HVT4]]() 258 // CHECK-NEXT: br label %[[IFEND]] 259 // CHECK: [[IFEND]] 260 261 262 263 264 265 266 // 267 // CHECK: define {{.*}}[[FTEMPLATE]] 268 // 269 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 1) 270 // CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 271 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 272 // 273 // CHECK: [[FAIL]] 274 // CHECK: call void [[HVT5:@.+]]({{[^,]+}}) 275 // CHECK: br label {{%?}}[[END]] 276 // 277 // CHECK: [[END]] 278 // 279 // 280 // 281 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, {{.*}}, i32 1, i32 0) 282 // CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 283 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 284 // 285 // CHECK: [[FAIL]] 286 // CHECK: call void [[HVT6:@.+]]({{[^,]+}}, {{[^,]+}}) 287 // CHECK: br label {{%?}}[[END]] 288 // CHECK: [[END]] 289 290 291 292 293 294 295 // Check that the offloading functions are emitted and that the parallel function 296 // is appropriately guarded. 297 298 // CHECK: define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]]) 299 // CHECK-DAG: store i[[SZ]] [[PARM1]], i[[SZ]]* [[B_ADDR:%.+]], align 300 // CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 301 // CHECK-64: [[CONVB:%.+]] = bitcast i[[SZ]]* [[B_ADDR]] to i32* 302 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* 303 // CHECK-64: [[BV:%.+]] = load i32, i32* [[CONVB]], align 304 // CHECK-32: [[BV:%.+]] = load i32, i32* [[B_ADDR]], align 305 // CHECK-64: [[BC:%.+]] = bitcast i64* [[ARGA:%.+]] to i32* 306 // CHECK-64: store i32 [[BV]], i32* [[BC]], align 307 // CHECK-64: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[ARGA]], align 308 // CHECK-32: store i32 [[BV]], i32* [[ARGA:%.+]], align 309 // CHECK-32: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[ARGA]], align 310 // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align 311 // CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1 312 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 313 // 314 // CHECK: [[IF_THEN]] 315 // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*, i[[SZ]])* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), [[S1]]* {{.+}}, i[[SZ]] [[ARG]]) 316 // CHECK: br label {{%?}}[[END:.+]] 317 // 318 // CHECK: [[IF_ELSE]] 319 // CHECK: call void @__kmpc_serialized_parallel( 320 // CHECK: call void [[OMP_OUTLINED3]](i32* {{%.+}}, i32* {{%.+}}, [[S1]]* {{.+}}, i[[SZ]] [[ARG]]) 321 // CHECK: call void @__kmpc_end_serialized_parallel( 322 // CHECK: br label {{%?}}[[END]] 323 // 324 // CHECK: [[END]] 325 // 326 // 327 328 329 // CHECK: define internal void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM:%.+]]) 330 // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 331 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* 332 // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align 333 // CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1 334 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 335 // 336 // CHECK: [[IF_THEN]] 337 // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*)* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), [[S1]]* {{.+}}) 338 // CHECK: br label {{%?}}[[END:.+]] 339 // 340 // CHECK: [[IF_ELSE]] 341 // CHECK: call void @__kmpc_serialized_parallel( 342 // CHECK: call void [[OMP_OUTLINED4]](i32* {{%.+}}, i32* {{%.+}}, [[S1]]* {{.+}}) 343 // CHECK: call void @__kmpc_end_serialized_parallel( 344 // CHECK: br label {{%?}}[[END]] 345 // 346 // CHECK: [[END]] 347 // 348 // 349 350 351 352 353 354 355 356 357 // CHECK: define internal void [[HVT3]](i[[SZ]] [[PARM:%.+]]) 358 // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 359 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* 360 // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align 361 // CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1 362 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 363 // 364 // CHECK: [[IF_THEN]] 365 // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED1:@.+]] to void (i32*, i32*, ...)*)) 366 // CHECK: br label {{%?}}[[END:.+]] 367 // 368 // CHECK: [[IF_ELSE]] 369 // CHECK: call void @__kmpc_serialized_parallel( 370 // CHECK: call void [[OMP_OUTLINED1]](i32* {{%.+}}, i32* {{%.+}}) 371 // CHECK: call void @__kmpc_end_serialized_parallel( 372 // CHECK: br label {{%?}}[[END]] 373 // 374 // CHECK: [[END]] 375 // 376 // 377 // CHECK: define internal void [[HVT4]]() 378 // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*)) 379 // CHECK-NEXT: ret 380 // 381 // 382 383 384 385 386 387 // CHECK: define internal void [[HVT5]]( 388 // CHECK-NOT: @__kmpc_fork_call 389 // CHECK: call void @__kmpc_serialized_parallel( 390 // CHECK: call void [[OMP_OUTLINED5:@.+]](i32* {{%.+}}, i32* {{%.+}}, i[[SZ]] {{.+}}) 391 // CHECK: call void @__kmpc_end_serialized_parallel( 392 // CHECK: ret 393 // 394 // 395 396 397 // CHECK: define internal void [[HVT6]]( 398 // CHECK-NOT: call void @__kmpc_serialized_parallel( 399 // CHECK-NOT: call void [[OMP_OUTLINED5:@.+]](i32* {{%.+}}, i32* {{%.+}}, i[[SZ]] {{.+}}) 400 // CHECK-NOT: call void @__kmpc_end_serialized_parallel( 401 // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*), 402 // CHECK: ret 403 // 404 // 405 406 407 408 #endif 409