1 // Test host codegen. 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 6 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 8 9 // Test target codegen - host bc file has to be created first. 10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 11 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 12 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 13 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 14 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 15 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 16 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 17 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 18 19 // expected-no-diagnostics 20 #ifndef HEADER 21 #define HEADER 22 23 // CHECK-DAG: %ident_t = type { i32, i32, i32, i32, i8* } 24 // CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00" 25 // CHECK-DAG: [[DEF_LOC:@.+]] = private unnamed_addr constant %ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) } 26 27 // CHECK-DAG: [[S1:%.+]] = type { double } 28 // CHECK-DAG: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 } 29 // CHECK-DAG: [[DEVTY:%.+]] = type { i8*, i8*, [[ENTTY]]*, [[ENTTY]]* } 30 // CHECK-DAG: [[DSCTY:%.+]] = type { i32, [[DEVTY]]*, [[ENTTY]]*, [[ENTTY]]* } 31 32 // TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i{{32|64}}, i32, i32 } 33 34 // CHECK-DAG: $[[REGFN:\.omp_offloading\..+]] = comdat 35 36 // We have 6 target regions 37 38 // CHECK-DAG: @{{.*}} = private constant i8 0 39 // CHECK-DAG: @{{.*}} = private constant i8 0 40 // CHECK-DAG: @{{.*}} = private constant i8 0 41 // CHECK-DAG: @{{.*}} = private constant i8 0 42 // CHECK-DAG: @{{.*}} = private constant i8 0 43 // CHECK-DAG: @{{.*}} = private constant i8 0 44 45 // TCHECK: @{{.+}} = constant [[ENTTY]] 46 // TCHECK: @{{.+}} = constant [[ENTTY]] 47 // TCHECK: @{{.+}} = constant [[ENTTY]] 48 // TCHECK: @{{.+}} = constant [[ENTTY]] 49 // TCHECK: @{{.+}} = constant [[ENTTY]] 50 // TCHECK: @{{.+}} = constant [[ENTTY]] 51 52 // Check if offloading descriptor is created. 53 // CHECK: [[ENTBEGIN:@.+]] = external constant [[ENTTY]] 54 // CHECK: [[ENTEND:@.+]] = external constant [[ENTTY]] 55 // CHECK: [[DEVBEGIN:@.+]] = external constant i8 56 // CHECK: [[DEVEND:@.+]] = external constant i8 57 // CHECK: [[IMAGES:@.+]] = internal unnamed_addr constant [1 x [[DEVTY]]] [{{.+}} { i8* [[DEVBEGIN]], i8* [[DEVEND]], [[ENTTY]]* [[ENTBEGIN]], [[ENTTY]]* [[ENTEND]] }], comdat($[[REGFN]]) 58 // CHECK: [[DESC:@.+]] = internal constant [[DSCTY]] { i32 1, [[DEVTY]]* getelementptr inbounds ([1 x [[DEVTY]]], [1 x [[DEVTY]]]* [[IMAGES]], i32 0, i32 0), [[ENTTY]]* [[ENTBEGIN]], [[ENTTY]]* [[ENTEND]] }, comdat($[[REGFN]]) 59 60 // Check target registration is registered as a Ctor. 61 // CHECK: appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* bitcast (void (i8*)* @[[REGFN]] to void ()*), i8* bitcast (void (i8*)* @[[REGFN]] to i8*) }] 62 63 64 template<typename tx> 65 tx ftemplate(int n) { 66 tx a = 0; 67 68 #pragma omp target parallel if(parallel: 0) 69 { 70 a += 1; 71 } 72 73 short b = 1; 74 #pragma omp target parallel if(parallel: 1) 75 { 76 a += b; 77 } 78 79 return a; 80 } 81 82 static 83 int fstatic(int n) { 84 85 #pragma omp target parallel if(n>1) 86 { 87 } 88 89 #pragma omp target parallel if(target: n-2>2) 90 { 91 } 92 93 return n+1; 94 } 95 96 struct S1 { 97 double a; 98 99 int r1(int n){ 100 int b = 1; 101 102 #pragma omp target parallel if(parallel: n>3) 103 { 104 this->a = (double)b + 1.5; 105 } 106 107 #pragma omp target parallel if(target: n>4) if(parallel: n>5) 108 { 109 this->a = 2.5; 110 } 111 112 return (int)a; 113 } 114 }; 115 116 // CHECK: define {{.*}}@{{.*}}bar{{.*}} 117 int bar(int n){ 118 int a = 0; 119 120 S1 S; 121 // CHECK: call {{.*}}i32 [[FS1:@.+]]([[S1]]* {{.*}}, i32 {{.*}}) 122 a += S.r1(n); 123 124 // CHECK: call {{.*}}i32 [[FSTATIC:@.+]](i32 {{.*}}) 125 a += fstatic(n); 126 127 // CHECK: call {{.*}}i32 [[FTEMPLATE:@.+]](i32 {{.*}}) 128 a += ftemplate<int>(n); 129 130 return a; 131 } 132 133 // 134 // CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]]) 135 // 136 // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align 137 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 138 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 3 139 // CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8 140 // CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align 141 // CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align 142 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1 143 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8* 144 // CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8 145 // CHECK: store i8 [[FB]], i8* [[CONV]], align 146 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 147 // 148 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 1, i32 0) 149 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 150 // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 151 // 152 // CHECK: [[FAIL]] 153 // CHECK: call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]]) 154 // CHECK: br label {{%?}}[[END]] 155 // CHECK: [[END]] 156 // 157 // 158 // 159 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 160 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 5 161 // CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8 162 // CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align 163 // CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align 164 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1 165 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8* 166 // CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8 167 // CHECK: store i8 [[FB]], i8* [[CONV]], align 168 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 169 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 170 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 4 171 // CHECK: br i1 [[CMP]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 172 // 173 // CHECK: [[IF_THEN]] 174 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 2, {{.*}}, i32 1, i32 0) 175 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 176 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 177 // CHECK: [[FAIL]] 178 // CHECK: call void [[HVT2:@.+]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]]) 179 // CHECK-NEXT: br label %[[END]] 180 // CHECK: [[END]] 181 // CHECK-NEXT: br label %[[IFEND:.+]] 182 // CHECK: [[IF_ELSE]] 183 // CHECK: call void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]]) 184 // CHECK-NEXT: br label %[[IFEND]] 185 // CHECK: [[IFEND]] 186 187 // 188 // CHECK: define {{.*}}[[FSTATIC]](i32 {{[^%]*}}[[PARM:%.+]]) 189 // 190 // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align 191 // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 192 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[NV]], 1 193 // CHECK: [[FB:%.+]] = zext i1 [[CMP]] to i8 194 // CHECK: store i8 [[FB]], i8* [[CAPE_ADDR:%.+]], align 195 // CHECK: [[CAPE:%.+]] = load i8, i8* [[CAPE_ADDR]], align 196 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE]] to i1 197 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i8* 198 // CHECK: [[FB:%.+]] = zext i1 [[TB]] to i8 199 // CHECK: store i8 [[FB]], i8* [[CONV]], align 200 // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align 201 // CHECK: [[CAPE2:%.+]] = load i8, i8* [[CAPE_ADDR]], align 202 // CHECK: [[TB:%.+]] = trunc i8 [[CAPE2]] to i1 203 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 204 // 205 // CHECK: [[IF_THEN]] 206 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 0) 207 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 208 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 209 // CHECK: [[FAIL]] 210 // CHECK: call void [[HVT3:@.+]](i[[SZ]] [[ARG]]) 211 // CHECK-NEXT: br label %[[END]] 212 // CHECK: [[END]] 213 // CHECK-NEXT: br label %[[IFEND:.+]] 214 // CHECK: [[IF_ELSE]] 215 // CHECK: call void [[HVT3]](i[[SZ]] [[ARG]]) 216 // CHECK-NEXT: br label %[[IFEND]] 217 // CHECK: [[IFEND]] 218 // 219 // 220 // 221 // CHECK-DAG: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align 222 // CHECK: [[SUB:%.+]] = sub nsw i32 [[NV]], 2 223 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[SUB]], 2 224 // CHECK: br i1 [[CMP]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 225 // 226 // CHECK: [[IF_THEN]] 227 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 0, {{.*}}, i32 1, i32 0) 228 // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 229 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 230 // CHECK: [[FAIL]] 231 // CHECK: call void [[HVT4:@.+]]() 232 // CHECK-NEXT: br label %[[END]] 233 // CHECK: [[END]] 234 // CHECK-NEXT: br label %[[IFEND:.+]] 235 // CHECK: [[IF_ELSE]] 236 // CHECK: call void [[HVT4]]() 237 // CHECK-NEXT: br label %[[IFEND]] 238 // CHECK: [[IFEND]] 239 240 241 242 243 244 245 // 246 // CHECK: define {{.*}}[[FTEMPLATE]] 247 // 248 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 0) 249 // CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 250 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 251 // 252 // CHECK: [[FAIL]] 253 // CHECK: call void [[HVT5:@.+]]({{[^,]+}}) 254 // CHECK: br label {{%?}}[[END]] 255 // 256 // CHECK: [[END]] 257 // 258 // 259 // 260 // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 2, {{.*}}, i32 1, i32 0) 261 // CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0 262 // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]] 263 // 264 // CHECK: [[FAIL]] 265 // CHECK: call void [[HVT6:@.+]]({{[^,]+}}, {{[^,]+}}) 266 // CHECK: br label {{%?}}[[END]] 267 // CHECK: [[END]] 268 269 270 271 272 273 274 // Check that the offloading functions are emitted and that the parallel function 275 // is appropriately guarded. 276 277 // CHECK: define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]]) 278 // CHECK-DAG: store i[[SZ]] [[PARM1]], i[[SZ]]* [[B_ADDR:%.+]], align 279 // CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 280 // CHECK-64: [[CONVB:%.+]] = bitcast i[[SZ]]* [[B_ADDR]] to i32* 281 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* 282 // CHECK-64: [[BV:%.+]] = load i32, i32* [[CONVB]], align 283 // CHECK-32: [[BV:%.+]] = load i32, i32* [[B_ADDR]], align 284 // CHECK-64: [[BC:%.+]] = bitcast i64* [[ARGA:%.+]] to i32* 285 // CHECK-64: store i32 [[BV]], i32* [[BC]], align 286 // CHECK-64: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[ARGA]], align 287 // CHECK-32: store i32 [[BV]], i32* [[ARGA:%.+]], align 288 // CHECK-32: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[ARGA]], align 289 // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align 290 // CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1 291 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 292 // 293 // CHECK: [[IF_THEN]] 294 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*, i[[SZ]])* [[OMP_OUTLINED3:@.+]] to void (i32*, i32*, ...)*), [[S1]]* {{.+}}, i[[SZ]] [[ARG]]) 295 // CHECK: br label {{%?}}[[END:.+]] 296 // 297 // CHECK: [[IF_ELSE]] 298 // CHECK: call void @__kmpc_serialized_parallel( 299 // CHECK: call void [[OMP_OUTLINED3]](i32* {{%.+}}, i32* {{%.+}}, [[S1]]* {{.+}}, i[[SZ]] [[ARG]]) 300 // CHECK: call void @__kmpc_end_serialized_parallel( 301 // CHECK: br label {{%?}}[[END]] 302 // 303 // CHECK: [[END]] 304 // 305 // 306 307 308 // CHECK: define internal void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM:%.+]]) 309 // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 310 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* 311 // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align 312 // CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1 313 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 314 // 315 // CHECK: [[IF_THEN]] 316 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [[S1]]*)* [[OMP_OUTLINED4:@.+]] to void (i32*, i32*, ...)*), [[S1]]* {{.+}}) 317 // CHECK: br label {{%?}}[[END:.+]] 318 // 319 // CHECK: [[IF_ELSE]] 320 // CHECK: call void @__kmpc_serialized_parallel( 321 // CHECK: call void [[OMP_OUTLINED4]](i32* {{%.+}}, i32* {{%.+}}, [[S1]]* {{.+}}) 322 // CHECK: call void @__kmpc_end_serialized_parallel( 323 // CHECK: br label {{%?}}[[END]] 324 // 325 // CHECK: [[END]] 326 // 327 // 328 329 330 331 332 333 334 335 336 // CHECK: define internal void [[HVT3]](i[[SZ]] [[PARM:%.+]]) 337 // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align 338 // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i8* 339 // CHECK: [[IFC:%.+]] = load i8, i8* [[CONV]], align 340 // CHECK: [[TB:%.+]] = trunc i8 [[IFC]] to i1 341 // CHECK: br i1 [[TB]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]] 342 // 343 // CHECK: [[IF_THEN]] 344 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED1:@.+]] to void (i32*, i32*, ...)*)) 345 // CHECK: br label {{%?}}[[END:.+]] 346 // 347 // CHECK: [[IF_ELSE]] 348 // CHECK: call void @__kmpc_serialized_parallel( 349 // CHECK: call void [[OMP_OUTLINED1]](i32* {{%.+}}, i32* {{%.+}}) 350 // CHECK: call void @__kmpc_end_serialized_parallel( 351 // CHECK: br label {{%?}}[[END]] 352 // 353 // CHECK: [[END]] 354 // 355 // 356 // CHECK: define internal void [[HVT4]]() 357 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* [[OMP_OUTLINED2:@.+]] to void (i32*, i32*, ...)*)) 358 // CHECK-NEXT: ret 359 // 360 // 361 362 363 364 365 366 // CHECK: define internal void [[HVT5]]( 367 // CHECK-NOT: @__kmpc_fork_call 368 // CHECK: call void @__kmpc_serialized_parallel( 369 // CHECK: call void [[OMP_OUTLINED5:@.+]](i32* {{%.+}}, i32* {{%.+}}, i[[SZ]] {{.+}}) 370 // CHECK: call void @__kmpc_end_serialized_parallel( 371 // CHECK: ret 372 // 373 // 374 375 376 // CHECK: define internal void [[HVT6]]( 377 // CHECK-NOT: call void @__kmpc_serialized_parallel( 378 // CHECK-NOT: call void [[OMP_OUTLINED5:@.+]](i32* {{%.+}}, i32* {{%.+}}, i[[SZ]] {{.+}}) 379 // CHECK-NOT: call void @__kmpc_end_serialized_parallel( 380 // CHECK: call {{.*}}void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%ident_t* [[DEF_LOC]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i[[SZ]], i[[SZ]])* [[OMP_OUTLINED5:@.+]] to void (i32*, i32*, ...)*), 381 // CHECK: ret 382 // 383 // 384 385 386 387 #endif 388