1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test host codegen. 3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 5 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 9 10 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 17 // Test target codegen - host bc file has to be created first. 18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9 20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 22 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 23 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11 24 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 25 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 26 27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 28 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 31 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 32 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 34 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 35 36 // Test host codegen. 37 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 38 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 39 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18 40 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 41 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 42 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20 43 44 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 45 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 46 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 47 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 48 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 49 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 50 51 // Test target codegen - host bc file has to be created first. 52 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 53 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK25 54 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 55 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK26 56 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 57 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK27 58 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 59 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK28 60 61 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 62 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 63 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 64 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 65 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 66 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 67 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 68 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 69 70 // expected-no-diagnostics 71 #ifndef HEADER 72 #define HEADER 73 74 75 76 77 // We have 8 target regions, but only 6 that actually will generate offloading 78 // code and have mapped arguments, and only 4 have all-constant map sizes. 79 80 81 82 // Check target registration is registered as a Ctor. 83 84 85 template<typename tx, typename ty> 86 struct TT{ 87 tx X; 88 ty Y; 89 }; 90 91 int foo(int n) { 92 int a = 0; 93 short aa = 0; 94 float b[10]; 95 float bn[n]; 96 double c[5][10]; 97 double cn[5][n]; 98 TT<long long, char> d; 99 100 #pragma omp target parallel nowait 101 { 102 } 103 104 #pragma omp target parallel if(target: 0) 105 { 106 a += 1; 107 } 108 109 110 #pragma omp target parallel if(target: 1) 111 { 112 aa += 1; 113 #pragma omp cancel parallel 114 } 115 116 117 118 119 #pragma omp target parallel if(target: n>10) 120 { 121 a += 1; 122 aa += 1; 123 } 124 125 // We capture 3 VLA sizes in this target region 126 127 128 129 130 131 // The names below are not necessarily consistent with the names used for the 132 // addresses above as some are repeated. 133 134 135 136 137 138 139 140 141 142 143 144 #pragma omp target parallel if(target: n>20) 145 { 146 a += 1; 147 b[2] += 1.0; 148 bn[3] += 1.0; 149 c[1][2] += 1.0; 150 cn[1][3] += 1.0; 151 d.X += 1; 152 d.Y += 1; 153 } 154 155 return a; 156 } 157 158 // Check that the offloading functions are emitted and that the arguments are 159 // correct and loaded correctly for the target regions in foo(). 160 161 162 163 // Create stack storage and store argument in there. 164 165 // Create stack storage and store argument in there. 166 167 // Create stack storage and store argument in there. 168 169 // Create local storage for each capture. 170 171 172 173 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. 174 175 template<typename tx> 176 tx ftemplate(int n) { 177 tx a = 0; 178 short aa = 0; 179 tx b[10]; 180 181 #pragma omp target parallel if(target: n>40) 182 { 183 a += 1; 184 aa += 1; 185 b[2] += 1; 186 } 187 188 return a; 189 } 190 191 static 192 int fstatic(int n) { 193 int a = 0; 194 short aa = 0; 195 char aaa = 0; 196 int b[10]; 197 198 #pragma omp target parallel if(target: n>50) 199 { 200 a += 1; 201 aa += 1; 202 aaa += 1; 203 b[2] += 1; 204 } 205 206 return a; 207 } 208 209 struct S1 { 210 double a; 211 212 int r1(int n){ 213 int b = n+1; 214 short int c[2][n]; 215 216 #pragma omp target parallel if(target: n>60) 217 { 218 this->a = (double)b + 1.5; 219 c[1][1] = ++a; 220 } 221 222 return c[1][1] + (int)b; 223 } 224 }; 225 226 int bar(int n){ 227 int a = 0; 228 229 a += foo(n); 230 231 S1 S; 232 a += S.r1(n); 233 234 a += fstatic(n); 235 236 a += ftemplate<int>(n); 237 238 return a; 239 } 240 241 242 243 // We capture 2 VLA sizes in this target region 244 245 246 // The names below are not necessarily consistent with the names used for the 247 // addresses above as some are repeated. 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 // Check that the offloading functions are emitted and that the arguments are 268 // correct and loaded correctly for the target regions of the callees of bar(). 269 270 // Create local storage for each capture. 271 // Store captures in the context. 272 273 274 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. 275 276 277 // Create local storage for each capture. 278 // Store captures in the context. 279 280 281 282 283 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. 284 285 // Create local storage for each capture. 286 // Store captures in the context. 287 288 289 290 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function. 291 292 293 #endif 294 // CHECK1-LABEL: define {{[^@]+}}@_Z3fooi 295 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 296 // CHECK1-NEXT: entry: 297 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 298 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 299 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 300 // CHECK1-NEXT: [[B:%.*]] = alloca [10 x float], align 4 301 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 302 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 303 // CHECK1-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 304 // CHECK1-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 305 // CHECK1-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8 306 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 307 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 308 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 309 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 310 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 311 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 312 // CHECK1-NEXT: [[A_CASTED3:%.*]] = alloca i64, align 8 313 // CHECK1-NEXT: [[AA_CASTED5:%.*]] = alloca i64, align 8 314 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 315 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 316 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 317 // CHECK1-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8 318 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [9 x i8*], align 8 319 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [9 x i8*], align 8 320 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [9 x i8*], align 8 321 // CHECK1-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [9 x i64], align 8 322 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 323 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 324 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 325 // CHECK1-NEXT: store i16 0, i16* [[AA]], align 2 326 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 327 // CHECK1-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 328 // CHECK1-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 329 // CHECK1-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 330 // CHECK1-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4 331 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 332 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 333 // CHECK1-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 334 // CHECK1-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]] 335 // CHECK1-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8 336 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 337 // CHECK1-NEXT: [[TMP7:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1, i64 40, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 338 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.kmp_task_t_with_privates* 339 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP8]], i32 0, i32 0 340 // CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* [[TMP7]]) 341 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[A]], align 4 342 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 343 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV]], align 4 344 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[A_CASTED]], align 8 345 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104(i64 [[TMP12]]) #[[ATTR3:[0-9]+]] 346 // CHECK1-NEXT: [[TMP13:%.*]] = load i16, i16* [[AA]], align 2 347 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 348 // CHECK1-NEXT: store i16 [[TMP13]], i16* [[CONV2]], align 2 349 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[AA_CASTED]], align 8 350 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 351 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 352 // CHECK1-NEXT: store i64 [[TMP14]], i64* [[TMP16]], align 8 353 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 354 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 355 // CHECK1-NEXT: store i64 [[TMP14]], i64* [[TMP18]], align 8 356 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 357 // CHECK1-NEXT: store i8* null, i8** [[TMP19]], align 8 358 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 359 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 360 // CHECK1-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110.region_id, i32 1, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 361 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 362 // CHECK1-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 363 // CHECK1: omp_offload.failed: 364 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110(i64 [[TMP14]]) #[[ATTR3]] 365 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 366 // CHECK1: omp_offload.cont: 367 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 368 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[A_CASTED3]] to i32* 369 // CHECK1-NEXT: store i32 [[TMP24]], i32* [[CONV4]], align 4 370 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[A_CASTED3]], align 8 371 // CHECK1-NEXT: [[TMP26:%.*]] = load i16, i16* [[AA]], align 2 372 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED5]] to i16* 373 // CHECK1-NEXT: store i16 [[TMP26]], i16* [[CONV6]], align 2 374 // CHECK1-NEXT: [[TMP27:%.*]] = load i64, i64* [[AA_CASTED5]], align 8 375 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[N_ADDR]], align 4 376 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP28]], 10 377 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 378 // CHECK1: omp_if.then: 379 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 380 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 381 // CHECK1-NEXT: store i64 [[TMP25]], i64* [[TMP30]], align 8 382 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 383 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 384 // CHECK1-NEXT: store i64 [[TMP25]], i64* [[TMP32]], align 8 385 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 386 // CHECK1-NEXT: store i8* null, i8** [[TMP33]], align 8 387 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 388 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i64* 389 // CHECK1-NEXT: store i64 [[TMP27]], i64* [[TMP35]], align 8 390 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 391 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 392 // CHECK1-NEXT: store i64 [[TMP27]], i64* [[TMP37]], align 8 393 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 394 // CHECK1-NEXT: store i8* null, i8** [[TMP38]], align 8 395 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 396 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 397 // CHECK1-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119.region_id, i32 2, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 398 // CHECK1-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 399 // CHECK1-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED10:%.*]], label [[OMP_OFFLOAD_CONT11:%.*]] 400 // CHECK1: omp_offload.failed10: 401 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR3]] 402 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT11]] 403 // CHECK1: omp_offload.cont11: 404 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 405 // CHECK1: omp_if.else: 406 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR3]] 407 // CHECK1-NEXT: br label [[OMP_IF_END]] 408 // CHECK1: omp_if.end: 409 // CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[A]], align 4 410 // CHECK1-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32* 411 // CHECK1-NEXT: store i32 [[TMP43]], i32* [[CONV13]], align 4 412 // CHECK1-NEXT: [[TMP44:%.*]] = load i64, i64* [[A_CASTED12]], align 8 413 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[N_ADDR]], align 4 414 // CHECK1-NEXT: [[CMP14:%.*]] = icmp sgt i32 [[TMP45]], 20 415 // CHECK1-NEXT: br i1 [[CMP14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE21:%.*]] 416 // CHECK1: omp_if.then15: 417 // CHECK1-NEXT: [[TMP46:%.*]] = mul nuw i64 [[TMP2]], 4 418 // CHECK1-NEXT: [[TMP47:%.*]] = mul nuw i64 5, [[TMP5]] 419 // CHECK1-NEXT: [[TMP48:%.*]] = mul nuw i64 [[TMP47]], 8 420 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 421 // CHECK1-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i64* 422 // CHECK1-NEXT: store i64 [[TMP44]], i64* [[TMP50]], align 8 423 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 424 // CHECK1-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i64* 425 // CHECK1-NEXT: store i64 [[TMP44]], i64* [[TMP52]], align 8 426 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 427 // CHECK1-NEXT: store i64 4, i64* [[TMP53]], align 8 428 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0 429 // CHECK1-NEXT: store i8* null, i8** [[TMP54]], align 8 430 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1 431 // CHECK1-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to [10 x float]** 432 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP56]], align 8 433 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1 434 // CHECK1-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to [10 x float]** 435 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP58]], align 8 436 // CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 437 // CHECK1-NEXT: store i64 40, i64* [[TMP59]], align 8 438 // CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1 439 // CHECK1-NEXT: store i8* null, i8** [[TMP60]], align 8 440 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 2 441 // CHECK1-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64* 442 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP62]], align 8 443 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 2 444 // CHECK1-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64* 445 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP64]], align 8 446 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 447 // CHECK1-NEXT: store i64 8, i64* [[TMP65]], align 8 448 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 2 449 // CHECK1-NEXT: store i8* null, i8** [[TMP66]], align 8 450 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 3 451 // CHECK1-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to float** 452 // CHECK1-NEXT: store float* [[VLA]], float** [[TMP68]], align 8 453 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 3 454 // CHECK1-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to float** 455 // CHECK1-NEXT: store float* [[VLA]], float** [[TMP70]], align 8 456 // CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 457 // CHECK1-NEXT: store i64 [[TMP46]], i64* [[TMP71]], align 8 458 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 3 459 // CHECK1-NEXT: store i8* null, i8** [[TMP72]], align 8 460 // CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 4 461 // CHECK1-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to [5 x [10 x double]]** 462 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP74]], align 8 463 // CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 4 464 // CHECK1-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to [5 x [10 x double]]** 465 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP76]], align 8 466 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 467 // CHECK1-NEXT: store i64 400, i64* [[TMP77]], align 8 468 // CHECK1-NEXT: [[TMP78:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 4 469 // CHECK1-NEXT: store i8* null, i8** [[TMP78]], align 8 470 // CHECK1-NEXT: [[TMP79:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 5 471 // CHECK1-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64* 472 // CHECK1-NEXT: store i64 5, i64* [[TMP80]], align 8 473 // CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 5 474 // CHECK1-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i64* 475 // CHECK1-NEXT: store i64 5, i64* [[TMP82]], align 8 476 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5 477 // CHECK1-NEXT: store i64 8, i64* [[TMP83]], align 8 478 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 5 479 // CHECK1-NEXT: store i8* null, i8** [[TMP84]], align 8 480 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 6 481 // CHECK1-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i64* 482 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP86]], align 8 483 // CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 6 484 // CHECK1-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64* 485 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP88]], align 8 486 // CHECK1-NEXT: [[TMP89:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 487 // CHECK1-NEXT: store i64 8, i64* [[TMP89]], align 8 488 // CHECK1-NEXT: [[TMP90:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 6 489 // CHECK1-NEXT: store i8* null, i8** [[TMP90]], align 8 490 // CHECK1-NEXT: [[TMP91:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 7 491 // CHECK1-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to double** 492 // CHECK1-NEXT: store double* [[VLA1]], double** [[TMP92]], align 8 493 // CHECK1-NEXT: [[TMP93:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 7 494 // CHECK1-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 495 // CHECK1-NEXT: store double* [[VLA1]], double** [[TMP94]], align 8 496 // CHECK1-NEXT: [[TMP95:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 497 // CHECK1-NEXT: store i64 [[TMP48]], i64* [[TMP95]], align 8 498 // CHECK1-NEXT: [[TMP96:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 7 499 // CHECK1-NEXT: store i8* null, i8** [[TMP96]], align 8 500 // CHECK1-NEXT: [[TMP97:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 8 501 // CHECK1-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to %struct.TT** 502 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP98]], align 8 503 // CHECK1-NEXT: [[TMP99:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 8 504 // CHECK1-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to %struct.TT** 505 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP100]], align 8 506 // CHECK1-NEXT: [[TMP101:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8 507 // CHECK1-NEXT: store i64 16, i64* [[TMP101]], align 8 508 // CHECK1-NEXT: [[TMP102:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 8 509 // CHECK1-NEXT: store i8* null, i8** [[TMP102]], align 8 510 // CHECK1-NEXT: [[TMP103:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 511 // CHECK1-NEXT: [[TMP104:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 512 // CHECK1-NEXT: [[TMP105:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 513 // CHECK1-NEXT: [[TMP106:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144.region_id, i32 9, i8** [[TMP103]], i8** [[TMP104]], i64* [[TMP105]], i64* getelementptr inbounds ([9 x i64], [9 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 514 // CHECK1-NEXT: [[TMP107:%.*]] = icmp ne i32 [[TMP106]], 0 515 // CHECK1-NEXT: br i1 [[TMP107]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]] 516 // CHECK1: omp_offload.failed19: 517 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i64 [[TMP44]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 518 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT20]] 519 // CHECK1: omp_offload.cont20: 520 // CHECK1-NEXT: br label [[OMP_IF_END22:%.*]] 521 // CHECK1: omp_if.else21: 522 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i64 [[TMP44]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 523 // CHECK1-NEXT: br label [[OMP_IF_END22]] 524 // CHECK1: omp_if.end22: 525 // CHECK1-NEXT: [[TMP108:%.*]] = load i32, i32* [[A]], align 4 526 // CHECK1-NEXT: [[TMP109:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 527 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP109]]) 528 // CHECK1-NEXT: ret i32 [[TMP108]] 529 // 530 // 531 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 532 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 533 // CHECK1-NEXT: entry: 534 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 535 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 536 // CHECK1-NEXT: ret void 537 // 538 // 539 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 540 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 541 // CHECK1-NEXT: entry: 542 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 543 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 544 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 545 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 546 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 547 // CHECK1-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 548 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 549 // CHECK1-NEXT: ret void 550 // 551 // 552 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry. 553 // CHECK1-SAME: (i32 signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 554 // CHECK1-NEXT: entry: 555 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 556 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 557 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 558 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 559 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 560 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 561 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 562 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 563 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 564 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 565 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 566 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 567 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 568 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 569 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 570 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 571 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 572 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 573 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 574 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]]) 575 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]]) 576 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]]) 577 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21 578 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21 579 // CHECK1-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 580 // CHECK1-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 581 // CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21 582 // CHECK1-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 583 // CHECK1-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 584 // CHECK1-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0) #[[ATTR3]] 585 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 586 // CHECK1-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 587 // CHECK1: omp_offload.failed.i: 588 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100() #[[ATTR3]] 589 // CHECK1-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 590 // CHECK1: .omp_outlined..1.exit: 591 // CHECK1-NEXT: ret i32 0 592 // 593 // 594 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104 595 // CHECK1-SAME: (i64 [[A:%.*]]) #[[ATTR2]] { 596 // CHECK1-NEXT: entry: 597 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 598 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 599 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 600 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 601 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 602 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 603 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 604 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 605 // CHECK1-NEXT: ret void 606 // 607 // 608 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 609 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 610 // CHECK1-NEXT: entry: 611 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 612 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 613 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 614 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 615 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 616 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 617 // CHECK1-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 618 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 619 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 620 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 621 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 622 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 623 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1 624 // CHECK1-NEXT: store i32 [[ADD]], i32* [[A]], align 4 625 // CHECK1-NEXT: ret void 626 // 627 // 628 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 629 // CHECK1-SAME: (i64 [[AA:%.*]]) #[[ATTR2]] { 630 // CHECK1-NEXT: entry: 631 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 632 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 2 633 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 634 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 635 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 636 // CHECK1-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 8 637 // CHECK1-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 638 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 639 // CHECK1-NEXT: ret void 640 // 641 // 642 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 643 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 644 // CHECK1-NEXT: entry: 645 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 646 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 647 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 648 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 649 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 650 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 651 // CHECK1-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 652 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 653 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 654 // CHECK1-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 655 // CHECK1-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 656 // CHECK1-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 657 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 658 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 659 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 660 // CHECK1-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 661 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 662 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 663 // CHECK1-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 664 // CHECK1-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 665 // CHECK1-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 666 // CHECK1: .cancel.exit: 667 // CHECK1-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 668 // CHECK1-NEXT: br label [[DOTCANCEL_CONTINUE]] 669 // CHECK1: .cancel.continue: 670 // CHECK1-NEXT: ret void 671 // 672 // 673 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 674 // CHECK1-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] { 675 // CHECK1-NEXT: entry: 676 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 677 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 678 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 679 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 680 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 681 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 682 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 683 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 684 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 685 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 686 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 687 // CHECK1-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8 688 // CHECK1-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 689 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 690 // CHECK1-NEXT: ret void 691 // 692 // 693 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 694 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 695 // CHECK1-NEXT: entry: 696 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 697 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 698 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 699 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 700 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 701 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 702 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 703 // CHECK1-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 704 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 705 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 706 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 707 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 708 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 709 // CHECK1-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 710 // CHECK1-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 711 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 712 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 713 // CHECK1-NEXT: store i32 [[ADD]], i32* [[A]], align 4 714 // CHECK1-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 715 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 716 // CHECK1-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 717 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 718 // CHECK1-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 719 // CHECK1-NEXT: ret void 720 // 721 // 722 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 723 // CHECK1-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]]) #[[ATTR2]] { 724 // CHECK1-NEXT: entry: 725 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 726 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 727 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 728 // CHECK1-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 729 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 730 // CHECK1-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 731 // CHECK1-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 732 // CHECK1-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 733 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 734 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 735 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 736 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 737 // CHECK1-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 738 // CHECK1-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 739 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 740 // CHECK1-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 741 // CHECK1-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 742 // CHECK1-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 743 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 744 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 745 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 746 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 747 // CHECK1-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 748 // CHECK1-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 749 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 750 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 751 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 752 // CHECK1-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 753 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 754 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 755 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 8 756 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 757 // CHECK1-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 8 758 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 759 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8 760 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 761 // CHECK1-NEXT: store float* [[TMP2]], float** [[TMP12]], align 8 762 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 763 // CHECK1-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 8 764 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 765 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8 766 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 767 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP15]], align 8 768 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 769 // CHECK1-NEXT: store double* [[TMP6]], double** [[TMP16]], align 8 770 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 771 // CHECK1-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 8 772 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 773 // CHECK1-NEXT: ret void 774 // 775 // 776 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 777 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 778 // CHECK1-NEXT: entry: 779 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 780 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 781 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 782 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 783 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 784 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 785 // CHECK1-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 786 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 787 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 788 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 789 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 790 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 791 // CHECK1-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 8 792 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 793 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 794 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 795 // CHECK1-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 8 796 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 797 // CHECK1-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 8 798 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 5 799 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[TMP11]], align 8 800 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 6 801 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP13]], align 8 802 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 7 803 // CHECK1-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 8 804 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 8 805 // CHECK1-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 8 806 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 807 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 808 // CHECK1-NEXT: store i32 [[ADD]], i32* [[A]], align 4 809 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i64 0, i64 2 810 // CHECK1-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 811 // CHECK1-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 812 // CHECK1-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 813 // CHECK1-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 814 // CHECK1-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 815 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i64 3 816 // CHECK1-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 817 // CHECK1-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 818 // CHECK1-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 819 // CHECK1-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 820 // CHECK1-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 821 // CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i64 0, i64 1 822 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i64 0, i64 2 823 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 824 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 825 // CHECK1-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 826 // CHECK1-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP14]] 827 // CHECK1-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 [[TMP23]] 828 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i64 3 829 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 830 // CHECK1-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 831 // CHECK1-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 832 // CHECK1-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 833 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8 834 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 835 // CHECK1-NEXT: store i64 [[ADD13]], i64* [[X]], align 8 836 // CHECK1-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 837 // CHECK1-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8 838 // CHECK1-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 839 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 840 // CHECK1-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 841 // CHECK1-NEXT: store i8 [[CONV16]], i8* [[Y]], align 8 842 // CHECK1-NEXT: ret void 843 // 844 // 845 // CHECK1-LABEL: define {{[^@]+}}@_Z3bari 846 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] { 847 // CHECK1-NEXT: entry: 848 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 849 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 850 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 851 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 852 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 853 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 854 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_Z3fooi(i32 signext [[TMP0]]) 855 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 856 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 857 // CHECK1-NEXT: store i32 [[ADD]], i32* [[A]], align 4 858 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 859 // CHECK1-NEXT: [[CALL1:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP2]]) 860 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 861 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 862 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 863 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 864 // CHECK1-NEXT: [[CALL3:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP4]]) 865 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 866 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 867 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 868 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 869 // CHECK1-NEXT: [[CALL5:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP6]]) 870 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 871 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 872 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 873 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 874 // CHECK1-NEXT: ret i32 [[TMP8]] 875 // 876 // 877 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 878 // CHECK1-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 { 879 // CHECK1-NEXT: entry: 880 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 881 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 882 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 883 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 884 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 885 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 886 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 887 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 888 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 889 // CHECK1-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 890 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 891 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 892 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 893 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 894 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 895 // CHECK1-NEXT: store i32 [[ADD]], i32* [[B]], align 4 896 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 897 // CHECK1-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 898 // CHECK1-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 899 // CHECK1-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 900 // CHECK1-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]] 901 // CHECK1-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2 902 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 903 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 904 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32* 905 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4 906 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8 907 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4 908 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60 909 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 910 // CHECK1: omp_if.then: 911 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 912 // CHECK1-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]] 913 // CHECK1-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2 914 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 915 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1** 916 // CHECK1-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 8 917 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 918 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 919 // CHECK1-NEXT: store double* [[A]], double** [[TMP13]], align 8 920 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 921 // CHECK1-NEXT: store i64 8, i64* [[TMP14]], align 8 922 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 923 // CHECK1-NEXT: store i8* null, i8** [[TMP15]], align 8 924 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 925 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 926 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8 927 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 928 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 929 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8 930 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 931 // CHECK1-NEXT: store i64 4, i64* [[TMP20]], align 8 932 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 933 // CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8 934 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 935 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 936 // CHECK1-NEXT: store i64 2, i64* [[TMP23]], align 8 937 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 938 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 939 // CHECK1-NEXT: store i64 2, i64* [[TMP25]], align 8 940 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 941 // CHECK1-NEXT: store i64 8, i64* [[TMP26]], align 8 942 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 943 // CHECK1-NEXT: store i8* null, i8** [[TMP27]], align 8 944 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 945 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 946 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8 947 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 948 // CHECK1-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 949 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP31]], align 8 950 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 951 // CHECK1-NEXT: store i64 8, i64* [[TMP32]], align 8 952 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 953 // CHECK1-NEXT: store i8* null, i8** [[TMP33]], align 8 954 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 955 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16** 956 // CHECK1-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 8 957 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 958 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16** 959 // CHECK1-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 8 960 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 961 // CHECK1-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 8 962 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 963 // CHECK1-NEXT: store i8* null, i8** [[TMP39]], align 8 964 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 965 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 966 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 967 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 968 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 969 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 970 // CHECK1: omp_offload.failed: 971 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 972 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 973 // CHECK1: omp_offload.cont: 974 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 975 // CHECK1: omp_if.else: 976 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 977 // CHECK1-NEXT: br label [[OMP_IF_END]] 978 // CHECK1: omp_if.end: 979 // CHECK1-NEXT: [[TMP45:%.*]] = mul nsw i64 1, [[TMP2]] 980 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP45]] 981 // CHECK1-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 982 // CHECK1-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 983 // CHECK1-NEXT: [[CONV3:%.*]] = sext i16 [[TMP46]] to i32 984 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4 985 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP47]] 986 // CHECK1-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 987 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP48]]) 988 // CHECK1-NEXT: ret i32 [[ADD4]] 989 // 990 // 991 // CHECK1-LABEL: define {{[^@]+}}@_ZL7fstatici 992 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] { 993 // CHECK1-NEXT: entry: 994 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 995 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 996 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 997 // CHECK1-NEXT: [[AAA:%.*]] = alloca i8, align 1 998 // CHECK1-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 999 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1000 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 1001 // CHECK1-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 1002 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1003 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1004 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1005 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1006 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1007 // CHECK1-NEXT: store i16 0, i16* [[AA]], align 2 1008 // CHECK1-NEXT: store i8 0, i8* [[AAA]], align 1 1009 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 1010 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 1011 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 1012 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 1013 // CHECK1-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 1014 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 1015 // CHECK1-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 1016 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 1017 // CHECK1-NEXT: [[TMP4:%.*]] = load i8, i8* [[AAA]], align 1 1018 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 1019 // CHECK1-NEXT: store i8 [[TMP4]], i8* [[CONV2]], align 1 1020 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 1021 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 1022 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 50 1023 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1024 // CHECK1: omp_if.then: 1025 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1026 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1027 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 1028 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1029 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1030 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 1031 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1032 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 1033 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1034 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1035 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 1036 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1037 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1038 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 1039 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1040 // CHECK1-NEXT: store i8* null, i8** [[TMP16]], align 8 1041 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1042 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 1043 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP18]], align 8 1044 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1045 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 1046 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8 1047 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1048 // CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8 1049 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1050 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [10 x i32]** 1051 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP23]], align 8 1052 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1053 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [10 x i32]** 1054 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP25]], align 8 1055 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1056 // CHECK1-NEXT: store i8* null, i8** [[TMP26]], align 8 1057 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1058 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1059 // CHECK1-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 1060 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1061 // CHECK1-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1062 // CHECK1: omp_offload.failed: 1063 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 1064 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 1065 // CHECK1: omp_offload.cont: 1066 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1067 // CHECK1: omp_if.else: 1068 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 1069 // CHECK1-NEXT: br label [[OMP_IF_END]] 1070 // CHECK1: omp_if.end: 1071 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[A]], align 4 1072 // CHECK1-NEXT: ret i32 [[TMP31]] 1073 // 1074 // 1075 // CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 1076 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat { 1077 // CHECK1-NEXT: entry: 1078 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1079 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 1080 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 1081 // CHECK1-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 1082 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1083 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 1084 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 1085 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 1086 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 1087 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1088 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1089 // CHECK1-NEXT: store i16 0, i16* [[AA]], align 2 1090 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 1091 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 1092 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 1093 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 1094 // CHECK1-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 1095 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 1096 // CHECK1-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 1097 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 1098 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 1099 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 1100 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1101 // CHECK1: omp_if.then: 1102 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1103 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 1104 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 1105 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1106 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1107 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 1108 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1109 // CHECK1-NEXT: store i8* null, i8** [[TMP9]], align 8 1110 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1111 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 1112 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 1113 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1114 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1115 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 1116 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1117 // CHECK1-NEXT: store i8* null, i8** [[TMP14]], align 8 1118 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1119 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 1120 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8 1121 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1122 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 1123 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8 1124 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1125 // CHECK1-NEXT: store i8* null, i8** [[TMP19]], align 8 1126 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1127 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1128 // CHECK1-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.15, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 1129 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1130 // CHECK1-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1131 // CHECK1: omp_offload.failed: 1132 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 1133 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 1134 // CHECK1: omp_offload.cont: 1135 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1136 // CHECK1: omp_if.else: 1137 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 1138 // CHECK1-NEXT: br label [[OMP_IF_END]] 1139 // CHECK1: omp_if.end: 1140 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 1141 // CHECK1-NEXT: ret i32 [[TMP24]] 1142 // 1143 // 1144 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 1145 // CHECK1-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 1146 // CHECK1-NEXT: entry: 1147 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1148 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1149 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1150 // CHECK1-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1151 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 1152 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 1153 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1154 // CHECK1-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 1155 // CHECK1-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1156 // CHECK1-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1157 // CHECK1-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 1158 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1159 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 1160 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1161 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1162 // CHECK1-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 1163 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1164 // CHECK1-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 8 1165 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1166 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 1167 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 1168 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1169 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 1170 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1171 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 1172 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 1173 // CHECK1-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 8 1174 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 1175 // CHECK1-NEXT: ret void 1176 // 1177 // 1178 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 1179 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 1180 // CHECK1-NEXT: entry: 1181 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1182 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1183 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 1184 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 1185 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1186 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1187 // CHECK1-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 1188 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 1189 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 1190 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 8 1191 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 1192 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 1193 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 1194 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 1195 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 1196 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 3 1197 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8 1198 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 4 1199 // CHECK1-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 8 1200 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 1201 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 1202 // CHECK1-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 1203 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 1204 // CHECK1-NEXT: store double [[ADD]], double* [[A]], align 8 1205 // CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 1206 // CHECK1-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 8 1207 // CHECK1-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 1208 // CHECK1-NEXT: store double [[INC]], double* [[A1]], align 8 1209 // CHECK1-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 1210 // CHECK1-NEXT: [[TMP13:%.*]] = mul nsw i64 1, [[TMP8]] 1211 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i64 [[TMP13]] 1212 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 1213 // CHECK1-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 1214 // CHECK1-NEXT: ret void 1215 // 1216 // 1217 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 1218 // CHECK1-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 1219 // CHECK1-NEXT: entry: 1220 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1221 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 1222 // CHECK1-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 1223 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1224 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 8 1225 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1226 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 1227 // CHECK1-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 1228 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1229 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1230 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 1231 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 1232 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1233 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1234 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 1235 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 1236 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1237 // CHECK1-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 1238 // CHECK1-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 1239 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1240 // CHECK1-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV2]], align 8 1241 // CHECK1-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 1242 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1243 // CHECK1-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 8 1244 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.6*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]]) 1245 // CHECK1-NEXT: ret void 1246 // 1247 // 1248 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1249 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.6* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 1250 // CHECK1-NEXT: entry: 1251 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1252 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1253 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.6*, align 8 1254 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 1255 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 1256 // CHECK1-NEXT: [[AAA:%.*]] = alloca i8, align 1 1257 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1258 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1259 // CHECK1-NEXT: store %struct.anon.6* [[__CONTEXT]], %struct.anon.6** [[__CONTEXT_ADDR]], align 8 1260 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.6*, %struct.anon.6** [[__CONTEXT_ADDR]], align 8 1261 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6:%.*]], %struct.anon.6* [[TMP0]], i32 0, i32 0 1262 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 1263 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 1264 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 1 1265 // CHECK1-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 1266 // CHECK1-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 1267 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 2 1268 // CHECK1-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 1269 // CHECK1-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 1270 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 3 1271 // CHECK1-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 8 1272 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 1273 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 1274 // CHECK1-NEXT: store i32 [[ADD]], i32* [[A]], align 4 1275 // CHECK1-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 1276 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 1277 // CHECK1-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 1278 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 1279 // CHECK1-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 1280 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 1281 // CHECK1-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 1282 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 1283 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 1284 // CHECK1-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 1285 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i64 0, i64 2 1286 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1287 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 1288 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 1289 // CHECK1-NEXT: ret void 1290 // 1291 // 1292 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 1293 // CHECK1-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 1294 // CHECK1-NEXT: entry: 1295 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1296 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 1297 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1298 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 8 1299 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1300 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 1301 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1302 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1303 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 1304 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1305 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1306 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 1307 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 1308 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1309 // CHECK1-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 1310 // CHECK1-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 1311 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1312 // CHECK1-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 8 1313 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 1314 // CHECK1-NEXT: ret void 1315 // 1316 // 1317 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 1318 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 1319 // CHECK1-NEXT: entry: 1320 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1321 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1322 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 8 1323 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 1324 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 1325 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1326 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1327 // CHECK1-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 8 1328 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 8 1329 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 1330 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 1331 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 1332 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 1333 // CHECK1-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 1334 // CHECK1-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 1335 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 1336 // CHECK1-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 8 1337 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 1338 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 1339 // CHECK1-NEXT: store i32 [[ADD]], i32* [[A]], align 4 1340 // CHECK1-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 1341 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 1342 // CHECK1-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 1343 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 1344 // CHECK1-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 1345 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i64 0, i64 2 1346 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1347 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 1348 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 1349 // CHECK1-NEXT: ret void 1350 // 1351 // 1352 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1353 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] { 1354 // CHECK1-NEXT: entry: 1355 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1356 // CHECK1-NEXT: ret void 1357 // 1358 // 1359 // CHECK2-LABEL: define {{[^@]+}}@_Z3fooi 1360 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1361 // CHECK2-NEXT: entry: 1362 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1363 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 1364 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2 1365 // CHECK2-NEXT: [[B:%.*]] = alloca [10 x float], align 4 1366 // CHECK2-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1367 // CHECK2-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1368 // CHECK2-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 1369 // CHECK2-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 1370 // CHECK2-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8 1371 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 1372 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1373 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 1374 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1375 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1376 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1377 // CHECK2-NEXT: [[A_CASTED3:%.*]] = alloca i64, align 8 1378 // CHECK2-NEXT: [[AA_CASTED5:%.*]] = alloca i64, align 8 1379 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 1380 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 1381 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 1382 // CHECK2-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8 1383 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [9 x i8*], align 8 1384 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [9 x i8*], align 8 1385 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [9 x i8*], align 8 1386 // CHECK2-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [9 x i64], align 8 1387 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 1388 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1389 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 1390 // CHECK2-NEXT: store i16 0, i16* [[AA]], align 2 1391 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1392 // CHECK2-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 1393 // CHECK2-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 1394 // CHECK2-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 1395 // CHECK2-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4 1396 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 1397 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 1398 // CHECK2-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 1399 // CHECK2-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]] 1400 // CHECK2-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8 1401 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 1402 // CHECK2-NEXT: [[TMP7:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1, i64 40, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 1403 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.kmp_task_t_with_privates* 1404 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP8]], i32 0, i32 0 1405 // CHECK2-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* [[TMP7]]) 1406 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[A]], align 4 1407 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 1408 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[CONV]], align 4 1409 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, i64* [[A_CASTED]], align 8 1410 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104(i64 [[TMP12]]) #[[ATTR3:[0-9]+]] 1411 // CHECK2-NEXT: [[TMP13:%.*]] = load i16, i16* [[AA]], align 2 1412 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 1413 // CHECK2-NEXT: store i16 [[TMP13]], i16* [[CONV2]], align 2 1414 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, i64* [[AA_CASTED]], align 8 1415 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1416 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 1417 // CHECK2-NEXT: store i64 [[TMP14]], i64* [[TMP16]], align 8 1418 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1419 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 1420 // CHECK2-NEXT: store i64 [[TMP14]], i64* [[TMP18]], align 8 1421 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1422 // CHECK2-NEXT: store i8* null, i8** [[TMP19]], align 8 1423 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1424 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1425 // CHECK2-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110.region_id, i32 1, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 1426 // CHECK2-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1427 // CHECK2-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1428 // CHECK2: omp_offload.failed: 1429 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110(i64 [[TMP14]]) #[[ATTR3]] 1430 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1431 // CHECK2: omp_offload.cont: 1432 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 1433 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[A_CASTED3]] to i32* 1434 // CHECK2-NEXT: store i32 [[TMP24]], i32* [[CONV4]], align 4 1435 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[A_CASTED3]], align 8 1436 // CHECK2-NEXT: [[TMP26:%.*]] = load i16, i16* [[AA]], align 2 1437 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED5]] to i16* 1438 // CHECK2-NEXT: store i16 [[TMP26]], i16* [[CONV6]], align 2 1439 // CHECK2-NEXT: [[TMP27:%.*]] = load i64, i64* [[AA_CASTED5]], align 8 1440 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[N_ADDR]], align 4 1441 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP28]], 10 1442 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1443 // CHECK2: omp_if.then: 1444 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 1445 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1446 // CHECK2-NEXT: store i64 [[TMP25]], i64* [[TMP30]], align 8 1447 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 1448 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 1449 // CHECK2-NEXT: store i64 [[TMP25]], i64* [[TMP32]], align 8 1450 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 1451 // CHECK2-NEXT: store i8* null, i8** [[TMP33]], align 8 1452 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 1453 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i64* 1454 // CHECK2-NEXT: store i64 [[TMP27]], i64* [[TMP35]], align 8 1455 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 1456 // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 1457 // CHECK2-NEXT: store i64 [[TMP27]], i64* [[TMP37]], align 8 1458 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 1459 // CHECK2-NEXT: store i8* null, i8** [[TMP38]], align 8 1460 // CHECK2-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 1461 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 1462 // CHECK2-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119.region_id, i32 2, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 1463 // CHECK2-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 1464 // CHECK2-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED10:%.*]], label [[OMP_OFFLOAD_CONT11:%.*]] 1465 // CHECK2: omp_offload.failed10: 1466 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR3]] 1467 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT11]] 1468 // CHECK2: omp_offload.cont11: 1469 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 1470 // CHECK2: omp_if.else: 1471 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR3]] 1472 // CHECK2-NEXT: br label [[OMP_IF_END]] 1473 // CHECK2: omp_if.end: 1474 // CHECK2-NEXT: [[TMP43:%.*]] = load i32, i32* [[A]], align 4 1475 // CHECK2-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32* 1476 // CHECK2-NEXT: store i32 [[TMP43]], i32* [[CONV13]], align 4 1477 // CHECK2-NEXT: [[TMP44:%.*]] = load i64, i64* [[A_CASTED12]], align 8 1478 // CHECK2-NEXT: [[TMP45:%.*]] = load i32, i32* [[N_ADDR]], align 4 1479 // CHECK2-NEXT: [[CMP14:%.*]] = icmp sgt i32 [[TMP45]], 20 1480 // CHECK2-NEXT: br i1 [[CMP14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE21:%.*]] 1481 // CHECK2: omp_if.then15: 1482 // CHECK2-NEXT: [[TMP46:%.*]] = mul nuw i64 [[TMP2]], 4 1483 // CHECK2-NEXT: [[TMP47:%.*]] = mul nuw i64 5, [[TMP5]] 1484 // CHECK2-NEXT: [[TMP48:%.*]] = mul nuw i64 [[TMP47]], 8 1485 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 1486 // CHECK2-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i64* 1487 // CHECK2-NEXT: store i64 [[TMP44]], i64* [[TMP50]], align 8 1488 // CHECK2-NEXT: [[TMP51:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 1489 // CHECK2-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i64* 1490 // CHECK2-NEXT: store i64 [[TMP44]], i64* [[TMP52]], align 8 1491 // CHECK2-NEXT: [[TMP53:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1492 // CHECK2-NEXT: store i64 4, i64* [[TMP53]], align 8 1493 // CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0 1494 // CHECK2-NEXT: store i8* null, i8** [[TMP54]], align 8 1495 // CHECK2-NEXT: [[TMP55:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1 1496 // CHECK2-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to [10 x float]** 1497 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP56]], align 8 1498 // CHECK2-NEXT: [[TMP57:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1 1499 // CHECK2-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to [10 x float]** 1500 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP58]], align 8 1501 // CHECK2-NEXT: [[TMP59:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 1502 // CHECK2-NEXT: store i64 40, i64* [[TMP59]], align 8 1503 // CHECK2-NEXT: [[TMP60:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1 1504 // CHECK2-NEXT: store i8* null, i8** [[TMP60]], align 8 1505 // CHECK2-NEXT: [[TMP61:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 2 1506 // CHECK2-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64* 1507 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP62]], align 8 1508 // CHECK2-NEXT: [[TMP63:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 2 1509 // CHECK2-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64* 1510 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP64]], align 8 1511 // CHECK2-NEXT: [[TMP65:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1512 // CHECK2-NEXT: store i64 8, i64* [[TMP65]], align 8 1513 // CHECK2-NEXT: [[TMP66:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 2 1514 // CHECK2-NEXT: store i8* null, i8** [[TMP66]], align 8 1515 // CHECK2-NEXT: [[TMP67:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 3 1516 // CHECK2-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to float** 1517 // CHECK2-NEXT: store float* [[VLA]], float** [[TMP68]], align 8 1518 // CHECK2-NEXT: [[TMP69:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 3 1519 // CHECK2-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to float** 1520 // CHECK2-NEXT: store float* [[VLA]], float** [[TMP70]], align 8 1521 // CHECK2-NEXT: [[TMP71:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 1522 // CHECK2-NEXT: store i64 [[TMP46]], i64* [[TMP71]], align 8 1523 // CHECK2-NEXT: [[TMP72:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 3 1524 // CHECK2-NEXT: store i8* null, i8** [[TMP72]], align 8 1525 // CHECK2-NEXT: [[TMP73:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 4 1526 // CHECK2-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to [5 x [10 x double]]** 1527 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP74]], align 8 1528 // CHECK2-NEXT: [[TMP75:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 4 1529 // CHECK2-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to [5 x [10 x double]]** 1530 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP76]], align 8 1531 // CHECK2-NEXT: [[TMP77:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 1532 // CHECK2-NEXT: store i64 400, i64* [[TMP77]], align 8 1533 // CHECK2-NEXT: [[TMP78:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 4 1534 // CHECK2-NEXT: store i8* null, i8** [[TMP78]], align 8 1535 // CHECK2-NEXT: [[TMP79:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 5 1536 // CHECK2-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64* 1537 // CHECK2-NEXT: store i64 5, i64* [[TMP80]], align 8 1538 // CHECK2-NEXT: [[TMP81:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 5 1539 // CHECK2-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i64* 1540 // CHECK2-NEXT: store i64 5, i64* [[TMP82]], align 8 1541 // CHECK2-NEXT: [[TMP83:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5 1542 // CHECK2-NEXT: store i64 8, i64* [[TMP83]], align 8 1543 // CHECK2-NEXT: [[TMP84:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 5 1544 // CHECK2-NEXT: store i8* null, i8** [[TMP84]], align 8 1545 // CHECK2-NEXT: [[TMP85:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 6 1546 // CHECK2-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i64* 1547 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP86]], align 8 1548 // CHECK2-NEXT: [[TMP87:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 6 1549 // CHECK2-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64* 1550 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP88]], align 8 1551 // CHECK2-NEXT: [[TMP89:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 1552 // CHECK2-NEXT: store i64 8, i64* [[TMP89]], align 8 1553 // CHECK2-NEXT: [[TMP90:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 6 1554 // CHECK2-NEXT: store i8* null, i8** [[TMP90]], align 8 1555 // CHECK2-NEXT: [[TMP91:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 7 1556 // CHECK2-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to double** 1557 // CHECK2-NEXT: store double* [[VLA1]], double** [[TMP92]], align 8 1558 // CHECK2-NEXT: [[TMP93:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 7 1559 // CHECK2-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 1560 // CHECK2-NEXT: store double* [[VLA1]], double** [[TMP94]], align 8 1561 // CHECK2-NEXT: [[TMP95:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 1562 // CHECK2-NEXT: store i64 [[TMP48]], i64* [[TMP95]], align 8 1563 // CHECK2-NEXT: [[TMP96:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 7 1564 // CHECK2-NEXT: store i8* null, i8** [[TMP96]], align 8 1565 // CHECK2-NEXT: [[TMP97:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 8 1566 // CHECK2-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to %struct.TT** 1567 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP98]], align 8 1568 // CHECK2-NEXT: [[TMP99:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 8 1569 // CHECK2-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to %struct.TT** 1570 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP100]], align 8 1571 // CHECK2-NEXT: [[TMP101:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8 1572 // CHECK2-NEXT: store i64 16, i64* [[TMP101]], align 8 1573 // CHECK2-NEXT: [[TMP102:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 8 1574 // CHECK2-NEXT: store i8* null, i8** [[TMP102]], align 8 1575 // CHECK2-NEXT: [[TMP103:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 1576 // CHECK2-NEXT: [[TMP104:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 1577 // CHECK2-NEXT: [[TMP105:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1578 // CHECK2-NEXT: [[TMP106:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144.region_id, i32 9, i8** [[TMP103]], i8** [[TMP104]], i64* [[TMP105]], i64* getelementptr inbounds ([9 x i64], [9 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 1579 // CHECK2-NEXT: [[TMP107:%.*]] = icmp ne i32 [[TMP106]], 0 1580 // CHECK2-NEXT: br i1 [[TMP107]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]] 1581 // CHECK2: omp_offload.failed19: 1582 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i64 [[TMP44]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 1583 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT20]] 1584 // CHECK2: omp_offload.cont20: 1585 // CHECK2-NEXT: br label [[OMP_IF_END22:%.*]] 1586 // CHECK2: omp_if.else21: 1587 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i64 [[TMP44]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 1588 // CHECK2-NEXT: br label [[OMP_IF_END22]] 1589 // CHECK2: omp_if.end22: 1590 // CHECK2-NEXT: [[TMP108:%.*]] = load i32, i32* [[A]], align 4 1591 // CHECK2-NEXT: [[TMP109:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1592 // CHECK2-NEXT: call void @llvm.stackrestore(i8* [[TMP109]]) 1593 // CHECK2-NEXT: ret i32 [[TMP108]] 1594 // 1595 // 1596 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 1597 // CHECK2-SAME: () #[[ATTR2:[0-9]+]] { 1598 // CHECK2-NEXT: entry: 1599 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 1600 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 1601 // CHECK2-NEXT: ret void 1602 // 1603 // 1604 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 1605 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 1606 // CHECK2-NEXT: entry: 1607 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1608 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1609 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 1610 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1611 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1612 // CHECK2-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 1613 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 1614 // CHECK2-NEXT: ret void 1615 // 1616 // 1617 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry. 1618 // CHECK2-SAME: (i32 signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 1619 // CHECK2-NEXT: entry: 1620 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1621 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1622 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1623 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1624 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1625 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 1626 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1627 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 1628 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1629 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 1630 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1631 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 1632 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 1633 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1634 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1635 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1636 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 1637 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 1638 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 1639 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]]) 1640 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]]) 1641 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]]) 1642 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21 1643 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21 1644 // CHECK2-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 1645 // CHECK2-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 1646 // CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21 1647 // CHECK2-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 1648 // CHECK2-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 1649 // CHECK2-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0) #[[ATTR3]] 1650 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1651 // CHECK2-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 1652 // CHECK2: omp_offload.failed.i: 1653 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100() #[[ATTR3]] 1654 // CHECK2-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 1655 // CHECK2: .omp_outlined..1.exit: 1656 // CHECK2-NEXT: ret i32 0 1657 // 1658 // 1659 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104 1660 // CHECK2-SAME: (i64 [[A:%.*]]) #[[ATTR2]] { 1661 // CHECK2-NEXT: entry: 1662 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1663 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 1664 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1665 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1666 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1667 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 1668 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 1669 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 1670 // CHECK2-NEXT: ret void 1671 // 1672 // 1673 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1674 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 1675 // CHECK2-NEXT: entry: 1676 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1677 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1678 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 1679 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 1680 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1681 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1682 // CHECK2-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 1683 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 1684 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 1685 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1686 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 1687 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 1688 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1 1689 // CHECK2-NEXT: store i32 [[ADD]], i32* [[A]], align 4 1690 // CHECK2-NEXT: ret void 1691 // 1692 // 1693 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 1694 // CHECK2-SAME: (i64 [[AA:%.*]]) #[[ATTR2]] { 1695 // CHECK2-NEXT: entry: 1696 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 1697 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 2 1698 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 1699 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 1700 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1701 // CHECK2-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 8 1702 // CHECK2-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 1703 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 1704 // CHECK2-NEXT: ret void 1705 // 1706 // 1707 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1708 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 1709 // CHECK2-NEXT: entry: 1710 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1711 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1712 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 1713 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2 1714 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1715 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1716 // CHECK2-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 1717 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 1718 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 1719 // CHECK2-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 1720 // CHECK2-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 1721 // CHECK2-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 1722 // CHECK2-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 1723 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 1724 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 1725 // CHECK2-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 1726 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1727 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1728 // CHECK2-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 1729 // CHECK2-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 1730 // CHECK2-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 1731 // CHECK2: .cancel.exit: 1732 // CHECK2-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 1733 // CHECK2-NEXT: br label [[DOTCANCEL_CONTINUE]] 1734 // CHECK2: .cancel.continue: 1735 // CHECK2-NEXT: ret void 1736 // 1737 // 1738 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 1739 // CHECK2-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] { 1740 // CHECK2-NEXT: entry: 1741 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1742 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 1743 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 1744 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1745 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 1746 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1747 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 1748 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1749 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 1750 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 1751 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1752 // CHECK2-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8 1753 // CHECK2-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 1754 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 1755 // CHECK2-NEXT: ret void 1756 // 1757 // 1758 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 1759 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 1760 // CHECK2-NEXT: entry: 1761 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1762 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1763 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 1764 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 1765 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2 1766 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1767 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1768 // CHECK2-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 1769 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 1770 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 1771 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1772 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 1773 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 1774 // CHECK2-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 1775 // CHECK2-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 1776 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 1777 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 1778 // CHECK2-NEXT: store i32 [[ADD]], i32* [[A]], align 4 1779 // CHECK2-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 1780 // CHECK2-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 1781 // CHECK2-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 1782 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 1783 // CHECK2-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 1784 // CHECK2-NEXT: ret void 1785 // 1786 // 1787 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 1788 // CHECK2-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]]) #[[ATTR2]] { 1789 // CHECK2-NEXT: entry: 1790 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1791 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 1792 // CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1793 // CHECK2-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 1794 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 1795 // CHECK2-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 1796 // CHECK2-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 1797 // CHECK2-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 1798 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 1799 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 1800 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1801 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 1802 // CHECK2-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1803 // CHECK2-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 1804 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 1805 // CHECK2-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 1806 // CHECK2-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 1807 // CHECK2-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 1808 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 1809 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 1810 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 1811 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1812 // CHECK2-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 1813 // CHECK2-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 1814 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 1815 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 1816 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 1817 // CHECK2-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 1818 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1819 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 1820 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 8 1821 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1822 // CHECK2-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 8 1823 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1824 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8 1825 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1826 // CHECK2-NEXT: store float* [[TMP2]], float** [[TMP12]], align 8 1827 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 1828 // CHECK2-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 8 1829 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 1830 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8 1831 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 1832 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP15]], align 8 1833 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 1834 // CHECK2-NEXT: store double* [[TMP6]], double** [[TMP16]], align 8 1835 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 1836 // CHECK2-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 8 1837 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 1838 // CHECK2-NEXT: ret void 1839 // 1840 // 1841 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7 1842 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 1843 // CHECK2-NEXT: entry: 1844 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1845 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1846 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 1847 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 1848 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1849 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1850 // CHECK2-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 1851 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 1852 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 1853 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 1854 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 1855 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 1856 // CHECK2-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 8 1857 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 1858 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 1859 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 1860 // CHECK2-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 8 1861 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 1862 // CHECK2-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 8 1863 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 5 1864 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, i64* [[TMP11]], align 8 1865 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 6 1866 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP13]], align 8 1867 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 7 1868 // CHECK2-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 8 1869 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 8 1870 // CHECK2-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 8 1871 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 1872 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 1873 // CHECK2-NEXT: store i32 [[ADD]], i32* [[A]], align 4 1874 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i64 0, i64 2 1875 // CHECK2-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 1876 // CHECK2-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 1877 // CHECK2-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 1878 // CHECK2-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 1879 // CHECK2-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 1880 // CHECK2-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i64 3 1881 // CHECK2-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 1882 // CHECK2-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 1883 // CHECK2-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 1884 // CHECK2-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 1885 // CHECK2-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 1886 // CHECK2-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i64 0, i64 1 1887 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i64 0, i64 2 1888 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 1889 // CHECK2-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 1890 // CHECK2-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 1891 // CHECK2-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP14]] 1892 // CHECK2-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 [[TMP23]] 1893 // CHECK2-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i64 3 1894 // CHECK2-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 1895 // CHECK2-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 1896 // CHECK2-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 1897 // CHECK2-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 1898 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8 1899 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 1900 // CHECK2-NEXT: store i64 [[ADD13]], i64* [[X]], align 8 1901 // CHECK2-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 1902 // CHECK2-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8 1903 // CHECK2-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 1904 // CHECK2-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 1905 // CHECK2-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 1906 // CHECK2-NEXT: store i8 [[CONV16]], i8* [[Y]], align 8 1907 // CHECK2-NEXT: ret void 1908 // 1909 // 1910 // CHECK2-LABEL: define {{[^@]+}}@_Z3bari 1911 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] { 1912 // CHECK2-NEXT: entry: 1913 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1914 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 1915 // CHECK2-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 1916 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1917 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 1918 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1919 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_Z3fooi(i32 signext [[TMP0]]) 1920 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 1921 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 1922 // CHECK2-NEXT: store i32 [[ADD]], i32* [[A]], align 4 1923 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 1924 // CHECK2-NEXT: [[CALL1:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP2]]) 1925 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 1926 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 1927 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 1928 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 1929 // CHECK2-NEXT: [[CALL3:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP4]]) 1930 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 1931 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 1932 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 1933 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 1934 // CHECK2-NEXT: [[CALL5:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP6]]) 1935 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 1936 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 1937 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 1938 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 1939 // CHECK2-NEXT: ret i32 [[TMP8]] 1940 // 1941 // 1942 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 1943 // CHECK2-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 { 1944 // CHECK2-NEXT: entry: 1945 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 1946 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1947 // CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4 1948 // CHECK2-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1949 // CHECK2-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1950 // CHECK2-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 1951 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1952 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1953 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1954 // CHECK2-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 1955 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 1956 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1957 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 1958 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 1959 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 1960 // CHECK2-NEXT: store i32 [[ADD]], i32* [[B]], align 4 1961 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 1962 // CHECK2-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 1963 // CHECK2-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 1964 // CHECK2-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 1965 // CHECK2-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]] 1966 // CHECK2-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2 1967 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 1968 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 1969 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32* 1970 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4 1971 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8 1972 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4 1973 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60 1974 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1975 // CHECK2: omp_if.then: 1976 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 1977 // CHECK2-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]] 1978 // CHECK2-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2 1979 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1980 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1** 1981 // CHECK2-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 8 1982 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1983 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 1984 // CHECK2-NEXT: store double* [[A]], double** [[TMP13]], align 8 1985 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1986 // CHECK2-NEXT: store i64 8, i64* [[TMP14]], align 8 1987 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1988 // CHECK2-NEXT: store i8* null, i8** [[TMP15]], align 8 1989 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1990 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 1991 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8 1992 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1993 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 1994 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8 1995 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 1996 // CHECK2-NEXT: store i64 4, i64* [[TMP20]], align 8 1997 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1998 // CHECK2-NEXT: store i8* null, i8** [[TMP21]], align 8 1999 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2000 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 2001 // CHECK2-NEXT: store i64 2, i64* [[TMP23]], align 8 2002 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2003 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 2004 // CHECK2-NEXT: store i64 2, i64* [[TMP25]], align 8 2005 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2006 // CHECK2-NEXT: store i64 8, i64* [[TMP26]], align 8 2007 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2008 // CHECK2-NEXT: store i8* null, i8** [[TMP27]], align 8 2009 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2010 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 2011 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8 2012 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2013 // CHECK2-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 2014 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP31]], align 8 2015 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 2016 // CHECK2-NEXT: store i64 8, i64* [[TMP32]], align 8 2017 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 2018 // CHECK2-NEXT: store i8* null, i8** [[TMP33]], align 8 2019 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2020 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16** 2021 // CHECK2-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 8 2022 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2023 // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16** 2024 // CHECK2-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 8 2025 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 2026 // CHECK2-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 8 2027 // CHECK2-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 2028 // CHECK2-NEXT: store i8* null, i8** [[TMP39]], align 8 2029 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2030 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2031 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2032 // CHECK2-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 2033 // CHECK2-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 2034 // CHECK2-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2035 // CHECK2: omp_offload.failed: 2036 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 2037 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 2038 // CHECK2: omp_offload.cont: 2039 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 2040 // CHECK2: omp_if.else: 2041 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 2042 // CHECK2-NEXT: br label [[OMP_IF_END]] 2043 // CHECK2: omp_if.end: 2044 // CHECK2-NEXT: [[TMP45:%.*]] = mul nsw i64 1, [[TMP2]] 2045 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP45]] 2046 // CHECK2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 2047 // CHECK2-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 2048 // CHECK2-NEXT: [[CONV3:%.*]] = sext i16 [[TMP46]] to i32 2049 // CHECK2-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4 2050 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP47]] 2051 // CHECK2-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2052 // CHECK2-NEXT: call void @llvm.stackrestore(i8* [[TMP48]]) 2053 // CHECK2-NEXT: ret i32 [[ADD4]] 2054 // 2055 // 2056 // CHECK2-LABEL: define {{[^@]+}}@_ZL7fstatici 2057 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] { 2058 // CHECK2-NEXT: entry: 2059 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2060 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 2061 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2 2062 // CHECK2-NEXT: [[AAA:%.*]] = alloca i8, align 1 2063 // CHECK2-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 2064 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 2065 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 2066 // CHECK2-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 2067 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 2068 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 2069 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 2070 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2071 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 2072 // CHECK2-NEXT: store i16 0, i16* [[AA]], align 2 2073 // CHECK2-NEXT: store i8 0, i8* [[AAA]], align 1 2074 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 2075 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 2076 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 2077 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 2078 // CHECK2-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 2079 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 2080 // CHECK2-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 2081 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 2082 // CHECK2-NEXT: [[TMP4:%.*]] = load i8, i8* [[AAA]], align 1 2083 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 2084 // CHECK2-NEXT: store i8 [[TMP4]], i8* [[CONV2]], align 1 2085 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 2086 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 2087 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 50 2088 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 2089 // CHECK2: omp_if.then: 2090 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2091 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2092 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 2093 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2094 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2095 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 2096 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2097 // CHECK2-NEXT: store i8* null, i8** [[TMP11]], align 8 2098 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2099 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 2100 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 2101 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2102 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 2103 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 2104 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2105 // CHECK2-NEXT: store i8* null, i8** [[TMP16]], align 8 2106 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2107 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 2108 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP18]], align 8 2109 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2110 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 2111 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8 2112 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2113 // CHECK2-NEXT: store i8* null, i8** [[TMP21]], align 8 2114 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2115 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [10 x i32]** 2116 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP23]], align 8 2117 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2118 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [10 x i32]** 2119 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP25]], align 8 2120 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 2121 // CHECK2-NEXT: store i8* null, i8** [[TMP26]], align 8 2122 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2123 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2124 // CHECK2-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 2125 // CHECK2-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 2126 // CHECK2-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2127 // CHECK2: omp_offload.failed: 2128 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 2129 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 2130 // CHECK2: omp_offload.cont: 2131 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 2132 // CHECK2: omp_if.else: 2133 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 2134 // CHECK2-NEXT: br label [[OMP_IF_END]] 2135 // CHECK2: omp_if.end: 2136 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[A]], align 4 2137 // CHECK2-NEXT: ret i32 [[TMP31]] 2138 // 2139 // 2140 // CHECK2-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 2141 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat { 2142 // CHECK2-NEXT: entry: 2143 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2144 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 2145 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2 2146 // CHECK2-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 2147 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 2148 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 2149 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 2150 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 2151 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 2152 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2153 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 2154 // CHECK2-NEXT: store i16 0, i16* [[AA]], align 2 2155 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 2156 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 2157 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 2158 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 2159 // CHECK2-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 2160 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 2161 // CHECK2-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 2162 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 2163 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 2164 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 2165 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 2166 // CHECK2: omp_if.then: 2167 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2168 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 2169 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 2170 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2171 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2172 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 2173 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2174 // CHECK2-NEXT: store i8* null, i8** [[TMP9]], align 8 2175 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2176 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 2177 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 2178 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2179 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 2180 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 2181 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2182 // CHECK2-NEXT: store i8* null, i8** [[TMP14]], align 8 2183 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2184 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 2185 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8 2186 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2187 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 2188 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8 2189 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2190 // CHECK2-NEXT: store i8* null, i8** [[TMP19]], align 8 2191 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2192 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2193 // CHECK2-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.15, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 2194 // CHECK2-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 2195 // CHECK2-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2196 // CHECK2: omp_offload.failed: 2197 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 2198 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 2199 // CHECK2: omp_offload.cont: 2200 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 2201 // CHECK2: omp_if.else: 2202 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 2203 // CHECK2-NEXT: br label [[OMP_IF_END]] 2204 // CHECK2: omp_if.end: 2205 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 2206 // CHECK2-NEXT: ret i32 [[TMP24]] 2207 // 2208 // 2209 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 2210 // CHECK2-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 2211 // CHECK2-NEXT: entry: 2212 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 2213 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 2214 // CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2215 // CHECK2-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 2216 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 2217 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 2218 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 2219 // CHECK2-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 2220 // CHECK2-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2221 // CHECK2-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 2222 // CHECK2-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 2223 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 2224 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 2225 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2226 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 2227 // CHECK2-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 2228 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2229 // CHECK2-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 8 2230 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2231 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 2232 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 2233 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2234 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 2235 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 2236 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 2237 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 2238 // CHECK2-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 8 2239 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 2240 // CHECK2-NEXT: ret void 2241 // 2242 // 2243 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9 2244 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 2245 // CHECK2-NEXT: entry: 2246 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2247 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2248 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 2249 // CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4 2250 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2251 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2252 // CHECK2-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 2253 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 2254 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 2255 // CHECK2-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 8 2256 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 2257 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 2258 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 2259 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 2260 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 2261 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 3 2262 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8 2263 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 4 2264 // CHECK2-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 8 2265 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 2266 // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 2267 // CHECK2-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 2268 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 2269 // CHECK2-NEXT: store double [[ADD]], double* [[A]], align 8 2270 // CHECK2-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 2271 // CHECK2-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 8 2272 // CHECK2-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 2273 // CHECK2-NEXT: store double [[INC]], double* [[A1]], align 8 2274 // CHECK2-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 2275 // CHECK2-NEXT: [[TMP13:%.*]] = mul nsw i64 1, [[TMP8]] 2276 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i64 [[TMP13]] 2277 // CHECK2-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 2278 // CHECK2-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 2279 // CHECK2-NEXT: ret void 2280 // 2281 // 2282 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 2283 // CHECK2-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 2284 // CHECK2-NEXT: entry: 2285 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2286 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 2287 // CHECK2-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 2288 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 2289 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 8 2290 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2291 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 2292 // CHECK2-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 2293 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 2294 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 2295 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 2296 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 2297 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 2298 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2299 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 2300 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 2301 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2302 // CHECK2-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 2303 // CHECK2-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 2304 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2305 // CHECK2-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV2]], align 8 2306 // CHECK2-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 2307 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 2308 // CHECK2-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 8 2309 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.6*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]]) 2310 // CHECK2-NEXT: ret void 2311 // 2312 // 2313 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11 2314 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.6* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 2315 // CHECK2-NEXT: entry: 2316 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2317 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2318 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.6*, align 8 2319 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 2320 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2 2321 // CHECK2-NEXT: [[AAA:%.*]] = alloca i8, align 1 2322 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2323 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2324 // CHECK2-NEXT: store %struct.anon.6* [[__CONTEXT]], %struct.anon.6** [[__CONTEXT_ADDR]], align 8 2325 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.6*, %struct.anon.6** [[__CONTEXT_ADDR]], align 8 2326 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6:%.*]], %struct.anon.6* [[TMP0]], i32 0, i32 0 2327 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 2328 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 2329 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 1 2330 // CHECK2-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 2331 // CHECK2-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 2332 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 2 2333 // CHECK2-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 2334 // CHECK2-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 2335 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 3 2336 // CHECK2-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 8 2337 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 2338 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 2339 // CHECK2-NEXT: store i32 [[ADD]], i32* [[A]], align 4 2340 // CHECK2-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 2341 // CHECK2-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 2342 // CHECK2-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 2343 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 2344 // CHECK2-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 2345 // CHECK2-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 2346 // CHECK2-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 2347 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 2348 // CHECK2-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 2349 // CHECK2-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 2350 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i64 0, i64 2 2351 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2352 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 2353 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 2354 // CHECK2-NEXT: ret void 2355 // 2356 // 2357 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 2358 // CHECK2-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 2359 // CHECK2-NEXT: entry: 2360 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2361 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 2362 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 2363 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 8 2364 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2365 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 2366 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 2367 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 2368 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 2369 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 2370 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2371 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 2372 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 2373 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2374 // CHECK2-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 2375 // CHECK2-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 2376 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2377 // CHECK2-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 8 2378 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 2379 // CHECK2-NEXT: ret void 2380 // 2381 // 2382 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14 2383 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 2384 // CHECK2-NEXT: entry: 2385 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2386 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2387 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 8 2388 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 2389 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2 2390 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2391 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2392 // CHECK2-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 8 2393 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 8 2394 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 2395 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 2396 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 2397 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 2398 // CHECK2-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 2399 // CHECK2-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 2400 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 2401 // CHECK2-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 8 2402 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 2403 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 2404 // CHECK2-NEXT: store i32 [[ADD]], i32* [[A]], align 4 2405 // CHECK2-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 2406 // CHECK2-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 2407 // CHECK2-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 2408 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 2409 // CHECK2-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 2410 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i64 0, i64 2 2411 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2412 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 2413 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 2414 // CHECK2-NEXT: ret void 2415 // 2416 // 2417 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2418 // CHECK2-SAME: () #[[ATTR6:[0-9]+]] { 2419 // CHECK2-NEXT: entry: 2420 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 2421 // CHECK2-NEXT: ret void 2422 // 2423 // 2424 // CHECK3-LABEL: define {{[^@]+}}@_Z3fooi 2425 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 2426 // CHECK3-NEXT: entry: 2427 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2428 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 2429 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 2430 // CHECK3-NEXT: [[B:%.*]] = alloca [10 x float], align 4 2431 // CHECK3-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2432 // CHECK3-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2433 // CHECK3-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 2434 // CHECK3-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 2435 // CHECK3-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4 2436 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 2437 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 2438 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 2439 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2440 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2441 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2442 // CHECK3-NEXT: [[A_CASTED2:%.*]] = alloca i32, align 4 2443 // CHECK3-NEXT: [[AA_CASTED3:%.*]] = alloca i32, align 4 2444 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4 2445 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4 2446 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4 2447 // CHECK3-NEXT: [[A_CASTED10:%.*]] = alloca i32, align 4 2448 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [9 x i8*], align 4 2449 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [9 x i8*], align 4 2450 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [9 x i8*], align 4 2451 // CHECK3-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [9 x i64], align 4 2452 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 2453 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2454 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 2455 // CHECK3-NEXT: store i16 0, i16* [[AA]], align 2 2456 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 2457 // CHECK3-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2458 // CHECK3-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 2459 // CHECK3-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4 2460 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 2461 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4 2462 // CHECK3-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]] 2463 // CHECK3-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8 2464 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4 2465 // CHECK3-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1, i32 20, i32 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 2466 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates* 2467 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0 2468 // CHECK3-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* [[TMP5]]) 2469 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 2470 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[A_CASTED]], align 4 2471 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[A_CASTED]], align 4 2472 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104(i32 [[TMP10]]) #[[ATTR3:[0-9]+]] 2473 // CHECK3-NEXT: [[TMP11:%.*]] = load i16, i16* [[AA]], align 2 2474 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 2475 // CHECK3-NEXT: store i16 [[TMP11]], i16* [[CONV]], align 2 2476 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[AA_CASTED]], align 4 2477 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2478 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 2479 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[TMP14]], align 4 2480 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2481 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32* 2482 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[TMP16]], align 4 2483 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2484 // CHECK3-NEXT: store i8* null, i8** [[TMP17]], align 4 2485 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2486 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2487 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110.region_id, i32 1, i8** [[TMP18]], i8** [[TMP19]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 2488 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2489 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2490 // CHECK3: omp_offload.failed: 2491 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110(i32 [[TMP12]]) #[[ATTR3]] 2492 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 2493 // CHECK3: omp_offload.cont: 2494 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[A]], align 4 2495 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[A_CASTED2]], align 4 2496 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[A_CASTED2]], align 4 2497 // CHECK3-NEXT: [[TMP24:%.*]] = load i16, i16* [[AA]], align 2 2498 // CHECK3-NEXT: [[CONV4:%.*]] = bitcast i32* [[AA_CASTED3]] to i16* 2499 // CHECK3-NEXT: store i16 [[TMP24]], i16* [[CONV4]], align 2 2500 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[AA_CASTED3]], align 4 2501 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4 2502 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP26]], 10 2503 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 2504 // CHECK3: omp_if.then: 2505 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 2506 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 2507 // CHECK3-NEXT: store i32 [[TMP23]], i32* [[TMP28]], align 4 2508 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 2509 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2510 // CHECK3-NEXT: store i32 [[TMP23]], i32* [[TMP30]], align 4 2511 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 2512 // CHECK3-NEXT: store i8* null, i8** [[TMP31]], align 4 2513 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 2514 // CHECK3-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32* 2515 // CHECK3-NEXT: store i32 [[TMP25]], i32* [[TMP33]], align 4 2516 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 2517 // CHECK3-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32* 2518 // CHECK3-NEXT: store i32 [[TMP25]], i32* [[TMP35]], align 4 2519 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 2520 // CHECK3-NEXT: store i8* null, i8** [[TMP36]], align 4 2521 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 2522 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 2523 // CHECK3-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119.region_id, i32 2, i8** [[TMP37]], i8** [[TMP38]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 2524 // CHECK3-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 2525 // CHECK3-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 2526 // CHECK3: omp_offload.failed8: 2527 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i32 [[TMP23]], i32 [[TMP25]]) #[[ATTR3]] 2528 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]] 2529 // CHECK3: omp_offload.cont9: 2530 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 2531 // CHECK3: omp_if.else: 2532 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i32 [[TMP23]], i32 [[TMP25]]) #[[ATTR3]] 2533 // CHECK3-NEXT: br label [[OMP_IF_END]] 2534 // CHECK3: omp_if.end: 2535 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[A]], align 4 2536 // CHECK3-NEXT: store i32 [[TMP41]], i32* [[A_CASTED10]], align 4 2537 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[A_CASTED10]], align 4 2538 // CHECK3-NEXT: [[TMP43:%.*]] = load i32, i32* [[N_ADDR]], align 4 2539 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP43]], 20 2540 // CHECK3-NEXT: br i1 [[CMP11]], label [[OMP_IF_THEN12:%.*]], label [[OMP_IF_ELSE18:%.*]] 2541 // CHECK3: omp_if.then12: 2542 // CHECK3-NEXT: [[TMP44:%.*]] = mul nuw i32 [[TMP1]], 4 2543 // CHECK3-NEXT: [[TMP45:%.*]] = sext i32 [[TMP44]] to i64 2544 // CHECK3-NEXT: [[TMP46:%.*]] = mul nuw i32 5, [[TMP3]] 2545 // CHECK3-NEXT: [[TMP47:%.*]] = mul nuw i32 [[TMP46]], 8 2546 // CHECK3-NEXT: [[TMP48:%.*]] = sext i32 [[TMP47]] to i64 2547 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 2548 // CHECK3-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32* 2549 // CHECK3-NEXT: store i32 [[TMP42]], i32* [[TMP50]], align 4 2550 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 2551 // CHECK3-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32* 2552 // CHECK3-NEXT: store i32 [[TMP42]], i32* [[TMP52]], align 4 2553 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2554 // CHECK3-NEXT: store i64 4, i64* [[TMP53]], align 4 2555 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 2556 // CHECK3-NEXT: store i8* null, i8** [[TMP54]], align 4 2557 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 1 2558 // CHECK3-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to [10 x float]** 2559 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP56]], align 4 2560 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 1 2561 // CHECK3-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to [10 x float]** 2562 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP58]], align 4 2563 // CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 2564 // CHECK3-NEXT: store i64 40, i64* [[TMP59]], align 4 2565 // CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 1 2566 // CHECK3-NEXT: store i8* null, i8** [[TMP60]], align 4 2567 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 2 2568 // CHECK3-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32* 2569 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP62]], align 4 2570 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 2 2571 // CHECK3-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i32* 2572 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP64]], align 4 2573 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2574 // CHECK3-NEXT: store i64 4, i64* [[TMP65]], align 4 2575 // CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 2 2576 // CHECK3-NEXT: store i8* null, i8** [[TMP66]], align 4 2577 // CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 3 2578 // CHECK3-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to float** 2579 // CHECK3-NEXT: store float* [[VLA]], float** [[TMP68]], align 4 2580 // CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 3 2581 // CHECK3-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to float** 2582 // CHECK3-NEXT: store float* [[VLA]], float** [[TMP70]], align 4 2583 // CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 2584 // CHECK3-NEXT: store i64 [[TMP45]], i64* [[TMP71]], align 4 2585 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 3 2586 // CHECK3-NEXT: store i8* null, i8** [[TMP72]], align 4 2587 // CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 4 2588 // CHECK3-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to [5 x [10 x double]]** 2589 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP74]], align 4 2590 // CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 4 2591 // CHECK3-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to [5 x [10 x double]]** 2592 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP76]], align 4 2593 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 2594 // CHECK3-NEXT: store i64 400, i64* [[TMP77]], align 4 2595 // CHECK3-NEXT: [[TMP78:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 4 2596 // CHECK3-NEXT: store i8* null, i8** [[TMP78]], align 4 2597 // CHECK3-NEXT: [[TMP79:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 5 2598 // CHECK3-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32* 2599 // CHECK3-NEXT: store i32 5, i32* [[TMP80]], align 4 2600 // CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 5 2601 // CHECK3-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32* 2602 // CHECK3-NEXT: store i32 5, i32* [[TMP82]], align 4 2603 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5 2604 // CHECK3-NEXT: store i64 4, i64* [[TMP83]], align 4 2605 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 5 2606 // CHECK3-NEXT: store i8* null, i8** [[TMP84]], align 4 2607 // CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 6 2608 // CHECK3-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32* 2609 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP86]], align 4 2610 // CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 6 2611 // CHECK3-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i32* 2612 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP88]], align 4 2613 // CHECK3-NEXT: [[TMP89:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 2614 // CHECK3-NEXT: store i64 4, i64* [[TMP89]], align 4 2615 // CHECK3-NEXT: [[TMP90:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 6 2616 // CHECK3-NEXT: store i8* null, i8** [[TMP90]], align 4 2617 // CHECK3-NEXT: [[TMP91:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 7 2618 // CHECK3-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to double** 2619 // CHECK3-NEXT: store double* [[VLA1]], double** [[TMP92]], align 4 2620 // CHECK3-NEXT: [[TMP93:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 7 2621 // CHECK3-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 2622 // CHECK3-NEXT: store double* [[VLA1]], double** [[TMP94]], align 4 2623 // CHECK3-NEXT: [[TMP95:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 2624 // CHECK3-NEXT: store i64 [[TMP48]], i64* [[TMP95]], align 4 2625 // CHECK3-NEXT: [[TMP96:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 7 2626 // CHECK3-NEXT: store i8* null, i8** [[TMP96]], align 4 2627 // CHECK3-NEXT: [[TMP97:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 8 2628 // CHECK3-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to %struct.TT** 2629 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP98]], align 4 2630 // CHECK3-NEXT: [[TMP99:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 8 2631 // CHECK3-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to %struct.TT** 2632 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP100]], align 4 2633 // CHECK3-NEXT: [[TMP101:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8 2634 // CHECK3-NEXT: store i64 12, i64* [[TMP101]], align 4 2635 // CHECK3-NEXT: [[TMP102:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 8 2636 // CHECK3-NEXT: store i8* null, i8** [[TMP102]], align 4 2637 // CHECK3-NEXT: [[TMP103:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 2638 // CHECK3-NEXT: [[TMP104:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 2639 // CHECK3-NEXT: [[TMP105:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2640 // CHECK3-NEXT: [[TMP106:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144.region_id, i32 9, i8** [[TMP103]], i8** [[TMP104]], i64* [[TMP105]], i64* getelementptr inbounds ([9 x i64], [9 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 2641 // CHECK3-NEXT: [[TMP107:%.*]] = icmp ne i32 [[TMP106]], 0 2642 // CHECK3-NEXT: br i1 [[TMP107]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 2643 // CHECK3: omp_offload.failed16: 2644 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i32 [[TMP42]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 2645 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]] 2646 // CHECK3: omp_offload.cont17: 2647 // CHECK3-NEXT: br label [[OMP_IF_END19:%.*]] 2648 // CHECK3: omp_if.else18: 2649 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i32 [[TMP42]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 2650 // CHECK3-NEXT: br label [[OMP_IF_END19]] 2651 // CHECK3: omp_if.end19: 2652 // CHECK3-NEXT: [[TMP108:%.*]] = load i32, i32* [[A]], align 4 2653 // CHECK3-NEXT: [[TMP109:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2654 // CHECK3-NEXT: call void @llvm.stackrestore(i8* [[TMP109]]) 2655 // CHECK3-NEXT: ret i32 [[TMP108]] 2656 // 2657 // 2658 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 2659 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { 2660 // CHECK3-NEXT: entry: 2661 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 2662 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 2663 // CHECK3-NEXT: ret void 2664 // 2665 // 2666 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 2667 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 2668 // CHECK3-NEXT: entry: 2669 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2670 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2671 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 2672 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2673 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2674 // CHECK3-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 2675 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 2676 // CHECK3-NEXT: ret void 2677 // 2678 // 2679 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry. 2680 // CHECK3-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 2681 // CHECK3-NEXT: entry: 2682 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 2683 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4 2684 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4 2685 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4 2686 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4 2687 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 4 2688 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 2689 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4 2690 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 2691 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 2692 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 2693 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 2694 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 2695 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 2696 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 2697 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 2698 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 2699 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 2700 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]]) 2701 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]]) 2702 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]]) 2703 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 2704 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22 2705 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22 2706 // CHECK3-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 2707 // CHECK3-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 2708 // CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22 2709 // CHECK3-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 2710 // CHECK3-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 2711 // CHECK3-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0) #[[ATTR3]] 2712 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2713 // CHECK3-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 2714 // CHECK3: omp_offload.failed.i: 2715 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100() #[[ATTR3]] 2716 // CHECK3-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 2717 // CHECK3: .omp_outlined..1.exit: 2718 // CHECK3-NEXT: ret i32 0 2719 // 2720 // 2721 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104 2722 // CHECK3-SAME: (i32 [[A:%.*]]) #[[ATTR2]] { 2723 // CHECK3-NEXT: entry: 2724 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2725 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 2726 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2727 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2728 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 2729 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 2730 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 2731 // CHECK3-NEXT: ret void 2732 // 2733 // 2734 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 2735 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 2736 // CHECK3-NEXT: entry: 2737 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2738 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2739 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 2740 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 2741 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2742 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2743 // CHECK3-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 2744 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 2745 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 2746 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2747 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 2748 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 2749 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1 2750 // CHECK3-NEXT: store i32 [[ADD]], i32* [[A]], align 4 2751 // CHECK3-NEXT: ret void 2752 // 2753 // 2754 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 2755 // CHECK3-SAME: (i32 [[AA:%.*]]) #[[ATTR2]] { 2756 // CHECK3-NEXT: entry: 2757 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 2758 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 2 2759 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 2760 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 2761 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2762 // CHECK3-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 4 2763 // CHECK3-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 2764 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 2765 // CHECK3-NEXT: ret void 2766 // 2767 // 2768 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 2769 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 2770 // CHECK3-NEXT: entry: 2771 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2772 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2773 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 4 2774 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 2775 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2776 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2777 // CHECK3-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 4 2778 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 4 2779 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 2780 // CHECK3-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 2781 // CHECK3-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 2782 // CHECK3-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 2783 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 2784 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 2785 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 2786 // CHECK3-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 2787 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2788 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2789 // CHECK3-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 2790 // CHECK3-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 2791 // CHECK3-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 2792 // CHECK3: .cancel.exit: 2793 // CHECK3-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 2794 // CHECK3-NEXT: br label [[DOTCANCEL_CONTINUE]] 2795 // CHECK3: .cancel.continue: 2796 // CHECK3-NEXT: ret void 2797 // 2798 // 2799 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 2800 // CHECK3-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] { 2801 // CHECK3-NEXT: entry: 2802 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2803 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 2804 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 2805 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2806 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 2807 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 2808 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2809 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 2810 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 2811 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2812 // CHECK3-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4 2813 // CHECK3-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 2814 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 2815 // CHECK3-NEXT: ret void 2816 // 2817 // 2818 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 2819 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 2820 // CHECK3-NEXT: entry: 2821 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2822 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2823 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 4 2824 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 2825 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 2826 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2827 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2828 // CHECK3-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 4 2829 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 4 2830 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 2831 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2832 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 2833 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 2834 // CHECK3-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 2835 // CHECK3-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 2836 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 2837 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 2838 // CHECK3-NEXT: store i32 [[ADD]], i32* [[A]], align 4 2839 // CHECK3-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 2840 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 2841 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 2842 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 2843 // CHECK3-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 2844 // CHECK3-NEXT: ret void 2845 // 2846 // 2847 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 2848 // CHECK3-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]]) #[[ATTR2]] { 2849 // CHECK3-NEXT: entry: 2850 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2851 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 2852 // CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2853 // CHECK3-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 2854 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 2855 // CHECK3-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 2856 // CHECK3-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 2857 // CHECK3-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 2858 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 2859 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 4 2860 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2861 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 2862 // CHECK3-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2863 // CHECK3-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 2864 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 2865 // CHECK3-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 2866 // CHECK3-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 2867 // CHECK3-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 2868 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 2869 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 2870 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2871 // CHECK3-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 2872 // CHECK3-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 2873 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 2874 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 2875 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 2876 // CHECK3-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 2877 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2878 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 2879 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 2880 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2881 // CHECK3-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 4 2882 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2883 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP11]], align 4 2884 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 2885 // CHECK3-NEXT: store float* [[TMP2]], float** [[TMP12]], align 4 2886 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 2887 // CHECK3-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 4 2888 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 2889 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4 2890 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 2891 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 2892 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 2893 // CHECK3-NEXT: store double* [[TMP6]], double** [[TMP16]], align 4 2894 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 2895 // CHECK3-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 4 2896 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 2897 // CHECK3-NEXT: ret void 2898 // 2899 // 2900 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 2901 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 2902 // CHECK3-NEXT: entry: 2903 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2904 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2905 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 4 2906 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 2907 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2908 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2909 // CHECK3-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 4 2910 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 4 2911 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 2912 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2913 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 2914 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 2915 // CHECK3-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 4 2916 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 2917 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2918 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 2919 // CHECK3-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 4 2920 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 2921 // CHECK3-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 4 2922 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 5 2923 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2924 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 6 2925 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2926 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 7 2927 // CHECK3-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 4 2928 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 8 2929 // CHECK3-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 4 2930 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 2931 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 2932 // CHECK3-NEXT: store i32 [[ADD]], i32* [[A]], align 4 2933 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i32 0, i32 2 2934 // CHECK3-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 2935 // CHECK3-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 2936 // CHECK3-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 2937 // CHECK3-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 2938 // CHECK3-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 2939 // CHECK3-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i32 3 2940 // CHECK3-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 2941 // CHECK3-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 2942 // CHECK3-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 2943 // CHECK3-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 2944 // CHECK3-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 2945 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i32 0, i32 1 2946 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i32 0, i32 2 2947 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 2948 // CHECK3-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 2949 // CHECK3-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 2950 // CHECK3-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP14]] 2951 // CHECK3-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i32 [[TMP23]] 2952 // CHECK3-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i32 3 2953 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 2954 // CHECK3-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 2955 // CHECK3-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 2956 // CHECK3-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 2957 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4 2958 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 2959 // CHECK3-NEXT: store i64 [[ADD13]], i64* [[X]], align 4 2960 // CHECK3-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 2961 // CHECK3-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4 2962 // CHECK3-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 2963 // CHECK3-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 2964 // CHECK3-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 2965 // CHECK3-NEXT: store i8 [[CONV16]], i8* [[Y]], align 4 2966 // CHECK3-NEXT: ret void 2967 // 2968 // 2969 // CHECK3-LABEL: define {{[^@]+}}@_Z3bari 2970 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0]] { 2971 // CHECK3-NEXT: entry: 2972 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2973 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 2974 // CHECK3-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 2975 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2976 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 2977 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 2978 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_Z3fooi(i32 [[TMP0]]) 2979 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 2980 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 2981 // CHECK3-NEXT: store i32 [[ADD]], i32* [[A]], align 4 2982 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2983 // CHECK3-NEXT: [[CALL1:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP2]]) 2984 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 2985 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 2986 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 2987 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 2988 // CHECK3-NEXT: [[CALL3:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP4]]) 2989 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 2990 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 2991 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 2992 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 2993 // CHECK3-NEXT: [[CALL5:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP6]]) 2994 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 2995 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 2996 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 2997 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 2998 // CHECK3-NEXT: ret i32 [[TMP8]] 2999 // 3000 // 3001 // CHECK3-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 3002 // CHECK3-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 { 3003 // CHECK3-NEXT: entry: 3004 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 3005 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3006 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 3007 // CHECK3-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3008 // CHECK3-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3009 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 3010 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 3011 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 3012 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 3013 // CHECK3-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 3014 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 3015 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3016 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 3017 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 3018 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 3019 // CHECK3-NEXT: store i32 [[ADD]], i32* [[B]], align 4 3020 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 3021 // CHECK3-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3022 // CHECK3-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 3023 // CHECK3-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]] 3024 // CHECK3-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2 3025 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 3026 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4 3027 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 3028 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 3029 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 3030 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60 3031 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3032 // CHECK3: omp_if.then: 3033 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 3034 // CHECK3-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]] 3035 // CHECK3-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2 3036 // CHECK3-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 3037 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3038 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1** 3039 // CHECK3-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 4 3040 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3041 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 3042 // CHECK3-NEXT: store double* [[A]], double** [[TMP13]], align 4 3043 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3044 // CHECK3-NEXT: store i64 8, i64* [[TMP14]], align 4 3045 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3046 // CHECK3-NEXT: store i8* null, i8** [[TMP15]], align 4 3047 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3048 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 3049 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4 3050 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3051 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 3052 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4 3053 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3054 // CHECK3-NEXT: store i64 4, i64* [[TMP20]], align 4 3055 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3056 // CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4 3057 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3058 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 3059 // CHECK3-NEXT: store i32 2, i32* [[TMP23]], align 4 3060 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3061 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 3062 // CHECK3-NEXT: store i32 2, i32* [[TMP25]], align 4 3063 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3064 // CHECK3-NEXT: store i64 4, i64* [[TMP26]], align 4 3065 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3066 // CHECK3-NEXT: store i8* null, i8** [[TMP27]], align 4 3067 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3068 // CHECK3-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32* 3069 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4 3070 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3071 // CHECK3-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i32* 3072 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP31]], align 4 3073 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 3074 // CHECK3-NEXT: store i64 4, i64* [[TMP32]], align 4 3075 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3076 // CHECK3-NEXT: store i8* null, i8** [[TMP33]], align 4 3077 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3078 // CHECK3-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16** 3079 // CHECK3-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 4 3080 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3081 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16** 3082 // CHECK3-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 4 3083 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 3084 // CHECK3-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 4 3085 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 3086 // CHECK3-NEXT: store i8* null, i8** [[TMP39]], align 4 3087 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3088 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3089 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3090 // CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 3091 // CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 3092 // CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3093 // CHECK3: omp_offload.failed: 3094 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 3095 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 3096 // CHECK3: omp_offload.cont: 3097 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 3098 // CHECK3: omp_if.else: 3099 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 3100 // CHECK3-NEXT: br label [[OMP_IF_END]] 3101 // CHECK3: omp_if.end: 3102 // CHECK3-NEXT: [[TMP45:%.*]] = mul nsw i32 1, [[TMP1]] 3103 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP45]] 3104 // CHECK3-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 3105 // CHECK3-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 3106 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP46]] to i32 3107 // CHECK3-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4 3108 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP47]] 3109 // CHECK3-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3110 // CHECK3-NEXT: call void @llvm.stackrestore(i8* [[TMP48]]) 3111 // CHECK3-NEXT: ret i32 [[ADD3]] 3112 // 3113 // 3114 // CHECK3-LABEL: define {{[^@]+}}@_ZL7fstatici 3115 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0]] { 3116 // CHECK3-NEXT: entry: 3117 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3118 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 3119 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 3120 // CHECK3-NEXT: [[AAA:%.*]] = alloca i8, align 1 3121 // CHECK3-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 3122 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 3123 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 3124 // CHECK3-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 3125 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3126 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3127 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3128 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3129 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 3130 // CHECK3-NEXT: store i16 0, i16* [[AA]], align 2 3131 // CHECK3-NEXT: store i8 0, i8* [[AAA]], align 1 3132 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 3133 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 3134 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 3135 // CHECK3-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 3136 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 3137 // CHECK3-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 3138 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 3139 // CHECK3-NEXT: [[TMP4:%.*]] = load i8, i8* [[AAA]], align 1 3140 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 3141 // CHECK3-NEXT: store i8 [[TMP4]], i8* [[CONV1]], align 1 3142 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 3143 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 3144 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 50 3145 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3146 // CHECK3: omp_if.then: 3147 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3148 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3149 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 3150 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3151 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3152 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4 3153 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3154 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4 3155 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3156 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 3157 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 3158 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3159 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 3160 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 3161 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3162 // CHECK3-NEXT: store i8* null, i8** [[TMP16]], align 4 3163 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3164 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 3165 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP18]], align 4 3166 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3167 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 3168 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4 3169 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3170 // CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4 3171 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3172 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [10 x i32]** 3173 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP23]], align 4 3174 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3175 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [10 x i32]** 3176 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP25]], align 4 3177 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3178 // CHECK3-NEXT: store i8* null, i8** [[TMP26]], align 4 3179 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3180 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3181 // CHECK3-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 3182 // CHECK3-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 3183 // CHECK3-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3184 // CHECK3: omp_offload.failed: 3185 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 3186 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 3187 // CHECK3: omp_offload.cont: 3188 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 3189 // CHECK3: omp_if.else: 3190 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 3191 // CHECK3-NEXT: br label [[OMP_IF_END]] 3192 // CHECK3: omp_if.end: 3193 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[A]], align 4 3194 // CHECK3-NEXT: ret i32 [[TMP31]] 3195 // 3196 // 3197 // CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 3198 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat { 3199 // CHECK3-NEXT: entry: 3200 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3201 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 3202 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 3203 // CHECK3-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 3204 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 3205 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 3206 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 3207 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 3208 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 3209 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3210 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 3211 // CHECK3-NEXT: store i16 0, i16* [[AA]], align 2 3212 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 3213 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 3214 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 3215 // CHECK3-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 3216 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 3217 // CHECK3-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 3218 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 3219 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 3220 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 3221 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3222 // CHECK3: omp_if.then: 3223 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3224 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 3225 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 3226 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3227 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3228 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 3229 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3230 // CHECK3-NEXT: store i8* null, i8** [[TMP9]], align 4 3231 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3232 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 3233 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 3234 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3235 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 3236 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 3237 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3238 // CHECK3-NEXT: store i8* null, i8** [[TMP14]], align 4 3239 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3240 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 3241 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4 3242 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3243 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 3244 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4 3245 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3246 // CHECK3-NEXT: store i8* null, i8** [[TMP19]], align 4 3247 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3248 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3249 // CHECK3-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.15, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 3250 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 3251 // CHECK3-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3252 // CHECK3: omp_offload.failed: 3253 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 3254 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 3255 // CHECK3: omp_offload.cont: 3256 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 3257 // CHECK3: omp_if.else: 3258 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 3259 // CHECK3-NEXT: br label [[OMP_IF_END]] 3260 // CHECK3: omp_if.end: 3261 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 3262 // CHECK3-NEXT: ret i32 [[TMP24]] 3263 // 3264 // 3265 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 3266 // CHECK3-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 3267 // CHECK3-NEXT: entry: 3268 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 3269 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 3270 // CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3271 // CHECK3-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 3272 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 3273 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 4 3274 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 3275 // CHECK3-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 3276 // CHECK3-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3277 // CHECK3-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 3278 // CHECK3-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 3279 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 3280 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3281 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 3282 // CHECK3-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 3283 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3284 // CHECK3-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 4 3285 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3286 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[B_ADDR]], align 4 3287 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 3288 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 3289 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 3290 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 3291 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 3292 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 3293 // CHECK3-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 4 3294 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 3295 // CHECK3-NEXT: ret void 3296 // 3297 // 3298 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..9 3299 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 3300 // CHECK3-NEXT: entry: 3301 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3302 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3303 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 4 3304 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 3305 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3306 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3307 // CHECK3-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 4 3308 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 4 3309 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 3310 // CHECK3-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 4 3311 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 3312 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3313 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 3314 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 3315 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3316 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 3 3317 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3318 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 4 3319 // CHECK3-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 4 3320 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 3321 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 3322 // CHECK3-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 3323 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 3324 // CHECK3-NEXT: store double [[ADD]], double* [[A]], align 4 3325 // CHECK3-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 3326 // CHECK3-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 4 3327 // CHECK3-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 3328 // CHECK3-NEXT: store double [[INC]], double* [[A1]], align 4 3329 // CHECK3-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 3330 // CHECK3-NEXT: [[TMP13:%.*]] = mul nsw i32 1, [[TMP8]] 3331 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i32 [[TMP13]] 3332 // CHECK3-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 3333 // CHECK3-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 3334 // CHECK3-NEXT: ret void 3335 // 3336 // 3337 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 3338 // CHECK3-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 3339 // CHECK3-NEXT: entry: 3340 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3341 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 3342 // CHECK3-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 3343 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3344 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 4 3345 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3346 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 3347 // CHECK3-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 3348 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3349 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 3350 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 3351 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3352 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3353 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 3354 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 3355 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3356 // CHECK3-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 3357 // CHECK3-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 3358 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 3359 // CHECK3-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV1]], align 4 3360 // CHECK3-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 3361 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 3362 // CHECK3-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 4 3363 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.6*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]]) 3364 // CHECK3-NEXT: ret void 3365 // 3366 // 3367 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 3368 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.6* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 3369 // CHECK3-NEXT: entry: 3370 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3371 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3372 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.6*, align 4 3373 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 3374 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 3375 // CHECK3-NEXT: [[AAA:%.*]] = alloca i8, align 1 3376 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3377 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3378 // CHECK3-NEXT: store %struct.anon.6* [[__CONTEXT]], %struct.anon.6** [[__CONTEXT_ADDR]], align 4 3379 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.6*, %struct.anon.6** [[__CONTEXT_ADDR]], align 4 3380 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6:%.*]], %struct.anon.6* [[TMP0]], i32 0, i32 0 3381 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3382 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 3383 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 1 3384 // CHECK3-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 3385 // CHECK3-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 3386 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 2 3387 // CHECK3-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 3388 // CHECK3-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 3389 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 3 3390 // CHECK3-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 4 3391 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 3392 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 3393 // CHECK3-NEXT: store i32 [[ADD]], i32* [[A]], align 4 3394 // CHECK3-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 3395 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 3396 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 3397 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 3398 // CHECK3-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 3399 // CHECK3-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 3400 // CHECK3-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 3401 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 3402 // CHECK3-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 3403 // CHECK3-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 3404 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i32 0, i32 2 3405 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3406 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 3407 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 3408 // CHECK3-NEXT: ret void 3409 // 3410 // 3411 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 3412 // CHECK3-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 3413 // CHECK3-NEXT: entry: 3414 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3415 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 3416 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3417 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 4 3418 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3419 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 3420 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3421 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 3422 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3423 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3424 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 3425 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 3426 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3427 // CHECK3-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 3428 // CHECK3-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 3429 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 3430 // CHECK3-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 4 3431 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 3432 // CHECK3-NEXT: ret void 3433 // 3434 // 3435 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14 3436 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 3437 // CHECK3-NEXT: entry: 3438 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3439 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3440 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 4 3441 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 3442 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 3443 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3444 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3445 // CHECK3-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 4 3446 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 4 3447 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 3448 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3449 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 3450 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 3451 // CHECK3-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 3452 // CHECK3-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 3453 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 3454 // CHECK3-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 4 3455 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 3456 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 3457 // CHECK3-NEXT: store i32 [[ADD]], i32* [[A]], align 4 3458 // CHECK3-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 3459 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 3460 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 3461 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 3462 // CHECK3-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 3463 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i32 0, i32 2 3464 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3465 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 3466 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 3467 // CHECK3-NEXT: ret void 3468 // 3469 // 3470 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3471 // CHECK3-SAME: () #[[ATTR6:[0-9]+]] { 3472 // CHECK3-NEXT: entry: 3473 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 3474 // CHECK3-NEXT: ret void 3475 // 3476 // 3477 // CHECK4-LABEL: define {{[^@]+}}@_Z3fooi 3478 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 3479 // CHECK4-NEXT: entry: 3480 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3481 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 3482 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2 3483 // CHECK4-NEXT: [[B:%.*]] = alloca [10 x float], align 4 3484 // CHECK4-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3485 // CHECK4-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3486 // CHECK4-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 3487 // CHECK4-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 3488 // CHECK4-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4 3489 // CHECK4-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 3490 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 3491 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 3492 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 3493 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 3494 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 3495 // CHECK4-NEXT: [[A_CASTED2:%.*]] = alloca i32, align 4 3496 // CHECK4-NEXT: [[AA_CASTED3:%.*]] = alloca i32, align 4 3497 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4 3498 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4 3499 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4 3500 // CHECK4-NEXT: [[A_CASTED10:%.*]] = alloca i32, align 4 3501 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [9 x i8*], align 4 3502 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [9 x i8*], align 4 3503 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [9 x i8*], align 4 3504 // CHECK4-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [9 x i64], align 4 3505 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 3506 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3507 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 3508 // CHECK4-NEXT: store i16 0, i16* [[AA]], align 2 3509 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 3510 // CHECK4-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3511 // CHECK4-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 3512 // CHECK4-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4 3513 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 3514 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4 3515 // CHECK4-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]] 3516 // CHECK4-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8 3517 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4 3518 // CHECK4-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1, i32 20, i32 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 3519 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates* 3520 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0 3521 // CHECK4-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* [[TMP5]]) 3522 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 3523 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[A_CASTED]], align 4 3524 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[A_CASTED]], align 4 3525 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104(i32 [[TMP10]]) #[[ATTR3:[0-9]+]] 3526 // CHECK4-NEXT: [[TMP11:%.*]] = load i16, i16* [[AA]], align 2 3527 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 3528 // CHECK4-NEXT: store i16 [[TMP11]], i16* [[CONV]], align 2 3529 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[AA_CASTED]], align 4 3530 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3531 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 3532 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[TMP14]], align 4 3533 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3534 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32* 3535 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[TMP16]], align 4 3536 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3537 // CHECK4-NEXT: store i8* null, i8** [[TMP17]], align 4 3538 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3539 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3540 // CHECK4-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110.region_id, i32 1, i8** [[TMP18]], i8** [[TMP19]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 3541 // CHECK4-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 3542 // CHECK4-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3543 // CHECK4: omp_offload.failed: 3544 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110(i32 [[TMP12]]) #[[ATTR3]] 3545 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 3546 // CHECK4: omp_offload.cont: 3547 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[A]], align 4 3548 // CHECK4-NEXT: store i32 [[TMP22]], i32* [[A_CASTED2]], align 4 3549 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[A_CASTED2]], align 4 3550 // CHECK4-NEXT: [[TMP24:%.*]] = load i16, i16* [[AA]], align 2 3551 // CHECK4-NEXT: [[CONV4:%.*]] = bitcast i32* [[AA_CASTED3]] to i16* 3552 // CHECK4-NEXT: store i16 [[TMP24]], i16* [[CONV4]], align 2 3553 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[AA_CASTED3]], align 4 3554 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4 3555 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP26]], 10 3556 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3557 // CHECK4: omp_if.then: 3558 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 3559 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 3560 // CHECK4-NEXT: store i32 [[TMP23]], i32* [[TMP28]], align 4 3561 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 3562 // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 3563 // CHECK4-NEXT: store i32 [[TMP23]], i32* [[TMP30]], align 4 3564 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 3565 // CHECK4-NEXT: store i8* null, i8** [[TMP31]], align 4 3566 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 3567 // CHECK4-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32* 3568 // CHECK4-NEXT: store i32 [[TMP25]], i32* [[TMP33]], align 4 3569 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 3570 // CHECK4-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32* 3571 // CHECK4-NEXT: store i32 [[TMP25]], i32* [[TMP35]], align 4 3572 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 3573 // CHECK4-NEXT: store i8* null, i8** [[TMP36]], align 4 3574 // CHECK4-NEXT: [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 3575 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 3576 // CHECK4-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119.region_id, i32 2, i8** [[TMP37]], i8** [[TMP38]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 3577 // CHECK4-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 3578 // CHECK4-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 3579 // CHECK4: omp_offload.failed8: 3580 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i32 [[TMP23]], i32 [[TMP25]]) #[[ATTR3]] 3581 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT9]] 3582 // CHECK4: omp_offload.cont9: 3583 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]] 3584 // CHECK4: omp_if.else: 3585 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i32 [[TMP23]], i32 [[TMP25]]) #[[ATTR3]] 3586 // CHECK4-NEXT: br label [[OMP_IF_END]] 3587 // CHECK4: omp_if.end: 3588 // CHECK4-NEXT: [[TMP41:%.*]] = load i32, i32* [[A]], align 4 3589 // CHECK4-NEXT: store i32 [[TMP41]], i32* [[A_CASTED10]], align 4 3590 // CHECK4-NEXT: [[TMP42:%.*]] = load i32, i32* [[A_CASTED10]], align 4 3591 // CHECK4-NEXT: [[TMP43:%.*]] = load i32, i32* [[N_ADDR]], align 4 3592 // CHECK4-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP43]], 20 3593 // CHECK4-NEXT: br i1 [[CMP11]], label [[OMP_IF_THEN12:%.*]], label [[OMP_IF_ELSE18:%.*]] 3594 // CHECK4: omp_if.then12: 3595 // CHECK4-NEXT: [[TMP44:%.*]] = mul nuw i32 [[TMP1]], 4 3596 // CHECK4-NEXT: [[TMP45:%.*]] = sext i32 [[TMP44]] to i64 3597 // CHECK4-NEXT: [[TMP46:%.*]] = mul nuw i32 5, [[TMP3]] 3598 // CHECK4-NEXT: [[TMP47:%.*]] = mul nuw i32 [[TMP46]], 8 3599 // CHECK4-NEXT: [[TMP48:%.*]] = sext i32 [[TMP47]] to i64 3600 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 3601 // CHECK4-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32* 3602 // CHECK4-NEXT: store i32 [[TMP42]], i32* [[TMP50]], align 4 3603 // CHECK4-NEXT: [[TMP51:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 3604 // CHECK4-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32* 3605 // CHECK4-NEXT: store i32 [[TMP42]], i32* [[TMP52]], align 4 3606 // CHECK4-NEXT: [[TMP53:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3607 // CHECK4-NEXT: store i64 4, i64* [[TMP53]], align 4 3608 // CHECK4-NEXT: [[TMP54:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 3609 // CHECK4-NEXT: store i8* null, i8** [[TMP54]], align 4 3610 // CHECK4-NEXT: [[TMP55:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 1 3611 // CHECK4-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to [10 x float]** 3612 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP56]], align 4 3613 // CHECK4-NEXT: [[TMP57:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 1 3614 // CHECK4-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to [10 x float]** 3615 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP58]], align 4 3616 // CHECK4-NEXT: [[TMP59:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3617 // CHECK4-NEXT: store i64 40, i64* [[TMP59]], align 4 3618 // CHECK4-NEXT: [[TMP60:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 1 3619 // CHECK4-NEXT: store i8* null, i8** [[TMP60]], align 4 3620 // CHECK4-NEXT: [[TMP61:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 2 3621 // CHECK4-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32* 3622 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP62]], align 4 3623 // CHECK4-NEXT: [[TMP63:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 2 3624 // CHECK4-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i32* 3625 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP64]], align 4 3626 // CHECK4-NEXT: [[TMP65:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3627 // CHECK4-NEXT: store i64 4, i64* [[TMP65]], align 4 3628 // CHECK4-NEXT: [[TMP66:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 2 3629 // CHECK4-NEXT: store i8* null, i8** [[TMP66]], align 4 3630 // CHECK4-NEXT: [[TMP67:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 3 3631 // CHECK4-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to float** 3632 // CHECK4-NEXT: store float* [[VLA]], float** [[TMP68]], align 4 3633 // CHECK4-NEXT: [[TMP69:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 3 3634 // CHECK4-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to float** 3635 // CHECK4-NEXT: store float* [[VLA]], float** [[TMP70]], align 4 3636 // CHECK4-NEXT: [[TMP71:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 3637 // CHECK4-NEXT: store i64 [[TMP45]], i64* [[TMP71]], align 4 3638 // CHECK4-NEXT: [[TMP72:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 3 3639 // CHECK4-NEXT: store i8* null, i8** [[TMP72]], align 4 3640 // CHECK4-NEXT: [[TMP73:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 4 3641 // CHECK4-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to [5 x [10 x double]]** 3642 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP74]], align 4 3643 // CHECK4-NEXT: [[TMP75:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 4 3644 // CHECK4-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to [5 x [10 x double]]** 3645 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP76]], align 4 3646 // CHECK4-NEXT: [[TMP77:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 3647 // CHECK4-NEXT: store i64 400, i64* [[TMP77]], align 4 3648 // CHECK4-NEXT: [[TMP78:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 4 3649 // CHECK4-NEXT: store i8* null, i8** [[TMP78]], align 4 3650 // CHECK4-NEXT: [[TMP79:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 5 3651 // CHECK4-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32* 3652 // CHECK4-NEXT: store i32 5, i32* [[TMP80]], align 4 3653 // CHECK4-NEXT: [[TMP81:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 5 3654 // CHECK4-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32* 3655 // CHECK4-NEXT: store i32 5, i32* [[TMP82]], align 4 3656 // CHECK4-NEXT: [[TMP83:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5 3657 // CHECK4-NEXT: store i64 4, i64* [[TMP83]], align 4 3658 // CHECK4-NEXT: [[TMP84:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 5 3659 // CHECK4-NEXT: store i8* null, i8** [[TMP84]], align 4 3660 // CHECK4-NEXT: [[TMP85:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 6 3661 // CHECK4-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32* 3662 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP86]], align 4 3663 // CHECK4-NEXT: [[TMP87:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 6 3664 // CHECK4-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i32* 3665 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP88]], align 4 3666 // CHECK4-NEXT: [[TMP89:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 3667 // CHECK4-NEXT: store i64 4, i64* [[TMP89]], align 4 3668 // CHECK4-NEXT: [[TMP90:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 6 3669 // CHECK4-NEXT: store i8* null, i8** [[TMP90]], align 4 3670 // CHECK4-NEXT: [[TMP91:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 7 3671 // CHECK4-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to double** 3672 // CHECK4-NEXT: store double* [[VLA1]], double** [[TMP92]], align 4 3673 // CHECK4-NEXT: [[TMP93:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 7 3674 // CHECK4-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 3675 // CHECK4-NEXT: store double* [[VLA1]], double** [[TMP94]], align 4 3676 // CHECK4-NEXT: [[TMP95:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 3677 // CHECK4-NEXT: store i64 [[TMP48]], i64* [[TMP95]], align 4 3678 // CHECK4-NEXT: [[TMP96:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 7 3679 // CHECK4-NEXT: store i8* null, i8** [[TMP96]], align 4 3680 // CHECK4-NEXT: [[TMP97:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 8 3681 // CHECK4-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to %struct.TT** 3682 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP98]], align 4 3683 // CHECK4-NEXT: [[TMP99:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 8 3684 // CHECK4-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to %struct.TT** 3685 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP100]], align 4 3686 // CHECK4-NEXT: [[TMP101:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8 3687 // CHECK4-NEXT: store i64 12, i64* [[TMP101]], align 4 3688 // CHECK4-NEXT: [[TMP102:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 8 3689 // CHECK4-NEXT: store i8* null, i8** [[TMP102]], align 4 3690 // CHECK4-NEXT: [[TMP103:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 3691 // CHECK4-NEXT: [[TMP104:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 3692 // CHECK4-NEXT: [[TMP105:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3693 // CHECK4-NEXT: [[TMP106:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144.region_id, i32 9, i8** [[TMP103]], i8** [[TMP104]], i64* [[TMP105]], i64* getelementptr inbounds ([9 x i64], [9 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 3694 // CHECK4-NEXT: [[TMP107:%.*]] = icmp ne i32 [[TMP106]], 0 3695 // CHECK4-NEXT: br i1 [[TMP107]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 3696 // CHECK4: omp_offload.failed16: 3697 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i32 [[TMP42]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 3698 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT17]] 3699 // CHECK4: omp_offload.cont17: 3700 // CHECK4-NEXT: br label [[OMP_IF_END19:%.*]] 3701 // CHECK4: omp_if.else18: 3702 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i32 [[TMP42]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 3703 // CHECK4-NEXT: br label [[OMP_IF_END19]] 3704 // CHECK4: omp_if.end19: 3705 // CHECK4-NEXT: [[TMP108:%.*]] = load i32, i32* [[A]], align 4 3706 // CHECK4-NEXT: [[TMP109:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3707 // CHECK4-NEXT: call void @llvm.stackrestore(i8* [[TMP109]]) 3708 // CHECK4-NEXT: ret i32 [[TMP108]] 3709 // 3710 // 3711 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 3712 // CHECK4-SAME: () #[[ATTR2:[0-9]+]] { 3713 // CHECK4-NEXT: entry: 3714 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 3715 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 3716 // CHECK4-NEXT: ret void 3717 // 3718 // 3719 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 3720 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 3721 // CHECK4-NEXT: entry: 3722 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3723 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3724 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 3725 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3726 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3727 // CHECK4-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 3728 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 3729 // CHECK4-NEXT: ret void 3730 // 3731 // 3732 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry. 3733 // CHECK4-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 3734 // CHECK4-NEXT: entry: 3735 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 3736 // CHECK4-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4 3737 // CHECK4-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4 3738 // CHECK4-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4 3739 // CHECK4-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4 3740 // CHECK4-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 4 3741 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 3742 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4 3743 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 3744 // CHECK4-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 3745 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 3746 // CHECK4-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 3747 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 3748 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 3749 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 3750 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 3751 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 3752 // CHECK4-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 3753 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]]) 3754 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]]) 3755 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]]) 3756 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 3757 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22 3758 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22 3759 // CHECK4-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 3760 // CHECK4-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 3761 // CHECK4-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22 3762 // CHECK4-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 3763 // CHECK4-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 3764 // CHECK4-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0) #[[ATTR3]] 3765 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3766 // CHECK4-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 3767 // CHECK4: omp_offload.failed.i: 3768 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100() #[[ATTR3]] 3769 // CHECK4-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 3770 // CHECK4: .omp_outlined..1.exit: 3771 // CHECK4-NEXT: ret i32 0 3772 // 3773 // 3774 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104 3775 // CHECK4-SAME: (i32 [[A:%.*]]) #[[ATTR2]] { 3776 // CHECK4-NEXT: entry: 3777 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3778 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 3779 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3780 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3781 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 3782 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 3783 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 3784 // CHECK4-NEXT: ret void 3785 // 3786 // 3787 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 3788 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 3789 // CHECK4-NEXT: entry: 3790 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3791 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3792 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 3793 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 3794 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3795 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3796 // CHECK4-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 3797 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 3798 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 3799 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3800 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 3801 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 3802 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1 3803 // CHECK4-NEXT: store i32 [[ADD]], i32* [[A]], align 4 3804 // CHECK4-NEXT: ret void 3805 // 3806 // 3807 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 3808 // CHECK4-SAME: (i32 [[AA:%.*]]) #[[ATTR2]] { 3809 // CHECK4-NEXT: entry: 3810 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 3811 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 2 3812 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 3813 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 3814 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3815 // CHECK4-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 4 3816 // CHECK4-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 3817 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 3818 // CHECK4-NEXT: ret void 3819 // 3820 // 3821 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 3822 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 3823 // CHECK4-NEXT: entry: 3824 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3825 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3826 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 4 3827 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2 3828 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3829 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3830 // CHECK4-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 4 3831 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 4 3832 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 3833 // CHECK4-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 3834 // CHECK4-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 3835 // CHECK4-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 3836 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 3837 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 3838 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 3839 // CHECK4-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 3840 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3841 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3842 // CHECK4-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 3843 // CHECK4-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 3844 // CHECK4-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 3845 // CHECK4: .cancel.exit: 3846 // CHECK4-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 3847 // CHECK4-NEXT: br label [[DOTCANCEL_CONTINUE]] 3848 // CHECK4: .cancel.continue: 3849 // CHECK4-NEXT: ret void 3850 // 3851 // 3852 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 3853 // CHECK4-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] { 3854 // CHECK4-NEXT: entry: 3855 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3856 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 3857 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 3858 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3859 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 3860 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 3861 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3862 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 3863 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 3864 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3865 // CHECK4-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4 3866 // CHECK4-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 3867 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 3868 // CHECK4-NEXT: ret void 3869 // 3870 // 3871 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4 3872 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 3873 // CHECK4-NEXT: entry: 3874 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3875 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3876 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 4 3877 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 3878 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2 3879 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3880 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3881 // CHECK4-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 4 3882 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 4 3883 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 3884 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3885 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 3886 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 3887 // CHECK4-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 3888 // CHECK4-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 3889 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 3890 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 3891 // CHECK4-NEXT: store i32 [[ADD]], i32* [[A]], align 4 3892 // CHECK4-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 3893 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 3894 // CHECK4-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 3895 // CHECK4-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 3896 // CHECK4-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 3897 // CHECK4-NEXT: ret void 3898 // 3899 // 3900 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 3901 // CHECK4-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]]) #[[ATTR2]] { 3902 // CHECK4-NEXT: entry: 3903 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3904 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 3905 // CHECK4-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3906 // CHECK4-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 3907 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 3908 // CHECK4-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 3909 // CHECK4-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 3910 // CHECK4-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 3911 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 3912 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 4 3913 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3914 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 3915 // CHECK4-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3916 // CHECK4-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 3917 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 3918 // CHECK4-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 3919 // CHECK4-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 3920 // CHECK4-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 3921 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 3922 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 3923 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3924 // CHECK4-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 3925 // CHECK4-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 3926 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 3927 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 3928 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 3929 // CHECK4-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 3930 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3931 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 3932 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 3933 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3934 // CHECK4-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 4 3935 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 3936 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP11]], align 4 3937 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 3938 // CHECK4-NEXT: store float* [[TMP2]], float** [[TMP12]], align 4 3939 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 3940 // CHECK4-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 4 3941 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 3942 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4 3943 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 3944 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 3945 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 3946 // CHECK4-NEXT: store double* [[TMP6]], double** [[TMP16]], align 4 3947 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 3948 // CHECK4-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 4 3949 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 3950 // CHECK4-NEXT: ret void 3951 // 3952 // 3953 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7 3954 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 3955 // CHECK4-NEXT: entry: 3956 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3957 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3958 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 4 3959 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 3960 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3961 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3962 // CHECK4-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 4 3963 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 4 3964 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 3965 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3966 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 3967 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 3968 // CHECK4-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 4 3969 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 3970 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3971 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 3972 // CHECK4-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 4 3973 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 3974 // CHECK4-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 4 3975 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 5 3976 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3977 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 6 3978 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 3979 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 7 3980 // CHECK4-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 4 3981 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 8 3982 // CHECK4-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 4 3983 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 3984 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 3985 // CHECK4-NEXT: store i32 [[ADD]], i32* [[A]], align 4 3986 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i32 0, i32 2 3987 // CHECK4-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 3988 // CHECK4-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 3989 // CHECK4-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 3990 // CHECK4-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 3991 // CHECK4-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 3992 // CHECK4-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i32 3 3993 // CHECK4-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 3994 // CHECK4-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 3995 // CHECK4-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 3996 // CHECK4-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 3997 // CHECK4-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 3998 // CHECK4-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i32 0, i32 1 3999 // CHECK4-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i32 0, i32 2 4000 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 4001 // CHECK4-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 4002 // CHECK4-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 4003 // CHECK4-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP14]] 4004 // CHECK4-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i32 [[TMP23]] 4005 // CHECK4-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i32 3 4006 // CHECK4-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 4007 // CHECK4-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 4008 // CHECK4-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 4009 // CHECK4-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 4010 // CHECK4-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4 4011 // CHECK4-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 4012 // CHECK4-NEXT: store i64 [[ADD13]], i64* [[X]], align 4 4013 // CHECK4-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 4014 // CHECK4-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4 4015 // CHECK4-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 4016 // CHECK4-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 4017 // CHECK4-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 4018 // CHECK4-NEXT: store i8 [[CONV16]], i8* [[Y]], align 4 4019 // CHECK4-NEXT: ret void 4020 // 4021 // 4022 // CHECK4-LABEL: define {{[^@]+}}@_Z3bari 4023 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0]] { 4024 // CHECK4-NEXT: entry: 4025 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4026 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 4027 // CHECK4-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 4028 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4029 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 4030 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 4031 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_Z3fooi(i32 [[TMP0]]) 4032 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 4033 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 4034 // CHECK4-NEXT: store i32 [[ADD]], i32* [[A]], align 4 4035 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4036 // CHECK4-NEXT: [[CALL1:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP2]]) 4037 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 4038 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 4039 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 4040 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 4041 // CHECK4-NEXT: [[CALL3:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP4]]) 4042 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 4043 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 4044 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 4045 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 4046 // CHECK4-NEXT: [[CALL5:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP6]]) 4047 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 4048 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 4049 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 4050 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 4051 // CHECK4-NEXT: ret i32 [[TMP8]] 4052 // 4053 // 4054 // CHECK4-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 4055 // CHECK4-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 { 4056 // CHECK4-NEXT: entry: 4057 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 4058 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4059 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 4060 // CHECK4-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4061 // CHECK4-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4062 // CHECK4-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 4063 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 4064 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 4065 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 4066 // CHECK4-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 4067 // CHECK4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 4068 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4069 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 4070 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 4071 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 4072 // CHECK4-NEXT: store i32 [[ADD]], i32* [[B]], align 4 4073 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 4074 // CHECK4-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 4075 // CHECK4-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 4076 // CHECK4-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]] 4077 // CHECK4-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2 4078 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 4079 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4 4080 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 4081 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 4082 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 4083 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60 4084 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 4085 // CHECK4: omp_if.then: 4086 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 4087 // CHECK4-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]] 4088 // CHECK4-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2 4089 // CHECK4-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 4090 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4091 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1** 4092 // CHECK4-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 4 4093 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4094 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 4095 // CHECK4-NEXT: store double* [[A]], double** [[TMP13]], align 4 4096 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4097 // CHECK4-NEXT: store i64 8, i64* [[TMP14]], align 4 4098 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4099 // CHECK4-NEXT: store i8* null, i8** [[TMP15]], align 4 4100 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4101 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 4102 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4 4103 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4104 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 4105 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4 4106 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 4107 // CHECK4-NEXT: store i64 4, i64* [[TMP20]], align 4 4108 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4109 // CHECK4-NEXT: store i8* null, i8** [[TMP21]], align 4 4110 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4111 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 4112 // CHECK4-NEXT: store i32 2, i32* [[TMP23]], align 4 4113 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4114 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 4115 // CHECK4-NEXT: store i32 2, i32* [[TMP25]], align 4 4116 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 4117 // CHECK4-NEXT: store i64 4, i64* [[TMP26]], align 4 4118 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4119 // CHECK4-NEXT: store i8* null, i8** [[TMP27]], align 4 4120 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4121 // CHECK4-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32* 4122 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4 4123 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4124 // CHECK4-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i32* 4125 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP31]], align 4 4126 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 4127 // CHECK4-NEXT: store i64 4, i64* [[TMP32]], align 4 4128 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4129 // CHECK4-NEXT: store i8* null, i8** [[TMP33]], align 4 4130 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 4131 // CHECK4-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16** 4132 // CHECK4-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 4 4133 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 4134 // CHECK4-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16** 4135 // CHECK4-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 4 4136 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 4137 // CHECK4-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 4 4138 // CHECK4-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 4139 // CHECK4-NEXT: store i8* null, i8** [[TMP39]], align 4 4140 // CHECK4-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4141 // CHECK4-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4142 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4143 // CHECK4-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 4144 // CHECK4-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 4145 // CHECK4-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4146 // CHECK4: omp_offload.failed: 4147 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 4148 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 4149 // CHECK4: omp_offload.cont: 4150 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]] 4151 // CHECK4: omp_if.else: 4152 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 4153 // CHECK4-NEXT: br label [[OMP_IF_END]] 4154 // CHECK4: omp_if.end: 4155 // CHECK4-NEXT: [[TMP45:%.*]] = mul nsw i32 1, [[TMP1]] 4156 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP45]] 4157 // CHECK4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 4158 // CHECK4-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 4159 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP46]] to i32 4160 // CHECK4-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4 4161 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP47]] 4162 // CHECK4-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4163 // CHECK4-NEXT: call void @llvm.stackrestore(i8* [[TMP48]]) 4164 // CHECK4-NEXT: ret i32 [[ADD3]] 4165 // 4166 // 4167 // CHECK4-LABEL: define {{[^@]+}}@_ZL7fstatici 4168 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0]] { 4169 // CHECK4-NEXT: entry: 4170 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4171 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 4172 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2 4173 // CHECK4-NEXT: [[AAA:%.*]] = alloca i8, align 1 4174 // CHECK4-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 4175 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 4176 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 4177 // CHECK4-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 4178 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 4179 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 4180 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 4181 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4182 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 4183 // CHECK4-NEXT: store i16 0, i16* [[AA]], align 2 4184 // CHECK4-NEXT: store i8 0, i8* [[AAA]], align 1 4185 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 4186 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 4187 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 4188 // CHECK4-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 4189 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 4190 // CHECK4-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 4191 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 4192 // CHECK4-NEXT: [[TMP4:%.*]] = load i8, i8* [[AAA]], align 1 4193 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 4194 // CHECK4-NEXT: store i8 [[TMP4]], i8* [[CONV1]], align 1 4195 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 4196 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 4197 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 50 4198 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 4199 // CHECK4: omp_if.then: 4200 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4201 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 4202 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 4203 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4204 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4205 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4 4206 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4207 // CHECK4-NEXT: store i8* null, i8** [[TMP11]], align 4 4208 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4209 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 4210 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 4211 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4212 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 4213 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 4214 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4215 // CHECK4-NEXT: store i8* null, i8** [[TMP16]], align 4 4216 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4217 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 4218 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP18]], align 4 4219 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4220 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 4221 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4 4222 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4223 // CHECK4-NEXT: store i8* null, i8** [[TMP21]], align 4 4224 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4225 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [10 x i32]** 4226 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP23]], align 4 4227 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4228 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [10 x i32]** 4229 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP25]], align 4 4230 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4231 // CHECK4-NEXT: store i8* null, i8** [[TMP26]], align 4 4232 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4233 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4234 // CHECK4-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 4235 // CHECK4-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 4236 // CHECK4-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4237 // CHECK4: omp_offload.failed: 4238 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 4239 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 4240 // CHECK4: omp_offload.cont: 4241 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]] 4242 // CHECK4: omp_if.else: 4243 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 4244 // CHECK4-NEXT: br label [[OMP_IF_END]] 4245 // CHECK4: omp_if.end: 4246 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[A]], align 4 4247 // CHECK4-NEXT: ret i32 [[TMP31]] 4248 // 4249 // 4250 // CHECK4-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 4251 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat { 4252 // CHECK4-NEXT: entry: 4253 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4254 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 4255 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2 4256 // CHECK4-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 4257 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 4258 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 4259 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4260 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4261 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4262 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4263 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 4264 // CHECK4-NEXT: store i16 0, i16* [[AA]], align 2 4265 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 4266 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 4267 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 4268 // CHECK4-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 4269 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 4270 // CHECK4-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 4271 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 4272 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 4273 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 4274 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 4275 // CHECK4: omp_if.then: 4276 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4277 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 4278 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 4279 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4280 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 4281 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 4282 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4283 // CHECK4-NEXT: store i8* null, i8** [[TMP9]], align 4 4284 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4285 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 4286 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 4287 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4288 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 4289 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 4290 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4291 // CHECK4-NEXT: store i8* null, i8** [[TMP14]], align 4 4292 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4293 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 4294 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4 4295 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4296 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 4297 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4 4298 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4299 // CHECK4-NEXT: store i8* null, i8** [[TMP19]], align 4 4300 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4301 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4302 // CHECK4-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.15, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 4303 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 4304 // CHECK4-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4305 // CHECK4: omp_offload.failed: 4306 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 4307 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 4308 // CHECK4: omp_offload.cont: 4309 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]] 4310 // CHECK4: omp_if.else: 4311 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 4312 // CHECK4-NEXT: br label [[OMP_IF_END]] 4313 // CHECK4: omp_if.end: 4314 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 4315 // CHECK4-NEXT: ret i32 [[TMP24]] 4316 // 4317 // 4318 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 4319 // CHECK4-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 4320 // CHECK4-NEXT: entry: 4321 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 4322 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 4323 // CHECK4-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4324 // CHECK4-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 4325 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 4326 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 4 4327 // CHECK4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 4328 // CHECK4-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 4329 // CHECK4-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4330 // CHECK4-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 4331 // CHECK4-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 4332 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 4333 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4334 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 4335 // CHECK4-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 4336 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4337 // CHECK4-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 4 4338 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4339 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[B_ADDR]], align 4 4340 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 4341 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4342 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 4343 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4344 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 4345 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 4346 // CHECK4-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 4 4347 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 4348 // CHECK4-NEXT: ret void 4349 // 4350 // 4351 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..9 4352 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 4353 // CHECK4-NEXT: entry: 4354 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4355 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4356 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 4 4357 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 4358 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4359 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4360 // CHECK4-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 4 4361 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 4 4362 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 4363 // CHECK4-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 4 4364 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 4365 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4366 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 4367 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 4368 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 4369 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 3 4370 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4371 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 4 4372 // CHECK4-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 4 4373 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 4374 // CHECK4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 4375 // CHECK4-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 4376 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 4377 // CHECK4-NEXT: store double [[ADD]], double* [[A]], align 4 4378 // CHECK4-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 4379 // CHECK4-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 4 4380 // CHECK4-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 4381 // CHECK4-NEXT: store double [[INC]], double* [[A1]], align 4 4382 // CHECK4-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 4383 // CHECK4-NEXT: [[TMP13:%.*]] = mul nsw i32 1, [[TMP8]] 4384 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i32 [[TMP13]] 4385 // CHECK4-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 4386 // CHECK4-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 4387 // CHECK4-NEXT: ret void 4388 // 4389 // 4390 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 4391 // CHECK4-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 4392 // CHECK4-NEXT: entry: 4393 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4394 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 4395 // CHECK4-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 4396 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 4397 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 4 4398 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4399 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 4400 // CHECK4-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 4401 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 4402 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 4403 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 4404 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 4405 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4406 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 4407 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 4408 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4409 // CHECK4-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 4410 // CHECK4-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 4411 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4412 // CHECK4-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV1]], align 4 4413 // CHECK4-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 4414 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4415 // CHECK4-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 4 4416 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.6*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]]) 4417 // CHECK4-NEXT: ret void 4418 // 4419 // 4420 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11 4421 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.6* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 4422 // CHECK4-NEXT: entry: 4423 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4424 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4425 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.6*, align 4 4426 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 4427 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2 4428 // CHECK4-NEXT: [[AAA:%.*]] = alloca i8, align 1 4429 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4430 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4431 // CHECK4-NEXT: store %struct.anon.6* [[__CONTEXT]], %struct.anon.6** [[__CONTEXT_ADDR]], align 4 4432 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.6*, %struct.anon.6** [[__CONTEXT_ADDR]], align 4 4433 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6:%.*]], %struct.anon.6* [[TMP0]], i32 0, i32 0 4434 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4435 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 4436 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 1 4437 // CHECK4-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 4438 // CHECK4-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 4439 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 2 4440 // CHECK4-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 4441 // CHECK4-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 4442 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 3 4443 // CHECK4-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 4 4444 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 4445 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 4446 // CHECK4-NEXT: store i32 [[ADD]], i32* [[A]], align 4 4447 // CHECK4-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 4448 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 4449 // CHECK4-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 4450 // CHECK4-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 4451 // CHECK4-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 4452 // CHECK4-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 4453 // CHECK4-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 4454 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 4455 // CHECK4-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 4456 // CHECK4-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 4457 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i32 0, i32 2 4458 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 4459 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 4460 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 4461 // CHECK4-NEXT: ret void 4462 // 4463 // 4464 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 4465 // CHECK4-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 4466 // CHECK4-NEXT: entry: 4467 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4468 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 4469 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 4470 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 4 4471 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4472 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 4473 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 4474 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 4475 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 4476 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4477 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 4478 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 4479 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4480 // CHECK4-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 4481 // CHECK4-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 4482 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4483 // CHECK4-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 4 4484 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 4485 // CHECK4-NEXT: ret void 4486 // 4487 // 4488 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..14 4489 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 4490 // CHECK4-NEXT: entry: 4491 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4492 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4493 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 4 4494 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 4495 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2 4496 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4497 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4498 // CHECK4-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 4 4499 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 4 4500 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 4501 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4502 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 4503 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 4504 // CHECK4-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 4505 // CHECK4-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 4506 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 4507 // CHECK4-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 4 4508 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 4509 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 4510 // CHECK4-NEXT: store i32 [[ADD]], i32* [[A]], align 4 4511 // CHECK4-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 4512 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 4513 // CHECK4-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 4514 // CHECK4-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 4515 // CHECK4-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 4516 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i32 0, i32 2 4517 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 4518 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 4519 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 4520 // CHECK4-NEXT: ret void 4521 // 4522 // 4523 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4524 // CHECK4-SAME: () #[[ATTR6:[0-9]+]] { 4525 // CHECK4-NEXT: entry: 4526 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 4527 // CHECK4-NEXT: ret void 4528 // 4529 // 4530 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 4531 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 4532 // CHECK9-NEXT: entry: 4533 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 4534 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 4535 // CHECK9-NEXT: ret void 4536 // 4537 // 4538 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 4539 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 4540 // CHECK9-NEXT: entry: 4541 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4542 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4543 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 4544 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4545 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4546 // CHECK9-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 4547 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 4548 // CHECK9-NEXT: ret void 4549 // 4550 // 4551 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 4552 // CHECK9-SAME: (i64 [[AA:%.*]]) #[[ATTR0]] { 4553 // CHECK9-NEXT: entry: 4554 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 4555 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 2 4556 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 4557 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 4558 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4559 // CHECK9-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 8 4560 // CHECK9-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 4561 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 4562 // CHECK9-NEXT: ret void 4563 // 4564 // 4565 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 4566 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 4567 // CHECK9-NEXT: entry: 4568 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4569 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4570 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 4571 // CHECK9-NEXT: [[AA:%.*]] = alloca i16, align 2 4572 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4573 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4574 // CHECK9-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 4575 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 4576 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 4577 // CHECK9-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 4578 // CHECK9-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 4579 // CHECK9-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 4580 // CHECK9-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 4581 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 4582 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 4583 // CHECK9-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 4584 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4585 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 4586 // CHECK9-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 4587 // CHECK9-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 4588 // CHECK9-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 4589 // CHECK9: .cancel.exit: 4590 // CHECK9-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 4591 // CHECK9-NEXT: br label [[DOTCANCEL_CONTINUE]] 4592 // CHECK9: .cancel.continue: 4593 // CHECK9-NEXT: ret void 4594 // 4595 // 4596 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 4597 // CHECK9-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] { 4598 // CHECK9-NEXT: entry: 4599 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 4600 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 4601 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 4602 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 4603 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 4604 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 4605 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 4606 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4607 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 4608 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 4609 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4610 // CHECK9-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8 4611 // CHECK9-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 4612 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 4613 // CHECK9-NEXT: ret void 4614 // 4615 // 4616 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 4617 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 4618 // CHECK9-NEXT: entry: 4619 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4620 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4621 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 4622 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 4623 // CHECK9-NEXT: [[AA:%.*]] = alloca i16, align 2 4624 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4625 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4626 // CHECK9-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 4627 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 4628 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 4629 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4630 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 4631 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 4632 // CHECK9-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 4633 // CHECK9-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 4634 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 4635 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 4636 // CHECK9-NEXT: store i32 [[ADD]], i32* [[A]], align 4 4637 // CHECK9-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 4638 // CHECK9-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 4639 // CHECK9-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 4640 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 4641 // CHECK9-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 4642 // CHECK9-NEXT: ret void 4643 // 4644 // 4645 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 4646 // CHECK9-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]]) #[[ATTR0]] { 4647 // CHECK9-NEXT: entry: 4648 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 4649 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 4650 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4651 // CHECK9-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 4652 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 4653 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 4654 // CHECK9-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 4655 // CHECK9-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 4656 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 4657 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 4658 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 4659 // CHECK9-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 4660 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4661 // CHECK9-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 4662 // CHECK9-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 4663 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 4664 // CHECK9-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 4665 // CHECK9-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 4666 // CHECK9-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 4667 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 4668 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 4669 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4670 // CHECK9-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 4671 // CHECK9-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 4672 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 4673 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 4674 // CHECK9-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 4675 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 4676 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4677 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 4678 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 8 4679 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4680 // CHECK9-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 8 4681 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4682 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8 4683 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4684 // CHECK9-NEXT: store float* [[TMP2]], float** [[TMP12]], align 8 4685 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 4686 // CHECK9-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 8 4687 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 4688 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8 4689 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 4690 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP15]], align 8 4691 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 4692 // CHECK9-NEXT: store double* [[TMP6]], double** [[TMP16]], align 8 4693 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 4694 // CHECK9-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 8 4695 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 4696 // CHECK9-NEXT: ret void 4697 // 4698 // 4699 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 4700 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 4701 // CHECK9-NEXT: entry: 4702 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4703 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4704 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 4705 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 4706 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4707 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4708 // CHECK9-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 4709 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 4710 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 4711 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 4712 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 4713 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 4714 // CHECK9-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 8 4715 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 2 4716 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 4717 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 3 4718 // CHECK9-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 8 4719 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 4 4720 // CHECK9-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 8 4721 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 5 4722 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[TMP11]], align 8 4723 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 6 4724 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP13]], align 8 4725 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 7 4726 // CHECK9-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 8 4727 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 8 4728 // CHECK9-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 8 4729 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 4730 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 4731 // CHECK9-NEXT: store i32 [[ADD]], i32* [[A]], align 4 4732 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i64 0, i64 2 4733 // CHECK9-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 4734 // CHECK9-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 4735 // CHECK9-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 4736 // CHECK9-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 4737 // CHECK9-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 4738 // CHECK9-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i64 3 4739 // CHECK9-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 4740 // CHECK9-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 4741 // CHECK9-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 4742 // CHECK9-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 4743 // CHECK9-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 4744 // CHECK9-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i64 0, i64 1 4745 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i64 0, i64 2 4746 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 4747 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 4748 // CHECK9-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 4749 // CHECK9-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP14]] 4750 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 [[TMP23]] 4751 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i64 3 4752 // CHECK9-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 4753 // CHECK9-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 4754 // CHECK9-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 4755 // CHECK9-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 4756 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8 4757 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 4758 // CHECK9-NEXT: store i64 [[ADD13]], i64* [[X]], align 8 4759 // CHECK9-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 4760 // CHECK9-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8 4761 // CHECK9-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 4762 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 4763 // CHECK9-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 4764 // CHECK9-NEXT: store i8 [[CONV16]], i8* [[Y]], align 8 4765 // CHECK9-NEXT: ret void 4766 // 4767 // 4768 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 4769 // CHECK9-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 4770 // CHECK9-NEXT: entry: 4771 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 4772 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 4773 // CHECK9-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 4774 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 4775 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 8 4776 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 4777 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 4778 // CHECK9-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 4779 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 4780 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 4781 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 4782 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 4783 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 4784 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4785 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 4786 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 4787 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4788 // CHECK9-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 4789 // CHECK9-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 4790 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4791 // CHECK9-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV2]], align 8 4792 // CHECK9-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 4793 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4794 // CHECK9-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 8 4795 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 4796 // CHECK9-NEXT: ret void 4797 // 4798 // 4799 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 4800 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 4801 // CHECK9-NEXT: entry: 4802 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4803 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4804 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 4805 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 4806 // CHECK9-NEXT: [[AA:%.*]] = alloca i16, align 2 4807 // CHECK9-NEXT: [[AAA:%.*]] = alloca i8, align 1 4808 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4809 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4810 // CHECK9-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 4811 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 4812 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 4813 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 4814 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 4815 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 4816 // CHECK9-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 4817 // CHECK9-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 4818 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 4819 // CHECK9-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 4820 // CHECK9-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 4821 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 4822 // CHECK9-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 8 4823 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 4824 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 4825 // CHECK9-NEXT: store i32 [[ADD]], i32* [[A]], align 4 4826 // CHECK9-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 4827 // CHECK9-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 4828 // CHECK9-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 4829 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 4830 // CHECK9-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 4831 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 4832 // CHECK9-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 4833 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 4834 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 4835 // CHECK9-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 4836 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i64 0, i64 2 4837 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 4838 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 4839 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 4840 // CHECK9-NEXT: ret void 4841 // 4842 // 4843 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 4844 // CHECK9-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 4845 // CHECK9-NEXT: entry: 4846 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 4847 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 4848 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4849 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 4850 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 4851 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 4852 // CHECK9-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 4853 // CHECK9-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 4854 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4855 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 4856 // CHECK9-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 4857 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 4858 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 4859 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4860 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 4861 // CHECK9-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 4862 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4863 // CHECK9-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 8 4864 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4865 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 4866 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 4867 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4868 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 4869 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4870 // CHECK9-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 4871 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 4872 // CHECK9-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 8 4873 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 4874 // CHECK9-NEXT: ret void 4875 // 4876 // 4877 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 4878 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 4879 // CHECK9-NEXT: entry: 4880 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4881 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4882 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 4883 // CHECK9-NEXT: [[B:%.*]] = alloca i32, align 4 4884 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4885 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4886 // CHECK9-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 4887 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 4888 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 4889 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 8 4890 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 4891 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 4892 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 4893 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 4894 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 4895 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 4896 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8 4897 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 4898 // CHECK9-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 8 4899 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 4900 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 4901 // CHECK9-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 4902 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 4903 // CHECK9-NEXT: store double [[ADD]], double* [[A]], align 8 4904 // CHECK9-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 4905 // CHECK9-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 8 4906 // CHECK9-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 4907 // CHECK9-NEXT: store double [[INC]], double* [[A1]], align 8 4908 // CHECK9-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 4909 // CHECK9-NEXT: [[TMP13:%.*]] = mul nsw i64 1, [[TMP8]] 4910 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i64 [[TMP13]] 4911 // CHECK9-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 4912 // CHECK9-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 4913 // CHECK9-NEXT: ret void 4914 // 4915 // 4916 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 4917 // CHECK9-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 4918 // CHECK9-NEXT: entry: 4919 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 4920 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 4921 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 4922 // CHECK9-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 4923 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 4924 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 4925 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 4926 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 4927 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 4928 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 4929 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4930 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 4931 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 4932 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4933 // CHECK9-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 4934 // CHECK9-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 4935 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4936 // CHECK9-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 8 4937 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 4938 // CHECK9-NEXT: ret void 4939 // 4940 // 4941 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 4942 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 4943 // CHECK9-NEXT: entry: 4944 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4945 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4946 // CHECK9-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 4947 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 4948 // CHECK9-NEXT: [[AA:%.*]] = alloca i16, align 2 4949 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4950 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4951 // CHECK9-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 4952 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 4953 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 4954 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 4955 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 4956 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 4957 // CHECK9-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 4958 // CHECK9-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 4959 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 4960 // CHECK9-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 8 4961 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 4962 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 4963 // CHECK9-NEXT: store i32 [[ADD]], i32* [[A]], align 4 4964 // CHECK9-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 4965 // CHECK9-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 4966 // CHECK9-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 4967 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 4968 // CHECK9-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 4969 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i64 0, i64 2 4970 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 4971 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 4972 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 4973 // CHECK9-NEXT: ret void 4974 // 4975 // 4976 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 4977 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 4978 // CHECK10-NEXT: entry: 4979 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 4980 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 4981 // CHECK10-NEXT: ret void 4982 // 4983 // 4984 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 4985 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 4986 // CHECK10-NEXT: entry: 4987 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4988 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4989 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 4990 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4991 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4992 // CHECK10-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 4993 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 4994 // CHECK10-NEXT: ret void 4995 // 4996 // 4997 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 4998 // CHECK10-SAME: (i64 [[AA:%.*]]) #[[ATTR0]] { 4999 // CHECK10-NEXT: entry: 5000 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 5001 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 2 5002 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 5003 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 5004 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5005 // CHECK10-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 8 5006 // CHECK10-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 5007 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 5008 // CHECK10-NEXT: ret void 5009 // 5010 // 5011 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 5012 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5013 // CHECK10-NEXT: entry: 5014 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5015 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5016 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 5017 // CHECK10-NEXT: [[AA:%.*]] = alloca i16, align 2 5018 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5019 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5020 // CHECK10-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 5021 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 5022 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 5023 // CHECK10-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 5024 // CHECK10-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 5025 // CHECK10-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 5026 // CHECK10-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 5027 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 5028 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 5029 // CHECK10-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 5030 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5031 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 5032 // CHECK10-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 5033 // CHECK10-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 5034 // CHECK10-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 5035 // CHECK10: .cancel.exit: 5036 // CHECK10-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 5037 // CHECK10-NEXT: br label [[DOTCANCEL_CONTINUE]] 5038 // CHECK10: .cancel.continue: 5039 // CHECK10-NEXT: ret void 5040 // 5041 // 5042 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 5043 // CHECK10-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] { 5044 // CHECK10-NEXT: entry: 5045 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5046 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 5047 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 5048 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5049 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 5050 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 5051 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 5052 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5053 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 5054 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 5055 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5056 // CHECK10-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8 5057 // CHECK10-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 5058 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 5059 // CHECK10-NEXT: ret void 5060 // 5061 // 5062 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 5063 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5064 // CHECK10-NEXT: entry: 5065 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5066 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5067 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 5068 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 5069 // CHECK10-NEXT: [[AA:%.*]] = alloca i16, align 2 5070 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5071 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5072 // CHECK10-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 5073 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 5074 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 5075 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5076 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 5077 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 5078 // CHECK10-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 5079 // CHECK10-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 5080 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 5081 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 5082 // CHECK10-NEXT: store i32 [[ADD]], i32* [[A]], align 4 5083 // CHECK10-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 5084 // CHECK10-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 5085 // CHECK10-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 5086 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 5087 // CHECK10-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 5088 // CHECK10-NEXT: ret void 5089 // 5090 // 5091 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 5092 // CHECK10-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]]) #[[ATTR0]] { 5093 // CHECK10-NEXT: entry: 5094 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5095 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 5096 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5097 // CHECK10-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 5098 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 5099 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 5100 // CHECK10-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 5101 // CHECK10-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 5102 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 5103 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 5104 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5105 // CHECK10-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 5106 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5107 // CHECK10-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 5108 // CHECK10-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 5109 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 5110 // CHECK10-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 5111 // CHECK10-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 5112 // CHECK10-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 5113 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 5114 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 5115 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5116 // CHECK10-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 5117 // CHECK10-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 5118 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 5119 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 5120 // CHECK10-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 5121 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 5122 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5123 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 5124 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 8 5125 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5126 // CHECK10-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 8 5127 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 5128 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8 5129 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 5130 // CHECK10-NEXT: store float* [[TMP2]], float** [[TMP12]], align 8 5131 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 5132 // CHECK10-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 8 5133 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 5134 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8 5135 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 5136 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP15]], align 8 5137 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 5138 // CHECK10-NEXT: store double* [[TMP6]], double** [[TMP16]], align 8 5139 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 5140 // CHECK10-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 8 5141 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 5142 // CHECK10-NEXT: ret void 5143 // 5144 // 5145 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 5146 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5147 // CHECK10-NEXT: entry: 5148 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5149 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5150 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 5151 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 5152 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5153 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5154 // CHECK10-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 5155 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 5156 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 5157 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 5158 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 5159 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 5160 // CHECK10-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 8 5161 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 2 5162 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 5163 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 3 5164 // CHECK10-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 8 5165 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 4 5166 // CHECK10-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 8 5167 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 5 5168 // CHECK10-NEXT: [[TMP12:%.*]] = load i64, i64* [[TMP11]], align 8 5169 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 6 5170 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP13]], align 8 5171 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 7 5172 // CHECK10-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 8 5173 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 8 5174 // CHECK10-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 8 5175 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 5176 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 5177 // CHECK10-NEXT: store i32 [[ADD]], i32* [[A]], align 4 5178 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i64 0, i64 2 5179 // CHECK10-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 5180 // CHECK10-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 5181 // CHECK10-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 5182 // CHECK10-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 5183 // CHECK10-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 5184 // CHECK10-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i64 3 5185 // CHECK10-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 5186 // CHECK10-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 5187 // CHECK10-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 5188 // CHECK10-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 5189 // CHECK10-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 5190 // CHECK10-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i64 0, i64 1 5191 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i64 0, i64 2 5192 // CHECK10-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 5193 // CHECK10-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 5194 // CHECK10-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 5195 // CHECK10-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP14]] 5196 // CHECK10-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 [[TMP23]] 5197 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i64 3 5198 // CHECK10-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 5199 // CHECK10-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 5200 // CHECK10-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 5201 // CHECK10-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 5202 // CHECK10-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8 5203 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 5204 // CHECK10-NEXT: store i64 [[ADD13]], i64* [[X]], align 8 5205 // CHECK10-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 5206 // CHECK10-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8 5207 // CHECK10-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 5208 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 5209 // CHECK10-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 5210 // CHECK10-NEXT: store i8 [[CONV16]], i8* [[Y]], align 8 5211 // CHECK10-NEXT: ret void 5212 // 5213 // 5214 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 5215 // CHECK10-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 5216 // CHECK10-NEXT: entry: 5217 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5218 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 5219 // CHECK10-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 5220 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 5221 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 8 5222 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5223 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 5224 // CHECK10-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 5225 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 5226 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 5227 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 5228 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 5229 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 5230 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5231 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 5232 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 5233 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5234 // CHECK10-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 5235 // CHECK10-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 5236 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 5237 // CHECK10-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV2]], align 8 5238 // CHECK10-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 5239 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 5240 // CHECK10-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 8 5241 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 5242 // CHECK10-NEXT: ret void 5243 // 5244 // 5245 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4 5246 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5247 // CHECK10-NEXT: entry: 5248 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5249 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5250 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 5251 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 5252 // CHECK10-NEXT: [[AA:%.*]] = alloca i16, align 2 5253 // CHECK10-NEXT: [[AAA:%.*]] = alloca i8, align 1 5254 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5255 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5256 // CHECK10-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 5257 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 5258 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 5259 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 5260 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 5261 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 5262 // CHECK10-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 5263 // CHECK10-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 5264 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 5265 // CHECK10-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 5266 // CHECK10-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 5267 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 5268 // CHECK10-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 8 5269 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 5270 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 5271 // CHECK10-NEXT: store i32 [[ADD]], i32* [[A]], align 4 5272 // CHECK10-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 5273 // CHECK10-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 5274 // CHECK10-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 5275 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 5276 // CHECK10-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 5277 // CHECK10-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 5278 // CHECK10-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 5279 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 5280 // CHECK10-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 5281 // CHECK10-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 5282 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i64 0, i64 2 5283 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 5284 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 5285 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 5286 // CHECK10-NEXT: ret void 5287 // 5288 // 5289 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 5290 // CHECK10-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 5291 // CHECK10-NEXT: entry: 5292 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 5293 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 5294 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5295 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 5296 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 5297 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 5298 // CHECK10-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 5299 // CHECK10-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 5300 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5301 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 5302 // CHECK10-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 5303 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 5304 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 5305 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5306 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 5307 // CHECK10-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 5308 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5309 // CHECK10-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 8 5310 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5311 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 5312 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 5313 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 5314 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 5315 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 5316 // CHECK10-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 5317 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 5318 // CHECK10-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 8 5319 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 5320 // CHECK10-NEXT: ret void 5321 // 5322 // 5323 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5 5324 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5325 // CHECK10-NEXT: entry: 5326 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5327 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5328 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 5329 // CHECK10-NEXT: [[B:%.*]] = alloca i32, align 4 5330 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5331 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5332 // CHECK10-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 5333 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 5334 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 5335 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 8 5336 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 5337 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 5338 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 5339 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 5340 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 5341 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 5342 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8 5343 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 5344 // CHECK10-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 8 5345 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 5346 // CHECK10-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 5347 // CHECK10-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 5348 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 5349 // CHECK10-NEXT: store double [[ADD]], double* [[A]], align 8 5350 // CHECK10-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 5351 // CHECK10-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 8 5352 // CHECK10-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 5353 // CHECK10-NEXT: store double [[INC]], double* [[A1]], align 8 5354 // CHECK10-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 5355 // CHECK10-NEXT: [[TMP13:%.*]] = mul nsw i64 1, [[TMP8]] 5356 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i64 [[TMP13]] 5357 // CHECK10-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 5358 // CHECK10-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 5359 // CHECK10-NEXT: ret void 5360 // 5361 // 5362 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 5363 // CHECK10-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 5364 // CHECK10-NEXT: entry: 5365 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 5366 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 5367 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 5368 // CHECK10-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 5369 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 5370 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 5371 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 5372 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 5373 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 5374 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 5375 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5376 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 5377 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 5378 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5379 // CHECK10-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 5380 // CHECK10-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 5381 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 5382 // CHECK10-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 8 5383 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 5384 // CHECK10-NEXT: ret void 5385 // 5386 // 5387 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6 5388 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5389 // CHECK10-NEXT: entry: 5390 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5391 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5392 // CHECK10-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 5393 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 5394 // CHECK10-NEXT: [[AA:%.*]] = alloca i16, align 2 5395 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5396 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5397 // CHECK10-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 5398 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 5399 // CHECK10-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 5400 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 5401 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 5402 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 5403 // CHECK10-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 5404 // CHECK10-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 5405 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 5406 // CHECK10-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 8 5407 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 5408 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 5409 // CHECK10-NEXT: store i32 [[ADD]], i32* [[A]], align 4 5410 // CHECK10-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 5411 // CHECK10-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 5412 // CHECK10-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 5413 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 5414 // CHECK10-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 5415 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i64 0, i64 2 5416 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 5417 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 5418 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 5419 // CHECK10-NEXT: ret void 5420 // 5421 // 5422 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 5423 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 5424 // CHECK11-NEXT: entry: 5425 // CHECK11-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 5426 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 5427 // CHECK11-NEXT: ret void 5428 // 5429 // 5430 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 5431 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5432 // CHECK11-NEXT: entry: 5433 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5434 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5435 // CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 5436 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5437 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5438 // CHECK11-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 5439 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 5440 // CHECK11-NEXT: ret void 5441 // 5442 // 5443 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 5444 // CHECK11-SAME: (i32 [[AA:%.*]]) #[[ATTR0]] { 5445 // CHECK11-NEXT: entry: 5446 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5447 // CHECK11-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 2 5448 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5449 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5450 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5451 // CHECK11-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 4 5452 // CHECK11-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 5453 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 5454 // CHECK11-NEXT: ret void 5455 // 5456 // 5457 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 5458 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5459 // CHECK11-NEXT: entry: 5460 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5461 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5462 // CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 4 5463 // CHECK11-NEXT: [[AA:%.*]] = alloca i16, align 2 5464 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5465 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5466 // CHECK11-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 4 5467 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 4 5468 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 5469 // CHECK11-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 5470 // CHECK11-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 5471 // CHECK11-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 5472 // CHECK11-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 5473 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 5474 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 5475 // CHECK11-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 5476 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5477 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 5478 // CHECK11-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 5479 // CHECK11-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 5480 // CHECK11-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 5481 // CHECK11: .cancel.exit: 5482 // CHECK11-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 5483 // CHECK11-NEXT: br label [[DOTCANCEL_CONTINUE]] 5484 // CHECK11: .cancel.continue: 5485 // CHECK11-NEXT: ret void 5486 // 5487 // 5488 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 5489 // CHECK11-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] { 5490 // CHECK11-NEXT: entry: 5491 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5492 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5493 // CHECK11-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 5494 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5495 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5496 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5497 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5498 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 5499 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 5500 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5501 // CHECK11-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4 5502 // CHECK11-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 5503 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 5504 // CHECK11-NEXT: ret void 5505 // 5506 // 5507 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 5508 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5509 // CHECK11-NEXT: entry: 5510 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5511 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5512 // CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 5513 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4 5514 // CHECK11-NEXT: [[AA:%.*]] = alloca i16, align 2 5515 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5516 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5517 // CHECK11-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 5518 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 5519 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 5520 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5521 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 5522 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 5523 // CHECK11-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 5524 // CHECK11-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 5525 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 5526 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 5527 // CHECK11-NEXT: store i32 [[ADD]], i32* [[A]], align 4 5528 // CHECK11-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 5529 // CHECK11-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 5530 // CHECK11-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 5531 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 5532 // CHECK11-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 5533 // CHECK11-NEXT: ret void 5534 // 5535 // 5536 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 5537 // CHECK11-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]]) #[[ATTR0]] { 5538 // CHECK11-NEXT: entry: 5539 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5540 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 5541 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 5542 // CHECK11-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 5543 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 5544 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 5545 // CHECK11-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 5546 // CHECK11-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 5547 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 5548 // CHECK11-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 4 5549 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5550 // CHECK11-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 5551 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 5552 // CHECK11-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 5553 // CHECK11-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 5554 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 5555 // CHECK11-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 5556 // CHECK11-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 5557 // CHECK11-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 5558 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 5559 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 5560 // CHECK11-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 5561 // CHECK11-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 5562 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 5563 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 5564 // CHECK11-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 5565 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 5566 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5567 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 5568 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 5569 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5570 // CHECK11-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 4 5571 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 5572 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP11]], align 4 5573 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 5574 // CHECK11-NEXT: store float* [[TMP2]], float** [[TMP12]], align 4 5575 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 5576 // CHECK11-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 4 5577 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 5578 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4 5579 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 5580 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 5581 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 5582 // CHECK11-NEXT: store double* [[TMP6]], double** [[TMP16]], align 4 5583 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 5584 // CHECK11-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 4 5585 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 5586 // CHECK11-NEXT: ret void 5587 // 5588 // 5589 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 5590 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5591 // CHECK11-NEXT: entry: 5592 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5593 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5594 // CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 4 5595 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4 5596 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5597 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5598 // CHECK11-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 4 5599 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 4 5600 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 5601 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5602 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 5603 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 5604 // CHECK11-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 4 5605 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 2 5606 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 5607 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 3 5608 // CHECK11-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 4 5609 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 4 5610 // CHECK11-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 4 5611 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 5 5612 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 5613 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 6 5614 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 5615 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 7 5616 // CHECK11-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 4 5617 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 8 5618 // CHECK11-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 4 5619 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 5620 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 5621 // CHECK11-NEXT: store i32 [[ADD]], i32* [[A]], align 4 5622 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i32 0, i32 2 5623 // CHECK11-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 5624 // CHECK11-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 5625 // CHECK11-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 5626 // CHECK11-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 5627 // CHECK11-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 5628 // CHECK11-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i32 3 5629 // CHECK11-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 5630 // CHECK11-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 5631 // CHECK11-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 5632 // CHECK11-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 5633 // CHECK11-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 5634 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i32 0, i32 1 5635 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i32 0, i32 2 5636 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 5637 // CHECK11-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 5638 // CHECK11-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 5639 // CHECK11-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP14]] 5640 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i32 [[TMP23]] 5641 // CHECK11-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i32 3 5642 // CHECK11-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 5643 // CHECK11-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 5644 // CHECK11-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 5645 // CHECK11-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 5646 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4 5647 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 5648 // CHECK11-NEXT: store i64 [[ADD13]], i64* [[X]], align 4 5649 // CHECK11-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 5650 // CHECK11-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4 5651 // CHECK11-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 5652 // CHECK11-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 5653 // CHECK11-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 5654 // CHECK11-NEXT: store i8 [[CONV16]], i8* [[Y]], align 4 5655 // CHECK11-NEXT: ret void 5656 // 5657 // 5658 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 5659 // CHECK11-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 5660 // CHECK11-NEXT: entry: 5661 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5662 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5663 // CHECK11-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 5664 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 5665 // CHECK11-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 5666 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5667 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5668 // CHECK11-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 5669 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 5670 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5671 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 5672 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 5673 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5674 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 5675 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 5676 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5677 // CHECK11-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 5678 // CHECK11-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 5679 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 5680 // CHECK11-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV1]], align 4 5681 // CHECK11-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 5682 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 5683 // CHECK11-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 4 5684 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 5685 // CHECK11-NEXT: ret void 5686 // 5687 // 5688 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 5689 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5690 // CHECK11-NEXT: entry: 5691 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5692 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5693 // CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 4 5694 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4 5695 // CHECK11-NEXT: [[AA:%.*]] = alloca i16, align 2 5696 // CHECK11-NEXT: [[AAA:%.*]] = alloca i8, align 1 5697 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5698 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5699 // CHECK11-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 4 5700 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 4 5701 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 5702 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5703 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 5704 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 5705 // CHECK11-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 5706 // CHECK11-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 5707 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 5708 // CHECK11-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 5709 // CHECK11-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 5710 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 5711 // CHECK11-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 4 5712 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 5713 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 5714 // CHECK11-NEXT: store i32 [[ADD]], i32* [[A]], align 4 5715 // CHECK11-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 5716 // CHECK11-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 5717 // CHECK11-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 5718 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 5719 // CHECK11-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 5720 // CHECK11-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 5721 // CHECK11-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 5722 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 5723 // CHECK11-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 5724 // CHECK11-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 5725 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i32 0, i32 2 5726 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 5727 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 5728 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 5729 // CHECK11-NEXT: ret void 5730 // 5731 // 5732 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 5733 // CHECK11-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 5734 // CHECK11-NEXT: entry: 5735 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 5736 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 5737 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 5738 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 5739 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 5740 // CHECK11-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 4 5741 // CHECK11-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 5742 // CHECK11-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 5743 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 5744 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 5745 // CHECK11-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 5746 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 5747 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 5748 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 5749 // CHECK11-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 5750 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5751 // CHECK11-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 4 5752 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5753 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[B_ADDR]], align 4 5754 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 5755 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 5756 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 5757 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 5758 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 5759 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 5760 // CHECK11-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 4 5761 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 5762 // CHECK11-NEXT: ret void 5763 // 5764 // 5765 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5 5766 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5767 // CHECK11-NEXT: entry: 5768 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5769 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5770 // CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 4 5771 // CHECK11-NEXT: [[B:%.*]] = alloca i32, align 4 5772 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5773 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5774 // CHECK11-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 4 5775 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 4 5776 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 5777 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 4 5778 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 5779 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5780 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 5781 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 5782 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 5783 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 5784 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 5785 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 5786 // CHECK11-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 4 5787 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 5788 // CHECK11-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 5789 // CHECK11-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 5790 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 5791 // CHECK11-NEXT: store double [[ADD]], double* [[A]], align 4 5792 // CHECK11-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 5793 // CHECK11-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 4 5794 // CHECK11-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 5795 // CHECK11-NEXT: store double [[INC]], double* [[A1]], align 4 5796 // CHECK11-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 5797 // CHECK11-NEXT: [[TMP13:%.*]] = mul nsw i32 1, [[TMP8]] 5798 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i32 [[TMP13]] 5799 // CHECK11-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 5800 // CHECK11-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 5801 // CHECK11-NEXT: ret void 5802 // 5803 // 5804 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 5805 // CHECK11-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 5806 // CHECK11-NEXT: entry: 5807 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5808 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5809 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 5810 // CHECK11-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 4 5811 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5812 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5813 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 5814 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5815 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 5816 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5817 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 5818 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 5819 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5820 // CHECK11-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 5821 // CHECK11-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 5822 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 5823 // CHECK11-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 4 5824 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 5825 // CHECK11-NEXT: ret void 5826 // 5827 // 5828 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6 5829 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5830 // CHECK11-NEXT: entry: 5831 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5832 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5833 // CHECK11-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 4 5834 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4 5835 // CHECK11-NEXT: [[AA:%.*]] = alloca i16, align 2 5836 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5837 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5838 // CHECK11-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 4 5839 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 4 5840 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 5841 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5842 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 5843 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 5844 // CHECK11-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 5845 // CHECK11-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 5846 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 5847 // CHECK11-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 4 5848 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 5849 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 5850 // CHECK11-NEXT: store i32 [[ADD]], i32* [[A]], align 4 5851 // CHECK11-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 5852 // CHECK11-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 5853 // CHECK11-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 5854 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 5855 // CHECK11-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 5856 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i32 0, i32 2 5857 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 5858 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 5859 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 5860 // CHECK11-NEXT: ret void 5861 // 5862 // 5863 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 5864 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 5865 // CHECK12-NEXT: entry: 5866 // CHECK12-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 5867 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 5868 // CHECK12-NEXT: ret void 5869 // 5870 // 5871 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 5872 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5873 // CHECK12-NEXT: entry: 5874 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5875 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5876 // CHECK12-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 5877 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5878 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5879 // CHECK12-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 5880 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 5881 // CHECK12-NEXT: ret void 5882 // 5883 // 5884 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 5885 // CHECK12-SAME: (i32 [[AA:%.*]]) #[[ATTR0]] { 5886 // CHECK12-NEXT: entry: 5887 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5888 // CHECK12-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 2 5889 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5890 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5891 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5892 // CHECK12-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 4 5893 // CHECK12-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 5894 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 5895 // CHECK12-NEXT: ret void 5896 // 5897 // 5898 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 5899 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5900 // CHECK12-NEXT: entry: 5901 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5902 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5903 // CHECK12-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 4 5904 // CHECK12-NEXT: [[AA:%.*]] = alloca i16, align 2 5905 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5906 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5907 // CHECK12-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 4 5908 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 4 5909 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 5910 // CHECK12-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 5911 // CHECK12-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 5912 // CHECK12-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 5913 // CHECK12-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 5914 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 5915 // CHECK12-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 5916 // CHECK12-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 5917 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5918 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 5919 // CHECK12-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 5920 // CHECK12-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 5921 // CHECK12-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 5922 // CHECK12: .cancel.exit: 5923 // CHECK12-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 5924 // CHECK12-NEXT: br label [[DOTCANCEL_CONTINUE]] 5925 // CHECK12: .cancel.continue: 5926 // CHECK12-NEXT: ret void 5927 // 5928 // 5929 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 5930 // CHECK12-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] { 5931 // CHECK12-NEXT: entry: 5932 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5933 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 5934 // CHECK12-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 5935 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5936 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 5937 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 5938 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 5939 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 5940 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 5941 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 5942 // CHECK12-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4 5943 // CHECK12-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 5944 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 5945 // CHECK12-NEXT: ret void 5946 // 5947 // 5948 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 5949 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 5950 // CHECK12-NEXT: entry: 5951 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5952 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5953 // CHECK12-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 5954 // CHECK12-NEXT: [[A:%.*]] = alloca i32, align 4 5955 // CHECK12-NEXT: [[AA:%.*]] = alloca i16, align 2 5956 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5957 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5958 // CHECK12-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 5959 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 5960 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 5961 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5962 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 5963 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 5964 // CHECK12-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 5965 // CHECK12-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 5966 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 5967 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 5968 // CHECK12-NEXT: store i32 [[ADD]], i32* [[A]], align 4 5969 // CHECK12-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 5970 // CHECK12-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 5971 // CHECK12-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 5972 // CHECK12-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 5973 // CHECK12-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 5974 // CHECK12-NEXT: ret void 5975 // 5976 // 5977 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 5978 // CHECK12-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]]) #[[ATTR0]] { 5979 // CHECK12-NEXT: entry: 5980 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5981 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 5982 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 5983 // CHECK12-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 5984 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 5985 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 5986 // CHECK12-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 5987 // CHECK12-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 5988 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 5989 // CHECK12-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 4 5990 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5991 // CHECK12-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 5992 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 5993 // CHECK12-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 5994 // CHECK12-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 5995 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 5996 // CHECK12-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 5997 // CHECK12-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 5998 // CHECK12-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 5999 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 6000 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6001 // CHECK12-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 6002 // CHECK12-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 6003 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 6004 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 6005 // CHECK12-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 6006 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 6007 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 6008 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 6009 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 6010 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 6011 // CHECK12-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 4 6012 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 6013 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP11]], align 4 6014 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 6015 // CHECK12-NEXT: store float* [[TMP2]], float** [[TMP12]], align 4 6016 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 6017 // CHECK12-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 4 6018 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 6019 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4 6020 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 6021 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 6022 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 6023 // CHECK12-NEXT: store double* [[TMP6]], double** [[TMP16]], align 4 6024 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 6025 // CHECK12-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 4 6026 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 6027 // CHECK12-NEXT: ret void 6028 // 6029 // 6030 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 6031 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 6032 // CHECK12-NEXT: entry: 6033 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6034 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6035 // CHECK12-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 4 6036 // CHECK12-NEXT: [[A:%.*]] = alloca i32, align 4 6037 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6038 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6039 // CHECK12-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 4 6040 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 4 6041 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 6042 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6043 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 6044 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 6045 // CHECK12-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 4 6046 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 2 6047 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 6048 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 3 6049 // CHECK12-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 4 6050 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 4 6051 // CHECK12-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 4 6052 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 5 6053 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 6054 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 6 6055 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 6056 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 7 6057 // CHECK12-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 4 6058 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 8 6059 // CHECK12-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 4 6060 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 6061 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 6062 // CHECK12-NEXT: store i32 [[ADD]], i32* [[A]], align 4 6063 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i32 0, i32 2 6064 // CHECK12-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 6065 // CHECK12-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 6066 // CHECK12-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 6067 // CHECK12-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 6068 // CHECK12-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 6069 // CHECK12-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i32 3 6070 // CHECK12-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 6071 // CHECK12-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 6072 // CHECK12-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 6073 // CHECK12-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 6074 // CHECK12-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 6075 // CHECK12-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i32 0, i32 1 6076 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i32 0, i32 2 6077 // CHECK12-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 6078 // CHECK12-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 6079 // CHECK12-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 6080 // CHECK12-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP14]] 6081 // CHECK12-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i32 [[TMP23]] 6082 // CHECK12-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i32 3 6083 // CHECK12-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 6084 // CHECK12-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 6085 // CHECK12-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 6086 // CHECK12-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 6087 // CHECK12-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4 6088 // CHECK12-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 6089 // CHECK12-NEXT: store i64 [[ADD13]], i64* [[X]], align 4 6090 // CHECK12-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 6091 // CHECK12-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4 6092 // CHECK12-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 6093 // CHECK12-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 6094 // CHECK12-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 6095 // CHECK12-NEXT: store i8 [[CONV16]], i8* [[Y]], align 4 6096 // CHECK12-NEXT: ret void 6097 // 6098 // 6099 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 6100 // CHECK12-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 6101 // CHECK12-NEXT: entry: 6102 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6103 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 6104 // CHECK12-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 6105 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 6106 // CHECK12-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 6107 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6108 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 6109 // CHECK12-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 6110 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 6111 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 6112 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 6113 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 6114 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 6115 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 6116 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 6117 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 6118 // CHECK12-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 6119 // CHECK12-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 6120 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 6121 // CHECK12-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV1]], align 4 6122 // CHECK12-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 6123 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 6124 // CHECK12-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 4 6125 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 6126 // CHECK12-NEXT: ret void 6127 // 6128 // 6129 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..4 6130 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 6131 // CHECK12-NEXT: entry: 6132 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6133 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6134 // CHECK12-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 4 6135 // CHECK12-NEXT: [[A:%.*]] = alloca i32, align 4 6136 // CHECK12-NEXT: [[AA:%.*]] = alloca i16, align 2 6137 // CHECK12-NEXT: [[AAA:%.*]] = alloca i8, align 1 6138 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6139 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6140 // CHECK12-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 4 6141 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 4 6142 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 6143 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6144 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 6145 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 6146 // CHECK12-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 6147 // CHECK12-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 6148 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 6149 // CHECK12-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 6150 // CHECK12-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 6151 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 6152 // CHECK12-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 4 6153 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 6154 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 6155 // CHECK12-NEXT: store i32 [[ADD]], i32* [[A]], align 4 6156 // CHECK12-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 6157 // CHECK12-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 6158 // CHECK12-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 6159 // CHECK12-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 6160 // CHECK12-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 6161 // CHECK12-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 6162 // CHECK12-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 6163 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 6164 // CHECK12-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 6165 // CHECK12-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 6166 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i32 0, i32 2 6167 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 6168 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 6169 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 6170 // CHECK12-NEXT: ret void 6171 // 6172 // 6173 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 6174 // CHECK12-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 6175 // CHECK12-NEXT: entry: 6176 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 6177 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 6178 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6179 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 6180 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 6181 // CHECK12-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 4 6182 // CHECK12-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 6183 // CHECK12-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 6184 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6185 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 6186 // CHECK12-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 6187 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 6188 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6189 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 6190 // CHECK12-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 6191 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 6192 // CHECK12-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 4 6193 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 6194 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[B_ADDR]], align 4 6195 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 6196 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 6197 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 6198 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 6199 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 6200 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 6201 // CHECK12-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 4 6202 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 6203 // CHECK12-NEXT: ret void 6204 // 6205 // 6206 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..5 6207 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 6208 // CHECK12-NEXT: entry: 6209 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6210 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6211 // CHECK12-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 4 6212 // CHECK12-NEXT: [[B:%.*]] = alloca i32, align 4 6213 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6214 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6215 // CHECK12-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 4 6216 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 4 6217 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 6218 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 4 6219 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 6220 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 6221 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 6222 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 6223 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 6224 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 6225 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 6226 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 6227 // CHECK12-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 4 6228 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 6229 // CHECK12-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 6230 // CHECK12-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 6231 // CHECK12-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 6232 // CHECK12-NEXT: store double [[ADD]], double* [[A]], align 4 6233 // CHECK12-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 6234 // CHECK12-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 4 6235 // CHECK12-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 6236 // CHECK12-NEXT: store double [[INC]], double* [[A1]], align 4 6237 // CHECK12-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 6238 // CHECK12-NEXT: [[TMP13:%.*]] = mul nsw i32 1, [[TMP8]] 6239 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i32 [[TMP13]] 6240 // CHECK12-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 6241 // CHECK12-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 6242 // CHECK12-NEXT: ret void 6243 // 6244 // 6245 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 6246 // CHECK12-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 6247 // CHECK12-NEXT: entry: 6248 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6249 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 6250 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 6251 // CHECK12-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 4 6252 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6253 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 6254 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 6255 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 6256 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 6257 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 6258 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 6259 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 6260 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 6261 // CHECK12-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 6262 // CHECK12-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 6263 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 6264 // CHECK12-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 4 6265 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 6266 // CHECK12-NEXT: ret void 6267 // 6268 // 6269 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..6 6270 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 6271 // CHECK12-NEXT: entry: 6272 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6273 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6274 // CHECK12-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 4 6275 // CHECK12-NEXT: [[A:%.*]] = alloca i32, align 4 6276 // CHECK12-NEXT: [[AA:%.*]] = alloca i16, align 2 6277 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6278 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6279 // CHECK12-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 4 6280 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 4 6281 // CHECK12-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 6282 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6283 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 6284 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 6285 // CHECK12-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 6286 // CHECK12-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 6287 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 6288 // CHECK12-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 4 6289 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 6290 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 6291 // CHECK12-NEXT: store i32 [[ADD]], i32* [[A]], align 4 6292 // CHECK12-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 6293 // CHECK12-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 6294 // CHECK12-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 6295 // CHECK12-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 6296 // CHECK12-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 6297 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i32 0, i32 2 6298 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 6299 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 6300 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 6301 // CHECK12-NEXT: ret void 6302 // 6303 // 6304 // CHECK17-LABEL: define {{[^@]+}}@_Z3fooi 6305 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 6306 // CHECK17-NEXT: entry: 6307 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6308 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 6309 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2 6310 // CHECK17-NEXT: [[B:%.*]] = alloca [10 x float], align 4 6311 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 6312 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 6313 // CHECK17-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 6314 // CHECK17-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 6315 // CHECK17-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8 6316 // CHECK17-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 6317 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 6318 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 6319 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 6320 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 6321 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 6322 // CHECK17-NEXT: [[A_CASTED3:%.*]] = alloca i64, align 8 6323 // CHECK17-NEXT: [[AA_CASTED5:%.*]] = alloca i64, align 8 6324 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 6325 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 6326 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 6327 // CHECK17-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8 6328 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [9 x i8*], align 8 6329 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [9 x i8*], align 8 6330 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [9 x i8*], align 8 6331 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [9 x i64], align 8 6332 // CHECK17-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 6333 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6334 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4 6335 // CHECK17-NEXT: store i16 0, i16* [[AA]], align 2 6336 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 6337 // CHECK17-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 6338 // CHECK17-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 6339 // CHECK17-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 6340 // CHECK17-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4 6341 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 6342 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 6343 // CHECK17-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 6344 // CHECK17-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]] 6345 // CHECK17-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8 6346 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 6347 // CHECK17-NEXT: [[TMP7:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1, i64 40, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 6348 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.kmp_task_t_with_privates* 6349 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP8]], i32 0, i32 0 6350 // CHECK17-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* [[TMP7]]) 6351 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[A]], align 4 6352 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 6353 // CHECK17-NEXT: store i32 [[TMP11]], i32* [[CONV]], align 4 6354 // CHECK17-NEXT: [[TMP12:%.*]] = load i64, i64* [[A_CASTED]], align 8 6355 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104(i64 [[TMP12]]) #[[ATTR3:[0-9]+]] 6356 // CHECK17-NEXT: [[TMP13:%.*]] = load i16, i16* [[AA]], align 2 6357 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 6358 // CHECK17-NEXT: store i16 [[TMP13]], i16* [[CONV2]], align 2 6359 // CHECK17-NEXT: [[TMP14:%.*]] = load i64, i64* [[AA_CASTED]], align 8 6360 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6361 // CHECK17-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 6362 // CHECK17-NEXT: store i64 [[TMP14]], i64* [[TMP16]], align 8 6363 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6364 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 6365 // CHECK17-NEXT: store i64 [[TMP14]], i64* [[TMP18]], align 8 6366 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 6367 // CHECK17-NEXT: store i8* null, i8** [[TMP19]], align 8 6368 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6369 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6370 // CHECK17-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110.region_id, i32 1, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 6371 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 6372 // CHECK17-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6373 // CHECK17: omp_offload.failed: 6374 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110(i64 [[TMP14]]) #[[ATTR3]] 6375 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 6376 // CHECK17: omp_offload.cont: 6377 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 6378 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[A_CASTED3]] to i32* 6379 // CHECK17-NEXT: store i32 [[TMP24]], i32* [[CONV4]], align 4 6380 // CHECK17-NEXT: [[TMP25:%.*]] = load i64, i64* [[A_CASTED3]], align 8 6381 // CHECK17-NEXT: [[TMP26:%.*]] = load i16, i16* [[AA]], align 2 6382 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED5]] to i16* 6383 // CHECK17-NEXT: store i16 [[TMP26]], i16* [[CONV6]], align 2 6384 // CHECK17-NEXT: [[TMP27:%.*]] = load i64, i64* [[AA_CASTED5]], align 8 6385 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[N_ADDR]], align 4 6386 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP28]], 10 6387 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 6388 // CHECK17: omp_if.then: 6389 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 6390 // CHECK17-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 6391 // CHECK17-NEXT: store i64 [[TMP25]], i64* [[TMP30]], align 8 6392 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 6393 // CHECK17-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 6394 // CHECK17-NEXT: store i64 [[TMP25]], i64* [[TMP32]], align 8 6395 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 6396 // CHECK17-NEXT: store i8* null, i8** [[TMP33]], align 8 6397 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 6398 // CHECK17-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i64* 6399 // CHECK17-NEXT: store i64 [[TMP27]], i64* [[TMP35]], align 8 6400 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 6401 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 6402 // CHECK17-NEXT: store i64 [[TMP27]], i64* [[TMP37]], align 8 6403 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 6404 // CHECK17-NEXT: store i8* null, i8** [[TMP38]], align 8 6405 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 6406 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 6407 // CHECK17-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119.region_id, i32 2, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 6408 // CHECK17-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 6409 // CHECK17-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED10:%.*]], label [[OMP_OFFLOAD_CONT11:%.*]] 6410 // CHECK17: omp_offload.failed10: 6411 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR3]] 6412 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT11]] 6413 // CHECK17: omp_offload.cont11: 6414 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]] 6415 // CHECK17: omp_if.else: 6416 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR3]] 6417 // CHECK17-NEXT: br label [[OMP_IF_END]] 6418 // CHECK17: omp_if.end: 6419 // CHECK17-NEXT: [[TMP43:%.*]] = load i32, i32* [[A]], align 4 6420 // CHECK17-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32* 6421 // CHECK17-NEXT: store i32 [[TMP43]], i32* [[CONV13]], align 4 6422 // CHECK17-NEXT: [[TMP44:%.*]] = load i64, i64* [[A_CASTED12]], align 8 6423 // CHECK17-NEXT: [[TMP45:%.*]] = load i32, i32* [[N_ADDR]], align 4 6424 // CHECK17-NEXT: [[CMP14:%.*]] = icmp sgt i32 [[TMP45]], 20 6425 // CHECK17-NEXT: br i1 [[CMP14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE21:%.*]] 6426 // CHECK17: omp_if.then15: 6427 // CHECK17-NEXT: [[TMP46:%.*]] = mul nuw i64 [[TMP2]], 4 6428 // CHECK17-NEXT: [[TMP47:%.*]] = mul nuw i64 5, [[TMP5]] 6429 // CHECK17-NEXT: [[TMP48:%.*]] = mul nuw i64 [[TMP47]], 8 6430 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 6431 // CHECK17-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i64* 6432 // CHECK17-NEXT: store i64 [[TMP44]], i64* [[TMP50]], align 8 6433 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 6434 // CHECK17-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i64* 6435 // CHECK17-NEXT: store i64 [[TMP44]], i64* [[TMP52]], align 8 6436 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 6437 // CHECK17-NEXT: store i64 4, i64* [[TMP53]], align 8 6438 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0 6439 // CHECK17-NEXT: store i8* null, i8** [[TMP54]], align 8 6440 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1 6441 // CHECK17-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to [10 x float]** 6442 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP56]], align 8 6443 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1 6444 // CHECK17-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to [10 x float]** 6445 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP58]], align 8 6446 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 6447 // CHECK17-NEXT: store i64 40, i64* [[TMP59]], align 8 6448 // CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1 6449 // CHECK17-NEXT: store i8* null, i8** [[TMP60]], align 8 6450 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 2 6451 // CHECK17-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64* 6452 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP62]], align 8 6453 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 2 6454 // CHECK17-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64* 6455 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP64]], align 8 6456 // CHECK17-NEXT: [[TMP65:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 6457 // CHECK17-NEXT: store i64 8, i64* [[TMP65]], align 8 6458 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 2 6459 // CHECK17-NEXT: store i8* null, i8** [[TMP66]], align 8 6460 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 3 6461 // CHECK17-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to float** 6462 // CHECK17-NEXT: store float* [[VLA]], float** [[TMP68]], align 8 6463 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 3 6464 // CHECK17-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to float** 6465 // CHECK17-NEXT: store float* [[VLA]], float** [[TMP70]], align 8 6466 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 6467 // CHECK17-NEXT: store i64 [[TMP46]], i64* [[TMP71]], align 8 6468 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 3 6469 // CHECK17-NEXT: store i8* null, i8** [[TMP72]], align 8 6470 // CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 4 6471 // CHECK17-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to [5 x [10 x double]]** 6472 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP74]], align 8 6473 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 4 6474 // CHECK17-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to [5 x [10 x double]]** 6475 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP76]], align 8 6476 // CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 6477 // CHECK17-NEXT: store i64 400, i64* [[TMP77]], align 8 6478 // CHECK17-NEXT: [[TMP78:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 4 6479 // CHECK17-NEXT: store i8* null, i8** [[TMP78]], align 8 6480 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 5 6481 // CHECK17-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64* 6482 // CHECK17-NEXT: store i64 5, i64* [[TMP80]], align 8 6483 // CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 5 6484 // CHECK17-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i64* 6485 // CHECK17-NEXT: store i64 5, i64* [[TMP82]], align 8 6486 // CHECK17-NEXT: [[TMP83:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5 6487 // CHECK17-NEXT: store i64 8, i64* [[TMP83]], align 8 6488 // CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 5 6489 // CHECK17-NEXT: store i8* null, i8** [[TMP84]], align 8 6490 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 6 6491 // CHECK17-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i64* 6492 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP86]], align 8 6493 // CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 6 6494 // CHECK17-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64* 6495 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP88]], align 8 6496 // CHECK17-NEXT: [[TMP89:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 6497 // CHECK17-NEXT: store i64 8, i64* [[TMP89]], align 8 6498 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 6 6499 // CHECK17-NEXT: store i8* null, i8** [[TMP90]], align 8 6500 // CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 7 6501 // CHECK17-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to double** 6502 // CHECK17-NEXT: store double* [[VLA1]], double** [[TMP92]], align 8 6503 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 7 6504 // CHECK17-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 6505 // CHECK17-NEXT: store double* [[VLA1]], double** [[TMP94]], align 8 6506 // CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 6507 // CHECK17-NEXT: store i64 [[TMP48]], i64* [[TMP95]], align 8 6508 // CHECK17-NEXT: [[TMP96:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 7 6509 // CHECK17-NEXT: store i8* null, i8** [[TMP96]], align 8 6510 // CHECK17-NEXT: [[TMP97:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 8 6511 // CHECK17-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to %struct.TT** 6512 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP98]], align 8 6513 // CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 8 6514 // CHECK17-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to %struct.TT** 6515 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP100]], align 8 6516 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8 6517 // CHECK17-NEXT: store i64 16, i64* [[TMP101]], align 8 6518 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 8 6519 // CHECK17-NEXT: store i8* null, i8** [[TMP102]], align 8 6520 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 6521 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 6522 // CHECK17-NEXT: [[TMP105:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 6523 // CHECK17-NEXT: [[TMP106:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144.region_id, i32 9, i8** [[TMP103]], i8** [[TMP104]], i64* [[TMP105]], i64* getelementptr inbounds ([9 x i64], [9 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 6524 // CHECK17-NEXT: [[TMP107:%.*]] = icmp ne i32 [[TMP106]], 0 6525 // CHECK17-NEXT: br i1 [[TMP107]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]] 6526 // CHECK17: omp_offload.failed19: 6527 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i64 [[TMP44]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 6528 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT20]] 6529 // CHECK17: omp_offload.cont20: 6530 // CHECK17-NEXT: br label [[OMP_IF_END22:%.*]] 6531 // CHECK17: omp_if.else21: 6532 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i64 [[TMP44]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 6533 // CHECK17-NEXT: br label [[OMP_IF_END22]] 6534 // CHECK17: omp_if.end22: 6535 // CHECK17-NEXT: [[TMP108:%.*]] = load i32, i32* [[A]], align 4 6536 // CHECK17-NEXT: [[TMP109:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 6537 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP109]]) 6538 // CHECK17-NEXT: ret i32 [[TMP108]] 6539 // 6540 // 6541 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 6542 // CHECK17-SAME: () #[[ATTR2:[0-9]+]] { 6543 // CHECK17-NEXT: entry: 6544 // CHECK17-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 6545 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 6546 // CHECK17-NEXT: ret void 6547 // 6548 // 6549 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 6550 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 6551 // CHECK17-NEXT: entry: 6552 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6553 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6554 // CHECK17-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 6555 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6556 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6557 // CHECK17-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 6558 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 6559 // CHECK17-NEXT: ret void 6560 // 6561 // 6562 // CHECK17-LABEL: define {{[^@]+}}@.omp_task_entry. 6563 // CHECK17-SAME: (i32 signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 6564 // CHECK17-NEXT: entry: 6565 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 6566 // CHECK17-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 6567 // CHECK17-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 6568 // CHECK17-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 6569 // CHECK17-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 6570 // CHECK17-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 6571 // CHECK17-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 6572 // CHECK17-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 6573 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 6574 // CHECK17-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 6575 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 6576 // CHECK17-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 6577 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 6578 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 6579 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 6580 // CHECK17-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 6581 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 6582 // CHECK17-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 6583 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 6584 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]]) 6585 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]]) 6586 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]]) 6587 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21 6588 // CHECK17-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21 6589 // CHECK17-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 6590 // CHECK17-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 6591 // CHECK17-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21 6592 // CHECK17-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 6593 // CHECK17-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 6594 // CHECK17-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0) #[[ATTR3]] 6595 // CHECK17-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 6596 // CHECK17-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 6597 // CHECK17: omp_offload.failed.i: 6598 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100() #[[ATTR3]] 6599 // CHECK17-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 6600 // CHECK17: .omp_outlined..1.exit: 6601 // CHECK17-NEXT: ret i32 0 6602 // 6603 // 6604 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104 6605 // CHECK17-SAME: (i64 [[A:%.*]]) #[[ATTR2]] { 6606 // CHECK17-NEXT: entry: 6607 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 6608 // CHECK17-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 6609 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 6610 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 6611 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 6612 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 6613 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 6614 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 6615 // CHECK17-NEXT: ret void 6616 // 6617 // 6618 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2 6619 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 6620 // CHECK17-NEXT: entry: 6621 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6622 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6623 // CHECK17-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 6624 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 6625 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6626 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6627 // CHECK17-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 6628 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 6629 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 6630 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6631 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 6632 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 6633 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1 6634 // CHECK17-NEXT: store i32 [[ADD]], i32* [[A]], align 4 6635 // CHECK17-NEXT: ret void 6636 // 6637 // 6638 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 6639 // CHECK17-SAME: (i64 [[AA:%.*]]) #[[ATTR2]] { 6640 // CHECK17-NEXT: entry: 6641 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 6642 // CHECK17-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 2 6643 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 6644 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 6645 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 6646 // CHECK17-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 8 6647 // CHECK17-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 6648 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 6649 // CHECK17-NEXT: ret void 6650 // 6651 // 6652 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3 6653 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 6654 // CHECK17-NEXT: entry: 6655 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6656 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6657 // CHECK17-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 6658 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2 6659 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6660 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6661 // CHECK17-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 6662 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 6663 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 6664 // CHECK17-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 6665 // CHECK17-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 6666 // CHECK17-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 6667 // CHECK17-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 6668 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 6669 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 6670 // CHECK17-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 6671 // CHECK17-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6672 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 6673 // CHECK17-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 6674 // CHECK17-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 6675 // CHECK17-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 6676 // CHECK17: .cancel.exit: 6677 // CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 6678 // CHECK17-NEXT: br label [[DOTCANCEL_CONTINUE]] 6679 // CHECK17: .cancel.continue: 6680 // CHECK17-NEXT: ret void 6681 // 6682 // 6683 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 6684 // CHECK17-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] { 6685 // CHECK17-NEXT: entry: 6686 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 6687 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 6688 // CHECK17-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 6689 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 6690 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 6691 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 6692 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 6693 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 6694 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 6695 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 6696 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 6697 // CHECK17-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8 6698 // CHECK17-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 6699 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 6700 // CHECK17-NEXT: ret void 6701 // 6702 // 6703 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..4 6704 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 6705 // CHECK17-NEXT: entry: 6706 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6707 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6708 // CHECK17-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 6709 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 6710 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2 6711 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6712 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6713 // CHECK17-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 6714 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 6715 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 6716 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6717 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 6718 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 6719 // CHECK17-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 6720 // CHECK17-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 6721 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 6722 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 6723 // CHECK17-NEXT: store i32 [[ADD]], i32* [[A]], align 4 6724 // CHECK17-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 6725 // CHECK17-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 6726 // CHECK17-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 6727 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 6728 // CHECK17-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 6729 // CHECK17-NEXT: ret void 6730 // 6731 // 6732 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 6733 // CHECK17-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]]) #[[ATTR2]] { 6734 // CHECK17-NEXT: entry: 6735 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 6736 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 6737 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 6738 // CHECK17-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 6739 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 6740 // CHECK17-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 6741 // CHECK17-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 6742 // CHECK17-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 6743 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 6744 // CHECK17-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 6745 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 6746 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 6747 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 6748 // CHECK17-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 6749 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 6750 // CHECK17-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 6751 // CHECK17-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 6752 // CHECK17-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 6753 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 6754 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 6755 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 6756 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 6757 // CHECK17-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 6758 // CHECK17-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 6759 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 6760 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 6761 // CHECK17-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 6762 // CHECK17-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 6763 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 6764 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 6765 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 8 6766 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 6767 // CHECK17-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 8 6768 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 6769 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8 6770 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 6771 // CHECK17-NEXT: store float* [[TMP2]], float** [[TMP12]], align 8 6772 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 6773 // CHECK17-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 8 6774 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 6775 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8 6776 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 6777 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP15]], align 8 6778 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 6779 // CHECK17-NEXT: store double* [[TMP6]], double** [[TMP16]], align 8 6780 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 6781 // CHECK17-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 8 6782 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 6783 // CHECK17-NEXT: ret void 6784 // 6785 // 6786 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..7 6787 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 6788 // CHECK17-NEXT: entry: 6789 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6790 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6791 // CHECK17-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 6792 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 6793 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6794 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6795 // CHECK17-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 6796 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 6797 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 6798 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 6799 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 6800 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 6801 // CHECK17-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 8 6802 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 6803 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 6804 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 6805 // CHECK17-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 8 6806 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 6807 // CHECK17-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 8 6808 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 5 6809 // CHECK17-NEXT: [[TMP12:%.*]] = load i64, i64* [[TMP11]], align 8 6810 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 6 6811 // CHECK17-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP13]], align 8 6812 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 7 6813 // CHECK17-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 8 6814 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 8 6815 // CHECK17-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 8 6816 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 6817 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 6818 // CHECK17-NEXT: store i32 [[ADD]], i32* [[A]], align 4 6819 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i64 0, i64 2 6820 // CHECK17-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 6821 // CHECK17-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 6822 // CHECK17-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 6823 // CHECK17-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 6824 // CHECK17-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 6825 // CHECK17-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i64 3 6826 // CHECK17-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 6827 // CHECK17-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 6828 // CHECK17-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 6829 // CHECK17-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 6830 // CHECK17-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 6831 // CHECK17-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i64 0, i64 1 6832 // CHECK17-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i64 0, i64 2 6833 // CHECK17-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 6834 // CHECK17-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 6835 // CHECK17-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 6836 // CHECK17-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP14]] 6837 // CHECK17-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 [[TMP23]] 6838 // CHECK17-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i64 3 6839 // CHECK17-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 6840 // CHECK17-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 6841 // CHECK17-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 6842 // CHECK17-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 6843 // CHECK17-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8 6844 // CHECK17-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 6845 // CHECK17-NEXT: store i64 [[ADD13]], i64* [[X]], align 8 6846 // CHECK17-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 6847 // CHECK17-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8 6848 // CHECK17-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 6849 // CHECK17-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 6850 // CHECK17-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 6851 // CHECK17-NEXT: store i8 [[CONV16]], i8* [[Y]], align 8 6852 // CHECK17-NEXT: ret void 6853 // 6854 // 6855 // CHECK17-LABEL: define {{[^@]+}}@_Z3bari 6856 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] { 6857 // CHECK17-NEXT: entry: 6858 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6859 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 6860 // CHECK17-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 6861 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6862 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4 6863 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 6864 // CHECK17-NEXT: [[CALL:%.*]] = call signext i32 @_Z3fooi(i32 signext [[TMP0]]) 6865 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 6866 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 6867 // CHECK17-NEXT: store i32 [[ADD]], i32* [[A]], align 4 6868 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 6869 // CHECK17-NEXT: [[CALL1:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP2]]) 6870 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 6871 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 6872 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 6873 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 6874 // CHECK17-NEXT: [[CALL3:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP4]]) 6875 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 6876 // CHECK17-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 6877 // CHECK17-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 6878 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 6879 // CHECK17-NEXT: [[CALL5:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP6]]) 6880 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 6881 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 6882 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 6883 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 6884 // CHECK17-NEXT: ret i32 [[TMP8]] 6885 // 6886 // 6887 // CHECK17-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 6888 // CHECK17-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 { 6889 // CHECK17-NEXT: entry: 6890 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 6891 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6892 // CHECK17-NEXT: [[B:%.*]] = alloca i32, align 4 6893 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 6894 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 6895 // CHECK17-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 6896 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 6897 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 6898 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 6899 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 6900 // CHECK17-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 6901 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6902 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 6903 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 6904 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 6905 // CHECK17-NEXT: store i32 [[ADD]], i32* [[B]], align 4 6906 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 6907 // CHECK17-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 6908 // CHECK17-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 6909 // CHECK17-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 6910 // CHECK17-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]] 6911 // CHECK17-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2 6912 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 6913 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 6914 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32* 6915 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4 6916 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8 6917 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4 6918 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60 6919 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 6920 // CHECK17: omp_if.then: 6921 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 6922 // CHECK17-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]] 6923 // CHECK17-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2 6924 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6925 // CHECK17-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1** 6926 // CHECK17-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 8 6927 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6928 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 6929 // CHECK17-NEXT: store double* [[A]], double** [[TMP13]], align 8 6930 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 6931 // CHECK17-NEXT: store i64 8, i64* [[TMP14]], align 8 6932 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 6933 // CHECK17-NEXT: store i8* null, i8** [[TMP15]], align 8 6934 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 6935 // CHECK17-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 6936 // CHECK17-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8 6937 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 6938 // CHECK17-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 6939 // CHECK17-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8 6940 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 6941 // CHECK17-NEXT: store i64 4, i64* [[TMP20]], align 8 6942 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 6943 // CHECK17-NEXT: store i8* null, i8** [[TMP21]], align 8 6944 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 6945 // CHECK17-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 6946 // CHECK17-NEXT: store i64 2, i64* [[TMP23]], align 8 6947 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 6948 // CHECK17-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 6949 // CHECK17-NEXT: store i64 2, i64* [[TMP25]], align 8 6950 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 6951 // CHECK17-NEXT: store i64 8, i64* [[TMP26]], align 8 6952 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 6953 // CHECK17-NEXT: store i8* null, i8** [[TMP27]], align 8 6954 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 6955 // CHECK17-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 6956 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8 6957 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 6958 // CHECK17-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 6959 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP31]], align 8 6960 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 6961 // CHECK17-NEXT: store i64 8, i64* [[TMP32]], align 8 6962 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 6963 // CHECK17-NEXT: store i8* null, i8** [[TMP33]], align 8 6964 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 6965 // CHECK17-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16** 6966 // CHECK17-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 8 6967 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 6968 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16** 6969 // CHECK17-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 8 6970 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 6971 // CHECK17-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 8 6972 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 6973 // CHECK17-NEXT: store i8* null, i8** [[TMP39]], align 8 6974 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6975 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6976 // CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 6977 // CHECK17-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 6978 // CHECK17-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 6979 // CHECK17-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6980 // CHECK17: omp_offload.failed: 6981 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 6982 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 6983 // CHECK17: omp_offload.cont: 6984 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]] 6985 // CHECK17: omp_if.else: 6986 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 6987 // CHECK17-NEXT: br label [[OMP_IF_END]] 6988 // CHECK17: omp_if.end: 6989 // CHECK17-NEXT: [[TMP45:%.*]] = mul nsw i64 1, [[TMP2]] 6990 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP45]] 6991 // CHECK17-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 6992 // CHECK17-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 6993 // CHECK17-NEXT: [[CONV3:%.*]] = sext i16 [[TMP46]] to i32 6994 // CHECK17-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4 6995 // CHECK17-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP47]] 6996 // CHECK17-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 6997 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP48]]) 6998 // CHECK17-NEXT: ret i32 [[ADD4]] 6999 // 7000 // 7001 // CHECK17-LABEL: define {{[^@]+}}@_ZL7fstatici 7002 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] { 7003 // CHECK17-NEXT: entry: 7004 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7005 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 7006 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2 7007 // CHECK17-NEXT: [[AAA:%.*]] = alloca i8, align 1 7008 // CHECK17-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 7009 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 7010 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 7011 // CHECK17-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 7012 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 7013 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 7014 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 7015 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7016 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4 7017 // CHECK17-NEXT: store i16 0, i16* [[AA]], align 2 7018 // CHECK17-NEXT: store i8 0, i8* [[AAA]], align 1 7019 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 7020 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 7021 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 7022 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 7023 // CHECK17-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 7024 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 7025 // CHECK17-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 7026 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 7027 // CHECK17-NEXT: [[TMP4:%.*]] = load i8, i8* [[AAA]], align 1 7028 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 7029 // CHECK17-NEXT: store i8 [[TMP4]], i8* [[CONV2]], align 1 7030 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 7031 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 7032 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 50 7033 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 7034 // CHECK17: omp_if.then: 7035 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7036 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 7037 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 7038 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7039 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 7040 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 7041 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7042 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8 7043 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 7044 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 7045 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 7046 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 7047 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 7048 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 7049 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 7050 // CHECK17-NEXT: store i8* null, i8** [[TMP16]], align 8 7051 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 7052 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 7053 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP18]], align 8 7054 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 7055 // CHECK17-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 7056 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8 7057 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 7058 // CHECK17-NEXT: store i8* null, i8** [[TMP21]], align 8 7059 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 7060 // CHECK17-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [10 x i32]** 7061 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP23]], align 8 7062 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 7063 // CHECK17-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [10 x i32]** 7064 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP25]], align 8 7065 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 7066 // CHECK17-NEXT: store i8* null, i8** [[TMP26]], align 8 7067 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7068 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7069 // CHECK17-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 7070 // CHECK17-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 7071 // CHECK17-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7072 // CHECK17: omp_offload.failed: 7073 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 7074 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 7075 // CHECK17: omp_offload.cont: 7076 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]] 7077 // CHECK17: omp_if.else: 7078 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 7079 // CHECK17-NEXT: br label [[OMP_IF_END]] 7080 // CHECK17: omp_if.end: 7081 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[A]], align 4 7082 // CHECK17-NEXT: ret i32 [[TMP31]] 7083 // 7084 // 7085 // CHECK17-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 7086 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat { 7087 // CHECK17-NEXT: entry: 7088 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7089 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 7090 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2 7091 // CHECK17-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 7092 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 7093 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 7094 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 7095 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 7096 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 7097 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7098 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4 7099 // CHECK17-NEXT: store i16 0, i16* [[AA]], align 2 7100 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 7101 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 7102 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 7103 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 7104 // CHECK17-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 7105 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 7106 // CHECK17-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 7107 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 7108 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 7109 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 7110 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 7111 // CHECK17: omp_if.then: 7112 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7113 // CHECK17-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 7114 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 7115 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7116 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 7117 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 7118 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7119 // CHECK17-NEXT: store i8* null, i8** [[TMP9]], align 8 7120 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 7121 // CHECK17-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 7122 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 7123 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 7124 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 7125 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 7126 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 7127 // CHECK17-NEXT: store i8* null, i8** [[TMP14]], align 8 7128 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 7129 // CHECK17-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 7130 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8 7131 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 7132 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 7133 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8 7134 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 7135 // CHECK17-NEXT: store i8* null, i8** [[TMP19]], align 8 7136 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7137 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7138 // CHECK17-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.15, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 7139 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 7140 // CHECK17-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7141 // CHECK17: omp_offload.failed: 7142 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 7143 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 7144 // CHECK17: omp_offload.cont: 7145 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]] 7146 // CHECK17: omp_if.else: 7147 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 7148 // CHECK17-NEXT: br label [[OMP_IF_END]] 7149 // CHECK17: omp_if.end: 7150 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 7151 // CHECK17-NEXT: ret i32 [[TMP24]] 7152 // 7153 // 7154 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 7155 // CHECK17-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 7156 // CHECK17-NEXT: entry: 7157 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 7158 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 7159 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7160 // CHECK17-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 7161 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 7162 // CHECK17-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 7163 // CHECK17-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 7164 // CHECK17-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 7165 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7166 // CHECK17-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 7167 // CHECK17-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 7168 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 7169 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 7170 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7171 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 7172 // CHECK17-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 7173 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 7174 // CHECK17-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 8 7175 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 7176 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 7177 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 7178 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 7179 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 7180 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 7181 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 7182 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 7183 // CHECK17-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 8 7184 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 7185 // CHECK17-NEXT: ret void 7186 // 7187 // 7188 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..9 7189 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 7190 // CHECK17-NEXT: entry: 7191 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7192 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7193 // CHECK17-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 7194 // CHECK17-NEXT: [[B:%.*]] = alloca i32, align 4 7195 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7196 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7197 // CHECK17-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 7198 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 7199 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 7200 // CHECK17-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 8 7201 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 7202 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 7203 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 7204 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 7205 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 7206 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 3 7207 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8 7208 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 4 7209 // CHECK17-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 8 7210 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 7211 // CHECK17-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 7212 // CHECK17-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 7213 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 7214 // CHECK17-NEXT: store double [[ADD]], double* [[A]], align 8 7215 // CHECK17-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 7216 // CHECK17-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 8 7217 // CHECK17-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 7218 // CHECK17-NEXT: store double [[INC]], double* [[A1]], align 8 7219 // CHECK17-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 7220 // CHECK17-NEXT: [[TMP13:%.*]] = mul nsw i64 1, [[TMP8]] 7221 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i64 [[TMP13]] 7222 // CHECK17-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 7223 // CHECK17-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 7224 // CHECK17-NEXT: ret void 7225 // 7226 // 7227 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 7228 // CHECK17-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 7229 // CHECK17-NEXT: entry: 7230 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7231 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7232 // CHECK17-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 7233 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 7234 // CHECK17-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 8 7235 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7236 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7237 // CHECK17-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 7238 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 7239 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7240 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7241 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 7242 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 7243 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 7244 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 7245 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 7246 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 7247 // CHECK17-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 7248 // CHECK17-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 7249 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 7250 // CHECK17-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV2]], align 8 7251 // CHECK17-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 7252 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 7253 // CHECK17-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 8 7254 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.6*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]]) 7255 // CHECK17-NEXT: ret void 7256 // 7257 // 7258 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11 7259 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.6* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 7260 // CHECK17-NEXT: entry: 7261 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7262 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7263 // CHECK17-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.6*, align 8 7264 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 7265 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2 7266 // CHECK17-NEXT: [[AAA:%.*]] = alloca i8, align 1 7267 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7268 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7269 // CHECK17-NEXT: store %struct.anon.6* [[__CONTEXT]], %struct.anon.6** [[__CONTEXT_ADDR]], align 8 7270 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.anon.6*, %struct.anon.6** [[__CONTEXT_ADDR]], align 8 7271 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6:%.*]], %struct.anon.6* [[TMP0]], i32 0, i32 0 7272 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 7273 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 7274 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 1 7275 // CHECK17-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 7276 // CHECK17-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 7277 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 2 7278 // CHECK17-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 7279 // CHECK17-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 7280 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 3 7281 // CHECK17-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 8 7282 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 7283 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 7284 // CHECK17-NEXT: store i32 [[ADD]], i32* [[A]], align 4 7285 // CHECK17-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 7286 // CHECK17-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 7287 // CHECK17-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 7288 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 7289 // CHECK17-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 7290 // CHECK17-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 7291 // CHECK17-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 7292 // CHECK17-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 7293 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 7294 // CHECK17-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 7295 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i64 0, i64 2 7296 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 7297 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 7298 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 7299 // CHECK17-NEXT: ret void 7300 // 7301 // 7302 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 7303 // CHECK17-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 7304 // CHECK17-NEXT: entry: 7305 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7306 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7307 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 7308 // CHECK17-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 8 7309 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7310 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7311 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 7312 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7313 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7314 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 7315 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 7316 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 7317 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 7318 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 7319 // CHECK17-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 7320 // CHECK17-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 7321 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 7322 // CHECK17-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 8 7323 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 7324 // CHECK17-NEXT: ret void 7325 // 7326 // 7327 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14 7328 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 7329 // CHECK17-NEXT: entry: 7330 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7331 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7332 // CHECK17-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 8 7333 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4 7334 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2 7335 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7336 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7337 // CHECK17-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 8 7338 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 8 7339 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 7340 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 7341 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 7342 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 7343 // CHECK17-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 7344 // CHECK17-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 7345 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 7346 // CHECK17-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 8 7347 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 7348 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 7349 // CHECK17-NEXT: store i32 [[ADD]], i32* [[A]], align 4 7350 // CHECK17-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 7351 // CHECK17-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 7352 // CHECK17-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 7353 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 7354 // CHECK17-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 7355 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i64 0, i64 2 7356 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 7357 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 7358 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 7359 // CHECK17-NEXT: ret void 7360 // 7361 // 7362 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 7363 // CHECK17-SAME: () #[[ATTR6:[0-9]+]] { 7364 // CHECK17-NEXT: entry: 7365 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 7366 // CHECK17-NEXT: ret void 7367 // 7368 // 7369 // CHECK18-LABEL: define {{[^@]+}}@_Z3fooi 7370 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 7371 // CHECK18-NEXT: entry: 7372 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7373 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 7374 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2 7375 // CHECK18-NEXT: [[B:%.*]] = alloca [10 x float], align 4 7376 // CHECK18-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 7377 // CHECK18-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 7378 // CHECK18-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 7379 // CHECK18-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 7380 // CHECK18-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8 7381 // CHECK18-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 7382 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 7383 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 7384 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 7385 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 7386 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 7387 // CHECK18-NEXT: [[A_CASTED3:%.*]] = alloca i64, align 8 7388 // CHECK18-NEXT: [[AA_CASTED5:%.*]] = alloca i64, align 8 7389 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 7390 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 7391 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 7392 // CHECK18-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8 7393 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [9 x i8*], align 8 7394 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [9 x i8*], align 8 7395 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [9 x i8*], align 8 7396 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [9 x i64], align 8 7397 // CHECK18-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 7398 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7399 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4 7400 // CHECK18-NEXT: store i16 0, i16* [[AA]], align 2 7401 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 7402 // CHECK18-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 7403 // CHECK18-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 7404 // CHECK18-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 7405 // CHECK18-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4 7406 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 7407 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 7408 // CHECK18-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64 7409 // CHECK18-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]] 7410 // CHECK18-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8 7411 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8 7412 // CHECK18-NEXT: [[TMP7:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1, i64 40, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 7413 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.kmp_task_t_with_privates* 7414 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP8]], i32 0, i32 0 7415 // CHECK18-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* [[TMP7]]) 7416 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[A]], align 4 7417 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 7418 // CHECK18-NEXT: store i32 [[TMP11]], i32* [[CONV]], align 4 7419 // CHECK18-NEXT: [[TMP12:%.*]] = load i64, i64* [[A_CASTED]], align 8 7420 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104(i64 [[TMP12]]) #[[ATTR3:[0-9]+]] 7421 // CHECK18-NEXT: [[TMP13:%.*]] = load i16, i16* [[AA]], align 2 7422 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 7423 // CHECK18-NEXT: store i16 [[TMP13]], i16* [[CONV2]], align 2 7424 // CHECK18-NEXT: [[TMP14:%.*]] = load i64, i64* [[AA_CASTED]], align 8 7425 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7426 // CHECK18-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 7427 // CHECK18-NEXT: store i64 [[TMP14]], i64* [[TMP16]], align 8 7428 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7429 // CHECK18-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 7430 // CHECK18-NEXT: store i64 [[TMP14]], i64* [[TMP18]], align 8 7431 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7432 // CHECK18-NEXT: store i8* null, i8** [[TMP19]], align 8 7433 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7434 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7435 // CHECK18-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110.region_id, i32 1, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 7436 // CHECK18-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 7437 // CHECK18-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7438 // CHECK18: omp_offload.failed: 7439 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110(i64 [[TMP14]]) #[[ATTR3]] 7440 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 7441 // CHECK18: omp_offload.cont: 7442 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 7443 // CHECK18-NEXT: [[CONV4:%.*]] = bitcast i64* [[A_CASTED3]] to i32* 7444 // CHECK18-NEXT: store i32 [[TMP24]], i32* [[CONV4]], align 4 7445 // CHECK18-NEXT: [[TMP25:%.*]] = load i64, i64* [[A_CASTED3]], align 8 7446 // CHECK18-NEXT: [[TMP26:%.*]] = load i16, i16* [[AA]], align 2 7447 // CHECK18-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED5]] to i16* 7448 // CHECK18-NEXT: store i16 [[TMP26]], i16* [[CONV6]], align 2 7449 // CHECK18-NEXT: [[TMP27:%.*]] = load i64, i64* [[AA_CASTED5]], align 8 7450 // CHECK18-NEXT: [[TMP28:%.*]] = load i32, i32* [[N_ADDR]], align 4 7451 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP28]], 10 7452 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 7453 // CHECK18: omp_if.then: 7454 // CHECK18-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 7455 // CHECK18-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 7456 // CHECK18-NEXT: store i64 [[TMP25]], i64* [[TMP30]], align 8 7457 // CHECK18-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 7458 // CHECK18-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 7459 // CHECK18-NEXT: store i64 [[TMP25]], i64* [[TMP32]], align 8 7460 // CHECK18-NEXT: [[TMP33:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 7461 // CHECK18-NEXT: store i8* null, i8** [[TMP33]], align 8 7462 // CHECK18-NEXT: [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 7463 // CHECK18-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i64* 7464 // CHECK18-NEXT: store i64 [[TMP27]], i64* [[TMP35]], align 8 7465 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 7466 // CHECK18-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 7467 // CHECK18-NEXT: store i64 [[TMP27]], i64* [[TMP37]], align 8 7468 // CHECK18-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 7469 // CHECK18-NEXT: store i8* null, i8** [[TMP38]], align 8 7470 // CHECK18-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 7471 // CHECK18-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 7472 // CHECK18-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119.region_id, i32 2, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 7473 // CHECK18-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 7474 // CHECK18-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED10:%.*]], label [[OMP_OFFLOAD_CONT11:%.*]] 7475 // CHECK18: omp_offload.failed10: 7476 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR3]] 7477 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT11]] 7478 // CHECK18: omp_offload.cont11: 7479 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]] 7480 // CHECK18: omp_if.else: 7481 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR3]] 7482 // CHECK18-NEXT: br label [[OMP_IF_END]] 7483 // CHECK18: omp_if.end: 7484 // CHECK18-NEXT: [[TMP43:%.*]] = load i32, i32* [[A]], align 4 7485 // CHECK18-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32* 7486 // CHECK18-NEXT: store i32 [[TMP43]], i32* [[CONV13]], align 4 7487 // CHECK18-NEXT: [[TMP44:%.*]] = load i64, i64* [[A_CASTED12]], align 8 7488 // CHECK18-NEXT: [[TMP45:%.*]] = load i32, i32* [[N_ADDR]], align 4 7489 // CHECK18-NEXT: [[CMP14:%.*]] = icmp sgt i32 [[TMP45]], 20 7490 // CHECK18-NEXT: br i1 [[CMP14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE21:%.*]] 7491 // CHECK18: omp_if.then15: 7492 // CHECK18-NEXT: [[TMP46:%.*]] = mul nuw i64 [[TMP2]], 4 7493 // CHECK18-NEXT: [[TMP47:%.*]] = mul nuw i64 5, [[TMP5]] 7494 // CHECK18-NEXT: [[TMP48:%.*]] = mul nuw i64 [[TMP47]], 8 7495 // CHECK18-NEXT: [[TMP49:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 7496 // CHECK18-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i64* 7497 // CHECK18-NEXT: store i64 [[TMP44]], i64* [[TMP50]], align 8 7498 // CHECK18-NEXT: [[TMP51:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 7499 // CHECK18-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i64* 7500 // CHECK18-NEXT: store i64 [[TMP44]], i64* [[TMP52]], align 8 7501 // CHECK18-NEXT: [[TMP53:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 7502 // CHECK18-NEXT: store i64 4, i64* [[TMP53]], align 8 7503 // CHECK18-NEXT: [[TMP54:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0 7504 // CHECK18-NEXT: store i8* null, i8** [[TMP54]], align 8 7505 // CHECK18-NEXT: [[TMP55:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1 7506 // CHECK18-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to [10 x float]** 7507 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP56]], align 8 7508 // CHECK18-NEXT: [[TMP57:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1 7509 // CHECK18-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to [10 x float]** 7510 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP58]], align 8 7511 // CHECK18-NEXT: [[TMP59:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 7512 // CHECK18-NEXT: store i64 40, i64* [[TMP59]], align 8 7513 // CHECK18-NEXT: [[TMP60:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1 7514 // CHECK18-NEXT: store i8* null, i8** [[TMP60]], align 8 7515 // CHECK18-NEXT: [[TMP61:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 2 7516 // CHECK18-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64* 7517 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP62]], align 8 7518 // CHECK18-NEXT: [[TMP63:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 2 7519 // CHECK18-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64* 7520 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP64]], align 8 7521 // CHECK18-NEXT: [[TMP65:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 7522 // CHECK18-NEXT: store i64 8, i64* [[TMP65]], align 8 7523 // CHECK18-NEXT: [[TMP66:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 2 7524 // CHECK18-NEXT: store i8* null, i8** [[TMP66]], align 8 7525 // CHECK18-NEXT: [[TMP67:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 3 7526 // CHECK18-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to float** 7527 // CHECK18-NEXT: store float* [[VLA]], float** [[TMP68]], align 8 7528 // CHECK18-NEXT: [[TMP69:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 3 7529 // CHECK18-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to float** 7530 // CHECK18-NEXT: store float* [[VLA]], float** [[TMP70]], align 8 7531 // CHECK18-NEXT: [[TMP71:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 7532 // CHECK18-NEXT: store i64 [[TMP46]], i64* [[TMP71]], align 8 7533 // CHECK18-NEXT: [[TMP72:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 3 7534 // CHECK18-NEXT: store i8* null, i8** [[TMP72]], align 8 7535 // CHECK18-NEXT: [[TMP73:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 4 7536 // CHECK18-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to [5 x [10 x double]]** 7537 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP74]], align 8 7538 // CHECK18-NEXT: [[TMP75:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 4 7539 // CHECK18-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to [5 x [10 x double]]** 7540 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP76]], align 8 7541 // CHECK18-NEXT: [[TMP77:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 7542 // CHECK18-NEXT: store i64 400, i64* [[TMP77]], align 8 7543 // CHECK18-NEXT: [[TMP78:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 4 7544 // CHECK18-NEXT: store i8* null, i8** [[TMP78]], align 8 7545 // CHECK18-NEXT: [[TMP79:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 5 7546 // CHECK18-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64* 7547 // CHECK18-NEXT: store i64 5, i64* [[TMP80]], align 8 7548 // CHECK18-NEXT: [[TMP81:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 5 7549 // CHECK18-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i64* 7550 // CHECK18-NEXT: store i64 5, i64* [[TMP82]], align 8 7551 // CHECK18-NEXT: [[TMP83:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5 7552 // CHECK18-NEXT: store i64 8, i64* [[TMP83]], align 8 7553 // CHECK18-NEXT: [[TMP84:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 5 7554 // CHECK18-NEXT: store i8* null, i8** [[TMP84]], align 8 7555 // CHECK18-NEXT: [[TMP85:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 6 7556 // CHECK18-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i64* 7557 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP86]], align 8 7558 // CHECK18-NEXT: [[TMP87:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 6 7559 // CHECK18-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64* 7560 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP88]], align 8 7561 // CHECK18-NEXT: [[TMP89:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 7562 // CHECK18-NEXT: store i64 8, i64* [[TMP89]], align 8 7563 // CHECK18-NEXT: [[TMP90:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 6 7564 // CHECK18-NEXT: store i8* null, i8** [[TMP90]], align 8 7565 // CHECK18-NEXT: [[TMP91:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 7 7566 // CHECK18-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to double** 7567 // CHECK18-NEXT: store double* [[VLA1]], double** [[TMP92]], align 8 7568 // CHECK18-NEXT: [[TMP93:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 7 7569 // CHECK18-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 7570 // CHECK18-NEXT: store double* [[VLA1]], double** [[TMP94]], align 8 7571 // CHECK18-NEXT: [[TMP95:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 7572 // CHECK18-NEXT: store i64 [[TMP48]], i64* [[TMP95]], align 8 7573 // CHECK18-NEXT: [[TMP96:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 7 7574 // CHECK18-NEXT: store i8* null, i8** [[TMP96]], align 8 7575 // CHECK18-NEXT: [[TMP97:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 8 7576 // CHECK18-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to %struct.TT** 7577 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP98]], align 8 7578 // CHECK18-NEXT: [[TMP99:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 8 7579 // CHECK18-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to %struct.TT** 7580 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP100]], align 8 7581 // CHECK18-NEXT: [[TMP101:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8 7582 // CHECK18-NEXT: store i64 16, i64* [[TMP101]], align 8 7583 // CHECK18-NEXT: [[TMP102:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 8 7584 // CHECK18-NEXT: store i8* null, i8** [[TMP102]], align 8 7585 // CHECK18-NEXT: [[TMP103:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0 7586 // CHECK18-NEXT: [[TMP104:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0 7587 // CHECK18-NEXT: [[TMP105:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 7588 // CHECK18-NEXT: [[TMP106:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144.region_id, i32 9, i8** [[TMP103]], i8** [[TMP104]], i64* [[TMP105]], i64* getelementptr inbounds ([9 x i64], [9 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 7589 // CHECK18-NEXT: [[TMP107:%.*]] = icmp ne i32 [[TMP106]], 0 7590 // CHECK18-NEXT: br i1 [[TMP107]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]] 7591 // CHECK18: omp_offload.failed19: 7592 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i64 [[TMP44]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 7593 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT20]] 7594 // CHECK18: omp_offload.cont20: 7595 // CHECK18-NEXT: br label [[OMP_IF_END22:%.*]] 7596 // CHECK18: omp_if.else21: 7597 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i64 [[TMP44]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 7598 // CHECK18-NEXT: br label [[OMP_IF_END22]] 7599 // CHECK18: omp_if.end22: 7600 // CHECK18-NEXT: [[TMP108:%.*]] = load i32, i32* [[A]], align 4 7601 // CHECK18-NEXT: [[TMP109:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 7602 // CHECK18-NEXT: call void @llvm.stackrestore(i8* [[TMP109]]) 7603 // CHECK18-NEXT: ret i32 [[TMP108]] 7604 // 7605 // 7606 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 7607 // CHECK18-SAME: () #[[ATTR2:[0-9]+]] { 7608 // CHECK18-NEXT: entry: 7609 // CHECK18-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 7610 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 7611 // CHECK18-NEXT: ret void 7612 // 7613 // 7614 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined. 7615 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 7616 // CHECK18-NEXT: entry: 7617 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7618 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7619 // CHECK18-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 7620 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7621 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7622 // CHECK18-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 7623 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 7624 // CHECK18-NEXT: ret void 7625 // 7626 // 7627 // CHECK18-LABEL: define {{[^@]+}}@.omp_task_entry. 7628 // CHECK18-SAME: (i32 signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 7629 // CHECK18-NEXT: entry: 7630 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 7631 // CHECK18-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 7632 // CHECK18-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 7633 // CHECK18-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 7634 // CHECK18-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 7635 // CHECK18-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 7636 // CHECK18-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 7637 // CHECK18-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 7638 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 7639 // CHECK18-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 7640 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 7641 // CHECK18-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 7642 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 7643 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 7644 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 7645 // CHECK18-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 7646 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 7647 // CHECK18-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 7648 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 7649 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]]) 7650 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]]) 7651 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]]) 7652 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21 7653 // CHECK18-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21 7654 // CHECK18-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21 7655 // CHECK18-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21 7656 // CHECK18-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21 7657 // CHECK18-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 7658 // CHECK18-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !21 7659 // CHECK18-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0) #[[ATTR3]] 7660 // CHECK18-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 7661 // CHECK18-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 7662 // CHECK18: omp_offload.failed.i: 7663 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100() #[[ATTR3]] 7664 // CHECK18-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 7665 // CHECK18: .omp_outlined..1.exit: 7666 // CHECK18-NEXT: ret i32 0 7667 // 7668 // 7669 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104 7670 // CHECK18-SAME: (i64 [[A:%.*]]) #[[ATTR2]] { 7671 // CHECK18-NEXT: entry: 7672 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7673 // CHECK18-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 7674 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7675 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7676 // CHECK18-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 7677 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 7678 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 7679 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 7680 // CHECK18-NEXT: ret void 7681 // 7682 // 7683 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..2 7684 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 7685 // CHECK18-NEXT: entry: 7686 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7687 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7688 // CHECK18-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 7689 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 7690 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7691 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7692 // CHECK18-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 7693 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 7694 // CHECK18-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 7695 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7696 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 7697 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 7698 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1 7699 // CHECK18-NEXT: store i32 [[ADD]], i32* [[A]], align 4 7700 // CHECK18-NEXT: ret void 7701 // 7702 // 7703 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 7704 // CHECK18-SAME: (i64 [[AA:%.*]]) #[[ATTR2]] { 7705 // CHECK18-NEXT: entry: 7706 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7707 // CHECK18-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 2 7708 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7709 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7710 // CHECK18-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 7711 // CHECK18-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 8 7712 // CHECK18-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 7713 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 7714 // CHECK18-NEXT: ret void 7715 // 7716 // 7717 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..3 7718 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 7719 // CHECK18-NEXT: entry: 7720 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7721 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7722 // CHECK18-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 7723 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2 7724 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7725 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7726 // CHECK18-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 7727 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 7728 // CHECK18-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 7729 // CHECK18-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 7730 // CHECK18-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 7731 // CHECK18-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 7732 // CHECK18-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 7733 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 7734 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 7735 // CHECK18-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 7736 // CHECK18-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7737 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 7738 // CHECK18-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 7739 // CHECK18-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 7740 // CHECK18-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 7741 // CHECK18: .cancel.exit: 7742 // CHECK18-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 7743 // CHECK18-NEXT: br label [[DOTCANCEL_CONTINUE]] 7744 // CHECK18: .cancel.continue: 7745 // CHECK18-NEXT: ret void 7746 // 7747 // 7748 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 7749 // CHECK18-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] { 7750 // CHECK18-NEXT: entry: 7751 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7752 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 7753 // CHECK18-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 7754 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7755 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 7756 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7757 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 7758 // CHECK18-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 7759 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 7760 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 7761 // CHECK18-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 7762 // CHECK18-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8 7763 // CHECK18-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 7764 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 7765 // CHECK18-NEXT: ret void 7766 // 7767 // 7768 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..4 7769 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 7770 // CHECK18-NEXT: entry: 7771 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7772 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7773 // CHECK18-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 7774 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 7775 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2 7776 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7777 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7778 // CHECK18-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 7779 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 7780 // CHECK18-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 7781 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7782 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 7783 // CHECK18-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 7784 // CHECK18-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 7785 // CHECK18-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 7786 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 7787 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 7788 // CHECK18-NEXT: store i32 [[ADD]], i32* [[A]], align 4 7789 // CHECK18-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 7790 // CHECK18-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 7791 // CHECK18-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 7792 // CHECK18-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 7793 // CHECK18-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 7794 // CHECK18-NEXT: ret void 7795 // 7796 // 7797 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 7798 // CHECK18-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]]) #[[ATTR2]] { 7799 // CHECK18-NEXT: entry: 7800 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 7801 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 7802 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7803 // CHECK18-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 7804 // CHECK18-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 7805 // CHECK18-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 7806 // CHECK18-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 7807 // CHECK18-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 7808 // CHECK18-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 7809 // CHECK18-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 7810 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 7811 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 7812 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7813 // CHECK18-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 7814 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 7815 // CHECK18-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 7816 // CHECK18-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 7817 // CHECK18-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 7818 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 7819 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 7820 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 7821 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7822 // CHECK18-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 7823 // CHECK18-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 7824 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 7825 // CHECK18-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 7826 // CHECK18-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 7827 // CHECK18-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 7828 // CHECK18-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 7829 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 7830 // CHECK18-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 8 7831 // CHECK18-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 7832 // CHECK18-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 8 7833 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 7834 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8 7835 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 7836 // CHECK18-NEXT: store float* [[TMP2]], float** [[TMP12]], align 8 7837 // CHECK18-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 7838 // CHECK18-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 8 7839 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 7840 // CHECK18-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8 7841 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 7842 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP15]], align 8 7843 // CHECK18-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 7844 // CHECK18-NEXT: store double* [[TMP6]], double** [[TMP16]], align 8 7845 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 7846 // CHECK18-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 8 7847 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 7848 // CHECK18-NEXT: ret void 7849 // 7850 // 7851 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..7 7852 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 7853 // CHECK18-NEXT: entry: 7854 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7855 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7856 // CHECK18-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 7857 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 7858 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7859 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7860 // CHECK18-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 7861 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 7862 // CHECK18-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 7863 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 7864 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 7865 // CHECK18-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 7866 // CHECK18-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 8 7867 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 7868 // CHECK18-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 7869 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 7870 // CHECK18-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 8 7871 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 7872 // CHECK18-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 8 7873 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 5 7874 // CHECK18-NEXT: [[TMP12:%.*]] = load i64, i64* [[TMP11]], align 8 7875 // CHECK18-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 6 7876 // CHECK18-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP13]], align 8 7877 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 7 7878 // CHECK18-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 8 7879 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 8 7880 // CHECK18-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 8 7881 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 7882 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 7883 // CHECK18-NEXT: store i32 [[ADD]], i32* [[A]], align 4 7884 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i64 0, i64 2 7885 // CHECK18-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 7886 // CHECK18-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 7887 // CHECK18-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 7888 // CHECK18-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 7889 // CHECK18-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 7890 // CHECK18-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i64 3 7891 // CHECK18-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 7892 // CHECK18-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 7893 // CHECK18-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 7894 // CHECK18-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 7895 // CHECK18-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 7896 // CHECK18-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i64 0, i64 1 7897 // CHECK18-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i64 0, i64 2 7898 // CHECK18-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 7899 // CHECK18-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 7900 // CHECK18-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 7901 // CHECK18-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP14]] 7902 // CHECK18-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 [[TMP23]] 7903 // CHECK18-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i64 3 7904 // CHECK18-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 7905 // CHECK18-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 7906 // CHECK18-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 7907 // CHECK18-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 7908 // CHECK18-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8 7909 // CHECK18-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 7910 // CHECK18-NEXT: store i64 [[ADD13]], i64* [[X]], align 8 7911 // CHECK18-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 7912 // CHECK18-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8 7913 // CHECK18-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 7914 // CHECK18-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 7915 // CHECK18-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 7916 // CHECK18-NEXT: store i8 [[CONV16]], i8* [[Y]], align 8 7917 // CHECK18-NEXT: ret void 7918 // 7919 // 7920 // CHECK18-LABEL: define {{[^@]+}}@_Z3bari 7921 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] { 7922 // CHECK18-NEXT: entry: 7923 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7924 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 7925 // CHECK18-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 7926 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7927 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4 7928 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 7929 // CHECK18-NEXT: [[CALL:%.*]] = call signext i32 @_Z3fooi(i32 signext [[TMP0]]) 7930 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 7931 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 7932 // CHECK18-NEXT: store i32 [[ADD]], i32* [[A]], align 4 7933 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 7934 // CHECK18-NEXT: [[CALL1:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP2]]) 7935 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 7936 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 7937 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 7938 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 7939 // CHECK18-NEXT: [[CALL3:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP4]]) 7940 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 7941 // CHECK18-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 7942 // CHECK18-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 7943 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 7944 // CHECK18-NEXT: [[CALL5:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP6]]) 7945 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 7946 // CHECK18-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 7947 // CHECK18-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 7948 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 7949 // CHECK18-NEXT: ret i32 [[TMP8]] 7950 // 7951 // 7952 // CHECK18-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 7953 // CHECK18-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 { 7954 // CHECK18-NEXT: entry: 7955 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 7956 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7957 // CHECK18-NEXT: [[B:%.*]] = alloca i32, align 4 7958 // CHECK18-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 7959 // CHECK18-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 7960 // CHECK18-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 7961 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 7962 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 7963 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 7964 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 7965 // CHECK18-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 7966 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7967 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 7968 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 7969 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 7970 // CHECK18-NEXT: store i32 [[ADD]], i32* [[B]], align 4 7971 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 7972 // CHECK18-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 7973 // CHECK18-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave() 7974 // CHECK18-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8 7975 // CHECK18-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]] 7976 // CHECK18-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2 7977 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8 7978 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 7979 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32* 7980 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4 7981 // CHECK18-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8 7982 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4 7983 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60 7984 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 7985 // CHECK18: omp_if.then: 7986 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 7987 // CHECK18-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]] 7988 // CHECK18-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2 7989 // CHECK18-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7990 // CHECK18-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1** 7991 // CHECK18-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 8 7992 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7993 // CHECK18-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 7994 // CHECK18-NEXT: store double* [[A]], double** [[TMP13]], align 8 7995 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 7996 // CHECK18-NEXT: store i64 8, i64* [[TMP14]], align 8 7997 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7998 // CHECK18-NEXT: store i8* null, i8** [[TMP15]], align 8 7999 // CHECK18-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 8000 // CHECK18-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64* 8001 // CHECK18-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8 8002 // CHECK18-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 8003 // CHECK18-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 8004 // CHECK18-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8 8005 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 8006 // CHECK18-NEXT: store i64 4, i64* [[TMP20]], align 8 8007 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 8008 // CHECK18-NEXT: store i8* null, i8** [[TMP21]], align 8 8009 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 8010 // CHECK18-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 8011 // CHECK18-NEXT: store i64 2, i64* [[TMP23]], align 8 8012 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 8013 // CHECK18-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 8014 // CHECK18-NEXT: store i64 2, i64* [[TMP25]], align 8 8015 // CHECK18-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 8016 // CHECK18-NEXT: store i64 8, i64* [[TMP26]], align 8 8017 // CHECK18-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 8018 // CHECK18-NEXT: store i8* null, i8** [[TMP27]], align 8 8019 // CHECK18-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 8020 // CHECK18-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 8021 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8 8022 // CHECK18-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 8023 // CHECK18-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 8024 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP31]], align 8 8025 // CHECK18-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 8026 // CHECK18-NEXT: store i64 8, i64* [[TMP32]], align 8 8027 // CHECK18-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 8028 // CHECK18-NEXT: store i8* null, i8** [[TMP33]], align 8 8029 // CHECK18-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 8030 // CHECK18-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16** 8031 // CHECK18-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 8 8032 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 8033 // CHECK18-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16** 8034 // CHECK18-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 8 8035 // CHECK18-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 8036 // CHECK18-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 8 8037 // CHECK18-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 8038 // CHECK18-NEXT: store i8* null, i8** [[TMP39]], align 8 8039 // CHECK18-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8040 // CHECK18-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8041 // CHECK18-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 8042 // CHECK18-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 8043 // CHECK18-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 8044 // CHECK18-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8045 // CHECK18: omp_offload.failed: 8046 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 8047 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 8048 // CHECK18: omp_offload.cont: 8049 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]] 8050 // CHECK18: omp_if.else: 8051 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]] 8052 // CHECK18-NEXT: br label [[OMP_IF_END]] 8053 // CHECK18: omp_if.end: 8054 // CHECK18-NEXT: [[TMP45:%.*]] = mul nsw i64 1, [[TMP2]] 8055 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP45]] 8056 // CHECK18-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 8057 // CHECK18-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 8058 // CHECK18-NEXT: [[CONV3:%.*]] = sext i16 [[TMP46]] to i32 8059 // CHECK18-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4 8060 // CHECK18-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP47]] 8061 // CHECK18-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 8062 // CHECK18-NEXT: call void @llvm.stackrestore(i8* [[TMP48]]) 8063 // CHECK18-NEXT: ret i32 [[ADD4]] 8064 // 8065 // 8066 // CHECK18-LABEL: define {{[^@]+}}@_ZL7fstatici 8067 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] { 8068 // CHECK18-NEXT: entry: 8069 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8070 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 8071 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2 8072 // CHECK18-NEXT: [[AAA:%.*]] = alloca i8, align 1 8073 // CHECK18-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 8074 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 8075 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 8076 // CHECK18-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8 8077 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 8078 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 8079 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 8080 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 8081 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4 8082 // CHECK18-NEXT: store i16 0, i16* [[AA]], align 2 8083 // CHECK18-NEXT: store i8 0, i8* [[AAA]], align 1 8084 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 8085 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 8086 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 8087 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 8088 // CHECK18-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 8089 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 8090 // CHECK18-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 8091 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 8092 // CHECK18-NEXT: [[TMP4:%.*]] = load i8, i8* [[AAA]], align 1 8093 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_CASTED]] to i8* 8094 // CHECK18-NEXT: store i8 [[TMP4]], i8* [[CONV2]], align 1 8095 // CHECK18-NEXT: [[TMP5:%.*]] = load i64, i64* [[AAA_CASTED]], align 8 8096 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 8097 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 50 8098 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 8099 // CHECK18: omp_if.then: 8100 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8101 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 8102 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 8103 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8104 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 8105 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8 8106 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 8107 // CHECK18-NEXT: store i8* null, i8** [[TMP11]], align 8 8108 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 8109 // CHECK18-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 8110 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 8111 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 8112 // CHECK18-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 8113 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8 8114 // CHECK18-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 8115 // CHECK18-NEXT: store i8* null, i8** [[TMP16]], align 8 8116 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 8117 // CHECK18-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64* 8118 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP18]], align 8 8119 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 8120 // CHECK18-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64* 8121 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8 8122 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 8123 // CHECK18-NEXT: store i8* null, i8** [[TMP21]], align 8 8124 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 8125 // CHECK18-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [10 x i32]** 8126 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP23]], align 8 8127 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 8128 // CHECK18-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [10 x i32]** 8129 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP25]], align 8 8130 // CHECK18-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 8131 // CHECK18-NEXT: store i8* null, i8** [[TMP26]], align 8 8132 // CHECK18-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8133 // CHECK18-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8134 // CHECK18-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 8135 // CHECK18-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 8136 // CHECK18-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8137 // CHECK18: omp_offload.failed: 8138 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 8139 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 8140 // CHECK18: omp_offload.cont: 8141 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]] 8142 // CHECK18: omp_if.else: 8143 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 8144 // CHECK18-NEXT: br label [[OMP_IF_END]] 8145 // CHECK18: omp_if.end: 8146 // CHECK18-NEXT: [[TMP31:%.*]] = load i32, i32* [[A]], align 4 8147 // CHECK18-NEXT: ret i32 [[TMP31]] 8148 // 8149 // 8150 // CHECK18-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 8151 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat { 8152 // CHECK18-NEXT: entry: 8153 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8154 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 8155 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2 8156 // CHECK18-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 8157 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 8158 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8 8159 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 8160 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 8161 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 8162 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 8163 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4 8164 // CHECK18-NEXT: store i16 0, i16* [[AA]], align 2 8165 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 8166 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 8167 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 8168 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 8169 // CHECK18-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 8170 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16* 8171 // CHECK18-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2 8172 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8 8173 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 8174 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 8175 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 8176 // CHECK18: omp_if.then: 8177 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8178 // CHECK18-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 8179 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 8180 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8181 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 8182 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 8183 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 8184 // CHECK18-NEXT: store i8* null, i8** [[TMP9]], align 8 8185 // CHECK18-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 8186 // CHECK18-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64* 8187 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8 8188 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 8189 // CHECK18-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 8190 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8 8191 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 8192 // CHECK18-NEXT: store i8* null, i8** [[TMP14]], align 8 8193 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 8194 // CHECK18-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 8195 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8 8196 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 8197 // CHECK18-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 8198 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8 8199 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 8200 // CHECK18-NEXT: store i8* null, i8** [[TMP19]], align 8 8201 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8202 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8203 // CHECK18-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.15, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 8204 // CHECK18-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 8205 // CHECK18-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8206 // CHECK18: omp_offload.failed: 8207 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 8208 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 8209 // CHECK18: omp_offload.cont: 8210 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]] 8211 // CHECK18: omp_if.else: 8212 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 8213 // CHECK18-NEXT: br label [[OMP_IF_END]] 8214 // CHECK18: omp_if.end: 8215 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 8216 // CHECK18-NEXT: ret i32 [[TMP24]] 8217 // 8218 // 8219 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 8220 // CHECK18-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 8221 // CHECK18-NEXT: entry: 8222 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 8223 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 8224 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8225 // CHECK18-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 8226 // CHECK18-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 8227 // CHECK18-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 8228 // CHECK18-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 8229 // CHECK18-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 8230 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8231 // CHECK18-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 8232 // CHECK18-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 8233 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 8234 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 8235 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8236 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 8237 // CHECK18-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 8238 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 8239 // CHECK18-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 8 8240 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 8241 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 8242 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 8243 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 8244 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 8245 // CHECK18-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 8246 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 8247 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 8248 // CHECK18-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 8 8249 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 8250 // CHECK18-NEXT: ret void 8251 // 8252 // 8253 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..9 8254 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 8255 // CHECK18-NEXT: entry: 8256 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8257 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8258 // CHECK18-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 8259 // CHECK18-NEXT: [[B:%.*]] = alloca i32, align 4 8260 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8261 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8262 // CHECK18-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 8263 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 8264 // CHECK18-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 8265 // CHECK18-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 8 8266 // CHECK18-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 8267 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 8268 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 8269 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 8270 // CHECK18-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 8271 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 3 8272 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8 8273 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 4 8274 // CHECK18-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 8 8275 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 8276 // CHECK18-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 8277 // CHECK18-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 8278 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 8279 // CHECK18-NEXT: store double [[ADD]], double* [[A]], align 8 8280 // CHECK18-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 8281 // CHECK18-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 8 8282 // CHECK18-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 8283 // CHECK18-NEXT: store double [[INC]], double* [[A1]], align 8 8284 // CHECK18-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 8285 // CHECK18-NEXT: [[TMP13:%.*]] = mul nsw i64 1, [[TMP8]] 8286 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i64 [[TMP13]] 8287 // CHECK18-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 8288 // CHECK18-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 8289 // CHECK18-NEXT: ret void 8290 // 8291 // 8292 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 8293 // CHECK18-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 8294 // CHECK18-NEXT: entry: 8295 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8296 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 8297 // CHECK18-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 8298 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 8299 // CHECK18-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 8 8300 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8301 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 8302 // CHECK18-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 8303 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 8304 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 8305 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 8306 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 8307 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 8308 // CHECK18-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 8309 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 8310 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 8311 // CHECK18-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 8312 // CHECK18-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 8313 // CHECK18-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 8314 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 8315 // CHECK18-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV2]], align 8 8316 // CHECK18-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 8317 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 8318 // CHECK18-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 8 8319 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.6*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]]) 8320 // CHECK18-NEXT: ret void 8321 // 8322 // 8323 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..11 8324 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.6* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 8325 // CHECK18-NEXT: entry: 8326 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8327 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8328 // CHECK18-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.6*, align 8 8329 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 8330 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2 8331 // CHECK18-NEXT: [[AAA:%.*]] = alloca i8, align 1 8332 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8333 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8334 // CHECK18-NEXT: store %struct.anon.6* [[__CONTEXT]], %struct.anon.6** [[__CONTEXT_ADDR]], align 8 8335 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.anon.6*, %struct.anon.6** [[__CONTEXT_ADDR]], align 8 8336 // CHECK18-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6:%.*]], %struct.anon.6* [[TMP0]], i32 0, i32 0 8337 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 8338 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 8339 // CHECK18-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 1 8340 // CHECK18-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 8341 // CHECK18-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 8342 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 2 8343 // CHECK18-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 8344 // CHECK18-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 8345 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 3 8346 // CHECK18-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 8 8347 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 8348 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 8349 // CHECK18-NEXT: store i32 [[ADD]], i32* [[A]], align 4 8350 // CHECK18-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 8351 // CHECK18-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 8352 // CHECK18-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 8353 // CHECK18-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 8354 // CHECK18-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 8355 // CHECK18-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 8356 // CHECK18-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 8357 // CHECK18-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 8358 // CHECK18-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 8359 // CHECK18-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 8360 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i64 0, i64 2 8361 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 8362 // CHECK18-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 8363 // CHECK18-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 8364 // CHECK18-NEXT: ret void 8365 // 8366 // 8367 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 8368 // CHECK18-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 8369 // CHECK18-NEXT: entry: 8370 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 8371 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 8372 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 8373 // CHECK18-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 8 8374 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 8375 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 8376 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 8377 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 8378 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 8379 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 8380 // CHECK18-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 8381 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 8382 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 8383 // CHECK18-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 8384 // CHECK18-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 8385 // CHECK18-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 8386 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 8387 // CHECK18-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 8 8388 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 8389 // CHECK18-NEXT: ret void 8390 // 8391 // 8392 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..14 8393 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 8394 // CHECK18-NEXT: entry: 8395 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8396 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8397 // CHECK18-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 8 8398 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4 8399 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2 8400 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8401 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8402 // CHECK18-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 8 8403 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 8 8404 // CHECK18-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 8405 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 8406 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 8407 // CHECK18-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 8408 // CHECK18-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 8409 // CHECK18-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 8410 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 8411 // CHECK18-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 8 8412 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 8413 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 8414 // CHECK18-NEXT: store i32 [[ADD]], i32* [[A]], align 4 8415 // CHECK18-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 8416 // CHECK18-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 8417 // CHECK18-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 8418 // CHECK18-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 8419 // CHECK18-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 8420 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i64 0, i64 2 8421 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 8422 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 8423 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 8424 // CHECK18-NEXT: ret void 8425 // 8426 // 8427 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 8428 // CHECK18-SAME: () #[[ATTR6:[0-9]+]] { 8429 // CHECK18-NEXT: entry: 8430 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1) 8431 // CHECK18-NEXT: ret void 8432 // 8433 // 8434 // CHECK19-LABEL: define {{[^@]+}}@_Z3fooi 8435 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 8436 // CHECK19-NEXT: entry: 8437 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8438 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 8439 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2 8440 // CHECK19-NEXT: [[B:%.*]] = alloca [10 x float], align 4 8441 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 8442 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 8443 // CHECK19-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 8444 // CHECK19-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 8445 // CHECK19-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4 8446 // CHECK19-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 8447 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 8448 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 8449 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 8450 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 8451 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 8452 // CHECK19-NEXT: [[A_CASTED2:%.*]] = alloca i32, align 4 8453 // CHECK19-NEXT: [[AA_CASTED3:%.*]] = alloca i32, align 4 8454 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4 8455 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4 8456 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4 8457 // CHECK19-NEXT: [[A_CASTED10:%.*]] = alloca i32, align 4 8458 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [9 x i8*], align 4 8459 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [9 x i8*], align 4 8460 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [9 x i8*], align 4 8461 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [9 x i64], align 4 8462 // CHECK19-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 8463 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 8464 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4 8465 // CHECK19-NEXT: store i16 0, i16* [[AA]], align 2 8466 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 8467 // CHECK19-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 8468 // CHECK19-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 8469 // CHECK19-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4 8470 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 8471 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4 8472 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]] 8473 // CHECK19-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8 8474 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4 8475 // CHECK19-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1, i32 20, i32 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 8476 // CHECK19-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates* 8477 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0 8478 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* [[TMP5]]) 8479 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 8480 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[A_CASTED]], align 4 8481 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[A_CASTED]], align 4 8482 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104(i32 [[TMP10]]) #[[ATTR3:[0-9]+]] 8483 // CHECK19-NEXT: [[TMP11:%.*]] = load i16, i16* [[AA]], align 2 8484 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 8485 // CHECK19-NEXT: store i16 [[TMP11]], i16* [[CONV]], align 2 8486 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[AA_CASTED]], align 4 8487 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8488 // CHECK19-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 8489 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[TMP14]], align 4 8490 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8491 // CHECK19-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32* 8492 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[TMP16]], align 4 8493 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 8494 // CHECK19-NEXT: store i8* null, i8** [[TMP17]], align 4 8495 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8496 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8497 // CHECK19-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110.region_id, i32 1, i8** [[TMP18]], i8** [[TMP19]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 8498 // CHECK19-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 8499 // CHECK19-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8500 // CHECK19: omp_offload.failed: 8501 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110(i32 [[TMP12]]) #[[ATTR3]] 8502 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 8503 // CHECK19: omp_offload.cont: 8504 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[A]], align 4 8505 // CHECK19-NEXT: store i32 [[TMP22]], i32* [[A_CASTED2]], align 4 8506 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[A_CASTED2]], align 4 8507 // CHECK19-NEXT: [[TMP24:%.*]] = load i16, i16* [[AA]], align 2 8508 // CHECK19-NEXT: [[CONV4:%.*]] = bitcast i32* [[AA_CASTED3]] to i16* 8509 // CHECK19-NEXT: store i16 [[TMP24]], i16* [[CONV4]], align 2 8510 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[AA_CASTED3]], align 4 8511 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4 8512 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP26]], 10 8513 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 8514 // CHECK19: omp_if.then: 8515 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 8516 // CHECK19-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 8517 // CHECK19-NEXT: store i32 [[TMP23]], i32* [[TMP28]], align 4 8518 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 8519 // CHECK19-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 8520 // CHECK19-NEXT: store i32 [[TMP23]], i32* [[TMP30]], align 4 8521 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 8522 // CHECK19-NEXT: store i8* null, i8** [[TMP31]], align 4 8523 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 8524 // CHECK19-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32* 8525 // CHECK19-NEXT: store i32 [[TMP25]], i32* [[TMP33]], align 4 8526 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 8527 // CHECK19-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32* 8528 // CHECK19-NEXT: store i32 [[TMP25]], i32* [[TMP35]], align 4 8529 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 8530 // CHECK19-NEXT: store i8* null, i8** [[TMP36]], align 4 8531 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 8532 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 8533 // CHECK19-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119.region_id, i32 2, i8** [[TMP37]], i8** [[TMP38]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 8534 // CHECK19-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 8535 // CHECK19-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 8536 // CHECK19: omp_offload.failed8: 8537 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i32 [[TMP23]], i32 [[TMP25]]) #[[ATTR3]] 8538 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT9]] 8539 // CHECK19: omp_offload.cont9: 8540 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]] 8541 // CHECK19: omp_if.else: 8542 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i32 [[TMP23]], i32 [[TMP25]]) #[[ATTR3]] 8543 // CHECK19-NEXT: br label [[OMP_IF_END]] 8544 // CHECK19: omp_if.end: 8545 // CHECK19-NEXT: [[TMP41:%.*]] = load i32, i32* [[A]], align 4 8546 // CHECK19-NEXT: store i32 [[TMP41]], i32* [[A_CASTED10]], align 4 8547 // CHECK19-NEXT: [[TMP42:%.*]] = load i32, i32* [[A_CASTED10]], align 4 8548 // CHECK19-NEXT: [[TMP43:%.*]] = load i32, i32* [[N_ADDR]], align 4 8549 // CHECK19-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP43]], 20 8550 // CHECK19-NEXT: br i1 [[CMP11]], label [[OMP_IF_THEN12:%.*]], label [[OMP_IF_ELSE18:%.*]] 8551 // CHECK19: omp_if.then12: 8552 // CHECK19-NEXT: [[TMP44:%.*]] = mul nuw i32 [[TMP1]], 4 8553 // CHECK19-NEXT: [[TMP45:%.*]] = sext i32 [[TMP44]] to i64 8554 // CHECK19-NEXT: [[TMP46:%.*]] = mul nuw i32 5, [[TMP3]] 8555 // CHECK19-NEXT: [[TMP47:%.*]] = mul nuw i32 [[TMP46]], 8 8556 // CHECK19-NEXT: [[TMP48:%.*]] = sext i32 [[TMP47]] to i64 8557 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 8558 // CHECK19-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32* 8559 // CHECK19-NEXT: store i32 [[TMP42]], i32* [[TMP50]], align 4 8560 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 8561 // CHECK19-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32* 8562 // CHECK19-NEXT: store i32 [[TMP42]], i32* [[TMP52]], align 4 8563 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 8564 // CHECK19-NEXT: store i64 4, i64* [[TMP53]], align 4 8565 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 8566 // CHECK19-NEXT: store i8* null, i8** [[TMP54]], align 4 8567 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 1 8568 // CHECK19-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to [10 x float]** 8569 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP56]], align 4 8570 // CHECK19-NEXT: [[TMP57:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 1 8571 // CHECK19-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to [10 x float]** 8572 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP58]], align 4 8573 // CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 8574 // CHECK19-NEXT: store i64 40, i64* [[TMP59]], align 4 8575 // CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 1 8576 // CHECK19-NEXT: store i8* null, i8** [[TMP60]], align 4 8577 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 2 8578 // CHECK19-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32* 8579 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP62]], align 4 8580 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 2 8581 // CHECK19-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i32* 8582 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP64]], align 4 8583 // CHECK19-NEXT: [[TMP65:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 8584 // CHECK19-NEXT: store i64 4, i64* [[TMP65]], align 4 8585 // CHECK19-NEXT: [[TMP66:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 2 8586 // CHECK19-NEXT: store i8* null, i8** [[TMP66]], align 4 8587 // CHECK19-NEXT: [[TMP67:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 3 8588 // CHECK19-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to float** 8589 // CHECK19-NEXT: store float* [[VLA]], float** [[TMP68]], align 4 8590 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 3 8591 // CHECK19-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to float** 8592 // CHECK19-NEXT: store float* [[VLA]], float** [[TMP70]], align 4 8593 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 8594 // CHECK19-NEXT: store i64 [[TMP45]], i64* [[TMP71]], align 4 8595 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 3 8596 // CHECK19-NEXT: store i8* null, i8** [[TMP72]], align 4 8597 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 4 8598 // CHECK19-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to [5 x [10 x double]]** 8599 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP74]], align 4 8600 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 4 8601 // CHECK19-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to [5 x [10 x double]]** 8602 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP76]], align 4 8603 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 8604 // CHECK19-NEXT: store i64 400, i64* [[TMP77]], align 4 8605 // CHECK19-NEXT: [[TMP78:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 4 8606 // CHECK19-NEXT: store i8* null, i8** [[TMP78]], align 4 8607 // CHECK19-NEXT: [[TMP79:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 5 8608 // CHECK19-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32* 8609 // CHECK19-NEXT: store i32 5, i32* [[TMP80]], align 4 8610 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 5 8611 // CHECK19-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32* 8612 // CHECK19-NEXT: store i32 5, i32* [[TMP82]], align 4 8613 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5 8614 // CHECK19-NEXT: store i64 4, i64* [[TMP83]], align 4 8615 // CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 5 8616 // CHECK19-NEXT: store i8* null, i8** [[TMP84]], align 4 8617 // CHECK19-NEXT: [[TMP85:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 6 8618 // CHECK19-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32* 8619 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP86]], align 4 8620 // CHECK19-NEXT: [[TMP87:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 6 8621 // CHECK19-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i32* 8622 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP88]], align 4 8623 // CHECK19-NEXT: [[TMP89:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 8624 // CHECK19-NEXT: store i64 4, i64* [[TMP89]], align 4 8625 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 6 8626 // CHECK19-NEXT: store i8* null, i8** [[TMP90]], align 4 8627 // CHECK19-NEXT: [[TMP91:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 7 8628 // CHECK19-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to double** 8629 // CHECK19-NEXT: store double* [[VLA1]], double** [[TMP92]], align 4 8630 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 7 8631 // CHECK19-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 8632 // CHECK19-NEXT: store double* [[VLA1]], double** [[TMP94]], align 4 8633 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 8634 // CHECK19-NEXT: store i64 [[TMP48]], i64* [[TMP95]], align 4 8635 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 7 8636 // CHECK19-NEXT: store i8* null, i8** [[TMP96]], align 4 8637 // CHECK19-NEXT: [[TMP97:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 8 8638 // CHECK19-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to %struct.TT** 8639 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP98]], align 4 8640 // CHECK19-NEXT: [[TMP99:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 8 8641 // CHECK19-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to %struct.TT** 8642 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP100]], align 4 8643 // CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8 8644 // CHECK19-NEXT: store i64 12, i64* [[TMP101]], align 4 8645 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 8 8646 // CHECK19-NEXT: store i8* null, i8** [[TMP102]], align 4 8647 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 8648 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 8649 // CHECK19-NEXT: [[TMP105:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 8650 // CHECK19-NEXT: [[TMP106:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144.region_id, i32 9, i8** [[TMP103]], i8** [[TMP104]], i64* [[TMP105]], i64* getelementptr inbounds ([9 x i64], [9 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 8651 // CHECK19-NEXT: [[TMP107:%.*]] = icmp ne i32 [[TMP106]], 0 8652 // CHECK19-NEXT: br i1 [[TMP107]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 8653 // CHECK19: omp_offload.failed16: 8654 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i32 [[TMP42]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 8655 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT17]] 8656 // CHECK19: omp_offload.cont17: 8657 // CHECK19-NEXT: br label [[OMP_IF_END19:%.*]] 8658 // CHECK19: omp_if.else18: 8659 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i32 [[TMP42]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 8660 // CHECK19-NEXT: br label [[OMP_IF_END19]] 8661 // CHECK19: omp_if.end19: 8662 // CHECK19-NEXT: [[TMP108:%.*]] = load i32, i32* [[A]], align 4 8663 // CHECK19-NEXT: [[TMP109:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 8664 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP109]]) 8665 // CHECK19-NEXT: ret i32 [[TMP108]] 8666 // 8667 // 8668 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 8669 // CHECK19-SAME: () #[[ATTR2:[0-9]+]] { 8670 // CHECK19-NEXT: entry: 8671 // CHECK19-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 8672 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 8673 // CHECK19-NEXT: ret void 8674 // 8675 // 8676 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 8677 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 8678 // CHECK19-NEXT: entry: 8679 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8680 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8681 // CHECK19-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 8682 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8683 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8684 // CHECK19-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 8685 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 8686 // CHECK19-NEXT: ret void 8687 // 8688 // 8689 // CHECK19-LABEL: define {{[^@]+}}@.omp_task_entry. 8690 // CHECK19-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 8691 // CHECK19-NEXT: entry: 8692 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 8693 // CHECK19-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4 8694 // CHECK19-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4 8695 // CHECK19-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4 8696 // CHECK19-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4 8697 // CHECK19-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 4 8698 // CHECK19-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 8699 // CHECK19-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4 8700 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 8701 // CHECK19-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 8702 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 8703 // CHECK19-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 8704 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 8705 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 8706 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 8707 // CHECK19-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 8708 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 8709 // CHECK19-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 8710 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]]) 8711 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]]) 8712 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]]) 8713 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 8714 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22 8715 // CHECK19-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22 8716 // CHECK19-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 8717 // CHECK19-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 8718 // CHECK19-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22 8719 // CHECK19-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 8720 // CHECK19-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 8721 // CHECK19-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0) #[[ATTR3]] 8722 // CHECK19-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 8723 // CHECK19-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 8724 // CHECK19: omp_offload.failed.i: 8725 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100() #[[ATTR3]] 8726 // CHECK19-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 8727 // CHECK19: .omp_outlined..1.exit: 8728 // CHECK19-NEXT: ret i32 0 8729 // 8730 // 8731 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104 8732 // CHECK19-SAME: (i32 [[A:%.*]]) #[[ATTR2]] { 8733 // CHECK19-NEXT: entry: 8734 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 8735 // CHECK19-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 8736 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 8737 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 8738 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 8739 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 8740 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 8741 // CHECK19-NEXT: ret void 8742 // 8743 // 8744 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2 8745 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 8746 // CHECK19-NEXT: entry: 8747 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8748 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8749 // CHECK19-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 8750 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 8751 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8752 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8753 // CHECK19-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 8754 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 8755 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 8756 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8757 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 8758 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 8759 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1 8760 // CHECK19-NEXT: store i32 [[ADD]], i32* [[A]], align 4 8761 // CHECK19-NEXT: ret void 8762 // 8763 // 8764 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 8765 // CHECK19-SAME: (i32 [[AA:%.*]]) #[[ATTR2]] { 8766 // CHECK19-NEXT: entry: 8767 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 8768 // CHECK19-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 2 8769 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 8770 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 8771 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 8772 // CHECK19-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 4 8773 // CHECK19-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 8774 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 8775 // CHECK19-NEXT: ret void 8776 // 8777 // 8778 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3 8779 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 8780 // CHECK19-NEXT: entry: 8781 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8782 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8783 // CHECK19-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 4 8784 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2 8785 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8786 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8787 // CHECK19-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 4 8788 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 4 8789 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 8790 // CHECK19-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 8791 // CHECK19-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 8792 // CHECK19-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 8793 // CHECK19-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 8794 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 8795 // CHECK19-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 8796 // CHECK19-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 8797 // CHECK19-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8798 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 8799 // CHECK19-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 8800 // CHECK19-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 8801 // CHECK19-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 8802 // CHECK19: .cancel.exit: 8803 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 8804 // CHECK19-NEXT: br label [[DOTCANCEL_CONTINUE]] 8805 // CHECK19: .cancel.continue: 8806 // CHECK19-NEXT: ret void 8807 // 8808 // 8809 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 8810 // CHECK19-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] { 8811 // CHECK19-NEXT: entry: 8812 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 8813 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 8814 // CHECK19-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 8815 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 8816 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 8817 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 8818 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 8819 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 8820 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 8821 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 8822 // CHECK19-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4 8823 // CHECK19-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 8824 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 8825 // CHECK19-NEXT: ret void 8826 // 8827 // 8828 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..4 8829 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 8830 // CHECK19-NEXT: entry: 8831 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8832 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8833 // CHECK19-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 4 8834 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 8835 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2 8836 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8837 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8838 // CHECK19-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 4 8839 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 4 8840 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 8841 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8842 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 8843 // CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 8844 // CHECK19-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 8845 // CHECK19-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 8846 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 8847 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 8848 // CHECK19-NEXT: store i32 [[ADD]], i32* [[A]], align 4 8849 // CHECK19-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 8850 // CHECK19-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 8851 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 8852 // CHECK19-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 8853 // CHECK19-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 8854 // CHECK19-NEXT: ret void 8855 // 8856 // 8857 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 8858 // CHECK19-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]]) #[[ATTR2]] { 8859 // CHECK19-NEXT: entry: 8860 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 8861 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 8862 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8863 // CHECK19-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 8864 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 8865 // CHECK19-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 8866 // CHECK19-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 8867 // CHECK19-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 8868 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 8869 // CHECK19-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 4 8870 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 8871 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 8872 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 8873 // CHECK19-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 8874 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 8875 // CHECK19-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 8876 // CHECK19-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 8877 // CHECK19-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 8878 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 8879 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 8880 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 8881 // CHECK19-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 8882 // CHECK19-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 8883 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 8884 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 8885 // CHECK19-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 8886 // CHECK19-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 8887 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 8888 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 8889 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 8890 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 8891 // CHECK19-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 4 8892 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 8893 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP11]], align 4 8894 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 8895 // CHECK19-NEXT: store float* [[TMP2]], float** [[TMP12]], align 4 8896 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 8897 // CHECK19-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 4 8898 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 8899 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4 8900 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 8901 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 8902 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 8903 // CHECK19-NEXT: store double* [[TMP6]], double** [[TMP16]], align 4 8904 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 8905 // CHECK19-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 4 8906 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 8907 // CHECK19-NEXT: ret void 8908 // 8909 // 8910 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..7 8911 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 8912 // CHECK19-NEXT: entry: 8913 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8914 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8915 // CHECK19-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 4 8916 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 8917 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8918 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8919 // CHECK19-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 4 8920 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 4 8921 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 8922 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8923 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 8924 // CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 8925 // CHECK19-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 4 8926 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 8927 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 8928 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 8929 // CHECK19-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 4 8930 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 8931 // CHECK19-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 4 8932 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 5 8933 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 8934 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 6 8935 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 8936 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 7 8937 // CHECK19-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 4 8938 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 8 8939 // CHECK19-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 4 8940 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 8941 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 8942 // CHECK19-NEXT: store i32 [[ADD]], i32* [[A]], align 4 8943 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i32 0, i32 2 8944 // CHECK19-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 8945 // CHECK19-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 8946 // CHECK19-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 8947 // CHECK19-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 8948 // CHECK19-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 8949 // CHECK19-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i32 3 8950 // CHECK19-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 8951 // CHECK19-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 8952 // CHECK19-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 8953 // CHECK19-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 8954 // CHECK19-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 8955 // CHECK19-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i32 0, i32 1 8956 // CHECK19-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i32 0, i32 2 8957 // CHECK19-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 8958 // CHECK19-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 8959 // CHECK19-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 8960 // CHECK19-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP14]] 8961 // CHECK19-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i32 [[TMP23]] 8962 // CHECK19-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i32 3 8963 // CHECK19-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 8964 // CHECK19-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 8965 // CHECK19-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 8966 // CHECK19-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 8967 // CHECK19-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4 8968 // CHECK19-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 8969 // CHECK19-NEXT: store i64 [[ADD13]], i64* [[X]], align 4 8970 // CHECK19-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 8971 // CHECK19-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4 8972 // CHECK19-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 8973 // CHECK19-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 8974 // CHECK19-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 8975 // CHECK19-NEXT: store i8 [[CONV16]], i8* [[Y]], align 4 8976 // CHECK19-NEXT: ret void 8977 // 8978 // 8979 // CHECK19-LABEL: define {{[^@]+}}@_Z3bari 8980 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0]] { 8981 // CHECK19-NEXT: entry: 8982 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8983 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 8984 // CHECK19-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 8985 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 8986 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4 8987 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 8988 // CHECK19-NEXT: [[CALL:%.*]] = call i32 @_Z3fooi(i32 [[TMP0]]) 8989 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 8990 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 8991 // CHECK19-NEXT: store i32 [[ADD]], i32* [[A]], align 4 8992 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 8993 // CHECK19-NEXT: [[CALL1:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP2]]) 8994 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 8995 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 8996 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 8997 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 8998 // CHECK19-NEXT: [[CALL3:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP4]]) 8999 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 9000 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 9001 // CHECK19-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 9002 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 9003 // CHECK19-NEXT: [[CALL5:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP6]]) 9004 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 9005 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 9006 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 9007 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 9008 // CHECK19-NEXT: ret i32 [[TMP8]] 9009 // 9010 // 9011 // CHECK19-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 9012 // CHECK19-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 { 9013 // CHECK19-NEXT: entry: 9014 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 9015 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9016 // CHECK19-NEXT: [[B:%.*]] = alloca i32, align 4 9017 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 9018 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 9019 // CHECK19-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 9020 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 9021 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 9022 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 9023 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 9024 // CHECK19-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 9025 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 9026 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 9027 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 9028 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 9029 // CHECK19-NEXT: store i32 [[ADD]], i32* [[B]], align 4 9030 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 9031 // CHECK19-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 9032 // CHECK19-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 9033 // CHECK19-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]] 9034 // CHECK19-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2 9035 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 9036 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4 9037 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 9038 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 9039 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 9040 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60 9041 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 9042 // CHECK19: omp_if.then: 9043 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 9044 // CHECK19-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]] 9045 // CHECK19-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2 9046 // CHECK19-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 9047 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9048 // CHECK19-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1** 9049 // CHECK19-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 4 9050 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9051 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 9052 // CHECK19-NEXT: store double* [[A]], double** [[TMP13]], align 4 9053 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 9054 // CHECK19-NEXT: store i64 8, i64* [[TMP14]], align 4 9055 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 9056 // CHECK19-NEXT: store i8* null, i8** [[TMP15]], align 4 9057 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 9058 // CHECK19-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 9059 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4 9060 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 9061 // CHECK19-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 9062 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4 9063 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 9064 // CHECK19-NEXT: store i64 4, i64* [[TMP20]], align 4 9065 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 9066 // CHECK19-NEXT: store i8* null, i8** [[TMP21]], align 4 9067 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 9068 // CHECK19-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 9069 // CHECK19-NEXT: store i32 2, i32* [[TMP23]], align 4 9070 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 9071 // CHECK19-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 9072 // CHECK19-NEXT: store i32 2, i32* [[TMP25]], align 4 9073 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 9074 // CHECK19-NEXT: store i64 4, i64* [[TMP26]], align 4 9075 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 9076 // CHECK19-NEXT: store i8* null, i8** [[TMP27]], align 4 9077 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 9078 // CHECK19-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32* 9079 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4 9080 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 9081 // CHECK19-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i32* 9082 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP31]], align 4 9083 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 9084 // CHECK19-NEXT: store i64 4, i64* [[TMP32]], align 4 9085 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 9086 // CHECK19-NEXT: store i8* null, i8** [[TMP33]], align 4 9087 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 9088 // CHECK19-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16** 9089 // CHECK19-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 4 9090 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 9091 // CHECK19-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16** 9092 // CHECK19-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 4 9093 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 9094 // CHECK19-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 4 9095 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 9096 // CHECK19-NEXT: store i8* null, i8** [[TMP39]], align 4 9097 // CHECK19-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9098 // CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9099 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 9100 // CHECK19-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 9101 // CHECK19-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 9102 // CHECK19-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9103 // CHECK19: omp_offload.failed: 9104 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 9105 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 9106 // CHECK19: omp_offload.cont: 9107 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]] 9108 // CHECK19: omp_if.else: 9109 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 9110 // CHECK19-NEXT: br label [[OMP_IF_END]] 9111 // CHECK19: omp_if.end: 9112 // CHECK19-NEXT: [[TMP45:%.*]] = mul nsw i32 1, [[TMP1]] 9113 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP45]] 9114 // CHECK19-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 9115 // CHECK19-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 9116 // CHECK19-NEXT: [[CONV:%.*]] = sext i16 [[TMP46]] to i32 9117 // CHECK19-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4 9118 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP47]] 9119 // CHECK19-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 9120 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP48]]) 9121 // CHECK19-NEXT: ret i32 [[ADD3]] 9122 // 9123 // 9124 // CHECK19-LABEL: define {{[^@]+}}@_ZL7fstatici 9125 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0]] { 9126 // CHECK19-NEXT: entry: 9127 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9128 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 9129 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2 9130 // CHECK19-NEXT: [[AAA:%.*]] = alloca i8, align 1 9131 // CHECK19-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 9132 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 9133 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 9134 // CHECK19-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 9135 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 9136 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 9137 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 9138 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 9139 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4 9140 // CHECK19-NEXT: store i16 0, i16* [[AA]], align 2 9141 // CHECK19-NEXT: store i8 0, i8* [[AAA]], align 1 9142 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 9143 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 9144 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 9145 // CHECK19-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 9146 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 9147 // CHECK19-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 9148 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 9149 // CHECK19-NEXT: [[TMP4:%.*]] = load i8, i8* [[AAA]], align 1 9150 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 9151 // CHECK19-NEXT: store i8 [[TMP4]], i8* [[CONV1]], align 1 9152 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 9153 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 9154 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 50 9155 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 9156 // CHECK19: omp_if.then: 9157 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9158 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 9159 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 9160 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9161 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 9162 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4 9163 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 9164 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4 9165 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 9166 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 9167 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 9168 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 9169 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 9170 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 9171 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 9172 // CHECK19-NEXT: store i8* null, i8** [[TMP16]], align 4 9173 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 9174 // CHECK19-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 9175 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP18]], align 4 9176 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 9177 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 9178 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4 9179 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 9180 // CHECK19-NEXT: store i8* null, i8** [[TMP21]], align 4 9181 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 9182 // CHECK19-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [10 x i32]** 9183 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP23]], align 4 9184 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 9185 // CHECK19-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [10 x i32]** 9186 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP25]], align 4 9187 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 9188 // CHECK19-NEXT: store i8* null, i8** [[TMP26]], align 4 9189 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9190 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9191 // CHECK19-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 9192 // CHECK19-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 9193 // CHECK19-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9194 // CHECK19: omp_offload.failed: 9195 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 9196 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 9197 // CHECK19: omp_offload.cont: 9198 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]] 9199 // CHECK19: omp_if.else: 9200 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 9201 // CHECK19-NEXT: br label [[OMP_IF_END]] 9202 // CHECK19: omp_if.end: 9203 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[A]], align 4 9204 // CHECK19-NEXT: ret i32 [[TMP31]] 9205 // 9206 // 9207 // CHECK19-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 9208 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat { 9209 // CHECK19-NEXT: entry: 9210 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9211 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 9212 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2 9213 // CHECK19-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 9214 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 9215 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 9216 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 9217 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 9218 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 9219 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 9220 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4 9221 // CHECK19-NEXT: store i16 0, i16* [[AA]], align 2 9222 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 9223 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 9224 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 9225 // CHECK19-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 9226 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 9227 // CHECK19-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 9228 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 9229 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 9230 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 9231 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 9232 // CHECK19: omp_if.then: 9233 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9234 // CHECK19-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 9235 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 9236 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9237 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 9238 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 9239 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 9240 // CHECK19-NEXT: store i8* null, i8** [[TMP9]], align 4 9241 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 9242 // CHECK19-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 9243 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 9244 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 9245 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 9246 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 9247 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 9248 // CHECK19-NEXT: store i8* null, i8** [[TMP14]], align 4 9249 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 9250 // CHECK19-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 9251 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4 9252 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 9253 // CHECK19-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 9254 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4 9255 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 9256 // CHECK19-NEXT: store i8* null, i8** [[TMP19]], align 4 9257 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9258 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9259 // CHECK19-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.15, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 9260 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 9261 // CHECK19-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9262 // CHECK19: omp_offload.failed: 9263 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 9264 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 9265 // CHECK19: omp_offload.cont: 9266 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]] 9267 // CHECK19: omp_if.else: 9268 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 9269 // CHECK19-NEXT: br label [[OMP_IF_END]] 9270 // CHECK19: omp_if.end: 9271 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 9272 // CHECK19-NEXT: ret i32 [[TMP24]] 9273 // 9274 // 9275 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 9276 // CHECK19-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 9277 // CHECK19-NEXT: entry: 9278 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 9279 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 9280 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9281 // CHECK19-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 9282 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 9283 // CHECK19-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 4 9284 // CHECK19-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 9285 // CHECK19-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 9286 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 9287 // CHECK19-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 9288 // CHECK19-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 9289 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 9290 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 9291 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 9292 // CHECK19-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 9293 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 9294 // CHECK19-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 4 9295 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 9296 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[B_ADDR]], align 4 9297 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 9298 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 9299 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 9300 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 9301 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 9302 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 9303 // CHECK19-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 4 9304 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 9305 // CHECK19-NEXT: ret void 9306 // 9307 // 9308 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..9 9309 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 9310 // CHECK19-NEXT: entry: 9311 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9312 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9313 // CHECK19-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 4 9314 // CHECK19-NEXT: [[B:%.*]] = alloca i32, align 4 9315 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9316 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9317 // CHECK19-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 4 9318 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 4 9319 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 9320 // CHECK19-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 4 9321 // CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 9322 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 9323 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 9324 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 9325 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 9326 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 3 9327 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 9328 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 4 9329 // CHECK19-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 4 9330 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 9331 // CHECK19-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 9332 // CHECK19-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 9333 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 9334 // CHECK19-NEXT: store double [[ADD]], double* [[A]], align 4 9335 // CHECK19-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 9336 // CHECK19-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 4 9337 // CHECK19-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 9338 // CHECK19-NEXT: store double [[INC]], double* [[A1]], align 4 9339 // CHECK19-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 9340 // CHECK19-NEXT: [[TMP13:%.*]] = mul nsw i32 1, [[TMP8]] 9341 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i32 [[TMP13]] 9342 // CHECK19-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 9343 // CHECK19-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 9344 // CHECK19-NEXT: ret void 9345 // 9346 // 9347 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 9348 // CHECK19-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 9349 // CHECK19-NEXT: entry: 9350 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9351 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9352 // CHECK19-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 9353 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 9354 // CHECK19-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 4 9355 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9356 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9357 // CHECK19-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 9358 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 9359 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9360 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 9361 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 9362 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 9363 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 9364 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 9365 // CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 9366 // CHECK19-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 9367 // CHECK19-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 9368 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 9369 // CHECK19-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV1]], align 4 9370 // CHECK19-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 9371 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 9372 // CHECK19-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 4 9373 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.6*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]]) 9374 // CHECK19-NEXT: ret void 9375 // 9376 // 9377 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11 9378 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.6* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 9379 // CHECK19-NEXT: entry: 9380 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9381 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9382 // CHECK19-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.6*, align 4 9383 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 9384 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2 9385 // CHECK19-NEXT: [[AAA:%.*]] = alloca i8, align 1 9386 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9387 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9388 // CHECK19-NEXT: store %struct.anon.6* [[__CONTEXT]], %struct.anon.6** [[__CONTEXT_ADDR]], align 4 9389 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.anon.6*, %struct.anon.6** [[__CONTEXT_ADDR]], align 4 9390 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6:%.*]], %struct.anon.6* [[TMP0]], i32 0, i32 0 9391 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9392 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 9393 // CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 1 9394 // CHECK19-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 9395 // CHECK19-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 9396 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 2 9397 // CHECK19-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 9398 // CHECK19-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 9399 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 3 9400 // CHECK19-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 4 9401 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 9402 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 9403 // CHECK19-NEXT: store i32 [[ADD]], i32* [[A]], align 4 9404 // CHECK19-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 9405 // CHECK19-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 9406 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 9407 // CHECK19-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 9408 // CHECK19-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 9409 // CHECK19-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 9410 // CHECK19-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 9411 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 9412 // CHECK19-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 9413 // CHECK19-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 9414 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i32 0, i32 2 9415 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 9416 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 9417 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 9418 // CHECK19-NEXT: ret void 9419 // 9420 // 9421 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 9422 // CHECK19-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 9423 // CHECK19-NEXT: entry: 9424 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9425 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9426 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 9427 // CHECK19-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 4 9428 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9429 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9430 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 9431 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9432 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 9433 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 9434 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 9435 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 9436 // CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 9437 // CHECK19-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 9438 // CHECK19-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 9439 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 9440 // CHECK19-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 4 9441 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 9442 // CHECK19-NEXT: ret void 9443 // 9444 // 9445 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14 9446 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 9447 // CHECK19-NEXT: entry: 9448 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9449 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9450 // CHECK19-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 4 9451 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4 9452 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2 9453 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9454 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9455 // CHECK19-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 4 9456 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 4 9457 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 9458 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9459 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 9460 // CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 9461 // CHECK19-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 9462 // CHECK19-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 9463 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 9464 // CHECK19-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 4 9465 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 9466 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 9467 // CHECK19-NEXT: store i32 [[ADD]], i32* [[A]], align 4 9468 // CHECK19-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 9469 // CHECK19-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 9470 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 9471 // CHECK19-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 9472 // CHECK19-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 9473 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i32 0, i32 2 9474 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 9475 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 9476 // CHECK19-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 9477 // CHECK19-NEXT: ret void 9478 // 9479 // 9480 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 9481 // CHECK19-SAME: () #[[ATTR6:[0-9]+]] { 9482 // CHECK19-NEXT: entry: 9483 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 9484 // CHECK19-NEXT: ret void 9485 // 9486 // 9487 // CHECK20-LABEL: define {{[^@]+}}@_Z3fooi 9488 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] { 9489 // CHECK20-NEXT: entry: 9490 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9491 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 9492 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2 9493 // CHECK20-NEXT: [[B:%.*]] = alloca [10 x float], align 4 9494 // CHECK20-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 9495 // CHECK20-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 9496 // CHECK20-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8 9497 // CHECK20-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 9498 // CHECK20-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4 9499 // CHECK20-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 9500 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 9501 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 9502 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 9503 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 9504 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 9505 // CHECK20-NEXT: [[A_CASTED2:%.*]] = alloca i32, align 4 9506 // CHECK20-NEXT: [[AA_CASTED3:%.*]] = alloca i32, align 4 9507 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4 9508 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4 9509 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4 9510 // CHECK20-NEXT: [[A_CASTED10:%.*]] = alloca i32, align 4 9511 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [9 x i8*], align 4 9512 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [9 x i8*], align 4 9513 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [9 x i8*], align 4 9514 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [9 x i64], align 4 9515 // CHECK20-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 9516 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 9517 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4 9518 // CHECK20-NEXT: store i16 0, i16* [[AA]], align 2 9519 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 9520 // CHECK20-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 9521 // CHECK20-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 9522 // CHECK20-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4 9523 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 9524 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4 9525 // CHECK20-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]] 9526 // CHECK20-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8 9527 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4 9528 // CHECK20-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1, i32 20, i32 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1) 9529 // CHECK20-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates* 9530 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0 9531 // CHECK20-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i8* [[TMP5]]) 9532 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 9533 // CHECK20-NEXT: store i32 [[TMP9]], i32* [[A_CASTED]], align 4 9534 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[A_CASTED]], align 4 9535 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104(i32 [[TMP10]]) #[[ATTR3:[0-9]+]] 9536 // CHECK20-NEXT: [[TMP11:%.*]] = load i16, i16* [[AA]], align 2 9537 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 9538 // CHECK20-NEXT: store i16 [[TMP11]], i16* [[CONV]], align 2 9539 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[AA_CASTED]], align 4 9540 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9541 // CHECK20-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32* 9542 // CHECK20-NEXT: store i32 [[TMP12]], i32* [[TMP14]], align 4 9543 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9544 // CHECK20-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32* 9545 // CHECK20-NEXT: store i32 [[TMP12]], i32* [[TMP16]], align 4 9546 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 9547 // CHECK20-NEXT: store i8* null, i8** [[TMP17]], align 4 9548 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9549 // CHECK20-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9550 // CHECK20-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110.region_id, i32 1, i8** [[TMP18]], i8** [[TMP19]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 9551 // CHECK20-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 9552 // CHECK20-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9553 // CHECK20: omp_offload.failed: 9554 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110(i32 [[TMP12]]) #[[ATTR3]] 9555 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 9556 // CHECK20: omp_offload.cont: 9557 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[A]], align 4 9558 // CHECK20-NEXT: store i32 [[TMP22]], i32* [[A_CASTED2]], align 4 9559 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[A_CASTED2]], align 4 9560 // CHECK20-NEXT: [[TMP24:%.*]] = load i16, i16* [[AA]], align 2 9561 // CHECK20-NEXT: [[CONV4:%.*]] = bitcast i32* [[AA_CASTED3]] to i16* 9562 // CHECK20-NEXT: store i16 [[TMP24]], i16* [[CONV4]], align 2 9563 // CHECK20-NEXT: [[TMP25:%.*]] = load i32, i32* [[AA_CASTED3]], align 4 9564 // CHECK20-NEXT: [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4 9565 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP26]], 10 9566 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 9567 // CHECK20: omp_if.then: 9568 // CHECK20-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 9569 // CHECK20-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 9570 // CHECK20-NEXT: store i32 [[TMP23]], i32* [[TMP28]], align 4 9571 // CHECK20-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 9572 // CHECK20-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 9573 // CHECK20-NEXT: store i32 [[TMP23]], i32* [[TMP30]], align 4 9574 // CHECK20-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 9575 // CHECK20-NEXT: store i8* null, i8** [[TMP31]], align 4 9576 // CHECK20-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 9577 // CHECK20-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32* 9578 // CHECK20-NEXT: store i32 [[TMP25]], i32* [[TMP33]], align 4 9579 // CHECK20-NEXT: [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 9580 // CHECK20-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32* 9581 // CHECK20-NEXT: store i32 [[TMP25]], i32* [[TMP35]], align 4 9582 // CHECK20-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 9583 // CHECK20-NEXT: store i8* null, i8** [[TMP36]], align 4 9584 // CHECK20-NEXT: [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 9585 // CHECK20-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 9586 // CHECK20-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119.region_id, i32 2, i8** [[TMP37]], i8** [[TMP38]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 9587 // CHECK20-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 9588 // CHECK20-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 9589 // CHECK20: omp_offload.failed8: 9590 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i32 [[TMP23]], i32 [[TMP25]]) #[[ATTR3]] 9591 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT9]] 9592 // CHECK20: omp_offload.cont9: 9593 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]] 9594 // CHECK20: omp_if.else: 9595 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119(i32 [[TMP23]], i32 [[TMP25]]) #[[ATTR3]] 9596 // CHECK20-NEXT: br label [[OMP_IF_END]] 9597 // CHECK20: omp_if.end: 9598 // CHECK20-NEXT: [[TMP41:%.*]] = load i32, i32* [[A]], align 4 9599 // CHECK20-NEXT: store i32 [[TMP41]], i32* [[A_CASTED10]], align 4 9600 // CHECK20-NEXT: [[TMP42:%.*]] = load i32, i32* [[A_CASTED10]], align 4 9601 // CHECK20-NEXT: [[TMP43:%.*]] = load i32, i32* [[N_ADDR]], align 4 9602 // CHECK20-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP43]], 20 9603 // CHECK20-NEXT: br i1 [[CMP11]], label [[OMP_IF_THEN12:%.*]], label [[OMP_IF_ELSE18:%.*]] 9604 // CHECK20: omp_if.then12: 9605 // CHECK20-NEXT: [[TMP44:%.*]] = mul nuw i32 [[TMP1]], 4 9606 // CHECK20-NEXT: [[TMP45:%.*]] = sext i32 [[TMP44]] to i64 9607 // CHECK20-NEXT: [[TMP46:%.*]] = mul nuw i32 5, [[TMP3]] 9608 // CHECK20-NEXT: [[TMP47:%.*]] = mul nuw i32 [[TMP46]], 8 9609 // CHECK20-NEXT: [[TMP48:%.*]] = sext i32 [[TMP47]] to i64 9610 // CHECK20-NEXT: [[TMP49:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 9611 // CHECK20-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32* 9612 // CHECK20-NEXT: store i32 [[TMP42]], i32* [[TMP50]], align 4 9613 // CHECK20-NEXT: [[TMP51:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 9614 // CHECK20-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32* 9615 // CHECK20-NEXT: store i32 [[TMP42]], i32* [[TMP52]], align 4 9616 // CHECK20-NEXT: [[TMP53:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 9617 // CHECK20-NEXT: store i64 4, i64* [[TMP53]], align 4 9618 // CHECK20-NEXT: [[TMP54:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 9619 // CHECK20-NEXT: store i8* null, i8** [[TMP54]], align 4 9620 // CHECK20-NEXT: [[TMP55:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 1 9621 // CHECK20-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to [10 x float]** 9622 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP56]], align 4 9623 // CHECK20-NEXT: [[TMP57:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 1 9624 // CHECK20-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to [10 x float]** 9625 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP58]], align 4 9626 // CHECK20-NEXT: [[TMP59:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 9627 // CHECK20-NEXT: store i64 40, i64* [[TMP59]], align 4 9628 // CHECK20-NEXT: [[TMP60:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 1 9629 // CHECK20-NEXT: store i8* null, i8** [[TMP60]], align 4 9630 // CHECK20-NEXT: [[TMP61:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 2 9631 // CHECK20-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32* 9632 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP62]], align 4 9633 // CHECK20-NEXT: [[TMP63:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 2 9634 // CHECK20-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i32* 9635 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP64]], align 4 9636 // CHECK20-NEXT: [[TMP65:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 9637 // CHECK20-NEXT: store i64 4, i64* [[TMP65]], align 4 9638 // CHECK20-NEXT: [[TMP66:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 2 9639 // CHECK20-NEXT: store i8* null, i8** [[TMP66]], align 4 9640 // CHECK20-NEXT: [[TMP67:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 3 9641 // CHECK20-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to float** 9642 // CHECK20-NEXT: store float* [[VLA]], float** [[TMP68]], align 4 9643 // CHECK20-NEXT: [[TMP69:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 3 9644 // CHECK20-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to float** 9645 // CHECK20-NEXT: store float* [[VLA]], float** [[TMP70]], align 4 9646 // CHECK20-NEXT: [[TMP71:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 9647 // CHECK20-NEXT: store i64 [[TMP45]], i64* [[TMP71]], align 4 9648 // CHECK20-NEXT: [[TMP72:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 3 9649 // CHECK20-NEXT: store i8* null, i8** [[TMP72]], align 4 9650 // CHECK20-NEXT: [[TMP73:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 4 9651 // CHECK20-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to [5 x [10 x double]]** 9652 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP74]], align 4 9653 // CHECK20-NEXT: [[TMP75:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 4 9654 // CHECK20-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to [5 x [10 x double]]** 9655 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP76]], align 4 9656 // CHECK20-NEXT: [[TMP77:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 9657 // CHECK20-NEXT: store i64 400, i64* [[TMP77]], align 4 9658 // CHECK20-NEXT: [[TMP78:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 4 9659 // CHECK20-NEXT: store i8* null, i8** [[TMP78]], align 4 9660 // CHECK20-NEXT: [[TMP79:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 5 9661 // CHECK20-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32* 9662 // CHECK20-NEXT: store i32 5, i32* [[TMP80]], align 4 9663 // CHECK20-NEXT: [[TMP81:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 5 9664 // CHECK20-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32* 9665 // CHECK20-NEXT: store i32 5, i32* [[TMP82]], align 4 9666 // CHECK20-NEXT: [[TMP83:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5 9667 // CHECK20-NEXT: store i64 4, i64* [[TMP83]], align 4 9668 // CHECK20-NEXT: [[TMP84:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 5 9669 // CHECK20-NEXT: store i8* null, i8** [[TMP84]], align 4 9670 // CHECK20-NEXT: [[TMP85:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 6 9671 // CHECK20-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32* 9672 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP86]], align 4 9673 // CHECK20-NEXT: [[TMP87:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 6 9674 // CHECK20-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i32* 9675 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP88]], align 4 9676 // CHECK20-NEXT: [[TMP89:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6 9677 // CHECK20-NEXT: store i64 4, i64* [[TMP89]], align 4 9678 // CHECK20-NEXT: [[TMP90:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 6 9679 // CHECK20-NEXT: store i8* null, i8** [[TMP90]], align 4 9680 // CHECK20-NEXT: [[TMP91:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 7 9681 // CHECK20-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to double** 9682 // CHECK20-NEXT: store double* [[VLA1]], double** [[TMP92]], align 4 9683 // CHECK20-NEXT: [[TMP93:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 7 9684 // CHECK20-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 9685 // CHECK20-NEXT: store double* [[VLA1]], double** [[TMP94]], align 4 9686 // CHECK20-NEXT: [[TMP95:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7 9687 // CHECK20-NEXT: store i64 [[TMP48]], i64* [[TMP95]], align 4 9688 // CHECK20-NEXT: [[TMP96:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 7 9689 // CHECK20-NEXT: store i8* null, i8** [[TMP96]], align 4 9690 // CHECK20-NEXT: [[TMP97:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 8 9691 // CHECK20-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to %struct.TT** 9692 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP98]], align 4 9693 // CHECK20-NEXT: [[TMP99:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 8 9694 // CHECK20-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to %struct.TT** 9695 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP100]], align 4 9696 // CHECK20-NEXT: [[TMP101:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8 9697 // CHECK20-NEXT: store i64 12, i64* [[TMP101]], align 4 9698 // CHECK20-NEXT: [[TMP102:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 8 9699 // CHECK20-NEXT: store i8* null, i8** [[TMP102]], align 4 9700 // CHECK20-NEXT: [[TMP103:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 9701 // CHECK20-NEXT: [[TMP104:%.*]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 9702 // CHECK20-NEXT: [[TMP105:%.*]] = getelementptr inbounds [9 x i64], [9 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 9703 // CHECK20-NEXT: [[TMP106:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144.region_id, i32 9, i8** [[TMP103]], i8** [[TMP104]], i64* [[TMP105]], i64* getelementptr inbounds ([9 x i64], [9 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 9704 // CHECK20-NEXT: [[TMP107:%.*]] = icmp ne i32 [[TMP106]], 0 9705 // CHECK20-NEXT: br i1 [[TMP107]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 9706 // CHECK20: omp_offload.failed16: 9707 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i32 [[TMP42]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 9708 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT17]] 9709 // CHECK20: omp_offload.cont17: 9710 // CHECK20-NEXT: br label [[OMP_IF_END19:%.*]] 9711 // CHECK20: omp_if.else18: 9712 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144(i32 [[TMP42]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]]) #[[ATTR3]] 9713 // CHECK20-NEXT: br label [[OMP_IF_END19]] 9714 // CHECK20: omp_if.end19: 9715 // CHECK20-NEXT: [[TMP108:%.*]] = load i32, i32* [[A]], align 4 9716 // CHECK20-NEXT: [[TMP109:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 9717 // CHECK20-NEXT: call void @llvm.stackrestore(i8* [[TMP109]]) 9718 // CHECK20-NEXT: ret i32 [[TMP108]] 9719 // 9720 // 9721 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 9722 // CHECK20-SAME: () #[[ATTR2:[0-9]+]] { 9723 // CHECK20-NEXT: entry: 9724 // CHECK20-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 9725 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 9726 // CHECK20-NEXT: ret void 9727 // 9728 // 9729 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined. 9730 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 9731 // CHECK20-NEXT: entry: 9732 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9733 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9734 // CHECK20-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 9735 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9736 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9737 // CHECK20-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 9738 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 9739 // CHECK20-NEXT: ret void 9740 // 9741 // 9742 // CHECK20-LABEL: define {{[^@]+}}@.omp_task_entry. 9743 // CHECK20-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 9744 // CHECK20-NEXT: entry: 9745 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 9746 // CHECK20-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4 9747 // CHECK20-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4 9748 // CHECK20-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4 9749 // CHECK20-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4 9750 // CHECK20-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 4 9751 // CHECK20-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 9752 // CHECK20-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4 9753 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 9754 // CHECK20-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 9755 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 9756 // CHECK20-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4 9757 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 9758 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 9759 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 9760 // CHECK20-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 9761 // CHECK20-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 9762 // CHECK20-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 9763 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]]) 9764 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]]) 9765 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]]) 9766 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 9767 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22 9768 // CHECK20-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22 9769 // CHECK20-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22 9770 // CHECK20-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22 9771 // CHECK20-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22 9772 // CHECK20-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 9773 // CHECK20-NEXT: [[TMP10:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 4, !noalias !22 9774 // CHECK20-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0) #[[ATTR3]] 9775 // CHECK20-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 9776 // CHECK20-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 9777 // CHECK20: omp_offload.failed.i: 9778 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100() #[[ATTR3]] 9779 // CHECK20-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]] 9780 // CHECK20: .omp_outlined..1.exit: 9781 // CHECK20-NEXT: ret i32 0 9782 // 9783 // 9784 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l104 9785 // CHECK20-SAME: (i32 [[A:%.*]]) #[[ATTR2]] { 9786 // CHECK20-NEXT: entry: 9787 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9788 // CHECK20-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 9789 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9790 // CHECK20-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 9791 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 9792 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 9793 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 9794 // CHECK20-NEXT: ret void 9795 // 9796 // 9797 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..2 9798 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 9799 // CHECK20-NEXT: entry: 9800 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9801 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9802 // CHECK20-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 9803 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 9804 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9805 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9806 // CHECK20-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 9807 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 9808 // CHECK20-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 9809 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9810 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 9811 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 9812 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 1 9813 // CHECK20-NEXT: store i32 [[ADD]], i32* [[A]], align 4 9814 // CHECK20-NEXT: ret void 9815 // 9816 // 9817 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 9818 // CHECK20-SAME: (i32 [[AA:%.*]]) #[[ATTR2]] { 9819 // CHECK20-NEXT: entry: 9820 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9821 // CHECK20-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 2 9822 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9823 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9824 // CHECK20-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 9825 // CHECK20-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 4 9826 // CHECK20-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 9827 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 9828 // CHECK20-NEXT: ret void 9829 // 9830 // 9831 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..3 9832 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 9833 // CHECK20-NEXT: entry: 9834 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9835 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9836 // CHECK20-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 4 9837 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2 9838 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9839 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9840 // CHECK20-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 4 9841 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 4 9842 // CHECK20-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 9843 // CHECK20-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 9844 // CHECK20-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 9845 // CHECK20-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 9846 // CHECK20-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 9847 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 9848 // CHECK20-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 9849 // CHECK20-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 9850 // CHECK20-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9851 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 9852 // CHECK20-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 9853 // CHECK20-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 9854 // CHECK20-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 9855 // CHECK20: .cancel.exit: 9856 // CHECK20-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 9857 // CHECK20-NEXT: br label [[DOTCANCEL_CONTINUE]] 9858 // CHECK20: .cancel.continue: 9859 // CHECK20-NEXT: ret void 9860 // 9861 // 9862 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 9863 // CHECK20-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] { 9864 // CHECK20-NEXT: entry: 9865 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9866 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 9867 // CHECK20-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 9868 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9869 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 9870 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 9871 // CHECK20-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 9872 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 9873 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 9874 // CHECK20-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 9875 // CHECK20-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4 9876 // CHECK20-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 9877 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 9878 // CHECK20-NEXT: ret void 9879 // 9880 // 9881 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..4 9882 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 9883 // CHECK20-NEXT: entry: 9884 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9885 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9886 // CHECK20-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 4 9887 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 9888 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2 9889 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9890 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9891 // CHECK20-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 4 9892 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 4 9893 // CHECK20-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 9894 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9895 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 9896 // CHECK20-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 9897 // CHECK20-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 9898 // CHECK20-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 9899 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 9900 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 9901 // CHECK20-NEXT: store i32 [[ADD]], i32* [[A]], align 4 9902 // CHECK20-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 9903 // CHECK20-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 9904 // CHECK20-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 9905 // CHECK20-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 9906 // CHECK20-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 9907 // CHECK20-NEXT: ret void 9908 // 9909 // 9910 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 9911 // CHECK20-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]]) #[[ATTR2]] { 9912 // CHECK20-NEXT: entry: 9913 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 9914 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 9915 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9916 // CHECK20-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 9917 // CHECK20-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 9918 // CHECK20-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 9919 // CHECK20-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 9920 // CHECK20-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 9921 // CHECK20-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 9922 // CHECK20-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 4 9923 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 9924 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 9925 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 9926 // CHECK20-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 9927 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 9928 // CHECK20-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 9929 // CHECK20-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 9930 // CHECK20-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 9931 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 9932 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 9933 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 9934 // CHECK20-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 9935 // CHECK20-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 9936 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 9937 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 9938 // CHECK20-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 9939 // CHECK20-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 9940 // CHECK20-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 9941 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 9942 // CHECK20-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 9943 // CHECK20-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 9944 // CHECK20-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 4 9945 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 9946 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP11]], align 4 9947 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 9948 // CHECK20-NEXT: store float* [[TMP2]], float** [[TMP12]], align 4 9949 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 9950 // CHECK20-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 4 9951 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 9952 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4 9953 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 9954 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 9955 // CHECK20-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 9956 // CHECK20-NEXT: store double* [[TMP6]], double** [[TMP16]], align 4 9957 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 9958 // CHECK20-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 4 9959 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 9960 // CHECK20-NEXT: ret void 9961 // 9962 // 9963 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..7 9964 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 9965 // CHECK20-NEXT: entry: 9966 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9967 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9968 // CHECK20-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 4 9969 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 9970 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9971 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9972 // CHECK20-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 4 9973 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 4 9974 // CHECK20-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 9975 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9976 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 9977 // CHECK20-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 9978 // CHECK20-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 4 9979 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 9980 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 9981 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 9982 // CHECK20-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 4 9983 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 9984 // CHECK20-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 4 9985 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 5 9986 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 9987 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 6 9988 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 9989 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 7 9990 // CHECK20-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 4 9991 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 8 9992 // CHECK20-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 4 9993 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 9994 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 9995 // CHECK20-NEXT: store i32 [[ADD]], i32* [[A]], align 4 9996 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i32 0, i32 2 9997 // CHECK20-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 9998 // CHECK20-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 9999 // CHECK20-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 10000 // CHECK20-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 10001 // CHECK20-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 10002 // CHECK20-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i32 3 10003 // CHECK20-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 10004 // CHECK20-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 10005 // CHECK20-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 10006 // CHECK20-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 10007 // CHECK20-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 10008 // CHECK20-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i32 0, i32 1 10009 // CHECK20-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i32 0, i32 2 10010 // CHECK20-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 10011 // CHECK20-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 10012 // CHECK20-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 10013 // CHECK20-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP14]] 10014 // CHECK20-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i32 [[TMP23]] 10015 // CHECK20-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i32 3 10016 // CHECK20-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 10017 // CHECK20-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 10018 // CHECK20-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 10019 // CHECK20-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 10020 // CHECK20-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4 10021 // CHECK20-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 10022 // CHECK20-NEXT: store i64 [[ADD13]], i64* [[X]], align 4 10023 // CHECK20-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 10024 // CHECK20-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4 10025 // CHECK20-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 10026 // CHECK20-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 10027 // CHECK20-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 10028 // CHECK20-NEXT: store i8 [[CONV16]], i8* [[Y]], align 4 10029 // CHECK20-NEXT: ret void 10030 // 10031 // 10032 // CHECK20-LABEL: define {{[^@]+}}@_Z3bari 10033 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0]] { 10034 // CHECK20-NEXT: entry: 10035 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10036 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 10037 // CHECK20-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 10038 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 10039 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4 10040 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 10041 // CHECK20-NEXT: [[CALL:%.*]] = call i32 @_Z3fooi(i32 [[TMP0]]) 10042 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 10043 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 10044 // CHECK20-NEXT: store i32 [[ADD]], i32* [[A]], align 4 10045 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 10046 // CHECK20-NEXT: [[CALL1:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP2]]) 10047 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4 10048 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 10049 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[A]], align 4 10050 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 10051 // CHECK20-NEXT: [[CALL3:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP4]]) 10052 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 10053 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 10054 // CHECK20-NEXT: store i32 [[ADD4]], i32* [[A]], align 4 10055 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 10056 // CHECK20-NEXT: [[CALL5:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP6]]) 10057 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 10058 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]] 10059 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[A]], align 4 10060 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4 10061 // CHECK20-NEXT: ret i32 [[TMP8]] 10062 // 10063 // 10064 // CHECK20-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 10065 // CHECK20-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 { 10066 // CHECK20-NEXT: entry: 10067 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 10068 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10069 // CHECK20-NEXT: [[B:%.*]] = alloca i32, align 4 10070 // CHECK20-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 10071 // CHECK20-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 10072 // CHECK20-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 10073 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 10074 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 10075 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 10076 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 10077 // CHECK20-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 10078 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 10079 // CHECK20-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 10080 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4 10081 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 10082 // CHECK20-NEXT: store i32 [[ADD]], i32* [[B]], align 4 10083 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4 10084 // CHECK20-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 10085 // CHECK20-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 10086 // CHECK20-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]] 10087 // CHECK20-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2 10088 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4 10089 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4 10090 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4 10091 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4 10092 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 10093 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60 10094 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 10095 // CHECK20: omp_if.then: 10096 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0 10097 // CHECK20-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]] 10098 // CHECK20-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2 10099 // CHECK20-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 10100 // CHECK20-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10101 // CHECK20-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1** 10102 // CHECK20-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 4 10103 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10104 // CHECK20-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 10105 // CHECK20-NEXT: store double* [[A]], double** [[TMP13]], align 4 10106 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 10107 // CHECK20-NEXT: store i64 8, i64* [[TMP14]], align 4 10108 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 10109 // CHECK20-NEXT: store i8* null, i8** [[TMP15]], align 4 10110 // CHECK20-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 10111 // CHECK20-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32* 10112 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4 10113 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 10114 // CHECK20-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32* 10115 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4 10116 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 10117 // CHECK20-NEXT: store i64 4, i64* [[TMP20]], align 4 10118 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 10119 // CHECK20-NEXT: store i8* null, i8** [[TMP21]], align 4 10120 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 10121 // CHECK20-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 10122 // CHECK20-NEXT: store i32 2, i32* [[TMP23]], align 4 10123 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 10124 // CHECK20-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 10125 // CHECK20-NEXT: store i32 2, i32* [[TMP25]], align 4 10126 // CHECK20-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 10127 // CHECK20-NEXT: store i64 4, i64* [[TMP26]], align 4 10128 // CHECK20-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 10129 // CHECK20-NEXT: store i8* null, i8** [[TMP27]], align 4 10130 // CHECK20-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 10131 // CHECK20-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32* 10132 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4 10133 // CHECK20-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 10134 // CHECK20-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i32* 10135 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP31]], align 4 10136 // CHECK20-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3 10137 // CHECK20-NEXT: store i64 4, i64* [[TMP32]], align 4 10138 // CHECK20-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 10139 // CHECK20-NEXT: store i8* null, i8** [[TMP33]], align 4 10140 // CHECK20-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 10141 // CHECK20-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16** 10142 // CHECK20-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 4 10143 // CHECK20-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 10144 // CHECK20-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16** 10145 // CHECK20-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 4 10146 // CHECK20-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 10147 // CHECK20-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 4 10148 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 10149 // CHECK20-NEXT: store i8* null, i8** [[TMP39]], align 4 10150 // CHECK20-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10151 // CHECK20-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10152 // CHECK20-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 10153 // CHECK20-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 10154 // CHECK20-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 10155 // CHECK20-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10156 // CHECK20: omp_offload.failed: 10157 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 10158 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 10159 // CHECK20: omp_offload.cont: 10160 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]] 10161 // CHECK20: omp_if.else: 10162 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]] 10163 // CHECK20-NEXT: br label [[OMP_IF_END]] 10164 // CHECK20: omp_if.end: 10165 // CHECK20-NEXT: [[TMP45:%.*]] = mul nsw i32 1, [[TMP1]] 10166 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP45]] 10167 // CHECK20-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 10168 // CHECK20-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2 10169 // CHECK20-NEXT: [[CONV:%.*]] = sext i16 [[TMP46]] to i32 10170 // CHECK20-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4 10171 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP47]] 10172 // CHECK20-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 10173 // CHECK20-NEXT: call void @llvm.stackrestore(i8* [[TMP48]]) 10174 // CHECK20-NEXT: ret i32 [[ADD3]] 10175 // 10176 // 10177 // CHECK20-LABEL: define {{[^@]+}}@_ZL7fstatici 10178 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0]] { 10179 // CHECK20-NEXT: entry: 10180 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10181 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 10182 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2 10183 // CHECK20-NEXT: [[AAA:%.*]] = alloca i8, align 1 10184 // CHECK20-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 10185 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 10186 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 10187 // CHECK20-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4 10188 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 10189 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 10190 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 10191 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 10192 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4 10193 // CHECK20-NEXT: store i16 0, i16* [[AA]], align 2 10194 // CHECK20-NEXT: store i8 0, i8* [[AAA]], align 1 10195 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 10196 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 10197 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 10198 // CHECK20-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 10199 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 10200 // CHECK20-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 10201 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 10202 // CHECK20-NEXT: [[TMP4:%.*]] = load i8, i8* [[AAA]], align 1 10203 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8* 10204 // CHECK20-NEXT: store i8 [[TMP4]], i8* [[CONV1]], align 1 10205 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[AAA_CASTED]], align 4 10206 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4 10207 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 50 10208 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 10209 // CHECK20: omp_if.then: 10210 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10211 // CHECK20-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 10212 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 10213 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10214 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 10215 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4 10216 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 10217 // CHECK20-NEXT: store i8* null, i8** [[TMP11]], align 4 10218 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 10219 // CHECK20-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 10220 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 10221 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 10222 // CHECK20-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 10223 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4 10224 // CHECK20-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 10225 // CHECK20-NEXT: store i8* null, i8** [[TMP16]], align 4 10226 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 10227 // CHECK20-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 10228 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP18]], align 4 10229 // CHECK20-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 10230 // CHECK20-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 10231 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4 10232 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 10233 // CHECK20-NEXT: store i8* null, i8** [[TMP21]], align 4 10234 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 10235 // CHECK20-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [10 x i32]** 10236 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP23]], align 4 10237 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 10238 // CHECK20-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [10 x i32]** 10239 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP25]], align 4 10240 // CHECK20-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 10241 // CHECK20-NEXT: store i8* null, i8** [[TMP26]], align 4 10242 // CHECK20-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10243 // CHECK20-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10244 // CHECK20-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 10245 // CHECK20-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 10246 // CHECK20-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10247 // CHECK20: omp_offload.failed: 10248 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 10249 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 10250 // CHECK20: omp_offload.cont: 10251 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]] 10252 // CHECK20: omp_if.else: 10253 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], [10 x i32]* [[B]]) #[[ATTR3]] 10254 // CHECK20-NEXT: br label [[OMP_IF_END]] 10255 // CHECK20: omp_if.end: 10256 // CHECK20-NEXT: [[TMP31:%.*]] = load i32, i32* [[A]], align 4 10257 // CHECK20-NEXT: ret i32 [[TMP31]] 10258 // 10259 // 10260 // CHECK20-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 10261 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat { 10262 // CHECK20-NEXT: entry: 10263 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10264 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 10265 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2 10266 // CHECK20-NEXT: [[B:%.*]] = alloca [10 x i32], align 4 10267 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 10268 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4 10269 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 10270 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 10271 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 10272 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 10273 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4 10274 // CHECK20-NEXT: store i16 0, i16* [[AA]], align 2 10275 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 10276 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4 10277 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4 10278 // CHECK20-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2 10279 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16* 10280 // CHECK20-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2 10281 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4 10282 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4 10283 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40 10284 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 10285 // CHECK20: omp_if.then: 10286 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10287 // CHECK20-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 10288 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 10289 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10290 // CHECK20-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 10291 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 10292 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 10293 // CHECK20-NEXT: store i8* null, i8** [[TMP9]], align 4 10294 // CHECK20-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 10295 // CHECK20-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32* 10296 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4 10297 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 10298 // CHECK20-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 10299 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4 10300 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 10301 // CHECK20-NEXT: store i8* null, i8** [[TMP14]], align 4 10302 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 10303 // CHECK20-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]** 10304 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4 10305 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 10306 // CHECK20-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]** 10307 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4 10308 // CHECK20-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 10309 // CHECK20-NEXT: store i8* null, i8** [[TMP19]], align 4 10310 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10311 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10312 // CHECK20-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.15, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0) 10313 // CHECK20-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 10314 // CHECK20-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10315 // CHECK20: omp_offload.failed: 10316 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 10317 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 10318 // CHECK20: omp_offload.cont: 10319 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]] 10320 // CHECK20: omp_if.else: 10321 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]] 10322 // CHECK20-NEXT: br label [[OMP_IF_END]] 10323 // CHECK20: omp_if.end: 10324 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4 10325 // CHECK20-NEXT: ret i32 [[TMP24]] 10326 // 10327 // 10328 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 10329 // CHECK20-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] { 10330 // CHECK20-NEXT: entry: 10331 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 10332 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 10333 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 10334 // CHECK20-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 10335 // CHECK20-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 10336 // CHECK20-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 4 10337 // CHECK20-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 10338 // CHECK20-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 10339 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 10340 // CHECK20-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 10341 // CHECK20-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 10342 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 10343 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 10344 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 10345 // CHECK20-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 10346 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 10347 // CHECK20-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 4 10348 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 10349 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[B_ADDR]], align 4 10350 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 10351 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 10352 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 10353 // CHECK20-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 10354 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 10355 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 10356 // CHECK20-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 4 10357 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 10358 // CHECK20-NEXT: ret void 10359 // 10360 // 10361 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..9 10362 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 10363 // CHECK20-NEXT: entry: 10364 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10365 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10366 // CHECK20-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 4 10367 // CHECK20-NEXT: [[B:%.*]] = alloca i32, align 4 10368 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10369 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10370 // CHECK20-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 4 10371 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 4 10372 // CHECK20-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 10373 // CHECK20-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 4 10374 // CHECK20-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 10375 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 10376 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 10377 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 10378 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 10379 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 3 10380 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 10381 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 4 10382 // CHECK20-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 4 10383 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 10384 // CHECK20-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 10385 // CHECK20-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 10386 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 10387 // CHECK20-NEXT: store double [[ADD]], double* [[A]], align 4 10388 // CHECK20-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 10389 // CHECK20-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 4 10390 // CHECK20-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 10391 // CHECK20-NEXT: store double [[INC]], double* [[A1]], align 4 10392 // CHECK20-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 10393 // CHECK20-NEXT: [[TMP13:%.*]] = mul nsw i32 1, [[TMP8]] 10394 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i32 [[TMP13]] 10395 // CHECK20-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 10396 // CHECK20-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 10397 // CHECK20-NEXT: ret void 10398 // 10399 // 10400 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 10401 // CHECK20-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 10402 // CHECK20-NEXT: entry: 10403 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 10404 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 10405 // CHECK20-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 10406 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 10407 // CHECK20-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 4 10408 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 10409 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 10410 // CHECK20-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 10411 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 10412 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 10413 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 10414 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 10415 // CHECK20-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 10416 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 10417 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 10418 // CHECK20-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 10419 // CHECK20-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 10420 // CHECK20-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 10421 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 10422 // CHECK20-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV1]], align 4 10423 // CHECK20-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 10424 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 10425 // CHECK20-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 4 10426 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.6*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]]) 10427 // CHECK20-NEXT: ret void 10428 // 10429 // 10430 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..11 10431 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.6* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 10432 // CHECK20-NEXT: entry: 10433 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10434 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10435 // CHECK20-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.6*, align 4 10436 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 10437 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2 10438 // CHECK20-NEXT: [[AAA:%.*]] = alloca i8, align 1 10439 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10440 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10441 // CHECK20-NEXT: store %struct.anon.6* [[__CONTEXT]], %struct.anon.6** [[__CONTEXT_ADDR]], align 4 10442 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.anon.6*, %struct.anon.6** [[__CONTEXT_ADDR]], align 4 10443 // CHECK20-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6:%.*]], %struct.anon.6* [[TMP0]], i32 0, i32 0 10444 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 10445 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 10446 // CHECK20-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 1 10447 // CHECK20-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 10448 // CHECK20-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 10449 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 2 10450 // CHECK20-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 10451 // CHECK20-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 10452 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 3 10453 // CHECK20-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 4 10454 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 10455 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 10456 // CHECK20-NEXT: store i32 [[ADD]], i32* [[A]], align 4 10457 // CHECK20-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 10458 // CHECK20-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 10459 // CHECK20-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 10460 // CHECK20-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 10461 // CHECK20-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 10462 // CHECK20-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 10463 // CHECK20-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 10464 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 10465 // CHECK20-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 10466 // CHECK20-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 10467 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i32 0, i32 2 10468 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 10469 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 10470 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 10471 // CHECK20-NEXT: ret void 10472 // 10473 // 10474 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 10475 // CHECK20-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] { 10476 // CHECK20-NEXT: entry: 10477 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 10478 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 10479 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 10480 // CHECK20-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 4 10481 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 10482 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 10483 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 10484 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 10485 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 10486 // CHECK20-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 10487 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 10488 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 10489 // CHECK20-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 10490 // CHECK20-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 10491 // CHECK20-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 10492 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 10493 // CHECK20-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 4 10494 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 10495 // CHECK20-NEXT: ret void 10496 // 10497 // 10498 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..14 10499 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 10500 // CHECK20-NEXT: entry: 10501 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10502 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10503 // CHECK20-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 4 10504 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4 10505 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2 10506 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10507 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10508 // CHECK20-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 4 10509 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 4 10510 // CHECK20-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 10511 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 10512 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 10513 // CHECK20-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 10514 // CHECK20-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 10515 // CHECK20-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 10516 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 10517 // CHECK20-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 4 10518 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 10519 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 10520 // CHECK20-NEXT: store i32 [[ADD]], i32* [[A]], align 4 10521 // CHECK20-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 10522 // CHECK20-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 10523 // CHECK20-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 10524 // CHECK20-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 10525 // CHECK20-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 10526 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i32 0, i32 2 10527 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 10528 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 10529 // CHECK20-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 10530 // CHECK20-NEXT: ret void 10531 // 10532 // 10533 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 10534 // CHECK20-SAME: () #[[ATTR6:[0-9]+]] { 10535 // CHECK20-NEXT: entry: 10536 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1) 10537 // CHECK20-NEXT: ret void 10538 // 10539 // 10540 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 10541 // CHECK25-SAME: () #[[ATTR0:[0-9]+]] { 10542 // CHECK25-NEXT: entry: 10543 // CHECK25-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 10544 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 10545 // CHECK25-NEXT: ret void 10546 // 10547 // 10548 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined. 10549 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 10550 // CHECK25-NEXT: entry: 10551 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10552 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10553 // CHECK25-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 10554 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10555 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10556 // CHECK25-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 10557 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 10558 // CHECK25-NEXT: ret void 10559 // 10560 // 10561 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 10562 // CHECK25-SAME: (i64 [[AA:%.*]]) #[[ATTR0]] { 10563 // CHECK25-NEXT: entry: 10564 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 10565 // CHECK25-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 2 10566 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 10567 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 10568 // CHECK25-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 10569 // CHECK25-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 8 10570 // CHECK25-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 10571 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 10572 // CHECK25-NEXT: ret void 10573 // 10574 // 10575 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1 10576 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 10577 // CHECK25-NEXT: entry: 10578 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10579 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10580 // CHECK25-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 10581 // CHECK25-NEXT: [[AA:%.*]] = alloca i16, align 2 10582 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10583 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10584 // CHECK25-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 10585 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 10586 // CHECK25-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 10587 // CHECK25-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 10588 // CHECK25-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 10589 // CHECK25-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 10590 // CHECK25-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 10591 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 10592 // CHECK25-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 10593 // CHECK25-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 10594 // CHECK25-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10595 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 10596 // CHECK25-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 10597 // CHECK25-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 10598 // CHECK25-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 10599 // CHECK25: .cancel.exit: 10600 // CHECK25-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 10601 // CHECK25-NEXT: br label [[DOTCANCEL_CONTINUE]] 10602 // CHECK25: .cancel.continue: 10603 // CHECK25-NEXT: ret void 10604 // 10605 // 10606 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 10607 // CHECK25-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] { 10608 // CHECK25-NEXT: entry: 10609 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 10610 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 10611 // CHECK25-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 10612 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 10613 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 10614 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 10615 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 10616 // CHECK25-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 10617 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 10618 // CHECK25-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 10619 // CHECK25-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 10620 // CHECK25-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8 10621 // CHECK25-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 10622 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 10623 // CHECK25-NEXT: ret void 10624 // 10625 // 10626 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..2 10627 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 10628 // CHECK25-NEXT: entry: 10629 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10630 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10631 // CHECK25-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 10632 // CHECK25-NEXT: [[A:%.*]] = alloca i32, align 4 10633 // CHECK25-NEXT: [[AA:%.*]] = alloca i16, align 2 10634 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10635 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10636 // CHECK25-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 10637 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 10638 // CHECK25-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 10639 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 10640 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 10641 // CHECK25-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 10642 // CHECK25-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 10643 // CHECK25-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 10644 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 10645 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 10646 // CHECK25-NEXT: store i32 [[ADD]], i32* [[A]], align 4 10647 // CHECK25-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 10648 // CHECK25-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 10649 // CHECK25-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 10650 // CHECK25-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 10651 // CHECK25-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 10652 // CHECK25-NEXT: ret void 10653 // 10654 // 10655 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 10656 // CHECK25-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]]) #[[ATTR0]] { 10657 // CHECK25-NEXT: entry: 10658 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 10659 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 10660 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10661 // CHECK25-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 10662 // CHECK25-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 10663 // CHECK25-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 10664 // CHECK25-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 10665 // CHECK25-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 10666 // CHECK25-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 10667 // CHECK25-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 10668 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 10669 // CHECK25-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 10670 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10671 // CHECK25-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 10672 // CHECK25-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 10673 // CHECK25-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 10674 // CHECK25-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 10675 // CHECK25-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 10676 // CHECK25-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 10677 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 10678 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 10679 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10680 // CHECK25-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 10681 // CHECK25-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 10682 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 10683 // CHECK25-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 10684 // CHECK25-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 10685 // CHECK25-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 10686 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 10687 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 10688 // CHECK25-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 8 10689 // CHECK25-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 10690 // CHECK25-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 8 10691 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 10692 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8 10693 // CHECK25-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 10694 // CHECK25-NEXT: store float* [[TMP2]], float** [[TMP12]], align 8 10695 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 10696 // CHECK25-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 8 10697 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 10698 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8 10699 // CHECK25-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 10700 // CHECK25-NEXT: store i64 [[TMP5]], i64* [[TMP15]], align 8 10701 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 10702 // CHECK25-NEXT: store double* [[TMP6]], double** [[TMP16]], align 8 10703 // CHECK25-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 10704 // CHECK25-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 8 10705 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 10706 // CHECK25-NEXT: ret void 10707 // 10708 // 10709 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..3 10710 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 10711 // CHECK25-NEXT: entry: 10712 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10713 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10714 // CHECK25-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 10715 // CHECK25-NEXT: [[A:%.*]] = alloca i32, align 4 10716 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10717 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10718 // CHECK25-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 10719 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 10720 // CHECK25-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 10721 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 10722 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 10723 // CHECK25-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 10724 // CHECK25-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 8 10725 // CHECK25-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 2 10726 // CHECK25-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 10727 // CHECK25-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 3 10728 // CHECK25-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 8 10729 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 4 10730 // CHECK25-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 8 10731 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 5 10732 // CHECK25-NEXT: [[TMP12:%.*]] = load i64, i64* [[TMP11]], align 8 10733 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 6 10734 // CHECK25-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP13]], align 8 10735 // CHECK25-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 7 10736 // CHECK25-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 8 10737 // CHECK25-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 8 10738 // CHECK25-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 8 10739 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 10740 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 10741 // CHECK25-NEXT: store i32 [[ADD]], i32* [[A]], align 4 10742 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i64 0, i64 2 10743 // CHECK25-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 10744 // CHECK25-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 10745 // CHECK25-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 10746 // CHECK25-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 10747 // CHECK25-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 10748 // CHECK25-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i64 3 10749 // CHECK25-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 10750 // CHECK25-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 10751 // CHECK25-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 10752 // CHECK25-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 10753 // CHECK25-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 10754 // CHECK25-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i64 0, i64 1 10755 // CHECK25-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i64 0, i64 2 10756 // CHECK25-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 10757 // CHECK25-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 10758 // CHECK25-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 10759 // CHECK25-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP14]] 10760 // CHECK25-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 [[TMP23]] 10761 // CHECK25-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i64 3 10762 // CHECK25-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 10763 // CHECK25-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 10764 // CHECK25-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 10765 // CHECK25-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 10766 // CHECK25-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8 10767 // CHECK25-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 10768 // CHECK25-NEXT: store i64 [[ADD13]], i64* [[X]], align 8 10769 // CHECK25-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 10770 // CHECK25-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8 10771 // CHECK25-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 10772 // CHECK25-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 10773 // CHECK25-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 10774 // CHECK25-NEXT: store i8 [[CONV16]], i8* [[Y]], align 8 10775 // CHECK25-NEXT: ret void 10776 // 10777 // 10778 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 10779 // CHECK25-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 10780 // CHECK25-NEXT: entry: 10781 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 10782 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 10783 // CHECK25-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 10784 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 10785 // CHECK25-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 8 10786 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 10787 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 10788 // CHECK25-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 10789 // CHECK25-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 10790 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 10791 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 10792 // CHECK25-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 10793 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 10794 // CHECK25-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 10795 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 10796 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 10797 // CHECK25-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 10798 // CHECK25-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 10799 // CHECK25-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 10800 // CHECK25-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 10801 // CHECK25-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV2]], align 8 10802 // CHECK25-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 10803 // CHECK25-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 10804 // CHECK25-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 8 10805 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 10806 // CHECK25-NEXT: ret void 10807 // 10808 // 10809 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..4 10810 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 10811 // CHECK25-NEXT: entry: 10812 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10813 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10814 // CHECK25-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 10815 // CHECK25-NEXT: [[A:%.*]] = alloca i32, align 4 10816 // CHECK25-NEXT: [[AA:%.*]] = alloca i16, align 2 10817 // CHECK25-NEXT: [[AAA:%.*]] = alloca i8, align 1 10818 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10819 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10820 // CHECK25-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 10821 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 10822 // CHECK25-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 10823 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 10824 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 10825 // CHECK25-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 10826 // CHECK25-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 10827 // CHECK25-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 10828 // CHECK25-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 10829 // CHECK25-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 10830 // CHECK25-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 10831 // CHECK25-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 10832 // CHECK25-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 8 10833 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 10834 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 10835 // CHECK25-NEXT: store i32 [[ADD]], i32* [[A]], align 4 10836 // CHECK25-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 10837 // CHECK25-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 10838 // CHECK25-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 10839 // CHECK25-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 10840 // CHECK25-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 10841 // CHECK25-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 10842 // CHECK25-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 10843 // CHECK25-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 10844 // CHECK25-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 10845 // CHECK25-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 10846 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i64 0, i64 2 10847 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 10848 // CHECK25-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 10849 // CHECK25-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 10850 // CHECK25-NEXT: ret void 10851 // 10852 // 10853 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 10854 // CHECK25-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 10855 // CHECK25-NEXT: entry: 10856 // CHECK25-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 10857 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 10858 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10859 // CHECK25-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 10860 // CHECK25-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 10861 // CHECK25-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 10862 // CHECK25-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 10863 // CHECK25-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 10864 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10865 // CHECK25-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 10866 // CHECK25-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 10867 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 10868 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 10869 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10870 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 10871 // CHECK25-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 10872 // CHECK25-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 10873 // CHECK25-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 8 10874 // CHECK25-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 10875 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 10876 // CHECK25-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 10877 // CHECK25-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 10878 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 10879 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 10880 // CHECK25-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 10881 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 10882 // CHECK25-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 8 10883 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 10884 // CHECK25-NEXT: ret void 10885 // 10886 // 10887 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..5 10888 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 10889 // CHECK25-NEXT: entry: 10890 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10891 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10892 // CHECK25-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 10893 // CHECK25-NEXT: [[B:%.*]] = alloca i32, align 4 10894 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10895 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10896 // CHECK25-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 10897 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 10898 // CHECK25-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 10899 // CHECK25-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 8 10900 // CHECK25-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 10901 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 10902 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 10903 // CHECK25-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 10904 // CHECK25-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 10905 // CHECK25-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 10906 // CHECK25-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8 10907 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 10908 // CHECK25-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 8 10909 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 10910 // CHECK25-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 10911 // CHECK25-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 10912 // CHECK25-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 10913 // CHECK25-NEXT: store double [[ADD]], double* [[A]], align 8 10914 // CHECK25-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 10915 // CHECK25-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 8 10916 // CHECK25-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 10917 // CHECK25-NEXT: store double [[INC]], double* [[A1]], align 8 10918 // CHECK25-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 10919 // CHECK25-NEXT: [[TMP13:%.*]] = mul nsw i64 1, [[TMP8]] 10920 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i64 [[TMP13]] 10921 // CHECK25-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 10922 // CHECK25-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 10923 // CHECK25-NEXT: ret void 10924 // 10925 // 10926 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 10927 // CHECK25-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 10928 // CHECK25-NEXT: entry: 10929 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 10930 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 10931 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 10932 // CHECK25-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 10933 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 10934 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 10935 // CHECK25-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 10936 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 10937 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 10938 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 10939 // CHECK25-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 10940 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 10941 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 10942 // CHECK25-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 10943 // CHECK25-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 10944 // CHECK25-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 10945 // CHECK25-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 10946 // CHECK25-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 8 10947 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 10948 // CHECK25-NEXT: ret void 10949 // 10950 // 10951 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..6 10952 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 10953 // CHECK25-NEXT: entry: 10954 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10955 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10956 // CHECK25-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 10957 // CHECK25-NEXT: [[A:%.*]] = alloca i32, align 4 10958 // CHECK25-NEXT: [[AA:%.*]] = alloca i16, align 2 10959 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10960 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10961 // CHECK25-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 10962 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 10963 // CHECK25-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 10964 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 10965 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 10966 // CHECK25-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 10967 // CHECK25-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 10968 // CHECK25-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 10969 // CHECK25-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 10970 // CHECK25-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 8 10971 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 10972 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 10973 // CHECK25-NEXT: store i32 [[ADD]], i32* [[A]], align 4 10974 // CHECK25-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 10975 // CHECK25-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 10976 // CHECK25-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 10977 // CHECK25-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 10978 // CHECK25-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 10979 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i64 0, i64 2 10980 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 10981 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 10982 // CHECK25-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 10983 // CHECK25-NEXT: ret void 10984 // 10985 // 10986 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 10987 // CHECK26-SAME: () #[[ATTR0:[0-9]+]] { 10988 // CHECK26-NEXT: entry: 10989 // CHECK26-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 10990 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 10991 // CHECK26-NEXT: ret void 10992 // 10993 // 10994 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined. 10995 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 10996 // CHECK26-NEXT: entry: 10997 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10998 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10999 // CHECK26-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 11000 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11001 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11002 // CHECK26-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 11003 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 11004 // CHECK26-NEXT: ret void 11005 // 11006 // 11007 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 11008 // CHECK26-SAME: (i64 [[AA:%.*]]) #[[ATTR0]] { 11009 // CHECK26-NEXT: entry: 11010 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 11011 // CHECK26-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 2 11012 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11013 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 11014 // CHECK26-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11015 // CHECK26-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 8 11016 // CHECK26-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 11017 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 11018 // CHECK26-NEXT: ret void 11019 // 11020 // 11021 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..1 11022 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11023 // CHECK26-NEXT: entry: 11024 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11025 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11026 // CHECK26-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 11027 // CHECK26-NEXT: [[AA:%.*]] = alloca i16, align 2 11028 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11029 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11030 // CHECK26-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 11031 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 11032 // CHECK26-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 11033 // CHECK26-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 11034 // CHECK26-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 11035 // CHECK26-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 11036 // CHECK26-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 11037 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 11038 // CHECK26-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 11039 // CHECK26-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 11040 // CHECK26-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11041 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 11042 // CHECK26-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 11043 // CHECK26-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 11044 // CHECK26-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 11045 // CHECK26: .cancel.exit: 11046 // CHECK26-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 11047 // CHECK26-NEXT: br label [[DOTCANCEL_CONTINUE]] 11048 // CHECK26: .cancel.continue: 11049 // CHECK26-NEXT: ret void 11050 // 11051 // 11052 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 11053 // CHECK26-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] { 11054 // CHECK26-NEXT: entry: 11055 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11056 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 11057 // CHECK26-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 11058 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11059 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11060 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11061 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 11062 // CHECK26-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11063 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 11064 // CHECK26-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 11065 // CHECK26-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11066 // CHECK26-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8 11067 // CHECK26-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 11068 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 11069 // CHECK26-NEXT: ret void 11070 // 11071 // 11072 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..2 11073 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11074 // CHECK26-NEXT: entry: 11075 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11076 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11077 // CHECK26-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 11078 // CHECK26-NEXT: [[A:%.*]] = alloca i32, align 4 11079 // CHECK26-NEXT: [[AA:%.*]] = alloca i16, align 2 11080 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11081 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11082 // CHECK26-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 11083 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 11084 // CHECK26-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 11085 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11086 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 11087 // CHECK26-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 11088 // CHECK26-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 11089 // CHECK26-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 11090 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 11091 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 11092 // CHECK26-NEXT: store i32 [[ADD]], i32* [[A]], align 4 11093 // CHECK26-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 11094 // CHECK26-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 11095 // CHECK26-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 11096 // CHECK26-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 11097 // CHECK26-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 11098 // CHECK26-NEXT: ret void 11099 // 11100 // 11101 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 11102 // CHECK26-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]]) #[[ATTR0]] { 11103 // CHECK26-NEXT: entry: 11104 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11105 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8 11106 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11107 // CHECK26-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8 11108 // CHECK26-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8 11109 // CHECK26-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 11110 // CHECK26-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8 11111 // CHECK26-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8 11112 // CHECK26-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8 11113 // CHECK26-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 11114 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11115 // CHECK26-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8 11116 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11117 // CHECK26-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8 11118 // CHECK26-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8 11119 // CHECK26-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 11120 // CHECK26-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8 11121 // CHECK26-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8 11122 // CHECK26-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8 11123 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11124 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8 11125 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11126 // CHECK26-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8 11127 // CHECK26-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8 11128 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 11129 // CHECK26-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8 11130 // CHECK26-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8 11131 // CHECK26-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8 11132 // CHECK26-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11133 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 11134 // CHECK26-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 8 11135 // CHECK26-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11136 // CHECK26-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 8 11137 // CHECK26-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 11138 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8 11139 // CHECK26-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 11140 // CHECK26-NEXT: store float* [[TMP2]], float** [[TMP12]], align 8 11141 // CHECK26-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 11142 // CHECK26-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 8 11143 // CHECK26-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 11144 // CHECK26-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8 11145 // CHECK26-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 11146 // CHECK26-NEXT: store i64 [[TMP5]], i64* [[TMP15]], align 8 11147 // CHECK26-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 11148 // CHECK26-NEXT: store double* [[TMP6]], double** [[TMP16]], align 8 11149 // CHECK26-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 11150 // CHECK26-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 8 11151 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 11152 // CHECK26-NEXT: ret void 11153 // 11154 // 11155 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..3 11156 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11157 // CHECK26-NEXT: entry: 11158 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11159 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11160 // CHECK26-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 11161 // CHECK26-NEXT: [[A:%.*]] = alloca i32, align 4 11162 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11163 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11164 // CHECK26-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 11165 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 11166 // CHECK26-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 11167 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 11168 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 11169 // CHECK26-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 11170 // CHECK26-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 8 11171 // CHECK26-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 2 11172 // CHECK26-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 11173 // CHECK26-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 3 11174 // CHECK26-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 8 11175 // CHECK26-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 4 11176 // CHECK26-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 8 11177 // CHECK26-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 5 11178 // CHECK26-NEXT: [[TMP12:%.*]] = load i64, i64* [[TMP11]], align 8 11179 // CHECK26-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 6 11180 // CHECK26-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP13]], align 8 11181 // CHECK26-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 7 11182 // CHECK26-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 8 11183 // CHECK26-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 8 11184 // CHECK26-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 8 11185 // CHECK26-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 11186 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 11187 // CHECK26-NEXT: store i32 [[ADD]], i32* [[A]], align 4 11188 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i64 0, i64 2 11189 // CHECK26-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 11190 // CHECK26-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 11191 // CHECK26-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 11192 // CHECK26-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 11193 // CHECK26-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 11194 // CHECK26-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i64 3 11195 // CHECK26-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 11196 // CHECK26-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 11197 // CHECK26-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 11198 // CHECK26-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 11199 // CHECK26-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 11200 // CHECK26-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i64 0, i64 1 11201 // CHECK26-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i64 0, i64 2 11202 // CHECK26-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 11203 // CHECK26-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 11204 // CHECK26-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 11205 // CHECK26-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP14]] 11206 // CHECK26-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 [[TMP23]] 11207 // CHECK26-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i64 3 11208 // CHECK26-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 11209 // CHECK26-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 11210 // CHECK26-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 11211 // CHECK26-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 11212 // CHECK26-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8 11213 // CHECK26-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 11214 // CHECK26-NEXT: store i64 [[ADD13]], i64* [[X]], align 8 11215 // CHECK26-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 11216 // CHECK26-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8 11217 // CHECK26-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 11218 // CHECK26-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 11219 // CHECK26-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 11220 // CHECK26-NEXT: store i8 [[CONV16]], i8* [[Y]], align 8 11221 // CHECK26-NEXT: ret void 11222 // 11223 // 11224 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 11225 // CHECK26-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 11226 // CHECK26-NEXT: entry: 11227 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11228 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 11229 // CHECK26-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8 11230 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 11231 // CHECK26-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 8 11232 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11233 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11234 // CHECK26-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8 11235 // CHECK26-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 11236 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11237 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 11238 // CHECK26-NEXT: [[CONV2:%.*]] = bitcast i64* [[AAA_ADDR]] to i8* 11239 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 11240 // CHECK26-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11241 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 11242 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 11243 // CHECK26-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11244 // CHECK26-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 11245 // CHECK26-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 11246 // CHECK26-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 11247 // CHECK26-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV2]], align 8 11248 // CHECK26-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 11249 // CHECK26-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 11250 // CHECK26-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 8 11251 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 11252 // CHECK26-NEXT: ret void 11253 // 11254 // 11255 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..4 11256 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11257 // CHECK26-NEXT: entry: 11258 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11259 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11260 // CHECK26-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 11261 // CHECK26-NEXT: [[A:%.*]] = alloca i32, align 4 11262 // CHECK26-NEXT: [[AA:%.*]] = alloca i16, align 2 11263 // CHECK26-NEXT: [[AAA:%.*]] = alloca i8, align 1 11264 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11265 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11266 // CHECK26-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 11267 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 11268 // CHECK26-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 11269 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 11270 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 11271 // CHECK26-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 11272 // CHECK26-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 11273 // CHECK26-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 11274 // CHECK26-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 11275 // CHECK26-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 11276 // CHECK26-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 11277 // CHECK26-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 11278 // CHECK26-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 8 11279 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 11280 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 11281 // CHECK26-NEXT: store i32 [[ADD]], i32* [[A]], align 4 11282 // CHECK26-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 11283 // CHECK26-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 11284 // CHECK26-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 11285 // CHECK26-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 11286 // CHECK26-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 11287 // CHECK26-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 11288 // CHECK26-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 11289 // CHECK26-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 11290 // CHECK26-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 11291 // CHECK26-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 11292 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i64 0, i64 2 11293 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 11294 // CHECK26-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 11295 // CHECK26-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 11296 // CHECK26-NEXT: ret void 11297 // 11298 // 11299 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 11300 // CHECK26-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 11301 // CHECK26-NEXT: entry: 11302 // CHECK26-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8 11303 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 11304 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11305 // CHECK26-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 11306 // CHECK26-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8 11307 // CHECK26-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 11308 // CHECK26-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8 11309 // CHECK26-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8 11310 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11311 // CHECK26-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 11312 // CHECK26-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8 11313 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8 11314 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32* 11315 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11316 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 11317 // CHECK26-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8 11318 // CHECK26-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11319 // CHECK26-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 8 11320 // CHECK26-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11321 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 11322 // CHECK26-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 11323 // CHECK26-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 11324 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8 11325 // CHECK26-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 11326 // CHECK26-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8 11327 // CHECK26-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 11328 // CHECK26-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 8 11329 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 11330 // CHECK26-NEXT: ret void 11331 // 11332 // 11333 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..5 11334 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11335 // CHECK26-NEXT: entry: 11336 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11337 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11338 // CHECK26-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 11339 // CHECK26-NEXT: [[B:%.*]] = alloca i32, align 4 11340 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11341 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11342 // CHECK26-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 11343 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 11344 // CHECK26-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 11345 // CHECK26-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 8 11346 // CHECK26-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 11347 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 8 11348 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 11349 // CHECK26-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 11350 // CHECK26-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 11351 // CHECK26-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 11352 // CHECK26-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8 11353 // CHECK26-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 11354 // CHECK26-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 8 11355 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 11356 // CHECK26-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 11357 // CHECK26-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 11358 // CHECK26-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 11359 // CHECK26-NEXT: store double [[ADD]], double* [[A]], align 8 11360 // CHECK26-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 11361 // CHECK26-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 8 11362 // CHECK26-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 11363 // CHECK26-NEXT: store double [[INC]], double* [[A1]], align 8 11364 // CHECK26-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 11365 // CHECK26-NEXT: [[TMP13:%.*]] = mul nsw i64 1, [[TMP8]] 11366 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i64 [[TMP13]] 11367 // CHECK26-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1 11368 // CHECK26-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 11369 // CHECK26-NEXT: ret void 11370 // 11371 // 11372 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 11373 // CHECK26-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 11374 // CHECK26-NEXT: entry: 11375 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 11376 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 11377 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 11378 // CHECK26-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 11379 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 11380 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8 11381 // CHECK26-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 11382 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 11383 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16* 11384 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 11385 // CHECK26-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11386 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 11387 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 8 11388 // CHECK26-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11389 // CHECK26-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV1]], align 8 11390 // CHECK26-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 11391 // CHECK26-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 11392 // CHECK26-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 8 11393 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 11394 // CHECK26-NEXT: ret void 11395 // 11396 // 11397 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..6 11398 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11399 // CHECK26-NEXT: entry: 11400 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11401 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11402 // CHECK26-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 11403 // CHECK26-NEXT: [[A:%.*]] = alloca i32, align 4 11404 // CHECK26-NEXT: [[AA:%.*]] = alloca i16, align 2 11405 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11406 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11407 // CHECK26-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 11408 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 11409 // CHECK26-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 11410 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 8 11411 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 11412 // CHECK26-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 11413 // CHECK26-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 11414 // CHECK26-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 11415 // CHECK26-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 11416 // CHECK26-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 8 11417 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 11418 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 11419 // CHECK26-NEXT: store i32 [[ADD]], i32* [[A]], align 4 11420 // CHECK26-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 11421 // CHECK26-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 11422 // CHECK26-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 11423 // CHECK26-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 11424 // CHECK26-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 11425 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i64 0, i64 2 11426 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 11427 // CHECK26-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 11428 // CHECK26-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 11429 // CHECK26-NEXT: ret void 11430 // 11431 // 11432 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 11433 // CHECK27-SAME: () #[[ATTR0:[0-9]+]] { 11434 // CHECK27-NEXT: entry: 11435 // CHECK27-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 11436 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 11437 // CHECK27-NEXT: ret void 11438 // 11439 // 11440 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined. 11441 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11442 // CHECK27-NEXT: entry: 11443 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11444 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11445 // CHECK27-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 11446 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11447 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11448 // CHECK27-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 11449 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 11450 // CHECK27-NEXT: ret void 11451 // 11452 // 11453 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 11454 // CHECK27-SAME: (i32 [[AA:%.*]]) #[[ATTR0]] { 11455 // CHECK27-NEXT: entry: 11456 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 11457 // CHECK27-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 2 11458 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 11459 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 11460 // CHECK27-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11461 // CHECK27-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 4 11462 // CHECK27-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 11463 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 11464 // CHECK27-NEXT: ret void 11465 // 11466 // 11467 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1 11468 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11469 // CHECK27-NEXT: entry: 11470 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11471 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11472 // CHECK27-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 4 11473 // CHECK27-NEXT: [[AA:%.*]] = alloca i16, align 2 11474 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11475 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11476 // CHECK27-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 4 11477 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 4 11478 // CHECK27-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 11479 // CHECK27-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 11480 // CHECK27-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 11481 // CHECK27-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 11482 // CHECK27-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 11483 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 11484 // CHECK27-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 11485 // CHECK27-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 11486 // CHECK27-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11487 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 11488 // CHECK27-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 11489 // CHECK27-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 11490 // CHECK27-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 11491 // CHECK27: .cancel.exit: 11492 // CHECK27-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 11493 // CHECK27-NEXT: br label [[DOTCANCEL_CONTINUE]] 11494 // CHECK27: .cancel.continue: 11495 // CHECK27-NEXT: ret void 11496 // 11497 // 11498 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 11499 // CHECK27-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] { 11500 // CHECK27-NEXT: entry: 11501 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 11502 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 11503 // CHECK27-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 11504 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 11505 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 11506 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 11507 // CHECK27-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11508 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 11509 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 11510 // CHECK27-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11511 // CHECK27-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4 11512 // CHECK27-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 11513 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 11514 // CHECK27-NEXT: ret void 11515 // 11516 // 11517 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..2 11518 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11519 // CHECK27-NEXT: entry: 11520 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11521 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11522 // CHECK27-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 11523 // CHECK27-NEXT: [[A:%.*]] = alloca i32, align 4 11524 // CHECK27-NEXT: [[AA:%.*]] = alloca i16, align 2 11525 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11526 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11527 // CHECK27-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 11528 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 11529 // CHECK27-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 11530 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11531 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 11532 // CHECK27-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 11533 // CHECK27-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 11534 // CHECK27-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 11535 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 11536 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 11537 // CHECK27-NEXT: store i32 [[ADD]], i32* [[A]], align 4 11538 // CHECK27-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 11539 // CHECK27-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 11540 // CHECK27-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 11541 // CHECK27-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 11542 // CHECK27-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 11543 // CHECK27-NEXT: ret void 11544 // 11545 // 11546 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 11547 // CHECK27-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]]) #[[ATTR0]] { 11548 // CHECK27-NEXT: entry: 11549 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 11550 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 11551 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11552 // CHECK27-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 11553 // CHECK27-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 11554 // CHECK27-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 11555 // CHECK27-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 11556 // CHECK27-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 11557 // CHECK27-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 11558 // CHECK27-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 4 11559 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 11560 // CHECK27-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 11561 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 11562 // CHECK27-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 11563 // CHECK27-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 11564 // CHECK27-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 11565 // CHECK27-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 11566 // CHECK27-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 11567 // CHECK27-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 11568 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 11569 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 11570 // CHECK27-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 11571 // CHECK27-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 11572 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 11573 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 11574 // CHECK27-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 11575 // CHECK27-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 11576 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11577 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 11578 // CHECK27-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 11579 // CHECK27-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11580 // CHECK27-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 4 11581 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 11582 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP11]], align 4 11583 // CHECK27-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 11584 // CHECK27-NEXT: store float* [[TMP2]], float** [[TMP12]], align 4 11585 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 11586 // CHECK27-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 4 11587 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 11588 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4 11589 // CHECK27-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 11590 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 11591 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 11592 // CHECK27-NEXT: store double* [[TMP6]], double** [[TMP16]], align 4 11593 // CHECK27-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 11594 // CHECK27-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 4 11595 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 11596 // CHECK27-NEXT: ret void 11597 // 11598 // 11599 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..3 11600 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11601 // CHECK27-NEXT: entry: 11602 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11603 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11604 // CHECK27-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 4 11605 // CHECK27-NEXT: [[A:%.*]] = alloca i32, align 4 11606 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11607 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11608 // CHECK27-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 4 11609 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 4 11610 // CHECK27-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 11611 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11612 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 11613 // CHECK27-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 11614 // CHECK27-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 4 11615 // CHECK27-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 2 11616 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 11617 // CHECK27-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 3 11618 // CHECK27-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 4 11619 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 4 11620 // CHECK27-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 4 11621 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 5 11622 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 11623 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 6 11624 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 11625 // CHECK27-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 7 11626 // CHECK27-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 4 11627 // CHECK27-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 8 11628 // CHECK27-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 4 11629 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 11630 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 11631 // CHECK27-NEXT: store i32 [[ADD]], i32* [[A]], align 4 11632 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i32 0, i32 2 11633 // CHECK27-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 11634 // CHECK27-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 11635 // CHECK27-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 11636 // CHECK27-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 11637 // CHECK27-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 11638 // CHECK27-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i32 3 11639 // CHECK27-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 11640 // CHECK27-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 11641 // CHECK27-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 11642 // CHECK27-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 11643 // CHECK27-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 11644 // CHECK27-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i32 0, i32 1 11645 // CHECK27-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i32 0, i32 2 11646 // CHECK27-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 11647 // CHECK27-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 11648 // CHECK27-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 11649 // CHECK27-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP14]] 11650 // CHECK27-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i32 [[TMP23]] 11651 // CHECK27-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i32 3 11652 // CHECK27-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 11653 // CHECK27-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 11654 // CHECK27-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 11655 // CHECK27-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 11656 // CHECK27-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4 11657 // CHECK27-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 11658 // CHECK27-NEXT: store i64 [[ADD13]], i64* [[X]], align 4 11659 // CHECK27-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 11660 // CHECK27-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4 11661 // CHECK27-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 11662 // CHECK27-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 11663 // CHECK27-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 11664 // CHECK27-NEXT: store i8 [[CONV16]], i8* [[Y]], align 4 11665 // CHECK27-NEXT: ret void 11666 // 11667 // 11668 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 11669 // CHECK27-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 11670 // CHECK27-NEXT: entry: 11671 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 11672 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 11673 // CHECK27-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 11674 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 11675 // CHECK27-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 11676 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 11677 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 11678 // CHECK27-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 11679 // CHECK27-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 11680 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 11681 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 11682 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 11683 // CHECK27-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11684 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 11685 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 11686 // CHECK27-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11687 // CHECK27-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 11688 // CHECK27-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 11689 // CHECK27-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 11690 // CHECK27-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV1]], align 4 11691 // CHECK27-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 11692 // CHECK27-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 11693 // CHECK27-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 4 11694 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 11695 // CHECK27-NEXT: ret void 11696 // 11697 // 11698 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..4 11699 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11700 // CHECK27-NEXT: entry: 11701 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11702 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11703 // CHECK27-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 4 11704 // CHECK27-NEXT: [[A:%.*]] = alloca i32, align 4 11705 // CHECK27-NEXT: [[AA:%.*]] = alloca i16, align 2 11706 // CHECK27-NEXT: [[AAA:%.*]] = alloca i8, align 1 11707 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11708 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11709 // CHECK27-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 4 11710 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 4 11711 // CHECK27-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 11712 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11713 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 11714 // CHECK27-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 11715 // CHECK27-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 11716 // CHECK27-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 11717 // CHECK27-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 11718 // CHECK27-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 11719 // CHECK27-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 11720 // CHECK27-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 11721 // CHECK27-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 4 11722 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 11723 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 11724 // CHECK27-NEXT: store i32 [[ADD]], i32* [[A]], align 4 11725 // CHECK27-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 11726 // CHECK27-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 11727 // CHECK27-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 11728 // CHECK27-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 11729 // CHECK27-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 11730 // CHECK27-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 11731 // CHECK27-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 11732 // CHECK27-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 11733 // CHECK27-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 11734 // CHECK27-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 11735 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i32 0, i32 2 11736 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 11737 // CHECK27-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 11738 // CHECK27-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 11739 // CHECK27-NEXT: ret void 11740 // 11741 // 11742 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 11743 // CHECK27-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 11744 // CHECK27-NEXT: entry: 11745 // CHECK27-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 11746 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 11747 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11748 // CHECK27-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 11749 // CHECK27-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 11750 // CHECK27-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 4 11751 // CHECK27-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 11752 // CHECK27-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 11753 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 11754 // CHECK27-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 11755 // CHECK27-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 11756 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 11757 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 11758 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 11759 // CHECK27-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 11760 // CHECK27-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11761 // CHECK27-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 4 11762 // CHECK27-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11763 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[B_ADDR]], align 4 11764 // CHECK27-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 11765 // CHECK27-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 11766 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 11767 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 11768 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 11769 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 11770 // CHECK27-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 4 11771 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 11772 // CHECK27-NEXT: ret void 11773 // 11774 // 11775 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..5 11776 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11777 // CHECK27-NEXT: entry: 11778 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11779 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11780 // CHECK27-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 4 11781 // CHECK27-NEXT: [[B:%.*]] = alloca i32, align 4 11782 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11783 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11784 // CHECK27-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 4 11785 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 4 11786 // CHECK27-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 11787 // CHECK27-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 4 11788 // CHECK27-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 11789 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 11790 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 11791 // CHECK27-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 11792 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 11793 // CHECK27-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 11794 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 11795 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 11796 // CHECK27-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 4 11797 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 11798 // CHECK27-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 11799 // CHECK27-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 11800 // CHECK27-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 11801 // CHECK27-NEXT: store double [[ADD]], double* [[A]], align 4 11802 // CHECK27-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 11803 // CHECK27-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 4 11804 // CHECK27-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 11805 // CHECK27-NEXT: store double [[INC]], double* [[A1]], align 4 11806 // CHECK27-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 11807 // CHECK27-NEXT: [[TMP13:%.*]] = mul nsw i32 1, [[TMP8]] 11808 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i32 [[TMP13]] 11809 // CHECK27-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 11810 // CHECK27-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 11811 // CHECK27-NEXT: ret void 11812 // 11813 // 11814 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 11815 // CHECK27-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 11816 // CHECK27-NEXT: entry: 11817 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 11818 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 11819 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 11820 // CHECK27-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 4 11821 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 11822 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 11823 // CHECK27-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 11824 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 11825 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 11826 // CHECK27-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11827 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 11828 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 11829 // CHECK27-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11830 // CHECK27-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 11831 // CHECK27-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 11832 // CHECK27-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 11833 // CHECK27-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 4 11834 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 11835 // CHECK27-NEXT: ret void 11836 // 11837 // 11838 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..6 11839 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11840 // CHECK27-NEXT: entry: 11841 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11842 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11843 // CHECK27-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 4 11844 // CHECK27-NEXT: [[A:%.*]] = alloca i32, align 4 11845 // CHECK27-NEXT: [[AA:%.*]] = alloca i16, align 2 11846 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11847 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11848 // CHECK27-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 4 11849 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 4 11850 // CHECK27-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 11851 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11852 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 11853 // CHECK27-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 11854 // CHECK27-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 11855 // CHECK27-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 11856 // CHECK27-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 11857 // CHECK27-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 4 11858 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 11859 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 11860 // CHECK27-NEXT: store i32 [[ADD]], i32* [[A]], align 4 11861 // CHECK27-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 11862 // CHECK27-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 11863 // CHECK27-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 11864 // CHECK27-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 11865 // CHECK27-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 11866 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i32 0, i32 2 11867 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 11868 // CHECK27-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 11869 // CHECK27-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 11870 // CHECK27-NEXT: ret void 11871 // 11872 // 11873 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l100 11874 // CHECK28-SAME: () #[[ATTR0:[0-9]+]] { 11875 // CHECK28-NEXT: entry: 11876 // CHECK28-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 11877 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 11878 // CHECK28-NEXT: ret void 11879 // 11880 // 11881 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined. 11882 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11883 // CHECK28-NEXT: entry: 11884 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11885 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11886 // CHECK28-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 4 11887 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11888 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11889 // CHECK28-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 4 11890 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 4 11891 // CHECK28-NEXT: ret void 11892 // 11893 // 11894 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l110 11895 // CHECK28-SAME: (i32 [[AA:%.*]]) #[[ATTR0]] { 11896 // CHECK28-NEXT: entry: 11897 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 11898 // CHECK28-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 2 11899 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 11900 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 11901 // CHECK28-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11902 // CHECK28-NEXT: [[TMP1:%.*]] = load i16, i16* [[CONV]], align 4 11903 // CHECK28-NEXT: store i16 [[TMP1]], i16* [[TMP0]], align 2 11904 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 11905 // CHECK28-NEXT: ret void 11906 // 11907 // 11908 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..1 11909 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11910 // CHECK28-NEXT: entry: 11911 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11912 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11913 // CHECK28-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 4 11914 // CHECK28-NEXT: [[AA:%.*]] = alloca i16, align 2 11915 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11916 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11917 // CHECK28-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 4 11918 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 4 11919 // CHECK28-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 11920 // CHECK28-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 11921 // CHECK28-NEXT: store i16 [[TMP2]], i16* [[AA]], align 2 11922 // CHECK28-NEXT: [[TMP3:%.*]] = load i16, i16* [[AA]], align 2 11923 // CHECK28-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32 11924 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 1 11925 // CHECK28-NEXT: [[CONV1:%.*]] = trunc i32 [[ADD]] to i16 11926 // CHECK28-NEXT: store i16 [[CONV1]], i16* [[AA]], align 2 11927 // CHECK28-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11928 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 11929 // CHECK28-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1) 11930 // CHECK28-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0 11931 // CHECK28-NEXT: br i1 [[TMP7]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 11932 // CHECK28: .cancel.exit: 11933 // CHECK28-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_cancel_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]]) 11934 // CHECK28-NEXT: br label [[DOTCANCEL_CONTINUE]] 11935 // CHECK28: .cancel.continue: 11936 // CHECK28-NEXT: ret void 11937 // 11938 // 11939 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l119 11940 // CHECK28-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] { 11941 // CHECK28-NEXT: entry: 11942 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 11943 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 11944 // CHECK28-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 11945 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 11946 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 11947 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 11948 // CHECK28-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 11949 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4 11950 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP0]], align 4 11951 // CHECK28-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 11952 // CHECK28-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4 11953 // CHECK28-NEXT: store i16 [[TMP3]], i16* [[TMP2]], align 4 11954 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 11955 // CHECK28-NEXT: ret void 11956 // 11957 // 11958 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..2 11959 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 11960 // CHECK28-NEXT: entry: 11961 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11962 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11963 // CHECK28-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 4 11964 // CHECK28-NEXT: [[A:%.*]] = alloca i32, align 4 11965 // CHECK28-NEXT: [[AA:%.*]] = alloca i16, align 2 11966 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11967 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11968 // CHECK28-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 4 11969 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 4 11970 // CHECK28-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 11971 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11972 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 11973 // CHECK28-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 11974 // CHECK28-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 11975 // CHECK28-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 11976 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4 11977 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 11978 // CHECK28-NEXT: store i32 [[ADD]], i32* [[A]], align 4 11979 // CHECK28-NEXT: [[TMP6:%.*]] = load i16, i16* [[AA]], align 2 11980 // CHECK28-NEXT: [[CONV:%.*]] = sext i16 [[TMP6]] to i32 11981 // CHECK28-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 11982 // CHECK28-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 11983 // CHECK28-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 11984 // CHECK28-NEXT: ret void 11985 // 11986 // 11987 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l144 11988 // CHECK28-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]]) #[[ATTR0]] { 11989 // CHECK28-NEXT: entry: 11990 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 11991 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4 11992 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11993 // CHECK28-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4 11994 // CHECK28-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4 11995 // CHECK28-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 11996 // CHECK28-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4 11997 // CHECK28-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4 11998 // CHECK28-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4 11999 // CHECK28-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 4 12000 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 12001 // CHECK28-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4 12002 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12003 // CHECK28-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4 12004 // CHECK28-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4 12005 // CHECK28-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 12006 // CHECK28-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4 12007 // CHECK28-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4 12008 // CHECK28-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4 12009 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4 12010 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12011 // CHECK28-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4 12012 // CHECK28-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4 12013 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 12014 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4 12015 // CHECK28-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4 12016 // CHECK28-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4 12017 // CHECK28-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 12018 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4 12019 // CHECK28-NEXT: store i32 [[TMP9]], i32* [[TMP8]], align 4 12020 // CHECK28-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 12021 // CHECK28-NEXT: store [10 x float]* [[TMP0]], [10 x float]** [[TMP10]], align 4 12022 // CHECK28-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 12023 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP11]], align 4 12024 // CHECK28-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 12025 // CHECK28-NEXT: store float* [[TMP2]], float** [[TMP12]], align 4 12026 // CHECK28-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 12027 // CHECK28-NEXT: store [5 x [10 x double]]* [[TMP3]], [5 x [10 x double]]** [[TMP13]], align 4 12028 // CHECK28-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 12029 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4 12030 // CHECK28-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 6 12031 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 12032 // CHECK28-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 7 12033 // CHECK28-NEXT: store double* [[TMP6]], double** [[TMP16]], align 4 12034 // CHECK28-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 8 12035 // CHECK28-NEXT: store %struct.TT* [[TMP7]], %struct.TT** [[TMP17]], align 4 12036 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 12037 // CHECK28-NEXT: ret void 12038 // 12039 // 12040 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..3 12041 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 12042 // CHECK28-NEXT: entry: 12043 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12044 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12045 // CHECK28-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 4 12046 // CHECK28-NEXT: [[A:%.*]] = alloca i32, align 4 12047 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12048 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12049 // CHECK28-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 4 12050 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 4 12051 // CHECK28-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 12052 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 12053 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 12054 // CHECK28-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 12055 // CHECK28-NEXT: [[TMP4:%.*]] = load [10 x float]*, [10 x float]** [[TMP3]], align 4 12056 // CHECK28-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 2 12057 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 12058 // CHECK28-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 3 12059 // CHECK28-NEXT: [[TMP8:%.*]] = load float*, float** [[TMP7]], align 4 12060 // CHECK28-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 4 12061 // CHECK28-NEXT: [[TMP10:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[TMP9]], align 4 12062 // CHECK28-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 5 12063 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 12064 // CHECK28-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 6 12065 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 12066 // CHECK28-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 7 12067 // CHECK28-NEXT: [[TMP16:%.*]] = load double*, double** [[TMP15]], align 4 12068 // CHECK28-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 8 12069 // CHECK28-NEXT: [[TMP18:%.*]] = load %struct.TT*, %struct.TT** [[TMP17]], align 4 12070 // CHECK28-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 12071 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], 1 12072 // CHECK28-NEXT: store i32 [[ADD]], i32* [[A]], align 4 12073 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP4]], i32 0, i32 2 12074 // CHECK28-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4 12075 // CHECK28-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double 12076 // CHECK28-NEXT: [[ADD1:%.*]] = fadd double [[CONV]], 1.000000e+00 12077 // CHECK28-NEXT: [[CONV2:%.*]] = fptrunc double [[ADD1]] to float 12078 // CHECK28-NEXT: store float [[CONV2]], float* [[ARRAYIDX]], align 4 12079 // CHECK28-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[TMP8]], i32 3 12080 // CHECK28-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX3]], align 4 12081 // CHECK28-NEXT: [[CONV4:%.*]] = fpext float [[TMP21]] to double 12082 // CHECK28-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.000000e+00 12083 // CHECK28-NEXT: [[CONV6:%.*]] = fptrunc double [[ADD5]] to float 12084 // CHECK28-NEXT: store float [[CONV6]], float* [[ARRAYIDX3]], align 4 12085 // CHECK28-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP10]], i32 0, i32 1 12086 // CHECK28-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX7]], i32 0, i32 2 12087 // CHECK28-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX8]], align 8 12088 // CHECK28-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], 1.000000e+00 12089 // CHECK28-NEXT: store double [[ADD9]], double* [[ARRAYIDX8]], align 8 12090 // CHECK28-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP14]] 12091 // CHECK28-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP16]], i32 [[TMP23]] 12092 // CHECK28-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX10]], i32 3 12093 // CHECK28-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX11]], align 8 12094 // CHECK28-NEXT: [[ADD12:%.*]] = fadd double [[TMP24]], 1.000000e+00 12095 // CHECK28-NEXT: store double [[ADD12]], double* [[ARRAYIDX11]], align 8 12096 // CHECK28-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP18]], i32 0, i32 0 12097 // CHECK28-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4 12098 // CHECK28-NEXT: [[ADD13:%.*]] = add nsw i64 [[TMP25]], 1 12099 // CHECK28-NEXT: store i64 [[ADD13]], i64* [[X]], align 4 12100 // CHECK28-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP18]], i32 0, i32 1 12101 // CHECK28-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4 12102 // CHECK28-NEXT: [[CONV14:%.*]] = sext i8 [[TMP26]] to i32 12103 // CHECK28-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1 12104 // CHECK28-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i8 12105 // CHECK28-NEXT: store i8 [[CONV16]], i8* [[Y]], align 4 12106 // CHECK28-NEXT: ret void 12107 // 12108 // 12109 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l198 12110 // CHECK28-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 12111 // CHECK28-NEXT: entry: 12112 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 12113 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 12114 // CHECK28-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4 12115 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 12116 // CHECK28-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 4 12117 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 12118 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 12119 // CHECK28-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4 12120 // CHECK28-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 12121 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 12122 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8* 12123 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 12124 // CHECK28-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 12125 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 12126 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 12127 // CHECK28-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 12128 // CHECK28-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 12129 // CHECK28-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 12130 // CHECK28-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 12131 // CHECK28-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV1]], align 4 12132 // CHECK28-NEXT: store i8 [[TMP6]], i8* [[TMP5]], align 2 12133 // CHECK28-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 12134 // CHECK28-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP7]], align 4 12135 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 12136 // CHECK28-NEXT: ret void 12137 // 12138 // 12139 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..4 12140 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 12141 // CHECK28-NEXT: entry: 12142 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12143 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12144 // CHECK28-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 4 12145 // CHECK28-NEXT: [[A:%.*]] = alloca i32, align 4 12146 // CHECK28-NEXT: [[AA:%.*]] = alloca i16, align 2 12147 // CHECK28-NEXT: [[AAA:%.*]] = alloca i8, align 1 12148 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12149 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12150 // CHECK28-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 4 12151 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 4 12152 // CHECK28-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 12153 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 12154 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 12155 // CHECK28-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 12156 // CHECK28-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 12157 // CHECK28-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 12158 // CHECK28-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 12159 // CHECK28-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 2 12160 // CHECK28-NEXT: store i8 [[TMP6]], i8* [[AAA]], align 1 12161 // CHECK28-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 12162 // CHECK28-NEXT: [[TMP8:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP7]], align 4 12163 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[A]], align 4 12164 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 1 12165 // CHECK28-NEXT: store i32 [[ADD]], i32* [[A]], align 4 12166 // CHECK28-NEXT: [[TMP10:%.*]] = load i16, i16* [[AA]], align 2 12167 // CHECK28-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32 12168 // CHECK28-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 12169 // CHECK28-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 12170 // CHECK28-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 12171 // CHECK28-NEXT: [[TMP11:%.*]] = load i8, i8* [[AAA]], align 1 12172 // CHECK28-NEXT: [[CONV3:%.*]] = sext i8 [[TMP11]] to i32 12173 // CHECK28-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1 12174 // CHECK28-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i8 12175 // CHECK28-NEXT: store i8 [[CONV5]], i8* [[AAA]], align 1 12176 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP8]], i32 0, i32 2 12177 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 12178 // CHECK28-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 12179 // CHECK28-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4 12180 // CHECK28-NEXT: ret void 12181 // 12182 // 12183 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l216 12184 // CHECK28-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] { 12185 // CHECK28-NEXT: entry: 12186 // CHECK28-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4 12187 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 12188 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12189 // CHECK28-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 12190 // CHECK28-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4 12191 // CHECK28-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 4 12192 // CHECK28-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4 12193 // CHECK28-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4 12194 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12195 // CHECK28-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 12196 // CHECK28-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4 12197 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4 12198 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12199 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 12200 // CHECK28-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4 12201 // CHECK28-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 12202 // CHECK28-NEXT: store %struct.S1* [[TMP0]], %struct.S1** [[TMP4]], align 4 12203 // CHECK28-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 12204 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[B_ADDR]], align 4 12205 // CHECK28-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 12206 // CHECK28-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 12207 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4 12208 // CHECK28-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 12209 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4 12210 // CHECK28-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 12211 // CHECK28-NEXT: store i16* [[TMP3]], i16** [[TMP9]], align 4 12212 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_]]) 12213 // CHECK28-NEXT: ret void 12214 // 12215 // 12216 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..5 12217 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 12218 // CHECK28-NEXT: entry: 12219 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12220 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12221 // CHECK28-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 4 12222 // CHECK28-NEXT: [[B:%.*]] = alloca i32, align 4 12223 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12224 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12225 // CHECK28-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 4 12226 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 4 12227 // CHECK28-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 12228 // CHECK28-NEXT: [[TMP2:%.*]] = load %struct.S1*, %struct.S1** [[TMP1]], align 4 12229 // CHECK28-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 12230 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 12231 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[B]], align 4 12232 // CHECK28-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 12233 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 12234 // CHECK28-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 12235 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 12236 // CHECK28-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 12237 // CHECK28-NEXT: [[TMP10:%.*]] = load i16*, i16** [[TMP9]], align 4 12238 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[B]], align 4 12239 // CHECK28-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP11]] to double 12240 // CHECK28-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 12241 // CHECK28-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP2]], i32 0, i32 0 12242 // CHECK28-NEXT: store double [[ADD]], double* [[A]], align 4 12243 // CHECK28-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP2]], i32 0, i32 0 12244 // CHECK28-NEXT: [[TMP12:%.*]] = load double, double* [[A1]], align 4 12245 // CHECK28-NEXT: [[INC:%.*]] = fadd double [[TMP12]], 1.000000e+00 12246 // CHECK28-NEXT: store double [[INC]], double* [[A1]], align 4 12247 // CHECK28-NEXT: [[CONV2:%.*]] = fptosi double [[INC]] to i16 12248 // CHECK28-NEXT: [[TMP13:%.*]] = mul nsw i32 1, [[TMP8]] 12249 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP10]], i32 [[TMP13]] 12250 // CHECK28-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1 12251 // CHECK28-NEXT: store i16 [[CONV2]], i16* [[ARRAYIDX3]], align 2 12252 // CHECK28-NEXT: ret void 12253 // 12254 // 12255 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l181 12256 // CHECK28-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] { 12257 // CHECK28-NEXT: entry: 12258 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 12259 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 12260 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 12261 // CHECK28-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 4 12262 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 12263 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4 12264 // CHECK28-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 12265 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16* 12266 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 12267 // CHECK28-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 12268 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 12269 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4 12270 // CHECK28-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 12271 // CHECK28-NEXT: [[TMP4:%.*]] = load i16, i16* [[CONV]], align 4 12272 // CHECK28-NEXT: store i16 [[TMP4]], i16* [[TMP3]], align 4 12273 // CHECK28-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 12274 // CHECK28-NEXT: store [10 x i32]* [[TMP0]], [10 x i32]** [[TMP5]], align 4 12275 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 12276 // CHECK28-NEXT: ret void 12277 // 12278 // 12279 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..6 12280 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR0]] { 12281 // CHECK28-NEXT: entry: 12282 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12283 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12284 // CHECK28-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 4 12285 // CHECK28-NEXT: [[A:%.*]] = alloca i32, align 4 12286 // CHECK28-NEXT: [[AA:%.*]] = alloca i16, align 2 12287 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12288 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12289 // CHECK28-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 4 12290 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 4 12291 // CHECK28-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 12292 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 12293 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[A]], align 4 12294 // CHECK28-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 12295 // CHECK28-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4 12296 // CHECK28-NEXT: store i16 [[TMP4]], i16* [[AA]], align 2 12297 // CHECK28-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 12298 // CHECK28-NEXT: [[TMP6:%.*]] = load [10 x i32]*, [10 x i32]** [[TMP5]], align 4 12299 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4 12300 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1 12301 // CHECK28-NEXT: store i32 [[ADD]], i32* [[A]], align 4 12302 // CHECK28-NEXT: [[TMP8:%.*]] = load i16, i16* [[AA]], align 2 12303 // CHECK28-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 12304 // CHECK28-NEXT: [[ADD1:%.*]] = add nsw i32 [[CONV]], 1 12305 // CHECK28-NEXT: [[CONV2:%.*]] = trunc i32 [[ADD1]] to i16 12306 // CHECK28-NEXT: store i16 [[CONV2]], i16* [[AA]], align 2 12307 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP6]], i32 0, i32 2 12308 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 12309 // CHECK28-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 12310 // CHECK28-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 12311 // CHECK28-NEXT: ret void 12312 // 12313