1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s
3 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
4 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s
5 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s
6 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
7 // expected-no-diagnostics
8 #ifndef HEADER
9 #define HEADER
10 
11 // CHECK-DAG: [[TT:%.+]] = type { i64, i8 }
12 // CHECK-DAG: [[S1:%.+]] = type { double }
13 
14 // We have 8 target regions, but only 7 that actually will generate offloading
15 // code, only 6 will have mapped arguments, and only 4 have all-constant map
16 // sizes.
17 
18 // CHECK-DAG: [[SIZET2:@.+]] = private unnamed_addr constant [1 x i{{32|64}}] [i[[SZ:32|64]] 2]
19 // CHECK-DAG: [[MAPT2:@.+]] = private unnamed_addr constant [1 x i32] [i32 3]
20 // CHECK-DAG: [[SIZET3:@.+]] = private unnamed_addr constant [2 x i[[SZ]]] [i[[SZ]] 4, i[[SZ]] 2]
21 // CHECK-DAG: [[MAPT3:@.+]] = private unnamed_addr constant [2 x i32] [i32 3, i32 3]
22 // CHECK-DAG: [[MAPT4:@.+]] = private unnamed_addr constant [9 x i32] [i32 3, i32 3, i32 1, i32 3, i32 3, i32 1, i32 1, i32 3, i32 3]
23 // CHECK-DAG: [[SIZET5:@.+]] = private unnamed_addr constant [3 x i[[SZ]]] [i[[SZ]] 4, i[[SZ]] 2, i[[SZ]] 40]
24 // CHECK-DAG: [[MAPT5:@.+]] = private unnamed_addr constant [3 x i32] [i32 3, i32 3, i32 3]
25 // CHECK-DAG: [[SIZET6:@.+]] = private unnamed_addr constant [4 x i[[SZ]]] [i[[SZ]] 4, i[[SZ]] 2, i[[SZ]] 1, i[[SZ]] 40]
26 // CHECK-DAG: [[MAPT6:@.+]] = private unnamed_addr constant [4 x i32] [i32 3, i32 3, i32 3, i32 3]
27 // CHECK-DAG: [[MAPT7:@.+]] = private unnamed_addr constant [5 x i32] [i32 3, i32 3, i32 1, i32 1, i32 3]
28 // CHECK-DAG: @{{.*}} = private constant i8 0
29 // CHECK-DAG: @{{.*}} = private constant i8 0
30 // CHECK-DAG: @{{.*}} = private constant i8 0
31 // CHECK-DAG: @{{.*}} = private constant i8 0
32 // CHECK-DAG: @{{.*}} = private constant i8 0
33 // CHECK-DAG: @{{.*}} = private constant i8 0
34 // CHECK-DAG: @{{.*}} = private constant i8 0
35 
36 template<typename tx, typename ty>
37 struct TT{
38   tx X;
39   ty Y;
40 };
41 
42 // CHECK: define {{.*}}[[FOO:@.+]](
43 int foo(int n) {
44   int a = 0;
45   short aa = 0;
46   float b[10];
47   float bn[n];
48   double c[5][10];
49   double cn[5][n];
50   TT<long long, char> d;
51 
52   // CHECK:       [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 0, i8** null, i8** null, i[[SZ]]* null, i32* null)
53   // CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align 4
54   // CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
55   // CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
56   // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]]
57   // CHECK:       [[FAIL]]
58   // CHECK:       call void [[HVT0:@.+]]()
59   // CHECK-NEXT:  br label %[[END]]
60   // CHECK:       [[END]]
61   #pragma omp target
62   {
63   }
64 
65   // CHECK:       store i32 0, i32* [[RHV:%.+]], align 4
66   // CHECK:       store i32 -1, i32* [[RHV]], align 4
67   // CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
68   // CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
69   // CHECK:       call void [[HVT1:@.+]](i32* {{[^,]+}})
70   #pragma omp target if(0)
71   {
72     a += 1;
73   }
74 
75   // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 1, i8** [[BP:%[^,]+]], i8** [[P:%[^,]+]], i[[SZ]]* getelementptr inbounds ([1 x i[[SZ]]], [1 x i[[SZ]]]* [[SIZET2]], i32 0, i32 0), i32* getelementptr inbounds ([1 x i32], [1 x i32]* [[MAPT2]], i32 0, i32 0))
76   // CHECK-DAG:   [[BP]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[BPR:%[^,]+]], i32 0, i32 0
77   // CHECK-DAG:   [[P]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[PR:%[^,]+]], i32 0, i32 0
78   // CHECK-DAG:   [[BPADDR0:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[BPR]], i32 0, i32 [[IDX0:[0-9]+]]
79   // CHECK-DAG:   [[PADDR0:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[PR]], i32 0, i32 [[IDX0]]
80   // CHECK-DAG:   store i8* [[BP0:%[^,]+]], i8** [[BPADDR0]]
81   // CHECK-DAG:   store i8* [[P0:%[^,]+]], i8** [[PADDR0]]
82   // CHECK-DAG:   [[BP0]] = bitcast i16* %{{.+}} to i8*
83   // CHECK-DAG:   [[P0]] = bitcast i16* %{{.+}} to i8*
84 
85   // CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align 4
86   // CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
87   // CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
88   // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]]
89   // CHECK:       [[FAIL]]
90   // CHECK:       call void [[HVT2:@.+]](i16* {{[^,]+}})
91   // CHECK-NEXT:  br label %[[END]]
92   // CHECK:       [[END]]
93   #pragma omp target if(1)
94   {
95     aa += 1;
96   }
97 
98   // CHECK:       [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 10
99   // CHECK:       br i1 [[IF]], label %[[IFTHEN:[^,]+]], label %[[IFELSE:[^,]+]]
100   // CHECK:       [[IFTHEN]]
101   // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 2, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i[[SZ]]* getelementptr inbounds ([2 x i[[SZ]]], [2 x i[[SZ]]]* [[SIZET3]], i32 0, i32 0), i32* getelementptr inbounds ([2 x i32], [2 x i32]* [[MAPT3]], i32 0, i32 0))
102   // CHECK-DAG:   [[BPR]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[BP:%[^,]+]], i32 0, i32 0
103   // CHECK-DAG:   [[PR]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[P:%[^,]+]], i32 0, i32 0
104 
105   // CHECK-DAG:   [[BPADDR0:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[BP]], i32 0, i32 0
106   // CHECK-DAG:   [[PADDR0:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[P]], i32 0, i32 0
107   // CHECK-DAG:   store i8* [[BP0:%[^,]+]], i8** [[BPADDR0]]
108   // CHECK-DAG:   store i8* [[P0:%[^,]+]], i8** [[PADDR0]]
109   // CHECK-DAG:   [[BP0]] = bitcast i32* %{{.+}} to i8*
110   // CHECK-DAG:   [[P0]] = bitcast i32* %{{.+}} to i8*
111 
112   // CHECK-DAG:   [[BPADDR1:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[BP]], i32 0, i32 1
113   // CHECK-DAG:   [[PADDR1:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[P]], i32 0, i32 1
114   // CHECK-DAG:   store i8* [[BP1:%[^,]+]], i8** [[BPADDR1]]
115   // CHECK-DAG:   store i8* [[P1:%[^,]+]], i8** [[PADDR1]]
116   // CHECK-DAG:   [[BP1]] = bitcast i16* %{{.+}} to i8*
117   // CHECK-DAG:   [[P1]] = bitcast i16* %{{.+}} to i8*
118   // CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align 4
119   // CHECK-NEXT:  br label %[[IFEND:.+]]
120 
121   // CHECK:       [[IFELSE]]
122   // CHECK:       store i32 -1, i32* [[RHV]], align 4
123   // CHECK-NEXT:  br label %[[IFEND:.+]]
124 
125   // CHECK:       [[IFEND]]
126   // CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
127   // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
128   // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
129   // CHECK:       [[FAIL]]
130   // CHECK:       call void [[HVT3:@.+]]({{[^,]+}}, {{[^,]+}})
131   // CHECK-NEXT:  br label %[[END]]
132   // CHECK:       [[END]]
133   #pragma omp target if(n>10)
134   {
135     a += 1;
136     aa += 1;
137   }
138 
139   // We capture 3 VLA sizes in this target region
140   // CHECK:       store i[[SZ]] [[BNELEMSIZE:%.+]], i[[SZ]]* [[VLA0:%[^,]+]]
141   // CHECK:       store i[[SZ]] 5, i[[SZ]]* [[VLA1:%[^,]+]]
142   // CHECK:       store i[[SZ]] [[CNELEMSIZE1:%.+]], i[[SZ]]* [[VLA2:%[^,]+]]
143 
144   // CHECK:       [[BNSIZE:%.+]] = mul nuw i[[SZ]] [[BNELEMSIZE]], 4
145   // CHECK:       [[CNELEMSIZE2:%.+]] = mul nuw i[[SZ]] 5, [[CNELEMSIZE1]]
146   // CHECK:       [[CNSIZE:%.+]] = mul nuw i[[SZ]] [[CNELEMSIZE2]], 8
147 
148   // CHECK:       [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 20
149   // CHECK:       br i1 [[IF]], label %[[TRY:[^,]+]], label %[[FAIL:[^,]+]]
150   // CHECK:       [[TRY]]
151   // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 9, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i[[SZ]]* [[SR:%[^,]+]], i32* getelementptr inbounds ([9 x i32], [9 x i32]* [[MAPT4]], i32 0, i32 0))
152   // CHECK-DAG:   [[BPR]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP:%[^,]+]], i32 0, i32 0
153   // CHECK-DAG:   [[PR]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P:%[^,]+]], i32 0, i32 0
154   // CHECK-DAG:   [[SR]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S:%[^,]+]], i32 0, i32 0
155 
156   // CHECK-DAG:   [[SADDR0:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX0:[0-9]+]]
157   // CHECK-DAG:   [[BPADDR0:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX0]]
158   // CHECK-DAG:   [[PADDR0:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX0]]
159   // CHECK-DAG:   [[SADDR1:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX1:[0-9]+]]
160   // CHECK-DAG:   [[BPADDR1:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX1]]
161   // CHECK-DAG:   [[PADDR1:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX1]]
162   // CHECK-DAG:   [[SADDR2:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX2:[0-9]+]]
163   // CHECK-DAG:   [[BPADDR2:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX2]]
164   // CHECK-DAG:   [[PADDR2:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX2]]
165   // CHECK-DAG:   [[SADDR3:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX3:[0-9]+]]
166   // CHECK-DAG:   [[BPADDR3:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX3]]
167   // CHECK-DAG:   [[PADDR3:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX3]]
168   // CHECK-DAG:   [[SADDR4:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX4:[0-9]+]]
169   // CHECK-DAG:   [[BPADDR4:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX4]]
170   // CHECK-DAG:   [[PADDR4:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX4]]
171   // CHECK-DAG:   [[SADDR5:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX5:[0-9]+]]
172   // CHECK-DAG:   [[BPADDR5:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX5]]
173   // CHECK-DAG:   [[PADDR5:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX5]]
174   // CHECK-DAG:   [[SADDR6:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX6:[0-9]+]]
175   // CHECK-DAG:   [[BPADDR6:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX6]]
176   // CHECK-DAG:   [[PADDR6:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX6]]
177   // CHECK-DAG:   [[SADDR7:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX7:[0-9]+]]
178   // CHECK-DAG:   [[BPADDR7:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX7]]
179   // CHECK-DAG:   [[PADDR7:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX7]]
180   // CHECK-DAG:   [[SADDR8:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX8:[0-9]+]]
181   // CHECK-DAG:   [[BPADDR8:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX8]]
182   // CHECK-DAG:   [[PADDR8:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX8]]
183 
184   // The names below are not necessarily consistent with the names used for the
185   // addresses above as some are repeated.
186   // CHECK-DAG:   [[BP0:%[^,]+]] = bitcast i[[SZ]]* [[VLA0]] to i8*
187   // CHECK-DAG:   [[P0:%[^,]+]] = bitcast i[[SZ]]* [[VLA0]] to i8*
188   // CHECK-DAG:   store i8* [[BP0]], i8** {{%[^,]+}}
189   // CHECK-DAG:   store i8* [[P0]], i8** {{%[^,]+}}
190   // CHECK-DAG:   store i[[SZ]] {{4|8}}, i[[SZ]]* {{%[^,]+}}
191 
192   // CHECK-DAG:   [[BP1:%[^,]+]] = bitcast i[[SZ]]* [[VLA1]] to i8*
193   // CHECK-DAG:   [[P1:%[^,]+]] = bitcast i[[SZ]]* [[VLA1]] to i8*
194   // CHECK-DAG:   store i8* [[BP1]], i8** {{%[^,]+}}
195   // CHECK-DAG:   store i8* [[P1]], i8** {{%[^,]+}}
196   // CHECK-DAG:   store i[[SZ]] {{4|8}}, i[[SZ]]* {{%[^,]+}}
197 
198   // CHECK-DAG:   [[BP2:%[^,]+]] = bitcast i[[SZ]]* [[VLA2]] to i8*
199   // CHECK-DAG:   [[P2:%[^,]+]] = bitcast i[[SZ]]* [[VLA2]] to i8*
200   // CHECK-DAG:   store i8* [[BP2]], i8** {{%[^,]+}}
201   // CHECK-DAG:   store i8* [[P2]], i8** {{%[^,]+}}
202   // CHECK-DAG:   store i[[SZ]] {{4|8}}, i[[SZ]]* {{%[^,]+}}
203 
204   // CHECK-DAG:   [[BP3:%[^,]+]] = bitcast i32* %{{.+}} to i8*
205   // CHECK-DAG:   [[P3:%[^,]+]] = bitcast i32* %{{.+}} to i8*
206   // CHECK-DAG:   store i8* [[BP3]], i8** {{%[^,]+}}
207   // CHECK-DAG:   store i8* [[P3]], i8** {{%[^,]+}}
208   // CHECK-DAG:   store i[[SZ]] 4, i[[SZ]]* {{%[^,]+}}
209 
210   // CHECK-DAG:   [[BP4:%[^,]+]] = bitcast [10 x float]* %{{.+}} to i8*
211   // CHECK-DAG:   [[P4:%[^,]+]] = bitcast [10 x float]* %{{.+}} to i8*
212   // CHECK-DAG:   store i8* [[BP4]], i8** {{%[^,]+}}
213   // CHECK-DAG:   store i8* [[P4]], i8** {{%[^,]+}}
214   // CHECK-DAG:   store i[[SZ]] 40, i[[SZ]]* {{%[^,]+}}
215 
216   // CHECK-DAG:   [[BP5:%[^,]+]] = bitcast float* %{{.+}} to i8*
217   // CHECK-DAG:   [[P5:%[^,]+]] = bitcast float* %{{.+}} to i8*
218   // CHECK-DAG:   store i8* [[BP5]], i8** {{%[^,]+}}
219   // CHECK-DAG:   store i8* [[P5]], i8** {{%[^,]+}}
220   // CHECK-DAG:   store i[[SZ]] [[BNSIZE]], i[[SZ]]* {{%[^,]+}}
221 
222   // CHECK-DAG:   [[BP6:%[^,]+]] = bitcast [5 x [10 x double]]* %{{.+}} to i8*
223   // CHECK-DAG:   [[P6:%[^,]+]] = bitcast [5 x [10 x double]]* %{{.+}} to i8*
224   // CHECK-DAG:   store i8* [[BP6]], i8** {{%[^,]+}}
225   // CHECK-DAG:   store i8* [[P6]], i8** {{%[^,]+}}
226   // CHECK-DAG:   store i[[SZ]] 400, i[[SZ]]* {{%[^,]+}}
227 
228   // CHECK-DAG:   [[BP7:%[^,]+]] = bitcast double* %{{.+}} to i8*
229   // CHECK-DAG:   [[P7:%[^,]+]] = bitcast double* %{{.+}} to i8*
230   // CHECK-DAG:   store i8* [[BP7]], i8** {{%[^,]+}}
231   // CHECK-DAG:   store i8* [[P7]], i8** {{%[^,]+}}
232   // CHECK-DAG:   store i[[SZ]] [[CNSIZE]], i[[SZ]]* {{%[^,]+}}
233 
234   // CHECK-DAG:   [[BP8:%[^,]+]] = bitcast [[TT]]* %{{.+}} to i8*
235   // CHECK-DAG:   [[P8:%[^,]+]] = bitcast [[TT]]* %{{.+}} to i8*
236   // CHECK-DAG:   store i8* [[BP8]], i8** {{%[^,]+}}
237   // CHECK-DAG:   store i8* [[P8]], i8** {{%[^,]+}}
238   // CHECK-DAG:   store i[[SZ]] {{12|16}}, i[[SZ]]* {{%[^,]+}}
239 
240   // CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align 4
241   // CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
242   // CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
243   // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]]
244 
245   // CHECK:       [[FAIL]]
246   // CHECK:       call void [[HVT4:@.+]]({{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}})
247   // CHECK-NEXT:  br label %[[END]]
248   // CHECK:       [[END]]
249   #pragma omp target if(n>20)
250   {
251     a += 1;
252     b[2] += 1.0;
253     bn[3] += 1.0;
254     c[1][2] += 1.0;
255     cn[1][3] += 1.0;
256     d.X += 1;
257     d.Y += 1;
258   }
259 
260   return a;
261 }
262 
263 // Check that the offloading functions are emitted and that the arguments are
264 // correct and loaded correctly for the target regions in foo().
265 
266 // CHECK:       define internal void [[HVT0]]()
267 
268 // CHECK:       define internal void [[HVT1]](i32* dereferenceable(4) %{{.+}})
269 // Create stack storage and store argument in there.
270 // CHECK:       [[A_ADDR:%.+]] = alloca i32*, align
271 // CHECK:       store i32* %{{.+}}, i32** [[A_ADDR]], align
272 // CHECK:       [[A_ADDR2:%.+]] = load i32*, i32** [[A_ADDR]], align
273 // CHECK:       load i32, i32* [[A_ADDR2]], align
274 
275 // CHECK:       define internal void [[HVT2]](i16* dereferenceable(2) %{{.+}})
276 // Create stack storage and store argument in there.
277 // CHECK:       [[AA_ADDR:%.+]] = alloca i16*, align
278 // CHECK:       store i16* %{{.+}}, i16** [[AA_ADDR]], align
279 // CHECK:       [[AA_ADDR2:%.+]] = load i16*, i16** [[AA_ADDR]], align
280 // CHECK:       load i16, i16* [[AA_ADDR2]], align
281 
282 // CHECK:       define internal void [[HVT3]]
283 // Create stack storage and store argument in there.
284 // CHECK-DAG:   [[A_ADDR:%.+]] = alloca i32*, align
285 // CHECK-DAG:   [[AA_ADDR:%.+]] = alloca i16*, align
286 // CHECK-DAG:   store i32* %{{.+}}, i32** [[A_ADDR]], align
287 // CHECK-DAG:   store i16* %{{.+}}, i16** [[AA_ADDR]], align
288 // CHECK-DAG:   [[A_ADDR2:%.+]] = load i32*, i32** [[A_ADDR]], align
289 // CHECK-DAG:   [[AA_ADDR2:%.+]] = load i16*, i16** [[AA_ADDR]], align
290 // CHECK-DAG:   load i32, i32* [[A_ADDR2]], align
291 // CHECK-DAG:   load i16, i16* [[AA_ADDR2]], align
292 
293 // CHECK:       define internal void [[HVT4]]
294 // Create local storage for each capture.
295 // CHECK-DAG:   [[LOCAL_A:%.+]] = alloca i32*
296 // CHECK-DAG:   [[LOCAL_B:%.+]] = alloca [10 x float]*
297 // CHECK-DAG:   [[LOCAL_VLA1:%.+]] = alloca i[[SZ]]*
298 // CHECK-DAG:   [[LOCAL_BN:%.+]] = alloca float*
299 // CHECK-DAG:   [[LOCAL_C:%.+]] = alloca [5 x [10 x double]]*
300 // CHECK-DAG:   [[LOCAL_VLA2:%.+]] = alloca i[[SZ]]*
301 // CHECK-DAG:   [[LOCAL_VLA3:%.+]] = alloca i[[SZ]]*
302 // CHECK-DAG:   [[LOCAL_CN:%.+]] = alloca double*
303 // CHECK-DAG:   [[LOCAL_D:%.+]] = alloca [[TT]]*
304 // CHECK-DAG:   store i32* [[ARG_A:%.+]], i32** [[LOCAL_A]]
305 // CHECK-DAG:   store [10 x float]* [[ARG_B:%.+]], [10 x float]** [[LOCAL_B]]
306 // CHECK-DAG:   store i[[SZ]]* [[ARG_VLA1:%.+]], i[[SZ]]** [[LOCAL_VLA1]]
307 // CHECK-DAG:   store float* [[ARG_BN:%.+]], float** [[LOCAL_BN]]
308 // CHECK-DAG:   store [5 x [10 x double]]* [[ARG_C:%.+]], [5 x [10 x double]]** [[LOCAL_C]]
309 // CHECK-DAG:   store i[[SZ]]* [[ARG_VLA2:%.+]], i[[SZ]]** [[LOCAL_VLA2]]
310 // CHECK-DAG:   store i[[SZ]]* [[ARG_VLA3:%.+]], i[[SZ]]** [[LOCAL_VLA3]]
311 // CHECK-DAG:   store double* [[ARG_CN:%.+]], double** [[LOCAL_CN]]
312 // CHECK-DAG:   store [[TT]]* [[ARG_D:%.+]], [[TT]]** [[LOCAL_D]]
313 
314 // CHECK-DAG:   [[REF_A:%.+]] = load i32*, i32** [[LOCAL_A]],
315 // CHECK-DAG:   [[REF_B:%.+]] = load [10 x float]*, [10 x float]** [[LOCAL_B]],
316 // CHECK-DAG:   [[REF_VLA1:%.+]] = load i[[SZ]]*, i[[SZ]]** [[LOCAL_VLA1]],
317 // CHECK-DAG:   [[VAL_VLA1:%.+]] = load i[[SZ]], i[[SZ]]* [[REF_VLA1]],
318 // CHECK-DAG:   [[REF_BN:%.+]] = load float*, float** [[LOCAL_BN]],
319 // CHECK-DAG:   [[REF_C:%.+]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[LOCAL_C]],
320 // CHECK-DAG:   [[REF_VLA2:%.+]] = load i[[SZ]]*, i[[SZ]]** [[LOCAL_VLA2]],
321 // CHECK-DAG:   [[VAL_VLA2:%.+]] = load i[[SZ]], i[[SZ]]* [[REF_VLA2]],
322 // CHECK-DAG:   [[REF_VLA3:%.+]] = load i[[SZ]]*, i[[SZ]]** [[LOCAL_VLA3]],
323 // CHECK-DAG:   [[VAL_VLA3:%.+]] = load i[[SZ]], i[[SZ]]* [[REF_VLA3]],
324 // CHECK-DAG:   [[REF_CN:%.+]] = load double*, double** [[LOCAL_CN]],
325 // CHECK-DAG:   [[REF_D:%.+]] = load [[TT]]*, [[TT]]** [[LOCAL_D]],
326 
327 // Use captures.
328 // CHECK-DAG:   load i32, i32* [[REF_A]]
329 // CHECK-DAG:   getelementptr inbounds [10 x float], [10 x float]* [[REF_B]], i[[SZ]] 0, i[[SZ]] 2
330 // CHECK-DAG:   getelementptr inbounds float, float* [[REF_BN]], i[[SZ]] 3
331 // CHECK-DAG:   getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[REF_C]], i[[SZ]] 0, i[[SZ]] 1
332 // CHECK-DAG:   getelementptr inbounds double, double* [[REF_CN]], i[[SZ]] %{{.+}}
333 // CHECK-DAG:   getelementptr inbounds [[TT]], [[TT]]* [[REF_D]], i32 0, i32 0
334 
335 template<typename tx>
336 tx ftemplate(int n) {
337   tx a = 0;
338   short aa = 0;
339   tx b[10];
340 
341   #pragma omp target if(n>40)
342   {
343     a += 1;
344     aa += 1;
345     b[2] += 1;
346   }
347 
348   return a;
349 }
350 
351 static
352 int fstatic(int n) {
353   int a = 0;
354   short aa = 0;
355   char aaa = 0;
356   int b[10];
357 
358   #pragma omp target if(n>50)
359   {
360     a += 1;
361     aa += 1;
362     aaa += 1;
363     b[2] += 1;
364   }
365 
366   return a;
367 }
368 
369 struct S1 {
370   double a;
371 
372   int r1(int n){
373     int b = n+1;
374     short int c[2][n];
375 
376     #pragma omp target if(n>60)
377     {
378       this->a = (double)b + 1.5;
379       c[1][1] = ++a;
380     }
381 
382     return c[1][1] + (int)b;
383   }
384 };
385 
386 // CHECK: define {{.*}}@{{.*}}bar{{.*}}
387 int bar(int n){
388   int a = 0;
389 
390   // CHECK: call {{.*}}i32 [[FOO]](i32 {{.*}})
391   a += foo(n);
392 
393   S1 S;
394   // CHECK: call {{.*}}i32 [[FS1:@.+]]([[S1]]* {{.*}}, i32 {{.*}})
395   a += S.r1(n);
396 
397   // CHECK: call {{.*}}i32 [[FSTATIC:@.+]](i32 {{.*}})
398   a += fstatic(n);
399 
400   // CHECK: call {{.*}}i32 [[FTEMPLATE:@.+]](i32 {{.*}})
401   a += ftemplate<int>(n);
402 
403   return a;
404 }
405 
406 //
407 // CHECK: define {{.*}}[[FS1]]
408 //
409 // We capture 2 VLA sizes in this target region
410 // CHECK:       store i[[SZ]] 2, i[[SZ]]* [[VLA0:%[^,]+]]
411 // CHECK:       store i[[SZ]] [[CELEMSIZE1:%.+]], i[[SZ]]* [[VLA1:%[^,]+]]
412 // CHECK:       [[CELEMSIZE2:%.+]] = mul nuw i[[SZ]] 2, [[CELEMSIZE1]]
413 // CHECK:       [[CSIZE:%.+]] = mul nuw i[[SZ]] [[CELEMSIZE2]], 2
414 
415 // CHECK:       [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 60
416 // CHECK:       br i1 [[IF]], label %[[TRY:[^,]+]], label %[[FAIL:[^,]+]]
417 // CHECK:       [[TRY]]
418 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 5, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i[[SZ]]* [[SR:%[^,]+]], i32* getelementptr inbounds ([5 x i32], [5 x i32]* [[MAPT7]], i32 0, i32 0))
419 // CHECK-DAG:   [[BPR]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BP:%.+]], i32 0, i32 0
420 // CHECK-DAG:   [[PR]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[P:%.+]], i32 0, i32 0
421 // CHECK-DAG:   [[SR]] = getelementptr inbounds [5 x i[[SZ]]], [5 x i[[SZ]]]* [[S:%.+]], i32 0, i32 0
422 // CHECK-DAG:   [[SADDR0:%.+]] = getelementptr inbounds [5 x i[[SZ]]], [5 x i[[SZ]]]* [[S]], i32 [[IDX0:[0-9]+]]
423 // CHECK-DAG:   [[BPADDR0:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BP]], i32 [[IDX0]]
424 // CHECK-DAG:   [[PADDR0:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[P]], i32 [[IDX0]]
425 // CHECK-DAG:   [[SADDR1:%.+]] = getelementptr inbounds [5 x i[[SZ]]], [5 x i[[SZ]]]* [[S]], i32 [[IDX1:[0-9]+]]
426 // CHECK-DAG:   [[BPADDR1:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BP]], i32 [[IDX1]]
427 // CHECK-DAG:   [[PADDR1:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[P]], i32 [[IDX1]]
428 // CHECK-DAG:   [[SADDR2:%.+]] = getelementptr inbounds [5 x i[[SZ]]], [5 x i[[SZ]]]* [[S]], i32 [[IDX2:[0-9]+]]
429 // CHECK-DAG:   [[BPADDR2:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BP]], i32 [[IDX2]]
430 // CHECK-DAG:   [[PADDR2:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[P]], i32 [[IDX2]]
431 // CHECK-DAG:   [[SADDR3:%.+]] = getelementptr inbounds [5 x i[[SZ]]], [5 x i[[SZ]]]* [[S]], i32 [[IDX3:[0-9]+]]
432 // CHECK-DAG:   [[BPADDR3:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BP]], i32 [[IDX3]]
433 // CHECK-DAG:   [[PADDR3:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[P]], i32 [[IDX3]]
434 
435 // The names below are not necessarily consistent with the names used for the
436 // addresses above as some are repeated.
437 // CHECK-DAG:   [[BP0:%[^,]+]] = bitcast i[[SZ]]* [[VLA0]] to i8*
438 // CHECK-DAG:   [[P0:%[^,]+]] = bitcast i[[SZ]]* [[VLA0]] to i8*
439 // CHECK-DAG:   store i8* [[BP0]], i8** {{%[^,]+}}
440 // CHECK-DAG:   store i8* [[P0]], i8** {{%[^,]+}}
441 // CHECK-DAG:   store i[[SZ]] {{4|8}}, i[[SZ]]* {{%[^,]+}}
442 
443 // CHECK-DAG:   [[BP1:%[^,]+]] = bitcast i[[SZ]]* [[VLA1]] to i8*
444 // CHECK-DAG:   [[P1:%[^,]+]] = bitcast i[[SZ]]* [[VLA1]] to i8*
445 // CHECK-DAG:   store i8* [[BP1]], i8** {{%[^,]+}}
446 // CHECK-DAG:   store i8* [[P1]], i8** {{%[^,]+}}
447 // CHECK-DAG:   store i[[SZ]] {{4|8}}, i[[SZ]]* {{%[^,]+}}
448 
449 // CHECK-DAG:   [[BP2:%[^,]+]] = bitcast i32* %{{.+}} to i8*
450 // CHECK-DAG:   [[P2:%[^,]+]] = bitcast i32* %{{.+}} to i8*
451 // CHECK-DAG:   store i8* [[BP2]], i8** {{%[^,]+}}
452 // CHECK-DAG:   store i8* [[P2]], i8** {{%[^,]+}}
453 // CHECK-DAG:   store i[[SZ]] 4, i[[SZ]]* {{%[^,]+}}
454 
455 // CHECK-DAG:   [[BP3:%[^,]+]] = bitcast [[S1]]* %{{.+}} to i8*
456 // CHECK-DAG:   [[P3:%[^,]+]] = bitcast [[S1]]* %{{.+}} to i8*
457 // CHECK-DAG:   store i8* [[BP3]], i8** {{%[^,]+}}
458 // CHECK-DAG:   store i8* [[P3]], i8** {{%[^,]+}}
459 // CHECK-DAG:   store i[[SZ]] 8, i[[SZ]]* {{%[^,]+}}
460 
461 // CHECK-DAG:   [[BP4:%[^,]+]] = bitcast i16* %{{.+}} to i8*
462 // CHECK-DAG:   [[P4:%[^,]+]] = bitcast i16* %{{.+}} to i8*
463 // CHECK-DAG:   store i8* [[BP4]], i8** {{%[^,]+}}
464 // CHECK-DAG:   store i8* [[P4]], i8** {{%[^,]+}}
465 // CHECK-DAG:   store i[[SZ]] [[CSIZE]], i[[SZ]]* {{%[^,]+}}
466 
467 // CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align 4
468 // CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
469 // CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
470 // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]]
471 
472 // CHECK:       [[FAIL]]
473 // CHECK:       call void [[HVT7:@.+]]({{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}})
474 // CHECK-NEXT:  br label %[[END]]
475 // CHECK:       [[END]]
476 
477 //
478 // CHECK: define {{.*}}[[FSTATIC]]
479 //
480 // CHECK:       [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 50
481 // CHECK:       br i1 [[IF]], label %[[IFTHEN:[^,]+]], label %[[IFELSE:[^,]+]]
482 // CHECK:       [[IFTHEN]]
483 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 4, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i[[SZ]]* getelementptr inbounds ([4 x i[[SZ]]], [4 x i[[SZ]]]* [[SIZET6]], i32 0, i32 0), i32* getelementptr inbounds ([4 x i32], [4 x i32]* [[MAPT6]], i32 0, i32 0))
484 // CHECK-DAG:   [[BPR]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[BP:%.+]], i32 0, i32 0
485 // CHECK-DAG:   [[PR]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[P:%.+]], i32 0, i32 0
486 
487 // CHECK-DAG:   [[BPADDR0:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[BP]], i32 0, i32 0
488 // CHECK-DAG:   [[PADDR0:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[P]], i32 0, i32 0
489 // CHECK-DAG:   store i8* [[BP0:%[^,]+]], i8** [[BPADDR0]]
490 // CHECK-DAG:   store i8* [[P0:%[^,]+]], i8** [[PADDR0]]
491 // CHECK-DAG:   [[BP0]] = bitcast i32* %{{.+}} to i8*
492 // CHECK-DAG:   [[P0]] = bitcast i32* %{{.+}} to i8*
493 
494 // CHECK-DAG:   [[BPADDR1:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[BP]], i32 0, i32 1
495 // CHECK-DAG:   [[PADDR1:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[P]], i32 0, i32 1
496 // CHECK-DAG:   store i8* [[BP1:%[^,]+]], i8** [[BPADDR1]]
497 // CHECK-DAG:   store i8* [[P1:%[^,]+]], i8** [[PADDR1]]
498 // CHECK-DAG:   [[BP1]] = bitcast i16* %{{.+}} to i8*
499 // CHECK-DAG:   [[P1]] = bitcast i16* %{{.+}} to i8*
500 
501 // CHECK-DAG:   [[BPADDR2:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[BP]], i32 0, i32 2
502 // CHECK-DAG:   [[PADDR2:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[P]], i32 0, i32 2
503 // CHECK-DAG:   store i8* [[BP2:%[^,]+]], i8** [[BPADDR2]]
504 // CHECK-DAG:   store i8* [[P2:%[^,]+]], i8** [[PADDR2]]
505 
506 // CHECK-DAG:   [[BPADDR3:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[BP]], i32 0, i32 3
507 // CHECK-DAG:   [[PADDR3:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[P]], i32 0, i32 3
508 // CHECK-DAG:   store i8* [[BP3:%[^,]+]], i8** [[BPADDR3]]
509 // CHECK-DAG:   store i8* [[P3:%[^,]+]], i8** [[PADDR3]]
510 // CHECK-DAG:   [[BP3]] = bitcast [10 x i32]* %{{.+}} to i8*
511 // CHECK-DAG:   [[P3]] = bitcast [10 x i32]* %{{.+}} to i8*
512 
513 // CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align 4
514 // CHECK-NEXT:  br label %[[IFEND:.+]]
515 
516 // CHECK:       [[IFELSE]]
517 // CHECK:       store i32 -1, i32* [[RHV]], align 4
518 // CHECK-NEXT:  br label %[[IFEND:.+]]
519 
520 // CHECK:       [[IFEND]]
521 // CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
522 // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
523 // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
524 // CHECK:       [[FAIL]]
525 // CHECK:       call void [[HVT6:@.+]]({{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}})
526 // CHECK-NEXT:  br label %[[END]]
527 // CHECK:       [[END]]
528 
529 //
530 // CHECK: define {{.*}}[[FTEMPLATE]]
531 //
532 // CHECK:       [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 40
533 // CHECK:       br i1 [[IF]], label %[[IFTHEN:[^,]+]], label %[[IFELSE:[^,]+]]
534 // CHECK:       [[IFTHEN]]
535 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 3, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i[[SZ]]* getelementptr inbounds ([3 x i[[SZ]]], [3 x i[[SZ]]]* [[SIZET5]], i32 0, i32 0), i32* getelementptr inbounds ([3 x i32], [3 x i32]* [[MAPT5]], i32 0, i32 0))
536 // CHECK-DAG:   [[BPR]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[BP:%.+]], i32 0, i32 0
537 // CHECK-DAG:   [[PR]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[P:%.+]], i32 0, i32 0
538 
539 // CHECK-DAG:   [[BPADDR0:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[BP]], i32 0, i32 0
540 // CHECK-DAG:   [[PADDR0:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[P]], i32 0, i32 0
541 // CHECK-DAG:   store i8* [[BP0:%[^,]+]], i8** [[BPADDR0]]
542 // CHECK-DAG:   store i8* [[P0:%[^,]+]], i8** [[PADDR0]]
543 // CHECK-DAG:   [[BP0]] = bitcast i32* %{{.+}} to i8*
544 // CHECK-DAG:   [[P0]] = bitcast i32* %{{.+}} to i8*
545 
546 // CHECK-DAG:   [[BPADDR1:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[BP]], i32 0, i32 1
547 // CHECK-DAG:   [[PADDR1:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[P]], i32 0, i32 1
548 // CHECK-DAG:   store i8* [[BP1:%[^,]+]], i8** [[BPADDR1]]
549 // CHECK-DAG:   store i8* [[P1:%[^,]+]], i8** [[PADDR1]]
550 // CHECK-DAG:   [[BP1]] = bitcast i16* %{{.+}} to i8*
551 // CHECK-DAG:   [[P1]] = bitcast i16* %{{.+}} to i8*
552 
553 // CHECK-DAG:   [[BPADDR2:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[BP]], i32 0, i32 2
554 // CHECK-DAG:   [[PADDR2:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[P]], i32 0, i32 2
555 // CHECK-DAG:   store i8* [[BP2:%[^,]+]], i8** [[BPADDR2]]
556 // CHECK-DAG:   store i8* [[P2:%[^,]+]], i8** [[PADDR2]]
557 // CHECK-DAG:   [[BP2]] = bitcast [10 x i32]* %{{.+}} to i8*
558 // CHECK-DAG:   [[P2]] = bitcast [10 x i32]* %{{.+}} to i8*
559 
560 // CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align 4
561 // CHECK-NEXT:  br label %[[IFEND:.+]]
562 
563 // CHECK:       [[IFELSE]]
564 // CHECK:       store i32 -1, i32* [[RHV]], align 4
565 // CHECK-NEXT:  br label %[[IFEND:.+]]
566 
567 // CHECK:       [[IFEND]]
568 // CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
569 // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
570 // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
571 // CHECK:       [[FAIL]]
572 // CHECK:       call void [[HVT5:@.+]]({{[^,]+}}, {{[^,]+}}, {{[^,]+}})
573 // CHECK-NEXT:  br label %[[END]]
574 // CHECK:       [[END]]
575 
576 
577 
578 // Check that the offloading functions are emitted and that the arguments are
579 // correct and loaded correctly for the target regions of the callees of bar().
580 
581 // CHECK:       define internal void [[HVT7]]
582 // Create local storage for each capture.
583 // CHECK-DAG:   [[LOCAL_THIS:%.+]] = alloca [[S1]]*
584 // CHECK-DAG:   [[LOCAL_B:%.+]] = alloca i32*
585 // CHECK-DAG:   [[LOCAL_VLA1:%.+]] = alloca i[[SZ]]*
586 // CHECK-DAG:   [[LOCAL_VLA2:%.+]] = alloca i[[SZ]]*
587 // CHECK-DAG:   [[LOCAL_C:%.+]] = alloca i16*
588 // CHECK-DAG:   store [[S1]]* [[ARG_THIS:%.+]], [[S1]]** [[LOCAL_THIS]]
589 // CHECK-DAG:   store i32* [[ARG_B:%.+]], i32** [[LOCAL_B]]
590 // CHECK-DAG:   store i[[SZ]]* [[ARG_VLA1:%.+]], i[[SZ]]** [[LOCAL_VLA1]]
591 // CHECK-DAG:   store i[[SZ]]* [[ARG_VLA2:%.+]], i[[SZ]]** [[LOCAL_VLA2]]
592 // CHECK-DAG:   store i16* [[ARG_C:%.+]], i16** [[LOCAL_C]]
593 // Store captures in the context.
594 // CHECK-DAG:   [[REF_THIS:%.+]] = load [[S1]]*, [[S1]]** [[LOCAL_THIS]],
595 // CHECK-DAG:   [[REF_B:%.+]] = load i32*, i32** [[LOCAL_B]],
596 // CHECK-DAG:   [[REF_VLA1:%.+]] = load i[[SZ]]*, i[[SZ]]** [[LOCAL_VLA1]],
597 // CHECK-DAG:   [[VAL_VLA1:%.+]] = load i[[SZ]], i[[SZ]]* [[REF_VLA1]],
598 // CHECK-DAG:   [[REF_VLA2:%.+]] = load i[[SZ]]*, i[[SZ]]** [[LOCAL_VLA2]],
599 // CHECK-DAG:   [[VAL_VLA2:%.+]] = load i[[SZ]], i[[SZ]]* [[REF_VLA2]],
600 // CHECK-DAG:   [[REF_C:%.+]] = load i16*, i16** [[LOCAL_C]],
601 // Use captures.
602 // CHECK-DAG:   getelementptr inbounds [[S1]], [[S1]]* [[REF_THIS]], i32 0, i32 0
603 // CHECK-DAG:   load i32, i32* [[REF_B]]
604 // CHECK-DAG:   getelementptr inbounds i16, i16* [[REF_C]], i[[SZ]] %{{.+}}
605 
606 
607 // CHECK:       define internal void [[HVT6]]
608 // Create local storage for each capture.
609 // CHECK-DAG:   [[LOCAL_A:%.+]] = alloca i32*
610 // CHECK-DAG:   [[LOCAL_AA:%.+]] = alloca i16*
611 // CHECK-DAG:   [[LOCAL_AAA:%.+]] = alloca i8*
612 // CHECK-DAG:   [[LOCAL_B:%.+]] = alloca [10 x i32]*
613 // CHECK-DAG:   store i32* [[ARG_A:%.+]], i32** [[LOCAL_A]]
614 // CHECK-DAG:   store i16* [[ARG_AA:%.+]], i16** [[LOCAL_AA]]
615 // CHECK-DAG:   store i8* [[ARG_AAA:%.+]], i8** [[LOCAL_AAA]]
616 // CHECK-DAG:   store [10 x i32]* [[ARG_B:%.+]], [10 x i32]** [[LOCAL_B]]
617 // Store captures in the context.
618 // CHECK-DAG:   [[REF_A:%.+]] = load i32*, i32** [[LOCAL_A]],
619 // CHECK-DAG:   [[REF_AA:%.+]] = load i16*, i16** [[LOCAL_AA]],
620 // CHECK-DAG:   [[REF_AAA:%.+]] = load i8*, i8** [[LOCAL_AAA]],
621 // CHECK-DAG:   [[REF_B:%.+]] = load [10 x i32]*, [10 x i32]** [[LOCAL_B]],
622 // Use captures.
623 // CHECK-DAG:   load i32, i32* [[REF_A]]
624 // CHECK-DAG:   load i16, i16* [[REF_AA]]
625 // CHECK-DAG:   load i8, i8* [[REF_AAA]]
626 // CHECK-DAG:   getelementptr inbounds [10 x i32], [10 x i32]* [[REF_B]], i[[SZ]] 0, i[[SZ]] 2
627 
628 // CHECK:       define internal void [[HVT5]]
629 // Create local storage for each capture.
630 // CHECK-DAG:   [[LOCAL_A:%.+]] = alloca i32*
631 // CHECK-DAG:   [[LOCAL_AA:%.+]] = alloca i16*
632 // CHECK-DAG:   [[LOCAL_B:%.+]] = alloca [10 x i32]*
633 // CHECK-DAG:   store i32* [[ARG_A:%.+]], i32** [[LOCAL_A]]
634 // CHECK-DAG:   store i16* [[ARG_AA:%.+]], i16** [[LOCAL_AA]]
635 // CHECK-DAG:   store [10 x i32]* [[ARG_B:%.+]], [10 x i32]** [[LOCAL_B]]
636 // Store captures in the context.
637 // CHECK-DAG:   [[REF_A:%.+]] = load i32*, i32** [[LOCAL_A]],
638 // CHECK-DAG:   [[REF_AA:%.+]] = load i16*, i16** [[LOCAL_AA]],
639 // CHECK-DAG:   [[REF_B:%.+]] = load [10 x i32]*, [10 x i32]** [[LOCAL_B]],
640 // Use captures.
641 // CHECK-DAG:   load i32, i32* [[REF_A]]
642 // CHECK-DAG:   load i16, i16* [[REF_AA]]
643 // CHECK-DAG:   getelementptr inbounds [10 x i32], [10 x i32]* [[REF_B]], i[[SZ]] 0, i[[SZ]] 2
644 #endif
645