1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG
5 
6 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
7 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
8 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
9 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck --check-prefix=TERM_DEBUG %s
10 // expected-no-diagnostics
11  #ifndef HEADER
12  #define HEADER
13 
14 // CHECK: [[SS_TY:%.+]] = type { i32 }
15 
16 long long get_val() { return 0; }
17 double *g_ptr;
18 
19 // CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
20 void simple(float *a, float *b, float *c, float *d) {
21   #pragma omp simd
22 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
23 
24 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID:[0-9]+]]
25 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], 6
26 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
27   for (int i = 3; i < 32; i += 5) {
28 // CHECK: [[SIMPLE_LOOP1_BODY]]:
29 // Start of body: calculate i from IV:
30 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
31 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
32 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]
33 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
34 // ... loop body ...
35 // End of body: store into a[i]:
36 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
37     a[i] = b[i] * c[i] * d[i];
38 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
39 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
40 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
41 // br label %{{.+}}, !llvm.loop !{{.+}}
42   }
43 // CHECK: [[SIMPLE_LOOP1_END]]:
44 
45   long long k = get_val();
46 
47   #pragma omp simd linear(k : 3)
48 // CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val
49 // CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]]
50 // CHECK: store i32 0, i32* [[OMP_IV2:%[^,]+]]
51 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR]]
52 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
53 
54 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID:[0-9]+]]
55 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV2]], 9
56 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
57   for (int i = 10; i > 1; i--) {
58 // CHECK: [[SIMPLE_LOOP2_BODY]]:
59 // Start of body: calculate i from IV:
60 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
61 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
62 // CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1
63 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]
64 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
65 //
66 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
67 // CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
68 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3
69 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
70 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
71 // Update of the privatized version of linear variable!
72 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
73     a[k]++;
74     k = k + 3;
75 // CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
76 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
77 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
78 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
79   }
80 // CHECK: [[SIMPLE_LOOP2_END]]:
81 //
82 // Update linear vars after loop, as the loop was operating on a private version.
83 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
84 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
85 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_VAR]]
86 //
87 
88   int lin = 12;
89   #pragma omp simd linear(lin : get_val()), linear(g_ptr)
90 
91 // Init linear private var.
92 // CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]]
93 // CHECK: store i64 0, i64* [[OMP_IV3:%[^,]+]]
94 
95 // CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]]
96 // CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]]
97 // Remember linear step.
98 // CHECK: [[CALL_VAL:%.+]] = invoke
99 // CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]]
100 
101 // CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:@[^,]+]]
102 // CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]]
103 
104 // CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID:[0-9]+]]
105 // CHECK-NEXT: [[CMP3:%.+]] = icmp ult i64 [[IV3]], 4
106 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
107   for (unsigned long long it = 2000; it >= 600; it-=400) {
108 // CHECK: [[SIMPLE_LOOP3_BODY]]:
109 // Start of body: calculate it from IV:
110 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
111 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
112 // CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]
113 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
114 //
115 // Linear start and step are used to calculate current value of the linear variable.
116 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
117 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
118 // CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]],{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
119 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
120 // CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
121 // CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1
122 // CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]
123 // CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
124     *g_ptr++ = 0.0;
125 // CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
126 // CHECK: store double{{.*}}[[GEP_VAL]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
127     a[it + lin]++;
128 // CHECK: [[FLT_INC:%.+]] = fadd float
129 // CHECK-NEXT: store float [[FLT_INC]],{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
130 // CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
131 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
132 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
133   }
134 // CHECK: [[SIMPLE_LOOP3_END]]:
135 //
136 // Linear start and step are used to calculate final value of the linear variables.
137 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
138 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
139 // CHECK: store i32 {{.+}}, i32* [[LIN_VAR]],
140 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
141 // CHECK: store double* {{.*}}[[GLIN_VAR]]
142 
143   #pragma omp simd
144 // CHECK: store i32 0, i32* [[OMP_IV4:%[^,]+]]
145 
146 // CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID:[0-9]+]]
147 // CHECK-NEXT: [[CMP4:%.+]] = icmp slt i32 [[IV4]], 4
148 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
149   for (short it = 6; it <= 20; it-=-4) {
150 // CHECK: [[SIMPLE_LOOP4_BODY]]:
151 // Start of body: calculate it from IV:
152 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
153 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
154 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]
155 // CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16
156 // CHECK-NEXT: store i16 [[LC_IT_3]], i16* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
157 
158 // CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
159 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
160 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
161   }
162 // CHECK: [[SIMPLE_LOOP4_END]]:
163 
164   #pragma omp simd
165 // CHECK: store i32 0, i32* [[OMP_IV5:%[^,]+]]
166 
167 // CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID:[0-9]+]]
168 // CHECK-NEXT: [[CMP5:%.+]] = icmp slt i32 [[IV5]], 26
169 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
170   for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
171 // CHECK: [[SIMPLE_LOOP5_BODY]]:
172 // Start of body: calculate it from IV:
173 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
174 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
175 // CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]
176 // CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8
177 // CHECK-NEXT: store i8 [[LC_IT_2]], i8* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
178 
179 // CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
180 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
181 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
182   }
183 // CHECK: [[SIMPLE_LOOP5_END]]:
184 
185 // CHECK-NOT: mul i32 %{{.+}}, 10
186   #pragma omp simd
187   for (unsigned i=100; i<10; i+=10) {
188   }
189 
190   int A;
191   // CHECK: store i32 -1, i32* [[A:%.+]],
192   A = -1;
193   #pragma omp simd lastprivate(A)
194 // CHECK: store i64 0, i64* [[OMP_IV7:%[^,]+]]
195 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
196 // CHECK: [[SIMD_LOOP7_COND]]:
197 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID:[0-9]+]]
198 // CHECK-NEXT: [[CMP7:%.+]] = icmp slt i64 [[IV7]], 7
199 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
200   for (long long i = -10; i < 10; i += 3) {
201 // CHECK: [[SIMPLE_LOOP7_BODY]]:
202 // Start of body: calculate i from IV:
203 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
204 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
205 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
206 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
207 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
208 // CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32
209 // CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
210     A = i;
211 // CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
212 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
213 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
214   }
215 // CHECK: [[SIMPLE_LOOP7_END]]:
216 // CHECK-NEXT: store i64 11, i64*
217 // CHECK-NEXT: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]],
218 // CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* [[A]],
219   int R;
220   // CHECK: store i32 -1, i32* [[R:%[^,]+]],
221   R = -1;
222 // CHECK: store i64 0, i64* [[OMP_IV8:%[^,]+]],
223 // CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]],
224   #pragma omp simd reduction(*:R)
225 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
226 // CHECK: [[SIMD_LOOP8_COND]]:
227 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID:[0-9]+]]
228 // CHECK-NEXT: [[CMP8:%.+]] = icmp slt i64 [[IV8]], 7
229 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
230   for (long long i = -10; i < 10; i += 3) {
231 // CHECK: [[SIMPLE_LOOP8_BODY]]:
232 // Start of body: calculate i from IV:
233 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
234 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
235 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
236 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
237 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
238 // CHECK: store i32 %{{.+}}, i32* [[R_PRIV]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
239     R *= i;
240 // CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
241 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
242 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
243   }
244 // CHECK: [[SIMPLE_LOOP8_END]]:
245 // CHECK-DAG: [[R_VAL:%.+]] = load i32, i32* [[R]],
246 // CHECK-DAG: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
247 // CHECK: [[RED:%.+]] = mul nsw i32 [[R_VAL]], [[R_PRIV_VAL]]
248 // CHECK-NEXT: store i32 [[RED]], i32* [[R]],
249 // CHECK-NEXT: ret void
250 }
251 
252 template <class T, unsigned K> T tfoo(T a) { return a + K; }
253 
254 template <typename T, unsigned N>
255 int templ1(T a, T *z) {
256   #pragma omp simd collapse(N)
257   for (int i = 0; i < N * 2; i++) {
258     for (long long j = 0; j < (N + N + N + N); j += 2) {
259       z[i + j] = a + tfoo<T, N>(i + j);
260     }
261   }
262   return 0;
263 }
264 
265 // Instatiation templ1<float,2>
266 // CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}})
267 // CHECK: store i64 0, i64* [[T1_OMP_IV:[^,]+]]
268 // ...
269 // CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID:[0-9]+]]
270 // CHECK-NEXT: [[CMP1:%.+]] = icmp slt i64 [[IV]], 16
271 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
272 // CHECK: [[T1_BODY]]:
273 // Loop counters i and j updates:
274 // CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
275 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
276 // CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1
277 // CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]
278 // CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32
279 // CHECK-NEXT: store i32 [[I_2]], i32* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
280 // CHECK: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
281 // CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4
282 // CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2
283 // CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]
284 // CHECK-NEXT: store i64 [[J_2_ADD0]], i64* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
285 // simd.for.inc:
286 // CHECK: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
287 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
288 // CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
289 // CHECK-NEXT: br label {{%.+}}
290 // CHECK: [[T1_END]]:
291 // CHECK: ret i32 0
292 //
293 void inst_templ1() {
294   float a;
295   float z[100];
296   templ1<float,2> (a, z);
297 }
298 
299 
300 typedef int MyIdx;
301 
302 class IterDouble {
303   double *Ptr;
304 public:
305   IterDouble operator++ () const {
306     IterDouble n;
307     n.Ptr = Ptr + 1;
308     return n;
309   }
310   bool operator < (const IterDouble &that) const {
311     return Ptr < that.Ptr;
312   }
313   double & operator *() const {
314     return *Ptr;
315   }
316   MyIdx operator - (const IterDouble &that) const {
317     return (MyIdx) (Ptr - that.Ptr);
318   }
319   IterDouble operator + (int Delta) {
320     IterDouble re;
321     re.Ptr = Ptr + Delta;
322     return re;
323   }
324 
325   ///~IterDouble() {}
326 };
327 
328 // CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}
329 void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
330 //
331 // Calculate number of iterations before the loop body.
332 // CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}
333 // CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1
334 // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1
335 // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1
336 // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1
337 // CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}}
338 // CHECK: store i32 0, i32* [[IT_OMP_IV:%[^,]+]]
339   #pragma omp simd
340 
341 // CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}} !llvm.mem.parallel_loop_access ![[ITER_LOOP_ID:[0-9]+]]
342 // CHECK-NEXT: [[LAST_IT:%.+]] = load i32, i32* [[OMP_LAST_IT]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
343 // CHECK-NEXT: [[NUM_IT:%.+]] = add nsw i32 [[LAST_IT]], 1
344 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], [[NUM_IT]]
345 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
346   for (IterDouble i = ia; i < ib; ++i) {
347 // CHECK: [[IT_BODY]]:
348 // Start of body: calculate i from index:
349 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
350 // Call of operator+ (i, IV).
351 // CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}
352 // ... loop body ...
353    *i = *ic * 0.5;
354 // Float multiply and save result.
355 // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01
356 // CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}
357 // CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]], !llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
358    ++ic;
359 //
360 // CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
361 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1
362 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
363 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
364   }
365 // CHECK: [[IT_END]]:
366 // CHECK: ret void
367 }
368 
369 
370 // CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}
371 void collapsed(float *a, float *b, float *c, float *d) {
372   int i; // outer loop counter
373   unsigned j; // middle loop couter, leads to unsigned icmp in loop header.
374   // k declared in the loop init below
375   short l; // inner loop counter
376 // CHECK: store i32 0, i32* [[OMP_IV:[^,]+]]
377 //
378   #pragma omp simd collapse(4)
379 
380 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID:[0-9]+]]
381 // CHECK-NEXT: [[CMP:%.+]] = icmp ult i32 [[IV]], 120
382 // CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]
383   for (i = 1; i < 3; i++) // 2 iterations
384     for (j = 2u; j < 5u; j++) //3 iterations
385       for (int k = 3; k <= 6; k++) // 4 iterations
386         for (l = 4; l < 9; ++l) // 5 iterations
387         {
388 // CHECK: [[COLL1_BODY]]:
389 // Start of body: calculate i from index:
390 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
391 // Calculation of the loop counters values.
392 // CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60
393 // CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1
394 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]
395 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
396 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
397 // CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2]], 20
398 // CHECK-NEXT: [[CALC_J_2:%.+]] = urem i32 [[CALC_J_1]], 3
399 // CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1
400 // CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]
401 // CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]]
402 // CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
403 // CHECK-NEXT: [[CALC_K_1:%.+]] = udiv i32 [[IV1_3]], 5
404 // CHECK-NEXT: [[CALC_K_2:%.+]] = urem i32 [[CALC_K_1]], 4
405 // CHECK-NEXT: [[CALC_K_2_MUL1:%.+]] = mul i32 [[CALC_K_2]], 1
406 // CHECK-NEXT: [[CALC_K_3:%.+]] = add i32 3, [[CALC_K_2_MUL1]]
407 // CHECK-NEXT: store i32 [[CALC_K_3]], i32* [[LC_K:.+]]
408 // CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
409 // CHECK-NEXT: [[CALC_L_1:%.+]] = urem i32 [[IV1_4]], 5
410 // CHECK-NEXT: [[CALC_L_1_MUL1:%.+]] = mul i32 [[CALC_L_1]], 1
411 // CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[CALC_L_1_MUL1]]
412 // CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16
413 // CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]]
414 // ... loop body ...
415 // End of body: store into a[i]:
416 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
417     float res = b[j] * c[k];
418     a[i] = res * d[l];
419 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
420 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
421 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
422 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
423 // CHECK: [[COLL1_END]]:
424   }
425 // i,j,l are updated; k is not updated.
426 // CHECK: store i32 3, i32*
427 // CHECK-NEXT: store i32 5, i32*
428 // CHECK-NEXT: store i32 7, i32*
429 // CHECK-NEXT: store i16 9, i16*
430 // CHECK: ret void
431 }
432 
433 extern char foo();
434 extern double globalfloat;
435 
436 // CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}
437 void widened(float *a, float *b, float *c, float *d) {
438   int i; // outer loop counter
439   short j; // inner loop counter
440   globalfloat = 1.0;
441   int localint = 1;
442 // CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]]
443 // Counter is widened to 64 bits.
444 // CHECK: store i64 0, i64* [[OMP_IV:[^,]+]]
445 //
446   #pragma omp simd collapse(2) private(globalfloat, localint)
447 
448 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID:[0-9]+]]
449 // CHECK-NEXT: [[LI:%.+]] = load i64, i64* [[OMP_LI:%[^,]+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
450 // CHECK-NEXT: [[NUMIT:%.+]] = add nsw i64 [[LI]], 1
451 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i64 [[IV]], [[NUMIT]]
452 // CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]
453   for (i = 1; i < 3; i++) // 2 iterations
454     for (j = 0; j < foo(); j++) // foo() iterations
455   {
456 // CHECK: [[WIDE1_BODY]]:
457 // Start of body: calculate i from index:
458 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
459 // Calculation of the loop counters values...
460 // CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]]
461 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
462 // CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]]
463 // ... loop body ...
464 //
465 // Here we expect store into private double var, not global
466 // CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]]
467     globalfloat = (float)j/i;
468     float res = b[j] * c[j];
469 // Store into a[i]:
470 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
471     a[i] = res * d[i];
472 // Then there's a store into private var localint:
473 // CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
474     localint = (int)j;
475 // CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
476 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1
477 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
478 //
479 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
480 // CHECK: [[WIDE1_END]]:
481   }
482 // i,j are updated.
483 // CHECK: store i32 3, i32* [[I:%[^,]+]]
484 // CHECK: store i16
485 //
486 // Here we expect store into original localint, not its privatized version.
487 // CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]]
488   localint = (int)j;
489 // CHECK: ret void
490 }
491 
492 // CHECK-LABEL: define {{.*void}} @{{.*}}linear{{.*}}(float* {{.+}})
493 void linear(float *a) {
494   // CHECK: [[VAL_ADDR:%.+]] = alloca i64,
495   // CHECK: [[K_ADDR:%.+]] = alloca i64*,
496   long long val = 0;
497   long long &k = val;
498 
499   #pragma omp simd linear(k : 3)
500 // CHECK: store i64* [[VAL_ADDR]], i64** [[K_ADDR]],
501 // CHECK: [[VAL_REF:%.+]] = load i64*, i64** [[K_ADDR]],
502 // CHECK: store i64* [[VAL_REF]], i64** [[K_ADDR_REF:%.+]],
503 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
504 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],
505 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_REF]]
506 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
507 
508 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
509 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
510 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
511   for (int i = 10; i > 1; i--) {
512 // CHECK: [[SIMPLE_LOOP_BODY]]:
513 // Start of body: calculate i from IV:
514 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
515 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
516 // CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
517 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
518 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
519 //
520 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
521 // CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
522 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
523 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
524 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
525 // Update of the privatized version of linear variable!
526 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
527     a[k]++;
528     k = k + 3;
529 // CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
530 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
531 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
532 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
533   }
534 // CHECK: [[SIMPLE_LOOP_END]]:
535 //
536 // Update linear vars after loop, as the loop was operating on a private version.
537 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],
538 // CHECK: store i64* [[K_REF]], i64** [[K_PRIV_REF:%.+]],
539 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
540 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
541 // CHECK-NEXT: [[K_REF:%.+]] = load i64*, i64** [[K_PRIV_REF]],
542 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_REF]]
543 //
544 
545   #pragma omp simd linear(val(k) : 3)
546 // CHECK: [[VAL_REF:%.+]] = load i64*, i64** [[K_ADDR]],
547 // CHECK: store i64* [[VAL_REF]], i64** [[K_ADDR_REF:%.+]],
548 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
549 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],
550 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_REF]]
551 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
552 
553 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
554 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
555 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
556   for (int i = 10; i > 1; i--) {
557 // CHECK: [[SIMPLE_LOOP_BODY]]:
558 // Start of body: calculate i from IV:
559 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
560 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
561 // CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
562 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
563 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
564 //
565 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
566 // CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
567 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
568 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
569 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
570 // Update of the privatized version of linear variable!
571 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
572     a[k]++;
573     k = k + 3;
574 // CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
575 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
576 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
577 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
578   }
579 // CHECK: [[SIMPLE_LOOP_END]]:
580 //
581 // Update linear vars after loop, as the loop was operating on a private version.
582 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],
583 // CHECK: store i64* [[K_REF]], i64** [[K_PRIV_REF:%.+]],
584 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
585 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
586 // CHECK-NEXT: [[K_REF:%.+]] = load i64*, i64** [[K_PRIV_REF]],
587 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_REF]]
588 //
589   #pragma omp simd linear(uval(k) : 3)
590 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
591 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[VAL_ADDR]]
592 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
593 
594 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
595 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
596 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
597   for (int i = 10; i > 1; i--) {
598 // CHECK: [[SIMPLE_LOOP_BODY]]:
599 // Start of body: calculate i from IV:
600 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
601 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
602 // CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
603 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
604 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
605 //
606 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
607 // CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
608 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
609 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
610 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
611 // Update of the privatized version of linear variable!
612 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
613     a[k]++;
614     k = k + 3;
615 // CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
616 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
617 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
618 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
619   }
620 // CHECK: [[SIMPLE_LOOP_END]]:
621 //
622 // Update linear vars after loop, as the loop was operating on a private version.
623 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
624 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
625 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[VAL_ADDR]]
626 //
627 }
628 
629 // TERM_DEBUG-LABEL: bar
630 int bar() {return 0;};
631 
632 // TERM_DEBUG-LABEL: parallel_simd
633 void parallel_simd(float *a) {
634 #pragma omp parallel
635 #pragma omp simd
636   // TERM_DEBUG-NOT: __kmpc_global_thread_num
637   // TERM_DEBUG:     invoke i32 {{.*}}bar{{.*}}()
638   // TERM_DEBUG:     unwind label %[[TERM_LPAD:.+]],
639   // TERM_DEBUG-NOT: __kmpc_global_thread_num
640   // TERM_DEBUG:     [[TERM_LPAD]]
641   // TERM_DEBUG:     call void @__clang_call_terminate
642   // TERM_DEBUG:     unreachable
643   for (unsigned i = 131071; i <= 2147483647; i += 127)
644     a[i] += bar();
645 }
646 // TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],
647 
648 // CHECK-LABEL: S8
649 // CHECK-DAG: ptrtoint [[SS_TY]]* %{{.+}} to i64
650 // CHECK-DAG: ptrtoint [[SS_TY]]* %{{.+}} to i64
651 // CHECK-DAG: ptrtoint [[SS_TY]]* %{{.+}} to i64
652 // CHECK-DAG: ptrtoint [[SS_TY]]* %{{.+}} to i64
653 
654 // CHECK-DAG: and i64 %{{.+}}, 15
655 // CHECK-DAG: icmp eq i64 %{{.+}}, 0
656 // CHECK-DAG: call void @llvm.assume(i1
657 
658 // CHECK-DAG: and i64 %{{.+}}, 7
659 // CHECK-DAG: icmp eq i64 %{{.+}}, 0
660 // CHECK-DAG: call void @llvm.assume(i1
661 
662 // CHECK-DAG: and i64 %{{.+}}, 15
663 // CHECK-DAG: icmp eq i64 %{{.+}}, 0
664 // CHECK-DAG: call void @llvm.assume(i1
665 
666 // CHECK-DAG: and i64 %{{.+}}, 3
667 // CHECK-DAG: icmp eq i64 %{{.+}}, 0
668 // CHECK-DAG: call void @llvm.assume(i1
669 struct SS {
670   SS(): a(0) {}
671   SS(int v) : a(v) {}
672   int a;
673   typedef int type;
674 };
675 
676 template <typename T>
677 class S7 : public T {
678 protected:
679   T *a;
680   T b[2];
681   S7() : a(0) {}
682 
683 public:
684   S7(typename T::type &v) : a((T*)&v) {
685 #pragma omp simd aligned(a)
686     for (int k = 0; k < a->a; ++k)
687       ++this->a->a;
688 #pragma omp simd aligned(this->b : 8)
689     for (int k = 0; k < a->a; ++k)
690       ++a->a;
691   }
692 };
693 
694 class S8 : private IterDouble, public S7<SS> {
695   S8() {}
696 
697 public:
698   S8(int v) : S7<SS>(v){
699 #pragma omp parallel private(a)
700 #pragma omp simd aligned(S7<SS>::a)
701     for (int k = 0; k < a->a; ++k)
702       ++this->a->a;
703 #pragma omp parallel shared(b)
704 #pragma omp simd aligned(this->b: 4)
705     for (int k = 0; k < a->a; ++k)
706       ++a->a;
707   }
708 };
709 S8 s8(0);
710 
711 // TERM_DEBUG-NOT: line: 0,
712 // TERM_DEBUG: distinct !DISubprogram(linkageName: "_GLOBAL__sub_I_simd_codegen.cpp",
713 
714 #endif // HEADER
715 
716