1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -g -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -gline-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG
5 // REQUIRES: x86-registered-target
6 // expected-no-diagnostics
7 #ifndef HEADER
8 #define HEADER
9 
10 long long get_val() { return 0; }
11 double *g_ptr;
12 
13 // CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
14 void simple(float *a, float *b, float *c, float *d) {
15   #pragma omp simd
16 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
17 
18 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID:[0-9]+]]
19 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], 6
20 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
21   for (int i = 3; i < 32; i += 5) {
22 // CHECK: [[SIMPLE_LOOP1_BODY]]
23 // Start of body: calculate i from IV:
24 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
25 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
26 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]
27 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
28 // ... loop body ...
29 // End of body: store into a[i]:
30 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
31     a[i] = b[i] * c[i] * d[i];
32 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
33 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
34 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
35 // br label %{{.+}}, !llvm.loop !{{.+}}
36   }
37 // CHECK: [[SIMPLE_LOOP1_END]]
38 
39   long long k = get_val();
40 
41   #pragma omp simd linear(k : 3)
42 // CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val
43 // CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]]
44 // CHECK: store i32 0, i32* [[OMP_IV2:%[^,]+]]
45 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR]]
46 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
47 
48 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID:[0-9]+]]
49 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV2]], 9
50 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
51   for (int i = 10; i > 1; i--) {
52 // CHECK: [[SIMPLE_LOOP2_BODY]]
53 // Start of body: calculate i from IV:
54 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
55 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
56 // CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1
57 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]
58 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
59 //
60 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
61 // CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
62 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3
63 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
64 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
65 // Update of the privatized version of linear variable!
66 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
67     a[k]++;
68     k = k + 3;
69 // CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
70 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
71 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
72 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
73   }
74 // CHECK: [[SIMPLE_LOOP2_END]]
75 //
76 // Update linear vars after loop, as the loop was operating on a private version.
77 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
78 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
79 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_VAR]]
80 //
81 
82   int lin = 12;
83   #pragma omp simd linear(lin : get_val()), linear(g_ptr)
84 
85 // Init linear private var.
86 // CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]]
87 // CHECK: store i64 0, i64* [[OMP_IV3:%[^,]+]]
88 
89 // CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]]
90 // CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]]
91 // Remember linear step.
92 // CHECK: [[CALL_VAL:%.+]] = invoke
93 // CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]]
94 
95 // CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:@[^,]+]]
96 // CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]]
97 
98 // CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID:[0-9]+]]
99 // CHECK-NEXT: [[CMP3:%.+]] = icmp ult i64 [[IV3]], 4
100 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
101   for (unsigned long long it = 2000; it >= 600; it-=400) {
102 // CHECK: [[SIMPLE_LOOP3_BODY]]
103 // Start of body: calculate it from IV:
104 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
105 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
106 // CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]
107 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
108 //
109 // Linear start and step are used to calculate current value of the linear variable.
110 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
111 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
112 // CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]],{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
113 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
114 // CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
115 // CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1
116 // CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]
117 // CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
118     *g_ptr++ = 0.0;
119 // CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
120 // CHECK: store double{{.*}}[[GEP_VAL]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
121     a[it + lin]++;
122 // CHECK: [[FLT_INC:%.+]] = fadd float
123 // CHECK-NEXT: store float [[FLT_INC]],{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
124 // CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
125 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
126 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
127   }
128 // CHECK: [[SIMPLE_LOOP3_END]]
129 //
130 // Linear start and step are used to calculate final value of the linear variables.
131 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
132 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
133 // CHECK: store i32 {{.+}}, i32* [[LIN_VAR]],
134 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
135 // CHECK: store double* {{.*}}[[GLIN_VAR]]
136 
137   #pragma omp simd
138 // CHECK: store i32 0, i32* [[OMP_IV4:%[^,]+]]
139 
140 // CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID:[0-9]+]]
141 // CHECK-NEXT: [[CMP4:%.+]] = icmp slt i32 [[IV4]], 4
142 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
143   for (short it = 6; it <= 20; it-=-4) {
144 // CHECK: [[SIMPLE_LOOP4_BODY]]
145 // Start of body: calculate it from IV:
146 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
147 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
148 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]
149 // CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16
150 // CHECK-NEXT: store i16 [[LC_IT_3]], i16* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
151 
152 // CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
153 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
154 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
155   }
156 // CHECK: [[SIMPLE_LOOP4_END]]
157 
158   #pragma omp simd
159 // CHECK: store i32 0, i32* [[OMP_IV5:%[^,]+]]
160 
161 // CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID:[0-9]+]]
162 // CHECK-NEXT: [[CMP5:%.+]] = icmp slt i32 [[IV5]], 26
163 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
164   for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
165 // CHECK: [[SIMPLE_LOOP5_BODY]]
166 // Start of body: calculate it from IV:
167 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
168 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
169 // CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]
170 // CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8
171 // CHECK-NEXT: store i8 [[LC_IT_2]], i8* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
172 
173 // CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
174 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
175 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
176   }
177 // CHECK: [[SIMPLE_LOOP5_END]]
178 
179 // CHECK-NOT: mul i32 %{{.+}}, 10
180   #pragma omp simd
181   for (unsigned i=100; i<10; i+=10) {
182   }
183 
184   int A;
185   // CHECK: store i32 -1, i32* [[A:%.+]],
186   A = -1;
187   #pragma omp simd lastprivate(A)
188 // CHECK: store i64 0, i64* [[OMP_IV7:%[^,]+]]
189 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
190 // CHECK: [[SIMD_LOOP7_COND]]
191 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID:[0-9]+]]
192 // CHECK-NEXT: [[CMP7:%.+]] = icmp slt i64 [[IV7]], 7
193 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
194   for (long long i = -10; i < 10; i += 3) {
195 // CHECK: [[SIMPLE_LOOP7_BODY]]
196 // Start of body: calculate i from IV:
197 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
198 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
199 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
200 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
201 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
202 // CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32
203 // CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
204     A = i;
205 // CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
206 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
207 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
208   }
209 // CHECK: [[SIMPLE_LOOP7_END]]
210 // CHECK-NEXT: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]],
211 // CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* [[A]],
212   int R;
213   // CHECK: store i32 -1, i32* [[R:%[^,]+]],
214   R = -1;
215 // CHECK: store i64 0, i64* [[OMP_IV8:%[^,]+]],
216 // CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]],
217   #pragma omp simd reduction(*:R)
218 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
219 // CHECK: [[SIMD_LOOP8_COND]]
220 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID:[0-9]+]]
221 // CHECK-NEXT: [[CMP8:%.+]] = icmp slt i64 [[IV8]], 7
222 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
223   for (long long i = -10; i < 10; i += 3) {
224 // CHECK: [[SIMPLE_LOOP8_BODY]]
225 // Start of body: calculate i from IV:
226 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
227 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
228 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
229 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
230 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
231 // CHECK: store i32 %{{.+}}, i32* [[R_PRIV]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
232     R *= i;
233 // CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
234 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
235 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
236   }
237 // CHECK: [[SIMPLE_LOOP8_END]]
238 // CHECK-DAG: [[R_VAL:%.+]] = load i32, i32* [[R]],
239 // CHECK-DAG: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
240 // CHECK: [[RED:%.+]] = mul nsw i32 [[R_VAL]], [[R_PRIV_VAL]]
241 // CHECK-NEXT: store i32 [[RED]], i32* [[R]],
242 // CHECK-NEXT: ret void
243 }
244 
245 template <class T, unsigned K> T tfoo(T a) { return a + K; }
246 
247 template <typename T, unsigned N>
248 int templ1(T a, T *z) {
249   #pragma omp simd collapse(N)
250   for (int i = 0; i < N * 2; i++) {
251     for (long long j = 0; j < (N + N + N + N); j += 2) {
252       z[i + j] = a + tfoo<T, N>(i + j);
253     }
254   }
255   return 0;
256 }
257 
258 // Instatiation templ1<float,2>
259 // CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}})
260 // CHECK: store i64 0, i64* [[T1_OMP_IV:[^,]+]]
261 // ...
262 // CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID:[0-9]+]]
263 // CHECK-NEXT: [[CMP1:%.+]] = icmp slt i64 [[IV]], 16
264 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
265 // CHECK: [[T1_BODY]]
266 // Loop counters i and j updates:
267 // CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
268 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
269 // CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1
270 // CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]
271 // CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32
272 // CHECK-NEXT: store i32 [[I_2]], i32* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
273 // CHECK: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
274 // CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4
275 // CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2
276 // CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]
277 // CHECK-NEXT: store i64 [[J_2_ADD0]], i64* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
278 // simd.for.inc:
279 // CHECK: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
280 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
281 // CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
282 // CHECK-NEXT: br label {{%.+}}
283 // CHECK: [[T1_END]]
284 // CHECK: ret i32 0
285 //
286 void inst_templ1() {
287   float a;
288   float z[100];
289   templ1<float,2> (a, z);
290 }
291 
292 
293 typedef int MyIdx;
294 
295 class IterDouble {
296   double *Ptr;
297 public:
298   IterDouble operator++ () const {
299     IterDouble n;
300     n.Ptr = Ptr + 1;
301     return n;
302   }
303   bool operator < (const IterDouble &that) const {
304     return Ptr < that.Ptr;
305   }
306   double & operator *() const {
307     return *Ptr;
308   }
309   MyIdx operator - (const IterDouble &that) const {
310     return (MyIdx) (Ptr - that.Ptr);
311   }
312   IterDouble operator + (int Delta) {
313     IterDouble re;
314     re.Ptr = Ptr + Delta;
315     return re;
316   }
317 
318   ///~IterDouble() {}
319 };
320 
321 // CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}
322 void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
323 //
324 // CHECK: store i32 0, i32* [[IT_OMP_IV:%[^,]+]]
325 // Calculate number of iterations before the loop body.
326 // CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}
327 // CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1
328 // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1
329 // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1
330 // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1
331 // CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}}
332   #pragma omp simd
333 
334 // CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}} !llvm.mem.parallel_loop_access ![[ITER_LOOP_ID:[0-9]+]]
335 // CHECK-NEXT: [[LAST_IT:%.+]] = load i32, i32* [[OMP_LAST_IT]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
336 // CHECK-NEXT: [[NUM_IT:%.+]] = add nsw i32 [[LAST_IT]], 1
337 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], [[NUM_IT]]
338 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
339   for (IterDouble i = ia; i < ib; ++i) {
340 // CHECK: [[IT_BODY]]
341 // Start of body: calculate i from index:
342 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
343 // Call of operator+ (i, IV).
344 // CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}
345 // ... loop body ...
346    *i = *ic * 0.5;
347 // Float multiply and save result.
348 // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01
349 // CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}
350 // CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]], !llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
351    ++ic;
352 //
353 // CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
354 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1
355 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
356 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
357   }
358 // CHECK: [[IT_END]]
359 // CHECK: ret void
360 }
361 
362 
363 // CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}
364 void collapsed(float *a, float *b, float *c, float *d) {
365   int i; // outer loop counter
366   unsigned j; // middle loop couter, leads to unsigned icmp in loop header.
367   // k declared in the loop init below
368   short l; // inner loop counter
369 // CHECK: store i32 0, i32* [[OMP_IV:[^,]+]]
370 //
371   #pragma omp simd collapse(4)
372 
373 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID:[0-9]+]]
374 // CHECK-NEXT: [[CMP:%.+]] = icmp ult i32 [[IV]], 120
375 // CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]
376   for (i = 1; i < 3; i++) // 2 iterations
377     for (j = 2u; j < 5u; j++) //3 iterations
378       for (int k = 3; k <= 6; k++) // 4 iterations
379         for (l = 4; l < 9; ++l) // 5 iterations
380         {
381 // CHECK: [[COLL1_BODY]]
382 // Start of body: calculate i from index:
383 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
384 // Calculation of the loop counters values.
385 // CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60
386 // CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1
387 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]
388 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
389 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
390 // CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2]], 20
391 // CHECK-NEXT: [[CALC_J_2:%.+]] = urem i32 [[CALC_J_1]], 3
392 // CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1
393 // CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]
394 // CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]]
395 // CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
396 // CHECK-NEXT: [[CALC_K_1:%.+]] = udiv i32 [[IV1_3]], 5
397 // CHECK-NEXT: [[CALC_K_2:%.+]] = urem i32 [[CALC_K_1]], 4
398 // CHECK-NEXT: [[CALC_K_2_MUL1:%.+]] = mul i32 [[CALC_K_2]], 1
399 // CHECK-NEXT: [[CALC_K_3:%.+]] = add i32 3, [[CALC_K_2_MUL1]]
400 // CHECK-NEXT: store i32 [[CALC_K_3]], i32* [[LC_K:.+]]
401 // CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
402 // CHECK-NEXT: [[CALC_L_1:%.+]] = urem i32 [[IV1_4]], 5
403 // CHECK-NEXT: [[CALC_L_1_MUL1:%.+]] = mul i32 [[CALC_L_1]], 1
404 // CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[CALC_L_1_MUL1]]
405 // CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16
406 // CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]]
407 // ... loop body ...
408 // End of body: store into a[i]:
409 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
410     float res = b[j] * c[k];
411     a[i] = res * d[l];
412 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
413 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
414 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
415 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
416 // CHECK: [[COLL1_END]]
417   }
418 // i,j,l are updated; k is not updated.
419 // CHECK: store i32 3, i32* [[I:%[^,]+]]
420 // CHECK-NEXT: store i32 5, i32* [[I:%[^,]+]]
421 // CHECK-NEXT: store i16 9, i16* [[I:%[^,]+]]
422 // CHECK: ret void
423 }
424 
425 extern char foo();
426 extern double globalfloat;
427 
428 // CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}
429 void widened(float *a, float *b, float *c, float *d) {
430   int i; // outer loop counter
431   short j; // inner loop counter
432   globalfloat = 1.0;
433   int localint = 1;
434 // CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]]
435 // Counter is widened to 64 bits.
436 // CHECK: store i64 0, i64* [[OMP_IV:[^,]+]]
437 //
438   #pragma omp simd collapse(2) private(globalfloat, localint)
439 
440 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID:[0-9]+]]
441 // CHECK-NEXT: [[LI:%.+]] = load i64, i64* [[OMP_LI:%[^,]+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
442 // CHECK-NEXT: [[NUMIT:%.+]] = add nsw i64 [[LI]], 1
443 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i64 [[IV]], [[NUMIT]]
444 // CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]
445   for (i = 1; i < 3; i++) // 2 iterations
446     for (j = 0; j < foo(); j++) // foo() iterations
447   {
448 // CHECK: [[WIDE1_BODY]]
449 // Start of body: calculate i from index:
450 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
451 // Calculation of the loop counters values...
452 // CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]]
453 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
454 // CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]]
455 // ... loop body ...
456 //
457 // Here we expect store into private double var, not global
458 // CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]]
459     globalfloat = (float)j/i;
460     float res = b[j] * c[j];
461 // Store into a[i]:
462 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
463     a[i] = res * d[i];
464 // Then there's a store into private var localint:
465 // CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
466     localint = (int)j;
467 // CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
468 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1
469 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
470 //
471 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
472 // CHECK: [[WIDE1_END]]
473   }
474 // i,j are updated.
475 // CHECK: store i32 3, i32* [[I:%[^,]+]]
476 // CHECK: store i16
477 //
478 // Here we expect store into original localint, not its privatized version.
479 // CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]]
480   localint = (int)j;
481 // CHECK: ret void
482 }
483 
484 // CHECK-LABEL: define {{.*void}} @{{.*}}linear{{.*}}(float* {{.+}})
485 void linear(float *a) {
486   // CHECK: [[VAL_ADDR:%.+]] = alloca i64,
487   // CHECK: [[K_ADDR:%.+]] = alloca i64*,
488   long long val = 0;
489   long long &k = val;
490 
491   #pragma omp simd linear(k : 3)
492 // CHECK: store i64* [[VAL_ADDR]], i64** [[K_ADDR]],
493 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
494 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR]],
495 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_REF]]
496 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
497 
498 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
499 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
500 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
501   for (int i = 10; i > 1; i--) {
502 // CHECK: [[SIMPLE_LOOP_BODY]]
503 // Start of body: calculate i from IV:
504 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
505 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
506 // CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
507 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
508 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
509 //
510 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
511 // CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
512 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
513 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
514 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
515 // Update of the privatized version of linear variable!
516 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
517     a[k]++;
518     k = k + 3;
519 // CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
520 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
521 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
522 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
523   }
524 // CHECK: [[SIMPLE_LOOP_END]]
525 //
526 // Update linear vars after loop, as the loop was operating on a private version.
527 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR]],
528 // CHECK: store i64* [[K_REF]], i64** [[K_PRIV_REF:%.+]],
529 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
530 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
531 // CHECK-NEXT: [[K_REF:%.+]] = load i64*, i64** [[K_PRIV_REF]],
532 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_REF]]
533 //
534 
535   #pragma omp simd linear(val(k) : 3)
536 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
537 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR]],
538 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_REF]]
539 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
540 
541 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
542 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
543 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
544   for (int i = 10; i > 1; i--) {
545 // CHECK: [[SIMPLE_LOOP_BODY]]
546 // Start of body: calculate i from IV:
547 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
548 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
549 // CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
550 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
551 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
552 //
553 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
554 // CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
555 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
556 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
557 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
558 // Update of the privatized version of linear variable!
559 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
560     a[k]++;
561     k = k + 3;
562 // CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
563 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
564 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
565 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
566   }
567 // CHECK: [[SIMPLE_LOOP_END]]
568 //
569 // Update linear vars after loop, as the loop was operating on a private version.
570 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR]],
571 // CHECK: store i64* [[K_REF]], i64** [[K_PRIV_REF:%.+]],
572 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
573 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
574 // CHECK-NEXT: [[K_REF:%.+]] = load i64*, i64** [[K_PRIV_REF]],
575 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_REF]]
576 //
577   #pragma omp simd linear(uval(k) : 3)
578 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
579 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[VAL_ADDR]]
580 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
581 
582 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
583 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
584 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
585   for (int i = 10; i > 1; i--) {
586 // CHECK: [[SIMPLE_LOOP_BODY]]
587 // Start of body: calculate i from IV:
588 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
589 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
590 // CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
591 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
592 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
593 //
594 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
595 // CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
596 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
597 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
598 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
599 // Update of the privatized version of linear variable!
600 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
601     a[k]++;
602     k = k + 3;
603 // CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
604 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
605 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
606 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
607   }
608 // CHECK: [[SIMPLE_LOOP_END]]
609 //
610 // Update linear vars after loop, as the loop was operating on a private version.
611 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
612 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
613 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[VAL_ADDR]]
614 //
615 }
616 
617 // TERM_DEBUG-LABEL: bar
618 int bar() {return 0;};
619 
620 // TERM_DEBUG-LABEL: parallel_simd
621 void parallel_simd(float *a) {
622 #pragma omp parallel
623 #pragma omp simd
624   // TERM_DEBUG-NOT: __kmpc_global_thread_num
625   // TERM_DEBUG:     invoke i32 {{.*}}bar{{.*}}()
626   // TERM_DEBUG:     unwind label %[[TERM_LPAD:.+]],
627   // TERM_DEBUG-NOT: __kmpc_global_thread_num
628   // TERM_DEBUG:     [[TERM_LPAD]]
629   // TERM_DEBUG:     call void @__clang_call_terminate
630   // TERM_DEBUG:     unreachable
631   for (unsigned i = 131071; i <= 2147483647; i += 127)
632     a[i] += bar();
633 }
634 // TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],
635 #endif // HEADER
636 
637