1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG
5 // REQUIRES: x86-registered-target
6 // expected-no-diagnostics
7  #ifndef HEADER
8  #define HEADER
9 
10 // CHECK: [[SS_TY:%.+]] = type { i32 }
11 
12 long long get_val() { return 0; }
13 double *g_ptr;
14 
15 // CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
16 void simple(float *a, float *b, float *c, float *d) {
17   #pragma omp simd
18 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
19 
20 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID:[0-9]+]]
21 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], 6
22 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
23   for (int i = 3; i < 32; i += 5) {
24 // CHECK: [[SIMPLE_LOOP1_BODY]]
25 // Start of body: calculate i from IV:
26 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
27 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
28 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]
29 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
30 // ... loop body ...
31 // End of body: store into a[i]:
32 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
33     a[i] = b[i] * c[i] * d[i];
34 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
35 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
36 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
37 // br label %{{.+}}, !llvm.loop !{{.+}}
38   }
39 // CHECK: [[SIMPLE_LOOP1_END]]
40 
41   long long k = get_val();
42 
43   #pragma omp simd linear(k : 3)
44 // CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val
45 // CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]]
46 // CHECK: store i32 0, i32* [[OMP_IV2:%[^,]+]]
47 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR]]
48 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
49 
50 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID:[0-9]+]]
51 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV2]], 9
52 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
53   for (int i = 10; i > 1; i--) {
54 // CHECK: [[SIMPLE_LOOP2_BODY]]
55 // Start of body: calculate i from IV:
56 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
57 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
58 // CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1
59 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]
60 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
61 //
62 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
63 // CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
64 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3
65 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
66 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
67 // Update of the privatized version of linear variable!
68 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
69     a[k]++;
70     k = k + 3;
71 // CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
72 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
73 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
74 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
75   }
76 // CHECK: [[SIMPLE_LOOP2_END]]
77 //
78 // Update linear vars after loop, as the loop was operating on a private version.
79 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
80 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
81 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_VAR]]
82 //
83 
84   int lin = 12;
85   #pragma omp simd linear(lin : get_val()), linear(g_ptr)
86 
87 // Init linear private var.
88 // CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]]
89 // CHECK: store i64 0, i64* [[OMP_IV3:%[^,]+]]
90 
91 // CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]]
92 // CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]]
93 // Remember linear step.
94 // CHECK: [[CALL_VAL:%.+]] = invoke
95 // CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]]
96 
97 // CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:@[^,]+]]
98 // CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]]
99 
100 // CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID:[0-9]+]]
101 // CHECK-NEXT: [[CMP3:%.+]] = icmp ult i64 [[IV3]], 4
102 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
103   for (unsigned long long it = 2000; it >= 600; it-=400) {
104 // CHECK: [[SIMPLE_LOOP3_BODY]]
105 // Start of body: calculate it from IV:
106 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
107 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
108 // CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]
109 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
110 //
111 // Linear start and step are used to calculate current value of the linear variable.
112 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
113 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
114 // CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]],{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
115 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
116 // CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
117 // CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1
118 // CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]
119 // CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
120     *g_ptr++ = 0.0;
121 // CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
122 // CHECK: store double{{.*}}[[GEP_VAL]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
123     a[it + lin]++;
124 // CHECK: [[FLT_INC:%.+]] = fadd float
125 // CHECK-NEXT: store float [[FLT_INC]],{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
126 // CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
127 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
128 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
129   }
130 // CHECK: [[SIMPLE_LOOP3_END]]
131 //
132 // Linear start and step are used to calculate final value of the linear variables.
133 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
134 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
135 // CHECK: store i32 {{.+}}, i32* [[LIN_VAR]],
136 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
137 // CHECK: store double* {{.*}}[[GLIN_VAR]]
138 
139   #pragma omp simd
140 // CHECK: store i32 0, i32* [[OMP_IV4:%[^,]+]]
141 
142 // CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID:[0-9]+]]
143 // CHECK-NEXT: [[CMP4:%.+]] = icmp slt i32 [[IV4]], 4
144 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
145   for (short it = 6; it <= 20; it-=-4) {
146 // CHECK: [[SIMPLE_LOOP4_BODY]]
147 // Start of body: calculate it from IV:
148 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
149 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
150 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]
151 // CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16
152 // CHECK-NEXT: store i16 [[LC_IT_3]], i16* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
153 
154 // CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
155 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
156 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
157   }
158 // CHECK: [[SIMPLE_LOOP4_END]]
159 
160   #pragma omp simd
161 // CHECK: store i32 0, i32* [[OMP_IV5:%[^,]+]]
162 
163 // CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID:[0-9]+]]
164 // CHECK-NEXT: [[CMP5:%.+]] = icmp slt i32 [[IV5]], 26
165 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
166   for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
167 // CHECK: [[SIMPLE_LOOP5_BODY]]
168 // Start of body: calculate it from IV:
169 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
170 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
171 // CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]
172 // CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8
173 // CHECK-NEXT: store i8 [[LC_IT_2]], i8* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
174 
175 // CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
176 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
177 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
178   }
179 // CHECK: [[SIMPLE_LOOP5_END]]
180 
181 // CHECK-NOT: mul i32 %{{.+}}, 10
182   #pragma omp simd
183   for (unsigned i=100; i<10; i+=10) {
184   }
185 
186   int A;
187   // CHECK: store i32 -1, i32* [[A:%.+]],
188   A = -1;
189   #pragma omp simd lastprivate(A)
190 // CHECK: store i64 0, i64* [[OMP_IV7:%[^,]+]]
191 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
192 // CHECK: [[SIMD_LOOP7_COND]]
193 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID:[0-9]+]]
194 // CHECK-NEXT: [[CMP7:%.+]] = icmp slt i64 [[IV7]], 7
195 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
196   for (long long i = -10; i < 10; i += 3) {
197 // CHECK: [[SIMPLE_LOOP7_BODY]]
198 // Start of body: calculate i from IV:
199 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
200 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
201 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
202 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
203 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
204 // CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32
205 // CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
206     A = i;
207 // CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
208 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
209 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
210   }
211 // CHECK: [[SIMPLE_LOOP7_END]]
212 // CHECK-NEXT: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]],
213 // CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* [[A]],
214   int R;
215   // CHECK: store i32 -1, i32* [[R:%[^,]+]],
216   R = -1;
217 // CHECK: store i64 0, i64* [[OMP_IV8:%[^,]+]],
218 // CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]],
219   #pragma omp simd reduction(*:R)
220 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
221 // CHECK: [[SIMD_LOOP8_COND]]
222 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID:[0-9]+]]
223 // CHECK-NEXT: [[CMP8:%.+]] = icmp slt i64 [[IV8]], 7
224 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
225   for (long long i = -10; i < 10; i += 3) {
226 // CHECK: [[SIMPLE_LOOP8_BODY]]
227 // Start of body: calculate i from IV:
228 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
229 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
230 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
231 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
232 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
233 // CHECK: store i32 %{{.+}}, i32* [[R_PRIV]],{{.+}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
234     R *= i;
235 // CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
236 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
237 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
238   }
239 // CHECK: [[SIMPLE_LOOP8_END]]
240 // CHECK-DAG: [[R_VAL:%.+]] = load i32, i32* [[R]],
241 // CHECK-DAG: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
242 // CHECK: [[RED:%.+]] = mul nsw i32 [[R_VAL]], [[R_PRIV_VAL]]
243 // CHECK-NEXT: store i32 [[RED]], i32* [[R]],
244 // CHECK-NEXT: ret void
245 }
246 
247 template <class T, unsigned K> T tfoo(T a) { return a + K; }
248 
249 template <typename T, unsigned N>
250 int templ1(T a, T *z) {
251   #pragma omp simd collapse(N)
252   for (int i = 0; i < N * 2; i++) {
253     for (long long j = 0; j < (N + N + N + N); j += 2) {
254       z[i + j] = a + tfoo<T, N>(i + j);
255     }
256   }
257   return 0;
258 }
259 
260 // Instatiation templ1<float,2>
261 // CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}})
262 // CHECK: store i64 0, i64* [[T1_OMP_IV:[^,]+]]
263 // ...
264 // CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID:[0-9]+]]
265 // CHECK-NEXT: [[CMP1:%.+]] = icmp slt i64 [[IV]], 16
266 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
267 // CHECK: [[T1_BODY]]
268 // Loop counters i and j updates:
269 // CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
270 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
271 // CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1
272 // CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]
273 // CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32
274 // CHECK-NEXT: store i32 [[I_2]], i32* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
275 // CHECK: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
276 // CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4
277 // CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2
278 // CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]
279 // CHECK-NEXT: store i64 [[J_2_ADD0]], i64* {{%.+}}{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
280 // simd.for.inc:
281 // CHECK: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
282 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
283 // CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
284 // CHECK-NEXT: br label {{%.+}}
285 // CHECK: [[T1_END]]
286 // CHECK: ret i32 0
287 //
288 void inst_templ1() {
289   float a;
290   float z[100];
291   templ1<float,2> (a, z);
292 }
293 
294 
295 typedef int MyIdx;
296 
297 class IterDouble {
298   double *Ptr;
299 public:
300   IterDouble operator++ () const {
301     IterDouble n;
302     n.Ptr = Ptr + 1;
303     return n;
304   }
305   bool operator < (const IterDouble &that) const {
306     return Ptr < that.Ptr;
307   }
308   double & operator *() const {
309     return *Ptr;
310   }
311   MyIdx operator - (const IterDouble &that) const {
312     return (MyIdx) (Ptr - that.Ptr);
313   }
314   IterDouble operator + (int Delta) {
315     IterDouble re;
316     re.Ptr = Ptr + Delta;
317     return re;
318   }
319 
320   ///~IterDouble() {}
321 };
322 
323 // CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}
324 void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
325 //
326 // Calculate number of iterations before the loop body.
327 // CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}
328 // CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1
329 // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1
330 // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1
331 // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1
332 // CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}}
333 // CHECK: store i32 0, i32* [[IT_OMP_IV:%[^,]+]]
334   #pragma omp simd
335 
336 // CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}} !llvm.mem.parallel_loop_access ![[ITER_LOOP_ID:[0-9]+]]
337 // CHECK-NEXT: [[LAST_IT:%.+]] = load i32, i32* [[OMP_LAST_IT]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
338 // CHECK-NEXT: [[NUM_IT:%.+]] = add nsw i32 [[LAST_IT]], 1
339 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], [[NUM_IT]]
340 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
341   for (IterDouble i = ia; i < ib; ++i) {
342 // CHECK: [[IT_BODY]]
343 // Start of body: calculate i from index:
344 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
345 // Call of operator+ (i, IV).
346 // CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}
347 // ... loop body ...
348    *i = *ic * 0.5;
349 // Float multiply and save result.
350 // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01
351 // CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}
352 // CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]], !llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
353    ++ic;
354 //
355 // CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
356 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1
357 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
358 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
359   }
360 // CHECK: [[IT_END]]
361 // CHECK: ret void
362 }
363 
364 
365 // CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}
366 void collapsed(float *a, float *b, float *c, float *d) {
367   int i; // outer loop counter
368   unsigned j; // middle loop couter, leads to unsigned icmp in loop header.
369   // k declared in the loop init below
370   short l; // inner loop counter
371 // CHECK: store i32 0, i32* [[OMP_IV:[^,]+]]
372 //
373   #pragma omp simd collapse(4)
374 
375 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID:[0-9]+]]
376 // CHECK-NEXT: [[CMP:%.+]] = icmp ult i32 [[IV]], 120
377 // CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]
378   for (i = 1; i < 3; i++) // 2 iterations
379     for (j = 2u; j < 5u; j++) //3 iterations
380       for (int k = 3; k <= 6; k++) // 4 iterations
381         for (l = 4; l < 9; ++l) // 5 iterations
382         {
383 // CHECK: [[COLL1_BODY]]
384 // Start of body: calculate i from index:
385 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
386 // Calculation of the loop counters values.
387 // CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60
388 // CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1
389 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]
390 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
391 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
392 // CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2]], 20
393 // CHECK-NEXT: [[CALC_J_2:%.+]] = urem i32 [[CALC_J_1]], 3
394 // CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1
395 // CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]
396 // CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]]
397 // CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
398 // CHECK-NEXT: [[CALC_K_1:%.+]] = udiv i32 [[IV1_3]], 5
399 // CHECK-NEXT: [[CALC_K_2:%.+]] = urem i32 [[CALC_K_1]], 4
400 // CHECK-NEXT: [[CALC_K_2_MUL1:%.+]] = mul i32 [[CALC_K_2]], 1
401 // CHECK-NEXT: [[CALC_K_3:%.+]] = add i32 3, [[CALC_K_2_MUL1]]
402 // CHECK-NEXT: store i32 [[CALC_K_3]], i32* [[LC_K:.+]]
403 // CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
404 // CHECK-NEXT: [[CALC_L_1:%.+]] = urem i32 [[IV1_4]], 5
405 // CHECK-NEXT: [[CALC_L_1_MUL1:%.+]] = mul i32 [[CALC_L_1]], 1
406 // CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[CALC_L_1_MUL1]]
407 // CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16
408 // CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]]
409 // ... loop body ...
410 // End of body: store into a[i]:
411 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
412     float res = b[j] * c[k];
413     a[i] = res * d[l];
414 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
415 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
416 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
417 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
418 // CHECK: [[COLL1_END]]
419   }
420 // i,j,l are updated; k is not updated.
421 // CHECK: store i32 3, i32* [[I:%[^,]+]]
422 // CHECK-NEXT: store i32 5, i32* [[I:%[^,]+]]
423 // CHECK-NEXT: store i16 9, i16* [[I:%[^,]+]]
424 // CHECK: ret void
425 }
426 
427 extern char foo();
428 extern double globalfloat;
429 
430 // CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}
431 void widened(float *a, float *b, float *c, float *d) {
432   int i; // outer loop counter
433   short j; // inner loop counter
434   globalfloat = 1.0;
435   int localint = 1;
436 // CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]]
437 // Counter is widened to 64 bits.
438 // CHECK: store i64 0, i64* [[OMP_IV:[^,]+]]
439 //
440   #pragma omp simd collapse(2) private(globalfloat, localint)
441 
442 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID:[0-9]+]]
443 // CHECK-NEXT: [[LI:%.+]] = load i64, i64* [[OMP_LI:%[^,]+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
444 // CHECK-NEXT: [[NUMIT:%.+]] = add nsw i64 [[LI]], 1
445 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i64 [[IV]], [[NUMIT]]
446 // CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]
447   for (i = 1; i < 3; i++) // 2 iterations
448     for (j = 0; j < foo(); j++) // foo() iterations
449   {
450 // CHECK: [[WIDE1_BODY]]
451 // Start of body: calculate i from index:
452 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
453 // Calculation of the loop counters values...
454 // CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]]
455 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
456 // CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]]
457 // ... loop body ...
458 //
459 // Here we expect store into private double var, not global
460 // CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]]
461     globalfloat = (float)j/i;
462     float res = b[j] * c[j];
463 // Store into a[i]:
464 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
465     a[i] = res * d[i];
466 // Then there's a store into private var localint:
467 // CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
468     localint = (int)j;
469 // CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
470 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1
471 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
472 //
473 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
474 // CHECK: [[WIDE1_END]]
475   }
476 // i,j are updated.
477 // CHECK: store i32 3, i32* [[I:%[^,]+]]
478 // CHECK: store i16
479 //
480 // Here we expect store into original localint, not its privatized version.
481 // CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]]
482   localint = (int)j;
483 // CHECK: ret void
484 }
485 
486 // CHECK-LABEL: define {{.*void}} @{{.*}}linear{{.*}}(float* {{.+}})
487 void linear(float *a) {
488   // CHECK: [[VAL_ADDR:%.+]] = alloca i64,
489   // CHECK: [[K_ADDR:%.+]] = alloca i64*,
490   long long val = 0;
491   long long &k = val;
492 
493   #pragma omp simd linear(k : 3)
494 // CHECK: store i64* [[VAL_ADDR]], i64** [[K_ADDR]],
495 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
496 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR]],
497 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_REF]]
498 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
499 
500 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
501 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
502 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
503   for (int i = 10; i > 1; i--) {
504 // CHECK: [[SIMPLE_LOOP_BODY]]
505 // Start of body: calculate i from IV:
506 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
507 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
508 // CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
509 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
510 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
511 //
512 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
513 // CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
514 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
515 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
516 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
517 // Update of the privatized version of linear variable!
518 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
519     a[k]++;
520     k = k + 3;
521 // CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
522 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
523 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
524 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
525   }
526 // CHECK: [[SIMPLE_LOOP_END]]
527 //
528 // Update linear vars after loop, as the loop was operating on a private version.
529 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR]],
530 // CHECK: store i64* [[K_REF]], i64** [[K_PRIV_REF:%.+]],
531 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
532 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
533 // CHECK-NEXT: [[K_REF:%.+]] = load i64*, i64** [[K_PRIV_REF]],
534 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_REF]]
535 //
536 
537   #pragma omp simd linear(val(k) : 3)
538 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
539 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR]],
540 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_REF]]
541 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
542 
543 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
544 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
545 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
546   for (int i = 10; i > 1; i--) {
547 // CHECK: [[SIMPLE_LOOP_BODY]]
548 // Start of body: calculate i from IV:
549 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
550 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
551 // CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
552 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
553 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
554 //
555 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
556 // CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
557 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
558 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
559 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
560 // Update of the privatized version of linear variable!
561 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
562     a[k]++;
563     k = k + 3;
564 // CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
565 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
566 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
567 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
568   }
569 // CHECK: [[SIMPLE_LOOP_END]]
570 //
571 // Update linear vars after loop, as the loop was operating on a private version.
572 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR]],
573 // CHECK: store i64* [[K_REF]], i64** [[K_PRIV_REF:%.+]],
574 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
575 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
576 // CHECK-NEXT: [[K_REF:%.+]] = load i64*, i64** [[K_PRIV_REF]],
577 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_REF]]
578 //
579   #pragma omp simd linear(uval(k) : 3)
580 // CHECK: store i32 0, i32* [[OMP_IV:%[^,]+]]
581 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[VAL_ADDR]]
582 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
583 
584 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID:[0-9]+]]
585 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
586 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
587   for (int i = 10; i > 1; i--) {
588 // CHECK: [[SIMPLE_LOOP_BODY]]
589 // Start of body: calculate i from IV:
590 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
591 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
592 // CHECK-NEXT: [[IV_1:%.+]] = mul nsw i32 [[IV_0]], 1
593 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV_1]]
594 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
595 //
596 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
597 // CHECK-NEXT: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
598 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV_2]], 3
599 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
600 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
601 // Update of the privatized version of linear variable!
602 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
603     a[k]++;
604     k = k + 3;
605 // CHECK: [[IV_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
606 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV_2]], 1
607 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
608 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
609   }
610 // CHECK: [[SIMPLE_LOOP_END]]
611 //
612 // Update linear vars after loop, as the loop was operating on a private version.
613 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
614 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
615 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[VAL_ADDR]]
616 //
617 }
618 
619 // TERM_DEBUG-LABEL: bar
620 int bar() {return 0;};
621 
622 // TERM_DEBUG-LABEL: parallel_simd
623 void parallel_simd(float *a) {
624 #pragma omp parallel
625 #pragma omp simd
626   // TERM_DEBUG-NOT: __kmpc_global_thread_num
627   // TERM_DEBUG:     invoke i32 {{.*}}bar{{.*}}()
628   // TERM_DEBUG:     unwind label %[[TERM_LPAD:.+]],
629   // TERM_DEBUG-NOT: __kmpc_global_thread_num
630   // TERM_DEBUG:     [[TERM_LPAD]]
631   // TERM_DEBUG:     call void @__clang_call_terminate
632   // TERM_DEBUG:     unreachable
633   for (unsigned i = 131071; i <= 2147483647; i += 127)
634     a[i] += bar();
635 }
636 // TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],
637 
638 // CHECK-LABEL: S8
639 // CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64
640 // CHECK-NEXT: and i64 %{{.+}}, 15
641 // CHECK-NEXT: icmp eq i64 %{{.+}}, 0
642 // CHECK-NEXT: call void @llvm.assume(i1
643 
644 // CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64
645 // CHECK-NEXT: and i64 %{{.+}}, 7
646 // CHECK-NEXT: icmp eq i64 %{{.+}}, 0
647 // CHECK-NEXT: call void @llvm.assume(i1
648 
649 // CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64
650 // CHECK-NEXT: and i64 %{{.+}}, 15
651 // CHECK-NEXT: icmp eq i64 %{{.+}}, 0
652 // CHECK-NEXT: call void @llvm.assume(i1
653 
654 // CHECK: ptrtoint [[SS_TY]]* %{{.+}} to i64
655 // CHECK-NEXT: and i64 %{{.+}}, 3
656 // CHECK-NEXT: icmp eq i64 %{{.+}}, 0
657 // CHECK-NEXT: call void @llvm.assume(i1
658 struct SS {
659   SS(): a(0) {}
660   SS(int v) : a(v) {}
661   int a;
662   typedef int type;
663 };
664 
665 template <typename T>
666 class S7 : public T {
667 protected:
668   T *a;
669   T b[2];
670   S7() : a(0) {}
671 
672 public:
673   S7(typename T::type &v) : a((T*)&v) {
674 #pragma omp simd aligned(a)
675     for (int k = 0; k < a->a; ++k)
676       ++this->a->a;
677 #pragma omp simd aligned(this->b : 8)
678     for (int k = 0; k < a->a; ++k)
679       ++a->a;
680   }
681 };
682 
683 class S8 : private IterDouble, public S7<SS> {
684   S8() {}
685 
686 public:
687   S8(int v) : S7<SS>(v){
688 #pragma omp parallel private(a)
689 #pragma omp simd aligned(S7<SS>::a)
690     for (int k = 0; k < a->a; ++k)
691       ++this->a->a;
692 #pragma omp parallel shared(b)
693 #pragma omp simd aligned(this->b: 4)
694     for (int k = 0; k < a->a; ++k)
695       ++a->a;
696   }
697 };
698 S8 s8(0);
699 
700 #endif // HEADER
701 
702