1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 8 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 11 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK8 13 // expected-no-diagnostics 14 #ifndef HEADER 15 #define HEADER 16 17 enum omp_allocator_handle_t { 18 omp_null_allocator = 0, 19 omp_default_mem_alloc = 1, 20 omp_large_cap_mem_alloc = 2, 21 omp_const_mem_alloc = 3, 22 omp_high_bw_mem_alloc = 4, 23 omp_low_lat_mem_alloc = 5, 24 omp_cgroup_mem_alloc = 6, 25 omp_pteam_mem_alloc = 7, 26 omp_thread_mem_alloc = 8, 27 KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__ 28 }; 29 30 template <class T> 31 struct S { 32 T f; 33 S(T a) : f(a) {} 34 S() : f() {} 35 operator T() { return T(); } 36 ~S() {} 37 }; 38 39 volatile int g __attribute__((aligned(128))) = 1212; 40 41 struct SS { 42 int a; 43 int b : 4; 44 int &c; 45 SS(int &d) : a(0), b(0), c(d) { 46 #pragma omp parallel private(a, b, c) 47 #ifdef LAMBDA 48 [&]() { 49 ++this->a, --b, (this)->c /= 1; 50 #pragma omp parallel private(a, b, c) 51 ++(this)->a, --b, this->c /= 1; 52 }(); 53 #elif defined(BLOCKS) 54 ^{ 55 ++a; 56 --this->b; 57 (this)->c /= 1; 58 #pragma omp parallel private(a, b, c) 59 ++(this)->a, --b, this->c /= 1; 60 }(); 61 #else 62 ++this->a, --b, c /= 1; 63 #endif 64 } 65 }; 66 67 template<typename T> 68 struct SST { 69 T a; 70 SST() : a(T()) { 71 #pragma omp parallel private(a) allocate(omp_large_cap_mem_alloc:a) 72 #ifdef LAMBDA 73 [&]() { 74 [&]() { 75 ++this->a; 76 #pragma omp parallel private(a) 77 ++(this)->a; 78 }(); 79 }(); 80 #elif defined(BLOCKS) 81 ^{ 82 ^{ 83 ++a; 84 #pragma omp parallel private(a) 85 ++(this)->a; 86 }(); 87 }(); 88 #else 89 ++(this)->a; 90 #endif 91 } 92 }; 93 94 template <typename T> 95 T tmain() { 96 S<T> test; 97 SST<T> sst; 98 T t_var __attribute__((aligned(128))) = T(); 99 T vec[] __attribute__((aligned(128))) = {1, 2}; 100 S<T> s_arr[] __attribute__((aligned(128))) = {1, 2}; 101 S<T> var __attribute__((aligned(128))) (3); 102 #pragma omp parallel private(t_var, vec, s_arr, var) 103 { 104 vec[0] = t_var; 105 s_arr[0] = var; 106 } 107 return T(); 108 } 109 110 int main() { 111 static int sivar; 112 SS ss(sivar); 113 #ifdef LAMBDA 114 [&]() { 115 #pragma omp parallel private(g, sivar) 116 { 117 118 119 120 g = 1; 121 sivar = 2; 122 123 124 [&]() { 125 g = 2; 126 sivar = 4; 127 }(); 128 } 129 }(); 130 return 0; 131 #elif defined(BLOCKS) 132 ^{ 133 #pragma omp parallel private(g, sivar) 134 { 135 g = 1; 136 sivar = 20; 137 ^{ 138 g = 2; 139 sivar = 40; 140 }(); 141 } 142 }(); 143 return 0; 144 145 146 #else 147 S<float> test; 148 int t_var = 0; 149 int vec[] = {1, 2}; 150 S<float> s_arr[] = {1, 2}; 151 S<float> var(3); 152 #pragma omp parallel private(t_var, vec, s_arr, var, sivar) 153 { 154 vec[0] = t_var; 155 s_arr[0] = var; 156 sivar = 3; 157 } 158 return tmain<int>(); 159 #endif 160 } 161 162 163 164 165 166 167 168 #endif 169 170 // CHECK1-LABEL: define {{[^@]+}}@main 171 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 172 // CHECK1-NEXT: entry: 173 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 174 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 175 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 176 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 177 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 178 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 179 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 180 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 181 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 182 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 183 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 184 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 185 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 186 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 187 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 188 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 189 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 190 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 191 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 192 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 193 // CHECK1-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 194 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]] 195 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 196 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 197 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 198 // CHECK1: arraydestroy.body: 199 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 200 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 201 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 202 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 203 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 204 // CHECK1: arraydestroy.done1: 205 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 206 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 207 // CHECK1-NEXT: ret i32 [[TMP2]] 208 // 209 // 210 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 211 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 212 // CHECK1-NEXT: entry: 213 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 214 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 215 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 216 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 217 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 218 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 219 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 220 // CHECK1-NEXT: ret void 221 // 222 // 223 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 224 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 225 // CHECK1-NEXT: entry: 226 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 227 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 228 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 229 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 230 // CHECK1-NEXT: ret void 231 // 232 // 233 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 234 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 235 // CHECK1-NEXT: entry: 236 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 237 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 238 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 239 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 240 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 241 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 242 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 243 // CHECK1-NEXT: ret void 244 // 245 // 246 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 247 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] { 248 // CHECK1-NEXT: entry: 249 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 250 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 251 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 252 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 253 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 254 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 255 // CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 256 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 257 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 258 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 259 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 260 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 261 // CHECK1: arrayctor.loop: 262 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 263 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 264 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 265 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 266 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 267 // CHECK1: arrayctor.cont: 268 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 269 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 4 270 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 271 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 4 272 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 273 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 274 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[VAR]] to i8* 275 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP1]], i8* align 4 [[TMP2]], i64 4, i1 false) 276 // CHECK1-NEXT: store i32 3, i32* [[SIVAR]], align 4 277 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 278 // CHECK1-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 279 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2 280 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 281 // CHECK1: arraydestroy.body: 282 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 283 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 284 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 285 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 286 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 287 // CHECK1: arraydestroy.done3: 288 // CHECK1-NEXT: ret void 289 // 290 // 291 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 292 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 293 // CHECK1-NEXT: entry: 294 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 295 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 296 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 297 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 298 // CHECK1-NEXT: ret void 299 // 300 // 301 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 302 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 303 // CHECK1-NEXT: entry: 304 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 305 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 306 // CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 307 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 308 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 309 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 310 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 311 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 312 // CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 313 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 128 314 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 315 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 316 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 317 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 318 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 319 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 320 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 321 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 322 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 323 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 324 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 325 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 326 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 327 // CHECK1: arraydestroy.body: 328 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 329 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 330 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 331 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 332 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 333 // CHECK1: arraydestroy.done1: 334 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 335 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 336 // CHECK1-NEXT: ret i32 [[TMP2]] 337 // 338 // 339 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 340 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 341 // CHECK1-NEXT: entry: 342 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 343 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 344 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 345 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 346 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 347 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 348 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8 349 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 350 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 351 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 352 // CHECK1-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 353 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 354 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 355 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 356 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 357 // CHECK1-NEXT: ret void 358 // 359 // 360 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 361 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 362 // CHECK1-NEXT: entry: 363 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 364 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 365 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 366 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 367 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 368 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 369 // CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4 370 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 371 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 372 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 373 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 374 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 375 // CHECK1-NEXT: store i32* [[A]], i32** [[TMP]], align 8 376 // CHECK1-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 377 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 378 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 379 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 380 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 381 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[B]], align 4 382 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 383 // CHECK1-NEXT: store i32 [[DEC]], i32* [[B]], align 4 384 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 8 385 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 386 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 387 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 388 // CHECK1-NEXT: ret void 389 // 390 // 391 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 392 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 393 // CHECK1-NEXT: entry: 394 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 395 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 396 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 397 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 398 // CHECK1-NEXT: store float 0.000000e+00, float* [[F]], align 4 399 // CHECK1-NEXT: ret void 400 // 401 // 402 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 403 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 404 // CHECK1-NEXT: entry: 405 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 406 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 407 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 408 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 409 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 410 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 411 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 412 // CHECK1-NEXT: store float [[TMP0]], float* [[F]], align 4 413 // CHECK1-NEXT: ret void 414 // 415 // 416 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 417 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 418 // CHECK1-NEXT: entry: 419 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 420 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 421 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 422 // CHECK1-NEXT: ret void 423 // 424 // 425 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 426 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 427 // CHECK1-NEXT: entry: 428 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 429 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 430 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 431 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 432 // CHECK1-NEXT: ret void 433 // 434 // 435 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 436 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 437 // CHECK1-NEXT: entry: 438 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 439 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 440 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 441 // CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 442 // CHECK1-NEXT: ret void 443 // 444 // 445 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 446 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 447 // CHECK1-NEXT: entry: 448 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 449 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 450 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 451 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 452 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 453 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 454 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 455 // CHECK1-NEXT: ret void 456 // 457 // 458 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 459 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 460 // CHECK1-NEXT: entry: 461 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 462 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 463 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 464 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 465 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 466 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 467 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 468 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 469 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 470 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 471 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 472 // CHECK1: arrayctor.loop: 473 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 474 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 475 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 476 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 477 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 478 // CHECK1: arrayctor.cont: 479 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 480 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 128 481 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 482 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 128 483 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 484 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast %struct.S.0* [[ARRAYIDX1]] to i8* 485 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[VAR]] to i8* 486 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP1]], i8* align 128 [[TMP2]], i64 4, i1 false) 487 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 488 // CHECK1-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 489 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN2]], i64 2 490 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 491 // CHECK1: arraydestroy.body: 492 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 493 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 494 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 495 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 496 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 497 // CHECK1: arraydestroy.done3: 498 // CHECK1-NEXT: ret void 499 // 500 // 501 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 502 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 503 // CHECK1-NEXT: entry: 504 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 505 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 506 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 507 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 508 // CHECK1-NEXT: ret void 509 // 510 // 511 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 512 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 513 // CHECK1-NEXT: entry: 514 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 515 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 516 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 517 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 518 // CHECK1-NEXT: store i32 0, i32* [[F]], align 4 519 // CHECK1-NEXT: ret void 520 // 521 // 522 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 523 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 524 // CHECK1-NEXT: entry: 525 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 526 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 527 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 528 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 529 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 530 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]]) 531 // CHECK1-NEXT: ret void 532 // 533 // 534 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 535 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR3]] { 536 // CHECK1-NEXT: entry: 537 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 538 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 539 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 540 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 541 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 542 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 543 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 544 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 545 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 546 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 547 // CHECK1-NEXT: [[DOTA__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP2]], i64 4, i8* inttoptr (i64 2 to i8*)) 548 // CHECK1-NEXT: [[DOTA__ADDR:%.*]] = bitcast i8* [[DOTA__VOID_ADDR]] to i32* 549 // CHECK1-NEXT: store i32* [[DOTA__ADDR]], i32** [[TMP]], align 8 550 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 551 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 552 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 553 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 554 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTA__ADDR]] to i8* 555 // CHECK1-NEXT: call void @__kmpc_free(i32 [[TMP2]], i8* [[TMP5]], i8* inttoptr (i64 2 to i8*)) 556 // CHECK1-NEXT: ret void 557 // 558 // 559 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 560 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 561 // CHECK1-NEXT: entry: 562 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 563 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 564 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 565 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 566 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 567 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 568 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 569 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 570 // CHECK1-NEXT: ret void 571 // 572 // 573 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 574 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 575 // CHECK1-NEXT: entry: 576 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 577 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 578 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 579 // CHECK1-NEXT: ret void 580 // 581 // 582 // CHECK2-LABEL: define {{[^@]+}}@main 583 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 584 // CHECK2-NEXT: entry: 585 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 586 // CHECK2-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 587 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 588 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 589 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 590 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 591 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 592 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 593 // CHECK2-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 594 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 595 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4 596 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 597 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 598 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 599 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 600 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 601 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 602 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 603 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 604 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 605 // CHECK2-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 606 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]] 607 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 608 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 609 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 610 // CHECK2: arraydestroy.body: 611 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 612 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 613 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 614 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 615 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 616 // CHECK2: arraydestroy.done1: 617 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 618 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 619 // CHECK2-NEXT: ret i32 [[TMP2]] 620 // 621 // 622 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 623 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 624 // CHECK2-NEXT: entry: 625 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 626 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 627 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 628 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 629 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 630 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 631 // CHECK2-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 632 // CHECK2-NEXT: ret void 633 // 634 // 635 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 636 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 637 // CHECK2-NEXT: entry: 638 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 639 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 640 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 641 // CHECK2-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 642 // CHECK2-NEXT: ret void 643 // 644 // 645 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 646 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 647 // CHECK2-NEXT: entry: 648 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 649 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 650 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 651 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 652 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 653 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 654 // CHECK2-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 655 // CHECK2-NEXT: ret void 656 // 657 // 658 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 659 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] { 660 // CHECK2-NEXT: entry: 661 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 662 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 663 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 664 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 665 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 666 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 667 // CHECK2-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 668 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 669 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 670 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 671 // CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 672 // CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 673 // CHECK2: arrayctor.loop: 674 // CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 675 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 676 // CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 677 // CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 678 // CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 679 // CHECK2: arrayctor.cont: 680 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 681 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 4 682 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 683 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 4 684 // CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 685 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 686 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[VAR]] to i8* 687 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP1]], i8* align 4 [[TMP2]], i64 4, i1 false) 688 // CHECK2-NEXT: store i32 3, i32* [[SIVAR]], align 4 689 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 690 // CHECK2-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 691 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2 692 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 693 // CHECK2: arraydestroy.body: 694 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 695 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 696 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 697 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 698 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 699 // CHECK2: arraydestroy.done3: 700 // CHECK2-NEXT: ret void 701 // 702 // 703 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 704 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 705 // CHECK2-NEXT: entry: 706 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 707 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 708 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 709 // CHECK2-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 710 // CHECK2-NEXT: ret void 711 // 712 // 713 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 714 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] comdat { 715 // CHECK2-NEXT: entry: 716 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 717 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 718 // CHECK2-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 719 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 720 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 721 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 722 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 723 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 724 // CHECK2-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 725 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 128 726 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 727 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 728 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 729 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 730 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 731 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 732 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 733 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 734 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 735 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 736 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 737 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 738 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 739 // CHECK2: arraydestroy.body: 740 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 741 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 742 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 743 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 744 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 745 // CHECK2: arraydestroy.done1: 746 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 747 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 748 // CHECK2-NEXT: ret i32 [[TMP2]] 749 // 750 // 751 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 752 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 753 // CHECK2-NEXT: entry: 754 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 755 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 756 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 757 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 758 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 759 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 760 // CHECK2-NEXT: store i32 0, i32* [[A]], align 8 761 // CHECK2-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 762 // CHECK2-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 763 // CHECK2-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 764 // CHECK2-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 765 // CHECK2-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 766 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 767 // CHECK2-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 768 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 769 // CHECK2-NEXT: ret void 770 // 771 // 772 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 773 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 774 // CHECK2-NEXT: entry: 775 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 776 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 777 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 778 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 779 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 780 // CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4 781 // CHECK2-NEXT: [[C:%.*]] = alloca i32, align 4 782 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 783 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 784 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 785 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 786 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 787 // CHECK2-NEXT: store i32* [[A]], i32** [[TMP]], align 8 788 // CHECK2-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 789 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 790 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 791 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 792 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 793 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[B]], align 4 794 // CHECK2-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 795 // CHECK2-NEXT: store i32 [[DEC]], i32* [[B]], align 4 796 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 8 797 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 798 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 799 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 800 // CHECK2-NEXT: ret void 801 // 802 // 803 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 804 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 805 // CHECK2-NEXT: entry: 806 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 807 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 808 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 809 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 810 // CHECK2-NEXT: store float 0.000000e+00, float* [[F]], align 4 811 // CHECK2-NEXT: ret void 812 // 813 // 814 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 815 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 816 // CHECK2-NEXT: entry: 817 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 818 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 819 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 820 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 821 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 822 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 823 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 824 // CHECK2-NEXT: store float [[TMP0]], float* [[F]], align 4 825 // CHECK2-NEXT: ret void 826 // 827 // 828 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 829 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 830 // CHECK2-NEXT: entry: 831 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 832 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 833 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 834 // CHECK2-NEXT: ret void 835 // 836 // 837 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 838 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 839 // CHECK2-NEXT: entry: 840 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 841 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 842 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 843 // CHECK2-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 844 // CHECK2-NEXT: ret void 845 // 846 // 847 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 848 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 849 // CHECK2-NEXT: entry: 850 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 851 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 852 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 853 // CHECK2-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 854 // CHECK2-NEXT: ret void 855 // 856 // 857 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 858 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 859 // CHECK2-NEXT: entry: 860 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 861 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 862 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 863 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 864 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 865 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 866 // CHECK2-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 867 // CHECK2-NEXT: ret void 868 // 869 // 870 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 871 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 872 // CHECK2-NEXT: entry: 873 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 874 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 875 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 876 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 877 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 878 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 879 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 880 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 881 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 882 // CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 883 // CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 884 // CHECK2: arrayctor.loop: 885 // CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 886 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 887 // CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 888 // CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 889 // CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 890 // CHECK2: arrayctor.cont: 891 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 892 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 128 893 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 894 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 128 895 // CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 896 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast %struct.S.0* [[ARRAYIDX1]] to i8* 897 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[VAR]] to i8* 898 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP1]], i8* align 128 [[TMP2]], i64 4, i1 false) 899 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 900 // CHECK2-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 901 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN2]], i64 2 902 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 903 // CHECK2: arraydestroy.body: 904 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 905 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 906 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 907 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 908 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 909 // CHECK2: arraydestroy.done3: 910 // CHECK2-NEXT: ret void 911 // 912 // 913 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 914 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 915 // CHECK2-NEXT: entry: 916 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 917 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 918 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 919 // CHECK2-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 920 // CHECK2-NEXT: ret void 921 // 922 // 923 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 924 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 925 // CHECK2-NEXT: entry: 926 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 927 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 928 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 929 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 930 // CHECK2-NEXT: store i32 0, i32* [[F]], align 4 931 // CHECK2-NEXT: ret void 932 // 933 // 934 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 935 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 936 // CHECK2-NEXT: entry: 937 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 938 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 939 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 940 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 941 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 942 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]]) 943 // CHECK2-NEXT: ret void 944 // 945 // 946 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 947 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR3]] { 948 // CHECK2-NEXT: entry: 949 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 950 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 951 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 952 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 953 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 954 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 955 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 956 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 957 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 958 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 959 // CHECK2-NEXT: [[DOTA__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP2]], i64 4, i8* inttoptr (i64 2 to i8*)) 960 // CHECK2-NEXT: [[DOTA__ADDR:%.*]] = bitcast i8* [[DOTA__VOID_ADDR]] to i32* 961 // CHECK2-NEXT: store i32* [[DOTA__ADDR]], i32** [[TMP]], align 8 962 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 963 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 964 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 965 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 966 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTA__ADDR]] to i8* 967 // CHECK2-NEXT: call void @__kmpc_free(i32 [[TMP2]], i8* [[TMP5]], i8* inttoptr (i64 2 to i8*)) 968 // CHECK2-NEXT: ret void 969 // 970 // 971 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 972 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 973 // CHECK2-NEXT: entry: 974 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 975 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 976 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 977 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 978 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 979 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 980 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 981 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 982 // CHECK2-NEXT: ret void 983 // 984 // 985 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 986 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 987 // CHECK2-NEXT: entry: 988 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 989 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 990 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 991 // CHECK2-NEXT: ret void 992 // 993 // 994 // CHECK3-LABEL: define {{[^@]+}}@main 995 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 996 // CHECK3-NEXT: entry: 997 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 998 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 999 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1000 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 1001 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1002 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 1003 // CHECK3-NEXT: ret i32 0 1004 // 1005 // 1006 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1007 // CHECK3-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1008 // CHECK3-NEXT: entry: 1009 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1010 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1011 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1012 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1013 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1014 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1015 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1016 // CHECK3-NEXT: ret void 1017 // 1018 // 1019 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1020 // CHECK3-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1021 // CHECK3-NEXT: entry: 1022 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1023 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1024 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1025 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1026 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1027 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1028 // CHECK3-NEXT: store i32 0, i32* [[A]], align 8 1029 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1030 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1031 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1032 // CHECK3-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1033 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1034 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1035 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1036 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 1037 // CHECK3-NEXT: ret void 1038 // 1039 // 1040 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1041 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] { 1042 // CHECK3-NEXT: entry: 1043 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1044 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1045 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1046 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 1047 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1048 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 1049 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4 1050 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1051 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1052 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1053 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1054 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1055 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1056 // CHECK3-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1057 // CHECK3-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 1058 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1059 // CHECK3-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP1]], align 8 1060 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1061 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 1062 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 8 1063 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1064 // CHECK3-NEXT: store i32* [[B]], i32** [[TMP4]], align 8 1065 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1066 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 8 1067 // CHECK3-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 8 1068 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1069 // CHECK3-NEXT: ret void 1070 // 1071 // 1072 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 1073 // CHECK3-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 1074 // CHECK3-NEXT: entry: 1075 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 1076 // CHECK3-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 1077 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 1078 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 1079 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 1080 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1081 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 1082 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1083 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1084 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1085 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1086 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 1087 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1088 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 1089 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 1090 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1091 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 1092 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1093 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 1094 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 1095 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]]) 1096 // CHECK3-NEXT: ret void 1097 // 1098 // 1099 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1100 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 1101 // CHECK3-NEXT: entry: 1102 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1103 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1104 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1105 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 1106 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1107 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 1108 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4 1109 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1110 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1111 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1112 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1113 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1114 // CHECK3-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1115 // CHECK3-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 1116 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 1117 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1118 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 1119 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 1120 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[B]], align 4 1121 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 1122 // CHECK3-NEXT: store i32 [[DEC]], i32* [[B]], align 4 1123 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 8 1124 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1125 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 1126 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 1127 // CHECK3-NEXT: ret void 1128 // 1129 // 1130 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1131 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1132 // CHECK3-NEXT: entry: 1133 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1134 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1135 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 128 1136 // CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1137 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 1138 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1139 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1140 // CHECK3-NEXT: store i32 1, i32* [[G]], align 128 1141 // CHECK3-NEXT: store i32 2, i32* [[SIVAR]], align 4 1142 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 1143 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP0]], align 8 1144 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 1145 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[TMP1]], align 8 1146 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 1147 // CHECK3-NEXT: ret void 1148 // 1149 // 1150 // CHECK4-LABEL: define {{[^@]+}}@main 1151 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] { 1152 // CHECK4-NEXT: entry: 1153 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1154 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1155 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1156 // CHECK4-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1157 // CHECK4-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 1158 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 1159 // CHECK4-NEXT: call void [[TMP1]](i8* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 1160 // CHECK4-NEXT: ret i32 0 1161 // 1162 // 1163 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1164 // CHECK4-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 { 1165 // CHECK4-NEXT: entry: 1166 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1167 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1168 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1169 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1170 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1171 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1172 // CHECK4-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1173 // CHECK4-NEXT: ret void 1174 // 1175 // 1176 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 1177 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 1178 // CHECK4-NEXT: entry: 1179 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1180 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 1181 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1182 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 1183 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 1184 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1185 // CHECK4-NEXT: ret void 1186 // 1187 // 1188 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1189 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] { 1190 // CHECK4-NEXT: entry: 1191 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1192 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1193 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 128 1194 // CHECK4-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1195 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, align 128 1196 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1197 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1198 // CHECK4-NEXT: store i32 1, i32* [[G]], align 128 1199 // CHECK4-NEXT: store i32 20, i32* [[SIVAR]], align 4 1200 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 0 1201 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128 1202 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 1 1203 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 1204 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 2 1205 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 1206 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 3 1207 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 16 1208 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 4 1209 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 1210 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 7 1211 // CHECK4-NEXT: [[TMP0:%.*]] = load volatile i32, i32* [[G]], align 128 1212 // CHECK4-NEXT: store volatile i32 [[TMP0]], i32* [[BLOCK_CAPTURED]], align 128 1213 // CHECK4-NEXT: [[BLOCK_CAPTURED1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 1214 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR]], align 4 1215 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[BLOCK_CAPTURED1]], align 32 1216 // CHECK4-NEXT: [[TMP2:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]] to void ()* 1217 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP2]] to %struct.__block_literal_generic* 1218 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 1219 // CHECK4-NEXT: [[TMP4:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 1220 // CHECK4-NEXT: [[TMP5:%.*]] = load i8*, i8** [[TMP3]], align 8 1221 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to void (i8*)* 1222 // CHECK4-NEXT: call void [[TMP6]](i8* [[TMP4]]) 1223 // CHECK4-NEXT: ret void 1224 // 1225 // 1226 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke 1227 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 1228 // CHECK4-NEXT: entry: 1229 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1230 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>*, align 8 1231 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1232 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* 1233 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>** [[BLOCK_ADDR]], align 8 1234 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 7 1235 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128 1236 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 1237 // CHECK4-NEXT: store i32 40, i32* [[BLOCK_CAPTURE_ADDR1]], align 32 1238 // CHECK4-NEXT: ret void 1239 // 1240 // 1241 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1242 // CHECK4-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1243 // CHECK4-NEXT: entry: 1244 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1245 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1246 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1247 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1248 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1249 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1250 // CHECK4-NEXT: store i32 0, i32* [[A]], align 8 1251 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1252 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1253 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1254 // CHECK4-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1255 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1256 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1257 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1258 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 1259 // CHECK4-NEXT: ret void 1260 // 1261 // 1262 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 1263 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 1264 // CHECK4-NEXT: entry: 1265 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1266 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1267 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1268 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 1269 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1270 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 1271 // CHECK4-NEXT: [[C:%.*]] = alloca i32, align 4 1272 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1273 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8 1274 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1275 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1276 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1277 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1278 // CHECK4-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1279 // CHECK4-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 1280 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 1281 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 1282 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 1283 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 1284 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 1285 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 1286 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 1287 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8 1288 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 1289 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.4 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 1290 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 1291 // CHECK4-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8 1292 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 1293 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 1294 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[BLOCK_CAPTURED]], align 8 1295 // CHECK4-NEXT: [[BLOCK_CAPTURED2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 1296 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[B]], align 4 1297 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[BLOCK_CAPTURED2]], align 8 1298 // CHECK4-NEXT: [[BLOCK_CAPTURED3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 1299 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[_TMP1]], align 8 1300 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[BLOCK_CAPTURED3]], align 8 1301 // CHECK4-NEXT: [[TMP4:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()* 1302 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP4]] to %struct.__block_literal_generic* 1303 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 1304 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 1305 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP5]], align 8 1306 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to void (i8*)* 1307 // CHECK4-NEXT: call void [[TMP8]](i8* [[TMP6]]) 1308 // CHECK4-NEXT: ret void 1309 // 1310 // 1311 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2 1312 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 1313 // CHECK4-NEXT: entry: 1314 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1315 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8 1316 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1317 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* 1318 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 1319 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 1320 // CHECK4-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8 1321 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 1322 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8 1323 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1324 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 1325 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 1326 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 1327 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8 1328 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1 1329 // CHECK4-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8 1330 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 1331 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8 1332 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1333 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 1334 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 1335 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]]) 1336 // CHECK4-NEXT: ret void 1337 // 1338 // 1339 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 1340 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 1341 // CHECK4-NEXT: entry: 1342 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1343 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1344 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1345 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 1346 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1347 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 1348 // CHECK4-NEXT: [[C:%.*]] = alloca i32, align 4 1349 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1350 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1351 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1352 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1353 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1354 // CHECK4-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1355 // CHECK4-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 1356 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 1357 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1358 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 1359 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 1360 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[B]], align 4 1361 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 1362 // CHECK4-NEXT: store i32 [[DEC]], i32* [[B]], align 4 1363 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 8 1364 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1365 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 1366 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 1367 // CHECK4-NEXT: ret void 1368 // 1369 // 1370 // CHECK5-LABEL: define {{[^@]+}}@main 1371 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1372 // CHECK5-NEXT: entry: 1373 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1374 // CHECK5-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1375 // CHECK5-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1376 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1377 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1378 // CHECK5-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1379 // CHECK5-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 1380 // CHECK5-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1381 // CHECK5-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 1382 // CHECK5-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 1383 // CHECK5-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 1384 // CHECK5-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1385 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 1386 // CHECK5-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1387 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1388 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4 1389 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1390 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1391 // CHECK5-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1392 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1393 // CHECK5-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1394 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1395 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 1396 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 1397 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1398 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1399 // CHECK5: arrayctor.loop: 1400 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1401 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1402 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1403 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1404 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1405 // CHECK5: arrayctor.cont: 1406 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 1407 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 4 1408 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0 1409 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 1410 // CHECK5-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 0 1411 // CHECK5-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 1412 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast %struct.S* [[VAR4]] to i8* 1413 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i64 4, i1 false) 1414 // CHECK5-NEXT: store i32 3, i32* [[SIVAR]], align 4 1415 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 1416 // CHECK5-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 1417 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i64 2 1418 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1419 // CHECK5: arraydestroy.body: 1420 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1421 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1422 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1423 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1424 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1425 // CHECK5: arraydestroy.done7: 1426 // CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1427 // CHECK5-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1428 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1429 // CHECK5-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1430 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2 1431 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 1432 // CHECK5: arraydestroy.body9: 1433 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 1434 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST10]], i64 -1 1435 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 1436 // CHECK5-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 1437 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 1438 // CHECK5: arraydestroy.done13: 1439 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1440 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 1441 // CHECK5-NEXT: ret i32 [[TMP6]] 1442 // 1443 // 1444 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1445 // CHECK5-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1446 // CHECK5-NEXT: entry: 1447 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1448 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1449 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1450 // CHECK5-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1451 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1452 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1453 // CHECK5-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1454 // CHECK5-NEXT: ret void 1455 // 1456 // 1457 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1458 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1459 // CHECK5-NEXT: entry: 1460 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1461 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1462 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1463 // CHECK5-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1464 // CHECK5-NEXT: ret void 1465 // 1466 // 1467 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1468 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1469 // CHECK5-NEXT: entry: 1470 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1471 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1472 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1473 // CHECK5-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1474 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1475 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1476 // CHECK5-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1477 // CHECK5-NEXT: ret void 1478 // 1479 // 1480 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1481 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1482 // CHECK5-NEXT: entry: 1483 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1484 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1485 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1486 // CHECK5-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1487 // CHECK5-NEXT: ret void 1488 // 1489 // 1490 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1491 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] comdat { 1492 // CHECK5-NEXT: entry: 1493 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1494 // CHECK5-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1495 // CHECK5-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 1496 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1497 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 1498 // CHECK5-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 1499 // CHECK5-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 1500 // CHECK5-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1501 // CHECK5-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 128 1502 // CHECK5-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 128 1503 // CHECK5-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 128 1504 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1505 // CHECK5-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 1506 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 128 1507 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1508 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1509 // CHECK5-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1510 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 1511 // CHECK5-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1512 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 1513 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 1514 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1515 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1516 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1517 // CHECK5: arrayctor.loop: 1518 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1519 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1520 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1521 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1522 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1523 // CHECK5: arrayctor.cont: 1524 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 1525 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 128 1526 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0 1527 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 128 1528 // CHECK5-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 0 1529 // CHECK5-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 1530 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast %struct.S.0* [[VAR4]] to i8* 1531 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP2]], i8* align 128 [[TMP3]], i64 4, i1 false) 1532 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 1533 // CHECK5-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1534 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i64 2 1535 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1536 // CHECK5: arraydestroy.body: 1537 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1538 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1539 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1540 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1541 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1542 // CHECK5: arraydestroy.done7: 1543 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 1544 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1545 // CHECK5-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1546 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 1547 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 1548 // CHECK5: arraydestroy.body9: 1549 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 1550 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST10]], i64 -1 1551 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 1552 // CHECK5-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 1553 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 1554 // CHECK5: arraydestroy.done13: 1555 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1556 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 1557 // CHECK5-NEXT: ret i32 [[TMP6]] 1558 // 1559 // 1560 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1561 // CHECK5-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1562 // CHECK5-NEXT: entry: 1563 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1564 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1565 // CHECK5-NEXT: [[A2:%.*]] = alloca i32, align 4 1566 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1567 // CHECK5-NEXT: [[B3:%.*]] = alloca i32, align 4 1568 // CHECK5-NEXT: [[C4:%.*]] = alloca i32, align 4 1569 // CHECK5-NEXT: [[_TMP5:%.*]] = alloca i32*, align 8 1570 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1571 // CHECK5-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1572 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1573 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1574 // CHECK5-NEXT: store i32 0, i32* [[A]], align 8 1575 // CHECK5-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1576 // CHECK5-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1577 // CHECK5-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1578 // CHECK5-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1579 // CHECK5-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1580 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1581 // CHECK5-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1582 // CHECK5-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 1583 // CHECK5-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 8 1584 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 1585 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1586 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 1587 // CHECK5-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 1588 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[B3]], align 4 1589 // CHECK5-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 1590 // CHECK5-NEXT: store i32 [[DEC]], i32* [[B3]], align 4 1591 // CHECK5-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP5]], align 8 1592 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1593 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 1594 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 1595 // CHECK5-NEXT: ret void 1596 // 1597 // 1598 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1599 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1600 // CHECK5-NEXT: entry: 1601 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1602 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1603 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1604 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1605 // CHECK5-NEXT: store float 0.000000e+00, float* [[F]], align 4 1606 // CHECK5-NEXT: ret void 1607 // 1608 // 1609 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1610 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1611 // CHECK5-NEXT: entry: 1612 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1613 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1614 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1615 // CHECK5-NEXT: ret void 1616 // 1617 // 1618 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1619 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1620 // CHECK5-NEXT: entry: 1621 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1622 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1623 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1624 // CHECK5-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1625 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1626 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1627 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1628 // CHECK5-NEXT: store float [[TMP0]], float* [[F]], align 4 1629 // CHECK5-NEXT: ret void 1630 // 1631 // 1632 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1633 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1634 // CHECK5-NEXT: entry: 1635 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1636 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1637 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1638 // CHECK5-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1639 // CHECK5-NEXT: ret void 1640 // 1641 // 1642 // CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 1643 // CHECK5-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1644 // CHECK5-NEXT: entry: 1645 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1646 // CHECK5-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1647 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1648 // CHECK5-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 1649 // CHECK5-NEXT: ret void 1650 // 1651 // 1652 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1653 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1654 // CHECK5-NEXT: entry: 1655 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1656 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1657 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1658 // CHECK5-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1659 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1660 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1661 // CHECK5-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 1662 // CHECK5-NEXT: ret void 1663 // 1664 // 1665 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1666 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1667 // CHECK5-NEXT: entry: 1668 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1669 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1670 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1671 // CHECK5-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1672 // CHECK5-NEXT: ret void 1673 // 1674 // 1675 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1676 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1677 // CHECK5-NEXT: entry: 1678 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1679 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1680 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1681 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1682 // CHECK5-NEXT: store i32 0, i32* [[F]], align 4 1683 // CHECK5-NEXT: ret void 1684 // 1685 // 1686 // CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 1687 // CHECK5-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1688 // CHECK5-NEXT: entry: 1689 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1690 // CHECK5-NEXT: [[A2:%.*]] = alloca i32, align 4 1691 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1692 // CHECK5-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1693 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1694 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 1695 // CHECK5-NEXT: store i32 0, i32* [[A]], align 4 1696 // CHECK5-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 1697 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[TMP]], align 8 1698 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1699 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 1700 // CHECK5-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 1701 // CHECK5-NEXT: ret void 1702 // 1703 // 1704 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1705 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1706 // CHECK5-NEXT: entry: 1707 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1708 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1709 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1710 // CHECK5-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1711 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1712 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1713 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1714 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1715 // CHECK5-NEXT: ret void 1716 // 1717 // 1718 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1719 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1720 // CHECK5-NEXT: entry: 1721 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1722 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1723 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1724 // CHECK5-NEXT: ret void 1725 // 1726 // 1727 // CHECK6-LABEL: define {{[^@]+}}@main 1728 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 1729 // CHECK6-NEXT: entry: 1730 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1731 // CHECK6-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1732 // CHECK6-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1733 // CHECK6-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1734 // CHECK6-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1735 // CHECK6-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1736 // CHECK6-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 1737 // CHECK6-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1738 // CHECK6-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 1739 // CHECK6-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 1740 // CHECK6-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 1741 // CHECK6-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1742 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 1743 // CHECK6-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1744 // CHECK6-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1745 // CHECK6-NEXT: store i32 0, i32* [[T_VAR]], align 4 1746 // CHECK6-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1747 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1748 // CHECK6-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1749 // CHECK6-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1750 // CHECK6-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1751 // CHECK6-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1752 // CHECK6-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 1753 // CHECK6-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 1754 // CHECK6-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1755 // CHECK6-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1756 // CHECK6: arrayctor.loop: 1757 // CHECK6-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1758 // CHECK6-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1759 // CHECK6-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1760 // CHECK6-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1761 // CHECK6-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1762 // CHECK6: arrayctor.cont: 1763 // CHECK6-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 1764 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 4 1765 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0 1766 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 1767 // CHECK6-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 0 1768 // CHECK6-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 1769 // CHECK6-NEXT: [[TMP3:%.*]] = bitcast %struct.S* [[VAR4]] to i8* 1770 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i64 4, i1 false) 1771 // CHECK6-NEXT: store i32 3, i32* [[SIVAR]], align 4 1772 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 1773 // CHECK6-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 1774 // CHECK6-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i64 2 1775 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1776 // CHECK6: arraydestroy.body: 1777 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1778 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1779 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1780 // CHECK6-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1781 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1782 // CHECK6: arraydestroy.done7: 1783 // CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1784 // CHECK6-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1785 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1786 // CHECK6-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1787 // CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2 1788 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 1789 // CHECK6: arraydestroy.body9: 1790 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 1791 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST10]], i64 -1 1792 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 1793 // CHECK6-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 1794 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 1795 // CHECK6: arraydestroy.done13: 1796 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1797 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 1798 // CHECK6-NEXT: ret i32 [[TMP6]] 1799 // 1800 // 1801 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1802 // CHECK6-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1803 // CHECK6-NEXT: entry: 1804 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1805 // CHECK6-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1806 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1807 // CHECK6-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1808 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1809 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1810 // CHECK6-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1811 // CHECK6-NEXT: ret void 1812 // 1813 // 1814 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1815 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1816 // CHECK6-NEXT: entry: 1817 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1818 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1819 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1820 // CHECK6-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1821 // CHECK6-NEXT: ret void 1822 // 1823 // 1824 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1825 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1826 // CHECK6-NEXT: entry: 1827 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1828 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1829 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1830 // CHECK6-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1831 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1832 // CHECK6-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1833 // CHECK6-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1834 // CHECK6-NEXT: ret void 1835 // 1836 // 1837 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1838 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1839 // CHECK6-NEXT: entry: 1840 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1841 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1842 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1843 // CHECK6-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1844 // CHECK6-NEXT: ret void 1845 // 1846 // 1847 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1848 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] comdat { 1849 // CHECK6-NEXT: entry: 1850 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1851 // CHECK6-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1852 // CHECK6-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 1853 // CHECK6-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1854 // CHECK6-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 1855 // CHECK6-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 1856 // CHECK6-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 1857 // CHECK6-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1858 // CHECK6-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 128 1859 // CHECK6-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 128 1860 // CHECK6-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 128 1861 // CHECK6-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1862 // CHECK6-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 1863 // CHECK6-NEXT: store i32 0, i32* [[T_VAR]], align 128 1864 // CHECK6-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1865 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1866 // CHECK6-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1867 // CHECK6-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 1868 // CHECK6-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1869 // CHECK6-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 1870 // CHECK6-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 1871 // CHECK6-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1872 // CHECK6-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1873 // CHECK6-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1874 // CHECK6: arrayctor.loop: 1875 // CHECK6-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1876 // CHECK6-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1877 // CHECK6-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1878 // CHECK6-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1879 // CHECK6-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1880 // CHECK6: arrayctor.cont: 1881 // CHECK6-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 1882 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR1]], align 128 1883 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0 1884 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 128 1885 // CHECK6-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 0 1886 // CHECK6-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 1887 // CHECK6-NEXT: [[TMP3:%.*]] = bitcast %struct.S.0* [[VAR4]] to i8* 1888 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP2]], i8* align 128 [[TMP3]], i64 4, i1 false) 1889 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 1890 // CHECK6-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1891 // CHECK6-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i64 2 1892 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1893 // CHECK6: arraydestroy.body: 1894 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1895 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1896 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1897 // CHECK6-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1898 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1899 // CHECK6: arraydestroy.done7: 1900 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 1901 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1902 // CHECK6-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1903 // CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 1904 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 1905 // CHECK6: arraydestroy.body9: 1906 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[TMP5]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 1907 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST10]], i64 -1 1908 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 1909 // CHECK6-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 1910 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 1911 // CHECK6: arraydestroy.done13: 1912 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1913 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 1914 // CHECK6-NEXT: ret i32 [[TMP6]] 1915 // 1916 // 1917 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1918 // CHECK6-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1919 // CHECK6-NEXT: entry: 1920 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1921 // CHECK6-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1922 // CHECK6-NEXT: [[A2:%.*]] = alloca i32, align 4 1923 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1924 // CHECK6-NEXT: [[B3:%.*]] = alloca i32, align 4 1925 // CHECK6-NEXT: [[C4:%.*]] = alloca i32, align 4 1926 // CHECK6-NEXT: [[_TMP5:%.*]] = alloca i32*, align 8 1927 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1928 // CHECK6-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1929 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1930 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1931 // CHECK6-NEXT: store i32 0, i32* [[A]], align 8 1932 // CHECK6-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1933 // CHECK6-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1934 // CHECK6-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1935 // CHECK6-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1936 // CHECK6-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1937 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1938 // CHECK6-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1939 // CHECK6-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 1940 // CHECK6-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 8 1941 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 1942 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1943 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 1944 // CHECK6-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4 1945 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[B3]], align 4 1946 // CHECK6-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 1947 // CHECK6-NEXT: store i32 [[DEC]], i32* [[B3]], align 4 1948 // CHECK6-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP5]], align 8 1949 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1950 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 1951 // CHECK6-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4 1952 // CHECK6-NEXT: ret void 1953 // 1954 // 1955 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1956 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1957 // CHECK6-NEXT: entry: 1958 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1959 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1960 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1961 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1962 // CHECK6-NEXT: store float 0.000000e+00, float* [[F]], align 4 1963 // CHECK6-NEXT: ret void 1964 // 1965 // 1966 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1967 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1968 // CHECK6-NEXT: entry: 1969 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1970 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1971 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1972 // CHECK6-NEXT: ret void 1973 // 1974 // 1975 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1976 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1977 // CHECK6-NEXT: entry: 1978 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1979 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1980 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1981 // CHECK6-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1982 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1983 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1984 // CHECK6-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1985 // CHECK6-NEXT: store float [[TMP0]], float* [[F]], align 4 1986 // CHECK6-NEXT: ret void 1987 // 1988 // 1989 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1990 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1991 // CHECK6-NEXT: entry: 1992 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1993 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1994 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1995 // CHECK6-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1996 // CHECK6-NEXT: ret void 1997 // 1998 // 1999 // CHECK6-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 2000 // CHECK6-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2001 // CHECK6-NEXT: entry: 2002 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2003 // CHECK6-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2004 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2005 // CHECK6-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 2006 // CHECK6-NEXT: ret void 2007 // 2008 // 2009 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2010 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2011 // CHECK6-NEXT: entry: 2012 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2013 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2014 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2015 // CHECK6-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2016 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2017 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2018 // CHECK6-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2019 // CHECK6-NEXT: ret void 2020 // 2021 // 2022 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2023 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2024 // CHECK6-NEXT: entry: 2025 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2026 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2027 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2028 // CHECK6-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2029 // CHECK6-NEXT: ret void 2030 // 2031 // 2032 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2033 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2034 // CHECK6-NEXT: entry: 2035 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2036 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2037 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2038 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2039 // CHECK6-NEXT: store i32 0, i32* [[F]], align 4 2040 // CHECK6-NEXT: ret void 2041 // 2042 // 2043 // CHECK6-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 2044 // CHECK6-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2045 // CHECK6-NEXT: entry: 2046 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2047 // CHECK6-NEXT: [[A2:%.*]] = alloca i32, align 4 2048 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2049 // CHECK6-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2050 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2051 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 2052 // CHECK6-NEXT: store i32 0, i32* [[A]], align 4 2053 // CHECK6-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 2054 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[TMP]], align 8 2055 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2056 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2057 // CHECK6-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 2058 // CHECK6-NEXT: ret void 2059 // 2060 // 2061 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2062 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2063 // CHECK6-NEXT: entry: 2064 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2065 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2066 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2067 // CHECK6-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2068 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2069 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2070 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2071 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2072 // CHECK6-NEXT: ret void 2073 // 2074 // 2075 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2076 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2077 // CHECK6-NEXT: entry: 2078 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2079 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2080 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2081 // CHECK6-NEXT: ret void 2082 // 2083 // 2084 // CHECK7-LABEL: define {{[^@]+}}@main 2085 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 2086 // CHECK7-NEXT: entry: 2087 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2088 // CHECK7-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 2089 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 2090 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 2091 // CHECK7-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 2092 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 2093 // CHECK7-NEXT: ret i32 0 2094 // 2095 // 2096 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 2097 // CHECK7-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2098 // CHECK7-NEXT: entry: 2099 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2100 // CHECK7-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2101 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2102 // CHECK7-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2103 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2104 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2105 // CHECK7-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 2106 // CHECK7-NEXT: ret void 2107 // 2108 // 2109 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 2110 // CHECK7-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2111 // CHECK7-NEXT: entry: 2112 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2113 // CHECK7-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2114 // CHECK7-NEXT: [[A2:%.*]] = alloca i32, align 4 2115 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2116 // CHECK7-NEXT: [[B3:%.*]] = alloca i32, align 4 2117 // CHECK7-NEXT: [[C4:%.*]] = alloca i32, align 4 2118 // CHECK7-NEXT: [[_TMP5:%.*]] = alloca i32*, align 8 2119 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 2120 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2121 // CHECK7-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2122 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2123 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2124 // CHECK7-NEXT: store i32 0, i32* [[A]], align 8 2125 // CHECK7-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2126 // CHECK7-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 2127 // CHECK7-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2128 // CHECK7-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 2129 // CHECK7-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2130 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2131 // CHECK7-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 2132 // CHECK7-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 2133 // CHECK7-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 8 2134 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 2135 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 2136 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 2137 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 2138 // CHECK7-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 8 2139 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 2140 // CHECK7-NEXT: store i32* [[B3]], i32** [[TMP4]], align 8 2141 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 2142 // CHECK7-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP5]], align 8 2143 // CHECK7-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 8 2144 // CHECK7-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 2145 // CHECK7-NEXT: ret void 2146 // 2147 // 2148 // CHECK7-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 2149 // CHECK7-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 2150 // CHECK7-NEXT: entry: 2151 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 2152 // CHECK7-NEXT: [[A:%.*]] = alloca i32, align 4 2153 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2154 // CHECK7-NEXT: [[B:%.*]] = alloca i32, align 4 2155 // CHECK7-NEXT: [[C:%.*]] = alloca i32, align 4 2156 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 2157 // CHECK7-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 2158 // CHECK7-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 2159 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 2160 // CHECK7-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 2161 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 2162 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 2163 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2164 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 2165 // CHECK7-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 2166 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 2167 // CHECK7-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 2168 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2169 // CHECK7-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 2170 // CHECK7-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 2171 // CHECK7-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 2172 // CHECK7-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 2173 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 2174 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 2175 // CHECK7-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 2176 // CHECK7-NEXT: store i32* [[A]], i32** [[TMP]], align 8 2177 // CHECK7-NEXT: store i32* [[C]], i32** [[_TMP2]], align 8 2178 // CHECK7-NEXT: [[TMP11:%.*]] = load i32*, i32** [[TMP]], align 8 2179 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2180 // CHECK7-NEXT: [[INC3:%.*]] = add nsw i32 [[TMP12]], 1 2181 // CHECK7-NEXT: store i32 [[INC3]], i32* [[TMP11]], align 4 2182 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[B]], align 4 2183 // CHECK7-NEXT: [[DEC4:%.*]] = add nsw i32 [[TMP13]], -1 2184 // CHECK7-NEXT: store i32 [[DEC4]], i32* [[B]], align 4 2185 // CHECK7-NEXT: [[TMP14:%.*]] = load i32*, i32** [[_TMP2]], align 8 2186 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2187 // CHECK7-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP15]], 1 2188 // CHECK7-NEXT: store i32 [[DIV5]], i32* [[TMP14]], align 4 2189 // CHECK7-NEXT: ret void 2190 // 2191 // 2192 // CHECK8-LABEL: define {{[^@]+}}@main 2193 // CHECK8-SAME: () #[[ATTR1:[0-9]+]] { 2194 // CHECK8-NEXT: entry: 2195 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2196 // CHECK8-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 2197 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 2198 // CHECK8-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 2199 // CHECK8-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 2200 // CHECK8-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 2201 // CHECK8-NEXT: call void [[TMP1]](i8* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 2202 // CHECK8-NEXT: ret i32 0 2203 // 2204 // 2205 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 2206 // CHECK8-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 { 2207 // CHECK8-NEXT: entry: 2208 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2209 // CHECK8-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2210 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2211 // CHECK8-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2212 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2213 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2214 // CHECK8-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 2215 // CHECK8-NEXT: ret void 2216 // 2217 // 2218 // CHECK8-LABEL: define {{[^@]+}}@__main_block_invoke 2219 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 2220 // CHECK8-NEXT: entry: 2221 // CHECK8-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2222 // CHECK8-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 2223 // CHECK8-NEXT: [[G:%.*]] = alloca i32, align 128 2224 // CHECK8-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 2225 // CHECK8-NEXT: [[BLOCK1:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, align 128 2226 // CHECK8-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2227 // CHECK8-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 2228 // CHECK8-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 2229 // CHECK8-NEXT: store i32 1, i32* [[G]], align 128 2230 // CHECK8-NEXT: store i32 20, i32* [[SIVAR]], align 4 2231 // CHECK8-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK1]], i32 0, i32 0 2232 // CHECK8-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128 2233 // CHECK8-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK1]], i32 0, i32 1 2234 // CHECK8-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 2235 // CHECK8-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK1]], i32 0, i32 2 2236 // CHECK8-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 2237 // CHECK8-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK1]], i32 0, i32 3 2238 // CHECK8-NEXT: store i8* bitcast (void (i8*)* @__main_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 16 2239 // CHECK8-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK1]], i32 0, i32 4 2240 // CHECK8-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 2241 // CHECK8-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK1]], i32 0, i32 7 2242 // CHECK8-NEXT: [[TMP0:%.*]] = load volatile i32, i32* [[G]], align 128 2243 // CHECK8-NEXT: store volatile i32 [[TMP0]], i32* [[BLOCK_CAPTURED]], align 128 2244 // CHECK8-NEXT: [[BLOCK_CAPTURED2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK1]], i32 0, i32 5 2245 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR]], align 4 2246 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[BLOCK_CAPTURED2]], align 32 2247 // CHECK8-NEXT: [[TMP2:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK1]] to void ()* 2248 // CHECK8-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP2]] to %struct.__block_literal_generic* 2249 // CHECK8-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2250 // CHECK8-NEXT: [[TMP4:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2251 // CHECK8-NEXT: [[TMP5:%.*]] = load i8*, i8** [[TMP3]], align 8 2252 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to void (i8*)* 2253 // CHECK8-NEXT: call void [[TMP6]](i8* [[TMP4]]) 2254 // CHECK8-NEXT: ret void 2255 // 2256 // 2257 // CHECK8-LABEL: define {{[^@]+}}@__main_block_invoke_2 2258 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 2259 // CHECK8-NEXT: entry: 2260 // CHECK8-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2261 // CHECK8-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>*, align 8 2262 // CHECK8-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2263 // CHECK8-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* 2264 // CHECK8-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>** [[BLOCK_ADDR]], align 8 2265 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 7 2266 // CHECK8-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128 2267 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 2268 // CHECK8-NEXT: store i32 40, i32* [[BLOCK_CAPTURE_ADDR1]], align 32 2269 // CHECK8-NEXT: ret void 2270 // 2271 // 2272 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 2273 // CHECK8-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 2274 // CHECK8-NEXT: entry: 2275 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2276 // CHECK8-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2277 // CHECK8-NEXT: [[A2:%.*]] = alloca i32, align 4 2278 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2279 // CHECK8-NEXT: [[B3:%.*]] = alloca i32, align 4 2280 // CHECK8-NEXT: [[C4:%.*]] = alloca i32, align 4 2281 // CHECK8-NEXT: [[_TMP5:%.*]] = alloca i32*, align 8 2282 // CHECK8-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8 2283 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2284 // CHECK8-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2285 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2286 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2287 // CHECK8-NEXT: store i32 0, i32* [[A]], align 8 2288 // CHECK8-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2289 // CHECK8-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 2290 // CHECK8-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2291 // CHECK8-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 2292 // CHECK8-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2293 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2294 // CHECK8-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 2295 // CHECK8-NEXT: store i32* [[A2]], i32** [[TMP]], align 8 2296 // CHECK8-NEXT: store i32* [[C4]], i32** [[_TMP5]], align 8 2297 // CHECK8-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 2298 // CHECK8-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 2299 // CHECK8-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 2300 // CHECK8-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 2301 // CHECK8-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 2302 // CHECK8-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 2303 // CHECK8-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 2304 // CHECK8-NEXT: store i8* bitcast (void (i8*)* @___ZN2SSC2ERi_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8 2305 // CHECK8-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 2306 // CHECK8-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.2 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 2307 // CHECK8-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 2308 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8 2309 // CHECK8-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 2310 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8 2311 // CHECK8-NEXT: store i32* [[TMP1]], i32** [[BLOCK_CAPTURED]], align 8 2312 // CHECK8-NEXT: [[BLOCK_CAPTURED6:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 2313 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[B3]], align 4 2314 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[BLOCK_CAPTURED6]], align 8 2315 // CHECK8-NEXT: [[BLOCK_CAPTURED7:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 2316 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[_TMP5]], align 8 2317 // CHECK8-NEXT: store i32* [[TMP3]], i32** [[BLOCK_CAPTURED7]], align 8 2318 // CHECK8-NEXT: [[TMP4:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()* 2319 // CHECK8-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP4]] to %struct.__block_literal_generic* 2320 // CHECK8-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2321 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2322 // CHECK8-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP5]], align 8 2323 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to void (i8*)* 2324 // CHECK8-NEXT: call void [[TMP8]](i8* [[TMP6]]) 2325 // CHECK8-NEXT: ret void 2326 // 2327 // 2328 // CHECK8-LABEL: define {{[^@]+}}@___ZN2SSC2ERi_block_invoke 2329 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 2330 // CHECK8-NEXT: entry: 2331 // CHECK8-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2332 // CHECK8-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8 2333 // CHECK8-NEXT: [[A:%.*]] = alloca i32, align 4 2334 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2335 // CHECK8-NEXT: [[B:%.*]] = alloca i32, align 4 2336 // CHECK8-NEXT: [[C:%.*]] = alloca i32, align 4 2337 // CHECK8-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 2338 // CHECK8-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2339 // CHECK8-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* 2340 // CHECK8-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 2341 // CHECK8-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 2342 // CHECK8-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8 2343 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 2344 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8 2345 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2346 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2347 // CHECK8-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 2348 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 2349 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8 2350 // CHECK8-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1 2351 // CHECK8-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8 2352 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 2353 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8 2354 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2355 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 2356 // CHECK8-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 2357 // CHECK8-NEXT: store i32* [[A]], i32** [[TMP]], align 8 2358 // CHECK8-NEXT: store i32* [[C]], i32** [[_TMP3]], align 8 2359 // CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP]], align 8 2360 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2361 // CHECK8-NEXT: [[INC4:%.*]] = add nsw i32 [[TMP6]], 1 2362 // CHECK8-NEXT: store i32 [[INC4]], i32* [[TMP5]], align 4 2363 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[B]], align 4 2364 // CHECK8-NEXT: [[DEC5:%.*]] = add nsw i32 [[TMP7]], -1 2365 // CHECK8-NEXT: store i32 [[DEC5]], i32* [[B]], align 4 2366 // CHECK8-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP3]], align 8 2367 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2368 // CHECK8-NEXT: [[DIV6:%.*]] = sdiv i32 [[TMP9]], 1 2369 // CHECK8-NEXT: store i32 [[DIV6]], i32* [[TMP8]], align 4 2370 // CHECK8-NEXT: ret void 2371 // 2372