1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 #ifdef CK1 7 ///==========================================================================/// 8 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 10 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 11 12 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 17 void foo() { extern void mayThrow(); mayThrow(); } 18 19 void parallel_master() { 20 #pragma omp parallel master 21 foo(); 22 } 23 24 25 26 #endif 27 28 #ifdef CK2 29 ///==========================================================================/// 30 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5 31 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 32 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 33 34 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 35 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 36 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 37 38 39 void parallel_master_private() { 40 int a; 41 #pragma omp parallel master private(a) 42 a++; 43 } 44 45 46 47 #endif 48 49 #ifdef CK3 50 ///==========================================================================/// 51 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK9 52 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 53 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 54 55 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 56 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 57 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 58 59 60 void parallel_master_private() { 61 int a; 62 #pragma omp parallel master default(shared) 63 a++; 64 } 65 66 67 68 #endif 69 70 #ifdef CK31 71 ///==========================================================================/// 72 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13 73 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 74 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 75 76 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 77 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 78 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 79 80 81 void parallel_master_default_firstprivate() { 82 int a; 83 #pragma omp parallel master default(firstprivate) 84 a++; 85 } 86 87 88 89 90 91 #endif 92 93 #ifdef CK32 94 ///==========================================================================/// 95 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK17 96 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 97 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18 98 99 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 100 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 101 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 102 103 104 struct St { 105 int a, b; 106 static int y; 107 St() : a(0), b(0) {} 108 ~St() {} 109 }; 110 int St::y = 0; 111 112 void parallel_master_default_firstprivate() { 113 St a = St(); 114 static int y = 0; 115 #pragma omp parallel master default(firstprivate) 116 { 117 a.a += 1; 118 a.b += 1; 119 y++; 120 a.y++; 121 } 122 } 123 124 125 126 127 128 129 130 131 #endif 132 133 #ifdef CK4 134 ///==========================================================================/// 135 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK21 136 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 137 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK22 138 139 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 140 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 141 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 142 143 144 void parallel_master_firstprivate() { 145 int a; 146 #pragma omp parallel master firstprivate(a) 147 a++; 148 } 149 150 151 152 #endif 153 154 #ifdef CK5 155 ///==========================================================================/// 156 // RUN: %clang_cc1 -DCK5 -verify -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK25 157 // RUN: %clang_cc1 -DCK5 -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 158 // RUN: %clang_cc1 -DCK5 -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK26 159 160 // RUN: %clang_cc1 -DCK5 -verify -fopenmp-simd -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 161 // RUN: %clang_cc1 -DCK5 -fopenmp-simd -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 162 // RUN: %clang_cc1 -DCK5 -fopenmp-simd -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 163 164 // RUN: %clang_cc1 -DCK5 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29 165 // RUN: %clang_cc1 -DCK5 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 166 167 // RUN: %clang_cc1 -DCK5 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 168 169 170 int a; 171 #pragma omp threadprivate(a) 172 173 void parallel_master_copyin() { 174 #pragma omp parallel master copyin(a) 175 a++; 176 } 177 178 179 180 181 182 183 // TLC-CHECK-DAG: [[INC:%.+]] = add nsw i32 [[TEN]], 1 184 // TLC-CHECK-DAG: store i32 [[INC]], i32* [[TEN]] 185 186 #endif 187 #ifdef CK6 188 ///==========================================================================/// 189 // RUN: %clang_cc1 -DCK6 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 190 191 // RUN: %clang_cc1 -DCK6 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 192 193 194 void parallel_master_reduction() { 195 int g; 196 #pragma omp parallel master reduction(+:g) 197 g = 1; 198 } 199 200 201 202 203 204 // switch 205 206 // case 1: 207 208 // case 2: 209 210 #endif 211 #ifdef CK7 212 ///==========================================================================/// 213 // RUN: %clang_cc1 -DCK7 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 214 215 // RUN: %clang_cc1 -DCK7 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 216 217 218 void parallel_master_if() { 219 #pragma omp parallel master if (parallel: false) 220 parallel_master_if(); 221 } 222 223 224 225 #endif 226 #ifdef CK8 227 ///==========================================================================/// 228 // RUN: %clang_cc1 -DCK8 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 229 230 // RUN: %clang_cc1 -DCK8 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 231 232 typedef __INTPTR_TYPE__ intptr_t; 233 234 235 void foo(); 236 237 struct S { 238 intptr_t a, b, c; 239 S(intptr_t a) : a(a) {} 240 operator char() { return a; } 241 ~S() {} 242 }; 243 244 template <typename T> 245 T tmain() { 246 #pragma omp parallel master proc_bind(master) 247 foo(); 248 return T(); 249 } 250 251 int main() { 252 #pragma omp parallel master proc_bind(spread) 253 foo(); 254 #pragma omp parallel master proc_bind(close) 255 foo(); 256 return tmain<int>(); 257 } 258 259 260 261 262 #endif 263 #ifdef CK9 264 ///==========================================================================/// 265 // RUN: %clang_cc1 -DCK9 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 266 267 // RUN: %clang_cc1 -DCK9 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 268 typedef void **omp_allocator_handle_t; 269 extern const omp_allocator_handle_t omp_null_allocator; 270 extern const omp_allocator_handle_t omp_default_mem_alloc; 271 extern const omp_allocator_handle_t omp_large_cap_mem_alloc; 272 extern const omp_allocator_handle_t omp_const_mem_alloc; 273 extern const omp_allocator_handle_t omp_high_bw_mem_alloc; 274 extern const omp_allocator_handle_t omp_low_lat_mem_alloc; 275 extern const omp_allocator_handle_t omp_cgroup_mem_alloc; 276 extern const omp_allocator_handle_t omp_pteam_mem_alloc; 277 extern const omp_allocator_handle_t omp_thread_mem_alloc; 278 279 void parallel_master_allocate() { 280 int a; 281 omp_allocator_handle_t myalloc = nullptr; 282 #pragma omp parallel master firstprivate(a) allocate(myalloc:a) 283 a++; 284 } 285 286 287 #endif 288 #endif 289 // CHECK1-LABEL: define {{[^@]+}}@_Z3foov 290 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 291 // CHECK1-NEXT: entry: 292 // CHECK1-NEXT: call void @_Z8mayThrowv() 293 // CHECK1-NEXT: ret void 294 // 295 // 296 // CHECK1-LABEL: define {{[^@]+}}@_Z15parallel_masterv 297 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 298 // CHECK1-NEXT: entry: 299 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 300 // CHECK1-NEXT: ret void 301 // 302 // 303 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 304 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 305 // CHECK1-NEXT: entry: 306 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 307 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 308 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 309 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 310 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 311 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 312 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 313 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 314 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 315 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 316 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 317 // CHECK1: omp_if.then: 318 // CHECK1-NEXT: invoke void @_Z3foov() 319 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 320 // CHECK1: invoke.cont: 321 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 322 // CHECK1-NEXT: br label [[OMP_IF_END]] 323 // CHECK1: lpad: 324 // CHECK1-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 325 // CHECK1-NEXT: catch i8* null 326 // CHECK1-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 327 // CHECK1-NEXT: store i8* [[TMP5]], i8** [[EXN_SLOT]], align 8 328 // CHECK1-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 1 329 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[EHSELECTOR_SLOT]], align 4 330 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 331 // CHECK1-NEXT: br label [[TERMINATE_HANDLER:%.*]] 332 // CHECK1: omp_if.end: 333 // CHECK1-NEXT: ret void 334 // CHECK1: terminate.handler: 335 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 336 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR6:[0-9]+]] 337 // CHECK1-NEXT: unreachable 338 // 339 // 340 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate 341 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 342 // CHECK1-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR4:[0-9]+]] 343 // CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR6]] 344 // CHECK1-NEXT: unreachable 345 // 346 // 347 // CHECK2-LABEL: define {{[^@]+}}@_Z3foov 348 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 349 // CHECK2-NEXT: entry: 350 // CHECK2-NEXT: call void @_Z8mayThrowv() 351 // CHECK2-NEXT: ret void 352 // 353 // 354 // CHECK2-LABEL: define {{[^@]+}}@_Z15parallel_masterv 355 // CHECK2-SAME: () #[[ATTR2:[0-9]+]] { 356 // CHECK2-NEXT: entry: 357 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 358 // CHECK2-NEXT: ret void 359 // 360 // 361 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 362 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 363 // CHECK2-NEXT: entry: 364 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 365 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 366 // CHECK2-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 367 // CHECK2-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 368 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 369 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 370 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 371 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 372 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 373 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 374 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 375 // CHECK2: omp_if.then: 376 // CHECK2-NEXT: invoke void @_Z3foov() 377 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 378 // CHECK2: invoke.cont: 379 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 380 // CHECK2-NEXT: br label [[OMP_IF_END]] 381 // CHECK2: lpad: 382 // CHECK2-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 383 // CHECK2-NEXT: catch i8* null 384 // CHECK2-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 385 // CHECK2-NEXT: store i8* [[TMP5]], i8** [[EXN_SLOT]], align 8 386 // CHECK2-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 1 387 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[EHSELECTOR_SLOT]], align 4 388 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 389 // CHECK2-NEXT: br label [[TERMINATE_HANDLER:%.*]] 390 // CHECK2: omp_if.end: 391 // CHECK2-NEXT: ret void 392 // CHECK2: terminate.handler: 393 // CHECK2-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 394 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[EXN]]) #[[ATTR6:[0-9]+]] 395 // CHECK2-NEXT: unreachable 396 // 397 // 398 // CHECK2-LABEL: define {{[^@]+}}@__clang_call_terminate 399 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 400 // CHECK2-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR4:[0-9]+]] 401 // CHECK2-NEXT: call void @_ZSt9terminatev() #[[ATTR6]] 402 // CHECK2-NEXT: unreachable 403 // 404 // 405 // CHECK5-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev 406 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 407 // CHECK5-NEXT: entry: 408 // CHECK5-NEXT: [[A:%.*]] = alloca i32, align 4 409 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 410 // CHECK5-NEXT: ret void 411 // 412 // 413 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 414 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 415 // CHECK5-NEXT: entry: 416 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 417 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 418 // CHECK5-NEXT: [[A:%.*]] = alloca i32, align 4 419 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 420 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 421 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 422 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 423 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 424 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 425 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 426 // CHECK5: omp_if.then: 427 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[A]], align 4 428 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 429 // CHECK5-NEXT: store i32 [[INC]], i32* [[A]], align 4 430 // CHECK5-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 431 // CHECK5-NEXT: br label [[OMP_IF_END]] 432 // CHECK5: omp_if.end: 433 // CHECK5-NEXT: ret void 434 // 435 // 436 // CHECK6-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev 437 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 438 // CHECK6-NEXT: entry: 439 // CHECK6-NEXT: [[A:%.*]] = alloca i32, align 4 440 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 441 // CHECK6-NEXT: ret void 442 // 443 // 444 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined. 445 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 446 // CHECK6-NEXT: entry: 447 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 448 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 449 // CHECK6-NEXT: [[A:%.*]] = alloca i32, align 4 450 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 451 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 452 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 453 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 454 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 455 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 456 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 457 // CHECK6: omp_if.then: 458 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[A]], align 4 459 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 460 // CHECK6-NEXT: store i32 [[INC]], i32* [[A]], align 4 461 // CHECK6-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 462 // CHECK6-NEXT: br label [[OMP_IF_END]] 463 // CHECK6: omp_if.end: 464 // CHECK6-NEXT: ret void 465 // 466 // 467 // CHECK9-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev 468 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 469 // CHECK9-NEXT: entry: 470 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 471 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[A]]) 472 // CHECK9-NEXT: ret void 473 // 474 // 475 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 476 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 477 // CHECK9-NEXT: entry: 478 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 479 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 480 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 481 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 482 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 483 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 484 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8 485 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 486 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 487 // CHECK9-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 488 // CHECK9-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 489 // CHECK9-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 490 // CHECK9: omp_if.then: 491 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 492 // CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 493 // CHECK9-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 494 // CHECK9-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 495 // CHECK9-NEXT: br label [[OMP_IF_END]] 496 // CHECK9: omp_if.end: 497 // CHECK9-NEXT: ret void 498 // 499 // 500 // CHECK10-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev 501 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 502 // CHECK10-NEXT: entry: 503 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 504 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[A]]) 505 // CHECK10-NEXT: ret void 506 // 507 // 508 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 509 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 510 // CHECK10-NEXT: entry: 511 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 512 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 513 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 514 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 515 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 516 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 517 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8 518 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 519 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 520 // CHECK10-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 521 // CHECK10-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 522 // CHECK10-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 523 // CHECK10: omp_if.then: 524 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 525 // CHECK10-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 526 // CHECK10-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 527 // CHECK10-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 528 // CHECK10-NEXT: br label [[OMP_IF_END]] 529 // CHECK10: omp_if.end: 530 // CHECK10-NEXT: ret void 531 // 532 // 533 // CHECK13-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev 534 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 535 // CHECK13-NEXT: entry: 536 // CHECK13-NEXT: [[A:%.*]] = alloca i32, align 4 537 // CHECK13-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 538 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 539 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 540 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 541 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 542 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]]) 543 // CHECK13-NEXT: ret void 544 // 545 // 546 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. 547 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR1:[0-9]+]] { 548 // CHECK13-NEXT: entry: 549 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 550 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 551 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 552 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 553 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 554 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 555 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 556 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 557 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 558 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 559 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 560 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 561 // CHECK13: omp_if.then: 562 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 563 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 564 // CHECK13-NEXT: store i32 [[INC]], i32* [[CONV]], align 8 565 // CHECK13-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 566 // CHECK13-NEXT: br label [[OMP_IF_END]] 567 // CHECK13: omp_if.end: 568 // CHECK13-NEXT: ret void 569 // 570 // 571 // CHECK14-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev 572 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 573 // CHECK14-NEXT: entry: 574 // CHECK14-NEXT: [[A:%.*]] = alloca i32, align 4 575 // CHECK14-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 576 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 577 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 578 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 579 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 580 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]]) 581 // CHECK14-NEXT: ret void 582 // 583 // 584 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined. 585 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR1:[0-9]+]] { 586 // CHECK14-NEXT: entry: 587 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 588 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 589 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 590 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 591 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 592 // CHECK14-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 593 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 594 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 595 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 596 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 597 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 598 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 599 // CHECK14: omp_if.then: 600 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 601 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 602 // CHECK14-NEXT: store i32 [[INC]], i32* [[CONV]], align 8 603 // CHECK14-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 604 // CHECK14-NEXT: br label [[OMP_IF_END]] 605 // CHECK14: omp_if.end: 606 // CHECK14-NEXT: ret void 607 // 608 // 609 // CHECK17-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev 610 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] { 611 // CHECK17-NEXT: entry: 612 // CHECK17-NEXT: [[A:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 613 // CHECK17-NEXT: [[Y_CASTED:%.*]] = alloca i64, align 8 614 // CHECK17-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[A]]) 615 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ36parallel_master_default_firstprivatevE1y, align 4 616 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[Y_CASTED]] to i32* 617 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 618 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[Y_CASTED]], align 8 619 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.St*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.St* [[A]], i64 [[TMP1]]) 620 // CHECK17-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[A]]) #[[ATTR3:[0-9]+]] 621 // CHECK17-NEXT: ret void 622 // 623 // 624 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StC1Ev 625 // CHECK17-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 626 // CHECK17-NEXT: entry: 627 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 628 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 629 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 630 // CHECK17-NEXT: call void @_ZN2StC2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) 631 // CHECK17-NEXT: ret void 632 // 633 // 634 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 635 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.St* nonnull align 4 dereferenceable(8) [[A:%.*]], i64 [[Y:%.*]]) #[[ATTR2:[0-9]+]] { 636 // CHECK17-NEXT: entry: 637 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 638 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 639 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca %struct.St*, align 8 640 // CHECK17-NEXT: [[Y_ADDR:%.*]] = alloca i64, align 8 641 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 642 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 643 // CHECK17-NEXT: store %struct.St* [[A]], %struct.St** [[A_ADDR]], align 8 644 // CHECK17-NEXT: store i64 [[Y]], i64* [[Y_ADDR]], align 8 645 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.St*, %struct.St** [[A_ADDR]], align 8 646 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[Y_ADDR]] to i32* 647 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 648 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 649 // CHECK17-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 650 // CHECK17-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 651 // CHECK17-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 652 // CHECK17: omp_if.then: 653 // CHECK17-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[TMP0]], i32 0, i32 0 654 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[A1]], align 4 655 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 656 // CHECK17-NEXT: store i32 [[ADD]], i32* [[A1]], align 4 657 // CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[TMP0]], i32 0, i32 1 658 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 659 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1 660 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[B]], align 4 661 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8 662 // CHECK17-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 663 // CHECK17-NEXT: store i32 [[INC]], i32* [[CONV]], align 8 664 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* @_ZN2St1yE, align 4 665 // CHECK17-NEXT: [[INC3:%.*]] = add nsw i32 [[TMP8]], 1 666 // CHECK17-NEXT: store i32 [[INC3]], i32* @_ZN2St1yE, align 4 667 // CHECK17-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 668 // CHECK17-NEXT: br label [[OMP_IF_END]] 669 // CHECK17: omp_if.end: 670 // CHECK17-NEXT: ret void 671 // 672 // 673 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StD1Ev 674 // CHECK17-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4:[0-9]+]] comdat align 2 { 675 // CHECK17-NEXT: entry: 676 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 677 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 678 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 679 // CHECK17-NEXT: call void @_ZN2StD2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]] 680 // CHECK17-NEXT: ret void 681 // 682 // 683 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StC2Ev 684 // CHECK17-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 { 685 // CHECK17-NEXT: entry: 686 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 687 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 688 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 689 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 0 690 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4 691 // CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 692 // CHECK17-NEXT: store i32 0, i32* [[B]], align 4 693 // CHECK17-NEXT: ret void 694 // 695 // 696 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StD2Ev 697 // CHECK17-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 { 698 // CHECK17-NEXT: entry: 699 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 700 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 701 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 702 // CHECK17-NEXT: ret void 703 // 704 // 705 // CHECK18-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev 706 // CHECK18-SAME: () #[[ATTR0:[0-9]+]] { 707 // CHECK18-NEXT: entry: 708 // CHECK18-NEXT: [[A:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 709 // CHECK18-NEXT: [[Y_CASTED:%.*]] = alloca i64, align 8 710 // CHECK18-NEXT: call void @_ZN2StC1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[A]]) 711 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ36parallel_master_default_firstprivatevE1y, align 4 712 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[Y_CASTED]] to i32* 713 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 714 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[Y_CASTED]], align 8 715 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.St*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.St* [[A]], i64 [[TMP1]]) 716 // CHECK18-NEXT: call void @_ZN2StD1Ev(%struct.St* nonnull align 4 dereferenceable(8) [[A]]) #[[ATTR3:[0-9]+]] 717 // CHECK18-NEXT: ret void 718 // 719 // 720 // CHECK18-LABEL: define {{[^@]+}}@_ZN2StC1Ev 721 // CHECK18-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 722 // CHECK18-NEXT: entry: 723 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 724 // CHECK18-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 725 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 726 // CHECK18-NEXT: call void @_ZN2StC2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) 727 // CHECK18-NEXT: ret void 728 // 729 // 730 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined. 731 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.St* nonnull align 4 dereferenceable(8) [[A:%.*]], i64 [[Y:%.*]]) #[[ATTR2:[0-9]+]] { 732 // CHECK18-NEXT: entry: 733 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 734 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 735 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca %struct.St*, align 8 736 // CHECK18-NEXT: [[Y_ADDR:%.*]] = alloca i64, align 8 737 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 738 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 739 // CHECK18-NEXT: store %struct.St* [[A]], %struct.St** [[A_ADDR]], align 8 740 // CHECK18-NEXT: store i64 [[Y]], i64* [[Y_ADDR]], align 8 741 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.St*, %struct.St** [[A_ADDR]], align 8 742 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[Y_ADDR]] to i32* 743 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 744 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 745 // CHECK18-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 746 // CHECK18-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 747 // CHECK18-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 748 // CHECK18: omp_if.then: 749 // CHECK18-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[TMP0]], i32 0, i32 0 750 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[A1]], align 4 751 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 752 // CHECK18-NEXT: store i32 [[ADD]], i32* [[A1]], align 4 753 // CHECK18-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[TMP0]], i32 0, i32 1 754 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 755 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1 756 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[B]], align 4 757 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8 758 // CHECK18-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 759 // CHECK18-NEXT: store i32 [[INC]], i32* [[CONV]], align 8 760 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* @_ZN2St1yE, align 4 761 // CHECK18-NEXT: [[INC3:%.*]] = add nsw i32 [[TMP8]], 1 762 // CHECK18-NEXT: store i32 [[INC3]], i32* @_ZN2St1yE, align 4 763 // CHECK18-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 764 // CHECK18-NEXT: br label [[OMP_IF_END]] 765 // CHECK18: omp_if.end: 766 // CHECK18-NEXT: ret void 767 // 768 // 769 // CHECK18-LABEL: define {{[^@]+}}@_ZN2StD1Ev 770 // CHECK18-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4:[0-9]+]] comdat align 2 { 771 // CHECK18-NEXT: entry: 772 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 773 // CHECK18-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 774 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 775 // CHECK18-NEXT: call void @_ZN2StD2Ev(%struct.St* nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]] 776 // CHECK18-NEXT: ret void 777 // 778 // 779 // CHECK18-LABEL: define {{[^@]+}}@_ZN2StC2Ev 780 // CHECK18-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 { 781 // CHECK18-NEXT: entry: 782 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 783 // CHECK18-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 784 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 785 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 0 786 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4 787 // CHECK18-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 788 // CHECK18-NEXT: store i32 0, i32* [[B]], align 4 789 // CHECK18-NEXT: ret void 790 // 791 // 792 // CHECK18-LABEL: define {{[^@]+}}@_ZN2StD2Ev 793 // CHECK18-SAME: (%struct.St* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 { 794 // CHECK18-NEXT: entry: 795 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 796 // CHECK18-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 797 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 798 // CHECK18-NEXT: ret void 799 // 800 // 801 // CHECK21-LABEL: define {{[^@]+}}@_Z28parallel_master_firstprivatev 802 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] { 803 // CHECK21-NEXT: entry: 804 // CHECK21-NEXT: [[A:%.*]] = alloca i32, align 4 805 // CHECK21-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 806 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 807 // CHECK21-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 808 // CHECK21-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 809 // CHECK21-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 810 // CHECK21-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]]) 811 // CHECK21-NEXT: ret void 812 // 813 // 814 // CHECK21-LABEL: define {{[^@]+}}@.omp_outlined. 815 // CHECK21-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR1:[0-9]+]] { 816 // CHECK21-NEXT: entry: 817 // CHECK21-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 818 // CHECK21-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 819 // CHECK21-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 820 // CHECK21-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 821 // CHECK21-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 822 // CHECK21-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 823 // CHECK21-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 824 // CHECK21-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 825 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 826 // CHECK21-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 827 // CHECK21-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 828 // CHECK21-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 829 // CHECK21: omp_if.then: 830 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 831 // CHECK21-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 832 // CHECK21-NEXT: store i32 [[INC]], i32* [[CONV]], align 8 833 // CHECK21-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 834 // CHECK21-NEXT: br label [[OMP_IF_END]] 835 // CHECK21: omp_if.end: 836 // CHECK21-NEXT: ret void 837 // 838 // 839 // CHECK22-LABEL: define {{[^@]+}}@_Z28parallel_master_firstprivatev 840 // CHECK22-SAME: () #[[ATTR0:[0-9]+]] { 841 // CHECK22-NEXT: entry: 842 // CHECK22-NEXT: [[A:%.*]] = alloca i32, align 4 843 // CHECK22-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 844 // CHECK22-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 845 // CHECK22-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 846 // CHECK22-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 847 // CHECK22-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 848 // CHECK22-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]]) 849 // CHECK22-NEXT: ret void 850 // 851 // 852 // CHECK22-LABEL: define {{[^@]+}}@.omp_outlined. 853 // CHECK22-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR1:[0-9]+]] { 854 // CHECK22-NEXT: entry: 855 // CHECK22-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 856 // CHECK22-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 857 // CHECK22-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 858 // CHECK22-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 859 // CHECK22-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 860 // CHECK22-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 861 // CHECK22-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 862 // CHECK22-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 863 // CHECK22-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 864 // CHECK22-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 865 // CHECK22-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 866 // CHECK22-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 867 // CHECK22: omp_if.then: 868 // CHECK22-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 869 // CHECK22-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 870 // CHECK22-NEXT: store i32 [[INC]], i32* [[CONV]], align 8 871 // CHECK22-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 872 // CHECK22-NEXT: br label [[OMP_IF_END]] 873 // CHECK22: omp_if.end: 874 // CHECK22-NEXT: ret void 875 // 876 // 877 // CHECK25-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv 878 // CHECK25-SAME: () #[[ATTR0:[0-9]+]] { 879 // CHECK25-NEXT: entry: 880 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 881 // CHECK25-NEXT: ret void 882 // 883 // 884 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined. 885 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 886 // CHECK25-NEXT: entry: 887 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 888 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 889 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 890 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 891 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 892 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 893 // CHECK25-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* bitcast (i32* @a to i8*), i64 4, i8*** @a.cache.) 894 // CHECK25-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i32* 895 // CHECK25-NEXT: [[TMP4:%.*]] = ptrtoint i32* [[TMP3]] to i64 896 // CHECK25-NEXT: [[TMP5:%.*]] = icmp ne i64 ptrtoint (i32* @a to i64), [[TMP4]] 897 // CHECK25-NEXT: br i1 [[TMP5]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]] 898 // CHECK25: copyin.not.master: 899 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* @a, align 4 900 // CHECK25-NEXT: store i32 [[TMP6]], i32* [[TMP3]], align 4 901 // CHECK25-NEXT: br label [[COPYIN_NOT_MASTER_END]] 902 // CHECK25: copyin.not.master.end: 903 // CHECK25-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]]) 904 // CHECK25-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 905 // CHECK25-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 906 // CHECK25-NEXT: br i1 [[TMP8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 907 // CHECK25: omp_if.then: 908 // CHECK25-NEXT: [[TMP9:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* bitcast (i32* @a to i8*), i64 4, i8*** @a.cache.) 909 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* 910 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 911 // CHECK25-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 912 // CHECK25-NEXT: store i32 [[INC]], i32* [[TMP10]], align 4 913 // CHECK25-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 914 // CHECK25-NEXT: br label [[OMP_IF_END]] 915 // CHECK25: omp_if.end: 916 // CHECK25-NEXT: ret void 917 // 918 // 919 // CHECK26-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv 920 // CHECK26-SAME: () #[[ATTR0:[0-9]+]] { 921 // CHECK26-NEXT: entry: 922 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 923 // CHECK26-NEXT: ret void 924 // 925 // 926 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined. 927 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 928 // CHECK26-NEXT: entry: 929 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 930 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 931 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 932 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 933 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 934 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 935 // CHECK26-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* bitcast (i32* @a to i8*), i64 4, i8*** @a.cache.) 936 // CHECK26-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i32* 937 // CHECK26-NEXT: [[TMP4:%.*]] = ptrtoint i32* [[TMP3]] to i64 938 // CHECK26-NEXT: [[TMP5:%.*]] = icmp ne i64 ptrtoint (i32* @a to i64), [[TMP4]] 939 // CHECK26-NEXT: br i1 [[TMP5]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]] 940 // CHECK26: copyin.not.master: 941 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* @a, align 4 942 // CHECK26-NEXT: store i32 [[TMP6]], i32* [[TMP3]], align 4 943 // CHECK26-NEXT: br label [[COPYIN_NOT_MASTER_END]] 944 // CHECK26: copyin.not.master.end: 945 // CHECK26-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]]) 946 // CHECK26-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 947 // CHECK26-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 948 // CHECK26-NEXT: br i1 [[TMP8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 949 // CHECK26: omp_if.then: 950 // CHECK26-NEXT: [[TMP9:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* bitcast (i32* @a to i8*), i64 4, i8*** @a.cache.) 951 // CHECK26-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* 952 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 953 // CHECK26-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 954 // CHECK26-NEXT: store i32 [[INC]], i32* [[TMP10]], align 4 955 // CHECK26-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 956 // CHECK26-NEXT: br label [[OMP_IF_END]] 957 // CHECK26: omp_if.end: 958 // CHECK26-NEXT: ret void 959 // 960 // 961 // CHECK29-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv 962 // CHECK29-SAME: () #[[ATTR0:[0-9]+]] { 963 // CHECK29-NEXT: entry: 964 // CHECK29-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* @a) 965 // CHECK29-NEXT: ret void 966 // 967 // 968 // CHECK29-LABEL: define {{[^@]+}}@.omp_outlined. 969 // CHECK29-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 970 // CHECK29-NEXT: entry: 971 // CHECK29-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 972 // CHECK29-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 973 // CHECK29-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 974 // CHECK29-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 975 // CHECK29-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 976 // CHECK29-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 977 // CHECK29-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8 978 // CHECK29-NEXT: [[TMP1:%.*]] = ptrtoint i32* [[TMP0]] to i64 979 // CHECK29-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP1]], ptrtoint (i32* @a to i64) 980 // CHECK29-NEXT: br i1 [[TMP2]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]] 981 // CHECK29: copyin.not.master: 982 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 983 // CHECK29-NEXT: store i32 [[TMP3]], i32* @a, align 4 984 // CHECK29-NEXT: br label [[COPYIN_NOT_MASTER_END]] 985 // CHECK29: copyin.not.master.end: 986 // CHECK29-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 987 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 988 // CHECK29-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]]) 989 // CHECK29-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 990 // CHECK29-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 991 // CHECK29-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]]) 992 // CHECK29-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 993 // CHECK29-NEXT: br i1 [[TMP9]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 994 // CHECK29: omp_if.then: 995 // CHECK29-NEXT: [[TMP10:%.*]] = load i32, i32* @a, align 4 996 // CHECK29-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 997 // CHECK29-NEXT: store i32 [[INC]], i32* @a, align 4 998 // CHECK29-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]]) 999 // CHECK29-NEXT: br label [[OMP_IF_END]] 1000 // CHECK29: omp_if.end: 1001 // CHECK29-NEXT: ret void 1002 // 1003 // 1004 // CHECK29-LABEL: define {{[^@]+}}@_ZTW1a 1005 // CHECK29-SAME: () #[[ATTR4:[0-9]+]] comdat { 1006 // CHECK29-NEXT: ret i32* @a 1007 // 1008 //