1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 #ifdef CK1 7 ///==========================================================================/// 8 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 10 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 11 12 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 17 void foo() { extern void mayThrow(); mayThrow(); } 18 19 void parallel_master() { 20 #pragma omp parallel master 21 foo(); 22 } 23 24 25 26 #endif 27 28 #ifdef CK2 29 ///==========================================================================/// 30 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5 31 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 32 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 33 34 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 35 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 36 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 37 38 39 void parallel_master_private() { 40 int a; 41 #pragma omp parallel master private(a) 42 a++; 43 } 44 45 46 47 #endif 48 49 #ifdef CK3 50 ///==========================================================================/// 51 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK9 52 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 53 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 54 55 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 56 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 57 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 58 59 60 void parallel_master_private() { 61 int a; 62 #pragma omp parallel master default(shared) 63 a++; 64 } 65 66 67 68 #endif 69 70 #ifdef CK31 71 ///==========================================================================/// 72 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13 73 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 74 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 75 76 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 77 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 78 // RUN: %clang_cc1 -DCK31 -fopenmp-version=51 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 79 80 81 void parallel_master_default_firstprivate() { 82 int a; 83 #pragma omp parallel master default(firstprivate) 84 a++; 85 } 86 87 88 89 90 91 #endif 92 93 #ifdef CK32 94 ///==========================================================================/// 95 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK17 96 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 97 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18 98 99 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 100 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 101 // RUN: %clang_cc1 -DCK32 -fopenmp-version=51 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 102 103 104 struct St { 105 int a, b; 106 static int y; 107 St() : a(0), b(0) {} 108 ~St() {} 109 }; 110 int St::y = 0; 111 112 void parallel_master_default_firstprivate() { 113 St a = St(); 114 static int y = 0; 115 #pragma omp parallel master default(firstprivate) 116 { 117 a.a += 1; 118 a.b += 1; 119 y++; 120 a.y++; 121 } 122 } 123 124 125 126 127 128 129 130 131 #endif 132 133 #ifdef CK4 134 ///==========================================================================/// 135 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK21 136 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 137 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK22 138 139 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 140 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 141 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 142 143 144 void parallel_master_firstprivate() { 145 int a; 146 #pragma omp parallel master firstprivate(a) 147 a++; 148 } 149 150 151 152 #endif 153 154 #ifdef CK5 155 ///==========================================================================/// 156 // RUN: %clang_cc1 -DCK5 -verify -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK25 157 // RUN: %clang_cc1 -DCK5 -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 158 // RUN: %clang_cc1 -DCK5 -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK26 159 160 // RUN: %clang_cc1 -DCK5 -verify -fopenmp-simd -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 161 // RUN: %clang_cc1 -DCK5 -fopenmp-simd -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 162 // RUN: %clang_cc1 -DCK5 -fopenmp-simd -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 163 164 // RUN: %clang_cc1 -DCK5 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29 165 // RUN: %clang_cc1 -DCK5 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 166 167 // RUN: %clang_cc1 -DCK5 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 168 169 170 int a; 171 #pragma omp threadprivate(a) 172 173 void parallel_master_copyin() { 174 #pragma omp parallel master copyin(a) 175 a++; 176 } 177 178 179 180 181 182 183 // TLC-CHECK-DAG: [[INC:%.+]] = add nsw i32 [[TEN]], 1 184 // TLC-CHECK-DAG: store i32 [[INC]], i32* [[TEN]] 185 186 #endif 187 #ifdef CK6 188 ///==========================================================================/// 189 // RUN: %clang_cc1 -DCK6 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 190 191 // RUN: %clang_cc1 -DCK6 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 192 193 194 void parallel_master_reduction() { 195 int g; 196 #pragma omp parallel master reduction(+:g) 197 g = 1; 198 } 199 200 201 202 203 204 // switch 205 206 // case 1: 207 208 // case 2: 209 210 #endif 211 #ifdef CK7 212 ///==========================================================================/// 213 // RUN: %clang_cc1 -DCK7 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 214 215 // RUN: %clang_cc1 -DCK7 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 216 217 218 void parallel_master_if() { 219 #pragma omp parallel master if (parallel: false) 220 parallel_master_if(); 221 } 222 223 224 225 #endif 226 #ifdef CK8 227 ///==========================================================================/// 228 // RUN: %clang_cc1 -DCK8 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 229 230 // RUN: %clang_cc1 -DCK8 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 231 232 typedef __INTPTR_TYPE__ intptr_t; 233 234 235 void foo(); 236 237 struct S { 238 intptr_t a, b, c; 239 S(intptr_t a) : a(a) {} 240 operator char() { return a; } 241 ~S() {} 242 }; 243 244 template <typename T> 245 T tmain() { 246 #pragma omp parallel master proc_bind(master) 247 foo(); 248 return T(); 249 } 250 251 int main() { 252 #pragma omp parallel master proc_bind(spread) 253 foo(); 254 #pragma omp parallel master proc_bind(close) 255 foo(); 256 return tmain<int>(); 257 } 258 259 260 261 262 #endif 263 #ifdef CK9 264 ///==========================================================================/// 265 // RUN: %clang_cc1 -DCK9 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 266 267 // RUN: %clang_cc1 -DCK9 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 268 typedef void **omp_allocator_handle_t; 269 extern const omp_allocator_handle_t omp_null_allocator; 270 extern const omp_allocator_handle_t omp_default_mem_alloc; 271 extern const omp_allocator_handle_t omp_large_cap_mem_alloc; 272 extern const omp_allocator_handle_t omp_const_mem_alloc; 273 extern const omp_allocator_handle_t omp_high_bw_mem_alloc; 274 extern const omp_allocator_handle_t omp_low_lat_mem_alloc; 275 extern const omp_allocator_handle_t omp_cgroup_mem_alloc; 276 extern const omp_allocator_handle_t omp_pteam_mem_alloc; 277 extern const omp_allocator_handle_t omp_thread_mem_alloc; 278 279 void parallel_master_allocate() { 280 int a; 281 omp_allocator_handle_t myalloc = nullptr; 282 #pragma omp parallel master firstprivate(a) allocate(myalloc:a) 283 a++; 284 } 285 286 287 #endif 288 #endif 289 // CHECK1-LABEL: define {{[^@]+}}@_Z3foov 290 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 291 // CHECK1-NEXT: entry: 292 // CHECK1-NEXT: call void @_Z8mayThrowv() 293 // CHECK1-NEXT: ret void 294 // 295 // 296 // CHECK1-LABEL: define {{[^@]+}}@_Z15parallel_masterv 297 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 298 // CHECK1-NEXT: entry: 299 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 300 // CHECK1-NEXT: ret void 301 // 302 // 303 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 304 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 305 // CHECK1-NEXT: entry: 306 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 307 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 308 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 309 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 310 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 311 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 312 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 313 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 314 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 315 // CHECK1: omp_if.then: 316 // CHECK1-NEXT: invoke void @_Z3foov() 317 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 318 // CHECK1: invoke.cont: 319 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 320 // CHECK1-NEXT: br label [[OMP_IF_END]] 321 // CHECK1: omp_if.end: 322 // CHECK1-NEXT: ret void 323 // CHECK1: terminate.lpad: 324 // CHECK1-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 325 // CHECK1-NEXT: catch i8* null 326 // CHECK1-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 327 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR6:[0-9]+]] 328 // CHECK1-NEXT: unreachable 329 // 330 // 331 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate 332 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 333 // CHECK1-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR4:[0-9]+]] 334 // CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR6]] 335 // CHECK1-NEXT: unreachable 336 // 337 // 338 // CHECK2-LABEL: define {{[^@]+}}@_Z3foov 339 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 340 // CHECK2-NEXT: entry: 341 // CHECK2-NEXT: call void @_Z8mayThrowv() 342 // CHECK2-NEXT: ret void 343 // 344 // 345 // CHECK2-LABEL: define {{[^@]+}}@_Z15parallel_masterv 346 // CHECK2-SAME: () #[[ATTR2:[0-9]+]] { 347 // CHECK2-NEXT: entry: 348 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 349 // CHECK2-NEXT: ret void 350 // 351 // 352 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 353 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 354 // CHECK2-NEXT: entry: 355 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 356 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 357 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 358 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 359 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 360 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 361 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 362 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 363 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 364 // CHECK2: omp_if.then: 365 // CHECK2-NEXT: invoke void @_Z3foov() 366 // CHECK2-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 367 // CHECK2: invoke.cont: 368 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 369 // CHECK2-NEXT: br label [[OMP_IF_END]] 370 // CHECK2: omp_if.end: 371 // CHECK2-NEXT: ret void 372 // CHECK2: terminate.lpad: 373 // CHECK2-NEXT: [[TMP4:%.*]] = landingpad { i8*, i32 } 374 // CHECK2-NEXT: catch i8* null 375 // CHECK2-NEXT: [[TMP5:%.*]] = extractvalue { i8*, i32 } [[TMP4]], 0 376 // CHECK2-NEXT: call void @__clang_call_terminate(i8* [[TMP5]]) #[[ATTR6:[0-9]+]] 377 // CHECK2-NEXT: unreachable 378 // 379 // 380 // CHECK2-LABEL: define {{[^@]+}}@__clang_call_terminate 381 // CHECK2-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 382 // CHECK2-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR4:[0-9]+]] 383 // CHECK2-NEXT: call void @_ZSt9terminatev() #[[ATTR6]] 384 // CHECK2-NEXT: unreachable 385 // 386 // 387 // CHECK5-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev 388 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 389 // CHECK5-NEXT: entry: 390 // CHECK5-NEXT: [[A:%.*]] = alloca i32, align 4 391 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 392 // CHECK5-NEXT: ret void 393 // 394 // 395 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 396 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 397 // CHECK5-NEXT: entry: 398 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 399 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 400 // CHECK5-NEXT: [[A:%.*]] = alloca i32, align 4 401 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 402 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 403 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 404 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 405 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 406 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 407 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 408 // CHECK5: omp_if.then: 409 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[A]], align 4 410 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 411 // CHECK5-NEXT: store i32 [[INC]], i32* [[A]], align 4 412 // CHECK5-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 413 // CHECK5-NEXT: br label [[OMP_IF_END]] 414 // CHECK5: omp_if.end: 415 // CHECK5-NEXT: ret void 416 // 417 // 418 // CHECK6-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev 419 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 420 // CHECK6-NEXT: entry: 421 // CHECK6-NEXT: [[A:%.*]] = alloca i32, align 4 422 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 423 // CHECK6-NEXT: ret void 424 // 425 // 426 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined. 427 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 428 // CHECK6-NEXT: entry: 429 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 430 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 431 // CHECK6-NEXT: [[A:%.*]] = alloca i32, align 4 432 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 433 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 434 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 435 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 436 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 437 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 438 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 439 // CHECK6: omp_if.then: 440 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[A]], align 4 441 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 442 // CHECK6-NEXT: store i32 [[INC]], i32* [[A]], align 4 443 // CHECK6-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 444 // CHECK6-NEXT: br label [[OMP_IF_END]] 445 // CHECK6: omp_if.end: 446 // CHECK6-NEXT: ret void 447 // 448 // 449 // CHECK9-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev 450 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 451 // CHECK9-NEXT: entry: 452 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 453 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[A]]) 454 // CHECK9-NEXT: ret void 455 // 456 // 457 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 458 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 459 // CHECK9-NEXT: entry: 460 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 461 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 462 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 463 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 464 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 465 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 466 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8 467 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 468 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 469 // CHECK9-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 470 // CHECK9-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 471 // CHECK9-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 472 // CHECK9: omp_if.then: 473 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 474 // CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 475 // CHECK9-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 476 // CHECK9-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 477 // CHECK9-NEXT: br label [[OMP_IF_END]] 478 // CHECK9: omp_if.end: 479 // CHECK9-NEXT: ret void 480 // 481 // 482 // CHECK10-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev 483 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 484 // CHECK10-NEXT: entry: 485 // CHECK10-NEXT: [[A:%.*]] = alloca i32, align 4 486 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[A]]) 487 // CHECK10-NEXT: ret void 488 // 489 // 490 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 491 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 492 // CHECK10-NEXT: entry: 493 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 494 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 495 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 496 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 497 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 498 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 499 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8 500 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 501 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 502 // CHECK10-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 503 // CHECK10-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 504 // CHECK10-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 505 // CHECK10: omp_if.then: 506 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 507 // CHECK10-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1 508 // CHECK10-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 509 // CHECK10-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 510 // CHECK10-NEXT: br label [[OMP_IF_END]] 511 // CHECK10: omp_if.end: 512 // CHECK10-NEXT: ret void 513 // 514 // 515 // CHECK13-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev 516 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 517 // CHECK13-NEXT: entry: 518 // CHECK13-NEXT: [[A:%.*]] = alloca i32, align 4 519 // CHECK13-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 520 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 521 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 522 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 523 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 524 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]]) 525 // CHECK13-NEXT: ret void 526 // 527 // 528 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. 529 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] { 530 // CHECK13-NEXT: entry: 531 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 532 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 533 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 534 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 535 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 536 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 537 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 538 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 539 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 540 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 541 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 542 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 543 // CHECK13: omp_if.then: 544 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 545 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 546 // CHECK13-NEXT: store i32 [[INC]], i32* [[CONV]], align 4 547 // CHECK13-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 548 // CHECK13-NEXT: br label [[OMP_IF_END]] 549 // CHECK13: omp_if.end: 550 // CHECK13-NEXT: ret void 551 // 552 // 553 // CHECK14-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev 554 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 555 // CHECK14-NEXT: entry: 556 // CHECK14-NEXT: [[A:%.*]] = alloca i32, align 4 557 // CHECK14-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 558 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 559 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 560 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 561 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 562 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]]) 563 // CHECK14-NEXT: ret void 564 // 565 // 566 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined. 567 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] { 568 // CHECK14-NEXT: entry: 569 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 570 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 571 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 572 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 573 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 574 // CHECK14-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 575 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 576 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 577 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 578 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 579 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 580 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 581 // CHECK14: omp_if.then: 582 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 583 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 584 // CHECK14-NEXT: store i32 [[INC]], i32* [[CONV]], align 4 585 // CHECK14-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 586 // CHECK14-NEXT: br label [[OMP_IF_END]] 587 // CHECK14: omp_if.end: 588 // CHECK14-NEXT: ret void 589 // 590 // 591 // CHECK17-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev 592 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] { 593 // CHECK17-NEXT: entry: 594 // CHECK17-NEXT: [[A:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 595 // CHECK17-NEXT: [[Y_CASTED:%.*]] = alloca i64, align 8 596 // CHECK17-NEXT: call void @_ZN2StC1Ev(%struct.St* noundef nonnull align 4 dereferenceable(8) [[A]]) 597 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ36parallel_master_default_firstprivatevE1y, align 4 598 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[Y_CASTED]] to i32* 599 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 600 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[Y_CASTED]], align 8 601 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.St*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.St* [[A]], i64 [[TMP1]]) 602 // CHECK17-NEXT: call void @_ZN2StD1Ev(%struct.St* noundef nonnull align 4 dereferenceable(8) [[A]]) #[[ATTR3:[0-9]+]] 603 // CHECK17-NEXT: ret void 604 // 605 // 606 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StC1Ev 607 // CHECK17-SAME: (%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 608 // CHECK17-NEXT: entry: 609 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 610 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 611 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 612 // CHECK17-NEXT: call void @_ZN2StC2Ev(%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS1]]) 613 // CHECK17-NEXT: ret void 614 // 615 // 616 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 617 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.St* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i64 noundef [[Y:%.*]]) #[[ATTR2:[0-9]+]] { 618 // CHECK17-NEXT: entry: 619 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 620 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 621 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca %struct.St*, align 8 622 // CHECK17-NEXT: [[Y_ADDR:%.*]] = alloca i64, align 8 623 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 624 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 625 // CHECK17-NEXT: store %struct.St* [[A]], %struct.St** [[A_ADDR]], align 8 626 // CHECK17-NEXT: store i64 [[Y]], i64* [[Y_ADDR]], align 8 627 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.St*, %struct.St** [[A_ADDR]], align 8 628 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[Y_ADDR]] to i32* 629 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 630 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 631 // CHECK17-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 632 // CHECK17-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 633 // CHECK17-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 634 // CHECK17: omp_if.then: 635 // CHECK17-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[TMP0]], i32 0, i32 0 636 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[A1]], align 4 637 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 638 // CHECK17-NEXT: store i32 [[ADD]], i32* [[A1]], align 4 639 // CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[TMP0]], i32 0, i32 1 640 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 641 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1 642 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[B]], align 4 643 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 644 // CHECK17-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 645 // CHECK17-NEXT: store i32 [[INC]], i32* [[CONV]], align 4 646 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* @_ZN2St1yE, align 4 647 // CHECK17-NEXT: [[INC3:%.*]] = add nsw i32 [[TMP8]], 1 648 // CHECK17-NEXT: store i32 [[INC3]], i32* @_ZN2St1yE, align 4 649 // CHECK17-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 650 // CHECK17-NEXT: br label [[OMP_IF_END]] 651 // CHECK17: omp_if.end: 652 // CHECK17-NEXT: ret void 653 // 654 // 655 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StD1Ev 656 // CHECK17-SAME: (%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4:[0-9]+]] comdat align 2 { 657 // CHECK17-NEXT: entry: 658 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 659 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 660 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 661 // CHECK17-NEXT: call void @_ZN2StD2Ev(%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]] 662 // CHECK17-NEXT: ret void 663 // 664 // 665 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StC2Ev 666 // CHECK17-SAME: (%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 { 667 // CHECK17-NEXT: entry: 668 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 669 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 670 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 671 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 0 672 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4 673 // CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 674 // CHECK17-NEXT: store i32 0, i32* [[B]], align 4 675 // CHECK17-NEXT: ret void 676 // 677 // 678 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StD2Ev 679 // CHECK17-SAME: (%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 { 680 // CHECK17-NEXT: entry: 681 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 682 // CHECK17-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 683 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 684 // CHECK17-NEXT: ret void 685 // 686 // 687 // CHECK18-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev 688 // CHECK18-SAME: () #[[ATTR0:[0-9]+]] { 689 // CHECK18-NEXT: entry: 690 // CHECK18-NEXT: [[A:%.*]] = alloca [[STRUCT_ST:%.*]], align 4 691 // CHECK18-NEXT: [[Y_CASTED:%.*]] = alloca i64, align 8 692 // CHECK18-NEXT: call void @_ZN2StC1Ev(%struct.St* noundef nonnull align 4 dereferenceable(8) [[A]]) 693 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ36parallel_master_default_firstprivatevE1y, align 4 694 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[Y_CASTED]] to i32* 695 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 696 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[Y_CASTED]], align 8 697 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.St*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.St* [[A]], i64 [[TMP1]]) 698 // CHECK18-NEXT: call void @_ZN2StD1Ev(%struct.St* noundef nonnull align 4 dereferenceable(8) [[A]]) #[[ATTR3:[0-9]+]] 699 // CHECK18-NEXT: ret void 700 // 701 // 702 // CHECK18-LABEL: define {{[^@]+}}@_ZN2StC1Ev 703 // CHECK18-SAME: (%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 704 // CHECK18-NEXT: entry: 705 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 706 // CHECK18-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 707 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 708 // CHECK18-NEXT: call void @_ZN2StC2Ev(%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS1]]) 709 // CHECK18-NEXT: ret void 710 // 711 // 712 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined. 713 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.St* noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i64 noundef [[Y:%.*]]) #[[ATTR2:[0-9]+]] { 714 // CHECK18-NEXT: entry: 715 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 716 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 717 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca %struct.St*, align 8 718 // CHECK18-NEXT: [[Y_ADDR:%.*]] = alloca i64, align 8 719 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 720 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 721 // CHECK18-NEXT: store %struct.St* [[A]], %struct.St** [[A_ADDR]], align 8 722 // CHECK18-NEXT: store i64 [[Y]], i64* [[Y_ADDR]], align 8 723 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.St*, %struct.St** [[A_ADDR]], align 8 724 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[Y_ADDR]] to i32* 725 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 726 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 727 // CHECK18-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 728 // CHECK18-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 729 // CHECK18-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 730 // CHECK18: omp_if.then: 731 // CHECK18-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[TMP0]], i32 0, i32 0 732 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[A1]], align 4 733 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1 734 // CHECK18-NEXT: store i32 [[ADD]], i32* [[A1]], align 4 735 // CHECK18-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[TMP0]], i32 0, i32 1 736 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 737 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1 738 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[B]], align 4 739 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 740 // CHECK18-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 741 // CHECK18-NEXT: store i32 [[INC]], i32* [[CONV]], align 4 742 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* @_ZN2St1yE, align 4 743 // CHECK18-NEXT: [[INC3:%.*]] = add nsw i32 [[TMP8]], 1 744 // CHECK18-NEXT: store i32 [[INC3]], i32* @_ZN2St1yE, align 4 745 // CHECK18-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 746 // CHECK18-NEXT: br label [[OMP_IF_END]] 747 // CHECK18: omp_if.end: 748 // CHECK18-NEXT: ret void 749 // 750 // 751 // CHECK18-LABEL: define {{[^@]+}}@_ZN2StD1Ev 752 // CHECK18-SAME: (%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4:[0-9]+]] comdat align 2 { 753 // CHECK18-NEXT: entry: 754 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 755 // CHECK18-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 756 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 757 // CHECK18-NEXT: call void @_ZN2StD2Ev(%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]] 758 // CHECK18-NEXT: ret void 759 // 760 // 761 // CHECK18-LABEL: define {{[^@]+}}@_ZN2StC2Ev 762 // CHECK18-SAME: (%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 { 763 // CHECK18-NEXT: entry: 764 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 765 // CHECK18-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 766 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 767 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.St* [[THIS1]], i32 0, i32 0 768 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4 769 // CHECK18-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], %struct.St* [[THIS1]], i32 0, i32 1 770 // CHECK18-NEXT: store i32 0, i32* [[B]], align 4 771 // CHECK18-NEXT: ret void 772 // 773 // 774 // CHECK18-LABEL: define {{[^@]+}}@_ZN2StD2Ev 775 // CHECK18-SAME: (%struct.St* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 { 776 // CHECK18-NEXT: entry: 777 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.St*, align 8 778 // CHECK18-NEXT: store %struct.St* [[THIS]], %struct.St** [[THIS_ADDR]], align 8 779 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.St*, %struct.St** [[THIS_ADDR]], align 8 780 // CHECK18-NEXT: ret void 781 // 782 // 783 // CHECK21-LABEL: define {{[^@]+}}@_Z28parallel_master_firstprivatev 784 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] { 785 // CHECK21-NEXT: entry: 786 // CHECK21-NEXT: [[A:%.*]] = alloca i32, align 4 787 // CHECK21-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 788 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 789 // CHECK21-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 790 // CHECK21-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 791 // CHECK21-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 792 // CHECK21-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]]) 793 // CHECK21-NEXT: ret void 794 // 795 // 796 // CHECK21-LABEL: define {{[^@]+}}@.omp_outlined. 797 // CHECK21-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] { 798 // CHECK21-NEXT: entry: 799 // CHECK21-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 800 // CHECK21-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 801 // CHECK21-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 802 // CHECK21-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 803 // CHECK21-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 804 // CHECK21-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 805 // CHECK21-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 806 // CHECK21-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 807 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 808 // CHECK21-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 809 // CHECK21-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 810 // CHECK21-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 811 // CHECK21: omp_if.then: 812 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 813 // CHECK21-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 814 // CHECK21-NEXT: store i32 [[INC]], i32* [[CONV]], align 4 815 // CHECK21-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 816 // CHECK21-NEXT: br label [[OMP_IF_END]] 817 // CHECK21: omp_if.end: 818 // CHECK21-NEXT: ret void 819 // 820 // 821 // CHECK22-LABEL: define {{[^@]+}}@_Z28parallel_master_firstprivatev 822 // CHECK22-SAME: () #[[ATTR0:[0-9]+]] { 823 // CHECK22-NEXT: entry: 824 // CHECK22-NEXT: [[A:%.*]] = alloca i32, align 4 825 // CHECK22-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 826 // CHECK22-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 827 // CHECK22-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32* 828 // CHECK22-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 829 // CHECK22-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8 830 // CHECK22-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]]) 831 // CHECK22-NEXT: ret void 832 // 833 // 834 // CHECK22-LABEL: define {{[^@]+}}@.omp_outlined. 835 // CHECK22-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] { 836 // CHECK22-NEXT: entry: 837 // CHECK22-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 838 // CHECK22-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 839 // CHECK22-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 840 // CHECK22-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 841 // CHECK22-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 842 // CHECK22-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 843 // CHECK22-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* 844 // CHECK22-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 845 // CHECK22-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 846 // CHECK22-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 847 // CHECK22-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 848 // CHECK22-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 849 // CHECK22: omp_if.then: 850 // CHECK22-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 851 // CHECK22-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 852 // CHECK22-NEXT: store i32 [[INC]], i32* [[CONV]], align 4 853 // CHECK22-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 854 // CHECK22-NEXT: br label [[OMP_IF_END]] 855 // CHECK22: omp_if.end: 856 // CHECK22-NEXT: ret void 857 // 858 // 859 // CHECK25-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv 860 // CHECK25-SAME: () #[[ATTR0:[0-9]+]] { 861 // CHECK25-NEXT: entry: 862 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 863 // CHECK25-NEXT: ret void 864 // 865 // 866 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined. 867 // CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 868 // CHECK25-NEXT: entry: 869 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 870 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 871 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 872 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 873 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 874 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 875 // CHECK25-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* bitcast (i32* @a to i8*), i64 4, i8*** @a.cache.) 876 // CHECK25-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i32* 877 // CHECK25-NEXT: [[TMP4:%.*]] = ptrtoint i32* [[TMP3]] to i64 878 // CHECK25-NEXT: [[TMP5:%.*]] = icmp ne i64 ptrtoint (i32* @a to i64), [[TMP4]] 879 // CHECK25-NEXT: br i1 [[TMP5]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]] 880 // CHECK25: copyin.not.master: 881 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* @a, align 4 882 // CHECK25-NEXT: store i32 [[TMP6]], i32* [[TMP3]], align 4 883 // CHECK25-NEXT: br label [[COPYIN_NOT_MASTER_END]] 884 // CHECK25: copyin.not.master.end: 885 // CHECK25-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]]) 886 // CHECK25-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 887 // CHECK25-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 888 // CHECK25-NEXT: br i1 [[TMP8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 889 // CHECK25: omp_if.then: 890 // CHECK25-NEXT: [[TMP9:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* bitcast (i32* @a to i8*), i64 4, i8*** @a.cache.) 891 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* 892 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 893 // CHECK25-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 894 // CHECK25-NEXT: store i32 [[INC]], i32* [[TMP10]], align 4 895 // CHECK25-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 896 // CHECK25-NEXT: br label [[OMP_IF_END]] 897 // CHECK25: omp_if.end: 898 // CHECK25-NEXT: ret void 899 // 900 // 901 // CHECK26-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv 902 // CHECK26-SAME: () #[[ATTR0:[0-9]+]] { 903 // CHECK26-NEXT: entry: 904 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 905 // CHECK26-NEXT: ret void 906 // 907 // 908 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined. 909 // CHECK26-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 910 // CHECK26-NEXT: entry: 911 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 912 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 913 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 914 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 915 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 916 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 917 // CHECK26-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* bitcast (i32* @a to i8*), i64 4, i8*** @a.cache.) 918 // CHECK26-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i32* 919 // CHECK26-NEXT: [[TMP4:%.*]] = ptrtoint i32* [[TMP3]] to i64 920 // CHECK26-NEXT: [[TMP5:%.*]] = icmp ne i64 ptrtoint (i32* @a to i64), [[TMP4]] 921 // CHECK26-NEXT: br i1 [[TMP5]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]] 922 // CHECK26: copyin.not.master: 923 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* @a, align 4 924 // CHECK26-NEXT: store i32 [[TMP6]], i32* [[TMP3]], align 4 925 // CHECK26-NEXT: br label [[COPYIN_NOT_MASTER_END]] 926 // CHECK26: copyin.not.master.end: 927 // CHECK26-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]]) 928 // CHECK26-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 929 // CHECK26-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 930 // CHECK26-NEXT: br i1 [[TMP8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 931 // CHECK26: omp_if.then: 932 // CHECK26-NEXT: [[TMP9:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* bitcast (i32* @a to i8*), i64 4, i8*** @a.cache.) 933 // CHECK26-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* 934 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 935 // CHECK26-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 936 // CHECK26-NEXT: store i32 [[INC]], i32* [[TMP10]], align 4 937 // CHECK26-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 938 // CHECK26-NEXT: br label [[OMP_IF_END]] 939 // CHECK26: omp_if.end: 940 // CHECK26-NEXT: ret void 941 // 942 // 943 // CHECK29-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv 944 // CHECK29-SAME: () #[[ATTR0:[0-9]+]] { 945 // CHECK29-NEXT: entry: 946 // CHECK29-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* @a) 947 // CHECK29-NEXT: ret void 948 // 949 // 950 // CHECK29-LABEL: define {{[^@]+}}@.omp_outlined. 951 // CHECK29-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 952 // CHECK29-NEXT: entry: 953 // CHECK29-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 954 // CHECK29-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 955 // CHECK29-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 956 // CHECK29-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 957 // CHECK29-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 958 // CHECK29-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 959 // CHECK29-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8 960 // CHECK29-NEXT: [[TMP1:%.*]] = ptrtoint i32* [[TMP0]] to i64 961 // CHECK29-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP1]], ptrtoint (i32* @a to i64) 962 // CHECK29-NEXT: br i1 [[TMP2]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]] 963 // CHECK29: copyin.not.master: 964 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 965 // CHECK29-NEXT: store i32 [[TMP3]], i32* @a, align 4 966 // CHECK29-NEXT: br label [[COPYIN_NOT_MASTER_END]] 967 // CHECK29: copyin.not.master.end: 968 // CHECK29-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 969 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 970 // CHECK29-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]]) 971 // CHECK29-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 972 // CHECK29-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 973 // CHECK29-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]]) 974 // CHECK29-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 975 // CHECK29-NEXT: br i1 [[TMP9]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 976 // CHECK29: omp_if.then: 977 // CHECK29-NEXT: [[TMP10:%.*]] = load i32, i32* @a, align 4 978 // CHECK29-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 979 // CHECK29-NEXT: store i32 [[INC]], i32* @a, align 4 980 // CHECK29-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]]) 981 // CHECK29-NEXT: br label [[OMP_IF_END]] 982 // CHECK29: omp_if.end: 983 // CHECK29-NEXT: ret void 984 // 985 // 986 // CHECK29-LABEL: define {{[^@]+}}@_ZTW1a 987 // CHECK29-SAME: () #[[ATTR4:[0-9]+]] comdat { 988 // CHECK29-NEXT: ret i32* @a 989 // 990