1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s 2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG 5 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -O1 -fopenmp -emit-llvm %s -o - | FileCheck %s --check-prefix=CLEANUP 6 // expected-no-diagnostics 7 #ifndef HEADER 8 #define HEADER 9 10 // CHECK-DAG: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* } 11 12 // CHECK-LABEL: with_var_schedule 13 void with_var_schedule() { 14 double a = 5; 15 // CHECK: [[CHUNK_SIZE:%.+]] = fptosi double %{{.+}}to i8 16 // CHECK: store i8 %{{.+}}, i8* [[CHUNK:%.+]], 17 // CHECK: call void {{.+}} @__kmpc_fork_call({{.+}}, i8* [[CHUNK]]) 18 19 // CHECK: [[CHUNK:%.+]] = load i8*, i8** % 20 // CHECK: [[CHUNK_VAL:%.+]] = load i8, i8* [[CHUNK]], 21 // CHECK: [[CHUNK_SIZE:%.+]] = sext i8 [[CHUNK_VAL]] to i64 22 // CHECK: call void @__kmpc_for_static_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC:@[^,]+]], i32 [[GTID:%[^,]+]], i32 33, i32* [[IS_LAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]], i64 1, i64 [[CHUNK_SIZE]]) 23 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 24 #pragma omp parallel for schedule(static, char(a)) 25 for (unsigned long long i = 1; i < 2; ++i) { 26 } 27 } 28 29 // CHECK-LABEL: define {{.*void}} @{{.*}}without_schedule_clause{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 30 void without_schedule_clause(float *a, float *b, float *c, float *d) { 31 #pragma omp parallel for 32 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 33 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 34 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 35 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 36 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 37 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 38 // UB = min(UB, GlobalUB) 39 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 40 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423 41 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 42 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 43 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 44 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 45 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 46 // Loop header 47 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 48 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 49 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 50 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 51 for (int i = 33; i < 32000000; i += 7) { 52 // CHECK: [[LOOP1_BODY]] 53 // Start of body: calculate i from IV: 54 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 55 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 56 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 33, [[CALC_I_1]] 57 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 58 // ... loop body ... 59 // End of body: store into a[i]: 60 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 61 a[i] = b[i] * c[i] * d[i]; 62 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 63 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 64 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 65 // CHECK-NEXT: br label %{{.+}} 66 } 67 // CHECK: [[LOOP1_END]] 68 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 69 // CHECK: ret void 70 } 71 72 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 73 void static_not_chunked(float *a, float *b, float *c, float *d) { 74 #pragma omp parallel for schedule(static) 75 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 76 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 77 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 78 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 79 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 80 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 81 // UB = min(UB, GlobalUB) 82 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 83 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423 84 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 85 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 86 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 87 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 88 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 89 // Loop header 90 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 91 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 92 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 93 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 94 for (int i = 32000000; i > 33; i += -7) { 95 // CHECK: [[LOOP1_BODY]] 96 // Start of body: calculate i from IV: 97 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 98 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 99 // CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]] 100 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 101 // ... loop body ... 102 // End of body: store into a[i]: 103 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 104 a[i] = b[i] * c[i] * d[i]; 105 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 106 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 107 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 108 // CHECK-NEXT: br label %{{.+}} 109 } 110 // CHECK: [[LOOP1_END]] 111 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 112 // CHECK: ret void 113 } 114 115 // CHECK-LABEL: define {{.*void}} @{{.*}}static_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 116 void static_chunked(float *a, float *b, float *c, float *d) { 117 #pragma omp parallel for schedule(static, 5) 118 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 119 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 120 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 121 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 122 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 123 // CHECK: call void @__kmpc_for_static_init_4u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 33, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 5) 124 // UB = min(UB, GlobalUB) 125 // CHECK: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 126 // CHECK-NEXT: [[UBCMP:%.+]] = icmp ugt i32 [[UB]], 16908288 127 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 128 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 16908288, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 129 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 130 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 131 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 132 133 // Outer loop header 134 // CHECK: [[O_IV:%.+]] = load i32, i32* [[OMP_IV]] 135 // CHECK-NEXT: [[O_UB:%.+]] = load i32, i32* [[OMP_UB]] 136 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ule i32 [[O_IV]], [[O_UB]] 137 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 138 139 // Loop header 140 // CHECK: [[O_LOOP1_BODY]] 141 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 142 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 143 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB]] 144 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 145 for (unsigned i = 131071; i <= 2147483647; i += 127) { 146 // CHECK: [[LOOP1_BODY]] 147 // Start of body: calculate i from IV: 148 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 149 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i32 [[IV1_1]], 127 150 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 131071, [[CALC_I_1]] 151 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 152 // ... loop body ... 153 // End of body: store into a[i]: 154 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 155 a[i] = b[i] * c[i] * d[i]; 156 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 157 // CHECK-NEXT: [[ADD1_2:%.+]] = add i32 [[IV1_2]], 1 158 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 159 // CHECK-NEXT: br label %{{.+}} 160 } 161 // CHECK: [[LOOP1_END]] 162 // Update the counters, adding stride 163 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 164 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]] 165 // CHECK-NEXT: [[ADD_LB:%.+]] = add i32 [[LB]], [[ST]] 166 // CHECK-NEXT: store i32 [[ADD_LB]], i32* [[OMP_LB]] 167 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 168 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]] 169 // CHECK-NEXT: [[ADD_UB:%.+]] = add i32 [[UB]], [[ST]] 170 // CHECK-NEXT: store i32 [[ADD_UB]], i32* [[OMP_UB]] 171 172 // CHECK: [[O_LOOP1_END]] 173 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 174 // CHECK: ret void 175 } 176 177 // CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 178 void dynamic1(float *a, float *b, float *c, float *d) { 179 #pragma omp parallel for schedule(dynamic) 180 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 181 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 182 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 183 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 184 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 185 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 35, i64 0, i64 16908287, i64 1, i64 1) 186 // 187 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 188 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 189 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 190 191 // Loop header 192 // CHECK: [[O_LOOP1_BODY]] 193 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 194 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 195 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 196 197 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 198 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]] 199 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 200 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 201 // CHECK: [[LOOP1_BODY]] 202 // Start of body: calculate i from IV: 203 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 204 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 205 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 206 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 207 // ... loop body ... 208 // End of body: store into a[i]: 209 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 210 a[i] = b[i] * c[i] * d[i]; 211 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 212 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 213 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 214 // CHECK-NEXT: br label %{{.+}} 215 } 216 // CHECK: [[LOOP1_END]] 217 // CHECK: [[O_LOOP1_END]] 218 // CHECK: ret void 219 } 220 221 // CHECK-LABEL: define {{.*void}} @{{.*}}guided7{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 222 void guided7(float *a, float *b, float *c, float *d) { 223 #pragma omp parallel for schedule(guided, 7) 224 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 225 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 226 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 227 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 228 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 229 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 36, i64 0, i64 16908287, i64 1, i64 7) 230 // 231 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 232 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 233 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 234 235 // Loop header 236 // CHECK: [[O_LOOP1_BODY]] 237 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 238 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 239 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 240 241 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 242 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]] 243 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 244 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 245 // CHECK: [[LOOP1_BODY]] 246 // Start of body: calculate i from IV: 247 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 248 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 249 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 250 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 251 // ... loop body ... 252 // End of body: store into a[i]: 253 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 254 a[i] = b[i] * c[i] * d[i]; 255 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 256 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 257 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 258 // CHECK-NEXT: br label %{{.+}} 259 } 260 // CHECK: [[LOOP1_END]] 261 // CHECK: [[O_LOOP1_END]] 262 // CHECK: ret void 263 } 264 265 // CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 266 void test_auto(float *a, float *b, float *c, float *d) { 267 unsigned int x = 0; 268 unsigned int y = 0; 269 #pragma omp parallel for schedule(auto) collapse(2) 270 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 271 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, i32* dereferenceable(4) %{{.+}}, i32* dereferenceable(4) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 272 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 273 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 274 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 275 // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 38, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1) 276 // 277 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 278 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 279 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 280 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 281 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 282 283 // Loop header 284 // CHECK: [[O_LOOP1_BODY]] 285 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 286 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 287 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 288 289 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 290 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]] 291 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 292 // FIXME: When the iteration count of some nested loop is not a known constant, 293 // we should pre-calculate it, like we do for the total number of iterations! 294 for (char i = static_cast<char>(y); i <= '9'; ++i) 295 for (x = 11; x > 0; --x) { 296 // CHECK: [[LOOP1_BODY]] 297 // Start of body: indices are calculated from IV: 298 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 299 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 300 // ... loop body ... 301 // End of body: store into a[i]: 302 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 303 a[i] = b[i] * c[i] * d[i]; 304 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 305 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1 306 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 307 // CHECK-NEXT: br label %{{.+}} 308 } 309 // CHECK: [[LOOP1_END]] 310 // CHECK: [[O_LOOP1_END]] 311 // CHECK: ret void 312 } 313 314 // CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 315 void runtime(float *a, float *b, float *c, float *d) { 316 int x = 0; 317 #pragma omp parallel for collapse(2) schedule(runtime) 318 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 319 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, i32* dereferenceable(4) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 320 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 321 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 322 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 323 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 37, i32 0, i32 199, i32 1, i32 1) 324 // 325 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]]) 326 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 327 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 328 329 // Loop header 330 // CHECK: [[O_LOOP1_BODY]] 331 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 332 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 333 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 334 335 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 336 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 337 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 338 for (unsigned char i = '0' ; i <= '9'; ++i) 339 for (x = -10; x < 10; ++x) { 340 // CHECK: [[LOOP1_BODY]] 341 // Start of body: indices are calculated from IV: 342 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 343 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 344 // ... loop body ... 345 // End of body: store into a[i]: 346 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 347 a[i] = b[i] * c[i] * d[i]; 348 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 349 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 350 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 351 // CHECK-NEXT: br label %{{.+}} 352 } 353 // CHECK: [[LOOP1_END]] 354 // CHECK: [[O_LOOP1_END]] 355 // CHECK: ret void 356 } 357 358 // TERM_DEBUG-LABEL: foo 359 int foo() {return 0;}; 360 361 // TERM_DEBUG-LABEL: parallel_for 362 // CLEANUP: parallel_for 363 void parallel_for(float *a, int n) { 364 float arr[n]; 365 #pragma omp parallel for schedule(static, 5) private(arr) 366 // TERM_DEBUG-NOT: __kmpc_global_thread_num 367 // TERM_DEBUG: call void @__kmpc_for_static_init_4u({{.+}}), !dbg [[DBG_LOC_START:![0-9]+]] 368 // TERM_DEBUG: invoke i32 {{.*}}foo{{.*}}() 369 // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]], 370 // TERM_DEBUG-NOT: __kmpc_global_thread_num 371 // TERM_DEBUG: call void @__kmpc_for_static_fini({{.+}}), !dbg [[DBG_LOC_END:![0-9]+]] 372 // TERM_DEBUG: [[TERM_LPAD]] 373 // TERM_DEBUG: call void @__clang_call_terminate 374 // TERM_DEBUG: unreachable 375 // CLEANUP-NOT: __kmpc_global_thread_num 376 // CLEANUP: call void @__kmpc_for_static_init_4u({{.+}}) 377 // CLEANUP: call void @__kmpc_for_static_fini({{.+}}) 378 for (unsigned i = 131071; i <= 2147483647; i += 127) 379 a[i] += foo() + arr[i]; 380 } 381 // Check source line corresponds to "#pragma omp parallel for schedule(static, 5)" above: 382 // TERM_DEBUG-DAG: [[DBG_LOC_START]] = !DILocation(line: [[@LINE-4]], 383 // TERM_DEBUG-DAG: [[DBG_LOC_END]] = !DILocation(line: [[@LINE-18]], 384 385 #endif // HEADER 386 387