1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s 2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -gline-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG 5 // 6 // expected-no-diagnostics 7 #ifndef HEADER 8 #define HEADER 9 10 // CHECK-DAG: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* } 11 // CHECK-DAG: [[CAP_TY:%.+]] = type { i8* } 12 13 // CHECK-LABEL: with_var_schedule 14 void with_var_schedule() { 15 double a = 5; 16 // CHECK: [[CHUNK_SIZE:%.+]] = fptosi double %{{.+}}to i8 17 // CHECK: store i8 %{{.+}}, i8* [[CHUNK:%.+]], 18 // CHECK: [[CHUNK_REF:%.+]] = getelementptr inbounds [[CAP_TY]], [[CAP_TY]]* [[CAP_ARG:%.+]], i{{.+}} 0, i{{.+}} 0 19 // CHECK: store i8* [[CHUNK]], i8** [[CHUNK_REF]], 20 // CHECK: [[BITCAST:%.+]] = bitcast [[CAP_TY]]* [[CAP_ARG]] to i8* 21 // CHECK: call void {{.+}} @__kmpc_fork_call({{.+}}, i8* [[BITCAST]]) 22 23 // CHECK: [[CHUNK_REF:%.+]] = getelementptr inbounds [[CAP_TY]], [[CAP_TY]]* %{{.+}}, i{{.+}} 0, i{{.+}} 0 24 // CHECK: [[CHUNK:%.+]] = load i8*, i8** [[CHUNK_REF]], 25 // CHECK: [[CHUNK_VAL:%.+]] = load i8, i8* [[CHUNK]], 26 // CHECK: [[CHUNK_SIZE:%.+]] = sext i8 [[CHUNK_VAL]] to i64 27 // CHECK: call void @__kmpc_for_static_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC:@[^,]+]], i32 [[GTID:%[^,]+]], i32 33, i32* [[IS_LAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]], i64 1, i64 [[CHUNK_SIZE]]) 28 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 29 // CHECK: __kmpc_cancel_barrier 30 #pragma omp parallel for schedule(static, char(a)) 31 for (unsigned long long i = 1; i < 2; ++i) { 32 } 33 } 34 35 // CHECK-LABEL: define {{.*void}} @{{.*}}without_schedule_clause{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 36 void without_schedule_clause(float *a, float *b, float *c, float *d) { 37 #pragma omp parallel for 38 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 39 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 40 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 41 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 42 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 43 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 44 // UB = min(UB, GlobalUB) 45 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 46 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423 47 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 48 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 49 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 50 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 51 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 52 // Loop header 53 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 54 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 55 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 56 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 57 for (int i = 33; i < 32000000; i += 7) { 58 // CHECK: [[LOOP1_BODY]] 59 // Start of body: calculate i from IV: 60 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 61 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 62 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 33, [[CALC_I_1]] 63 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 64 // ... loop body ... 65 // End of body: store into a[i]: 66 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 67 a[i] = b[i] * c[i] * d[i]; 68 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 69 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 70 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 71 // CHECK-NEXT: br label %{{.+}} 72 } 73 // CHECK: [[LOOP1_END]] 74 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 75 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 76 // CHECK: ret void 77 } 78 79 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 80 void static_not_chunked(float *a, float *b, float *c, float *d) { 81 #pragma omp parallel for schedule(static) 82 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 83 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 84 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 85 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 86 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 87 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 88 // UB = min(UB, GlobalUB) 89 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 90 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423 91 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 92 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 93 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 94 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 95 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 96 // Loop header 97 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 98 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 99 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 100 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 101 for (int i = 32000000; i > 33; i += -7) { 102 // CHECK: [[LOOP1_BODY]] 103 // Start of body: calculate i from IV: 104 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 105 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 106 // CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]] 107 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 108 // ... loop body ... 109 // End of body: store into a[i]: 110 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 111 a[i] = b[i] * c[i] * d[i]; 112 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 113 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 114 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 115 // CHECK-NEXT: br label %{{.+}} 116 } 117 // CHECK: [[LOOP1_END]] 118 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 119 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 120 // CHECK: ret void 121 } 122 123 // CHECK-LABEL: define {{.*void}} @{{.*}}static_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 124 void static_chunked(float *a, float *b, float *c, float *d) { 125 #pragma omp parallel for schedule(static, 5) 126 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 127 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 128 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 129 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 130 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 131 // CHECK: call void @__kmpc_for_static_init_4u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 33, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 5) 132 // UB = min(UB, GlobalUB) 133 // CHECK: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 134 // CHECK-NEXT: [[UBCMP:%.+]] = icmp ugt i32 [[UB]], 16908288 135 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 136 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 16908288, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 137 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 138 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 139 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 140 141 // Outer loop header 142 // CHECK: [[O_IV:%.+]] = load i32, i32* [[OMP_IV]] 143 // CHECK-NEXT: [[O_UB:%.+]] = load i32, i32* [[OMP_UB]] 144 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ule i32 [[O_IV]], [[O_UB]] 145 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 146 147 // Loop header 148 // CHECK: [[O_LOOP1_BODY]] 149 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 150 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 151 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB]] 152 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 153 for (unsigned i = 131071; i <= 2147483647; i += 127) { 154 // CHECK: [[LOOP1_BODY]] 155 // Start of body: calculate i from IV: 156 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 157 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i32 [[IV1_1]], 127 158 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 131071, [[CALC_I_1]] 159 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 160 // ... loop body ... 161 // End of body: store into a[i]: 162 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 163 a[i] = b[i] * c[i] * d[i]; 164 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 165 // CHECK-NEXT: [[ADD1_2:%.+]] = add i32 [[IV1_2]], 1 166 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 167 // CHECK-NEXT: br label %{{.+}} 168 } 169 // CHECK: [[LOOP1_END]] 170 // Update the counters, adding stride 171 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 172 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]] 173 // CHECK-NEXT: [[ADD_LB:%.+]] = add i32 [[LB]], [[ST]] 174 // CHECK-NEXT: store i32 [[ADD_LB]], i32* [[OMP_LB]] 175 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 176 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]] 177 // CHECK-NEXT: [[ADD_UB:%.+]] = add i32 [[UB]], [[ST]] 178 // CHECK-NEXT: store i32 [[ADD_UB]], i32* [[OMP_UB]] 179 180 // CHECK: [[O_LOOP1_END]] 181 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 182 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 183 // CHECK: ret void 184 } 185 186 // CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 187 void dynamic1(float *a, float *b, float *c, float *d) { 188 #pragma omp parallel for schedule(dynamic) 189 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 190 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 191 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 192 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 193 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 194 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 35, i64 0, i64 16908287, i64 1, i64 1) 195 // 196 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 197 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 198 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 199 200 // Loop header 201 // CHECK: [[O_LOOP1_BODY]] 202 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 203 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 204 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 205 206 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 207 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]] 208 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 209 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 210 // CHECK: [[LOOP1_BODY]] 211 // Start of body: calculate i from IV: 212 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 213 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 214 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 215 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 216 // ... loop body ... 217 // End of body: store into a[i]: 218 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 219 a[i] = b[i] * c[i] * d[i]; 220 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 221 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 222 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 223 // CHECK-NEXT: br label %{{.+}} 224 } 225 // CHECK: [[LOOP1_END]] 226 // CHECK: [[O_LOOP1_END]] 227 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 228 // CHECK: ret void 229 } 230 231 // CHECK-LABEL: define {{.*void}} @{{.*}}guided7{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 232 void guided7(float *a, float *b, float *c, float *d) { 233 #pragma omp parallel for schedule(guided, 7) 234 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 235 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 236 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 237 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 238 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 239 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 36, i64 0, i64 16908287, i64 1, i64 7) 240 // 241 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 242 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 243 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 244 245 // Loop header 246 // CHECK: [[O_LOOP1_BODY]] 247 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 248 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 249 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 250 251 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 252 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]] 253 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 254 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 255 // CHECK: [[LOOP1_BODY]] 256 // Start of body: calculate i from IV: 257 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 258 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 259 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 260 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 261 // ... loop body ... 262 // End of body: store into a[i]: 263 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 264 a[i] = b[i] * c[i] * d[i]; 265 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 266 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 267 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 268 // CHECK-NEXT: br label %{{.+}} 269 } 270 // CHECK: [[LOOP1_END]] 271 // CHECK: [[O_LOOP1_END]] 272 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 273 // CHECK: ret void 274 } 275 276 // CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 277 void test_auto(float *a, float *b, float *c, float *d) { 278 unsigned int x = 0; 279 unsigned int y = 0; 280 #pragma omp parallel for schedule(auto) collapse(2) 281 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 282 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 283 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 284 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 285 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 286 // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 38, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1) 287 // 288 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 289 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 290 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 291 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 292 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 293 294 // Loop header 295 // CHECK: [[O_LOOP1_BODY]] 296 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 297 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 298 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 299 300 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 301 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]] 302 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 303 // FIXME: When the iteration count of some nested loop is not a known constant, 304 // we should pre-calculate it, like we do for the total number of iterations! 305 for (char i = static_cast<char>(y); i <= '9'; ++i) 306 for (x = 11; x > 0; --x) { 307 // CHECK: [[LOOP1_BODY]] 308 // Start of body: indices are calculated from IV: 309 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 310 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 311 // ... loop body ... 312 // End of body: store into a[i]: 313 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 314 a[i] = b[i] * c[i] * d[i]; 315 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 316 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1 317 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 318 // CHECK-NEXT: br label %{{.+}} 319 } 320 // CHECK: [[LOOP1_END]] 321 // CHECK: [[O_LOOP1_END]] 322 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 323 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 324 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 325 // CHECK: ret void 326 } 327 328 // CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 329 void runtime(float *a, float *b, float *c, float *d) { 330 int x = 0; 331 #pragma omp parallel for collapse(2) schedule(runtime) 332 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 333 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 334 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 335 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 336 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 337 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 37, i32 0, i32 199, i32 1, i32 1) 338 // 339 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]]) 340 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 341 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 342 343 // Loop header 344 // CHECK: [[O_LOOP1_BODY]] 345 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 346 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 347 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 348 349 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 350 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 351 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 352 for (unsigned char i = '0' ; i <= '9'; ++i) 353 for (x = -10; x < 10; ++x) { 354 // CHECK: [[LOOP1_BODY]] 355 // Start of body: indices are calculated from IV: 356 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 357 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 358 // ... loop body ... 359 // End of body: store into a[i]: 360 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 361 a[i] = b[i] * c[i] * d[i]; 362 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 363 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 364 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 365 // CHECK-NEXT: br label %{{.+}} 366 } 367 // CHECK: [[LOOP1_END]] 368 // CHECK: [[O_LOOP1_END]] 369 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 370 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 371 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 372 // CHECK: ret void 373 } 374 375 // TERM_DEBUG-LABEL: foo 376 int foo() {return 0;}; 377 378 // TERM_DEBUG-LABEL: parallel_for 379 void parallel_for(float *a) { 380 #pragma omp parallel for schedule(static, 5) 381 // TERM_DEBUG-NOT: __kmpc_global_thread_num 382 // TERM_DEBUG: call void @__kmpc_for_static_init_4u({{.+}}), !dbg [[DBG_LOC_START:![0-9]+]] 383 // TERM_DEBUG: invoke i32 {{.*}}foo{{.*}}() 384 // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]], 385 // TERM_DEBUG-NOT: __kmpc_global_thread_num 386 // TERM_DEBUG: call void @__kmpc_for_static_fini({{.+}}), !dbg [[DBG_LOC_END:![0-9]+]] 387 // TERM_DEBUG: call {{.+}} @__kmpc_cancel_barrier({{.+}}), !dbg [[DBG_LOC_CANCEL:![0-9]+]] 388 // TERM_DEBUG: [[TERM_LPAD]] 389 // TERM_DEBUG: call void @__clang_call_terminate 390 // TERM_DEBUG: unreachable 391 for (unsigned i = 131071; i <= 2147483647; i += 127) 392 a[i] += foo(); 393 } 394 // Check source line corresponds to "#pragma omp parallel for schedule(static, 5)" above: 395 // TERM_DEBUG-DAG: [[DBG_LOC_START]] = !DILocation(line: [[@LINE-4]], 396 // TERM_DEBUG-DAG: [[DBG_LOC_END]] = !DILocation(line: [[@LINE-16]], 397 // TERM_DEBUG-DAG: [[DBG_LOC_CANCEL]] = !DILocation(line: [[@LINE-17]], 398 399 #endif // HEADER 400 401