1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -gline-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG
5 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -O1 -fopenmp -emit-llvm %s -o - | FileCheck %s --check-prefix=CLEANUP
6 // REQUIRES: x86-registered-target
7 // expected-no-diagnostics
8 #ifndef HEADER
9 #define HEADER
10 
11 // CHECK-DAG: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* }
12 
13 // CHECK-LABEL: with_var_schedule
14 void with_var_schedule() {
15   double a = 5;
16 // CHECK: [[CHUNK_SIZE:%.+]] = fptosi double %{{.+}}to i8
17 // CHECK: store i8 %{{.+}}, i8* [[CHUNK:%.+]],
18 // CHECK: call void {{.+}} @__kmpc_fork_call({{.+}}, i8* [[CHUNK]])
19 
20 // CHECK: [[CHUNK:%.+]] = load i8*, i8** %
21 // CHECK: [[CHUNK_VAL:%.+]] = load i8, i8* [[CHUNK]],
22 // CHECK: [[CHUNK_SIZE:%.+]] = sext i8 [[CHUNK_VAL]] to i64
23 // CHECK: call void @__kmpc_for_static_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC:@[^,]+]], i32 [[GTID:%[^,]+]], i32 33, i32* [[IS_LAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]], i64 1, i64 [[CHUNK_SIZE]])
24 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
25 // CHECK: __kmpc_barrier
26 #pragma omp parallel for schedule(static, char(a))
27   for (unsigned long long i = 1; i < 2; ++i) {
28   }
29 }
30 
31 // CHECK-LABEL: define {{.*void}} @{{.*}}without_schedule_clause{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
32 void without_schedule_clause(float *a, float *b, float *c, float *d) {
33   #pragma omp parallel for
34 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
35 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
36 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
37 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]],
38 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]],
39 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
40 // UB = min(UB, GlobalUB)
41 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
42 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423
43 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
44 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
45 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
46 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
47 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
48 // Loop header
49 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
50 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
51 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
52 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
53   for (int i = 33; i < 32000000; i += 7) {
54 // CHECK: [[LOOP1_BODY]]
55 // Start of body: calculate i from IV:
56 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
57 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7
58 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 33, [[CALC_I_1]]
59 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
60 // ... loop body ...
61 // End of body: store into a[i]:
62 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
63     a[i] = b[i] * c[i] * d[i];
64 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
65 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
66 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
67 // CHECK-NEXT: br label %{{.+}}
68   }
69 // CHECK: [[LOOP1_END]]
70 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
71 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]])
72 // CHECK: ret void
73 }
74 
75 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
76 void static_not_chunked(float *a, float *b, float *c, float *d) {
77   #pragma omp parallel for schedule(static)
78 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
79 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
80 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
81 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]],
82 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]],
83 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
84 // UB = min(UB, GlobalUB)
85 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
86 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423
87 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
88 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
89 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
90 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
91 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
92 // Loop header
93 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
94 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
95 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
96 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
97   for (int i = 32000000; i > 33; i += -7) {
98 // CHECK: [[LOOP1_BODY]]
99 // Start of body: calculate i from IV:
100 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
101 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7
102 // CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]]
103 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
104 // ... loop body ...
105 // End of body: store into a[i]:
106 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
107     a[i] = b[i] * c[i] * d[i];
108 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
109 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
110 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
111 // CHECK-NEXT: br label %{{.+}}
112   }
113 // CHECK: [[LOOP1_END]]
114 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
115 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]])
116 // CHECK: ret void
117 }
118 
119 // CHECK-LABEL: define {{.*void}} @{{.*}}static_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
120 void static_chunked(float *a, float *b, float *c, float *d) {
121   #pragma omp parallel for schedule(static, 5)
122 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
123 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
124 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
125 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]],
126 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]],
127 // CHECK: call void @__kmpc_for_static_init_4u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 33, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 5)
128 // UB = min(UB, GlobalUB)
129 // CHECK: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
130 // CHECK-NEXT: [[UBCMP:%.+]] = icmp ugt i32 [[UB]], 16908288
131 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
132 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 16908288, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
133 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
134 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
135 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
136 
137 // Outer loop header
138 // CHECK: [[O_IV:%.+]] = load i32, i32* [[OMP_IV]]
139 // CHECK-NEXT: [[O_UB:%.+]] = load i32, i32* [[OMP_UB]]
140 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ule i32 [[O_IV]], [[O_UB]]
141 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
142 
143 // Loop header
144 // CHECK: [[O_LOOP1_BODY]]
145 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
146 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
147 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB]]
148 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
149   for (unsigned i = 131071; i <= 2147483647; i += 127) {
150 // CHECK: [[LOOP1_BODY]]
151 // Start of body: calculate i from IV:
152 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
153 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i32 [[IV1_1]], 127
154 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 131071, [[CALC_I_1]]
155 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
156 // ... loop body ...
157 // End of body: store into a[i]:
158 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
159     a[i] = b[i] * c[i] * d[i];
160 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
161 // CHECK-NEXT: [[ADD1_2:%.+]] = add i32 [[IV1_2]], 1
162 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
163 // CHECK-NEXT: br label %{{.+}}
164   }
165 // CHECK: [[LOOP1_END]]
166 // Update the counters, adding stride
167 // CHECK:  [[LB:%.+]] = load i32, i32* [[OMP_LB]]
168 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]]
169 // CHECK-NEXT: [[ADD_LB:%.+]] = add i32 [[LB]], [[ST]]
170 // CHECK-NEXT: store i32 [[ADD_LB]], i32* [[OMP_LB]]
171 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
172 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]]
173 // CHECK-NEXT: [[ADD_UB:%.+]] = add i32 [[UB]], [[ST]]
174 // CHECK-NEXT: store i32 [[ADD_UB]], i32* [[OMP_UB]]
175 
176 // CHECK: [[O_LOOP1_END]]
177 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
178 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]])
179 // CHECK: ret void
180 }
181 
182 // CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
183 void dynamic1(float *a, float *b, float *c, float *d) {
184   #pragma omp parallel for schedule(dynamic)
185 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
186 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
187 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
188 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]],
189 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]],
190 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 35, i64 0, i64 16908287, i64 1, i64 1)
191 //
192 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]])
193 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
194 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
195 
196 // Loop header
197 // CHECK: [[O_LOOP1_BODY]]
198 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]]
199 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]]
200 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
201 
202 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]]
203 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]]
204 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
205   for (unsigned long long i = 131071; i < 2147483647; i += 127) {
206 // CHECK: [[LOOP1_BODY]]
207 // Start of body: calculate i from IV:
208 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]]
209 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127
210 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]]
211 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]]
212 // ... loop body ...
213 // End of body: store into a[i]:
214 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
215     a[i] = b[i] * c[i] * d[i];
216 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}
217 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1
218 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]]
219 // CHECK-NEXT: br label %{{.+}}
220   }
221 // CHECK: [[LOOP1_END]]
222 // CHECK: [[O_LOOP1_END]]
223 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]])
224 // CHECK: ret void
225 }
226 
227 // CHECK-LABEL: define {{.*void}} @{{.*}}guided7{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
228 void guided7(float *a, float *b, float *c, float *d) {
229   #pragma omp parallel for schedule(guided, 7)
230 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
231 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
232 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
233 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]],
234 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]],
235 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 36, i64 0, i64 16908287, i64 1, i64 7)
236 //
237 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]])
238 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
239 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
240 
241 // Loop header
242 // CHECK: [[O_LOOP1_BODY]]
243 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]]
244 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]]
245 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
246 
247 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]]
248 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]]
249 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
250   for (unsigned long long i = 131071; i < 2147483647; i += 127) {
251 // CHECK: [[LOOP1_BODY]]
252 // Start of body: calculate i from IV:
253 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]]
254 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127
255 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]]
256 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]]
257 // ... loop body ...
258 // End of body: store into a[i]:
259 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
260     a[i] = b[i] * c[i] * d[i];
261 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}
262 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1
263 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]]
264 // CHECK-NEXT: br label %{{.+}}
265   }
266 // CHECK: [[LOOP1_END]]
267 // CHECK: [[O_LOOP1_END]]
268 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]])
269 // CHECK: ret void
270 }
271 
272 // CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
273 void test_auto(float *a, float *b, float *c, float *d) {
274   unsigned int x = 0;
275   unsigned int y = 0;
276   #pragma omp parallel for schedule(auto) collapse(2)
277 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
278 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, i32* dereferenceable(4) %{{.+}}, i32* dereferenceable(4) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
279 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
280 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]],
281 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]],
282 // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 38, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1)
283 //
284 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]],
285 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]],
286 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]])
287 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
288 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
289 
290 // Loop header
291 // CHECK: [[O_LOOP1_BODY]]
292 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]]
293 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]]
294 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
295 
296 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]]
297 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]]
298 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
299 // FIXME: When the iteration count of some nested loop is not a known constant,
300 // we should pre-calculate it, like we do for the total number of iterations!
301   for (char i = static_cast<char>(y); i <= '9'; ++i)
302     for (x = 11; x > 0; --x) {
303 // CHECK: [[LOOP1_BODY]]
304 // Start of body: indices are calculated from IV:
305 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}}
306 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}}
307 // ... loop body ...
308 // End of body: store into a[i]:
309 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
310     a[i] = b[i] * c[i] * d[i];
311 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}
312 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1
313 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]]
314 // CHECK-NEXT: br label %{{.+}}
315   }
316 // CHECK: [[LOOP1_END]]
317 // CHECK: [[O_LOOP1_END]]
318 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]],
319 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]],
320 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]])
321 // CHECK: ret void
322 }
323 
324 // CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
325 void runtime(float *a, float *b, float *c, float *d) {
326   int x = 0;
327   #pragma omp parallel for collapse(2) schedule(runtime)
328 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
329 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, i32* dereferenceable(4) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
330 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
331 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]],
332 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]],
333 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 37, i32 0, i32 199, i32 1, i32 1)
334 //
335 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]])
336 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
337 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
338 
339 // Loop header
340 // CHECK: [[O_LOOP1_BODY]]
341 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
342 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
343 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
344 
345 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
346 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
347 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
348   for (unsigned char i = '0' ; i <= '9'; ++i)
349     for (x = -10; x < 10; ++x) {
350 // CHECK: [[LOOP1_BODY]]
351 // Start of body: indices are calculated from IV:
352 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}}
353 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}}
354 // ... loop body ...
355 // End of body: store into a[i]:
356 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
357     a[i] = b[i] * c[i] * d[i];
358 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
359 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
360 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
361 // CHECK-NEXT: br label %{{.+}}
362   }
363 // CHECK: [[LOOP1_END]]
364 // CHECK: [[O_LOOP1_END]]
365 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]],
366 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]],
367 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]])
368 // CHECK: ret void
369 }
370 
371 // TERM_DEBUG-LABEL: foo
372 int foo() {return 0;};
373 
374 // TERM_DEBUG-LABEL: parallel_for
375 // CLEANUP: parallel_for
376 void parallel_for(float *a, int n) {
377   float arr[n];
378 #pragma omp parallel for schedule(static, 5) private(arr)
379   // TERM_DEBUG-NOT: __kmpc_global_thread_num
380   // TERM_DEBUG:     call void @__kmpc_for_static_init_4u({{.+}}), !dbg [[DBG_LOC_START:![0-9]+]]
381   // TERM_DEBUG:     invoke i32 {{.*}}foo{{.*}}()
382   // TERM_DEBUG:     unwind label %[[TERM_LPAD:.+]],
383   // TERM_DEBUG-NOT: __kmpc_global_thread_num
384   // TERM_DEBUG:     call void @__kmpc_for_static_fini({{.+}}), !dbg [[DBG_LOC_END:![0-9]+]]
385   // TERM_DEBUG:     call {{.+}} @__kmpc_barrier({{.+}}), !dbg [[DBG_LOC_CANCEL:![0-9]+]]
386   // TERM_DEBUG:     [[TERM_LPAD]]
387   // TERM_DEBUG:     call void @__clang_call_terminate
388   // TERM_DEBUG:     unreachable
389   // CLEANUP-NOT: __kmpc_global_thread_num
390   // CLEANUP:     call void @__kmpc_for_static_init_4u({{.+}})
391   // CLEANUP:     call void @__kmpc_for_static_fini({{.+}})
392   // CLEANUP:     call {{.+}} @__kmpc_barrier({{.+}})
393   for (unsigned i = 131071; i <= 2147483647; i += 127)
394     a[i] += foo() + arr[i];
395 }
396 // Check source line corresponds to "#pragma omp parallel for schedule(static, 5)" above:
397 // TERM_DEBUG-DAG: [[DBG_LOC_START]] = !DILocation(line: [[@LINE-4]],
398 // TERM_DEBUG-DAG: [[DBG_LOC_END]] = !DILocation(line: [[@LINE-20]],
399 // TERM_DEBUG-DAG: [[DBG_LOC_CANCEL]] = !DILocation(line: [[@LINE-21]],
400 
401 #endif // HEADER
402 
403