1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s 2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG 5 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -O1 -fopenmp -emit-llvm %s -o - | FileCheck %s --check-prefix=CLEANUP 6 7 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s 8 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 10 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 11 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -O1 -fopenmp-simd -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 12 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} 13 // expected-no-diagnostics 14 15 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix=OMP5 %s 16 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 17 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix=OMP5 %s 18 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 19 #ifndef HEADER 20 #define HEADER 21 22 // CHECK-DAG: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* } 23 // CHECK-DAG: [[LOOP_LOC:@.+]] = private unnamed_addr global [[IDENT_T_TY]] { i32 0, i32 514, i32 0, i32 0, i8* 24 25 // CHECK-LABEL: with_var_schedule 26 void with_var_schedule() { 27 double a = 5; 28 // CHECK: [[CHUNK_SIZE:%.+]] = fptosi double %{{.+}}to i8 29 // CHECK: store i8 %{{.+}}, i8* [[CHUNK:%.+]], 30 // CHECK: [[VAL:%.+]] = load i8, i8* [[CHUNK]], 31 // CHECK: store i8 [[VAL]], i8* 32 // CHECK: [[CHUNK:%.+]] = load i64, i64* % 33 // CHECK: call void {{.+}} @__kmpc_fork_call({{.+}}, i64 [[CHUNK]]) 34 35 // CHECK: [[CHUNK_VAL:%.+]] = load i8, i8* % 36 // CHECK: [[CHUNK_SIZE:%.+]] = sext i8 [[CHUNK_VAL]] to i64 37 // CHECK: call void @__kmpc_for_static_init_8u([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%[^,]+]], i32 33, i32* [[IS_LAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]], i64 1, i64 [[CHUNK_SIZE]]) 38 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]]) 39 #pragma omp parallel for schedule(static, char(a)) 40 for (unsigned long long i = 1; i < 2; ++i) { 41 } 42 } 43 44 // CHECK-LABEL: define {{.*void}} @{{.*}}without_schedule_clause{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 45 void without_schedule_clause(float *a, float *b, float *c, float *d) { 46 #pragma omp parallel for 47 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 48 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 49 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 50 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%.+]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 51 // UB = min(UB, GlobalUB) 52 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 53 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423 54 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 55 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 56 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 57 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 58 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 59 // Loop header 60 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 61 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 62 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 63 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 64 for (int i = 33; i < 32000000; i += 7) { 65 // CHECK: [[LOOP1_BODY]] 66 // Start of body: calculate i from IV: 67 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 68 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 69 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 33, [[CALC_I_1]] 70 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 71 // ... loop body ... 72 // End of body: store into a[i]: 73 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 74 a[i] = b[i] * c[i] * d[i]; 75 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 76 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 77 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 78 // CHECK-NEXT: br label %{{.+}} 79 } 80 // CHECK: [[LOOP1_END]] 81 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]]) 82 // CHECK: ret void 83 } 84 85 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 86 void static_not_chunked(float *a, float *b, float *c, float *d) { 87 #pragma omp parallel for schedule(static) 88 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 89 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 90 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 91 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%.+]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 92 // UB = min(UB, GlobalUB) 93 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 94 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423 95 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 96 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 97 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 98 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 99 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 100 // Loop header 101 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 102 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 103 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 104 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 105 for (int i = 32000000; i > 33; i += -7) { 106 // CHECK: [[LOOP1_BODY]] 107 // Start of body: calculate i from IV: 108 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 109 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 110 // CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]] 111 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 112 // ... loop body ... 113 // End of body: store into a[i]: 114 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 115 a[i] = b[i] * c[i] * d[i]; 116 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 117 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 118 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 119 // CHECK-NEXT: br label %{{.+}} 120 } 121 // CHECK: [[LOOP1_END]] 122 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]]) 123 // CHECK: ret void 124 } 125 126 // CHECK-LABEL: define {{.*void}} @{{.*}}static_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 127 void static_chunked(float *a, float *b, float *c, float *d) { 128 #pragma omp parallel for schedule(static, 5) 129 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 130 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 131 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 132 // CHECK: call void @__kmpc_for_static_init_4u([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%.+]], i32 33, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 5) 133 // UB = min(UB, GlobalUB) 134 // CHECK: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 135 // CHECK-NEXT: [[UBCMP:%.+]] = icmp ugt i32 [[UB]], 16908288 136 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 137 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 16908288, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 138 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 139 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 140 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 141 142 // Outer loop header 143 // CHECK: [[O_IV:%.+]] = load i32, i32* [[OMP_IV]] 144 // CHECK-NEXT: [[O_UB:%.+]] = load i32, i32* [[OMP_UB]] 145 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ule i32 [[O_IV]], [[O_UB]] 146 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 147 148 // Loop header 149 // CHECK: [[O_LOOP1_BODY]] 150 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 151 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 152 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB]] 153 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 154 for (unsigned i = 131071; i <= 2147483647; i += 127) { 155 // CHECK: [[LOOP1_BODY]] 156 // Start of body: calculate i from IV: 157 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 158 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i32 [[IV1_1]], 127 159 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 131071, [[CALC_I_1]] 160 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 161 // ... loop body ... 162 // End of body: store into a[i]: 163 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 164 a[i] = b[i] * c[i] * d[i]; 165 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 166 // CHECK-NEXT: [[ADD1_2:%.+]] = add i32 [[IV1_2]], 1 167 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 168 // CHECK-NEXT: br label %{{.+}} 169 } 170 // CHECK: [[LOOP1_END]] 171 // Update the counters, adding stride 172 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 173 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]] 174 // CHECK-NEXT: [[ADD_LB:%.+]] = add i32 [[LB]], [[ST]] 175 // CHECK-NEXT: store i32 [[ADD_LB]], i32* [[OMP_LB]] 176 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 177 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]] 178 // CHECK-NEXT: [[ADD_UB:%.+]] = add i32 [[UB]], [[ST]] 179 // CHECK-NEXT: store i32 [[ADD_UB]], i32* [[OMP_UB]] 180 181 // CHECK: [[O_LOOP1_END]] 182 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]]) 183 // CHECK: ret void 184 } 185 186 // CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 187 void dynamic1(float *a, float *b, float *c, float *d) { 188 #pragma omp parallel for schedule(dynamic) 189 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 190 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 191 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 192 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 35, i64 0, i64 16908287, i64 1, i64 1) 193 // 194 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 195 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 196 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 197 198 // Loop header 199 // CHECK: [[O_LOOP1_BODY]] 200 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 201 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 202 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 203 204 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 205 // CHECK-NEXT: [[BOUND:%.+]] = add i64 [[UB]], 1 206 // CHECK-NEXT: [[CMP:%.+]] = icmp ult i64 [[IV]], [[BOUND]] 207 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 208 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 209 // CHECK: [[LOOP1_BODY]] 210 // Start of body: calculate i from IV: 211 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 212 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 213 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 214 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 215 // ... loop body ... 216 // End of body: store into a[i]: 217 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 218 a[i] = b[i] * c[i] * d[i]; 219 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 220 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 221 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 222 // CHECK-NEXT: br label %{{.+}} 223 } 224 // CHECK: [[LOOP1_END]] 225 // CHECK: [[O_LOOP1_END]] 226 // CHECK: ret void 227 } 228 229 // CHECK-LABEL: define {{.*void}} @{{.*}}guided7{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 230 void guided7(float *a, float *b, float *c, float *d) { 231 #pragma omp parallel for schedule(guided, 7) 232 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 233 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 234 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 235 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 36, i64 0, i64 16908287, i64 1, i64 7) 236 // 237 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 238 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 239 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 240 241 // Loop header 242 // CHECK: [[O_LOOP1_BODY]] 243 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 244 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 245 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 246 247 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 248 // CHECK-NEXT: [[BOUND:%.+]] = add i64 [[UB]], 1 249 // CHECK-NEXT: [[CMP:%.+]] = icmp ult i64 [[IV]], [[BOUND]] 250 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 251 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 252 // CHECK: [[LOOP1_BODY]] 253 // Start of body: calculate i from IV: 254 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 255 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 256 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 257 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 258 // ... loop body ... 259 // End of body: store into a[i]: 260 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 261 a[i] = b[i] * c[i] * d[i]; 262 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 263 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 264 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 265 // CHECK-NEXT: br label %{{.+}} 266 } 267 // CHECK: [[LOOP1_END]] 268 // CHECK: [[O_LOOP1_END]] 269 // CHECK: ret void 270 } 271 272 // CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 273 void test_auto(float *a, float *b, float *c, float *d) { 274 unsigned int x = 0; 275 unsigned int y = 0; 276 #pragma omp parallel for schedule(auto) collapse(2) 277 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 278 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, i32* dereferenceable(4) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 279 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 280 // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 38, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1) 281 // 282 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 283 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 284 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 285 286 // Loop header 287 // CHECK: [[O_LOOP1_BODY]] 288 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 289 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 290 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 291 292 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 293 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]] 294 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 295 // FIXME: When the iteration count of some nested loop is not a known constant, 296 // we should pre-calculate it, like we do for the total number of iterations! 297 for (char i = static_cast<char>(y); i <= '9'; ++i) 298 for (x = 11; x > 0; --x) { 299 // CHECK: [[LOOP1_BODY]] 300 // Start of body: indices are calculated from IV: 301 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 302 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 303 // ... loop body ... 304 // End of body: store into a[i]: 305 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 306 a[i] = b[i] * c[i] * d[i]; 307 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 308 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1 309 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 310 // CHECK-NEXT: br label %{{.+}} 311 } 312 // CHECK: [[LOOP1_END]] 313 // CHECK: [[O_LOOP1_END]] 314 // CHECK: ret void 315 } 316 317 // CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 318 void runtime(float *a, float *b, float *c, float *d) { 319 int x = 0; 320 #pragma omp parallel for collapse(2) schedule(runtime) 321 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 322 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 323 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 324 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 37, i32 0, i32 199, i32 1, i32 1) 325 // 326 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]]) 327 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 328 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 329 330 // Loop header 331 // CHECK: [[O_LOOP1_BODY]] 332 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 333 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 334 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 335 336 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 337 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 338 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 339 for (unsigned char i = '0' ; i <= '9'; ++i) 340 for (x = -10; x < 10; ++x) { 341 // CHECK: [[LOOP1_BODY]] 342 // Start of body: indices are calculated from IV: 343 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 344 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 345 // ... loop body ... 346 // End of body: store into a[i]: 347 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 348 a[i] = b[i] * c[i] * d[i]; 349 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 350 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 351 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 352 // CHECK-NEXT: br label %{{.+}} 353 } 354 // CHECK: [[LOOP1_END]] 355 // CHECK: [[O_LOOP1_END]] 356 // CHECK: ret void 357 } 358 359 // TERM_DEBUG-LABEL: foo 360 int foo() {return 0;}; 361 362 // TERM_DEBUG-LABEL: parallel_for 363 // CLEANUP: parallel_for 364 void parallel_for(float *a, const int n) { 365 float arr[n]; 366 #pragma omp parallel for schedule(static, 5) private(arr) default(none) firstprivate(n) shared(a) 367 // TERM_DEBUG-NOT: __kmpc_global_thread_num 368 // TERM_DEBUG: call void @__kmpc_for_static_init_4u({{.+}}), !dbg [[DBG_LOC_START:![0-9]+]] 369 // TERM_DEBUG: invoke i32 {{.*}}foo{{.*}}() 370 // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]], 371 // TERM_DEBUG-NOT: __kmpc_global_thread_num 372 // TERM_DEBUG: call void @__kmpc_for_static_fini({{.+}}), !dbg [[DBG_LOC_END:![0-9]+]] 373 // TERM_DEBUG: [[TERM_LPAD]] 374 // TERM_DEBUG: call void @__clang_call_terminate 375 // TERM_DEBUG: unreachable 376 // CLEANUP-NOT: __kmpc_global_thread_num 377 // CLEANUP: call void @__kmpc_for_static_init_4u({{.+}}) 378 // CLEANUP: call void @__kmpc_for_static_fini({{.+}}) 379 for (unsigned i = 131071; i <= 2147483647; i += 127) 380 a[i] += foo() + arr[i] + n; 381 } 382 // Check source line corresponds to "#pragma omp parallel for schedule(static, 5)" above: 383 // TERM_DEBUG-DAG: [[DBG_LOC_START]] = !DILocation(line: [[@LINE-4]], 384 // TERM_DEBUG-DAG: [[DBG_LOC_END]] = !DILocation(line: [[@LINE-18]], 385 386 #ifdef OMP5 387 // OMP5-DAG: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* } 388 // OMP5-DAG: [[LOOP_LOC:@.+]] = private unnamed_addr global [[IDENT_T_TY]] { i32 0, i32 514, i32 0, i32 0, i8* 389 390 // OMP5-LABEL: increment 391 int increment () { 392 // OMP5: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]]) 393 #pragma omp for 394 // Determine UB = min(UB, GlobalUB) 395 // OMP5: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 396 // OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 397 // OMP5-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4 398 // OMP5-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 399 // OMP5: [[UBRESULT:%.+]] = phi i32 [ 4, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 400 // OMP5-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 401 // OMP5-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 402 // OMP5-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 403 // OMP5-NEXT: br label %[[LOOP1_HEAD:.+]] 404 405 // Loop header 406 // OMP5: [[LOOP1_HEAD]] 407 // OMP5: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 408 // OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 409 // OMP5-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 410 // OMP5-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 411 412 for (int i = 0 ; i != 5; ++i) 413 // Start of body: calculate i from IV: 414 // OMP5: [[LOOP1_BODY]] 415 // OMP5: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 416 // OMP5-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 1 417 // OMP5-NEXT: [[CALC_I_2:%.+]] = add nsw i32 0, [[CALC_I_1]] 418 // OMP5-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 419 // OMP5: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 420 // OMP5-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 421 // OMP5-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 422 // OMP5-NEXT: br label %[[LOOP1_HEAD]] 423 ; 424 // OMP5: [[LOOP1_END]] 425 // OMP5: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]]) 426 // OMP5: __kmpc_barrier 427 return 0; 428 // OMP5: ret i32 0 429 } 430 431 // OMP5-LABEL: decrement_nowait 432 int decrement_nowait () { 433 // OMP5: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]]) 434 #pragma omp for nowait 435 // Determine UB = min(UB, GlobalUB) 436 // OMP5: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 437 // OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 438 // OMP5-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4 439 // OMP5-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 440 // OMP5: [[UBRESULT:%.+]] = phi i32 [ 4, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 441 // OMP5-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 442 // OMP5-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 443 // OMP5-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 444 // OMP5-NEXT: br label %[[LOOP1_HEAD:.+]] 445 446 // Loop header 447 // OMP5: [[LOOP1_HEAD]] 448 // OMP5: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 449 // OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 450 // OMP5-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 451 // OMP5-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 452 for (int j = 5 ; j != 0; --j) 453 // Start of body: calculate i from IV: 454 // OMP5: [[LOOP1_BODY]] 455 // OMP5: [[IV2_1:%.+]] = load i32, i32* [[OMP_IV]] 456 // OMP5-NEXT: [[CALC_II_1:%.+]] = mul nsw i32 [[IV2_1]], 1 457 // OMP5-NEXT: [[CALC_II_2:%.+]] = sub nsw i32 5, [[CALC_II_1]] 458 // OMP5-NEXT: store i32 [[CALC_II_2]], i32* [[LC_I:.+]] 459 // OMP5: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 460 // OMP5-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1 461 // OMP5-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]] 462 // OMP5-NEXT: br label %[[LOOP1_HEAD]] 463 ; 464 // OMP5: [[LOOP1_END]] 465 // OMP5: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]]) 466 // OMP5-NOT: __kmpc_barrier 467 return 0; 468 // OMP5: ret i32 0 469 } 470 #endif 471 472 #endif // HEADER 473 474