1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s 2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -gline-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG 5 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -O1 -fopenmp -emit-llvm %s -o - | FileCheck %s --check-prefix=CLEANUP 6 // REQUIRES: x86-registered-target 7 // expected-no-diagnostics 8 #ifndef HEADER 9 #define HEADER 10 11 // CHECK-DAG: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* } 12 // CHECK-DAG: [[CAP_TY:%.+]] = type { i8* } 13 14 // CHECK-LABEL: with_var_schedule 15 void with_var_schedule() { 16 double a = 5; 17 // CHECK: [[CHUNK_SIZE:%.+]] = fptosi double %{{.+}}to i8 18 // CHECK: store i8 %{{.+}}, i8* [[CHUNK:%.+]], 19 // CHECK: [[CHUNK_REF:%.+]] = getelementptr inbounds [[CAP_TY]], [[CAP_TY]]* [[CAP_ARG:%.+]], i{{.+}} 0, i{{.+}} 0 20 // CHECK: store i8* [[CHUNK]], i8** [[CHUNK_REF]], 21 // CHECK: [[BITCAST:%.+]] = bitcast [[CAP_TY]]* [[CAP_ARG]] to i8* 22 // CHECK: call void {{.+}} @__kmpc_fork_call({{.+}}, i8* [[BITCAST]]) 23 24 // CHECK: [[CHUNK_REF:%.+]] = getelementptr inbounds [[CAP_TY]], [[CAP_TY]]* %{{.+}}, i{{.+}} 0, i{{.+}} 0 25 // CHECK: [[CHUNK:%.+]] = load i8*, i8** [[CHUNK_REF]], 26 // CHECK: [[CHUNK_VAL:%.+]] = load i8, i8* [[CHUNK]], 27 // CHECK: [[CHUNK_SIZE:%.+]] = sext i8 [[CHUNK_VAL]] to i64 28 // CHECK: call void @__kmpc_for_static_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC:@[^,]+]], i32 [[GTID:%[^,]+]], i32 33, i32* [[IS_LAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]], i64 1, i64 [[CHUNK_SIZE]]) 29 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 30 // CHECK: __kmpc_barrier 31 #pragma omp parallel for schedule(static, char(a)) 32 for (unsigned long long i = 1; i < 2; ++i) { 33 } 34 } 35 36 // CHECK-LABEL: define {{.*void}} @{{.*}}without_schedule_clause{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 37 void without_schedule_clause(float *a, float *b, float *c, float *d) { 38 #pragma omp parallel for 39 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 40 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 41 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 42 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 43 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 44 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 45 // UB = min(UB, GlobalUB) 46 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 47 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423 48 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 49 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 50 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 51 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 52 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 53 // Loop header 54 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 55 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 56 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 57 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 58 for (int i = 33; i < 32000000; i += 7) { 59 // CHECK: [[LOOP1_BODY]] 60 // Start of body: calculate i from IV: 61 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 62 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 63 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 33, [[CALC_I_1]] 64 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 65 // ... loop body ... 66 // End of body: store into a[i]: 67 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 68 a[i] = b[i] * c[i] * d[i]; 69 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 70 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 71 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 72 // CHECK-NEXT: br label %{{.+}} 73 } 74 // CHECK: [[LOOP1_END]] 75 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 76 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 77 // CHECK: ret void 78 } 79 80 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 81 void static_not_chunked(float *a, float *b, float *c, float *d) { 82 #pragma omp parallel for schedule(static) 83 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 84 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 85 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 86 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 87 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 88 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 89 // UB = min(UB, GlobalUB) 90 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 91 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423 92 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 93 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 94 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 95 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 96 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 97 // Loop header 98 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 99 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 100 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 101 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 102 for (int i = 32000000; i > 33; i += -7) { 103 // CHECK: [[LOOP1_BODY]] 104 // Start of body: calculate i from IV: 105 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 106 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 107 // CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]] 108 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 109 // ... loop body ... 110 // End of body: store into a[i]: 111 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 112 a[i] = b[i] * c[i] * d[i]; 113 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 114 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 115 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 116 // CHECK-NEXT: br label %{{.+}} 117 } 118 // CHECK: [[LOOP1_END]] 119 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 120 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 121 // CHECK: ret void 122 } 123 124 // CHECK-LABEL: define {{.*void}} @{{.*}}static_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 125 void static_chunked(float *a, float *b, float *c, float *d) { 126 #pragma omp parallel for schedule(static, 5) 127 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 128 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 129 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 130 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 131 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 132 // CHECK: call void @__kmpc_for_static_init_4u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 33, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 5) 133 // UB = min(UB, GlobalUB) 134 // CHECK: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 135 // CHECK-NEXT: [[UBCMP:%.+]] = icmp ugt i32 [[UB]], 16908288 136 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 137 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 16908288, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 138 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 139 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 140 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 141 142 // Outer loop header 143 // CHECK: [[O_IV:%.+]] = load i32, i32* [[OMP_IV]] 144 // CHECK-NEXT: [[O_UB:%.+]] = load i32, i32* [[OMP_UB]] 145 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ule i32 [[O_IV]], [[O_UB]] 146 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 147 148 // Loop header 149 // CHECK: [[O_LOOP1_BODY]] 150 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 151 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 152 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB]] 153 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 154 for (unsigned i = 131071; i <= 2147483647; i += 127) { 155 // CHECK: [[LOOP1_BODY]] 156 // Start of body: calculate i from IV: 157 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 158 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i32 [[IV1_1]], 127 159 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 131071, [[CALC_I_1]] 160 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 161 // ... loop body ... 162 // End of body: store into a[i]: 163 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 164 a[i] = b[i] * c[i] * d[i]; 165 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 166 // CHECK-NEXT: [[ADD1_2:%.+]] = add i32 [[IV1_2]], 1 167 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 168 // CHECK-NEXT: br label %{{.+}} 169 } 170 // CHECK: [[LOOP1_END]] 171 // Update the counters, adding stride 172 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 173 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]] 174 // CHECK-NEXT: [[ADD_LB:%.+]] = add i32 [[LB]], [[ST]] 175 // CHECK-NEXT: store i32 [[ADD_LB]], i32* [[OMP_LB]] 176 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 177 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]] 178 // CHECK-NEXT: [[ADD_UB:%.+]] = add i32 [[UB]], [[ST]] 179 // CHECK-NEXT: store i32 [[ADD_UB]], i32* [[OMP_UB]] 180 181 // CHECK: [[O_LOOP1_END]] 182 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 183 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 184 // CHECK: ret void 185 } 186 187 // CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 188 void dynamic1(float *a, float *b, float *c, float *d) { 189 #pragma omp parallel for schedule(dynamic) 190 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 191 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 192 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 193 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 194 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 195 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 35, i64 0, i64 16908287, i64 1, i64 1) 196 // 197 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 198 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 199 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 200 201 // Loop header 202 // CHECK: [[O_LOOP1_BODY]] 203 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 204 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 205 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 206 207 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 208 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]] 209 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 210 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 211 // CHECK: [[LOOP1_BODY]] 212 // Start of body: calculate i from IV: 213 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 214 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 215 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 216 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 217 // ... loop body ... 218 // End of body: store into a[i]: 219 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 220 a[i] = b[i] * c[i] * d[i]; 221 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 222 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 223 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 224 // CHECK-NEXT: br label %{{.+}} 225 } 226 // CHECK: [[LOOP1_END]] 227 // CHECK: [[O_LOOP1_END]] 228 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 229 // CHECK: ret void 230 } 231 232 // CHECK-LABEL: define {{.*void}} @{{.*}}guided7{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 233 void guided7(float *a, float *b, float *c, float *d) { 234 #pragma omp parallel for schedule(guided, 7) 235 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 236 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 237 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 238 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 239 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 240 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 36, i64 0, i64 16908287, i64 1, i64 7) 241 // 242 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 243 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 244 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 245 246 // Loop header 247 // CHECK: [[O_LOOP1_BODY]] 248 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 249 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 250 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 251 252 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 253 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]] 254 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 255 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 256 // CHECK: [[LOOP1_BODY]] 257 // Start of body: calculate i from IV: 258 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 259 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 260 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 261 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 262 // ... loop body ... 263 // End of body: store into a[i]: 264 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 265 a[i] = b[i] * c[i] * d[i]; 266 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 267 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 268 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 269 // CHECK-NEXT: br label %{{.+}} 270 } 271 // CHECK: [[LOOP1_END]] 272 // CHECK: [[O_LOOP1_END]] 273 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 274 // CHECK: ret void 275 } 276 277 // CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 278 void test_auto(float *a, float *b, float *c, float *d) { 279 unsigned int x = 0; 280 unsigned int y = 0; 281 #pragma omp parallel for schedule(auto) collapse(2) 282 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 283 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 284 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 285 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 286 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 287 // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 38, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1) 288 // 289 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 290 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 291 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 292 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 293 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 294 295 // Loop header 296 // CHECK: [[O_LOOP1_BODY]] 297 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 298 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 299 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 300 301 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 302 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]] 303 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 304 // FIXME: When the iteration count of some nested loop is not a known constant, 305 // we should pre-calculate it, like we do for the total number of iterations! 306 for (char i = static_cast<char>(y); i <= '9'; ++i) 307 for (x = 11; x > 0; --x) { 308 // CHECK: [[LOOP1_BODY]] 309 // Start of body: indices are calculated from IV: 310 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 311 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 312 // ... loop body ... 313 // End of body: store into a[i]: 314 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 315 a[i] = b[i] * c[i] * d[i]; 316 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 317 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1 318 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 319 // CHECK-NEXT: br label %{{.+}} 320 } 321 // CHECK: [[LOOP1_END]] 322 // CHECK: [[O_LOOP1_END]] 323 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 324 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 325 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 326 // CHECK: ret void 327 } 328 329 // CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 330 void runtime(float *a, float *b, float *c, float *d) { 331 int x = 0; 332 #pragma omp parallel for collapse(2) schedule(runtime) 333 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %{{.+}}*)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), i8* %{{.+}}) 334 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* [[GTID_PARAM_ADDR:%.+]], i32* %{{.+}}, %{{.+}}* %{{.+}}) 335 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 336 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 337 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 338 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 37, i32 0, i32 199, i32 1, i32 1) 339 // 340 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]]) 341 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 342 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 343 344 // Loop header 345 // CHECK: [[O_LOOP1_BODY]] 346 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 347 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 348 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 349 350 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 351 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 352 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 353 for (unsigned char i = '0' ; i <= '9'; ++i) 354 for (x = -10; x < 10; ++x) { 355 // CHECK: [[LOOP1_BODY]] 356 // Start of body: indices are calculated from IV: 357 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 358 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 359 // ... loop body ... 360 // End of body: store into a[i]: 361 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 362 a[i] = b[i] * c[i] * d[i]; 363 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 364 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 365 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 366 // CHECK-NEXT: br label %{{.+}} 367 } 368 // CHECK: [[LOOP1_END]] 369 // CHECK: [[O_LOOP1_END]] 370 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 371 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 372 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[DEFAULT_LOC_BARRIER:[@%].+]], i32 [[GTID]]) 373 // CHECK: ret void 374 } 375 376 // TERM_DEBUG-LABEL: foo 377 int foo() {return 0;}; 378 379 // TERM_DEBUG-LABEL: parallel_for 380 // CLEANUP: parallel_for 381 void parallel_for(float *a) { 382 #pragma omp parallel for schedule(static, 5) 383 // TERM_DEBUG-NOT: __kmpc_global_thread_num 384 // TERM_DEBUG: call void @__kmpc_for_static_init_4u({{.+}}), !dbg [[DBG_LOC_START:![0-9]+]] 385 // TERM_DEBUG: invoke i32 {{.*}}foo{{.*}}() 386 // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]], 387 // TERM_DEBUG-NOT: __kmpc_global_thread_num 388 // TERM_DEBUG: call void @__kmpc_for_static_fini({{.+}}), !dbg [[DBG_LOC_END:![0-9]+]] 389 // TERM_DEBUG: call {{.+}} @__kmpc_barrier({{.+}}), !dbg [[DBG_LOC_CANCEL:![0-9]+]] 390 // TERM_DEBUG: [[TERM_LPAD]] 391 // TERM_DEBUG: call void @__clang_call_terminate 392 // TERM_DEBUG: unreachable 393 // CLEANUP-NOT: __kmpc_global_thread_num 394 // CLEANUP: call void @__kmpc_for_static_init_4u({{.+}}) 395 // CLEANUP: call void @__kmpc_for_static_fini({{.+}}) 396 // CLEANUP: call {{.+}} @__kmpc_barrier({{.+}}) 397 for (unsigned i = 131071; i <= 2147483647; i += 127) 398 a[i] += foo(); 399 } 400 // Check source line corresponds to "#pragma omp parallel for schedule(static, 5)" above: 401 // TERM_DEBUG-DAG: [[DBG_LOC_START]] = !DILocation(line: [[@LINE-4]], 402 // TERM_DEBUG-DAG: [[DBG_LOC_END]] = !DILocation(line: [[@LINE-20]], 403 // TERM_DEBUG-DAG: [[DBG_LOC_CANCEL]] = !DILocation(line: [[@LINE-21]], 404 405 #endif // HEADER 406 407