1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s 2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 4 5 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s 6 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 7 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 8 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} 9 // expected-no-diagnostics 10 #ifndef HEADER 11 #define HEADER 12 13 // CHECK: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* } 14 // CHECK: [[IMPLICIT_BARRIER_LOC:@.+]] = private unnamed_addr global %{{.+}} { i32 0, i32 66, i32 0, i32 0, i8* 15 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 16 void static_not_chunked(float *a, float *b, float *c, float *d) { 17 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]]) 18 #pragma omp for schedule(static) ordered 19 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 66, i32 0, i32 4571423, i32 1, i32 1) 20 // 21 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]]) 22 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 23 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 24 25 // Loop header 26 // CHECK: [[O_LOOP1_BODY]] 27 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 28 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 29 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 30 31 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 32 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 33 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 34 for (int i = 32000000; i > 33; i += -7) { 35 // CHECK: [[LOOP1_BODY]] 36 // Start of body: calculate i from IV: 37 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 38 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 39 // CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]] 40 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 41 42 // ... start of ordered region ... 43 // CHECK-NEXT: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 44 // ... loop body ... 45 // End of body: store into a[i]: 46 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 47 // CHECK-NOT: !llvm.mem.parallel_loop_access 48 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 49 // ... end of ordered region ... 50 #pragma omp ordered 51 a[i] = b[i] * c[i] * d[i]; 52 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 53 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 54 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 55 // CHECK-NEXT: call void @__kmpc_dispatch_fini_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 56 // CHECK-NEXT: br label %{{.+}} 57 } 58 // CHECK: [[LOOP1_END]] 59 // CHECK: [[O_LOOP1_END]] 60 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]]) 61 // CHECK: ret void 62 } 63 64 // CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 65 void dynamic1(float *a, float *b, float *c, float *d) { 66 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]]) 67 #pragma omp for schedule(dynamic) ordered 68 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 67, i64 0, i64 16908287, i64 1, i64 1) 69 // 70 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 71 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 72 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 73 74 // Loop header 75 // CHECK: [[O_LOOP1_BODY]] 76 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 77 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 78 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 79 80 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 81 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]] 82 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 83 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 84 // CHECK: [[LOOP1_BODY]] 85 // Start of body: calculate i from IV: 86 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 87 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 88 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 89 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 90 91 // ... start of ordered region ... 92 // CHECK-NEXT: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 93 // ... loop body ... 94 // End of body: store into a[i]: 95 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 96 // CHECK-NOT: !llvm.mem.parallel_loop_access 97 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 98 // ... end of ordered region ... 99 #pragma omp ordered threads 100 a[i] = b[i] * c[i] * d[i]; 101 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 102 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 103 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 104 105 // ... end iteration for ordered loop ... 106 // CHECK-NEXT: call void @__kmpc_dispatch_fini_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 107 // CHECK-NEXT: br label %{{.+}} 108 } 109 // CHECK: [[LOOP1_END]] 110 // CHECK: [[O_LOOP1_END]] 111 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]]) 112 // CHECK: ret void 113 } 114 115 // CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 116 void test_auto(float *a, float *b, float *c, float *d) { 117 unsigned int x = 0; 118 unsigned int y = 0; 119 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]]) 120 #pragma omp for schedule(auto) collapse(2) ordered 121 // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 70, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1) 122 // 123 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 124 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 125 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 126 127 // Loop header 128 // CHECK: [[O_LOOP1_BODY]] 129 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 130 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 131 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 132 133 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 134 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]] 135 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 136 // FIXME: When the iteration count of some nested loop is not a known constant, 137 // we should pre-calculate it, like we do for the total number of iterations! 138 for (char i = static_cast<char>(y); i <= '9'; ++i) 139 for (x = 11; x > 0; --x) { 140 // CHECK: [[LOOP1_BODY]] 141 // Start of body: indices are calculated from IV: 142 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 143 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 144 145 // ... start of ordered region ... 146 // CHECK: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 147 // ... loop body ... 148 // End of body: store into a[i]: 149 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 150 // CHECK-NOT: !llvm.mem.parallel_loop_access 151 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 152 // ... end of ordered region ... 153 #pragma omp ordered 154 a[i] = b[i] * c[i] * d[i]; 155 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 156 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1 157 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 158 159 // ... end iteration for ordered loop ... 160 // CHECK-NEXT: call void @__kmpc_dispatch_fini_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 161 // CHECK-NEXT: br label %{{.+}} 162 } 163 // CHECK: [[LOOP1_END]] 164 // CHECK: [[O_LOOP1_END]] 165 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]]) 166 // CHECK: ret void 167 } 168 169 // CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 170 void runtime(float *a, float *b, float *c, float *d) { 171 int x = 0; 172 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]]) 173 #pragma omp for collapse(2) schedule(runtime) ordered 174 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 69, i32 0, i32 199, i32 1, i32 1) 175 // 176 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]]) 177 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 178 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 179 180 // Loop header 181 // CHECK: [[O_LOOP1_BODY]] 182 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 183 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 184 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 185 186 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 187 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 188 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 189 for (unsigned char i = '0' ; i <= '9'; ++i) 190 for (x = -10; x < 10; ++x) { 191 // CHECK: [[LOOP1_BODY]] 192 // Start of body: indices are calculated from IV: 193 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 194 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 195 196 // ... start of ordered region ... 197 // CHECK: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 198 // ... loop body ... 199 // End of body: store into a[i]: 200 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 201 // CHECK-NOT: !llvm.mem.parallel_loop_access 202 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 203 // ... end of ordered region ... 204 #pragma omp ordered threads 205 a[i] = b[i] * c[i] * d[i]; 206 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 207 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 208 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 209 210 // ... end iteration for ordered loop ... 211 // CHECK-NEXT: call void @__kmpc_dispatch_fini_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 212 // CHECK-NEXT: br label %{{.+}} 213 } 214 // CHECK: [[LOOP1_END]] 215 // CHECK: [[O_LOOP1_END]] 216 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]]) 217 // CHECK: ret void 218 } 219 220 float f[10]; 221 // CHECK-LABEL: foo_simd 222 void foo_simd(int low, int up) { 223 // CHECK: store float 0.000000e+00, float* %{{.+}}, align {{[0-9]+}}, !llvm.mem.parallel_loop_access ! 224 // CHECK-NEXT: call void [[CAP_FUNC:@.+]](i32* %{{.+}}), !llvm.mem.parallel_loop_access ! 225 #pragma omp simd 226 for (int i = low; i < up; ++i) { 227 f[i] = 0.0; 228 #pragma omp ordered simd 229 f[i] = 1.0; 230 } 231 // CHECK: store float 0.000000e+00, float* %{{.+}}, align {{[0-9]+}} 232 // CHECK-NEXT: call void [[CAP_FUNC:@.+]](i32* %{{.+}}) 233 #pragma omp for simd ordered 234 for (int i = low; i < up; ++i) { 235 f[i] = 0.0; 236 #pragma omp ordered simd 237 f[i] = 1.0; 238 } 239 } 240 241 // CHECK: define internal void [[CAP_FUNC]](i32* dereferenceable({{[0-9]+}}) %{{.+}}) # 242 // CHECK: store float 1.000000e+00, float* %{{.+}}, align 243 // CHECK-NEXT: ret void 244 245 #endif // HEADER 246 247