1 // RUN: %clang_cc1 -verify -fopenmp=libiomp5 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp=libiomp5 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
3 // RUN: %clang_cc1 -fopenmp=libiomp5 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
4 //
5 // expected-no-diagnostics
6 #ifndef HEADER
7 #define HEADER
8 
9 // CHECK: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* }
10 // CHECK: [[IMPLICIT_BARRIER_LOC:@.+]] = private unnamed_addr constant %{{.+}} { i32 0, i32 66, i32 0, i32 0, i8*
11 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
12 void static_not_chunked(float *a, float *b, float *c, float *d) {
13 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
14   #pragma omp for schedule(static) ordered
15 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
16 // UB = min(UB, GlobalUB)
17 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
18 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423
19 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
20 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
21 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
22 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
23 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
24 // Loop header
25 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
26 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
27 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
28 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
29   for (int i = 32000000; i > 33; i += -7) {
30 // CHECK: [[LOOP1_BODY]]
31 // Start of body: calculate i from IV:
32 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
33 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7
34 // CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]]
35 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
36 
37 // ... start of ordered region ...
38 // CHECK-NEXT: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
39 // ... loop body ...
40 // End of body: store into a[i]:
41 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
42 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
43 // ... end of ordered region ...
44     #pragma omp ordered
45     a[i] = b[i] * c[i] * d[i];
46 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
47 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
48 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
49 // CHECK-NEXT: br label %{{.+}}
50   }
51 // CHECK: [[LOOP1_END]]
52 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
53 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]])
54 // CHECK: ret void
55 }
56 
57 // CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
58 void dynamic1(float *a, float *b, float *c, float *d) {
59 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
60   #pragma omp for schedule(dynamic) ordered
61 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 35, i64 0, i64 16908287, i64 1, i64 1)
62 //
63 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]])
64 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
65 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
66 
67 // Loop header
68 // CHECK: [[O_LOOP1_BODY]]
69 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]]
70 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]]
71 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
72 
73 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]]
74 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]]
75 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
76   for (unsigned long long i = 131071; i < 2147483647; i += 127) {
77 // CHECK: [[LOOP1_BODY]]
78 // Start of body: calculate i from IV:
79 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]]
80 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127
81 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]]
82 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]]
83 
84 // ... start of ordered region ...
85 // CHECK-NEXT: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
86 // ... loop body ...
87 // End of body: store into a[i]:
88 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
89 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
90 // ... end of ordered region ...
91     #pragma omp ordered
92     a[i] = b[i] * c[i] * d[i];
93 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}
94 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1
95 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]]
96 
97 // ... end iteration for ordered loop ...
98 // CHECK-NEXT: call void @__kmpc_dispatch_fini_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
99 // CHECK-NEXT: br label %{{.+}}
100   }
101 // CHECK: [[LOOP1_END]]
102 // CHECK: [[O_LOOP1_END]]
103 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]])
104 // CHECK: ret void
105 }
106 
107 // CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
108 void test_auto(float *a, float *b, float *c, float *d) {
109   unsigned int x = 0;
110   unsigned int y = 0;
111 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
112   #pragma omp for schedule(auto) collapse(2) ordered
113 // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 38, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1)
114 //
115 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]])
116 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
117 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
118 
119 // Loop header
120 // CHECK: [[O_LOOP1_BODY]]
121 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]]
122 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]]
123 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
124 
125 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]]
126 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]]
127 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
128 // FIXME: When the iteration count of some nested loop is not a known constant,
129 // we should pre-calculate it, like we do for the total number of iterations!
130   for (char i = static_cast<char>(y); i <= '9'; ++i)
131     for (x = 11; x > 0; --x) {
132 // CHECK: [[LOOP1_BODY]]
133 // Start of body: indices are calculated from IV:
134 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}}
135 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}}
136 
137 // ... start of ordered region ...
138 // CHECK: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
139 // ... loop body ...
140 // End of body: store into a[i]:
141 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
142 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
143 // ... end of ordered region ...
144     #pragma omp ordered
145     a[i] = b[i] * c[i] * d[i];
146 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}
147 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1
148 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]]
149 
150 // ... end iteration for ordered loop ...
151 // CHECK-NEXT: call void @__kmpc_dispatch_fini_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
152 // CHECK-NEXT: br label %{{.+}}
153   }
154 // CHECK: [[LOOP1_END]]
155 // CHECK: [[O_LOOP1_END]]
156 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]])
157 // CHECK: ret void
158 }
159 
160 // CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
161 void runtime(float *a, float *b, float *c, float *d) {
162   int x = 0;
163 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
164   #pragma omp for collapse(2) schedule(runtime) ordered
165 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 37, i32 0, i32 199, i32 1, i32 1)
166 //
167 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]])
168 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
169 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
170 
171 // Loop header
172 // CHECK: [[O_LOOP1_BODY]]
173 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
174 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
175 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
176 
177 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
178 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
179 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
180   for (unsigned char i = '0' ; i <= '9'; ++i)
181     for (x = -10; x < 10; ++x) {
182 // CHECK: [[LOOP1_BODY]]
183 // Start of body: indices are calculated from IV:
184 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}}
185 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}}
186 
187 // ... start of ordered region ...
188 // CHECK: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
189 // ... loop body ...
190 // End of body: store into a[i]:
191 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
192 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
193 // ... end of ordered region ...
194     #pragma omp ordered
195     a[i] = b[i] * c[i] * d[i];
196 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
197 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
198 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
199 
200 // ... end iteration for ordered loop ...
201 // CHECK-NEXT: call void @__kmpc_dispatch_fini_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
202 // CHECK-NEXT: br label %{{.+}}
203   }
204 // CHECK: [[LOOP1_END]]
205 // CHECK: [[O_LOOP1_END]]
206 // CHECK: call {{.+}} @__kmpc_cancel_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]])
207 // CHECK: ret void
208 }
209 
210 #endif // HEADER
211 
212