1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s 2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 4 5 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s 6 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 7 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 8 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} 9 // expected-no-diagnostics 10 #ifndef HEADER 11 #define HEADER 12 13 // CHECK: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* } 14 // CHECK: [[IMPLICIT_BARRIER_LOC:@.+]] = private unnamed_addr global %{{.+}} { i32 0, i32 66, i32 0, i32 0, i8* 15 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 16 void static_not_chunked(float *a, float *b, float *c, float *d) { 17 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]]) 18 #pragma omp for schedule(static) ordered 19 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 66, i32 0, i32 4571423, i32 1, i32 1) 20 // 21 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]]) 22 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 23 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 24 25 // Loop header 26 // CHECK: [[O_LOOP1_BODY]] 27 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 28 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 29 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 30 31 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 32 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 33 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 34 for (int i = 32000000; i > 33; i += -7) { 35 // CHECK: [[LOOP1_BODY]] 36 // Start of body: calculate i from IV: 37 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 38 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 39 // CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]] 40 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 41 42 // ... start of ordered region ... 43 // CHECK-NEXT: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 44 // ... loop body ... 45 // End of body: store into a[i]: 46 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 47 // CHECK-NOT: !llvm.access.group 48 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 49 // ... end of ordered region ... 50 #pragma omp ordered 51 a[i] = b[i] * c[i] * d[i]; 52 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 53 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 54 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 55 // CHECK-NEXT: call void @__kmpc_dispatch_fini_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 56 // CHECK-NEXT: br label %{{.+}} 57 } 58 // CHECK: [[LOOP1_END]] 59 // CHECK: [[O_LOOP1_END]] 60 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]]) 61 // CHECK: ret void 62 } 63 64 // CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 65 void dynamic1(float *a, float *b, float *c, float *d) { 66 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]]) 67 #pragma omp for schedule(dynamic) ordered 68 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 67, i64 0, i64 16908287, i64 1, i64 1) 69 // 70 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 71 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 72 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 73 74 // Loop header 75 // CHECK: [[O_LOOP1_BODY]] 76 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 77 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 78 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 79 80 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 81 // CHECK-NEXT: [[BOUND:%.+]] = add i64 [[UB]], 1 82 // CHECK-NEXT: [[CMP:%.+]] = icmp ult i64 [[IV]], [[BOUND]] 83 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 84 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 85 // CHECK: [[LOOP1_BODY]] 86 // Start of body: calculate i from IV: 87 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 88 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 89 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 90 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 91 92 // ... start of ordered region ... 93 // CHECK-NEXT: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 94 // ... loop body ... 95 // End of body: store into a[i]: 96 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 97 // CHECK-NOT: !llvm.access.group 98 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 99 // ... end of ordered region ... 100 #pragma omp ordered threads 101 a[i] = b[i] * c[i] * d[i]; 102 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 103 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 104 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 105 106 // ... end iteration for ordered loop ... 107 // CHECK-NEXT: call void @__kmpc_dispatch_fini_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 108 // CHECK-NEXT: br label %{{.+}} 109 } 110 // CHECK: [[LOOP1_END]] 111 // CHECK: [[O_LOOP1_END]] 112 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]]) 113 // CHECK: ret void 114 } 115 116 // CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 117 void test_auto(float *a, float *b, float *c, float *d) { 118 unsigned int x = 0; 119 unsigned int y = 0; 120 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]]) 121 #pragma omp for schedule(auto) collapse(2) ordered 122 // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 70, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1) 123 // 124 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 125 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 126 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 127 128 // Loop header 129 // CHECK: [[O_LOOP1_BODY]] 130 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 131 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 132 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 133 134 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 135 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]] 136 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 137 // FIXME: When the iteration count of some nested loop is not a known constant, 138 // we should pre-calculate it, like we do for the total number of iterations! 139 for (char i = static_cast<char>(y); i <= '9'; ++i) 140 for (x = 11; x > 0; --x) { 141 // CHECK: [[LOOP1_BODY]] 142 // Start of body: indices are calculated from IV: 143 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 144 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 145 146 // ... start of ordered region ... 147 // CHECK: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 148 // ... loop body ... 149 // End of body: store into a[i]: 150 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 151 // CHECK-NOT: !llvm.access.group 152 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 153 // ... end of ordered region ... 154 #pragma omp ordered 155 a[i] = b[i] * c[i] * d[i]; 156 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 157 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1 158 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 159 160 // ... end iteration for ordered loop ... 161 // CHECK-NEXT: call void @__kmpc_dispatch_fini_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 162 // CHECK-NEXT: br label %{{.+}} 163 } 164 // CHECK: [[LOOP1_END]] 165 // CHECK: [[O_LOOP1_END]] 166 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]]) 167 // CHECK: ret void 168 } 169 170 // CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 171 void runtime(float *a, float *b, float *c, float *d) { 172 int x = 0; 173 // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]]) 174 #pragma omp for collapse(2) schedule(runtime) ordered 175 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 69, i32 0, i32 199, i32 1, i32 1) 176 // 177 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]]) 178 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 179 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 180 181 // Loop header 182 // CHECK: [[O_LOOP1_BODY]] 183 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 184 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 185 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 186 187 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 188 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 189 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 190 for (unsigned char i = '0' ; i <= '9'; ++i) 191 for (x = -10; x < 10; ++x) { 192 // CHECK: [[LOOP1_BODY]] 193 // Start of body: indices are calculated from IV: 194 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 195 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 196 197 // ... start of ordered region ... 198 // CHECK: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 199 // ... loop body ... 200 // End of body: store into a[i]: 201 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 202 // CHECK-NOT: !llvm.access.group 203 // CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 204 // ... end of ordered region ... 205 #pragma omp ordered threads 206 a[i] = b[i] * c[i] * d[i]; 207 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 208 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 209 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 210 211 // ... end iteration for ordered loop ... 212 // CHECK-NEXT: call void @__kmpc_dispatch_fini_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 213 // CHECK-NEXT: br label %{{.+}} 214 } 215 // CHECK: [[LOOP1_END]] 216 // CHECK: [[O_LOOP1_END]] 217 // CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]]) 218 // CHECK: ret void 219 } 220 221 float f[10]; 222 // CHECK-LABEL: foo_simd 223 void foo_simd(int low, int up) { 224 // CHECK: store float 0.000000e+00, float* %{{.+}}, align {{[0-9]+}}, !llvm.access.group ! 225 // CHECK-NEXT: call void [[CAP_FUNC:@.+]](i32* %{{.+}}), !llvm.access.group ! 226 #pragma omp simd 227 for (int i = low; i < up; ++i) { 228 f[i] = 0.0; 229 #pragma omp ordered simd 230 f[i] = 1.0; 231 } 232 // CHECK: store float 0.000000e+00, float* %{{.+}}, align {{[0-9]+}} 233 // CHECK-NEXT: call void [[CAP_FUNC:@.+]](i32* %{{.+}}) 234 #pragma omp for simd ordered 235 for (int i = low; i < up; ++i) { 236 f[i] = 0.0; 237 #pragma omp ordered simd 238 f[i] = 1.0; 239 } 240 } 241 242 // CHECK: define internal void [[CAP_FUNC]](i32* nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %{{.+}}) # 243 // CHECK: store float 1.000000e+00, float* %{{.+}}, align 244 // CHECK-NEXT: ret void 245 246 #endif // HEADER 247 248