1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -x c++ -O1 -disable-llvm-optzns -verify -fopenmp -internal-isystem %S/../Headers/Inputs/include -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc 3 // RUN: %clang_cc1 -x c++ -O1 -disable-llvm-optzns -verify -fopenmp -internal-isystem %S/../Headers/Inputs/include -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -triple nvptx64-unknown-unknown -aux-triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -x c++ -O1 -disable-llvm-optzns -verify -fopenmp -internal-isystem %S/../Headers/Inputs/include -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc 5 // RUN: %clang_cc1 -x c++ -O1 -disable-llvm-optzns -verify -fopenmp -internal-isystem %S/../Headers/Inputs/include -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -triple nvptx64-unknown-unknown -aux-triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK2 6 // RUN: %clang_cc1 -x c++ -O1 -disable-llvm-optzns -verify -fopenmp -internal-isystem %S/../Headers/Inputs/include -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -fexceptions -fcxx-exceptions -aux-triple powerpc64le-unknown-unknown -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK3 7 // expected-no-diagnostics 8 #ifndef HEADER 9 #define HEADER 10 11 #include <complex> 12 13 // Verify we do not add tbaa metadata to type punned memory operations: 14 15 16 17 template <typename T> 18 void complex_reduction() { 19 #pragma omp target teams distribute 20 for (int ib = 0; ib < 100; ib++) { 21 std::complex<T> partial_sum; 22 const int istart = ib * 4; 23 const int iend = (ib + 1) * 4; 24 #pragma omp parallel for reduction(+ \ 25 : partial_sum) 26 for (int i = istart; i < iend; i++) 27 partial_sum += std::complex<T>(i, i); 28 } 29 } 30 31 void test() { 32 complex_reduction<float>(); 33 complex_reduction<double>(); 34 } 35 #endif 36 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker 37 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 38 // CHECK1-NEXT: entry: 39 // CHECK1-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 40 // CHECK1-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 41 // CHECK1-NEXT: store i8* null, i8** [[WORK_FN]], align 8 42 // CHECK1-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 43 // CHECK1-NEXT: br label [[DOTAWAIT_WORK:%.*]] 44 // CHECK1: .await.work: 45 // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 46 // CHECK1-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) 47 // CHECK1-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 48 // CHECK1-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 49 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 50 // CHECK1-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null 51 // CHECK1-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] 52 // CHECK1: .select.workers: 53 // CHECK1-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 54 // CHECK1-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 55 // CHECK1-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] 56 // CHECK1: .execute.parallel: 57 // CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 58 // CHECK1-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 59 // CHECK1-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*) 60 // CHECK1-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] 61 // CHECK1: .execute.fn: 62 // CHECK1-NEXT: call void @__omp_outlined__1_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5:[0-9]+]] 63 // CHECK1-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] 64 // CHECK1: .check.next: 65 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* 66 // CHECK1-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) 67 // CHECK1-NEXT: br label [[DOTTERMINATE_PARALLEL]] 68 // CHECK1: .terminate.parallel: 69 // CHECK1-NEXT: call void @__kmpc_kernel_end_parallel() 70 // CHECK1-NEXT: br label [[DOTBARRIER_PARALLEL]] 71 // CHECK1: .barrier.parallel: 72 // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 73 // CHECK1-NEXT: br label [[DOTAWAIT_WORK]] 74 // CHECK1: .exit: 75 // CHECK1-NEXT: ret void 76 // 77 // 78 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19 79 // CHECK1-SAME: () #[[ATTR0]] { 80 // CHECK1-NEXT: entry: 81 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 82 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 83 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 84 // CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 85 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 86 // CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 87 // CHECK1-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] 88 // CHECK1-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] 89 // CHECK1-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] 90 // CHECK1: .worker: 91 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker() #[[ATTR5]] 92 // CHECK1-NEXT: br label [[DOTEXIT:%.*]] 93 // CHECK1: .mastercheck: 94 // CHECK1-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 95 // CHECK1-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 96 // CHECK1-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 97 // CHECK1-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 98 // CHECK1-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 99 // CHECK1-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 100 // CHECK1-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] 101 // CHECK1-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] 102 // CHECK1-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] 103 // CHECK1: .master: 104 // CHECK1-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 105 // CHECK1-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 106 // CHECK1-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] 107 // CHECK1-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) 108 // CHECK1-NEXT: call void @__kmpc_data_sharing_init_stack() 109 // CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 110 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6:![0-9]+]] 111 // CHECK1-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] 112 // CHECK1-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] 113 // CHECK1: .termination.notifier: 114 // CHECK1-NEXT: call void @__kmpc_kernel_deinit(i16 1) 115 // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 116 // CHECK1-NEXT: br label [[DOTEXIT]] 117 // CHECK1: .exit: 118 // CHECK1-NEXT: ret void 119 // 120 // 121 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__ 122 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 123 // CHECK1-NEXT: entry: 124 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 125 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 126 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 127 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 128 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 129 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 130 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 131 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 132 // CHECK1-NEXT: [[IB:%.*]] = alloca i32, align 4 133 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 134 // CHECK1-NEXT: [[REF_TMP2:%.*]] = alloca float, align 4 135 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 136 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10:![0-9]+]] 137 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 138 // CHECK1-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12:![0-9]+]] 139 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8, !tbaa [[TBAA14:![0-9]+]] 140 // CHECK1-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 141 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 142 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 143 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty* 144 // CHECK1-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 0 145 // CHECK1-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 1 146 // CHECK1-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 2 147 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 148 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] 149 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 150 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 151 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 152 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 153 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] 154 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 155 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 156 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 157 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 158 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 159 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] 160 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 161 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* 162 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] 163 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 164 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] 165 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 166 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 167 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 168 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 169 // CHECK1: cond.true: 170 // CHECK1-NEXT: br label [[COND_END:%.*]] 171 // CHECK1: cond.false: 172 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 173 // CHECK1-NEXT: br label [[COND_END]] 174 // CHECK1: cond.end: 175 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 176 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 177 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 178 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 179 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 180 // CHECK1: omp.inner.for.cond: 181 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 182 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 183 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 184 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 185 // CHECK1: omp.inner.for.cond.cleanup: 186 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 187 // CHECK1: omp.inner.for.body: 188 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 189 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 190 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 191 // CHECK1-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] 192 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast float* [[REF_TMP]] to i8* 193 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] 194 // CHECK1-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16:![0-9]+]] 195 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast float* [[REF_TMP2]] to i8* 196 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] 197 // CHECK1-NEXT: store float 0.000000e+00, float* [[REF_TMP2]], align 4, !tbaa [[TBAA16]] 198 // CHECK1-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP2]]) #[[ATTR7:[0-9]+]] 199 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast float* [[REF_TMP2]] to i8* 200 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP21]]) #[[ATTR5]] 201 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* 202 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] 203 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 204 // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 205 // CHECK1-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 4, !tbaa [[TBAA6]] 206 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 207 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 208 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 209 // CHECK1-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] 210 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 211 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* 212 // CHECK1-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] 213 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 214 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* 215 // CHECK1-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] 216 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 217 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM]] to i8* 218 // CHECK1-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] 219 // CHECK1-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 220 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex"*)* @__omp_outlined__1 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*), i8** [[TMP31]], i64 3) 221 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 222 // CHECK1: omp.body.continue: 223 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 224 // CHECK1: omp.inner.for.inc: 225 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 226 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 227 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 228 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 229 // CHECK1: omp.inner.for.end: 230 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 231 // CHECK1: omp.loop.exit: 232 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 233 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* 234 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] 235 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 236 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] 237 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 238 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] 239 // CHECK1-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 240 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] 241 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 242 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] 243 // CHECK1-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 244 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] 245 // CHECK1-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12]] 246 // CHECK1-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) 247 // CHECK1-NEXT: ret void 248 // 249 // 250 // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC1ERKfS2_ 251 // CHECK1-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat align 2 { 252 // CHECK1-NEXT: entry: 253 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 254 // CHECK1-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 255 // CHECK1-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 256 // CHECK1-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 257 // CHECK1-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 258 // CHECK1-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 259 // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 260 // CHECK1-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8 261 // CHECK1-NEXT: [[TMP1:%.*]] = load float*, float** [[__IM_ADDR]], align 8 262 // CHECK1-NEXT: call void @_ZNSt7complexIfEC2ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS1]], float* nonnull align 4 dereferenceable(4) [[TMP0]], float* nonnull align 4 dereferenceable(4) [[TMP1]]) #[[ATTR7]] 263 // CHECK1-NEXT: ret void 264 // 265 // 266 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1 267 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { 268 // CHECK1-NEXT: entry: 269 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 270 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 271 // CHECK1-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 272 // CHECK1-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 273 // CHECK1-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 274 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 275 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 276 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 277 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 278 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 279 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 280 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 281 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 282 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 283 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 284 // CHECK1-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex", align 4 285 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 286 // CHECK1-NEXT: [[REF_TMP6:%.*]] = alloca float, align 4 287 // CHECK1-NEXT: [[I7:%.*]] = alloca i32, align 4 288 // CHECK1-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex", align 4 289 // CHECK1-NEXT: [[REF_TMP15:%.*]] = alloca float, align 4 290 // CHECK1-NEXT: [[REF_TMP16:%.*]] = alloca float, align 4 291 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 292 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] 293 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 294 // CHECK1-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 295 // CHECK1-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 296 // CHECK1-NEXT: store %"class.std::complex"* [[PARTIAL_SUM]], %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 297 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 298 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 299 // CHECK1-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 300 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 301 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] 302 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 303 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] 304 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] 305 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 306 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 307 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 308 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] 309 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 310 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 311 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 312 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 313 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 314 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] 315 // CHECK1-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 316 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 317 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 318 // CHECK1-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 319 // CHECK1-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 320 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* 321 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] 322 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 323 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] 324 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* 325 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] 326 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 327 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 328 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] 329 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 330 // CHECK1: omp.precond.then: 331 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 332 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] 333 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 334 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 335 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] 336 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 337 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 338 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 339 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] 340 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 341 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 342 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] 343 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 344 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* 345 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] 346 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* 347 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] 348 // CHECK1-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16]] 349 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast float* [[REF_TMP6]] to i8* 350 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP23]]) #[[ATTR5]] 351 // CHECK1-NEXT: store float 0.000000e+00, float* [[REF_TMP6]], align 4, !tbaa [[TBAA16]] 352 // CHECK1-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP6]]) #[[ATTR7]] 353 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast float* [[REF_TMP6]] to i8* 354 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP24]]) #[[ATTR5]] 355 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast float* [[REF_TMP]] to i8* 356 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP25]]) #[[ATTR5]] 357 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* 358 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] 359 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 360 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] 361 // CHECK1-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 362 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 363 // CHECK1: omp.dispatch.cond: 364 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 365 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 366 // CHECK1-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] 367 // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 368 // CHECK1: cond.true: 369 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 370 // CHECK1-NEXT: br label [[COND_END:%.*]] 371 // CHECK1: cond.false: 372 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 373 // CHECK1-NEXT: br label [[COND_END]] 374 // CHECK1: cond.end: 375 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] 376 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 377 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 378 // CHECK1-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 379 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 380 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 381 // CHECK1-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 382 // CHECK1-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] 383 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] 384 // CHECK1: omp.dispatch.cleanup: 385 // CHECK1-NEXT: br label [[OMP_DISPATCH_END:%.*]] 386 // CHECK1: omp.dispatch.body: 387 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 388 // CHECK1: omp.inner.for.cond: 389 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 390 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 391 // CHECK1-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 392 // CHECK1-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] 393 // CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 394 // CHECK1: omp.inner.for.cond.cleanup: 395 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 396 // CHECK1: omp.inner.for.body: 397 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 398 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 399 // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 400 // CHECK1-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] 401 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] 402 // CHECK1-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* 403 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP40]]) #[[ATTR5]] 404 // CHECK1-NEXT: [[TMP41:%.*]] = bitcast float* [[REF_TMP15]] to i8* 405 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP41]]) #[[ATTR5]] 406 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 407 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to float 408 // CHECK1-NEXT: store float [[CONV]], float* [[REF_TMP15]], align 4, !tbaa [[TBAA16]] 409 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast float* [[REF_TMP16]] to i8* 410 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP43]]) #[[ATTR5]] 411 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 412 // CHECK1-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to float 413 // CHECK1-NEXT: store float [[CONV17]], float* [[REF_TMP16]], align 4, !tbaa [[TBAA16]] 414 // CHECK1-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[REF_TMP14]], float* nonnull align 4 dereferenceable(4) [[REF_TMP15]], float* nonnull align 4 dereferenceable(4) [[REF_TMP16]]) #[[ATTR7]] 415 // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[REF_TMP14]]) #[[ATTR7]] 416 // CHECK1-NEXT: [[TMP45:%.*]] = bitcast float* [[REF_TMP16]] to i8* 417 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP45]]) #[[ATTR5]] 418 // CHECK1-NEXT: [[TMP46:%.*]] = bitcast float* [[REF_TMP15]] to i8* 419 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP46]]) #[[ATTR5]] 420 // CHECK1-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* 421 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP47]]) #[[ATTR5]] 422 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 423 // CHECK1: omp.body.continue: 424 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 425 // CHECK1: omp.inner.for.inc: 426 // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 427 // CHECK1-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 428 // CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 429 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 430 // CHECK1: omp.inner.for.end: 431 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 432 // CHECK1: omp.dispatch.inc: 433 // CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 434 // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 435 // CHECK1-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] 436 // CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 437 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 438 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 439 // CHECK1-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] 440 // CHECK1-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 441 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 442 // CHECK1: omp.dispatch.end: 443 // CHECK1-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 444 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] 445 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) 446 // CHECK1-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 447 // CHECK1-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] 448 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 449 // CHECK1-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* 450 // CHECK1-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 451 // CHECK1-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 452 // CHECK1-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func) 453 // CHECK1-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 454 // CHECK1-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] 455 // CHECK1: .omp.reduction.then: 456 // CHECK1-NEXT: [[CALL21:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP2]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]]) #[[ATTR7]] 457 // CHECK1-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) 458 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DONE]] 459 // CHECK1: .omp.reduction.done: 460 // CHECK1-NEXT: [[TMP62:%.*]] = bitcast i32* [[I7]] to i8* 461 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP62]]) #[[ATTR5]] 462 // CHECK1-NEXT: [[TMP63:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* 463 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP63]]) #[[ATTR5]] 464 // CHECK1-NEXT: [[TMP64:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 465 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP64]]) #[[ATTR5]] 466 // CHECK1-NEXT: [[TMP65:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 467 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP65]]) #[[ATTR5]] 468 // CHECK1-NEXT: [[TMP66:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 469 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP66]]) #[[ATTR5]] 470 // CHECK1-NEXT: [[TMP67:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 471 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP67]]) #[[ATTR5]] 472 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 473 // CHECK1: omp.precond.end: 474 // CHECK1-NEXT: [[TMP68:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 475 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP68]]) #[[ATTR5]] 476 // CHECK1-NEXT: [[TMP69:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 477 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP69]]) #[[ATTR5]] 478 // CHECK1-NEXT: [[TMP70:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 479 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] 480 // CHECK1-NEXT: [[TMP71:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 481 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP71]]) #[[ATTR5]] 482 // CHECK1-NEXT: ret void 483 // 484 // 485 // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIfEpLIfEERS0_RKS_IT_E 486 // CHECK1-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[__C:%.*]]) #[[ATTR4:[0-9]+]] comdat align 2 { 487 // CHECK1-NEXT: entry: 488 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 489 // CHECK1-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 490 // CHECK1-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 491 // CHECK1-NEXT: store %"class.std::complex"* [[__C]], %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 492 // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 493 // CHECK1-NEXT: [[TMP0:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 494 // CHECK1-NEXT: [[CALL:%.*]] = call float @_ZNKSt7complexIfE4realEv(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP0]]) #[[ATTR7]] 495 // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 496 // CHECK1-NEXT: [[TMP1:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA18:![0-9]+]] 497 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CALL]] 498 // CHECK1-NEXT: store float [[ADD]], float* [[__RE_]], align 4, !tbaa [[TBAA18]] 499 // CHECK1-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 500 // CHECK1-NEXT: [[CALL2:%.*]] = call float @_ZNKSt7complexIfE4imagEv(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP2]]) #[[ATTR7]] 501 // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 502 // CHECK1-NEXT: [[TMP3:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA20:![0-9]+]] 503 // CHECK1-NEXT: [[ADD3:%.*]] = fadd float [[TMP3]], [[CALL2]] 504 // CHECK1-NEXT: store float [[ADD3]], float* [[__IM_]], align 4, !tbaa [[TBAA20]] 505 // CHECK1-NEXT: ret %"class.std::complex"* [[THIS1]] 506 // 507 // 508 // CHECK1-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func 509 // CHECK1-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { 510 // CHECK1-NEXT: entry: 511 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 512 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 513 // CHECK1-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 514 // CHECK1-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 515 // CHECK1-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 516 // CHECK1-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex", align 4 517 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 518 // CHECK1-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 519 // CHECK1-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 520 // CHECK1-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 521 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 522 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 523 // CHECK1-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 524 // CHECK1-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 525 // CHECK1-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 526 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 527 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 528 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 529 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex"* 530 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex", %"class.std::complex"* [[TMP12]], i64 1 531 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex"* [[TMP13]] to i8* 532 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i64* 533 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* 534 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 4 535 // CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 536 // CHECK1-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 537 // CHECK1-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]]) 538 // CHECK1-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 4 539 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr i64, i64* [[TMP15]], i64 1 540 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP16]], i64 1 541 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* 542 // CHECK1-NEXT: store i8* [[TMP22]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] 543 // CHECK1-NEXT: [[TMP23:%.*]] = icmp eq i16 [[TMP8]], 0 544 // CHECK1-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 1 545 // CHECK1-NEXT: [[TMP25:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] 546 // CHECK1-NEXT: [[TMP26:%.*]] = and i1 [[TMP24]], [[TMP25]] 547 // CHECK1-NEXT: [[TMP27:%.*]] = icmp eq i16 [[TMP8]], 2 548 // CHECK1-NEXT: [[TMP28:%.*]] = and i16 [[TMP6]], 1 549 // CHECK1-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP28]], 0 550 // CHECK1-NEXT: [[TMP30:%.*]] = and i1 [[TMP27]], [[TMP29]] 551 // CHECK1-NEXT: [[TMP31:%.*]] = icmp sgt i16 [[TMP7]], 0 552 // CHECK1-NEXT: [[TMP32:%.*]] = and i1 [[TMP30]], [[TMP31]] 553 // CHECK1-NEXT: [[TMP33:%.*]] = or i1 [[TMP23]], [[TMP26]] 554 // CHECK1-NEXT: [[TMP34:%.*]] = or i1 [[TMP33]], [[TMP32]] 555 // CHECK1-NEXT: br i1 [[TMP34]], label [[THEN:%.*]], label [[ELSE:%.*]] 556 // CHECK1: then: 557 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* 558 // CHECK1-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* 559 // CHECK1-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP35]], i8* [[TMP36]]) #[[ATTR5]] 560 // CHECK1-NEXT: br label [[IFCONT:%.*]] 561 // CHECK1: else: 562 // CHECK1-NEXT: br label [[IFCONT]] 563 // CHECK1: ifcont: 564 // CHECK1-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1 565 // CHECK1-NEXT: [[TMP38:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] 566 // CHECK1-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]] 567 // CHECK1-NEXT: br i1 [[TMP39]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 568 // CHECK1: then4: 569 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 570 // CHECK1-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP40]], align 8 571 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 572 // CHECK1-NEXT: [[TMP43:%.*]] = load i8*, i8** [[TMP42]], align 8 573 // CHECK1-NEXT: [[TMP44:%.*]] = bitcast i8* [[TMP41]] to %"class.std::complex"* 574 // CHECK1-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP43]] to %"class.std::complex"* 575 // CHECK1-NEXT: [[TMP46:%.*]] = bitcast %"class.std::complex"* [[TMP45]] to i8* 576 // CHECK1-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[TMP44]] to i8* 577 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP46]], i8* align 4 [[TMP47]], i64 8, i1 false), !tbaa.struct !21 578 // CHECK1-NEXT: br label [[IFCONT6:%.*]] 579 // CHECK1: else5: 580 // CHECK1-NEXT: br label [[IFCONT6]] 581 // CHECK1: ifcont6: 582 // CHECK1-NEXT: ret void 583 // 584 // 585 // CHECK1-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func 586 // CHECK1-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 587 // CHECK1-NEXT: entry: 588 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 589 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 590 // CHECK1-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 591 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 592 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 593 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 594 // CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 595 // CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 596 // CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 597 // CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 598 // CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 599 // CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 600 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* 601 // CHECK1-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 602 // CHECK1-NEXT: br label [[PRECOND:%.*]] 603 // CHECK1: precond: 604 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 605 // CHECK1-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 2 606 // CHECK1-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] 607 // CHECK1: body: 608 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP2]]) 609 // CHECK1-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 610 // CHECK1-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] 611 // CHECK1: then: 612 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 613 // CHECK1-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] 614 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* 615 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] 616 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] 617 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 618 // CHECK1-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 619 // CHECK1-NEXT: br label [[IFCONT:%.*]] 620 // CHECK1: else: 621 // CHECK1-NEXT: br label [[IFCONT]] 622 // CHECK1: ifcont: 623 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) 624 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 625 // CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] 626 // CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 627 // CHECK1: then4: 628 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] 629 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 630 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] 631 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 632 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] 633 // CHECK1-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] 634 // CHECK1-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] 635 // CHECK1-NEXT: br label [[IFCONT6:%.*]] 636 // CHECK1: else5: 637 // CHECK1-NEXT: br label [[IFCONT6]] 638 // CHECK1: ifcont6: 639 // CHECK1-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 640 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 641 // CHECK1-NEXT: br label [[PRECOND]] 642 // CHECK1: exit: 643 // CHECK1-NEXT: ret void 644 // 645 // 646 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper 647 // CHECK1-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 648 // CHECK1-NEXT: entry: 649 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 650 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 651 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 652 // CHECK1-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 653 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 654 // CHECK1-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] 655 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 656 // CHECK1-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) 657 // CHECK1-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 658 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 659 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 660 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] 661 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 662 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** 663 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] 664 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 665 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex"** 666 // CHECK1-NEXT: [[TMP11:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[TMP10]], align 8, !tbaa [[TBAA10]] 667 // CHECK1-NEXT: call void @__omp_outlined__1(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex"* [[TMP11]]) #[[ATTR5]] 668 // CHECK1-NEXT: ret void 669 // 670 // 671 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker 672 // CHECK1-SAME: () #[[ATTR0]] { 673 // CHECK1-NEXT: entry: 674 // CHECK1-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 675 // CHECK1-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 676 // CHECK1-NEXT: store i8* null, i8** [[WORK_FN]], align 8 677 // CHECK1-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 678 // CHECK1-NEXT: br label [[DOTAWAIT_WORK:%.*]] 679 // CHECK1: .await.work: 680 // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 681 // CHECK1-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) 682 // CHECK1-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 683 // CHECK1-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 684 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 685 // CHECK1-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null 686 // CHECK1-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] 687 // CHECK1: .select.workers: 688 // CHECK1-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 689 // CHECK1-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 690 // CHECK1-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] 691 // CHECK1: .execute.parallel: 692 // CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 693 // CHECK1-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 694 // CHECK1-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*) 695 // CHECK1-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] 696 // CHECK1: .execute.fn: 697 // CHECK1-NEXT: call void @__omp_outlined__5_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5]] 698 // CHECK1-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] 699 // CHECK1: .check.next: 700 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* 701 // CHECK1-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) 702 // CHECK1-NEXT: br label [[DOTTERMINATE_PARALLEL]] 703 // CHECK1: .terminate.parallel: 704 // CHECK1-NEXT: call void @__kmpc_kernel_end_parallel() 705 // CHECK1-NEXT: br label [[DOTBARRIER_PARALLEL]] 706 // CHECK1: .barrier.parallel: 707 // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 708 // CHECK1-NEXT: br label [[DOTAWAIT_WORK]] 709 // CHECK1: .exit: 710 // CHECK1-NEXT: ret void 711 // 712 // 713 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19 714 // CHECK1-SAME: () #[[ATTR0]] { 715 // CHECK1-NEXT: entry: 716 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 717 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 718 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 719 // CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 720 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 721 // CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 722 // CHECK1-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] 723 // CHECK1-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] 724 // CHECK1-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] 725 // CHECK1: .worker: 726 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker() #[[ATTR5]] 727 // CHECK1-NEXT: br label [[DOTEXIT:%.*]] 728 // CHECK1: .mastercheck: 729 // CHECK1-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 730 // CHECK1-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 731 // CHECK1-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 732 // CHECK1-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 733 // CHECK1-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 734 // CHECK1-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 735 // CHECK1-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] 736 // CHECK1-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] 737 // CHECK1-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] 738 // CHECK1: .master: 739 // CHECK1-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 740 // CHECK1-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 741 // CHECK1-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] 742 // CHECK1-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) 743 // CHECK1-NEXT: call void @__kmpc_data_sharing_init_stack() 744 // CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 745 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6]] 746 // CHECK1-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] 747 // CHECK1-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] 748 // CHECK1: .termination.notifier: 749 // CHECK1-NEXT: call void @__kmpc_kernel_deinit(i16 1) 750 // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 751 // CHECK1-NEXT: br label [[DOTEXIT]] 752 // CHECK1: .exit: 753 // CHECK1-NEXT: ret void 754 // 755 // 756 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__2 757 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 758 // CHECK1-NEXT: entry: 759 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 760 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 761 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 762 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 763 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 764 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 765 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 766 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 767 // CHECK1-NEXT: [[IB:%.*]] = alloca i32, align 4 768 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 769 // CHECK1-NEXT: [[REF_TMP2:%.*]] = alloca double, align 8 770 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 771 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] 772 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 773 // CHECK1-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] 774 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size4", align 8, !tbaa [[TBAA14]] 775 // CHECK1-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 776 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 777 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 778 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty.0* 779 // CHECK1-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0:%.*]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 1 780 // CHECK1-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 2 781 // CHECK1-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 0 782 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 783 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] 784 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 785 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 786 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 787 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 788 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] 789 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 790 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 791 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 792 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 793 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 794 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] 795 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 796 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* 797 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] 798 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 799 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] 800 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 801 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 802 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 803 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 804 // CHECK1: cond.true: 805 // CHECK1-NEXT: br label [[COND_END:%.*]] 806 // CHECK1: cond.false: 807 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 808 // CHECK1-NEXT: br label [[COND_END]] 809 // CHECK1: cond.end: 810 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 811 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 812 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 813 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 814 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 815 // CHECK1: omp.inner.for.cond: 816 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 817 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 818 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 819 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 820 // CHECK1: omp.inner.for.cond.cleanup: 821 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 822 // CHECK1: omp.inner.for.body: 823 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 824 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 825 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 826 // CHECK1-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] 827 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast double* [[REF_TMP]] to i8* 828 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP19]]) #[[ATTR5]] 829 // CHECK1-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22:![0-9]+]] 830 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast double* [[REF_TMP2]] to i8* 831 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP20]]) #[[ATTR5]] 832 // CHECK1-NEXT: store double 0.000000e+00, double* [[REF_TMP2]], align 8, !tbaa [[TBAA22]] 833 // CHECK1-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP2]]) #[[ATTR7]] 834 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast double* [[REF_TMP2]] to i8* 835 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] 836 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* 837 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] 838 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 839 // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 840 // CHECK1-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 8, !tbaa [[TBAA6]] 841 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 842 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 843 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 844 // CHECK1-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] 845 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 846 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* 847 // CHECK1-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] 848 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 849 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* 850 // CHECK1-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] 851 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 852 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM]] to i8* 853 // CHECK1-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] 854 // CHECK1-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 855 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex.1"*)* @__omp_outlined__5 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** [[TMP31]], i64 3) 856 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 857 // CHECK1: omp.body.continue: 858 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 859 // CHECK1: omp.inner.for.inc: 860 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 861 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 862 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 863 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 864 // CHECK1: omp.inner.for.end: 865 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 866 // CHECK1: omp.loop.exit: 867 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 868 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* 869 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] 870 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 871 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] 872 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 873 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] 874 // CHECK1-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 875 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] 876 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 877 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] 878 // CHECK1-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 879 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] 880 // CHECK1-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] 881 // CHECK1-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) 882 // CHECK1-NEXT: ret void 883 // 884 // 885 // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC1ERKdS2_ 886 // CHECK1-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 887 // CHECK1-NEXT: entry: 888 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 889 // CHECK1-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 890 // CHECK1-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 891 // CHECK1-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 892 // CHECK1-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 893 // CHECK1-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 894 // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 895 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8 896 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[__IM_ADDR]], align 8 897 // CHECK1-NEXT: call void @_ZNSt7complexIdEC2ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS1]], double* nonnull align 8 dereferenceable(8) [[TMP0]], double* nonnull align 8 dereferenceable(8) [[TMP1]]) #[[ATTR7]] 898 // CHECK1-NEXT: ret void 899 // 900 // 901 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__5 902 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { 903 // CHECK1-NEXT: entry: 904 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 905 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 906 // CHECK1-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 907 // CHECK1-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 908 // CHECK1-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 909 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 910 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 911 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 912 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 913 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 914 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 915 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 916 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 917 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 918 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 919 // CHECK1-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex.1", align 8 920 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 921 // CHECK1-NEXT: [[REF_TMP6:%.*]] = alloca double, align 8 922 // CHECK1-NEXT: [[I7:%.*]] = alloca i32, align 4 923 // CHECK1-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex.1", align 8 924 // CHECK1-NEXT: [[REF_TMP15:%.*]] = alloca double, align 8 925 // CHECK1-NEXT: [[REF_TMP16:%.*]] = alloca double, align 8 926 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 927 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] 928 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 929 // CHECK1-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 930 // CHECK1-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 931 // CHECK1-NEXT: store %"class.std::complex.1"* [[PARTIAL_SUM]], %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 932 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 933 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 934 // CHECK1-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 935 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 936 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] 937 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 938 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] 939 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] 940 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 941 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 942 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 943 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] 944 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 945 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 946 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 947 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 948 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 949 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] 950 // CHECK1-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 951 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 952 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 953 // CHECK1-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 954 // CHECK1-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 955 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* 956 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] 957 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 958 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] 959 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* 960 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] 961 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 962 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 963 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] 964 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 965 // CHECK1: omp.precond.then: 966 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 967 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] 968 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 969 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 970 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] 971 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 972 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 973 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 974 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] 975 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 976 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 977 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] 978 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 979 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* 980 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP21]]) #[[ATTR5]] 981 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* 982 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] 983 // CHECK1-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22]] 984 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast double* [[REF_TMP6]] to i8* 985 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP23]]) #[[ATTR5]] 986 // CHECK1-NEXT: store double 0.000000e+00, double* [[REF_TMP6]], align 8, !tbaa [[TBAA22]] 987 // CHECK1-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP6]]) #[[ATTR7]] 988 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast double* [[REF_TMP6]] to i8* 989 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP24]]) #[[ATTR5]] 990 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast double* [[REF_TMP]] to i8* 991 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP25]]) #[[ATTR5]] 992 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* 993 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] 994 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 995 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] 996 // CHECK1-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 997 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 998 // CHECK1: omp.dispatch.cond: 999 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1000 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 1001 // CHECK1-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] 1002 // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1003 // CHECK1: cond.true: 1004 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 1005 // CHECK1-NEXT: br label [[COND_END:%.*]] 1006 // CHECK1: cond.false: 1007 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1008 // CHECK1-NEXT: br label [[COND_END]] 1009 // CHECK1: cond.end: 1010 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] 1011 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1012 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 1013 // CHECK1-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1014 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1015 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1016 // CHECK1-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 1017 // CHECK1-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] 1018 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] 1019 // CHECK1: omp.dispatch.cleanup: 1020 // CHECK1-NEXT: br label [[OMP_DISPATCH_END:%.*]] 1021 // CHECK1: omp.dispatch.body: 1022 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1023 // CHECK1: omp.inner.for.cond: 1024 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1025 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1026 // CHECK1-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 1027 // CHECK1-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] 1028 // CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1029 // CHECK1: omp.inner.for.cond.cleanup: 1030 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1031 // CHECK1: omp.inner.for.body: 1032 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 1033 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1034 // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 1035 // CHECK1-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] 1036 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] 1037 // CHECK1-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* 1038 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP40]]) #[[ATTR5]] 1039 // CHECK1-NEXT: [[TMP41:%.*]] = bitcast double* [[REF_TMP15]] to i8* 1040 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP41]]) #[[ATTR5]] 1041 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 1042 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to double 1043 // CHECK1-NEXT: store double [[CONV]], double* [[REF_TMP15]], align 8, !tbaa [[TBAA22]] 1044 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast double* [[REF_TMP16]] to i8* 1045 // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP43]]) #[[ATTR5]] 1046 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 1047 // CHECK1-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to double 1048 // CHECK1-NEXT: store double [[CONV17]], double* [[REF_TMP16]], align 8, !tbaa [[TBAA22]] 1049 // CHECK1-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[REF_TMP14]], double* nonnull align 8 dereferenceable(8) [[REF_TMP15]], double* nonnull align 8 dereferenceable(8) [[REF_TMP16]]) #[[ATTR7]] 1050 // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[REF_TMP14]]) #[[ATTR7]] 1051 // CHECK1-NEXT: [[TMP45:%.*]] = bitcast double* [[REF_TMP16]] to i8* 1052 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP45]]) #[[ATTR5]] 1053 // CHECK1-NEXT: [[TMP46:%.*]] = bitcast double* [[REF_TMP15]] to i8* 1054 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP46]]) #[[ATTR5]] 1055 // CHECK1-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* 1056 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP47]]) #[[ATTR5]] 1057 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1058 // CHECK1: omp.body.continue: 1059 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1060 // CHECK1: omp.inner.for.inc: 1061 // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1062 // CHECK1-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 1063 // CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1064 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1065 // CHECK1: omp.inner.for.end: 1066 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1067 // CHECK1: omp.dispatch.inc: 1068 // CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 1069 // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 1070 // CHECK1-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] 1071 // CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 1072 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1073 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 1074 // CHECK1-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] 1075 // CHECK1-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1076 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 1077 // CHECK1: omp.dispatch.end: 1078 // CHECK1-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1079 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] 1080 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) 1081 // CHECK1-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1082 // CHECK1-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] 1083 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1084 // CHECK1-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* 1085 // CHECK1-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 1086 // CHECK1-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1087 // CHECK1-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func7, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func8) 1088 // CHECK1-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 1089 // CHECK1-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] 1090 // CHECK1: .omp.reduction.then: 1091 // CHECK1-NEXT: [[CALL21:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP2]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]]) #[[ATTR7]] 1092 // CHECK1-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) 1093 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DONE]] 1094 // CHECK1: .omp.reduction.done: 1095 // CHECK1-NEXT: [[TMP62:%.*]] = bitcast i32* [[I7]] to i8* 1096 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP62]]) #[[ATTR5]] 1097 // CHECK1-NEXT: [[TMP63:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* 1098 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP63]]) #[[ATTR5]] 1099 // CHECK1-NEXT: [[TMP64:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 1100 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP64]]) #[[ATTR5]] 1101 // CHECK1-NEXT: [[TMP65:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 1102 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP65]]) #[[ATTR5]] 1103 // CHECK1-NEXT: [[TMP66:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 1104 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP66]]) #[[ATTR5]] 1105 // CHECK1-NEXT: [[TMP67:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 1106 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP67]]) #[[ATTR5]] 1107 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1108 // CHECK1: omp.precond.end: 1109 // CHECK1-NEXT: [[TMP68:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 1110 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP68]]) #[[ATTR5]] 1111 // CHECK1-NEXT: [[TMP69:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 1112 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP69]]) #[[ATTR5]] 1113 // CHECK1-NEXT: [[TMP70:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 1114 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] 1115 // CHECK1-NEXT: [[TMP71:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 1116 // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP71]]) #[[ATTR5]] 1117 // CHECK1-NEXT: ret void 1118 // 1119 // 1120 // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIdEpLIdEERS0_RKS_IT_E 1121 // CHECK1-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__C:%.*]]) #[[ATTR4]] comdat align 2 { 1122 // CHECK1-NEXT: entry: 1123 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 1124 // CHECK1-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 1125 // CHECK1-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 1126 // CHECK1-NEXT: store %"class.std::complex.1"* [[__C]], %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 1127 // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 1128 // CHECK1-NEXT: [[TMP0:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 1129 // CHECK1-NEXT: [[CALL:%.*]] = call double @_ZNKSt7complexIdE4realEv(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP0]]) #[[ATTR7]] 1130 // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 1131 // CHECK1-NEXT: [[TMP1:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA24:![0-9]+]] 1132 // CHECK1-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[CALL]] 1133 // CHECK1-NEXT: store double [[ADD]], double* [[__RE_]], align 8, !tbaa [[TBAA24]] 1134 // CHECK1-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 1135 // CHECK1-NEXT: [[CALL2:%.*]] = call double @_ZNKSt7complexIdE4imagEv(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP2]]) #[[ATTR7]] 1136 // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 1137 // CHECK1-NEXT: [[TMP3:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA26:![0-9]+]] 1138 // CHECK1-NEXT: [[ADD3:%.*]] = fadd double [[TMP3]], [[CALL2]] 1139 // CHECK1-NEXT: store double [[ADD3]], double* [[__IM_]], align 8, !tbaa [[TBAA26]] 1140 // CHECK1-NEXT: ret %"class.std::complex.1"* [[THIS1]] 1141 // 1142 // 1143 // CHECK1-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func7 1144 // CHECK1-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { 1145 // CHECK1-NEXT: entry: 1146 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1147 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 1148 // CHECK1-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 1149 // CHECK1-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 1150 // CHECK1-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 1151 // CHECK1-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex.1", align 8 1152 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 1153 // CHECK1-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 1154 // CHECK1-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 1155 // CHECK1-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 1156 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 1157 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1158 // CHECK1-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 1159 // CHECK1-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 1160 // CHECK1-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 1161 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1162 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1163 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 1164 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex.1"* 1165 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex.1", %"class.std::complex.1"* [[TMP12]], i64 1 1166 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex.1"* [[TMP13]] to i8* 1167 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex.1"* [[TMP12]] to i64* 1168 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* 1169 // CHECK1-NEXT: br label [[DOTSHUFFLE_PRE_COND:%.*]] 1170 // CHECK1: .shuffle.pre_cond: 1171 // CHECK1-NEXT: [[TMP17:%.*]] = phi i64* [ [[TMP15]], [[ENTRY:%.*]] ], [ [[TMP28:%.*]], [[DOTSHUFFLE_THEN:%.*]] ] 1172 // CHECK1-NEXT: [[TMP18:%.*]] = phi i64* [ [[TMP16]], [[ENTRY]] ], [ [[TMP29:%.*]], [[DOTSHUFFLE_THEN]] ] 1173 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i64* [[TMP17]] to i8* 1174 // CHECK1-NEXT: [[TMP20:%.*]] = ptrtoint i8* [[TMP14]] to i64 1175 // CHECK1-NEXT: [[TMP21:%.*]] = ptrtoint i8* [[TMP19]] to i64 1176 // CHECK1-NEXT: [[TMP22:%.*]] = sub i64 [[TMP20]], [[TMP21]] 1177 // CHECK1-NEXT: [[TMP23:%.*]] = sdiv exact i64 [[TMP22]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64) 1178 // CHECK1-NEXT: [[TMP24:%.*]] = icmp sgt i64 [[TMP23]], 7 1179 // CHECK1-NEXT: br i1 [[TMP24]], label [[DOTSHUFFLE_THEN]], label [[DOTSHUFFLE_EXIT:%.*]] 1180 // CHECK1: .shuffle.then: 1181 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP17]], align 8 1182 // CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 1183 // CHECK1-NEXT: [[TMP26:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 1184 // CHECK1-NEXT: [[TMP27:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP25]], i16 [[TMP7]], i16 [[TMP26]]) 1185 // CHECK1-NEXT: store i64 [[TMP27]], i64* [[TMP18]], align 8 1186 // CHECK1-NEXT: [[TMP28]] = getelementptr i64, i64* [[TMP17]], i64 1 1187 // CHECK1-NEXT: [[TMP29]] = getelementptr i64, i64* [[TMP18]], i64 1 1188 // CHECK1-NEXT: br label [[DOTSHUFFLE_PRE_COND]] 1189 // CHECK1: .shuffle.exit: 1190 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* 1191 // CHECK1-NEXT: store i8* [[TMP30]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] 1192 // CHECK1-NEXT: [[TMP31:%.*]] = icmp eq i16 [[TMP8]], 0 1193 // CHECK1-NEXT: [[TMP32:%.*]] = icmp eq i16 [[TMP8]], 1 1194 // CHECK1-NEXT: [[TMP33:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] 1195 // CHECK1-NEXT: [[TMP34:%.*]] = and i1 [[TMP32]], [[TMP33]] 1196 // CHECK1-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 2 1197 // CHECK1-NEXT: [[TMP36:%.*]] = and i16 [[TMP6]], 1 1198 // CHECK1-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP36]], 0 1199 // CHECK1-NEXT: [[TMP38:%.*]] = and i1 [[TMP35]], [[TMP37]] 1200 // CHECK1-NEXT: [[TMP39:%.*]] = icmp sgt i16 [[TMP7]], 0 1201 // CHECK1-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] 1202 // CHECK1-NEXT: [[TMP41:%.*]] = or i1 [[TMP31]], [[TMP34]] 1203 // CHECK1-NEXT: [[TMP42:%.*]] = or i1 [[TMP41]], [[TMP40]] 1204 // CHECK1-NEXT: br i1 [[TMP42]], label [[THEN:%.*]], label [[ELSE:%.*]] 1205 // CHECK1: then: 1206 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* 1207 // CHECK1-NEXT: [[TMP44:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* 1208 // CHECK1-NEXT: call void @"_omp$reduction$reduction_func6"(i8* [[TMP43]], i8* [[TMP44]]) #[[ATTR5]] 1209 // CHECK1-NEXT: br label [[IFCONT:%.*]] 1210 // CHECK1: else: 1211 // CHECK1-NEXT: br label [[IFCONT]] 1212 // CHECK1: ifcont: 1213 // CHECK1-NEXT: [[TMP45:%.*]] = icmp eq i16 [[TMP8]], 1 1214 // CHECK1-NEXT: [[TMP46:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] 1215 // CHECK1-NEXT: [[TMP47:%.*]] = and i1 [[TMP45]], [[TMP46]] 1216 // CHECK1-NEXT: br i1 [[TMP47]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 1217 // CHECK1: then4: 1218 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 1219 // CHECK1-NEXT: [[TMP49:%.*]] = load i8*, i8** [[TMP48]], align 8 1220 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1221 // CHECK1-NEXT: [[TMP51:%.*]] = load i8*, i8** [[TMP50]], align 8 1222 // CHECK1-NEXT: [[TMP52:%.*]] = bitcast i8* [[TMP49]] to %"class.std::complex.1"* 1223 // CHECK1-NEXT: [[TMP53:%.*]] = bitcast i8* [[TMP51]] to %"class.std::complex.1"* 1224 // CHECK1-NEXT: [[TMP54:%.*]] = bitcast %"class.std::complex.1"* [[TMP53]] to i8* 1225 // CHECK1-NEXT: [[TMP55:%.*]] = bitcast %"class.std::complex.1"* [[TMP52]] to i8* 1226 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP54]], i8* align 8 [[TMP55]], i64 16, i1 false), !tbaa.struct !27 1227 // CHECK1-NEXT: br label [[IFCONT6:%.*]] 1228 // CHECK1: else5: 1229 // CHECK1-NEXT: br label [[IFCONT6]] 1230 // CHECK1: ifcont6: 1231 // CHECK1-NEXT: ret void 1232 // 1233 // 1234 // CHECK1-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func8 1235 // CHECK1-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 1236 // CHECK1-NEXT: entry: 1237 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1238 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 1239 // CHECK1-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 1240 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 1241 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 1242 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 1243 // CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 1244 // CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 1245 // CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 1246 // CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 1247 // CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 1248 // CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1249 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* 1250 // CHECK1-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 1251 // CHECK1-NEXT: br label [[PRECOND:%.*]] 1252 // CHECK1: precond: 1253 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 1254 // CHECK1-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 4 1255 // CHECK1-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] 1256 // CHECK1: body: 1257 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) 1258 // CHECK1-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 1259 // CHECK1-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] 1260 // CHECK1: then: 1261 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 1262 // CHECK1-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] 1263 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* 1264 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] 1265 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] 1266 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 1267 // CHECK1-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 1268 // CHECK1-NEXT: br label [[IFCONT:%.*]] 1269 // CHECK1: else: 1270 // CHECK1-NEXT: br label [[IFCONT]] 1271 // CHECK1: ifcont: 1272 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) 1273 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 1274 // CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] 1275 // CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 1276 // CHECK1: then4: 1277 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] 1278 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 1279 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] 1280 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 1281 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] 1282 // CHECK1-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] 1283 // CHECK1-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] 1284 // CHECK1-NEXT: br label [[IFCONT6:%.*]] 1285 // CHECK1: else5: 1286 // CHECK1-NEXT: br label [[IFCONT6]] 1287 // CHECK1: ifcont6: 1288 // CHECK1-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 1289 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 1290 // CHECK1-NEXT: br label [[PRECOND]] 1291 // CHECK1: exit: 1292 // CHECK1-NEXT: ret void 1293 // 1294 // 1295 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper 1296 // CHECK1-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 1297 // CHECK1-NEXT: entry: 1298 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 1299 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 1300 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 1301 // CHECK1-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 1302 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 1303 // CHECK1-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] 1304 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 1305 // CHECK1-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) 1306 // CHECK1-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 1307 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 1308 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 1309 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] 1310 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 1311 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** 1312 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] 1313 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 1314 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex.1"** 1315 // CHECK1-NEXT: [[TMP11:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[TMP10]], align 8, !tbaa [[TBAA10]] 1316 // CHECK1-NEXT: call void @__omp_outlined__5(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex.1"* [[TMP11]]) #[[ATTR5]] 1317 // CHECK1-NEXT: ret void 1318 // 1319 // 1320 // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC2ERKfS2_ 1321 // CHECK1-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 1322 // CHECK1-NEXT: entry: 1323 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 1324 // CHECK1-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 1325 // CHECK1-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 1326 // CHECK1-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 1327 // CHECK1-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 1328 // CHECK1-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 1329 // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 1330 // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 1331 // CHECK1-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 1332 // CHECK1-NEXT: [[TMP1:%.*]] = load float, float* [[TMP0]], align 4, !tbaa [[TBAA16]] 1333 // CHECK1-NEXT: store float [[TMP1]], float* [[__RE_]], align 4, !tbaa [[TBAA18]] 1334 // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 1335 // CHECK1-NEXT: [[TMP2:%.*]] = load float*, float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 1336 // CHECK1-NEXT: [[TMP3:%.*]] = load float, float* [[TMP2]], align 4, !tbaa [[TBAA16]] 1337 // CHECK1-NEXT: store float [[TMP3]], float* [[__IM_]], align 4, !tbaa [[TBAA20]] 1338 // CHECK1-NEXT: ret void 1339 // 1340 // 1341 // CHECK1-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4realEv 1342 // CHECK1-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 1343 // CHECK1-NEXT: entry: 1344 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 1345 // CHECK1-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 1346 // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 1347 // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 1348 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA18]] 1349 // CHECK1-NEXT: ret float [[TMP0]] 1350 // 1351 // 1352 // CHECK1-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4imagEv 1353 // CHECK1-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 1354 // CHECK1-NEXT: entry: 1355 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 1356 // CHECK1-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 1357 // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 1358 // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 1359 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA20]] 1360 // CHECK1-NEXT: ret float [[TMP0]] 1361 // 1362 // 1363 // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC2ERKdS2_ 1364 // CHECK1-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 1365 // CHECK1-NEXT: entry: 1366 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 1367 // CHECK1-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 1368 // CHECK1-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 1369 // CHECK1-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 1370 // CHECK1-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 1371 // CHECK1-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 1372 // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 1373 // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 1374 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 1375 // CHECK1-NEXT: [[TMP1:%.*]] = load double, double* [[TMP0]], align 8, !tbaa [[TBAA22]] 1376 // CHECK1-NEXT: store double [[TMP1]], double* [[__RE_]], align 8, !tbaa [[TBAA24]] 1377 // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 1378 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 1379 // CHECK1-NEXT: [[TMP3:%.*]] = load double, double* [[TMP2]], align 8, !tbaa [[TBAA22]] 1380 // CHECK1-NEXT: store double [[TMP3]], double* [[__IM_]], align 8, !tbaa [[TBAA26]] 1381 // CHECK1-NEXT: ret void 1382 // 1383 // 1384 // CHECK1-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4realEv 1385 // CHECK1-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 1386 // CHECK1-NEXT: entry: 1387 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 1388 // CHECK1-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 1389 // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 1390 // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 1391 // CHECK1-NEXT: [[TMP0:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA24]] 1392 // CHECK1-NEXT: ret double [[TMP0]] 1393 // 1394 // 1395 // CHECK1-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4imagEv 1396 // CHECK1-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 1397 // CHECK1-NEXT: entry: 1398 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 1399 // CHECK1-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 1400 // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 1401 // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 1402 // CHECK1-NEXT: [[TMP0:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA26]] 1403 // CHECK1-NEXT: ret double [[TMP0]] 1404 // 1405 // 1406 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker 1407 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 1408 // CHECK2-NEXT: entry: 1409 // CHECK2-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 1410 // CHECK2-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 1411 // CHECK2-NEXT: store i8* null, i8** [[WORK_FN]], align 8 1412 // CHECK2-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 1413 // CHECK2-NEXT: br label [[DOTAWAIT_WORK:%.*]] 1414 // CHECK2: .await.work: 1415 // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 1416 // CHECK2-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) 1417 // CHECK2-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 1418 // CHECK2-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 1419 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 1420 // CHECK2-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null 1421 // CHECK2-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] 1422 // CHECK2: .select.workers: 1423 // CHECK2-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 1424 // CHECK2-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 1425 // CHECK2-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] 1426 // CHECK2: .execute.parallel: 1427 // CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 1428 // CHECK2-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 1429 // CHECK2-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*) 1430 // CHECK2-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] 1431 // CHECK2: .execute.fn: 1432 // CHECK2-NEXT: call void @__omp_outlined__1_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5:[0-9]+]] 1433 // CHECK2-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] 1434 // CHECK2: .check.next: 1435 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* 1436 // CHECK2-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) 1437 // CHECK2-NEXT: br label [[DOTTERMINATE_PARALLEL]] 1438 // CHECK2: .terminate.parallel: 1439 // CHECK2-NEXT: call void @__kmpc_kernel_end_parallel() 1440 // CHECK2-NEXT: br label [[DOTBARRIER_PARALLEL]] 1441 // CHECK2: .barrier.parallel: 1442 // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 1443 // CHECK2-NEXT: br label [[DOTAWAIT_WORK]] 1444 // CHECK2: .exit: 1445 // CHECK2-NEXT: ret void 1446 // 1447 // 1448 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19 1449 // CHECK2-SAME: () #[[ATTR0]] { 1450 // CHECK2-NEXT: entry: 1451 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 1452 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1453 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 1454 // CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 1455 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1456 // CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 1457 // CHECK2-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] 1458 // CHECK2-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] 1459 // CHECK2-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] 1460 // CHECK2: .worker: 1461 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker() #[[ATTR5]] 1462 // CHECK2-NEXT: br label [[DOTEXIT:%.*]] 1463 // CHECK2: .mastercheck: 1464 // CHECK2-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 1465 // CHECK2-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1466 // CHECK2-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 1467 // CHECK2-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 1468 // CHECK2-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 1469 // CHECK2-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 1470 // CHECK2-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] 1471 // CHECK2-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] 1472 // CHECK2-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] 1473 // CHECK2: .master: 1474 // CHECK2-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1475 // CHECK2-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 1476 // CHECK2-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] 1477 // CHECK2-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) 1478 // CHECK2-NEXT: call void @__kmpc_data_sharing_init_stack() 1479 // CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 1480 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6:![0-9]+]] 1481 // CHECK2-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] 1482 // CHECK2-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] 1483 // CHECK2: .termination.notifier: 1484 // CHECK2-NEXT: call void @__kmpc_kernel_deinit(i16 1) 1485 // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 1486 // CHECK2-NEXT: br label [[DOTEXIT]] 1487 // CHECK2: .exit: 1488 // CHECK2-NEXT: ret void 1489 // 1490 // 1491 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__ 1492 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 1493 // CHECK2-NEXT: entry: 1494 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1495 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1496 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1497 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1498 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1499 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1500 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1501 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1502 // CHECK2-NEXT: [[IB:%.*]] = alloca i32, align 4 1503 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 1504 // CHECK2-NEXT: [[REF_TMP2:%.*]] = alloca float, align 4 1505 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 1506 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10:![0-9]+]] 1507 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 1508 // CHECK2-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12:![0-9]+]] 1509 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8, !tbaa [[TBAA14:![0-9]+]] 1510 // CHECK2-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 1511 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 1512 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 1513 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty* 1514 // CHECK2-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 0 1515 // CHECK2-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 1 1516 // CHECK2-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 2 1517 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 1518 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] 1519 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 1520 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 1521 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 1522 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 1523 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] 1524 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1525 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 1526 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 1527 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 1528 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 1529 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] 1530 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 1531 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* 1532 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] 1533 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1534 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] 1535 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1536 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1537 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 1538 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1539 // CHECK2: cond.true: 1540 // CHECK2-NEXT: br label [[COND_END:%.*]] 1541 // CHECK2: cond.false: 1542 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1543 // CHECK2-NEXT: br label [[COND_END]] 1544 // CHECK2: cond.end: 1545 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 1546 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1547 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 1548 // CHECK2-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1549 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1550 // CHECK2: omp.inner.for.cond: 1551 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1552 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1553 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 1554 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1555 // CHECK2: omp.inner.for.cond.cleanup: 1556 // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1557 // CHECK2: omp.inner.for.body: 1558 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1559 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1560 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1561 // CHECK2-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] 1562 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast float* [[REF_TMP]] to i8* 1563 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] 1564 // CHECK2-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16:![0-9]+]] 1565 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast float* [[REF_TMP2]] to i8* 1566 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] 1567 // CHECK2-NEXT: store float 0.000000e+00, float* [[REF_TMP2]], align 4, !tbaa [[TBAA16]] 1568 // CHECK2-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP2]]) #[[ATTR7:[0-9]+]] 1569 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast float* [[REF_TMP2]] to i8* 1570 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP21]]) #[[ATTR5]] 1571 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* 1572 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] 1573 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 1574 // CHECK2-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 1575 // CHECK2-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 4, !tbaa [[TBAA6]] 1576 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 1577 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 1578 // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 1579 // CHECK2-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] 1580 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 1581 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* 1582 // CHECK2-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] 1583 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 1584 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* 1585 // CHECK2-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] 1586 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 1587 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM]] to i8* 1588 // CHECK2-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] 1589 // CHECK2-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 1590 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex"*)* @__omp_outlined__1 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*), i8** [[TMP31]], i64 3) 1591 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1592 // CHECK2: omp.body.continue: 1593 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1594 // CHECK2: omp.inner.for.inc: 1595 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1596 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 1597 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1598 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1599 // CHECK2: omp.inner.for.end: 1600 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1601 // CHECK2: omp.loop.exit: 1602 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1603 // CHECK2-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* 1604 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] 1605 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 1606 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] 1607 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 1608 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] 1609 // CHECK2-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 1610 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] 1611 // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 1612 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] 1613 // CHECK2-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 1614 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] 1615 // CHECK2-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12]] 1616 // CHECK2-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) 1617 // CHECK2-NEXT: ret void 1618 // 1619 // 1620 // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC1ERKfS2_ 1621 // CHECK2-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat align 2 { 1622 // CHECK2-NEXT: entry: 1623 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 1624 // CHECK2-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 1625 // CHECK2-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 1626 // CHECK2-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 1627 // CHECK2-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 1628 // CHECK2-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 1629 // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 1630 // CHECK2-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8 1631 // CHECK2-NEXT: [[TMP1:%.*]] = load float*, float** [[__IM_ADDR]], align 8 1632 // CHECK2-NEXT: call void @_ZNSt7complexIfEC2ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS1]], float* nonnull align 4 dereferenceable(4) [[TMP0]], float* nonnull align 4 dereferenceable(4) [[TMP1]]) #[[ATTR7]] 1633 // CHECK2-NEXT: ret void 1634 // 1635 // 1636 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1 1637 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { 1638 // CHECK2-NEXT: entry: 1639 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1640 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1641 // CHECK2-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 1642 // CHECK2-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 1643 // CHECK2-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 1644 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1645 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1646 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1647 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1648 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1649 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1650 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1651 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1652 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1653 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1654 // CHECK2-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex", align 4 1655 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 1656 // CHECK2-NEXT: [[REF_TMP6:%.*]] = alloca float, align 4 1657 // CHECK2-NEXT: [[I7:%.*]] = alloca i32, align 4 1658 // CHECK2-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex", align 4 1659 // CHECK2-NEXT: [[REF_TMP15:%.*]] = alloca float, align 4 1660 // CHECK2-NEXT: [[REF_TMP16:%.*]] = alloca float, align 4 1661 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 1662 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] 1663 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 1664 // CHECK2-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 1665 // CHECK2-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 1666 // CHECK2-NEXT: store %"class.std::complex"* [[PARTIAL_SUM]], %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 1667 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 1668 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 1669 // CHECK2-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 1670 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 1671 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] 1672 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 1673 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] 1674 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] 1675 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 1676 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 1677 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 1678 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] 1679 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 1680 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 1681 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 1682 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 1683 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 1684 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] 1685 // CHECK2-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 1686 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 1687 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 1688 // CHECK2-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 1689 // CHECK2-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 1690 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* 1691 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] 1692 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 1693 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] 1694 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* 1695 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] 1696 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 1697 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 1698 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] 1699 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1700 // CHECK2: omp.precond.then: 1701 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 1702 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] 1703 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 1704 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 1705 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] 1706 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 1707 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1708 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 1709 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] 1710 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 1711 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 1712 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] 1713 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 1714 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* 1715 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] 1716 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* 1717 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] 1718 // CHECK2-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16]] 1719 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast float* [[REF_TMP6]] to i8* 1720 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP23]]) #[[ATTR5]] 1721 // CHECK2-NEXT: store float 0.000000e+00, float* [[REF_TMP6]], align 4, !tbaa [[TBAA16]] 1722 // CHECK2-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP6]]) #[[ATTR7]] 1723 // CHECK2-NEXT: [[TMP24:%.*]] = bitcast float* [[REF_TMP6]] to i8* 1724 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP24]]) #[[ATTR5]] 1725 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast float* [[REF_TMP]] to i8* 1726 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP25]]) #[[ATTR5]] 1727 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* 1728 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] 1729 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1730 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] 1731 // CHECK2-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1732 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1733 // CHECK2: omp.dispatch.cond: 1734 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1735 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 1736 // CHECK2-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] 1737 // CHECK2-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1738 // CHECK2: cond.true: 1739 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 1740 // CHECK2-NEXT: br label [[COND_END:%.*]] 1741 // CHECK2: cond.false: 1742 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1743 // CHECK2-NEXT: br label [[COND_END]] 1744 // CHECK2: cond.end: 1745 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] 1746 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1747 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 1748 // CHECK2-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1749 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1750 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1751 // CHECK2-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 1752 // CHECK2-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] 1753 // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] 1754 // CHECK2: omp.dispatch.cleanup: 1755 // CHECK2-NEXT: br label [[OMP_DISPATCH_END:%.*]] 1756 // CHECK2: omp.dispatch.body: 1757 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1758 // CHECK2: omp.inner.for.cond: 1759 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1760 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1761 // CHECK2-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 1762 // CHECK2-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] 1763 // CHECK2-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1764 // CHECK2: omp.inner.for.cond.cleanup: 1765 // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1766 // CHECK2: omp.inner.for.body: 1767 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 1768 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1769 // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 1770 // CHECK2-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] 1771 // CHECK2-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] 1772 // CHECK2-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* 1773 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP40]]) #[[ATTR5]] 1774 // CHECK2-NEXT: [[TMP41:%.*]] = bitcast float* [[REF_TMP15]] to i8* 1775 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP41]]) #[[ATTR5]] 1776 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 1777 // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to float 1778 // CHECK2-NEXT: store float [[CONV]], float* [[REF_TMP15]], align 4, !tbaa [[TBAA16]] 1779 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast float* [[REF_TMP16]] to i8* 1780 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP43]]) #[[ATTR5]] 1781 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 1782 // CHECK2-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to float 1783 // CHECK2-NEXT: store float [[CONV17]], float* [[REF_TMP16]], align 4, !tbaa [[TBAA16]] 1784 // CHECK2-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[REF_TMP14]], float* nonnull align 4 dereferenceable(4) [[REF_TMP15]], float* nonnull align 4 dereferenceable(4) [[REF_TMP16]]) #[[ATTR7]] 1785 // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[REF_TMP14]]) #[[ATTR7]] 1786 // CHECK2-NEXT: [[TMP45:%.*]] = bitcast float* [[REF_TMP16]] to i8* 1787 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP45]]) #[[ATTR5]] 1788 // CHECK2-NEXT: [[TMP46:%.*]] = bitcast float* [[REF_TMP15]] to i8* 1789 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP46]]) #[[ATTR5]] 1790 // CHECK2-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* 1791 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP47]]) #[[ATTR5]] 1792 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1793 // CHECK2: omp.body.continue: 1794 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1795 // CHECK2: omp.inner.for.inc: 1796 // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1797 // CHECK2-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 1798 // CHECK2-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 1799 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1800 // CHECK2: omp.inner.for.end: 1801 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1802 // CHECK2: omp.dispatch.inc: 1803 // CHECK2-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 1804 // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 1805 // CHECK2-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] 1806 // CHECK2-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 1807 // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1808 // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 1809 // CHECK2-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] 1810 // CHECK2-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 1811 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 1812 // CHECK2: omp.dispatch.end: 1813 // CHECK2-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1814 // CHECK2-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] 1815 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) 1816 // CHECK2-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1817 // CHECK2-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] 1818 // CHECK2-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1819 // CHECK2-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* 1820 // CHECK2-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 1821 // CHECK2-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1822 // CHECK2-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func) 1823 // CHECK2-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 1824 // CHECK2-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] 1825 // CHECK2: .omp.reduction.then: 1826 // CHECK2-NEXT: [[CALL21:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP2]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]]) #[[ATTR7]] 1827 // CHECK2-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) 1828 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DONE]] 1829 // CHECK2: .omp.reduction.done: 1830 // CHECK2-NEXT: [[TMP62:%.*]] = bitcast i32* [[I7]] to i8* 1831 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP62]]) #[[ATTR5]] 1832 // CHECK2-NEXT: [[TMP63:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* 1833 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP63]]) #[[ATTR5]] 1834 // CHECK2-NEXT: [[TMP64:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 1835 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP64]]) #[[ATTR5]] 1836 // CHECK2-NEXT: [[TMP65:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 1837 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP65]]) #[[ATTR5]] 1838 // CHECK2-NEXT: [[TMP66:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 1839 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP66]]) #[[ATTR5]] 1840 // CHECK2-NEXT: [[TMP67:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 1841 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP67]]) #[[ATTR5]] 1842 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1843 // CHECK2: omp.precond.end: 1844 // CHECK2-NEXT: [[TMP68:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 1845 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP68]]) #[[ATTR5]] 1846 // CHECK2-NEXT: [[TMP69:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 1847 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP69]]) #[[ATTR5]] 1848 // CHECK2-NEXT: [[TMP70:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 1849 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] 1850 // CHECK2-NEXT: [[TMP71:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 1851 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP71]]) #[[ATTR5]] 1852 // CHECK2-NEXT: ret void 1853 // 1854 // 1855 // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIfEpLIfEERS0_RKS_IT_E 1856 // CHECK2-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[__C:%.*]]) #[[ATTR4:[0-9]+]] comdat align 2 { 1857 // CHECK2-NEXT: entry: 1858 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 1859 // CHECK2-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 1860 // CHECK2-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 1861 // CHECK2-NEXT: store %"class.std::complex"* [[__C]], %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 1862 // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 1863 // CHECK2-NEXT: [[TMP0:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 1864 // CHECK2-NEXT: [[CALL:%.*]] = call float @_ZNKSt7complexIfE4realEv(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP0]]) #[[ATTR7]] 1865 // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 1866 // CHECK2-NEXT: [[TMP1:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA18:![0-9]+]] 1867 // CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CALL]] 1868 // CHECK2-NEXT: store float [[ADD]], float* [[__RE_]], align 4, !tbaa [[TBAA18]] 1869 // CHECK2-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 1870 // CHECK2-NEXT: [[CALL2:%.*]] = call float @_ZNKSt7complexIfE4imagEv(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP2]]) #[[ATTR7]] 1871 // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 1872 // CHECK2-NEXT: [[TMP3:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA20:![0-9]+]] 1873 // CHECK2-NEXT: [[ADD3:%.*]] = fadd float [[TMP3]], [[CALL2]] 1874 // CHECK2-NEXT: store float [[ADD3]], float* [[__IM_]], align 4, !tbaa [[TBAA20]] 1875 // CHECK2-NEXT: ret %"class.std::complex"* [[THIS1]] 1876 // 1877 // 1878 // CHECK2-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func 1879 // CHECK2-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { 1880 // CHECK2-NEXT: entry: 1881 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1882 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 1883 // CHECK2-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 1884 // CHECK2-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 1885 // CHECK2-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 1886 // CHECK2-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex", align 4 1887 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 1888 // CHECK2-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 1889 // CHECK2-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 1890 // CHECK2-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 1891 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 1892 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1893 // CHECK2-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 1894 // CHECK2-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 1895 // CHECK2-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 1896 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1897 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1898 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 1899 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex"* 1900 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex", %"class.std::complex"* [[TMP12]], i64 1 1901 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex"* [[TMP13]] to i8* 1902 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i64* 1903 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* 1904 // CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 4 1905 // CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 1906 // CHECK2-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 1907 // CHECK2-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]]) 1908 // CHECK2-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 4 1909 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr i64, i64* [[TMP15]], i64 1 1910 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP16]], i64 1 1911 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* 1912 // CHECK2-NEXT: store i8* [[TMP22]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] 1913 // CHECK2-NEXT: [[TMP23:%.*]] = icmp eq i16 [[TMP8]], 0 1914 // CHECK2-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 1 1915 // CHECK2-NEXT: [[TMP25:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] 1916 // CHECK2-NEXT: [[TMP26:%.*]] = and i1 [[TMP24]], [[TMP25]] 1917 // CHECK2-NEXT: [[TMP27:%.*]] = icmp eq i16 [[TMP8]], 2 1918 // CHECK2-NEXT: [[TMP28:%.*]] = and i16 [[TMP6]], 1 1919 // CHECK2-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP28]], 0 1920 // CHECK2-NEXT: [[TMP30:%.*]] = and i1 [[TMP27]], [[TMP29]] 1921 // CHECK2-NEXT: [[TMP31:%.*]] = icmp sgt i16 [[TMP7]], 0 1922 // CHECK2-NEXT: [[TMP32:%.*]] = and i1 [[TMP30]], [[TMP31]] 1923 // CHECK2-NEXT: [[TMP33:%.*]] = or i1 [[TMP23]], [[TMP26]] 1924 // CHECK2-NEXT: [[TMP34:%.*]] = or i1 [[TMP33]], [[TMP32]] 1925 // CHECK2-NEXT: br i1 [[TMP34]], label [[THEN:%.*]], label [[ELSE:%.*]] 1926 // CHECK2: then: 1927 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* 1928 // CHECK2-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* 1929 // CHECK2-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP35]], i8* [[TMP36]]) #[[ATTR5]] 1930 // CHECK2-NEXT: br label [[IFCONT:%.*]] 1931 // CHECK2: else: 1932 // CHECK2-NEXT: br label [[IFCONT]] 1933 // CHECK2: ifcont: 1934 // CHECK2-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1 1935 // CHECK2-NEXT: [[TMP38:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] 1936 // CHECK2-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]] 1937 // CHECK2-NEXT: br i1 [[TMP39]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 1938 // CHECK2: then4: 1939 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 1940 // CHECK2-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP40]], align 8 1941 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1942 // CHECK2-NEXT: [[TMP43:%.*]] = load i8*, i8** [[TMP42]], align 8 1943 // CHECK2-NEXT: [[TMP44:%.*]] = bitcast i8* [[TMP41]] to %"class.std::complex"* 1944 // CHECK2-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP43]] to %"class.std::complex"* 1945 // CHECK2-NEXT: [[TMP46:%.*]] = bitcast %"class.std::complex"* [[TMP45]] to i8* 1946 // CHECK2-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[TMP44]] to i8* 1947 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP46]], i8* align 4 [[TMP47]], i64 8, i1 false), !tbaa.struct !21 1948 // CHECK2-NEXT: br label [[IFCONT6:%.*]] 1949 // CHECK2: else5: 1950 // CHECK2-NEXT: br label [[IFCONT6]] 1951 // CHECK2: ifcont6: 1952 // CHECK2-NEXT: ret void 1953 // 1954 // 1955 // CHECK2-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func 1956 // CHECK2-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 1957 // CHECK2-NEXT: entry: 1958 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1959 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 1960 // CHECK2-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 1961 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 1962 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 1963 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 1964 // CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 1965 // CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 1966 // CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 1967 // CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 1968 // CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 1969 // CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1970 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* 1971 // CHECK2-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 1972 // CHECK2-NEXT: br label [[PRECOND:%.*]] 1973 // CHECK2: precond: 1974 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 1975 // CHECK2-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 2 1976 // CHECK2-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] 1977 // CHECK2: body: 1978 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP2]]) 1979 // CHECK2-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 1980 // CHECK2-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] 1981 // CHECK2: then: 1982 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 1983 // CHECK2-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] 1984 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* 1985 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] 1986 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] 1987 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 1988 // CHECK2-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 1989 // CHECK2-NEXT: br label [[IFCONT:%.*]] 1990 // CHECK2: else: 1991 // CHECK2-NEXT: br label [[IFCONT]] 1992 // CHECK2: ifcont: 1993 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) 1994 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 1995 // CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] 1996 // CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 1997 // CHECK2: then4: 1998 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] 1999 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 2000 // CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] 2001 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 2002 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] 2003 // CHECK2-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] 2004 // CHECK2-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] 2005 // CHECK2-NEXT: br label [[IFCONT6:%.*]] 2006 // CHECK2: else5: 2007 // CHECK2-NEXT: br label [[IFCONT6]] 2008 // CHECK2: ifcont6: 2009 // CHECK2-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 2010 // CHECK2-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 2011 // CHECK2-NEXT: br label [[PRECOND]] 2012 // CHECK2: exit: 2013 // CHECK2-NEXT: ret void 2014 // 2015 // 2016 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper 2017 // CHECK2-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 2018 // CHECK2-NEXT: entry: 2019 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 2020 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 2021 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2022 // CHECK2-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 2023 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 2024 // CHECK2-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] 2025 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 2026 // CHECK2-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) 2027 // CHECK2-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 2028 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 2029 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 2030 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] 2031 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 2032 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** 2033 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] 2034 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 2035 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex"** 2036 // CHECK2-NEXT: [[TMP11:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[TMP10]], align 8, !tbaa [[TBAA10]] 2037 // CHECK2-NEXT: call void @__omp_outlined__1(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex"* [[TMP11]]) #[[ATTR5]] 2038 // CHECK2-NEXT: ret void 2039 // 2040 // 2041 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker 2042 // CHECK2-SAME: () #[[ATTR0]] { 2043 // CHECK2-NEXT: entry: 2044 // CHECK2-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 2045 // CHECK2-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 2046 // CHECK2-NEXT: store i8* null, i8** [[WORK_FN]], align 8 2047 // CHECK2-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 2048 // CHECK2-NEXT: br label [[DOTAWAIT_WORK:%.*]] 2049 // CHECK2: .await.work: 2050 // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 2051 // CHECK2-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) 2052 // CHECK2-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 2053 // CHECK2-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 2054 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 2055 // CHECK2-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null 2056 // CHECK2-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] 2057 // CHECK2: .select.workers: 2058 // CHECK2-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 2059 // CHECK2-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 2060 // CHECK2-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] 2061 // CHECK2: .execute.parallel: 2062 // CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 2063 // CHECK2-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 2064 // CHECK2-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*) 2065 // CHECK2-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] 2066 // CHECK2: .execute.fn: 2067 // CHECK2-NEXT: call void @__omp_outlined__5_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5]] 2068 // CHECK2-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] 2069 // CHECK2: .check.next: 2070 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* 2071 // CHECK2-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) 2072 // CHECK2-NEXT: br label [[DOTTERMINATE_PARALLEL]] 2073 // CHECK2: .terminate.parallel: 2074 // CHECK2-NEXT: call void @__kmpc_kernel_end_parallel() 2075 // CHECK2-NEXT: br label [[DOTBARRIER_PARALLEL]] 2076 // CHECK2: .barrier.parallel: 2077 // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 2078 // CHECK2-NEXT: br label [[DOTAWAIT_WORK]] 2079 // CHECK2: .exit: 2080 // CHECK2-NEXT: ret void 2081 // 2082 // 2083 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19 2084 // CHECK2-SAME: () #[[ATTR0]] { 2085 // CHECK2-NEXT: entry: 2086 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2087 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 2088 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 2089 // CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 2090 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2091 // CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 2092 // CHECK2-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] 2093 // CHECK2-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] 2094 // CHECK2-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] 2095 // CHECK2: .worker: 2096 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker() #[[ATTR5]] 2097 // CHECK2-NEXT: br label [[DOTEXIT:%.*]] 2098 // CHECK2: .mastercheck: 2099 // CHECK2-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 2100 // CHECK2-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2101 // CHECK2-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 2102 // CHECK2-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 2103 // CHECK2-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 2104 // CHECK2-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 2105 // CHECK2-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] 2106 // CHECK2-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] 2107 // CHECK2-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] 2108 // CHECK2: .master: 2109 // CHECK2-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2110 // CHECK2-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 2111 // CHECK2-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] 2112 // CHECK2-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) 2113 // CHECK2-NEXT: call void @__kmpc_data_sharing_init_stack() 2114 // CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 2115 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6]] 2116 // CHECK2-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] 2117 // CHECK2-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] 2118 // CHECK2: .termination.notifier: 2119 // CHECK2-NEXT: call void @__kmpc_kernel_deinit(i16 1) 2120 // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 2121 // CHECK2-NEXT: br label [[DOTEXIT]] 2122 // CHECK2: .exit: 2123 // CHECK2-NEXT: ret void 2124 // 2125 // 2126 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__2 2127 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 2128 // CHECK2-NEXT: entry: 2129 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2130 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2131 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2132 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2133 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2134 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2135 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2136 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2137 // CHECK2-NEXT: [[IB:%.*]] = alloca i32, align 4 2138 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 2139 // CHECK2-NEXT: [[REF_TMP2:%.*]] = alloca double, align 8 2140 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 2141 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] 2142 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 2143 // CHECK2-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] 2144 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size4", align 8, !tbaa [[TBAA14]] 2145 // CHECK2-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 2146 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 2147 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 2148 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty.0* 2149 // CHECK2-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0:%.*]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 1 2150 // CHECK2-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 2 2151 // CHECK2-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 0 2152 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 2153 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] 2154 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 2155 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 2156 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 2157 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 2158 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] 2159 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2160 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 2161 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 2162 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 2163 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 2164 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] 2165 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 2166 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* 2167 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] 2168 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2169 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] 2170 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2171 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2172 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 2173 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2174 // CHECK2: cond.true: 2175 // CHECK2-NEXT: br label [[COND_END:%.*]] 2176 // CHECK2: cond.false: 2177 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2178 // CHECK2-NEXT: br label [[COND_END]] 2179 // CHECK2: cond.end: 2180 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 2181 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2182 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 2183 // CHECK2-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2184 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2185 // CHECK2: omp.inner.for.cond: 2186 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2187 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2188 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2189 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2190 // CHECK2: omp.inner.for.cond.cleanup: 2191 // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2192 // CHECK2: omp.inner.for.body: 2193 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2194 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2195 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2196 // CHECK2-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] 2197 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast double* [[REF_TMP]] to i8* 2198 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP19]]) #[[ATTR5]] 2199 // CHECK2-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22:![0-9]+]] 2200 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast double* [[REF_TMP2]] to i8* 2201 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP20]]) #[[ATTR5]] 2202 // CHECK2-NEXT: store double 0.000000e+00, double* [[REF_TMP2]], align 8, !tbaa [[TBAA22]] 2203 // CHECK2-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP2]]) #[[ATTR7]] 2204 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast double* [[REF_TMP2]] to i8* 2205 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] 2206 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* 2207 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] 2208 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 2209 // CHECK2-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 2210 // CHECK2-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 8, !tbaa [[TBAA6]] 2211 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 2212 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 2213 // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 2214 // CHECK2-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] 2215 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 2216 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* 2217 // CHECK2-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] 2218 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 2219 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* 2220 // CHECK2-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] 2221 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 2222 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM]] to i8* 2223 // CHECK2-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] 2224 // CHECK2-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 2225 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex.1"*)* @__omp_outlined__5 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** [[TMP31]], i64 3) 2226 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2227 // CHECK2: omp.body.continue: 2228 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2229 // CHECK2: omp.inner.for.inc: 2230 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2231 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 2232 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2233 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2234 // CHECK2: omp.inner.for.end: 2235 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2236 // CHECK2: omp.loop.exit: 2237 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2238 // CHECK2-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* 2239 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] 2240 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 2241 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] 2242 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 2243 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] 2244 // CHECK2-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 2245 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] 2246 // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 2247 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] 2248 // CHECK2-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 2249 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] 2250 // CHECK2-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] 2251 // CHECK2-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) 2252 // CHECK2-NEXT: ret void 2253 // 2254 // 2255 // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC1ERKdS2_ 2256 // CHECK2-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 2257 // CHECK2-NEXT: entry: 2258 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 2259 // CHECK2-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 2260 // CHECK2-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 2261 // CHECK2-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 2262 // CHECK2-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 2263 // CHECK2-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 2264 // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 2265 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8 2266 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[__IM_ADDR]], align 8 2267 // CHECK2-NEXT: call void @_ZNSt7complexIdEC2ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS1]], double* nonnull align 8 dereferenceable(8) [[TMP0]], double* nonnull align 8 dereferenceable(8) [[TMP1]]) #[[ATTR7]] 2268 // CHECK2-NEXT: ret void 2269 // 2270 // 2271 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__5 2272 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { 2273 // CHECK2-NEXT: entry: 2274 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2275 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2276 // CHECK2-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 2277 // CHECK2-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 2278 // CHECK2-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 2279 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2280 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2281 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2282 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2283 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2284 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2285 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2286 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2287 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2288 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2289 // CHECK2-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex.1", align 8 2290 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 2291 // CHECK2-NEXT: [[REF_TMP6:%.*]] = alloca double, align 8 2292 // CHECK2-NEXT: [[I7:%.*]] = alloca i32, align 4 2293 // CHECK2-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex.1", align 8 2294 // CHECK2-NEXT: [[REF_TMP15:%.*]] = alloca double, align 8 2295 // CHECK2-NEXT: [[REF_TMP16:%.*]] = alloca double, align 8 2296 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2297 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] 2298 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 2299 // CHECK2-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 2300 // CHECK2-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 2301 // CHECK2-NEXT: store %"class.std::complex.1"* [[PARTIAL_SUM]], %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 2302 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 2303 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 2304 // CHECK2-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 2305 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 2306 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] 2307 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 2308 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] 2309 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] 2310 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 2311 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 2312 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 2313 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] 2314 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 2315 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 2316 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 2317 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 2318 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 2319 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] 2320 // CHECK2-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 2321 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 2322 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 2323 // CHECK2-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 2324 // CHECK2-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 2325 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* 2326 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] 2327 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 2328 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] 2329 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* 2330 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] 2331 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 2332 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 2333 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] 2334 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2335 // CHECK2: omp.precond.then: 2336 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 2337 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] 2338 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 2339 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 2340 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] 2341 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 2342 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2343 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 2344 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] 2345 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 2346 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 2347 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] 2348 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 2349 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* 2350 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP21]]) #[[ATTR5]] 2351 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* 2352 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] 2353 // CHECK2-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22]] 2354 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast double* [[REF_TMP6]] to i8* 2355 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP23]]) #[[ATTR5]] 2356 // CHECK2-NEXT: store double 0.000000e+00, double* [[REF_TMP6]], align 8, !tbaa [[TBAA22]] 2357 // CHECK2-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP6]]) #[[ATTR7]] 2358 // CHECK2-NEXT: [[TMP24:%.*]] = bitcast double* [[REF_TMP6]] to i8* 2359 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP24]]) #[[ATTR5]] 2360 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast double* [[REF_TMP]] to i8* 2361 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP25]]) #[[ATTR5]] 2362 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* 2363 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] 2364 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2365 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] 2366 // CHECK2-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2367 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2368 // CHECK2: omp.dispatch.cond: 2369 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2370 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 2371 // CHECK2-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] 2372 // CHECK2-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2373 // CHECK2: cond.true: 2374 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 2375 // CHECK2-NEXT: br label [[COND_END:%.*]] 2376 // CHECK2: cond.false: 2377 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2378 // CHECK2-NEXT: br label [[COND_END]] 2379 // CHECK2: cond.end: 2380 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] 2381 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2382 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 2383 // CHECK2-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2384 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2385 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2386 // CHECK2-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 2387 // CHECK2-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] 2388 // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] 2389 // CHECK2: omp.dispatch.cleanup: 2390 // CHECK2-NEXT: br label [[OMP_DISPATCH_END:%.*]] 2391 // CHECK2: omp.dispatch.body: 2392 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2393 // CHECK2: omp.inner.for.cond: 2394 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2395 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2396 // CHECK2-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 2397 // CHECK2-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] 2398 // CHECK2-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2399 // CHECK2: omp.inner.for.cond.cleanup: 2400 // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2401 // CHECK2: omp.inner.for.body: 2402 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 2403 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2404 // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 2405 // CHECK2-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] 2406 // CHECK2-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] 2407 // CHECK2-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* 2408 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP40]]) #[[ATTR5]] 2409 // CHECK2-NEXT: [[TMP41:%.*]] = bitcast double* [[REF_TMP15]] to i8* 2410 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP41]]) #[[ATTR5]] 2411 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 2412 // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to double 2413 // CHECK2-NEXT: store double [[CONV]], double* [[REF_TMP15]], align 8, !tbaa [[TBAA22]] 2414 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast double* [[REF_TMP16]] to i8* 2415 // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP43]]) #[[ATTR5]] 2416 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 2417 // CHECK2-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to double 2418 // CHECK2-NEXT: store double [[CONV17]], double* [[REF_TMP16]], align 8, !tbaa [[TBAA22]] 2419 // CHECK2-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[REF_TMP14]], double* nonnull align 8 dereferenceable(8) [[REF_TMP15]], double* nonnull align 8 dereferenceable(8) [[REF_TMP16]]) #[[ATTR7]] 2420 // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[REF_TMP14]]) #[[ATTR7]] 2421 // CHECK2-NEXT: [[TMP45:%.*]] = bitcast double* [[REF_TMP16]] to i8* 2422 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP45]]) #[[ATTR5]] 2423 // CHECK2-NEXT: [[TMP46:%.*]] = bitcast double* [[REF_TMP15]] to i8* 2424 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP46]]) #[[ATTR5]] 2425 // CHECK2-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* 2426 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP47]]) #[[ATTR5]] 2427 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2428 // CHECK2: omp.body.continue: 2429 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2430 // CHECK2: omp.inner.for.inc: 2431 // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2432 // CHECK2-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 2433 // CHECK2-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2434 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2435 // CHECK2: omp.inner.for.end: 2436 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2437 // CHECK2: omp.dispatch.inc: 2438 // CHECK2-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 2439 // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 2440 // CHECK2-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] 2441 // CHECK2-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 2442 // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2443 // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 2444 // CHECK2-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] 2445 // CHECK2-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2446 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 2447 // CHECK2: omp.dispatch.end: 2448 // CHECK2-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2449 // CHECK2-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] 2450 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) 2451 // CHECK2-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2452 // CHECK2-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] 2453 // CHECK2-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2454 // CHECK2-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* 2455 // CHECK2-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 2456 // CHECK2-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2457 // CHECK2-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func7, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func8) 2458 // CHECK2-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 2459 // CHECK2-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] 2460 // CHECK2: .omp.reduction.then: 2461 // CHECK2-NEXT: [[CALL21:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP2]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]]) #[[ATTR7]] 2462 // CHECK2-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) 2463 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DONE]] 2464 // CHECK2: .omp.reduction.done: 2465 // CHECK2-NEXT: [[TMP62:%.*]] = bitcast i32* [[I7]] to i8* 2466 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP62]]) #[[ATTR5]] 2467 // CHECK2-NEXT: [[TMP63:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* 2468 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP63]]) #[[ATTR5]] 2469 // CHECK2-NEXT: [[TMP64:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 2470 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP64]]) #[[ATTR5]] 2471 // CHECK2-NEXT: [[TMP65:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 2472 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP65]]) #[[ATTR5]] 2473 // CHECK2-NEXT: [[TMP66:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 2474 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP66]]) #[[ATTR5]] 2475 // CHECK2-NEXT: [[TMP67:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 2476 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP67]]) #[[ATTR5]] 2477 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 2478 // CHECK2: omp.precond.end: 2479 // CHECK2-NEXT: [[TMP68:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 2480 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP68]]) #[[ATTR5]] 2481 // CHECK2-NEXT: [[TMP69:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 2482 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP69]]) #[[ATTR5]] 2483 // CHECK2-NEXT: [[TMP70:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 2484 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] 2485 // CHECK2-NEXT: [[TMP71:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 2486 // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP71]]) #[[ATTR5]] 2487 // CHECK2-NEXT: ret void 2488 // 2489 // 2490 // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIdEpLIdEERS0_RKS_IT_E 2491 // CHECK2-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__C:%.*]]) #[[ATTR4]] comdat align 2 { 2492 // CHECK2-NEXT: entry: 2493 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 2494 // CHECK2-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 2495 // CHECK2-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 2496 // CHECK2-NEXT: store %"class.std::complex.1"* [[__C]], %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 2497 // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 2498 // CHECK2-NEXT: [[TMP0:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 2499 // CHECK2-NEXT: [[CALL:%.*]] = call double @_ZNKSt7complexIdE4realEv(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP0]]) #[[ATTR7]] 2500 // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 2501 // CHECK2-NEXT: [[TMP1:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA24:![0-9]+]] 2502 // CHECK2-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[CALL]] 2503 // CHECK2-NEXT: store double [[ADD]], double* [[__RE_]], align 8, !tbaa [[TBAA24]] 2504 // CHECK2-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 2505 // CHECK2-NEXT: [[CALL2:%.*]] = call double @_ZNKSt7complexIdE4imagEv(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP2]]) #[[ATTR7]] 2506 // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 2507 // CHECK2-NEXT: [[TMP3:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA26:![0-9]+]] 2508 // CHECK2-NEXT: [[ADD3:%.*]] = fadd double [[TMP3]], [[CALL2]] 2509 // CHECK2-NEXT: store double [[ADD3]], double* [[__IM_]], align 8, !tbaa [[TBAA26]] 2510 // CHECK2-NEXT: ret %"class.std::complex.1"* [[THIS1]] 2511 // 2512 // 2513 // CHECK2-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func7 2514 // CHECK2-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { 2515 // CHECK2-NEXT: entry: 2516 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2517 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 2518 // CHECK2-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 2519 // CHECK2-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 2520 // CHECK2-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 2521 // CHECK2-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex.1", align 8 2522 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 2523 // CHECK2-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 2524 // CHECK2-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 2525 // CHECK2-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 2526 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 2527 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2528 // CHECK2-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 2529 // CHECK2-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 2530 // CHECK2-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 2531 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 2532 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2533 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 2534 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex.1"* 2535 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex.1", %"class.std::complex.1"* [[TMP12]], i64 1 2536 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex.1"* [[TMP13]] to i8* 2537 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex.1"* [[TMP12]] to i64* 2538 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* 2539 // CHECK2-NEXT: br label [[DOTSHUFFLE_PRE_COND:%.*]] 2540 // CHECK2: .shuffle.pre_cond: 2541 // CHECK2-NEXT: [[TMP17:%.*]] = phi i64* [ [[TMP15]], [[ENTRY:%.*]] ], [ [[TMP28:%.*]], [[DOTSHUFFLE_THEN:%.*]] ] 2542 // CHECK2-NEXT: [[TMP18:%.*]] = phi i64* [ [[TMP16]], [[ENTRY]] ], [ [[TMP29:%.*]], [[DOTSHUFFLE_THEN]] ] 2543 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i64* [[TMP17]] to i8* 2544 // CHECK2-NEXT: [[TMP20:%.*]] = ptrtoint i8* [[TMP14]] to i64 2545 // CHECK2-NEXT: [[TMP21:%.*]] = ptrtoint i8* [[TMP19]] to i64 2546 // CHECK2-NEXT: [[TMP22:%.*]] = sub i64 [[TMP20]], [[TMP21]] 2547 // CHECK2-NEXT: [[TMP23:%.*]] = sdiv exact i64 [[TMP22]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64) 2548 // CHECK2-NEXT: [[TMP24:%.*]] = icmp sgt i64 [[TMP23]], 7 2549 // CHECK2-NEXT: br i1 [[TMP24]], label [[DOTSHUFFLE_THEN]], label [[DOTSHUFFLE_EXIT:%.*]] 2550 // CHECK2: .shuffle.then: 2551 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP17]], align 8 2552 // CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 2553 // CHECK2-NEXT: [[TMP26:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 2554 // CHECK2-NEXT: [[TMP27:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP25]], i16 [[TMP7]], i16 [[TMP26]]) 2555 // CHECK2-NEXT: store i64 [[TMP27]], i64* [[TMP18]], align 8 2556 // CHECK2-NEXT: [[TMP28]] = getelementptr i64, i64* [[TMP17]], i64 1 2557 // CHECK2-NEXT: [[TMP29]] = getelementptr i64, i64* [[TMP18]], i64 1 2558 // CHECK2-NEXT: br label [[DOTSHUFFLE_PRE_COND]] 2559 // CHECK2: .shuffle.exit: 2560 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* 2561 // CHECK2-NEXT: store i8* [[TMP30]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] 2562 // CHECK2-NEXT: [[TMP31:%.*]] = icmp eq i16 [[TMP8]], 0 2563 // CHECK2-NEXT: [[TMP32:%.*]] = icmp eq i16 [[TMP8]], 1 2564 // CHECK2-NEXT: [[TMP33:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] 2565 // CHECK2-NEXT: [[TMP34:%.*]] = and i1 [[TMP32]], [[TMP33]] 2566 // CHECK2-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 2 2567 // CHECK2-NEXT: [[TMP36:%.*]] = and i16 [[TMP6]], 1 2568 // CHECK2-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP36]], 0 2569 // CHECK2-NEXT: [[TMP38:%.*]] = and i1 [[TMP35]], [[TMP37]] 2570 // CHECK2-NEXT: [[TMP39:%.*]] = icmp sgt i16 [[TMP7]], 0 2571 // CHECK2-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] 2572 // CHECK2-NEXT: [[TMP41:%.*]] = or i1 [[TMP31]], [[TMP34]] 2573 // CHECK2-NEXT: [[TMP42:%.*]] = or i1 [[TMP41]], [[TMP40]] 2574 // CHECK2-NEXT: br i1 [[TMP42]], label [[THEN:%.*]], label [[ELSE:%.*]] 2575 // CHECK2: then: 2576 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* 2577 // CHECK2-NEXT: [[TMP44:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* 2578 // CHECK2-NEXT: call void @"_omp$reduction$reduction_func6"(i8* [[TMP43]], i8* [[TMP44]]) #[[ATTR5]] 2579 // CHECK2-NEXT: br label [[IFCONT:%.*]] 2580 // CHECK2: else: 2581 // CHECK2-NEXT: br label [[IFCONT]] 2582 // CHECK2: ifcont: 2583 // CHECK2-NEXT: [[TMP45:%.*]] = icmp eq i16 [[TMP8]], 1 2584 // CHECK2-NEXT: [[TMP46:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] 2585 // CHECK2-NEXT: [[TMP47:%.*]] = and i1 [[TMP45]], [[TMP46]] 2586 // CHECK2-NEXT: br i1 [[TMP47]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 2587 // CHECK2: then4: 2588 // CHECK2-NEXT: [[TMP48:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 2589 // CHECK2-NEXT: [[TMP49:%.*]] = load i8*, i8** [[TMP48]], align 8 2590 // CHECK2-NEXT: [[TMP50:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 2591 // CHECK2-NEXT: [[TMP51:%.*]] = load i8*, i8** [[TMP50]], align 8 2592 // CHECK2-NEXT: [[TMP52:%.*]] = bitcast i8* [[TMP49]] to %"class.std::complex.1"* 2593 // CHECK2-NEXT: [[TMP53:%.*]] = bitcast i8* [[TMP51]] to %"class.std::complex.1"* 2594 // CHECK2-NEXT: [[TMP54:%.*]] = bitcast %"class.std::complex.1"* [[TMP53]] to i8* 2595 // CHECK2-NEXT: [[TMP55:%.*]] = bitcast %"class.std::complex.1"* [[TMP52]] to i8* 2596 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP54]], i8* align 8 [[TMP55]], i64 16, i1 false), !tbaa.struct !27 2597 // CHECK2-NEXT: br label [[IFCONT6:%.*]] 2598 // CHECK2: else5: 2599 // CHECK2-NEXT: br label [[IFCONT6]] 2600 // CHECK2: ifcont6: 2601 // CHECK2-NEXT: ret void 2602 // 2603 // 2604 // CHECK2-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func8 2605 // CHECK2-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 2606 // CHECK2-NEXT: entry: 2607 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2608 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 2609 // CHECK2-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 2610 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 2611 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 2612 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 2613 // CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 2614 // CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 2615 // CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 2616 // CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 2617 // CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 2618 // CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2619 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* 2620 // CHECK2-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 2621 // CHECK2-NEXT: br label [[PRECOND:%.*]] 2622 // CHECK2: precond: 2623 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 2624 // CHECK2-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 4 2625 // CHECK2-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] 2626 // CHECK2: body: 2627 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) 2628 // CHECK2-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 2629 // CHECK2-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] 2630 // CHECK2: then: 2631 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 2632 // CHECK2-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] 2633 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* 2634 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] 2635 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] 2636 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 2637 // CHECK2-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 2638 // CHECK2-NEXT: br label [[IFCONT:%.*]] 2639 // CHECK2: else: 2640 // CHECK2-NEXT: br label [[IFCONT]] 2641 // CHECK2: ifcont: 2642 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) 2643 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 2644 // CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] 2645 // CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 2646 // CHECK2: then4: 2647 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] 2648 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 2649 // CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] 2650 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 2651 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] 2652 // CHECK2-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] 2653 // CHECK2-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] 2654 // CHECK2-NEXT: br label [[IFCONT6:%.*]] 2655 // CHECK2: else5: 2656 // CHECK2-NEXT: br label [[IFCONT6]] 2657 // CHECK2: ifcont6: 2658 // CHECK2-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 2659 // CHECK2-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 2660 // CHECK2-NEXT: br label [[PRECOND]] 2661 // CHECK2: exit: 2662 // CHECK2-NEXT: ret void 2663 // 2664 // 2665 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper 2666 // CHECK2-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 2667 // CHECK2-NEXT: entry: 2668 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 2669 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 2670 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2671 // CHECK2-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 2672 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 2673 // CHECK2-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] 2674 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 2675 // CHECK2-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) 2676 // CHECK2-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 2677 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 2678 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 2679 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] 2680 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 2681 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** 2682 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] 2683 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 2684 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex.1"** 2685 // CHECK2-NEXT: [[TMP11:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[TMP10]], align 8, !tbaa [[TBAA10]] 2686 // CHECK2-NEXT: call void @__omp_outlined__5(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex.1"* [[TMP11]]) #[[ATTR5]] 2687 // CHECK2-NEXT: ret void 2688 // 2689 // 2690 // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC2ERKfS2_ 2691 // CHECK2-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 2692 // CHECK2-NEXT: entry: 2693 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 2694 // CHECK2-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 2695 // CHECK2-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 2696 // CHECK2-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 2697 // CHECK2-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 2698 // CHECK2-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 2699 // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 2700 // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 2701 // CHECK2-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 2702 // CHECK2-NEXT: [[TMP1:%.*]] = load float, float* [[TMP0]], align 4, !tbaa [[TBAA16]] 2703 // CHECK2-NEXT: store float [[TMP1]], float* [[__RE_]], align 4, !tbaa [[TBAA18]] 2704 // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 2705 // CHECK2-NEXT: [[TMP2:%.*]] = load float*, float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 2706 // CHECK2-NEXT: [[TMP3:%.*]] = load float, float* [[TMP2]], align 4, !tbaa [[TBAA16]] 2707 // CHECK2-NEXT: store float [[TMP3]], float* [[__IM_]], align 4, !tbaa [[TBAA20]] 2708 // CHECK2-NEXT: ret void 2709 // 2710 // 2711 // CHECK2-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4realEv 2712 // CHECK2-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 2713 // CHECK2-NEXT: entry: 2714 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 2715 // CHECK2-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 2716 // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 2717 // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 2718 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA18]] 2719 // CHECK2-NEXT: ret float [[TMP0]] 2720 // 2721 // 2722 // CHECK2-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4imagEv 2723 // CHECK2-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 2724 // CHECK2-NEXT: entry: 2725 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 2726 // CHECK2-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 2727 // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 2728 // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 2729 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA20]] 2730 // CHECK2-NEXT: ret float [[TMP0]] 2731 // 2732 // 2733 // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC2ERKdS2_ 2734 // CHECK2-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 2735 // CHECK2-NEXT: entry: 2736 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 2737 // CHECK2-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 2738 // CHECK2-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 2739 // CHECK2-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 2740 // CHECK2-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 2741 // CHECK2-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 2742 // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 2743 // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 2744 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 2745 // CHECK2-NEXT: [[TMP1:%.*]] = load double, double* [[TMP0]], align 8, !tbaa [[TBAA22]] 2746 // CHECK2-NEXT: store double [[TMP1]], double* [[__RE_]], align 8, !tbaa [[TBAA24]] 2747 // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 2748 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 2749 // CHECK2-NEXT: [[TMP3:%.*]] = load double, double* [[TMP2]], align 8, !tbaa [[TBAA22]] 2750 // CHECK2-NEXT: store double [[TMP3]], double* [[__IM_]], align 8, !tbaa [[TBAA26]] 2751 // CHECK2-NEXT: ret void 2752 // 2753 // 2754 // CHECK2-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4realEv 2755 // CHECK2-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 2756 // CHECK2-NEXT: entry: 2757 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 2758 // CHECK2-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 2759 // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 2760 // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 2761 // CHECK2-NEXT: [[TMP0:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA24]] 2762 // CHECK2-NEXT: ret double [[TMP0]] 2763 // 2764 // 2765 // CHECK2-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4imagEv 2766 // CHECK2-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 2767 // CHECK2-NEXT: entry: 2768 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 2769 // CHECK2-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 2770 // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 2771 // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 2772 // CHECK2-NEXT: [[TMP0:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA26]] 2773 // CHECK2-NEXT: ret double [[TMP0]] 2774 // 2775 // 2776 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker 2777 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 2778 // CHECK3-NEXT: entry: 2779 // CHECK3-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 2780 // CHECK3-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 2781 // CHECK3-NEXT: store i8* null, i8** [[WORK_FN]], align 8 2782 // CHECK3-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 2783 // CHECK3-NEXT: br label [[DOTAWAIT_WORK:%.*]] 2784 // CHECK3: .await.work: 2785 // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 2786 // CHECK3-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) 2787 // CHECK3-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 2788 // CHECK3-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 2789 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 2790 // CHECK3-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null 2791 // CHECK3-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] 2792 // CHECK3: .select.workers: 2793 // CHECK3-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 2794 // CHECK3-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 2795 // CHECK3-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] 2796 // CHECK3: .execute.parallel: 2797 // CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 2798 // CHECK3-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 2799 // CHECK3-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*) 2800 // CHECK3-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] 2801 // CHECK3: .execute.fn: 2802 // CHECK3-NEXT: call void @__omp_outlined__1_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5:[0-9]+]] 2803 // CHECK3-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] 2804 // CHECK3: .check.next: 2805 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* 2806 // CHECK3-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) 2807 // CHECK3-NEXT: br label [[DOTTERMINATE_PARALLEL]] 2808 // CHECK3: .terminate.parallel: 2809 // CHECK3-NEXT: call void @__kmpc_kernel_end_parallel() 2810 // CHECK3-NEXT: br label [[DOTBARRIER_PARALLEL]] 2811 // CHECK3: .barrier.parallel: 2812 // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 2813 // CHECK3-NEXT: br label [[DOTAWAIT_WORK]] 2814 // CHECK3: .exit: 2815 // CHECK3-NEXT: ret void 2816 // 2817 // 2818 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19 2819 // CHECK3-SAME: () #[[ATTR0]] { 2820 // CHECK3-NEXT: entry: 2821 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2822 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 2823 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 2824 // CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 2825 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2826 // CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 2827 // CHECK3-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] 2828 // CHECK3-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] 2829 // CHECK3-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] 2830 // CHECK3: .worker: 2831 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker() #[[ATTR5]] 2832 // CHECK3-NEXT: br label [[DOTEXIT:%.*]] 2833 // CHECK3: .mastercheck: 2834 // CHECK3-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 2835 // CHECK3-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2836 // CHECK3-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 2837 // CHECK3-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 2838 // CHECK3-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 2839 // CHECK3-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 2840 // CHECK3-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] 2841 // CHECK3-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] 2842 // CHECK3-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] 2843 // CHECK3: .master: 2844 // CHECK3-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2845 // CHECK3-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 2846 // CHECK3-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] 2847 // CHECK3-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) 2848 // CHECK3-NEXT: call void @__kmpc_data_sharing_init_stack() 2849 // CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 2850 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6:![0-9]+]] 2851 // CHECK3-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] 2852 // CHECK3-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] 2853 // CHECK3: .termination.notifier: 2854 // CHECK3-NEXT: call void @__kmpc_kernel_deinit(i16 1) 2855 // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 2856 // CHECK3-NEXT: br label [[DOTEXIT]] 2857 // CHECK3: .exit: 2858 // CHECK3-NEXT: ret void 2859 // 2860 // 2861 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__ 2862 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 2863 // CHECK3-NEXT: entry: 2864 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2865 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2866 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2867 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2868 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2869 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2870 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2871 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2872 // CHECK3-NEXT: [[IB:%.*]] = alloca i32, align 4 2873 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 2874 // CHECK3-NEXT: [[REF_TMP2:%.*]] = alloca float, align 4 2875 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 2876 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10:![0-9]+]] 2877 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 2878 // CHECK3-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12:![0-9]+]] 2879 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8, !tbaa [[TBAA14:![0-9]+]] 2880 // CHECK3-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 2881 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 2882 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 2883 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty* 2884 // CHECK3-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 0 2885 // CHECK3-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 1 2886 // CHECK3-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 2 2887 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 2888 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] 2889 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 2890 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 2891 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 2892 // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 2893 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] 2894 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2895 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 2896 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 2897 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 2898 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 2899 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] 2900 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 2901 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* 2902 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] 2903 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2904 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] 2905 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2906 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2907 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 2908 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2909 // CHECK3: cond.true: 2910 // CHECK3-NEXT: br label [[COND_END:%.*]] 2911 // CHECK3: cond.false: 2912 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2913 // CHECK3-NEXT: br label [[COND_END]] 2914 // CHECK3: cond.end: 2915 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 2916 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2917 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 2918 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2919 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2920 // CHECK3: omp.inner.for.cond: 2921 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2922 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 2923 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2924 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2925 // CHECK3: omp.inner.for.cond.cleanup: 2926 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2927 // CHECK3: omp.inner.for.body: 2928 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2929 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2930 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2931 // CHECK3-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] 2932 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast float* [[REF_TMP]] to i8* 2933 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] 2934 // CHECK3-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16:![0-9]+]] 2935 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast float* [[REF_TMP2]] to i8* 2936 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] 2937 // CHECK3-NEXT: store float 0.000000e+00, float* [[REF_TMP2]], align 4, !tbaa [[TBAA16]] 2938 // CHECK3-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP2]]) #[[ATTR7:[0-9]+]] 2939 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast float* [[REF_TMP2]] to i8* 2940 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP21]]) #[[ATTR5]] 2941 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* 2942 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] 2943 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 2944 // CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 2945 // CHECK3-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 4, !tbaa [[TBAA6]] 2946 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 2947 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 2948 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 2949 // CHECK3-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] 2950 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 2951 // CHECK3-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* 2952 // CHECK3-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] 2953 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 2954 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* 2955 // CHECK3-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] 2956 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 2957 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM]] to i8* 2958 // CHECK3-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] 2959 // CHECK3-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 2960 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex"*)* @__omp_outlined__1 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*), i8** [[TMP31]], i64 3) 2961 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2962 // CHECK3: omp.body.continue: 2963 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2964 // CHECK3: omp.inner.for.inc: 2965 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2966 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 2967 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 2968 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2969 // CHECK3: omp.inner.for.end: 2970 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2971 // CHECK3: omp.loop.exit: 2972 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2973 // CHECK3-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* 2974 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] 2975 // CHECK3-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 2976 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] 2977 // CHECK3-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 2978 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] 2979 // CHECK3-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 2980 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] 2981 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 2982 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] 2983 // CHECK3-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 2984 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] 2985 // CHECK3-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12]] 2986 // CHECK3-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) 2987 // CHECK3-NEXT: ret void 2988 // 2989 // 2990 // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC1ERKfS2_ 2991 // CHECK3-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat align 2 { 2992 // CHECK3-NEXT: entry: 2993 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 2994 // CHECK3-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 2995 // CHECK3-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 2996 // CHECK3-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 2997 // CHECK3-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 2998 // CHECK3-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 2999 // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 3000 // CHECK3-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8 3001 // CHECK3-NEXT: [[TMP1:%.*]] = load float*, float** [[__IM_ADDR]], align 8 3002 // CHECK3-NEXT: call void @_ZNSt7complexIfEC2ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS1]], float* nonnull align 4 dereferenceable(4) [[TMP0]], float* nonnull align 4 dereferenceable(4) [[TMP1]]) #[[ATTR7]] 3003 // CHECK3-NEXT: ret void 3004 // 3005 // 3006 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1 3007 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { 3008 // CHECK3-NEXT: entry: 3009 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3010 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3011 // CHECK3-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 3012 // CHECK3-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 3013 // CHECK3-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 3014 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3015 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3016 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3017 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3018 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3019 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3020 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3021 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3022 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3023 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3024 // CHECK3-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex", align 4 3025 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 3026 // CHECK3-NEXT: [[REF_TMP6:%.*]] = alloca float, align 4 3027 // CHECK3-NEXT: [[I7:%.*]] = alloca i32, align 4 3028 // CHECK3-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex", align 4 3029 // CHECK3-NEXT: [[REF_TMP15:%.*]] = alloca float, align 4 3030 // CHECK3-NEXT: [[REF_TMP16:%.*]] = alloca float, align 4 3031 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 3032 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] 3033 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 3034 // CHECK3-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 3035 // CHECK3-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 3036 // CHECK3-NEXT: store %"class.std::complex"* [[PARTIAL_SUM]], %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 3037 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 3038 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 3039 // CHECK3-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 3040 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 3041 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] 3042 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 3043 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] 3044 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] 3045 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 3046 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 3047 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 3048 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] 3049 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 3050 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 3051 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 3052 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 3053 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 3054 // CHECK3-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] 3055 // CHECK3-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 3056 // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 3057 // CHECK3-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 3058 // CHECK3-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 3059 // CHECK3-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 3060 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* 3061 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] 3062 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 3063 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] 3064 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* 3065 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] 3066 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 3067 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 3068 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] 3069 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3070 // CHECK3: omp.precond.then: 3071 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 3072 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] 3073 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 3074 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 3075 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] 3076 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 3077 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3078 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 3079 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] 3080 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 3081 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 3082 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] 3083 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 3084 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* 3085 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] 3086 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* 3087 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] 3088 // CHECK3-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16]] 3089 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast float* [[REF_TMP6]] to i8* 3090 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP23]]) #[[ATTR5]] 3091 // CHECK3-NEXT: store float 0.000000e+00, float* [[REF_TMP6]], align 4, !tbaa [[TBAA16]] 3092 // CHECK3-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP6]]) #[[ATTR7]] 3093 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast float* [[REF_TMP6]] to i8* 3094 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP24]]) #[[ATTR5]] 3095 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast float* [[REF_TMP]] to i8* 3096 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP25]]) #[[ATTR5]] 3097 // CHECK3-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* 3098 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] 3099 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3100 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] 3101 // CHECK3-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3102 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3103 // CHECK3: omp.dispatch.cond: 3104 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3105 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 3106 // CHECK3-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] 3107 // CHECK3-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3108 // CHECK3: cond.true: 3109 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 3110 // CHECK3-NEXT: br label [[COND_END:%.*]] 3111 // CHECK3: cond.false: 3112 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3113 // CHECK3-NEXT: br label [[COND_END]] 3114 // CHECK3: cond.end: 3115 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] 3116 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3117 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 3118 // CHECK3-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3119 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3120 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3121 // CHECK3-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 3122 // CHECK3-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] 3123 // CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] 3124 // CHECK3: omp.dispatch.cleanup: 3125 // CHECK3-NEXT: br label [[OMP_DISPATCH_END:%.*]] 3126 // CHECK3: omp.dispatch.body: 3127 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3128 // CHECK3: omp.inner.for.cond: 3129 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3130 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3131 // CHECK3-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 3132 // CHECK3-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] 3133 // CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3134 // CHECK3: omp.inner.for.cond.cleanup: 3135 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3136 // CHECK3: omp.inner.for.body: 3137 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 3138 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3139 // CHECK3-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 3140 // CHECK3-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] 3141 // CHECK3-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] 3142 // CHECK3-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* 3143 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP40]]) #[[ATTR5]] 3144 // CHECK3-NEXT: [[TMP41:%.*]] = bitcast float* [[REF_TMP15]] to i8* 3145 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP41]]) #[[ATTR5]] 3146 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 3147 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to float 3148 // CHECK3-NEXT: store float [[CONV]], float* [[REF_TMP15]], align 4, !tbaa [[TBAA16]] 3149 // CHECK3-NEXT: [[TMP43:%.*]] = bitcast float* [[REF_TMP16]] to i8* 3150 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP43]]) #[[ATTR5]] 3151 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 3152 // CHECK3-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to float 3153 // CHECK3-NEXT: store float [[CONV17]], float* [[REF_TMP16]], align 4, !tbaa [[TBAA16]] 3154 // CHECK3-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[REF_TMP14]], float* nonnull align 4 dereferenceable(4) [[REF_TMP15]], float* nonnull align 4 dereferenceable(4) [[REF_TMP16]]) #[[ATTR7]] 3155 // CHECK3-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[REF_TMP14]]) #[[ATTR7]] 3156 // CHECK3-NEXT: [[TMP45:%.*]] = bitcast float* [[REF_TMP16]] to i8* 3157 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP45]]) #[[ATTR5]] 3158 // CHECK3-NEXT: [[TMP46:%.*]] = bitcast float* [[REF_TMP15]] to i8* 3159 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP46]]) #[[ATTR5]] 3160 // CHECK3-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* 3161 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP47]]) #[[ATTR5]] 3162 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3163 // CHECK3: omp.body.continue: 3164 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3165 // CHECK3: omp.inner.for.inc: 3166 // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3167 // CHECK3-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 3168 // CHECK3-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3169 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3170 // CHECK3: omp.inner.for.end: 3171 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3172 // CHECK3: omp.dispatch.inc: 3173 // CHECK3-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 3174 // CHECK3-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 3175 // CHECK3-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] 3176 // CHECK3-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 3177 // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3178 // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 3179 // CHECK3-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] 3180 // CHECK3-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3181 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 3182 // CHECK3: omp.dispatch.end: 3183 // CHECK3-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3184 // CHECK3-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] 3185 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) 3186 // CHECK3-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3187 // CHECK3-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] 3188 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3189 // CHECK3-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* 3190 // CHECK3-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 3191 // CHECK3-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3192 // CHECK3-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func) 3193 // CHECK3-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 3194 // CHECK3-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] 3195 // CHECK3: .omp.reduction.then: 3196 // CHECK3-NEXT: [[CALL21:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP2]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]]) #[[ATTR7]] 3197 // CHECK3-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) 3198 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DONE]] 3199 // CHECK3: .omp.reduction.done: 3200 // CHECK3-NEXT: [[TMP62:%.*]] = bitcast i32* [[I7]] to i8* 3201 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP62]]) #[[ATTR5]] 3202 // CHECK3-NEXT: [[TMP63:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* 3203 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP63]]) #[[ATTR5]] 3204 // CHECK3-NEXT: [[TMP64:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 3205 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP64]]) #[[ATTR5]] 3206 // CHECK3-NEXT: [[TMP65:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 3207 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP65]]) #[[ATTR5]] 3208 // CHECK3-NEXT: [[TMP66:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 3209 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP66]]) #[[ATTR5]] 3210 // CHECK3-NEXT: [[TMP67:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 3211 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP67]]) #[[ATTR5]] 3212 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3213 // CHECK3: omp.precond.end: 3214 // CHECK3-NEXT: [[TMP68:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 3215 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP68]]) #[[ATTR5]] 3216 // CHECK3-NEXT: [[TMP69:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 3217 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP69]]) #[[ATTR5]] 3218 // CHECK3-NEXT: [[TMP70:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 3219 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] 3220 // CHECK3-NEXT: [[TMP71:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 3221 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP71]]) #[[ATTR5]] 3222 // CHECK3-NEXT: ret void 3223 // 3224 // 3225 // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIfEpLIfEERS0_RKS_IT_E 3226 // CHECK3-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[__C:%.*]]) #[[ATTR4:[0-9]+]] comdat align 2 { 3227 // CHECK3-NEXT: entry: 3228 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 3229 // CHECK3-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 3230 // CHECK3-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 3231 // CHECK3-NEXT: store %"class.std::complex"* [[__C]], %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 3232 // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 3233 // CHECK3-NEXT: [[TMP0:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 3234 // CHECK3-NEXT: [[CALL:%.*]] = call float @_ZNKSt7complexIfE4realEv(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP0]]) #[[ATTR7]] 3235 // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 3236 // CHECK3-NEXT: [[TMP1:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA18:![0-9]+]] 3237 // CHECK3-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CALL]] 3238 // CHECK3-NEXT: store float [[ADD]], float* [[__RE_]], align 4, !tbaa [[TBAA18]] 3239 // CHECK3-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 3240 // CHECK3-NEXT: [[CALL2:%.*]] = call float @_ZNKSt7complexIfE4imagEv(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP2]]) #[[ATTR7]] 3241 // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 3242 // CHECK3-NEXT: [[TMP3:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA20:![0-9]+]] 3243 // CHECK3-NEXT: [[ADD3:%.*]] = fadd float [[TMP3]], [[CALL2]] 3244 // CHECK3-NEXT: store float [[ADD3]], float* [[__IM_]], align 4, !tbaa [[TBAA20]] 3245 // CHECK3-NEXT: ret %"class.std::complex"* [[THIS1]] 3246 // 3247 // 3248 // CHECK3-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func 3249 // CHECK3-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { 3250 // CHECK3-NEXT: entry: 3251 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3252 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 3253 // CHECK3-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 3254 // CHECK3-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 3255 // CHECK3-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 3256 // CHECK3-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex", align 4 3257 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 3258 // CHECK3-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 3259 // CHECK3-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 3260 // CHECK3-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 3261 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 3262 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 3263 // CHECK3-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 3264 // CHECK3-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 3265 // CHECK3-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 3266 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3267 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3268 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 3269 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex"* 3270 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex", %"class.std::complex"* [[TMP12]], i64 1 3271 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex"* [[TMP13]] to i8* 3272 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i64* 3273 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* 3274 // CHECK3-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 4 3275 // CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 3276 // CHECK3-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 3277 // CHECK3-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]]) 3278 // CHECK3-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 4 3279 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr i64, i64* [[TMP15]], i64 1 3280 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP16]], i64 1 3281 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* 3282 // CHECK3-NEXT: store i8* [[TMP22]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] 3283 // CHECK3-NEXT: [[TMP23:%.*]] = icmp eq i16 [[TMP8]], 0 3284 // CHECK3-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 1 3285 // CHECK3-NEXT: [[TMP25:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] 3286 // CHECK3-NEXT: [[TMP26:%.*]] = and i1 [[TMP24]], [[TMP25]] 3287 // CHECK3-NEXT: [[TMP27:%.*]] = icmp eq i16 [[TMP8]], 2 3288 // CHECK3-NEXT: [[TMP28:%.*]] = and i16 [[TMP6]], 1 3289 // CHECK3-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP28]], 0 3290 // CHECK3-NEXT: [[TMP30:%.*]] = and i1 [[TMP27]], [[TMP29]] 3291 // CHECK3-NEXT: [[TMP31:%.*]] = icmp sgt i16 [[TMP7]], 0 3292 // CHECK3-NEXT: [[TMP32:%.*]] = and i1 [[TMP30]], [[TMP31]] 3293 // CHECK3-NEXT: [[TMP33:%.*]] = or i1 [[TMP23]], [[TMP26]] 3294 // CHECK3-NEXT: [[TMP34:%.*]] = or i1 [[TMP33]], [[TMP32]] 3295 // CHECK3-NEXT: br i1 [[TMP34]], label [[THEN:%.*]], label [[ELSE:%.*]] 3296 // CHECK3: then: 3297 // CHECK3-NEXT: [[TMP35:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* 3298 // CHECK3-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* 3299 // CHECK3-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP35]], i8* [[TMP36]]) #[[ATTR5]] 3300 // CHECK3-NEXT: br label [[IFCONT:%.*]] 3301 // CHECK3: else: 3302 // CHECK3-NEXT: br label [[IFCONT]] 3303 // CHECK3: ifcont: 3304 // CHECK3-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1 3305 // CHECK3-NEXT: [[TMP38:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] 3306 // CHECK3-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]] 3307 // CHECK3-NEXT: br i1 [[TMP39]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 3308 // CHECK3: then4: 3309 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 3310 // CHECK3-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP40]], align 8 3311 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3312 // CHECK3-NEXT: [[TMP43:%.*]] = load i8*, i8** [[TMP42]], align 8 3313 // CHECK3-NEXT: [[TMP44:%.*]] = bitcast i8* [[TMP41]] to %"class.std::complex"* 3314 // CHECK3-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP43]] to %"class.std::complex"* 3315 // CHECK3-NEXT: [[TMP46:%.*]] = bitcast %"class.std::complex"* [[TMP45]] to i8* 3316 // CHECK3-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[TMP44]] to i8* 3317 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP46]], i8* align 4 [[TMP47]], i64 8, i1 false), !tbaa.struct !21 3318 // CHECK3-NEXT: br label [[IFCONT6:%.*]] 3319 // CHECK3: else5: 3320 // CHECK3-NEXT: br label [[IFCONT6]] 3321 // CHECK3: ifcont6: 3322 // CHECK3-NEXT: ret void 3323 // 3324 // 3325 // CHECK3-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func 3326 // CHECK3-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 3327 // CHECK3-NEXT: entry: 3328 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3329 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 3330 // CHECK3-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 3331 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 3332 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 3333 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 3334 // CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 3335 // CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 3336 // CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 3337 // CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 3338 // CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 3339 // CHECK3-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3340 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* 3341 // CHECK3-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 3342 // CHECK3-NEXT: br label [[PRECOND:%.*]] 3343 // CHECK3: precond: 3344 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 3345 // CHECK3-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 2 3346 // CHECK3-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] 3347 // CHECK3: body: 3348 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP2]]) 3349 // CHECK3-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 3350 // CHECK3-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] 3351 // CHECK3: then: 3352 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 3353 // CHECK3-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] 3354 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* 3355 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] 3356 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] 3357 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 3358 // CHECK3-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 3359 // CHECK3-NEXT: br label [[IFCONT:%.*]] 3360 // CHECK3: else: 3361 // CHECK3-NEXT: br label [[IFCONT]] 3362 // CHECK3: ifcont: 3363 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) 3364 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 3365 // CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] 3366 // CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 3367 // CHECK3: then4: 3368 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] 3369 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 3370 // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] 3371 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 3372 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] 3373 // CHECK3-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] 3374 // CHECK3-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] 3375 // CHECK3-NEXT: br label [[IFCONT6:%.*]] 3376 // CHECK3: else5: 3377 // CHECK3-NEXT: br label [[IFCONT6]] 3378 // CHECK3: ifcont6: 3379 // CHECK3-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 3380 // CHECK3-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 3381 // CHECK3-NEXT: br label [[PRECOND]] 3382 // CHECK3: exit: 3383 // CHECK3-NEXT: ret void 3384 // 3385 // 3386 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper 3387 // CHECK3-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 3388 // CHECK3-NEXT: entry: 3389 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 3390 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 3391 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 3392 // CHECK3-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 3393 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 3394 // CHECK3-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] 3395 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 3396 // CHECK3-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) 3397 // CHECK3-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 3398 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 3399 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 3400 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] 3401 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 3402 // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** 3403 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] 3404 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 3405 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex"** 3406 // CHECK3-NEXT: [[TMP11:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[TMP10]], align 8, !tbaa [[TBAA10]] 3407 // CHECK3-NEXT: call void @__omp_outlined__1(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex"* [[TMP11]]) #[[ATTR5]] 3408 // CHECK3-NEXT: ret void 3409 // 3410 // 3411 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker 3412 // CHECK3-SAME: () #[[ATTR0]] { 3413 // CHECK3-NEXT: entry: 3414 // CHECK3-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 3415 // CHECK3-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 3416 // CHECK3-NEXT: store i8* null, i8** [[WORK_FN]], align 8 3417 // CHECK3-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 3418 // CHECK3-NEXT: br label [[DOTAWAIT_WORK:%.*]] 3419 // CHECK3: .await.work: 3420 // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 3421 // CHECK3-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) 3422 // CHECK3-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 3423 // CHECK3-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 3424 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 3425 // CHECK3-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null 3426 // CHECK3-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] 3427 // CHECK3: .select.workers: 3428 // CHECK3-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 3429 // CHECK3-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 3430 // CHECK3-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] 3431 // CHECK3: .execute.parallel: 3432 // CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 3433 // CHECK3-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 3434 // CHECK3-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*) 3435 // CHECK3-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] 3436 // CHECK3: .execute.fn: 3437 // CHECK3-NEXT: call void @__omp_outlined__5_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5]] 3438 // CHECK3-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] 3439 // CHECK3: .check.next: 3440 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* 3441 // CHECK3-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) 3442 // CHECK3-NEXT: br label [[DOTTERMINATE_PARALLEL]] 3443 // CHECK3: .terminate.parallel: 3444 // CHECK3-NEXT: call void @__kmpc_kernel_end_parallel() 3445 // CHECK3-NEXT: br label [[DOTBARRIER_PARALLEL]] 3446 // CHECK3: .barrier.parallel: 3447 // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 3448 // CHECK3-NEXT: br label [[DOTAWAIT_WORK]] 3449 // CHECK3: .exit: 3450 // CHECK3-NEXT: ret void 3451 // 3452 // 3453 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19 3454 // CHECK3-SAME: () #[[ATTR0]] { 3455 // CHECK3-NEXT: entry: 3456 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 3457 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 3458 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 3459 // CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 3460 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 3461 // CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 3462 // CHECK3-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] 3463 // CHECK3-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] 3464 // CHECK3-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] 3465 // CHECK3: .worker: 3466 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker() #[[ATTR5]] 3467 // CHECK3-NEXT: br label [[DOTEXIT:%.*]] 3468 // CHECK3: .mastercheck: 3469 // CHECK3-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 3470 // CHECK3-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 3471 // CHECK3-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 3472 // CHECK3-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 3473 // CHECK3-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 3474 // CHECK3-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 3475 // CHECK3-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] 3476 // CHECK3-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] 3477 // CHECK3-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] 3478 // CHECK3: .master: 3479 // CHECK3-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 3480 // CHECK3-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 3481 // CHECK3-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] 3482 // CHECK3-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) 3483 // CHECK3-NEXT: call void @__kmpc_data_sharing_init_stack() 3484 // CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 3485 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6]] 3486 // CHECK3-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] 3487 // CHECK3-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] 3488 // CHECK3: .termination.notifier: 3489 // CHECK3-NEXT: call void @__kmpc_kernel_deinit(i16 1) 3490 // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) 3491 // CHECK3-NEXT: br label [[DOTEXIT]] 3492 // CHECK3: .exit: 3493 // CHECK3-NEXT: ret void 3494 // 3495 // 3496 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__2 3497 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 3498 // CHECK3-NEXT: entry: 3499 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3500 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3501 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3502 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3503 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3504 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3505 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3506 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3507 // CHECK3-NEXT: [[IB:%.*]] = alloca i32, align 4 3508 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 3509 // CHECK3-NEXT: [[REF_TMP2:%.*]] = alloca double, align 8 3510 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 3511 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] 3512 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 3513 // CHECK3-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] 3514 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size4", align 8, !tbaa [[TBAA14]] 3515 // CHECK3-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 3516 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 3517 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 3518 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty.0* 3519 // CHECK3-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0:%.*]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 1 3520 // CHECK3-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 2 3521 // CHECK3-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 0 3522 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 3523 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] 3524 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 3525 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 3526 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 3527 // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 3528 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] 3529 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3530 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 3531 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 3532 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 3533 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 3534 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] 3535 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 3536 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* 3537 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] 3538 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3539 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] 3540 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3541 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3542 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 3543 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3544 // CHECK3: cond.true: 3545 // CHECK3-NEXT: br label [[COND_END:%.*]] 3546 // CHECK3: cond.false: 3547 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3548 // CHECK3-NEXT: br label [[COND_END]] 3549 // CHECK3: cond.end: 3550 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 3551 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3552 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 3553 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3554 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3555 // CHECK3: omp.inner.for.cond: 3556 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3557 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3558 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 3559 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3560 // CHECK3: omp.inner.for.cond.cleanup: 3561 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3562 // CHECK3: omp.inner.for.body: 3563 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3564 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3565 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3566 // CHECK3-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] 3567 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast double* [[REF_TMP]] to i8* 3568 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP19]]) #[[ATTR5]] 3569 // CHECK3-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22:![0-9]+]] 3570 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast double* [[REF_TMP2]] to i8* 3571 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP20]]) #[[ATTR5]] 3572 // CHECK3-NEXT: store double 0.000000e+00, double* [[REF_TMP2]], align 8, !tbaa [[TBAA22]] 3573 // CHECK3-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP2]]) #[[ATTR7]] 3574 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast double* [[REF_TMP2]] to i8* 3575 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] 3576 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* 3577 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] 3578 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 3579 // CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 3580 // CHECK3-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 8, !tbaa [[TBAA6]] 3581 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] 3582 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 3583 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 3584 // CHECK3-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] 3585 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 3586 // CHECK3-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* 3587 // CHECK3-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] 3588 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 3589 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* 3590 // CHECK3-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] 3591 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 3592 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM]] to i8* 3593 // CHECK3-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] 3594 // CHECK3-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 3595 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex.1"*)* @__omp_outlined__5 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** [[TMP31]], i64 3) 3596 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3597 // CHECK3: omp.body.continue: 3598 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3599 // CHECK3: omp.inner.for.inc: 3600 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3601 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 3602 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3603 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3604 // CHECK3: omp.inner.for.end: 3605 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3606 // CHECK3: omp.loop.exit: 3607 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 3608 // CHECK3-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* 3609 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] 3610 // CHECK3-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 3611 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] 3612 // CHECK3-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 3613 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] 3614 // CHECK3-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 3615 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] 3616 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 3617 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] 3618 // CHECK3-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 3619 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] 3620 // CHECK3-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] 3621 // CHECK3-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) 3622 // CHECK3-NEXT: ret void 3623 // 3624 // 3625 // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC1ERKdS2_ 3626 // CHECK3-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 3627 // CHECK3-NEXT: entry: 3628 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 3629 // CHECK3-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 3630 // CHECK3-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 3631 // CHECK3-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 3632 // CHECK3-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 3633 // CHECK3-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 3634 // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 3635 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8 3636 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[__IM_ADDR]], align 8 3637 // CHECK3-NEXT: call void @_ZNSt7complexIdEC2ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS1]], double* nonnull align 8 dereferenceable(8) [[TMP0]], double* nonnull align 8 dereferenceable(8) [[TMP1]]) #[[ATTR7]] 3638 // CHECK3-NEXT: ret void 3639 // 3640 // 3641 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__5 3642 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { 3643 // CHECK3-NEXT: entry: 3644 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3645 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3646 // CHECK3-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 3647 // CHECK3-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 3648 // CHECK3-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 3649 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3650 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3651 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3652 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3653 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3654 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3655 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3656 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3657 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3658 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3659 // CHECK3-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex.1", align 8 3660 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 3661 // CHECK3-NEXT: [[REF_TMP6:%.*]] = alloca double, align 8 3662 // CHECK3-NEXT: [[I7:%.*]] = alloca i32, align 4 3663 // CHECK3-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex.1", align 8 3664 // CHECK3-NEXT: [[REF_TMP15:%.*]] = alloca double, align 8 3665 // CHECK3-NEXT: [[REF_TMP16:%.*]] = alloca double, align 8 3666 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 3667 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] 3668 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] 3669 // CHECK3-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 3670 // CHECK3-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 3671 // CHECK3-NEXT: store %"class.std::complex.1"* [[PARTIAL_SUM]], %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 3672 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] 3673 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] 3674 // CHECK3-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] 3675 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 3676 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] 3677 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 3678 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] 3679 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] 3680 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 3681 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 3682 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] 3683 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] 3684 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 3685 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 3686 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] 3687 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 3688 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 3689 // CHECK3-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] 3690 // CHECK3-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 3691 // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 3692 // CHECK3-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 3693 // CHECK3-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 3694 // CHECK3-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 3695 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* 3696 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] 3697 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 3698 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] 3699 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* 3700 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] 3701 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 3702 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] 3703 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] 3704 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3705 // CHECK3: omp.precond.then: 3706 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 3707 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] 3708 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 3709 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 3710 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] 3711 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 3712 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3713 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 3714 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] 3715 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 3716 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 3717 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] 3718 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] 3719 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* 3720 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP21]]) #[[ATTR5]] 3721 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* 3722 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] 3723 // CHECK3-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22]] 3724 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast double* [[REF_TMP6]] to i8* 3725 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP23]]) #[[ATTR5]] 3726 // CHECK3-NEXT: store double 0.000000e+00, double* [[REF_TMP6]], align 8, !tbaa [[TBAA22]] 3727 // CHECK3-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP6]]) #[[ATTR7]] 3728 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast double* [[REF_TMP6]] to i8* 3729 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP24]]) #[[ATTR5]] 3730 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast double* [[REF_TMP]] to i8* 3731 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP25]]) #[[ATTR5]] 3732 // CHECK3-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* 3733 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] 3734 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3735 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] 3736 // CHECK3-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3737 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3738 // CHECK3: omp.dispatch.cond: 3739 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3740 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 3741 // CHECK3-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] 3742 // CHECK3-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3743 // CHECK3: cond.true: 3744 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] 3745 // CHECK3-NEXT: br label [[COND_END:%.*]] 3746 // CHECK3: cond.false: 3747 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3748 // CHECK3-NEXT: br label [[COND_END]] 3749 // CHECK3: cond.end: 3750 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] 3751 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3752 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 3753 // CHECK3-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3754 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3755 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3756 // CHECK3-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 3757 // CHECK3-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] 3758 // CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] 3759 // CHECK3: omp.dispatch.cleanup: 3760 // CHECK3-NEXT: br label [[OMP_DISPATCH_END:%.*]] 3761 // CHECK3: omp.dispatch.body: 3762 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3763 // CHECK3: omp.inner.for.cond: 3764 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3765 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3766 // CHECK3-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 3767 // CHECK3-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] 3768 // CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3769 // CHECK3: omp.inner.for.cond.cleanup: 3770 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3771 // CHECK3: omp.inner.for.body: 3772 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] 3773 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3774 // CHECK3-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 3775 // CHECK3-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] 3776 // CHECK3-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] 3777 // CHECK3-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* 3778 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP40]]) #[[ATTR5]] 3779 // CHECK3-NEXT: [[TMP41:%.*]] = bitcast double* [[REF_TMP15]] to i8* 3780 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP41]]) #[[ATTR5]] 3781 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 3782 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to double 3783 // CHECK3-NEXT: store double [[CONV]], double* [[REF_TMP15]], align 8, !tbaa [[TBAA22]] 3784 // CHECK3-NEXT: [[TMP43:%.*]] = bitcast double* [[REF_TMP16]] to i8* 3785 // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP43]]) #[[ATTR5]] 3786 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] 3787 // CHECK3-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to double 3788 // CHECK3-NEXT: store double [[CONV17]], double* [[REF_TMP16]], align 8, !tbaa [[TBAA22]] 3789 // CHECK3-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[REF_TMP14]], double* nonnull align 8 dereferenceable(8) [[REF_TMP15]], double* nonnull align 8 dereferenceable(8) [[REF_TMP16]]) #[[ATTR7]] 3790 // CHECK3-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[REF_TMP14]]) #[[ATTR7]] 3791 // CHECK3-NEXT: [[TMP45:%.*]] = bitcast double* [[REF_TMP16]] to i8* 3792 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP45]]) #[[ATTR5]] 3793 // CHECK3-NEXT: [[TMP46:%.*]] = bitcast double* [[REF_TMP15]] to i8* 3794 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP46]]) #[[ATTR5]] 3795 // CHECK3-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* 3796 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP47]]) #[[ATTR5]] 3797 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3798 // CHECK3: omp.body.continue: 3799 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3800 // CHECK3: omp.inner.for.inc: 3801 // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3802 // CHECK3-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 3803 // CHECK3-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] 3804 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3805 // CHECK3: omp.inner.for.end: 3806 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3807 // CHECK3: omp.dispatch.inc: 3808 // CHECK3-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 3809 // CHECK3-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 3810 // CHECK3-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] 3811 // CHECK3-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] 3812 // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3813 // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] 3814 // CHECK3-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] 3815 // CHECK3-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] 3816 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 3817 // CHECK3: omp.dispatch.end: 3818 // CHECK3-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3819 // CHECK3-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] 3820 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) 3821 // CHECK3-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3822 // CHECK3-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] 3823 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3824 // CHECK3-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* 3825 // CHECK3-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 3826 // CHECK3-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3827 // CHECK3-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func7, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func8) 3828 // CHECK3-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 3829 // CHECK3-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] 3830 // CHECK3: .omp.reduction.then: 3831 // CHECK3-NEXT: [[CALL21:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP2]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]]) #[[ATTR7]] 3832 // CHECK3-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) 3833 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DONE]] 3834 // CHECK3: .omp.reduction.done: 3835 // CHECK3-NEXT: [[TMP62:%.*]] = bitcast i32* [[I7]] to i8* 3836 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP62]]) #[[ATTR5]] 3837 // CHECK3-NEXT: [[TMP63:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* 3838 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP63]]) #[[ATTR5]] 3839 // CHECK3-NEXT: [[TMP64:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* 3840 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP64]]) #[[ATTR5]] 3841 // CHECK3-NEXT: [[TMP65:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* 3842 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP65]]) #[[ATTR5]] 3843 // CHECK3-NEXT: [[TMP66:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* 3844 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP66]]) #[[ATTR5]] 3845 // CHECK3-NEXT: [[TMP67:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* 3846 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP67]]) #[[ATTR5]] 3847 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3848 // CHECK3: omp.precond.end: 3849 // CHECK3-NEXT: [[TMP68:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* 3850 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP68]]) #[[ATTR5]] 3851 // CHECK3-NEXT: [[TMP69:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* 3852 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP69]]) #[[ATTR5]] 3853 // CHECK3-NEXT: [[TMP70:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* 3854 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] 3855 // CHECK3-NEXT: [[TMP71:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* 3856 // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP71]]) #[[ATTR5]] 3857 // CHECK3-NEXT: ret void 3858 // 3859 // 3860 // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIdEpLIdEERS0_RKS_IT_E 3861 // CHECK3-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__C:%.*]]) #[[ATTR4]] comdat align 2 { 3862 // CHECK3-NEXT: entry: 3863 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 3864 // CHECK3-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 3865 // CHECK3-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 3866 // CHECK3-NEXT: store %"class.std::complex.1"* [[__C]], %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 3867 // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 3868 // CHECK3-NEXT: [[TMP0:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 3869 // CHECK3-NEXT: [[CALL:%.*]] = call double @_ZNKSt7complexIdE4realEv(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP0]]) #[[ATTR7]] 3870 // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 3871 // CHECK3-NEXT: [[TMP1:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA24:![0-9]+]] 3872 // CHECK3-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[CALL]] 3873 // CHECK3-NEXT: store double [[ADD]], double* [[__RE_]], align 8, !tbaa [[TBAA24]] 3874 // CHECK3-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] 3875 // CHECK3-NEXT: [[CALL2:%.*]] = call double @_ZNKSt7complexIdE4imagEv(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP2]]) #[[ATTR7]] 3876 // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 3877 // CHECK3-NEXT: [[TMP3:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA26:![0-9]+]] 3878 // CHECK3-NEXT: [[ADD3:%.*]] = fadd double [[TMP3]], [[CALL2]] 3879 // CHECK3-NEXT: store double [[ADD3]], double* [[__IM_]], align 8, !tbaa [[TBAA26]] 3880 // CHECK3-NEXT: ret %"class.std::complex.1"* [[THIS1]] 3881 // 3882 // 3883 // CHECK3-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func7 3884 // CHECK3-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { 3885 // CHECK3-NEXT: entry: 3886 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3887 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 3888 // CHECK3-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 3889 // CHECK3-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 3890 // CHECK3-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 3891 // CHECK3-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex.1", align 8 3892 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 3893 // CHECK3-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 3894 // CHECK3-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 3895 // CHECK3-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 3896 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 3897 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 3898 // CHECK3-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] 3899 // CHECK3-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] 3900 // CHECK3-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] 3901 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3902 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3903 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 3904 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex.1"* 3905 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex.1", %"class.std::complex.1"* [[TMP12]], i64 1 3906 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex.1"* [[TMP13]] to i8* 3907 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex.1"* [[TMP12]] to i64* 3908 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* 3909 // CHECK3-NEXT: br label [[DOTSHUFFLE_PRE_COND:%.*]] 3910 // CHECK3: .shuffle.pre_cond: 3911 // CHECK3-NEXT: [[TMP17:%.*]] = phi i64* [ [[TMP15]], [[ENTRY:%.*]] ], [ [[TMP28:%.*]], [[DOTSHUFFLE_THEN:%.*]] ] 3912 // CHECK3-NEXT: [[TMP18:%.*]] = phi i64* [ [[TMP16]], [[ENTRY]] ], [ [[TMP29:%.*]], [[DOTSHUFFLE_THEN]] ] 3913 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i64* [[TMP17]] to i8* 3914 // CHECK3-NEXT: [[TMP20:%.*]] = ptrtoint i8* [[TMP14]] to i64 3915 // CHECK3-NEXT: [[TMP21:%.*]] = ptrtoint i8* [[TMP19]] to i64 3916 // CHECK3-NEXT: [[TMP22:%.*]] = sub i64 [[TMP20]], [[TMP21]] 3917 // CHECK3-NEXT: [[TMP23:%.*]] = sdiv exact i64 [[TMP22]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64) 3918 // CHECK3-NEXT: [[TMP24:%.*]] = icmp sgt i64 [[TMP23]], 7 3919 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTSHUFFLE_THEN]], label [[DOTSHUFFLE_EXIT:%.*]] 3920 // CHECK3: .shuffle.then: 3921 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP17]], align 8 3922 // CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() 3923 // CHECK3-NEXT: [[TMP26:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 3924 // CHECK3-NEXT: [[TMP27:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP25]], i16 [[TMP7]], i16 [[TMP26]]) 3925 // CHECK3-NEXT: store i64 [[TMP27]], i64* [[TMP18]], align 8 3926 // CHECK3-NEXT: [[TMP28]] = getelementptr i64, i64* [[TMP17]], i64 1 3927 // CHECK3-NEXT: [[TMP29]] = getelementptr i64, i64* [[TMP18]], i64 1 3928 // CHECK3-NEXT: br label [[DOTSHUFFLE_PRE_COND]] 3929 // CHECK3: .shuffle.exit: 3930 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* 3931 // CHECK3-NEXT: store i8* [[TMP30]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] 3932 // CHECK3-NEXT: [[TMP31:%.*]] = icmp eq i16 [[TMP8]], 0 3933 // CHECK3-NEXT: [[TMP32:%.*]] = icmp eq i16 [[TMP8]], 1 3934 // CHECK3-NEXT: [[TMP33:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] 3935 // CHECK3-NEXT: [[TMP34:%.*]] = and i1 [[TMP32]], [[TMP33]] 3936 // CHECK3-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 2 3937 // CHECK3-NEXT: [[TMP36:%.*]] = and i16 [[TMP6]], 1 3938 // CHECK3-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP36]], 0 3939 // CHECK3-NEXT: [[TMP38:%.*]] = and i1 [[TMP35]], [[TMP37]] 3940 // CHECK3-NEXT: [[TMP39:%.*]] = icmp sgt i16 [[TMP7]], 0 3941 // CHECK3-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] 3942 // CHECK3-NEXT: [[TMP41:%.*]] = or i1 [[TMP31]], [[TMP34]] 3943 // CHECK3-NEXT: [[TMP42:%.*]] = or i1 [[TMP41]], [[TMP40]] 3944 // CHECK3-NEXT: br i1 [[TMP42]], label [[THEN:%.*]], label [[ELSE:%.*]] 3945 // CHECK3: then: 3946 // CHECK3-NEXT: [[TMP43:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* 3947 // CHECK3-NEXT: [[TMP44:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* 3948 // CHECK3-NEXT: call void @"_omp$reduction$reduction_func6"(i8* [[TMP43]], i8* [[TMP44]]) #[[ATTR5]] 3949 // CHECK3-NEXT: br label [[IFCONT:%.*]] 3950 // CHECK3: else: 3951 // CHECK3-NEXT: br label [[IFCONT]] 3952 // CHECK3: ifcont: 3953 // CHECK3-NEXT: [[TMP45:%.*]] = icmp eq i16 [[TMP8]], 1 3954 // CHECK3-NEXT: [[TMP46:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] 3955 // CHECK3-NEXT: [[TMP47:%.*]] = and i1 [[TMP45]], [[TMP46]] 3956 // CHECK3-NEXT: br i1 [[TMP47]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 3957 // CHECK3: then4: 3958 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 3959 // CHECK3-NEXT: [[TMP49:%.*]] = load i8*, i8** [[TMP48]], align 8 3960 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3961 // CHECK3-NEXT: [[TMP51:%.*]] = load i8*, i8** [[TMP50]], align 8 3962 // CHECK3-NEXT: [[TMP52:%.*]] = bitcast i8* [[TMP49]] to %"class.std::complex.1"* 3963 // CHECK3-NEXT: [[TMP53:%.*]] = bitcast i8* [[TMP51]] to %"class.std::complex.1"* 3964 // CHECK3-NEXT: [[TMP54:%.*]] = bitcast %"class.std::complex.1"* [[TMP53]] to i8* 3965 // CHECK3-NEXT: [[TMP55:%.*]] = bitcast %"class.std::complex.1"* [[TMP52]] to i8* 3966 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP54]], i8* align 8 [[TMP55]], i64 16, i1 false), !tbaa.struct !27 3967 // CHECK3-NEXT: br label [[IFCONT6:%.*]] 3968 // CHECK3: else5: 3969 // CHECK3-NEXT: br label [[IFCONT6]] 3970 // CHECK3: ifcont6: 3971 // CHECK3-NEXT: ret void 3972 // 3973 // 3974 // CHECK3-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func8 3975 // CHECK3-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 3976 // CHECK3-NEXT: entry: 3977 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3978 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 3979 // CHECK3-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 3980 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 3981 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] 3982 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 3983 // CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 3984 // CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 3985 // CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 3986 // CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 3987 // CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 3988 // CHECK3-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3989 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* 3990 // CHECK3-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 3991 // CHECK3-NEXT: br label [[PRECOND:%.*]] 3992 // CHECK3: precond: 3993 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 3994 // CHECK3-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 4 3995 // CHECK3-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] 3996 // CHECK3: body: 3997 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) 3998 // CHECK3-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 3999 // CHECK3-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] 4000 // CHECK3: then: 4001 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 4002 // CHECK3-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] 4003 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* 4004 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] 4005 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] 4006 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 4007 // CHECK3-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 4008 // CHECK3-NEXT: br label [[IFCONT:%.*]] 4009 // CHECK3: else: 4010 // CHECK3-NEXT: br label [[IFCONT]] 4011 // CHECK3: ifcont: 4012 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) 4013 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 4014 // CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] 4015 // CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] 4016 // CHECK3: then4: 4017 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] 4018 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 4019 // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] 4020 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 4021 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] 4022 // CHECK3-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] 4023 // CHECK3-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] 4024 // CHECK3-NEXT: br label [[IFCONT6:%.*]] 4025 // CHECK3: else5: 4026 // CHECK3-NEXT: br label [[IFCONT6]] 4027 // CHECK3: ifcont6: 4028 // CHECK3-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 4029 // CHECK3-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] 4030 // CHECK3-NEXT: br label [[PRECOND]] 4031 // CHECK3: exit: 4032 // CHECK3-NEXT: ret void 4033 // 4034 // 4035 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper 4036 // CHECK3-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { 4037 // CHECK3-NEXT: entry: 4038 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 4039 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 4040 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 4041 // CHECK3-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 4042 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 4043 // CHECK3-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] 4044 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] 4045 // CHECK3-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) 4046 // CHECK3-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 4047 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 4048 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** 4049 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] 4050 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 4051 // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** 4052 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] 4053 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 4054 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex.1"** 4055 // CHECK3-NEXT: [[TMP11:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[TMP10]], align 8, !tbaa [[TBAA10]] 4056 // CHECK3-NEXT: call void @__omp_outlined__5(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex.1"* [[TMP11]]) #[[ATTR5]] 4057 // CHECK3-NEXT: ret void 4058 // 4059 // 4060 // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC2ERKfS2_ 4061 // CHECK3-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4062 // CHECK3-NEXT: entry: 4063 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 4064 // CHECK3-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 4065 // CHECK3-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 4066 // CHECK3-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 4067 // CHECK3-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 4068 // CHECK3-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 4069 // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 4070 // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 4071 // CHECK3-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 4072 // CHECK3-NEXT: [[TMP1:%.*]] = load float, float* [[TMP0]], align 4, !tbaa [[TBAA16]] 4073 // CHECK3-NEXT: store float [[TMP1]], float* [[__RE_]], align 4, !tbaa [[TBAA18]] 4074 // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 4075 // CHECK3-NEXT: [[TMP2:%.*]] = load float*, float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 4076 // CHECK3-NEXT: [[TMP3:%.*]] = load float, float* [[TMP2]], align 4, !tbaa [[TBAA16]] 4077 // CHECK3-NEXT: store float [[TMP3]], float* [[__IM_]], align 4, !tbaa [[TBAA20]] 4078 // CHECK3-NEXT: ret void 4079 // 4080 // 4081 // CHECK3-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4realEv 4082 // CHECK3-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 4083 // CHECK3-NEXT: entry: 4084 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 4085 // CHECK3-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 4086 // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 4087 // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 4088 // CHECK3-NEXT: [[TMP0:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA18]] 4089 // CHECK3-NEXT: ret float [[TMP0]] 4090 // 4091 // 4092 // CHECK3-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4imagEv 4093 // CHECK3-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 4094 // CHECK3-NEXT: entry: 4095 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 4096 // CHECK3-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 4097 // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 4098 // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 4099 // CHECK3-NEXT: [[TMP0:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA20]] 4100 // CHECK3-NEXT: ret float [[TMP0]] 4101 // 4102 // 4103 // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC2ERKdS2_ 4104 // CHECK3-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { 4105 // CHECK3-NEXT: entry: 4106 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 4107 // CHECK3-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 4108 // CHECK3-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 4109 // CHECK3-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 4110 // CHECK3-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 4111 // CHECK3-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 4112 // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 4113 // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 4114 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] 4115 // CHECK3-NEXT: [[TMP1:%.*]] = load double, double* [[TMP0]], align 8, !tbaa [[TBAA22]] 4116 // CHECK3-NEXT: store double [[TMP1]], double* [[__RE_]], align 8, !tbaa [[TBAA24]] 4117 // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 4118 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] 4119 // CHECK3-NEXT: [[TMP3:%.*]] = load double, double* [[TMP2]], align 8, !tbaa [[TBAA22]] 4120 // CHECK3-NEXT: store double [[TMP3]], double* [[__IM_]], align 8, !tbaa [[TBAA26]] 4121 // CHECK3-NEXT: ret void 4122 // 4123 // 4124 // CHECK3-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4realEv 4125 // CHECK3-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 4126 // CHECK3-NEXT: entry: 4127 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 4128 // CHECK3-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 4129 // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 4130 // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 4131 // CHECK3-NEXT: [[TMP0:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA24]] 4132 // CHECK3-NEXT: ret double [[TMP0]] 4133 // 4134 // 4135 // CHECK3-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4imagEv 4136 // CHECK3-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { 4137 // CHECK3-NEXT: entry: 4138 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 4139 // CHECK3-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] 4140 // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 4141 // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 4142 // CHECK3-NEXT: [[TMP0:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA26]] 4143 // CHECK3-NEXT: ret double [[TMP0]] 4144 // 4145