1 // Test target codegen - host bc file has to be created first. 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc 3 // RUN: %clang_cc1 -debug-info-kind=limited -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 4 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc 5 // RUN: %clang_cc1 -debug-info-kind=limited -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 6 // expected-no-diagnostics 7 #ifndef HEADER 8 #define HEADER 9 10 template <typename tx, typename ty> 11 struct TT { 12 tx X; 13 ty Y; 14 }; 15 16 // TCHECK: [[TT:%.+]] = type { i64, i8 } 17 // TCHECK: [[S1:%.+]] = type { double } 18 19 int foo(int n, double *ptr) { 20 int a = 0; 21 short aa = 0; 22 float b[10]; 23 double c[5][10]; 24 TT<long long, char> d; 25 26 #pragma omp target firstprivate(a) map(tofrom \ 27 : b) 28 { 29 b[a] = a; 30 } 31 32 // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}([10 x float] addrspace(1)* noalias [[B_IN:%.+]], i{{[0-9]+}} [[A_IN:%.+]]) 33 // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, 34 // TCHECK-NOT: alloca i{{[0-9]+}}, 35 // TCHECK-64: call void @llvm.dbg.declare(metadata [10 x float] addrspace(1)** %{{.+}}, metadata !{{[0-9]+}}, metadata !DIExpression()) 36 // TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], 37 // TCHECK: ret void 38 39 #pragma omp target firstprivate(aa, b, c, d) 40 { 41 aa += 1; 42 b[2] = 1.0; 43 c[1][2] = 1.0; 44 d.X = 1; 45 d.Y = 1; 46 } 47 48 // make sure that firstprivate variables are generated in all cases and that we use those instances for operations inside the 49 // target region 50 // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(i{{[0-9]+}}{{.*}} [[A2_IN:%.+]], [10 x float]*{{.*}} [[B_IN:%.+]], [5 x [10 x double]]*{{.*}} [[C_IN:%.+]], [[TT]]*{{.*}} [[D_IN:%.+]]) 51 // TCHECK: [[A2_ADDR:%.+]] = alloca i{{[0-9]+}}, 52 // TCHECK: [[B_ADDR:%.+]] = alloca [10 x float]*, 53 // TCHECK: [[C_ADDR:%.+]] = alloca [5 x [10 x double]]*, 54 // TCHECK: [[D_ADDR:%.+]] = alloca [[TT]]*, 55 // TCHECK-NOT: alloca i{{[0-9]+}}, 56 // TCHECK: [[B_PRIV:%.+]] = alloca [10 x float], 57 // TCHECK: [[C_PRIV:%.+]] = alloca [5 x [10 x double]], 58 // TCHECK: [[D_PRIV:%.+]] = alloca [[TT]], 59 // TCHECK: store i{{[0-9]+}} [[A2_IN]], i{{[0-9]+}}* [[A2_ADDR]], 60 // TCHECK: store [10 x float]* [[B_IN]], [10 x float]** [[B_ADDR]], 61 // TCHECK: store [5 x [10 x double]]* [[C_IN]], [5 x [10 x double]]** [[C_ADDR]], 62 // TCHECK: store [[TT]]* [[D_IN]], [[TT]]** [[D_ADDR]], 63 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x float]*, [10 x float]** [[B_ADDR]], 64 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x float]*, [10 x float]** % 65 // TCHECK: [[C_ADDR_REF:%.+]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], 66 // TCHECK: [[C_ADDR_REF:%.+]] = load [5 x [10 x double]]*, [5 x [10 x double]]** % 67 // TCHECK: [[D_ADDR_REF:%.+]] = load [[TT]]*, [[TT]]** [[D_ADDR]], 68 // TCHECK: [[D_ADDR_REF:%.+]] = load [[TT]]*, [[TT]]** % 69 70 // firstprivate(aa): a_priv = a_in 71 72 // firstprivate(b): memcpy(b_priv,b_in) 73 // TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x float]* [[B_PRIV]] to i8* 74 // TCHECK: [[B_ADDR_REF_BCAST:%.+]] = bitcast [10 x float]* [[B_ADDR_REF]] to i8* 75 // TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[B_PRIV_BCAST]], i8* align {{[0-9]+}} [[B_ADDR_REF_BCAST]], {{.+}}) 76 77 // firstprivate(c) 78 // TCHECK: [[C_PRIV_BCAST:%.+]] = bitcast [5 x [10 x double]]* [[C_PRIV]] to i8* 79 // TCHECK: [[C_IN_BCAST:%.+]] = bitcast [5 x [10 x double]]* [[C_ADDR_REF]] to i8* 80 // TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[C_PRIV_BCAST]], i8* align {{[0-9]+}} [[C_IN_BCAST]],{{.+}}) 81 82 // firstprivate(d) 83 // TCHECK: [[D_PRIV_BCAST:%.+]] = bitcast [[TT]]* [[D_PRIV]] to i8* 84 // TCHECK: [[D_IN_BCAST:%.+]] = bitcast [[TT]]* [[D_ADDR_REF]] to i8* 85 // TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[D_PRIV_BCAST]], i8* align {{[0-9]+}} [[D_IN_BCAST]],{{.+}}) 86 87 // TCHECK: load i16, i16* [[A2_ADDR]], 88 89 #pragma omp target firstprivate(ptr) 90 { 91 ptr[0]++; 92 } 93 94 // TCHECK: define weak void @__omp_offloading_{{.+}}(double* [[PTR_IN:%.+]]) 95 // TCHECK: [[PTR_ADDR:%.+]] = alloca double*, 96 // TCHECK-NOT: alloca double*, 97 // TCHECK: store double* [[PTR_IN]], double** [[PTR_ADDR]], 98 // TCHECK: [[PTR_IN_REF:%.+]] = load double*, double** [[PTR_ADDR]], 99 // TCHECK-NOT: store double* [[PTR_IN_REF]], double** [[PTR_PRIV]], 100 101 return a; 102 } 103 104 template <typename tx> 105 tx ftemplate(int n) { 106 tx a = 0; 107 tx b[10]; 108 109 #pragma omp target firstprivate(a, b) 110 { 111 a += 1; 112 b[2] += 1; 113 } 114 115 return a; 116 } 117 118 static int fstatic(int n) { 119 int a = 0; 120 char aaa = 0; 121 int b[10]; 122 123 #pragma omp target firstprivate(a, aaa, b) 124 { 125 a += 1; 126 aaa += 1; 127 b[2] += 1; 128 } 129 130 return a; 131 } 132 133 // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(i{{[0-9]+}}{{.*}} [[A_IN:%.+]], i{{[0-9]+}}{{.*}} [[A3_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) 134 // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, 135 // TCHECK: [[A3_ADDR:%.+]] = alloca i{{[0-9]+}}, 136 // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, 137 // TCHECK-NOT: alloca i{{[0-9]+}}, 138 // TCHECK: [[B_PRIV:%.+]] = alloca [10 x i{{[0-9]+}}], 139 // TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], 140 // TCHECK: store i{{[0-9]+}} [[A3_IN]], i{{[0-9]+}}* [[A3_ADDR]], 141 // TCHECK: store [10 x i{{[0-9]+}}]* [[B_IN]], [10 x i{{[0-9]+}}]** [[B_ADDR]], 142 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** [[B_ADDR]], 143 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** % 144 145 // firstprivate(a): a_priv = a_in 146 147 // firstprivate(aaa) 148 149 // TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, i{{[0-9]+}}* 150 151 // firstprivate(b) 152 // TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_PRIV]] to i8* 153 // TCHECK: [[B_IN_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_ADDR_REF]] to i8* 154 // TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[B_PRIV_BCAST]], i8* align {{[0-9]+}} [[B_IN_BCAST]],{{.+}}) 155 156 // TCHECK: ret void 157 158 struct S1 { 159 double a; 160 161 int r1(int n) { 162 int b = n + 1; 163 164 #pragma omp target firstprivate(b) 165 { 166 this->a = (double)b + 1.5; 167 } 168 169 return (int)b; 170 } 171 172 // TCHECK: define internal void @__omp_offloading_{{.+}}([[S1]]* [[TH:%.+]], i{{[0-9]+}} [[B_IN:%.+]]) 173 // TCHECK: [[TH_ADDR:%.+]] = alloca [[S1]]*, 174 // TCHECK: [[B_ADDR:%.+]] = alloca i{{[0-9]+}}, 175 // TCHECK-NOT: alloca i{{[0-9]+}}, 176 177 // TCHECK: store [[S1]]* [[TH]], [[S1]]** [[TH_ADDR]], 178 // TCHECK: store i{{[0-9]+}} [[B_IN]], i{{[0-9]+}}* [[B_ADDR]], 179 // TCHECK: [[TH_ADDR_REF:%.+]] = load [[S1]]*, [[S1]]** [[TH_ADDR]], 180 // TCHECK-64: [[B_ADDR_CONV:%.+]] = bitcast i{{[0-9]+}}* [[B_ADDR]] to i{{[0-9]+}}* 181 182 // firstprivate(b) 183 // TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, i{{[0-9]+}}* 184 185 // TCHECK: ret void 186 }; 187 188 int bar(int n, double *ptr) { 189 int a = 0; 190 a += foo(n, ptr); 191 S1 S; 192 a += S.r1(n); 193 a += fstatic(n); 194 a += ftemplate<int>(n); 195 196 return a; 197 } 198 199 // template 200 201 // TCHECK: define internal void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) 202 // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, 203 // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, 204 // TCHECK-NOT: alloca i{{[0-9]+}}, 205 // TCHECK: [[B_PRIV:%.+]] = alloca [10 x i{{[0-9]+}}], 206 // TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], 207 // TCHECK: store [10 x i{{[0-9]+}}]* [[B_IN]], [10 x i{{[0-9]+}}]** [[B_ADDR]], 208 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** [[B_ADDR]], 209 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** % 210 211 // firstprivate(a) 212 // TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, i{{[0-9]+}}* 213 214 // firstprivate(b) 215 // TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_PRIV]] to i8* 216 // TCHECK: [[B_IN_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_ADDR_REF]] to i8* 217 // TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[B_PRIV_BCAST]], i8* align {{[0-9]+}} [[B_IN_BCAST]],{{.+}}) 218 219 // TCHECK: ret void 220 221 #endif 222 223 // TCHECK-DAG: distinct !DISubprogram(linkageName: "__omp_offloading_{{.+}}_worker", 224 // TCHECK-DAG: distinct !DISubprogram(linkageName: "__omp_offloading_{{.+}}_worker", 225 // TCHECK-DAG: distinct !DISubprogram(linkageName: "__omp_offloading_{{.+}}_worker", 226 // TCHECK-DAG: distinct !DISubprogram(linkageName: "__omp_offloading_{{.+}}_worker", 227 // TCHECK-DAG: distinct !DISubprogram(linkageName: "__omp_offloading_{{.+}}_worker", 228