1 // Test target codegen - host bc file has to be created first. 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc 3 // RUN: %clang_cc1 -debug-info-kind=limited -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64 4 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc 5 // RUN: %clang_cc1 -debug-info-kind=limited -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32 6 // expected-no-diagnostics 7 #ifndef HEADER 8 #define HEADER 9 10 template <typename tx, typename ty> 11 struct TT { 12 tx X; 13 ty Y; 14 }; 15 16 // TCHECK: [[TT:%.+]] = type { i64, i8 } 17 // TCHECK: [[S1:%.+]] = type { double } 18 19 // TCHECK: @{{.*}}_$_{{.*}} = common global i32 0, !dbg !{{[0-9]+}} 20 int foo(int n, double *ptr) { 21 int a = 0; 22 short aa = 0; 23 float b[10]; 24 double c[5][10]; 25 TT<long long, char> d; 26 27 #pragma omp target firstprivate(a) map(tofrom \ 28 : b) 29 { 30 b[a] = a; 31 } 32 33 // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}([10 x float] addrspace(1)* noalias [[B_IN:%.+]], i{{[0-9]+}} [[A_IN:%.+]]) 34 // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, 35 // TCHECK-NOT: alloca i{{[0-9]+}}, 36 // TCHECK-64: call void @llvm.dbg.declare(metadata [10 x float] addrspace(1)** %{{.+}}, metadata !{{[0-9]+}}, metadata !DIExpression()) 37 // TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], 38 // TCHECK: ret void 39 40 #pragma omp target firstprivate(aa, b, c, d) 41 { 42 aa += 1; 43 b[2] = 1.0; 44 c[1][2] = 1.0; 45 d.X = 1; 46 d.Y = 1; 47 } 48 49 // make sure that firstprivate variables are generated in all cases and that we use those instances for operations inside the 50 // target region 51 // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(i{{[0-9]+}}{{.*}} [[A2_IN:%.+]], [10 x float]*{{.*}} [[B_IN:%.+]], [5 x [10 x double]]*{{.*}} [[C_IN:%.+]], [[TT]]*{{.*}} [[D_IN:%.+]]) 52 // TCHECK: [[A2_ADDR:%.+]] = alloca i{{[0-9]+}}, 53 // TCHECK: [[B_ADDR:%.+]] = alloca [10 x float]*, 54 // TCHECK: [[C_ADDR:%.+]] = alloca [5 x [10 x double]]*, 55 // TCHECK: [[D_ADDR:%.+]] = alloca [[TT]]*, 56 // TCHECK-NOT: alloca i{{[0-9]+}}, 57 // TCHECK: [[B_PRIV:%.+]] = alloca [10 x float], 58 // TCHECK: [[C_PRIV:%.+]] = alloca [5 x [10 x double]], 59 // TCHECK: [[D_PRIV:%.+]] = alloca [[TT]], 60 // TCHECK: store i{{[0-9]+}} [[A2_IN]], i{{[0-9]+}}* [[A2_ADDR]], 61 // TCHECK: store [10 x float]* [[B_IN]], [10 x float]** [[B_ADDR]], 62 // TCHECK: store [5 x [10 x double]]* [[C_IN]], [5 x [10 x double]]** [[C_ADDR]], 63 // TCHECK: store [[TT]]* [[D_IN]], [[TT]]** [[D_ADDR]], 64 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x float]*, [10 x float]** [[B_ADDR]], 65 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x float]*, [10 x float]** % 66 // TCHECK: [[C_ADDR_REF:%.+]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], 67 // TCHECK: [[C_ADDR_REF:%.+]] = load [5 x [10 x double]]*, [5 x [10 x double]]** % 68 // TCHECK: [[D_ADDR_REF:%.+]] = load [[TT]]*, [[TT]]** [[D_ADDR]], 69 // TCHECK: [[D_ADDR_REF:%.+]] = load [[TT]]*, [[TT]]** % 70 71 // firstprivate(aa): a_priv = a_in 72 73 // firstprivate(b): memcpy(b_priv,b_in) 74 // TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x float]* [[B_PRIV]] to i8* 75 // TCHECK: [[B_ADDR_REF_BCAST:%.+]] = bitcast [10 x float]* [[B_ADDR_REF]] to i8* 76 // TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[B_PRIV_BCAST]], i8* align {{[0-9]+}} [[B_ADDR_REF_BCAST]], {{.+}}) 77 78 // firstprivate(c) 79 // TCHECK: [[C_PRIV_BCAST:%.+]] = bitcast [5 x [10 x double]]* [[C_PRIV]] to i8* 80 // TCHECK: [[C_IN_BCAST:%.+]] = bitcast [5 x [10 x double]]* [[C_ADDR_REF]] to i8* 81 // TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[C_PRIV_BCAST]], i8* align {{[0-9]+}} [[C_IN_BCAST]],{{.+}}) 82 83 // firstprivate(d) 84 // TCHECK: [[D_PRIV_BCAST:%.+]] = bitcast [[TT]]* [[D_PRIV]] to i8* 85 // TCHECK: [[D_IN_BCAST:%.+]] = bitcast [[TT]]* [[D_ADDR_REF]] to i8* 86 // TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[D_PRIV_BCAST]], i8* align {{[0-9]+}} [[D_IN_BCAST]],{{.+}}) 87 88 // TCHECK: load i16, i16* [[A2_ADDR]], 89 90 #pragma omp target firstprivate(ptr) 91 { 92 ptr[0]++; 93 } 94 95 // TCHECK: define weak void @__omp_offloading_{{.+}}(double* [[PTR_IN:%.+]]) 96 // TCHECK: [[PTR_ADDR:%.+]] = alloca double*, 97 // TCHECK-NOT: alloca double*, 98 // TCHECK: store double* [[PTR_IN]], double** [[PTR_ADDR]], 99 // TCHECK: [[PTR_IN_REF:%.+]] = load double*, double** [[PTR_ADDR]], 100 // TCHECK-NOT: store double* [[PTR_IN_REF]], double** [[PTR_PRIV]], 101 102 return a; 103 } 104 105 template <typename tx> 106 tx ftemplate(int n) { 107 tx a = 0; 108 tx b[10]; 109 110 #pragma omp target firstprivate(a, b) 111 { 112 a += 1; 113 b[2] += 1; 114 } 115 116 return a; 117 } 118 119 static int fstatic(int n) { 120 int a = 0; 121 char aaa = 0; 122 int b[10]; 123 124 #pragma omp target firstprivate(a, aaa, b) 125 { 126 a += 1; 127 aaa += 1; 128 b[2] += 1; 129 } 130 131 return a; 132 } 133 134 // TCHECK: define {{.*}}void @__omp_offloading_{{.+}}(i{{[0-9]+}}{{.*}} [[A_IN:%.+]], i{{[0-9]+}}{{.*}} [[A3_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) 135 // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, 136 // TCHECK: [[A3_ADDR:%.+]] = alloca i{{[0-9]+}}, 137 // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, 138 // TCHECK-NOT: alloca i{{[0-9]+}}, 139 // TCHECK: [[B_PRIV:%.+]] = alloca [10 x i{{[0-9]+}}], 140 // TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], 141 // TCHECK: store i{{[0-9]+}} [[A3_IN]], i{{[0-9]+}}* [[A3_ADDR]], 142 // TCHECK: store [10 x i{{[0-9]+}}]* [[B_IN]], [10 x i{{[0-9]+}}]** [[B_ADDR]], 143 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** [[B_ADDR]], 144 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** % 145 146 // firstprivate(a): a_priv = a_in 147 148 // firstprivate(aaa) 149 150 // TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, i{{[0-9]+}}* 151 152 // firstprivate(b) 153 // TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_PRIV]] to i8* 154 // TCHECK: [[B_IN_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_ADDR_REF]] to i8* 155 // TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[B_PRIV_BCAST]], i8* align {{[0-9]+}} [[B_IN_BCAST]],{{.+}}) 156 157 // TCHECK: ret void 158 159 struct S1 { 160 double a; 161 162 int r1(int n) { 163 int b = n + 1; 164 165 #pragma omp target firstprivate(b) 166 { 167 this->a = (double)b + 1.5; 168 } 169 170 return (int)b; 171 } 172 173 // TCHECK: define internal void @__omp_offloading_{{.+}}([[S1]]* [[TH:%.+]], i{{[0-9]+}} [[B_IN:%.+]]) 174 // TCHECK: [[TH_ADDR:%.+]] = alloca [[S1]]*, 175 // TCHECK: [[B_ADDR:%.+]] = alloca i{{[0-9]+}}, 176 // TCHECK-NOT: alloca i{{[0-9]+}}, 177 178 // TCHECK: store [[S1]]* [[TH]], [[S1]]** [[TH_ADDR]], 179 // TCHECK: store i{{[0-9]+}} [[B_IN]], i{{[0-9]+}}* [[B_ADDR]], 180 // TCHECK: [[TH_ADDR_REF:%.+]] = load [[S1]]*, [[S1]]** [[TH_ADDR]], 181 // TCHECK-64: [[B_ADDR_CONV:%.+]] = bitcast i{{[0-9]+}}* [[B_ADDR]] to i{{[0-9]+}}* 182 183 // firstprivate(b) 184 // TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, i{{[0-9]+}}* 185 186 // TCHECK: ret void 187 }; 188 189 int bar(int n, double *ptr) { 190 int a = 0; 191 a += foo(n, ptr); 192 S1 S; 193 a += S.r1(n); 194 a += fstatic(n); 195 a += ftemplate<int>(n); 196 197 return a; 198 } 199 200 // template 201 202 // TCHECK: define internal void @__omp_offloading_{{.+}}(i{{[0-9]+}} [[A_IN:%.+]], [10 x i{{[0-9]+}}]*{{.+}} [[B_IN:%.+]]) 203 // TCHECK: [[A_ADDR:%.+]] = alloca i{{[0-9]+}}, 204 // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*, 205 // TCHECK-NOT: alloca i{{[0-9]+}}, 206 // TCHECK: [[B_PRIV:%.+]] = alloca [10 x i{{[0-9]+}}], 207 // TCHECK: store i{{[0-9]+}} [[A_IN]], i{{[0-9]+}}* [[A_ADDR]], 208 // TCHECK: store [10 x i{{[0-9]+}}]* [[B_IN]], [10 x i{{[0-9]+}}]** [[B_ADDR]], 209 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** [[B_ADDR]], 210 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** % 211 212 // firstprivate(a) 213 // TCHECK-NOT: store i{{[0-9]+}} %{{.+}}, i{{[0-9]+}}* 214 215 // firstprivate(b) 216 // TCHECK: [[B_PRIV_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_PRIV]] to i8* 217 // TCHECK: [[B_IN_BCAST:%.+]] = bitcast [10 x i{{[0-9]+}}]* [[B_ADDR_REF]] to i8* 218 // TCHECK: call void @llvm.memcpy.{{.+}}(i8* align {{[0-9]+}} [[B_PRIV_BCAST]], i8* align {{[0-9]+}} [[B_IN_BCAST]],{{.+}}) 219 220 // TCHECK: ret void 221 222 #endif 223 224 // TCHECK-DAG: distinct !DISubprogram(linkageName: "__omp_offloading_{{.+}}_worker", 225 // TCHECK-DAG: distinct !DISubprogram(linkageName: "__omp_offloading_{{.+}}_worker", 226 // TCHECK-DAG: distinct !DISubprogram(linkageName: "__omp_offloading_{{.+}}_worker", 227 // TCHECK-DAG: distinct !DISubprogram(linkageName: "__omp_offloading_{{.+}}_worker", 228 // TCHECK-DAG: distinct !DISubprogram(linkageName: "__omp_offloading_{{.+}}_worker", 229