1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test target codegen - host bc file has to be created first. 3 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc 4 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK4 5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK5 7 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK6 8 9 // expected-no-diagnostics 10 #ifndef HEADER 11 #define HEADER 12 13 int a; 14 15 int foo(int *a); 16 17 int main(int argc, char **argv) { 18 int b[10], c[10], d[10]; 19 #pragma omp target teams map(tofrom:a) 20 #pragma omp distribute parallel for firstprivate(b) lastprivate(c) if(a) 21 for (int i= 0; i < argc; ++i) 22 a = foo(&i) + foo(&a) + foo(&b[i]) + foo(&c[i]) + foo(&d[i]); 23 return 0; 24 } 25 26 #endif 27 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 28 // CHECK1-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 29 // CHECK1-NEXT: entry: 30 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 31 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 32 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 33 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 34 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 35 // CHECK1-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 36 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 37 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 38 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 39 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 40 // CHECK1-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 41 // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 42 // CHECK1-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 43 // CHECK1-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 44 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 45 // CHECK1-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 46 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 47 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 48 // CHECK1-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 49 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 50 // CHECK1-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 51 // CHECK1-NEXT: br label [[DOTEXECUTE:%.*]] 52 // CHECK1: .execute: 53 // CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 54 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV]], align 8 55 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32* 56 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 57 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8 58 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 59 // CHECK1-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i64 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 60 // CHECK1-NEXT: br label [[DOTOMP_DEINIT:%.*]] 61 // CHECK1: .omp.deinit: 62 // CHECK1-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 63 // CHECK1-NEXT: br label [[DOTEXIT:%.*]] 64 // CHECK1: .exit: 65 // CHECK1-NEXT: ret void 66 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__ 67 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 68 // CHECK1-NEXT: entry: 69 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 70 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 71 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 72 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 73 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 74 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 75 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 76 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 77 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 78 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 79 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 80 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 81 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 82 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 83 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 84 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 85 // CHECK1-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 86 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 87 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 8 88 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 89 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 90 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 91 // CHECK1-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 92 // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 93 // CHECK1-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 94 // CHECK1-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 95 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 96 // CHECK1-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 97 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 98 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 99 // CHECK1-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 100 // CHECK1-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 101 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8 102 // CHECK1-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 103 // CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 104 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i64 0 105 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 106 // CHECK1-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 107 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 108 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 109 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 110 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 111 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 112 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 113 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 114 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 115 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 116 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 117 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 118 // CHECK1: omp.precond.then: 119 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 120 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 121 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 122 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 123 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 124 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 125 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 126 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 40, i1 false) 127 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 128 // CHECK1-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 129 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 130 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 131 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 132 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 133 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 134 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 135 // CHECK1: cond.true: 136 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 137 // CHECK1-NEXT: br label [[COND_END:%.*]] 138 // CHECK1: cond.false: 139 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 140 // CHECK1-NEXT: br label [[COND_END]] 141 // CHECK1: cond.end: 142 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 143 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 144 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 145 // CHECK1-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 146 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 147 // CHECK1: omp.inner.for.cond: 148 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 149 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 150 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 151 // CHECK1-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 152 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 153 // CHECK1: omp.inner.for.body: 154 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 155 // CHECK1-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 156 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 157 // CHECK1-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64 158 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 159 // CHECK1-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP25]] to i8* 160 // CHECK1-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8 161 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 162 // CHECK1-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP27]] to i8* 163 // CHECK1-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8 164 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 165 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast i32* [[CONV]] to i8* 166 // CHECK1-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 8 167 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 168 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i32* [[TMP2]] to i8* 169 // CHECK1-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 8 170 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4 171 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 172 // CHECK1-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 8 173 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 5 174 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 175 // CHECK1-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 8 176 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 6 177 // CHECK1-NEXT: [[TMP41:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 178 // CHECK1-NEXT: store i8* [[TMP41]], i8** [[TMP40]], align 8 179 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP2]], align 4 180 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP42]], 0 181 // CHECK1-NEXT: [[TMP43:%.*]] = zext i1 [[TOBOOL]] to i32 182 // CHECK1-NEXT: [[TMP44:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 183 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[TMP44]], align 4 184 // CHECK1-NEXT: [[TMP46:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 185 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP45]], i32 [[TMP43]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP46]], i64 7) 186 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 187 // CHECK1: omp.inner.for.inc: 188 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 189 // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 190 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 191 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 192 // CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 193 // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 194 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 195 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 196 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 197 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 198 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP51]], [[TMP52]] 199 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 200 // CHECK1-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 201 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 202 // CHECK1-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP53]], [[TMP54]] 203 // CHECK1-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 204 // CHECK1: cond.true12: 205 // CHECK1-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 206 // CHECK1-NEXT: br label [[COND_END14:%.*]] 207 // CHECK1: cond.false13: 208 // CHECK1-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 209 // CHECK1-NEXT: br label [[COND_END14]] 210 // CHECK1: cond.end14: 211 // CHECK1-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP55]], [[COND_TRUE12]] ], [ [[TMP56]], [[COND_FALSE13]] ] 212 // CHECK1-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 213 // CHECK1-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 214 // CHECK1-NEXT: store i32 [[TMP57]], i32* [[DOTOMP_IV]], align 4 215 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 216 // CHECK1: omp.inner.for.end: 217 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 218 // CHECK1: omp.loop.exit: 219 // CHECK1-NEXT: [[TMP58:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 220 // CHECK1-NEXT: [[TMP59:%.*]] = load i32, i32* [[TMP58]], align 4 221 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP59]]) 222 // CHECK1-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 223 // CHECK1-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 224 // CHECK1-NEXT: br i1 [[TMP61]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 225 // CHECK1: .omp.lastprivate.then: 226 // CHECK1-NEXT: [[TMP62:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 227 // CHECK1-NEXT: [[TMP63:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 228 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP62]], i8* align 4 [[TMP63]], i64 40, i1 false) 229 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 230 // CHECK1: .omp.lastprivate.done: 231 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 232 // CHECK1: omp.precond.end: 233 // CHECK1-NEXT: [[TMP64:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 234 // CHECK1-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP64]]) 235 // CHECK1-NEXT: ret void 236 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1 237 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 238 // CHECK1-NEXT: entry: 239 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 240 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 241 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 242 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 243 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 244 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 245 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 246 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 247 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 248 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 249 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 250 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 251 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 252 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 253 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 254 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 255 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 256 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 257 // CHECK1-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 258 // CHECK1-NEXT: [[C5:%.*]] = alloca [10 x i32], align 4 259 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4 260 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 261 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 262 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 263 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 264 // CHECK1-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 265 // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 266 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 267 // CHECK1-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 268 // CHECK1-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 269 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 270 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 271 // CHECK1-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 272 // CHECK1-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 273 // CHECK1-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 274 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 275 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 276 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 277 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 278 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 279 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 280 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 281 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 282 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 283 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 284 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 285 // CHECK1: omp.precond.then: 286 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 287 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 288 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 289 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 290 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 291 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 292 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP10]] to i32 293 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 294 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 295 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 296 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 297 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 298 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 299 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 40, i1 false) 300 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 301 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 302 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 303 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 304 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 305 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 306 // CHECK1: omp.inner.for.cond: 307 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 308 // CHECK1-NEXT: [[CONV7:%.*]] = sext i32 [[TMP16]] to i64 309 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 310 // CHECK1-NEXT: [[CMP8:%.*]] = icmp ule i64 [[CONV7]], [[TMP17]] 311 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 312 // CHECK1: omp.inner.for.body: 313 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 314 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 315 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 316 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 317 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I6]]) #[[ATTR5:[0-9]+]] 318 // CHECK1-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 319 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[CALL]], [[CALL9]] 320 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 321 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 322 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B4]], i64 0, i64 [[IDXPROM]] 323 // CHECK1-NEXT: [[CALL11:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 324 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD10]], [[CALL11]] 325 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4 326 // CHECK1-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP20]] to i64 327 // CHECK1-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C5]], i64 0, i64 [[IDXPROM13]] 328 // CHECK1-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 329 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD12]], [[CALL15]] 330 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4 331 // CHECK1-NEXT: [[IDXPROM17:%.*]] = sext i32 [[TMP21]] to i64 332 // CHECK1-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i64 0, i64 [[IDXPROM17]] 333 // CHECK1-NEXT: [[CALL19:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX18]]) #[[ATTR5]] 334 // CHECK1-NEXT: [[ADD20:%.*]] = add nsw i32 [[ADD16]], [[CALL19]] 335 // CHECK1-NEXT: store i32 [[ADD20]], i32* [[TMP1]], align 4 336 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 337 // CHECK1: omp.body.continue: 338 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 339 // CHECK1: omp.inner.for.inc: 340 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 341 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 342 // CHECK1-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 343 // CHECK1-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 344 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 345 // CHECK1: omp.inner.for.end: 346 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 347 // CHECK1: omp.loop.exit: 348 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 349 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 350 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 351 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 352 // CHECK1-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 353 // CHECK1-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 354 // CHECK1: .omp.lastprivate.then: 355 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 356 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C5]] to i8* 357 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 40, i1 false) 358 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 359 // CHECK1: .omp.lastprivate.done: 360 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 361 // CHECK1: omp.precond.end: 362 // CHECK1-NEXT: ret void 363 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 364 // CHECK2-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 365 // CHECK2-NEXT: entry: 366 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 367 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 368 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 369 // CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 370 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 371 // CHECK2-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 372 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 373 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 374 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 375 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 376 // CHECK2-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 377 // CHECK2-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 378 // CHECK2-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 379 // CHECK2-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 380 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 381 // CHECK2-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 382 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 383 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 384 // CHECK2-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 385 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 386 // CHECK2-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 387 // CHECK2-NEXT: br label [[DOTEXECUTE:%.*]] 388 // CHECK2: .execute: 389 // CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 390 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV]], align 8 391 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32* 392 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 393 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8 394 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 395 // CHECK2-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i64 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 396 // CHECK2-NEXT: br label [[DOTOMP_DEINIT:%.*]] 397 // CHECK2: .omp.deinit: 398 // CHECK2-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 399 // CHECK2-NEXT: br label [[DOTEXIT:%.*]] 400 // CHECK2: .exit: 401 // CHECK2-NEXT: ret void 402 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__ 403 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 404 // CHECK2-NEXT: entry: 405 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 406 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 407 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 408 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 409 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 410 // CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 411 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 412 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 413 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 414 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 415 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 416 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 417 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 418 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 419 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 420 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 421 // CHECK2-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 422 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4 423 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 8 424 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 425 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 426 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 427 // CHECK2-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 428 // CHECK2-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 429 // CHECK2-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 430 // CHECK2-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 431 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 432 // CHECK2-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 433 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 434 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 435 // CHECK2-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 436 // CHECK2-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i64 40, i16 1) 437 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty* 438 // CHECK2-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0 439 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 440 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4 441 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 442 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 443 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 444 // CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 445 // CHECK2-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 446 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 447 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 448 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 449 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 450 // CHECK2: omp.precond.then: 451 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 452 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 453 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 454 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 455 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 456 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 457 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 458 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 40, i1 false) 459 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 460 // CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 461 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 462 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 463 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 464 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 465 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 466 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 467 // CHECK2: cond.true: 468 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 469 // CHECK2-NEXT: br label [[COND_END:%.*]] 470 // CHECK2: cond.false: 471 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 472 // CHECK2-NEXT: br label [[COND_END]] 473 // CHECK2: cond.end: 474 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 475 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 476 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 477 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 478 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 479 // CHECK2: omp.inner.for.cond: 480 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 481 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 482 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], 1 483 // CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP19]], [[ADD]] 484 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 485 // CHECK2: omp.inner.for.body: 486 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 487 // CHECK2-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 488 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 489 // CHECK2-NEXT: [[TMP24:%.*]] = zext i32 [[TMP23]] to i64 490 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 491 // CHECK2-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP22]] to i8* 492 // CHECK2-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8 493 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 494 // CHECK2-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP24]] to i8* 495 // CHECK2-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8 496 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 497 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i32* [[CONV]] to i8* 498 // CHECK2-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8 499 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 500 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast i32* [[TMP2]] to i8* 501 // CHECK2-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 8 502 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4 503 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 504 // CHECK2-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 8 505 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 5 506 // CHECK2-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 507 // CHECK2-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 8 508 // CHECK2-NEXT: [[TMP37:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 6 509 // CHECK2-NEXT: [[TMP38:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 510 // CHECK2-NEXT: store i8* [[TMP38]], i8** [[TMP37]], align 8 511 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[TMP2]], align 4 512 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP39]], 0 513 // CHECK2-NEXT: [[TMP40:%.*]] = zext i1 [[TOBOOL]] to i32 514 // CHECK2-NEXT: [[TMP41:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 515 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP41]], align 4 516 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 517 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP42]], i32 [[TMP40]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP43]], i64 7) 518 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 519 // CHECK2: omp.inner.for.inc: 520 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 521 // CHECK2-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 522 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 523 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 524 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 525 // CHECK2-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 526 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 527 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 528 // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 529 // CHECK2-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 530 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP48]], [[TMP49]] 531 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 532 // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 533 // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 534 // CHECK2-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP50]], [[TMP51]] 535 // CHECK2-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 536 // CHECK2: cond.true12: 537 // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 538 // CHECK2-NEXT: br label [[COND_END14:%.*]] 539 // CHECK2: cond.false13: 540 // CHECK2-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 541 // CHECK2-NEXT: br label [[COND_END14]] 542 // CHECK2: cond.end14: 543 // CHECK2-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP52]], [[COND_TRUE12]] ], [ [[TMP53]], [[COND_FALSE13]] ] 544 // CHECK2-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 545 // CHECK2-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 546 // CHECK2-NEXT: store i32 [[TMP54]], i32* [[DOTOMP_IV]], align 4 547 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 548 // CHECK2: omp.inner.for.end: 549 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 550 // CHECK2: omp.loop.exit: 551 // CHECK2-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 552 // CHECK2-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4 553 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP56]]) 554 // CHECK2-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 555 // CHECK2-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 556 // CHECK2-NEXT: br i1 [[TMP58]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 557 // CHECK2: .omp.lastprivate.then: 558 // CHECK2-NEXT: [[TMP59:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 559 // CHECK2-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 560 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP59]], i8* align 4 [[TMP60]], i64 40, i1 false) 561 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 562 // CHECK2: .omp.lastprivate.done: 563 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 564 // CHECK2: omp.precond.end: 565 // CHECK2-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP4]]) 566 // CHECK2-NEXT: ret void 567 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1 568 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 569 // CHECK2-NEXT: entry: 570 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 571 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 572 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 573 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 574 // CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 575 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 576 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 577 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 578 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 579 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 580 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 581 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 582 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 583 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 584 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 585 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 586 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 587 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 588 // CHECK2-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 589 // CHECK2-NEXT: [[C5:%.*]] = alloca [10 x i32], align 4 590 // CHECK2-NEXT: [[I6:%.*]] = alloca i32, align 4 591 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 592 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 593 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 594 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 595 // CHECK2-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 596 // CHECK2-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 597 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 598 // CHECK2-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 599 // CHECK2-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 600 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 601 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 602 // CHECK2-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 603 // CHECK2-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 604 // CHECK2-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 605 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 606 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 607 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 608 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 609 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 610 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 611 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 612 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 613 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 614 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 615 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 616 // CHECK2: omp.precond.then: 617 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 618 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 619 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 620 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 621 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 622 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 623 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP10]] to i32 624 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 625 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 626 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 627 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 628 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 629 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 630 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 40, i1 false) 631 // CHECK2-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 632 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 633 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 634 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 635 // CHECK2-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 636 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 637 // CHECK2: omp.inner.for.cond: 638 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 639 // CHECK2-NEXT: [[CONV7:%.*]] = sext i32 [[TMP16]] to i64 640 // CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 641 // CHECK2-NEXT: [[CMP8:%.*]] = icmp ule i64 [[CONV7]], [[TMP17]] 642 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 643 // CHECK2: omp.inner.for.body: 644 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 645 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 646 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 647 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 648 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I6]]) #[[ATTR5:[0-9]+]] 649 // CHECK2-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 650 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[CALL]], [[CALL9]] 651 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 652 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 653 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B4]], i64 0, i64 [[IDXPROM]] 654 // CHECK2-NEXT: [[CALL11:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 655 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD10]], [[CALL11]] 656 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4 657 // CHECK2-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP20]] to i64 658 // CHECK2-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C5]], i64 0, i64 [[IDXPROM13]] 659 // CHECK2-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 660 // CHECK2-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD12]], [[CALL15]] 661 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4 662 // CHECK2-NEXT: [[IDXPROM17:%.*]] = sext i32 [[TMP21]] to i64 663 // CHECK2-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i64 0, i64 [[IDXPROM17]] 664 // CHECK2-NEXT: [[CALL19:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX18]]) #[[ATTR5]] 665 // CHECK2-NEXT: [[ADD20:%.*]] = add nsw i32 [[ADD16]], [[CALL19]] 666 // CHECK2-NEXT: store i32 [[ADD20]], i32* [[TMP1]], align 4 667 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 668 // CHECK2: omp.body.continue: 669 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 670 // CHECK2: omp.inner.for.inc: 671 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 672 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 673 // CHECK2-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 674 // CHECK2-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 675 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 676 // CHECK2: omp.inner.for.end: 677 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 678 // CHECK2: omp.loop.exit: 679 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 680 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 681 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 682 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 683 // CHECK2-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 684 // CHECK2-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 685 // CHECK2: .omp.lastprivate.then: 686 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 687 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C5]] to i8* 688 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 40, i1 false) 689 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 690 // CHECK2: .omp.lastprivate.done: 691 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 692 // CHECK2: omp.precond.end: 693 // CHECK2-NEXT: ret void 694 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 695 // CHECK3-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 696 // CHECK3-NEXT: entry: 697 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 698 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 699 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 700 // CHECK3-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 701 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 702 // CHECK3-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 703 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 704 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 705 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 706 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 707 // CHECK3-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 708 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 709 // CHECK3-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 710 // CHECK3-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 711 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 712 // CHECK3-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 713 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 714 // CHECK3-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 715 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 716 // CHECK3-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 717 // CHECK3-NEXT: br label [[DOTEXECUTE:%.*]] 718 // CHECK3: .execute: 719 // CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 720 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 721 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 722 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 723 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 724 // CHECK3-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 725 // CHECK3-NEXT: br label [[DOTOMP_DEINIT:%.*]] 726 // CHECK3: .omp.deinit: 727 // CHECK3-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 728 // CHECK3-NEXT: br label [[DOTEXIT:%.*]] 729 // CHECK3: .exit: 730 // CHECK3-NEXT: ret void 731 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__ 732 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 733 // CHECK3-NEXT: entry: 734 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 735 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 736 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 737 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 738 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 739 // CHECK3-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 740 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 741 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 742 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 743 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 744 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 745 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 746 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 747 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 748 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 749 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 750 // CHECK3-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 751 // CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 4 752 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 753 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 754 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 755 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 756 // CHECK3-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 757 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 758 // CHECK3-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 759 // CHECK3-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 760 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 761 // CHECK3-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 762 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 763 // CHECK3-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 764 // CHECK3-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 765 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4 766 // CHECK3-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 767 // CHECK3-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4 768 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i32 0 769 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 770 // CHECK3-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 771 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 772 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 773 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 774 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 775 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 776 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 777 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 778 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 779 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 780 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 781 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 782 // CHECK3: omp.precond.then: 783 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 784 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 785 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 786 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 787 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 788 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 789 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 790 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 40, i1 false) 791 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 792 // CHECK3-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 793 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 794 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 795 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 796 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 797 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 798 // CHECK3-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 799 // CHECK3: cond.true: 800 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 801 // CHECK3-NEXT: br label [[COND_END:%.*]] 802 // CHECK3: cond.false: 803 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 804 // CHECK3-NEXT: br label [[COND_END]] 805 // CHECK3: cond.end: 806 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 807 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 808 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 809 // CHECK3-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 810 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 811 // CHECK3: omp.inner.for.cond: 812 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 813 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 814 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 815 // CHECK3-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 816 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 817 // CHECK3: omp.inner.for.body: 818 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 819 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 820 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 821 // CHECK3-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP24]] to i8* 822 // CHECK3-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4 823 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 824 // CHECK3-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP25]] to i8* 825 // CHECK3-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4 826 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 827 // CHECK3-NEXT: [[TMP31:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 828 // CHECK3-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4 829 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 830 // CHECK3-NEXT: [[TMP33:%.*]] = bitcast i32* [[TMP2]] to i8* 831 // CHECK3-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 4 832 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 833 // CHECK3-NEXT: [[TMP35:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 834 // CHECK3-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 4 835 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 836 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 837 // CHECK3-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 4 838 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 839 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 840 // CHECK3-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 4 841 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP2]], align 4 842 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP40]], 0 843 // CHECK3-NEXT: [[TMP41:%.*]] = zext i1 [[TOBOOL]] to i32 844 // CHECK3-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 845 // CHECK3-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4 846 // CHECK3-NEXT: [[TMP44:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 847 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP43]], i32 [[TMP41]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP44]], i32 7) 848 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 849 // CHECK3: omp.inner.for.inc: 850 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 851 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 852 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP45]], [[TMP46]] 853 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 854 // CHECK3-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 855 // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 856 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 857 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 858 // CHECK3-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 859 // CHECK3-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 860 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 861 // CHECK3-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 862 // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 863 // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 864 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP51]], [[TMP52]] 865 // CHECK3-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 866 // CHECK3: cond.true12: 867 // CHECK3-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 868 // CHECK3-NEXT: br label [[COND_END14:%.*]] 869 // CHECK3: cond.false13: 870 // CHECK3-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 871 // CHECK3-NEXT: br label [[COND_END14]] 872 // CHECK3: cond.end14: 873 // CHECK3-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP53]], [[COND_TRUE12]] ], [ [[TMP54]], [[COND_FALSE13]] ] 874 // CHECK3-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 875 // CHECK3-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 876 // CHECK3-NEXT: store i32 [[TMP55]], i32* [[DOTOMP_IV]], align 4 877 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 878 // CHECK3: omp.inner.for.end: 879 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 880 // CHECK3: omp.loop.exit: 881 // CHECK3-NEXT: [[TMP56:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 882 // CHECK3-NEXT: [[TMP57:%.*]] = load i32, i32* [[TMP56]], align 4 883 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP57]]) 884 // CHECK3-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 885 // CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 886 // CHECK3-NEXT: br i1 [[TMP59]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 887 // CHECK3: .omp.lastprivate.then: 888 // CHECK3-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 889 // CHECK3-NEXT: [[TMP61:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 890 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP60]], i8* align 4 [[TMP61]], i32 40, i1 false) 891 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 892 // CHECK3: .omp.lastprivate.done: 893 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 894 // CHECK3: omp.precond.end: 895 // CHECK3-NEXT: [[TMP62:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 896 // CHECK3-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP62]]) 897 // CHECK3-NEXT: ret void 898 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1 899 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 900 // CHECK3-NEXT: entry: 901 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 902 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 903 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 904 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 905 // CHECK3-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 906 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 907 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 908 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 909 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 910 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 911 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 912 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 913 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 914 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 915 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 916 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 917 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 918 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 919 // CHECK3-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 920 // CHECK3-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 921 // CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 4 922 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 923 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 924 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 925 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 926 // CHECK3-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 927 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 928 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 929 // CHECK3-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 930 // CHECK3-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 931 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 932 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 933 // CHECK3-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 934 // CHECK3-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 935 // CHECK3-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 936 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 937 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 938 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 939 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 940 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 941 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 942 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 943 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 944 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 945 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 946 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 947 // CHECK3: omp.precond.then: 948 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 949 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 950 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 951 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 952 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 953 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 954 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 955 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 956 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 957 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 958 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 959 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 960 // CHECK3-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 961 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 962 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 963 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 964 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 965 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 966 // CHECK3: omp.inner.for.cond: 967 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 968 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 969 // CHECK3-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 970 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 971 // CHECK3: omp.inner.for.body: 972 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 973 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 974 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 975 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 976 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 977 // CHECK3-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 978 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 979 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 980 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 981 // CHECK3-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 982 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 983 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 984 // CHECK3-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 985 // CHECK3-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 986 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 987 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 988 // CHECK3-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 989 // CHECK3-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 990 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 991 // CHECK3-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 992 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 993 // CHECK3: omp.body.continue: 994 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 995 // CHECK3: omp.inner.for.inc: 996 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 997 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 998 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 999 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 1000 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1001 // CHECK3: omp.inner.for.end: 1002 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1003 // CHECK3: omp.loop.exit: 1004 // CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1005 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1006 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1007 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1008 // CHECK3-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 1009 // CHECK3-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1010 // CHECK3: .omp.lastprivate.then: 1011 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1012 // CHECK3-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 1013 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 1014 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1015 // CHECK3: .omp.lastprivate.done: 1016 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1017 // CHECK3: omp.precond.end: 1018 // CHECK3-NEXT: ret void 1019 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 1020 // CHECK7-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 1021 // CHECK7-NEXT: entry: 1022 // CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1023 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 1024 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1025 // CHECK7-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 1026 // CHECK7-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 1027 // CHECK7-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 1028 // CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 1029 // CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1030 // CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 1031 // CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1032 // CHECK7-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 1033 // CHECK7-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1034 // CHECK7-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 1035 // CHECK7-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 1036 // CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1037 // CHECK7-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 1038 // CHECK7-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1039 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 1040 // CHECK7-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 1041 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1042 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 1043 // CHECK7-NEXT: br label [[DOTEXECUTE:%.*]] 1044 // CHECK7: .execute: 1045 // CHECK7-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 1046 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV]], align 8 1047 // CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32* 1048 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1049 // CHECK7-NEXT: [[TMP6:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8 1050 // CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 1051 // CHECK7-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i64 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 1052 // CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]] 1053 // CHECK7: .omp.deinit: 1054 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 1055 // CHECK7-NEXT: br label [[DOTEXIT:%.*]] 1056 // CHECK7: .exit: 1057 // CHECK7-NEXT: ret void 1058 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__ 1059 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1060 // CHECK7-NEXT: entry: 1061 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1062 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1063 // CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1064 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 1065 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1066 // CHECK7-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 1067 // CHECK7-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 1068 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1069 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 1070 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1071 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1072 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1073 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1074 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1075 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1076 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1077 // CHECK7-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 1078 // CHECK7-NEXT: [[I5:%.*]] = alloca i32, align 4 1079 // CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 8 1080 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1081 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1082 // CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1083 // CHECK7-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 1084 // CHECK7-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1085 // CHECK7-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 1086 // CHECK7-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 1087 // CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1088 // CHECK7-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 1089 // CHECK7-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1090 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 1091 // CHECK7-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 1092 // CHECK7-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 1093 // CHECK7-NEXT: [[TMP5:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8 1094 // CHECK7-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 1095 // CHECK7-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 1096 // CHECK7-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i64 0 1097 // CHECK7-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 1098 // CHECK7-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 1099 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 1100 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 1101 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1102 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 1103 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1104 // CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1105 // CHECK7-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1106 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 1107 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1108 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 1109 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1110 // CHECK7: omp.precond.then: 1111 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1112 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1113 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 1114 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1115 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1116 // CHECK7-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1117 // CHECK7-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 1118 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 40, i1 false) 1119 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1120 // CHECK7-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1121 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1122 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 1123 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1124 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1125 // CHECK7-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 1126 // CHECK7-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1127 // CHECK7: cond.true: 1128 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1129 // CHECK7-NEXT: br label [[COND_END:%.*]] 1130 // CHECK7: cond.false: 1131 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1132 // CHECK7-NEXT: br label [[COND_END]] 1133 // CHECK7: cond.end: 1134 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 1135 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1136 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1137 // CHECK7-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 1138 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1139 // CHECK7: omp.inner.for.cond: 1140 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1141 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1142 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 1143 // CHECK7-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 1144 // CHECK7-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1145 // CHECK7: omp.inner.for.body: 1146 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1147 // CHECK7-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 1148 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1149 // CHECK7-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64 1150 // CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 1151 // CHECK7-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP25]] to i8* 1152 // CHECK7-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8 1153 // CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 1154 // CHECK7-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP27]] to i8* 1155 // CHECK7-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8 1156 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 1157 // CHECK7-NEXT: [[TMP33:%.*]] = bitcast i32* [[CONV]] to i8* 1158 // CHECK7-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 8 1159 // CHECK7-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 1160 // CHECK7-NEXT: [[TMP35:%.*]] = bitcast i32* [[TMP2]] to i8* 1161 // CHECK7-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 8 1162 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4 1163 // CHECK7-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1164 // CHECK7-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 8 1165 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 5 1166 // CHECK7-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1167 // CHECK7-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 8 1168 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 6 1169 // CHECK7-NEXT: [[TMP41:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1170 // CHECK7-NEXT: store i8* [[TMP41]], i8** [[TMP40]], align 8 1171 // CHECK7-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP2]], align 4 1172 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP42]], 0 1173 // CHECK7-NEXT: [[TMP43:%.*]] = zext i1 [[TOBOOL]] to i32 1174 // CHECK7-NEXT: [[TMP44:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1175 // CHECK7-NEXT: [[TMP45:%.*]] = load i32, i32* [[TMP44]], align 4 1176 // CHECK7-NEXT: [[TMP46:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 1177 // CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP45]], i32 [[TMP43]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP46]], i64 7) 1178 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1179 // CHECK7: omp.inner.for.inc: 1180 // CHECK7-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1181 // CHECK7-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1182 // CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 1183 // CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1184 // CHECK7-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1185 // CHECK7-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1186 // CHECK7-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 1187 // CHECK7-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 1188 // CHECK7-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1189 // CHECK7-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1190 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP51]], [[TMP52]] 1191 // CHECK7-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 1192 // CHECK7-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1193 // CHECK7-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1194 // CHECK7-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP53]], [[TMP54]] 1195 // CHECK7-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 1196 // CHECK7: cond.true12: 1197 // CHECK7-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1198 // CHECK7-NEXT: br label [[COND_END14:%.*]] 1199 // CHECK7: cond.false13: 1200 // CHECK7-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1201 // CHECK7-NEXT: br label [[COND_END14]] 1202 // CHECK7: cond.end14: 1203 // CHECK7-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP55]], [[COND_TRUE12]] ], [ [[TMP56]], [[COND_FALSE13]] ] 1204 // CHECK7-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 1205 // CHECK7-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1206 // CHECK7-NEXT: store i32 [[TMP57]], i32* [[DOTOMP_IV]], align 4 1207 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 1208 // CHECK7: omp.inner.for.end: 1209 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1210 // CHECK7: omp.loop.exit: 1211 // CHECK7-NEXT: [[TMP58:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1212 // CHECK7-NEXT: [[TMP59:%.*]] = load i32, i32* [[TMP58]], align 4 1213 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP59]]) 1214 // CHECK7-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1215 // CHECK7-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 1216 // CHECK7-NEXT: br i1 [[TMP61]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1217 // CHECK7: .omp.lastprivate.then: 1218 // CHECK7-NEXT: [[TMP62:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 1219 // CHECK7-NEXT: [[TMP63:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1220 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP62]], i8* align 4 [[TMP63]], i64 40, i1 false) 1221 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1222 // CHECK7: .omp.lastprivate.done: 1223 // CHECK7-NEXT: br label [[OMP_PRECOND_END]] 1224 // CHECK7: omp.precond.end: 1225 // CHECK7-NEXT: [[TMP64:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 1226 // CHECK7-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP64]]) 1227 // CHECK7-NEXT: ret void 1228 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__1 1229 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1230 // CHECK7-NEXT: entry: 1231 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1232 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1233 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1234 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1235 // CHECK7-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 1236 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1237 // CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1238 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 1239 // CHECK7-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 1240 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1241 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 1242 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1243 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1244 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1245 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1246 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1247 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1248 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1249 // CHECK7-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 1250 // CHECK7-NEXT: [[C5:%.*]] = alloca [10 x i32], align 4 1251 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4 1252 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1253 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1254 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1255 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1256 // CHECK7-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 1257 // CHECK7-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1258 // CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1259 // CHECK7-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 1260 // CHECK7-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 1261 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 1262 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1263 // CHECK7-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1264 // CHECK7-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 1265 // CHECK7-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 1266 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1267 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1268 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1269 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 1270 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1271 // CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1272 // CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1273 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 1274 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1275 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1276 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1277 // CHECK7: omp.precond.then: 1278 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1279 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1280 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 1281 // CHECK7-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1282 // CHECK7-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 1283 // CHECK7-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1284 // CHECK7-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP10]] to i32 1285 // CHECK7-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1286 // CHECK7-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 1287 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1288 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1289 // CHECK7-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1290 // CHECK7-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 1291 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 40, i1 false) 1292 // CHECK7-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1293 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1294 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1295 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1296 // CHECK7-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1297 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1298 // CHECK7: omp.inner.for.cond: 1299 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1300 // CHECK7-NEXT: [[CONV7:%.*]] = sext i32 [[TMP16]] to i64 1301 // CHECK7-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1302 // CHECK7-NEXT: [[CMP8:%.*]] = icmp ule i64 [[CONV7]], [[TMP17]] 1303 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1304 // CHECK7: omp.inner.for.body: 1305 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1306 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1307 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1308 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 1309 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I6]]) #[[ATTR5:[0-9]+]] 1310 // CHECK7-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 1311 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[CALL]], [[CALL9]] 1312 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 1313 // CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 1314 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B4]], i64 0, i64 [[IDXPROM]] 1315 // CHECK7-NEXT: [[CALL11:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 1316 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD10]], [[CALL11]] 1317 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4 1318 // CHECK7-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP20]] to i64 1319 // CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C5]], i64 0, i64 [[IDXPROM13]] 1320 // CHECK7-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 1321 // CHECK7-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD12]], [[CALL15]] 1322 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4 1323 // CHECK7-NEXT: [[IDXPROM17:%.*]] = sext i32 [[TMP21]] to i64 1324 // CHECK7-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i64 0, i64 [[IDXPROM17]] 1325 // CHECK7-NEXT: [[CALL19:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX18]]) #[[ATTR5]] 1326 // CHECK7-NEXT: [[ADD20:%.*]] = add nsw i32 [[ADD16]], [[CALL19]] 1327 // CHECK7-NEXT: store i32 [[ADD20]], i32* [[TMP1]], align 4 1328 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1329 // CHECK7: omp.body.continue: 1330 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1331 // CHECK7: omp.inner.for.inc: 1332 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1333 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1334 // CHECK7-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 1335 // CHECK7-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 1336 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 1337 // CHECK7: omp.inner.for.end: 1338 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1339 // CHECK7: omp.loop.exit: 1340 // CHECK7-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1341 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1342 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1343 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1344 // CHECK7-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 1345 // CHECK7-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1346 // CHECK7: .omp.lastprivate.then: 1347 // CHECK7-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1348 // CHECK7-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C5]] to i8* 1349 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 40, i1 false) 1350 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1351 // CHECK7: .omp.lastprivate.done: 1352 // CHECK7-NEXT: br label [[OMP_PRECOND_END]] 1353 // CHECK7: omp.precond.end: 1354 // CHECK7-NEXT: ret void 1355 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 1356 // CHECK8-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 1357 // CHECK8-NEXT: entry: 1358 // CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1359 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 1360 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1361 // CHECK8-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 1362 // CHECK8-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 1363 // CHECK8-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 1364 // CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 1365 // CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1366 // CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 1367 // CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1368 // CHECK8-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 1369 // CHECK8-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1370 // CHECK8-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 1371 // CHECK8-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 1372 // CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1373 // CHECK8-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 1374 // CHECK8-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1375 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 1376 // CHECK8-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 1377 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1378 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 1379 // CHECK8-NEXT: br label [[DOTEXECUTE:%.*]] 1380 // CHECK8: .execute: 1381 // CHECK8-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 1382 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV]], align 8 1383 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32* 1384 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1385 // CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8 1386 // CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 1387 // CHECK8-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i64 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 1388 // CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]] 1389 // CHECK8: .omp.deinit: 1390 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 1391 // CHECK8-NEXT: br label [[DOTEXIT:%.*]] 1392 // CHECK8: .exit: 1393 // CHECK8-NEXT: ret void 1394 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__ 1395 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1396 // CHECK8-NEXT: entry: 1397 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1398 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1399 // CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1400 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 1401 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1402 // CHECK8-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 1403 // CHECK8-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 1404 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1405 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 1406 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1407 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1408 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1409 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1410 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1411 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1412 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1413 // CHECK8-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 1414 // CHECK8-NEXT: [[I5:%.*]] = alloca i32, align 4 1415 // CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 8 1416 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1417 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1418 // CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1419 // CHECK8-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 1420 // CHECK8-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1421 // CHECK8-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 1422 // CHECK8-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 1423 // CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1424 // CHECK8-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 1425 // CHECK8-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1426 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 1427 // CHECK8-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 1428 // CHECK8-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i64 40, i16 1) 1429 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty* 1430 // CHECK8-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0 1431 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 1432 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4 1433 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1434 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1435 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1436 // CHECK8-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1437 // CHECK8-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1438 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 1439 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1440 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 1441 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1442 // CHECK8: omp.precond.then: 1443 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1444 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1445 // CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 1446 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1447 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1448 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1449 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 1450 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 40, i1 false) 1451 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1452 // CHECK8-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1453 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1454 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 1455 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1456 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1457 // CHECK8-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 1458 // CHECK8-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1459 // CHECK8: cond.true: 1460 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1461 // CHECK8-NEXT: br label [[COND_END:%.*]] 1462 // CHECK8: cond.false: 1463 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1464 // CHECK8-NEXT: br label [[COND_END]] 1465 // CHECK8: cond.end: 1466 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1467 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1468 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1469 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 1470 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1471 // CHECK8: omp.inner.for.cond: 1472 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1473 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1474 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], 1 1475 // CHECK8-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP19]], [[ADD]] 1476 // CHECK8-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1477 // CHECK8: omp.inner.for.body: 1478 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1479 // CHECK8-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 1480 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1481 // CHECK8-NEXT: [[TMP24:%.*]] = zext i32 [[TMP23]] to i64 1482 // CHECK8-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 1483 // CHECK8-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP22]] to i8* 1484 // CHECK8-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8 1485 // CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 1486 // CHECK8-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP24]] to i8* 1487 // CHECK8-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8 1488 // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 1489 // CHECK8-NEXT: [[TMP30:%.*]] = bitcast i32* [[CONV]] to i8* 1490 // CHECK8-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8 1491 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 1492 // CHECK8-NEXT: [[TMP32:%.*]] = bitcast i32* [[TMP2]] to i8* 1493 // CHECK8-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 8 1494 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4 1495 // CHECK8-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1496 // CHECK8-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 8 1497 // CHECK8-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 5 1498 // CHECK8-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1499 // CHECK8-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 8 1500 // CHECK8-NEXT: [[TMP37:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 6 1501 // CHECK8-NEXT: [[TMP38:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1502 // CHECK8-NEXT: store i8* [[TMP38]], i8** [[TMP37]], align 8 1503 // CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[TMP2]], align 4 1504 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP39]], 0 1505 // CHECK8-NEXT: [[TMP40:%.*]] = zext i1 [[TOBOOL]] to i32 1506 // CHECK8-NEXT: [[TMP41:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1507 // CHECK8-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP41]], align 4 1508 // CHECK8-NEXT: [[TMP43:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 1509 // CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP42]], i32 [[TMP40]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP43]], i64 7) 1510 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1511 // CHECK8: omp.inner.for.inc: 1512 // CHECK8-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1513 // CHECK8-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1514 // CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 1515 // CHECK8-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1516 // CHECK8-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1517 // CHECK8-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1518 // CHECK8-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 1519 // CHECK8-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 1520 // CHECK8-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1521 // CHECK8-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1522 // CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP48]], [[TMP49]] 1523 // CHECK8-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 1524 // CHECK8-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1525 // CHECK8-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1526 // CHECK8-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP50]], [[TMP51]] 1527 // CHECK8-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 1528 // CHECK8: cond.true12: 1529 // CHECK8-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1530 // CHECK8-NEXT: br label [[COND_END14:%.*]] 1531 // CHECK8: cond.false13: 1532 // CHECK8-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1533 // CHECK8-NEXT: br label [[COND_END14]] 1534 // CHECK8: cond.end14: 1535 // CHECK8-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP52]], [[COND_TRUE12]] ], [ [[TMP53]], [[COND_FALSE13]] ] 1536 // CHECK8-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 1537 // CHECK8-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1538 // CHECK8-NEXT: store i32 [[TMP54]], i32* [[DOTOMP_IV]], align 4 1539 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 1540 // CHECK8: omp.inner.for.end: 1541 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1542 // CHECK8: omp.loop.exit: 1543 // CHECK8-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1544 // CHECK8-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4 1545 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP56]]) 1546 // CHECK8-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1547 // CHECK8-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 1548 // CHECK8-NEXT: br i1 [[TMP58]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1549 // CHECK8: .omp.lastprivate.then: 1550 // CHECK8-NEXT: [[TMP59:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 1551 // CHECK8-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1552 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP59]], i8* align 4 [[TMP60]], i64 40, i1 false) 1553 // CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1554 // CHECK8: .omp.lastprivate.done: 1555 // CHECK8-NEXT: br label [[OMP_PRECOND_END]] 1556 // CHECK8: omp.precond.end: 1557 // CHECK8-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP4]]) 1558 // CHECK8-NEXT: ret void 1559 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__1 1560 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1561 // CHECK8-NEXT: entry: 1562 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1563 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1564 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1565 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1566 // CHECK8-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 1567 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1568 // CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 1569 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 1570 // CHECK8-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 1571 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1572 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 1573 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1574 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1575 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1576 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1577 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1578 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1579 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1580 // CHECK8-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 1581 // CHECK8-NEXT: [[C5:%.*]] = alloca [10 x i32], align 4 1582 // CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4 1583 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1584 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1585 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1586 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1587 // CHECK8-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 1588 // CHECK8-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1589 // CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 1590 // CHECK8-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 1591 // CHECK8-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 1592 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 1593 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1594 // CHECK8-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 1595 // CHECK8-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 1596 // CHECK8-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 1597 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1598 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1599 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1600 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 1601 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1602 // CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1603 // CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1604 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 1605 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1606 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1607 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1608 // CHECK8: omp.precond.then: 1609 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1610 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1611 // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 1612 // CHECK8-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1613 // CHECK8-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 1614 // CHECK8-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1615 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP10]] to i32 1616 // CHECK8-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1617 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 1618 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1619 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1620 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1621 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 1622 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 40, i1 false) 1623 // CHECK8-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1624 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1625 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1626 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1627 // CHECK8-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1628 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1629 // CHECK8: omp.inner.for.cond: 1630 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1631 // CHECK8-NEXT: [[CONV7:%.*]] = sext i32 [[TMP16]] to i64 1632 // CHECK8-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1633 // CHECK8-NEXT: [[CMP8:%.*]] = icmp ule i64 [[CONV7]], [[TMP17]] 1634 // CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1635 // CHECK8: omp.inner.for.body: 1636 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1637 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1638 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1639 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 1640 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I6]]) #[[ATTR5:[0-9]+]] 1641 // CHECK8-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 1642 // CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 [[CALL]], [[CALL9]] 1643 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 1644 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 1645 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B4]], i64 0, i64 [[IDXPROM]] 1646 // CHECK8-NEXT: [[CALL11:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 1647 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD10]], [[CALL11]] 1648 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4 1649 // CHECK8-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP20]] to i64 1650 // CHECK8-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C5]], i64 0, i64 [[IDXPROM13]] 1651 // CHECK8-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 1652 // CHECK8-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD12]], [[CALL15]] 1653 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4 1654 // CHECK8-NEXT: [[IDXPROM17:%.*]] = sext i32 [[TMP21]] to i64 1655 // CHECK8-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i64 0, i64 [[IDXPROM17]] 1656 // CHECK8-NEXT: [[CALL19:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX18]]) #[[ATTR5]] 1657 // CHECK8-NEXT: [[ADD20:%.*]] = add nsw i32 [[ADD16]], [[CALL19]] 1658 // CHECK8-NEXT: store i32 [[ADD20]], i32* [[TMP1]], align 4 1659 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1660 // CHECK8: omp.body.continue: 1661 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1662 // CHECK8: omp.inner.for.inc: 1663 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1664 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1665 // CHECK8-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 1666 // CHECK8-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 1667 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 1668 // CHECK8: omp.inner.for.end: 1669 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1670 // CHECK8: omp.loop.exit: 1671 // CHECK8-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1672 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1673 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1674 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1675 // CHECK8-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 1676 // CHECK8-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1677 // CHECK8: .omp.lastprivate.then: 1678 // CHECK8-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1679 // CHECK8-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C5]] to i8* 1680 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 40, i1 false) 1681 // CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1682 // CHECK8: .omp.lastprivate.done: 1683 // CHECK8-NEXT: br label [[OMP_PRECOND_END]] 1684 // CHECK8: omp.precond.end: 1685 // CHECK8-NEXT: ret void 1686 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 1687 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 1688 // CHECK9-NEXT: entry: 1689 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1690 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1691 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1692 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1693 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1694 // CHECK9-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 1695 // CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 1696 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1697 // CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 1698 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1699 // CHECK9-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1700 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1701 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1702 // CHECK9-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1703 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1704 // CHECK9-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1705 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1706 // CHECK9-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1707 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1708 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 1709 // CHECK9-NEXT: br label [[DOTEXECUTE:%.*]] 1710 // CHECK9: .execute: 1711 // CHECK9-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 1712 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1713 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 1714 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 1715 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 1716 // CHECK9-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 1717 // CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]] 1718 // CHECK9: .omp.deinit: 1719 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 1720 // CHECK9-NEXT: br label [[DOTEXIT:%.*]] 1721 // CHECK9: .exit: 1722 // CHECK9-NEXT: ret void 1723 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__ 1724 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1725 // CHECK9-NEXT: entry: 1726 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1727 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1728 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1729 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1730 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1731 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1732 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1733 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1734 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1735 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1736 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1737 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1738 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1739 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1740 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1741 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1742 // CHECK9-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 1743 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 1744 // CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 1745 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1746 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1747 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1748 // CHECK9-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1749 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1750 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1751 // CHECK9-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1752 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1753 // CHECK9-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1754 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1755 // CHECK9-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1756 // CHECK9-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 1757 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4 1758 // CHECK9-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 1759 // CHECK9-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4 1760 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i32 0 1761 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 1762 // CHECK9-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 1763 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1764 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 1765 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1766 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 1767 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1768 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1769 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1770 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1771 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1772 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 1773 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1774 // CHECK9: omp.precond.then: 1775 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1776 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1777 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 1778 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1779 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1780 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1781 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 1782 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 40, i1 false) 1783 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1784 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1785 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1786 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 1787 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1788 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1789 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 1790 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1791 // CHECK9: cond.true: 1792 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1793 // CHECK9-NEXT: br label [[COND_END:%.*]] 1794 // CHECK9: cond.false: 1795 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1796 // CHECK9-NEXT: br label [[COND_END]] 1797 // CHECK9: cond.end: 1798 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 1799 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1800 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1801 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 1802 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1803 // CHECK9: omp.inner.for.cond: 1804 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1805 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1806 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 1807 // CHECK9-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 1808 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1809 // CHECK9: omp.inner.for.body: 1810 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1811 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1812 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 1813 // CHECK9-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP24]] to i8* 1814 // CHECK9-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4 1815 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 1816 // CHECK9-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP25]] to i8* 1817 // CHECK9-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4 1818 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 1819 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 1820 // CHECK9-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4 1821 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 1822 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast i32* [[TMP2]] to i8* 1823 // CHECK9-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 4 1824 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 1825 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1826 // CHECK9-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 4 1827 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 1828 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1829 // CHECK9-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 4 1830 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 1831 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1832 // CHECK9-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 4 1833 // CHECK9-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP2]], align 4 1834 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP40]], 0 1835 // CHECK9-NEXT: [[TMP41:%.*]] = zext i1 [[TOBOOL]] to i32 1836 // CHECK9-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1837 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4 1838 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 1839 // CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP43]], i32 [[TMP41]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP44]], i32 7) 1840 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1841 // CHECK9: omp.inner.for.inc: 1842 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1843 // CHECK9-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1844 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP45]], [[TMP46]] 1845 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1846 // CHECK9-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1847 // CHECK9-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1848 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 1849 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 1850 // CHECK9-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1851 // CHECK9-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1852 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 1853 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 1854 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1855 // CHECK9-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1856 // CHECK9-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP51]], [[TMP52]] 1857 // CHECK9-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 1858 // CHECK9: cond.true12: 1859 // CHECK9-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1860 // CHECK9-NEXT: br label [[COND_END14:%.*]] 1861 // CHECK9: cond.false13: 1862 // CHECK9-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1863 // CHECK9-NEXT: br label [[COND_END14]] 1864 // CHECK9: cond.end14: 1865 // CHECK9-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP53]], [[COND_TRUE12]] ], [ [[TMP54]], [[COND_FALSE13]] ] 1866 // CHECK9-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 1867 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1868 // CHECK9-NEXT: store i32 [[TMP55]], i32* [[DOTOMP_IV]], align 4 1869 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1870 // CHECK9: omp.inner.for.end: 1871 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1872 // CHECK9: omp.loop.exit: 1873 // CHECK9-NEXT: [[TMP56:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1874 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[TMP56]], align 4 1875 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP57]]) 1876 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1877 // CHECK9-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 1878 // CHECK9-NEXT: br i1 [[TMP59]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1879 // CHECK9: .omp.lastprivate.then: 1880 // CHECK9-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 1881 // CHECK9-NEXT: [[TMP61:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1882 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP60]], i8* align 4 [[TMP61]], i32 40, i1 false) 1883 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1884 // CHECK9: .omp.lastprivate.done: 1885 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1886 // CHECK9: omp.precond.end: 1887 // CHECK9-NEXT: [[TMP62:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 1888 // CHECK9-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP62]]) 1889 // CHECK9-NEXT: ret void 1890 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__1 1891 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1892 // CHECK9-NEXT: entry: 1893 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1894 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1895 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1896 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1897 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 1898 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1899 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1900 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1901 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1902 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1903 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1904 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1905 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1906 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1907 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1908 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1909 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1910 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1911 // CHECK9-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 1912 // CHECK9-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 1913 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 1914 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1915 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1916 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1917 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1918 // CHECK9-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 1919 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1920 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1921 // CHECK9-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1922 // CHECK9-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1923 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 1924 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1925 // CHECK9-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1926 // CHECK9-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1927 // CHECK9-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1928 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1929 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1930 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1931 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 1932 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1933 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1934 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1935 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1936 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1937 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1938 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1939 // CHECK9: omp.precond.then: 1940 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1941 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1942 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 1943 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1944 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1945 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 1946 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 1947 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1948 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1949 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 1950 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 1951 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 1952 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1953 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1954 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1955 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1956 // CHECK9-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1957 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1958 // CHECK9: omp.inner.for.cond: 1959 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1960 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1961 // CHECK9-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 1962 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1963 // CHECK9: omp.inner.for.body: 1964 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1965 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1966 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1967 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 1968 // CHECK9-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 1969 // CHECK9-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 1970 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 1971 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 1972 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 1973 // CHECK9-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 1974 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 1975 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 1976 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 1977 // CHECK9-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 1978 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 1979 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 1980 // CHECK9-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 1981 // CHECK9-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 1982 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 1983 // CHECK9-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 1984 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1985 // CHECK9: omp.body.continue: 1986 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1987 // CHECK9: omp.inner.for.inc: 1988 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1989 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1990 // CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 1991 // CHECK9-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 1992 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1993 // CHECK9: omp.inner.for.end: 1994 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1995 // CHECK9: omp.loop.exit: 1996 // CHECK9-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1997 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1998 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1999 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2000 // CHECK9-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 2001 // CHECK9-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2002 // CHECK9: .omp.lastprivate.then: 2003 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2004 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 2005 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 2006 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2007 // CHECK9: .omp.lastprivate.done: 2008 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2009 // CHECK9: omp.precond.end: 2010 // CHECK9-NEXT: ret void 2011 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 2012 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 2013 // CHECK10-NEXT: entry: 2014 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2015 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2016 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2017 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2018 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2019 // CHECK10-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 2020 // CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2021 // CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 2022 // CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 2023 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2024 // CHECK10-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2025 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2026 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2027 // CHECK10-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2028 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2029 // CHECK10-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2030 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2031 // CHECK10-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2032 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2033 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 2034 // CHECK10-NEXT: br label [[DOTEXECUTE:%.*]] 2035 // CHECK10: .execute: 2036 // CHECK10-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 2037 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2038 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 2039 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 2040 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 2041 // CHECK10-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 2042 // CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]] 2043 // CHECK10: .omp.deinit: 2044 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 2045 // CHECK10-NEXT: br label [[DOTEXIT:%.*]] 2046 // CHECK10: .exit: 2047 // CHECK10-NEXT: ret void 2048 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__ 2049 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2050 // CHECK10-NEXT: entry: 2051 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2052 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2053 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2054 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2055 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2056 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2057 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2058 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2059 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2060 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2061 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2062 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2063 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2064 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2065 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2066 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2067 // CHECK10-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 2068 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4 2069 // CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 2070 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2071 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2072 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2073 // CHECK10-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2074 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2075 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2076 // CHECK10-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2077 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2078 // CHECK10-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2079 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2080 // CHECK10-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2081 // CHECK10-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 2082 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4 2083 // CHECK10-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 2084 // CHECK10-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4 2085 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i32 0 2086 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 2087 // CHECK10-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 2088 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2089 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 2090 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2091 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 2092 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2093 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2094 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2095 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2096 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2097 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 2098 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2099 // CHECK10: omp.precond.then: 2100 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2101 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2102 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 2103 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2104 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2105 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2106 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 2107 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 40, i1 false) 2108 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2109 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2110 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2111 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 2112 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2113 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2114 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 2115 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2116 // CHECK10: cond.true: 2117 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2118 // CHECK10-NEXT: br label [[COND_END:%.*]] 2119 // CHECK10: cond.false: 2120 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2121 // CHECK10-NEXT: br label [[COND_END]] 2122 // CHECK10: cond.end: 2123 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 2124 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2125 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2126 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 2127 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2128 // CHECK10: omp.inner.for.cond: 2129 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2130 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2131 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 2132 // CHECK10-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 2133 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2134 // CHECK10: omp.inner.for.body: 2135 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2136 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2137 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 2138 // CHECK10-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP24]] to i8* 2139 // CHECK10-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4 2140 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 2141 // CHECK10-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP25]] to i8* 2142 // CHECK10-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4 2143 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 2144 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 2145 // CHECK10-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4 2146 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 2147 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast i32* [[TMP2]] to i8* 2148 // CHECK10-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 4 2149 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 2150 // CHECK10-NEXT: [[TMP35:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2151 // CHECK10-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 4 2152 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 2153 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2154 // CHECK10-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 4 2155 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 2156 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2157 // CHECK10-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 4 2158 // CHECK10-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP2]], align 4 2159 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP40]], 0 2160 // CHECK10-NEXT: [[TMP41:%.*]] = zext i1 [[TOBOOL]] to i32 2161 // CHECK10-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2162 // CHECK10-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4 2163 // CHECK10-NEXT: [[TMP44:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 2164 // CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP43]], i32 [[TMP41]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP44]], i32 7) 2165 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2166 // CHECK10: omp.inner.for.inc: 2167 // CHECK10-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2168 // CHECK10-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2169 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP45]], [[TMP46]] 2170 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2171 // CHECK10-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2172 // CHECK10-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2173 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 2174 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 2175 // CHECK10-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2176 // CHECK10-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2177 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 2178 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 2179 // CHECK10-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2180 // CHECK10-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2181 // CHECK10-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP51]], [[TMP52]] 2182 // CHECK10-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 2183 // CHECK10: cond.true12: 2184 // CHECK10-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2185 // CHECK10-NEXT: br label [[COND_END14:%.*]] 2186 // CHECK10: cond.false13: 2187 // CHECK10-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2188 // CHECK10-NEXT: br label [[COND_END14]] 2189 // CHECK10: cond.end14: 2190 // CHECK10-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP53]], [[COND_TRUE12]] ], [ [[TMP54]], [[COND_FALSE13]] ] 2191 // CHECK10-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 2192 // CHECK10-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2193 // CHECK10-NEXT: store i32 [[TMP55]], i32* [[DOTOMP_IV]], align 4 2194 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2195 // CHECK10: omp.inner.for.end: 2196 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2197 // CHECK10: omp.loop.exit: 2198 // CHECK10-NEXT: [[TMP56:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2199 // CHECK10-NEXT: [[TMP57:%.*]] = load i32, i32* [[TMP56]], align 4 2200 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP57]]) 2201 // CHECK10-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2202 // CHECK10-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 2203 // CHECK10-NEXT: br i1 [[TMP59]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2204 // CHECK10: .omp.lastprivate.then: 2205 // CHECK10-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 2206 // CHECK10-NEXT: [[TMP61:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2207 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP60]], i8* align 4 [[TMP61]], i32 40, i1 false) 2208 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2209 // CHECK10: .omp.lastprivate.done: 2210 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2211 // CHECK10: omp.precond.end: 2212 // CHECK10-NEXT: [[TMP62:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 2213 // CHECK10-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP62]]) 2214 // CHECK10-NEXT: ret void 2215 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__1 2216 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2217 // CHECK10-NEXT: entry: 2218 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2219 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2220 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2221 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2222 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 2223 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2224 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2225 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2226 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2227 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2228 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2229 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2230 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2231 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2232 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2233 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2234 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2235 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2236 // CHECK10-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 2237 // CHECK10-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 2238 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4 2239 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2240 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2241 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2242 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2243 // CHECK10-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 2244 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2245 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2246 // CHECK10-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2247 // CHECK10-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2248 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 2249 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2250 // CHECK10-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2251 // CHECK10-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2252 // CHECK10-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2253 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2254 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2255 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2256 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 2257 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2258 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2259 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2260 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2261 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2262 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 2263 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2264 // CHECK10: omp.precond.then: 2265 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2266 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2267 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 2268 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2269 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2270 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 2271 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 2272 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2273 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2274 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 2275 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 2276 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 2277 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2278 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2279 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2280 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2281 // CHECK10-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 2282 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2283 // CHECK10: omp.inner.for.cond: 2284 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2285 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2286 // CHECK10-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 2287 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2288 // CHECK10: omp.inner.for.body: 2289 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2290 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2291 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2292 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 2293 // CHECK10-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 2294 // CHECK10-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 2295 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 2296 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 2297 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 2298 // CHECK10-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 2299 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 2300 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 2301 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 2302 // CHECK10-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 2303 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 2304 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 2305 // CHECK10-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 2306 // CHECK10-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 2307 // CHECK10-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 2308 // CHECK10-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 2309 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2310 // CHECK10: omp.body.continue: 2311 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2312 // CHECK10: omp.inner.for.inc: 2313 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2314 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2315 // CHECK10-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2316 // CHECK10-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 2317 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2318 // CHECK10: omp.inner.for.end: 2319 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2320 // CHECK10: omp.loop.exit: 2321 // CHECK10-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2322 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2323 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 2324 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2325 // CHECK10-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 2326 // CHECK10-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2327 // CHECK10: .omp.lastprivate.then: 2328 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2329 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 2330 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 2331 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2332 // CHECK10: .omp.lastprivate.done: 2333 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2334 // CHECK10: omp.precond.end: 2335 // CHECK10-NEXT: ret void 2336 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 2337 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 2338 // CHECK11-NEXT: entry: 2339 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2340 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2341 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2342 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2343 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2344 // CHECK11-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 2345 // CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2346 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 2347 // CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 2348 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2349 // CHECK11-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2350 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2351 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2352 // CHECK11-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2353 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2354 // CHECK11-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2355 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2356 // CHECK11-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2357 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2358 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 2359 // CHECK11-NEXT: br label [[DOTEXECUTE:%.*]] 2360 // CHECK11: .execute: 2361 // CHECK11-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 2362 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2363 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 2364 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 2365 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 2366 // CHECK11-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 2367 // CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]] 2368 // CHECK11: .omp.deinit: 2369 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 2370 // CHECK11-NEXT: br label [[DOTEXIT:%.*]] 2371 // CHECK11: .exit: 2372 // CHECK11-NEXT: ret void 2373 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__ 2374 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2375 // CHECK11-NEXT: entry: 2376 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2377 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2378 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2379 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2380 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2381 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2382 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2383 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2384 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2385 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2386 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2387 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2388 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2389 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2390 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2391 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2392 // CHECK11-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 2393 // CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4 2394 // CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 2395 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2396 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2397 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2398 // CHECK11-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2399 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2400 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2401 // CHECK11-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2402 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2403 // CHECK11-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2404 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2405 // CHECK11-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2406 // CHECK11-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 40, i16 1) 2407 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty* 2408 // CHECK11-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0 2409 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2410 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4 2411 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2412 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2413 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2414 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2415 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2416 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2417 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2418 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 2419 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2420 // CHECK11: omp.precond.then: 2421 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2422 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2423 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 2424 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2425 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2426 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2427 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 2428 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 40, i1 false) 2429 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2430 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2431 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2432 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 2433 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2434 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2435 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 2436 // CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2437 // CHECK11: cond.true: 2438 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2439 // CHECK11-NEXT: br label [[COND_END:%.*]] 2440 // CHECK11: cond.false: 2441 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2442 // CHECK11-NEXT: br label [[COND_END]] 2443 // CHECK11: cond.end: 2444 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 2445 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2446 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2447 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 2448 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2449 // CHECK11: omp.inner.for.cond: 2450 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2451 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2452 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], 1 2453 // CHECK11-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP19]], [[ADD]] 2454 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2455 // CHECK11: omp.inner.for.body: 2456 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2457 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2458 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 2459 // CHECK11-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP21]] to i8* 2460 // CHECK11-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4 2461 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 2462 // CHECK11-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP22]] to i8* 2463 // CHECK11-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4 2464 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 2465 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 2466 // CHECK11-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4 2467 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 2468 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP2]] to i8* 2469 // CHECK11-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4 2470 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 2471 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2472 // CHECK11-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4 2473 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 2474 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2475 // CHECK11-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4 2476 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 2477 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2478 // CHECK11-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 4 2479 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP2]], align 4 2480 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0 2481 // CHECK11-NEXT: [[TMP38:%.*]] = zext i1 [[TOBOOL]] to i32 2482 // CHECK11-NEXT: [[TMP39:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2483 // CHECK11-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 2484 // CHECK11-NEXT: [[TMP41:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 2485 // CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP40]], i32 [[TMP38]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP41]], i32 7) 2486 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2487 // CHECK11: omp.inner.for.inc: 2488 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2489 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2490 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP42]], [[TMP43]] 2491 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2492 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2493 // CHECK11-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2494 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 2495 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 2496 // CHECK11-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2497 // CHECK11-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2498 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 2499 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 2500 // CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2501 // CHECK11-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2502 // CHECK11-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP48]], [[TMP49]] 2503 // CHECK11-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 2504 // CHECK11: cond.true12: 2505 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2506 // CHECK11-NEXT: br label [[COND_END14:%.*]] 2507 // CHECK11: cond.false13: 2508 // CHECK11-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2509 // CHECK11-NEXT: br label [[COND_END14]] 2510 // CHECK11: cond.end14: 2511 // CHECK11-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP50]], [[COND_TRUE12]] ], [ [[TMP51]], [[COND_FALSE13]] ] 2512 // CHECK11-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 2513 // CHECK11-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2514 // CHECK11-NEXT: store i32 [[TMP52]], i32* [[DOTOMP_IV]], align 4 2515 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2516 // CHECK11: omp.inner.for.end: 2517 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2518 // CHECK11: omp.loop.exit: 2519 // CHECK11-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2520 // CHECK11-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4 2521 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP54]]) 2522 // CHECK11-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2523 // CHECK11-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 2524 // CHECK11-NEXT: br i1 [[TMP56]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2525 // CHECK11: .omp.lastprivate.then: 2526 // CHECK11-NEXT: [[TMP57:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 2527 // CHECK11-NEXT: [[TMP58:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2528 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP57]], i8* align 4 [[TMP58]], i32 40, i1 false) 2529 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2530 // CHECK11: .omp.lastprivate.done: 2531 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2532 // CHECK11: omp.precond.end: 2533 // CHECK11-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP4]]) 2534 // CHECK11-NEXT: ret void 2535 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__1 2536 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2537 // CHECK11-NEXT: entry: 2538 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2539 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2540 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2541 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2542 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 2543 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2544 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2545 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2546 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2547 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2548 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2549 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2550 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2551 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2552 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2553 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2554 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2555 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2556 // CHECK11-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 2557 // CHECK11-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 2558 // CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4 2559 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2560 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2561 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2562 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2563 // CHECK11-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 2564 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2565 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2566 // CHECK11-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2567 // CHECK11-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2568 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 2569 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2570 // CHECK11-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2571 // CHECK11-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2572 // CHECK11-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2573 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2574 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2575 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2576 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 2577 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2578 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2579 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2580 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2581 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2582 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 2583 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2584 // CHECK11: omp.precond.then: 2585 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2586 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2587 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 2588 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2589 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2590 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 2591 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 2592 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2593 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2594 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 2595 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 2596 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 2597 // CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2598 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2599 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2600 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2601 // CHECK11-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 2602 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2603 // CHECK11: omp.inner.for.cond: 2604 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2605 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2606 // CHECK11-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 2607 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2608 // CHECK11: omp.inner.for.body: 2609 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2610 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2611 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2612 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 2613 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 2614 // CHECK11-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 2615 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 2616 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 2617 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 2618 // CHECK11-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 2619 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 2620 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 2621 // CHECK11-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 2622 // CHECK11-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 2623 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 2624 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 2625 // CHECK11-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 2626 // CHECK11-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 2627 // CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 2628 // CHECK11-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 2629 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2630 // CHECK11: omp.body.continue: 2631 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2632 // CHECK11: omp.inner.for.inc: 2633 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2634 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2635 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2636 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 2637 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2638 // CHECK11: omp.inner.for.end: 2639 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2640 // CHECK11: omp.loop.exit: 2641 // CHECK11-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2642 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2643 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 2644 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2645 // CHECK11-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 2646 // CHECK11-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2647 // CHECK11: .omp.lastprivate.then: 2648 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2649 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 2650 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 2651 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2652 // CHECK11: .omp.lastprivate.done: 2653 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2654 // CHECK11: omp.precond.end: 2655 // CHECK11-NEXT: ret void 2656 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 2657 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 2658 // CHECK12-NEXT: entry: 2659 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2660 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2661 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2662 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2663 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2664 // CHECK12-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 2665 // CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2666 // CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 2667 // CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 2668 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2669 // CHECK12-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2670 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2671 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2672 // CHECK12-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2673 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2674 // CHECK12-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2675 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2676 // CHECK12-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2677 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2678 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 2679 // CHECK12-NEXT: br label [[DOTEXECUTE:%.*]] 2680 // CHECK12: .execute: 2681 // CHECK12-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 2682 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2683 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 2684 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 2685 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 2686 // CHECK12-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 2687 // CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]] 2688 // CHECK12: .omp.deinit: 2689 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 2690 // CHECK12-NEXT: br label [[DOTEXIT:%.*]] 2691 // CHECK12: .exit: 2692 // CHECK12-NEXT: ret void 2693 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__ 2694 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2695 // CHECK12-NEXT: entry: 2696 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2697 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2698 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2699 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2700 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2701 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2702 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2703 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2704 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2705 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2706 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2707 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2708 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2709 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2710 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2711 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2712 // CHECK12-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 2713 // CHECK12-NEXT: [[I5:%.*]] = alloca i32, align 4 2714 // CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 2715 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2716 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2717 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2718 // CHECK12-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2719 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2720 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2721 // CHECK12-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2722 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2723 // CHECK12-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2724 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2725 // CHECK12-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2726 // CHECK12-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 40, i16 1) 2727 // CHECK12-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty* 2728 // CHECK12-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0 2729 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2730 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4 2731 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2732 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2733 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2734 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2735 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2736 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2737 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2738 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 2739 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2740 // CHECK12: omp.precond.then: 2741 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2742 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2743 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 2744 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2745 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2746 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2747 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 2748 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 40, i1 false) 2749 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2750 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2751 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2752 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 2753 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2754 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2755 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 2756 // CHECK12-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2757 // CHECK12: cond.true: 2758 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2759 // CHECK12-NEXT: br label [[COND_END:%.*]] 2760 // CHECK12: cond.false: 2761 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2762 // CHECK12-NEXT: br label [[COND_END]] 2763 // CHECK12: cond.end: 2764 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 2765 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2766 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2767 // CHECK12-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 2768 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2769 // CHECK12: omp.inner.for.cond: 2770 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2771 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2772 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], 1 2773 // CHECK12-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP19]], [[ADD]] 2774 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2775 // CHECK12: omp.inner.for.body: 2776 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2777 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2778 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 2779 // CHECK12-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP21]] to i8* 2780 // CHECK12-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4 2781 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 2782 // CHECK12-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP22]] to i8* 2783 // CHECK12-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4 2784 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 2785 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 2786 // CHECK12-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4 2787 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 2788 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP2]] to i8* 2789 // CHECK12-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4 2790 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 2791 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2792 // CHECK12-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4 2793 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 2794 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2795 // CHECK12-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4 2796 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 2797 // CHECK12-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2798 // CHECK12-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 4 2799 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP2]], align 4 2800 // CHECK12-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0 2801 // CHECK12-NEXT: [[TMP38:%.*]] = zext i1 [[TOBOOL]] to i32 2802 // CHECK12-NEXT: [[TMP39:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2803 // CHECK12-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 2804 // CHECK12-NEXT: [[TMP41:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 2805 // CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP40]], i32 [[TMP38]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP41]], i32 7) 2806 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2807 // CHECK12: omp.inner.for.inc: 2808 // CHECK12-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2809 // CHECK12-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2810 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP42]], [[TMP43]] 2811 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2812 // CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2813 // CHECK12-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2814 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 2815 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 2816 // CHECK12-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2817 // CHECK12-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2818 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 2819 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 2820 // CHECK12-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2821 // CHECK12-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2822 // CHECK12-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP48]], [[TMP49]] 2823 // CHECK12-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 2824 // CHECK12: cond.true12: 2825 // CHECK12-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2826 // CHECK12-NEXT: br label [[COND_END14:%.*]] 2827 // CHECK12: cond.false13: 2828 // CHECK12-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2829 // CHECK12-NEXT: br label [[COND_END14]] 2830 // CHECK12: cond.end14: 2831 // CHECK12-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP50]], [[COND_TRUE12]] ], [ [[TMP51]], [[COND_FALSE13]] ] 2832 // CHECK12-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 2833 // CHECK12-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2834 // CHECK12-NEXT: store i32 [[TMP52]], i32* [[DOTOMP_IV]], align 4 2835 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2836 // CHECK12: omp.inner.for.end: 2837 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2838 // CHECK12: omp.loop.exit: 2839 // CHECK12-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2840 // CHECK12-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4 2841 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP54]]) 2842 // CHECK12-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2843 // CHECK12-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 2844 // CHECK12-NEXT: br i1 [[TMP56]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2845 // CHECK12: .omp.lastprivate.then: 2846 // CHECK12-NEXT: [[TMP57:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 2847 // CHECK12-NEXT: [[TMP58:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2848 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP57]], i8* align 4 [[TMP58]], i32 40, i1 false) 2849 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2850 // CHECK12: .omp.lastprivate.done: 2851 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2852 // CHECK12: omp.precond.end: 2853 // CHECK12-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP4]]) 2854 // CHECK12-NEXT: ret void 2855 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__1 2856 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2857 // CHECK12-NEXT: entry: 2858 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2859 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2860 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2861 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2862 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 2863 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2864 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2865 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2866 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2867 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2868 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2869 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2870 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2871 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2872 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2873 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2874 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2875 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2876 // CHECK12-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 2877 // CHECK12-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 2878 // CHECK12-NEXT: [[I5:%.*]] = alloca i32, align 4 2879 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2880 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2881 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2882 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2883 // CHECK12-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 2884 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2885 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2886 // CHECK12-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2887 // CHECK12-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2888 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 2889 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2890 // CHECK12-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2891 // CHECK12-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2892 // CHECK12-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2893 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2894 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2895 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2896 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 2897 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2898 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2899 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2900 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 2901 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2902 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 2903 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2904 // CHECK12: omp.precond.then: 2905 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2906 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2907 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 2908 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2909 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2910 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 2911 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 2912 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2913 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2914 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 2915 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 2916 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 2917 // CHECK12-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2918 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2919 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2920 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2921 // CHECK12-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 2922 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2923 // CHECK12: omp.inner.for.cond: 2924 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2925 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2926 // CHECK12-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 2927 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2928 // CHECK12: omp.inner.for.body: 2929 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2930 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2931 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2932 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 2933 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 2934 // CHECK12-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 2935 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 2936 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 2937 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 2938 // CHECK12-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 2939 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 2940 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 2941 // CHECK12-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 2942 // CHECK12-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 2943 // CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 2944 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 2945 // CHECK12-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 2946 // CHECK12-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 2947 // CHECK12-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 2948 // CHECK12-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 2949 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2950 // CHECK12: omp.body.continue: 2951 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2952 // CHECK12: omp.inner.for.inc: 2953 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2954 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2955 // CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2956 // CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 2957 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2958 // CHECK12: omp.inner.for.end: 2959 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2960 // CHECK12: omp.loop.exit: 2961 // CHECK12-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2962 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2963 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 2964 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2965 // CHECK12-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 2966 // CHECK12-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2967 // CHECK12: .omp.lastprivate.then: 2968 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2969 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 2970 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 2971 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2972 // CHECK12: .omp.lastprivate.done: 2973 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2974 // CHECK12: omp.precond.end: 2975 // CHECK12-NEXT: ret void 2976 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l19 2977 // CHECK4-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[C:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[ARGC:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 2978 // CHECK4-NEXT: entry: 2979 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 2980 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 2981 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2982 // CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 2983 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 2984 // CHECK4-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 2985 // CHECK4-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2986 // CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 2987 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 2988 // CHECK4-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 2989 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2990 // CHECK4-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 2991 // CHECK4-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 2992 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 2993 // CHECK4-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 2994 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2995 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 2996 // CHECK4-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 2997 // CHECK4-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false, i1 false) 2998 // CHECK4-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP4]], -1 2999 // CHECK4-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] 3000 // CHECK4: user_code.entry: 3001 // CHECK4-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]]) 3002 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 4 3003 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32* 3004 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[CONV1]], align 4 3005 // CHECK4-NEXT: [[TMP7:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8 3006 // CHECK4-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 3007 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4 3008 // CHECK4-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i64 [[TMP7]], [10 x i32]* [[TMP3]]) #[[ATTR5:[0-9]+]] 3009 // CHECK4-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) 3010 // CHECK4-NEXT: ret void 3011 // CHECK4: worker.exit: 3012 // CHECK4-NEXT: ret void 3013 // 3014 // 3015 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__ 3016 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[C:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[ARGC:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR1:[0-9]+]] { 3017 // CHECK4-NEXT: entry: 3018 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3019 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3020 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 3021 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 3022 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3023 // CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 3024 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 3025 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3026 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3027 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3028 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3029 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3030 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3031 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3032 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3033 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3034 // CHECK4-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 3035 // CHECK4-NEXT: [[I5:%.*]] = alloca i32, align 4 3036 // CHECK4-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 8 3037 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3038 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3039 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 3040 // CHECK4-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 3041 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3042 // CHECK4-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 3043 // CHECK4-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 3044 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 3045 // CHECK4-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 3046 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3047 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 3048 // CHECK4-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 3049 // CHECK4-NEXT: [[C1:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i64 40) 3050 // CHECK4-NEXT: [[C_ON_STACK:%.*]] = bitcast i8* [[C1]] to [10 x i32]* 3051 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4 3052 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3053 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3054 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3055 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3056 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3057 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3058 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 3059 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3060 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3061 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3062 // CHECK4: omp.precond.then: 3063 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3064 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3065 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 3066 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3067 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3068 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3069 // CHECK4-NEXT: [[TMP9:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 3070 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP8]], i8* align 4 [[TMP9]], i64 40, i1 false) 3071 // CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() 3072 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3073 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3074 // CHECK4-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 3075 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3076 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3077 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3078 // CHECK4-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3079 // CHECK4: cond.true: 3080 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3081 // CHECK4-NEXT: br label [[COND_END:%.*]] 3082 // CHECK4: cond.false: 3083 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3084 // CHECK4-NEXT: br label [[COND_END]] 3085 // CHECK4: cond.end: 3086 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3087 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3088 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3089 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3090 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3091 // CHECK4: omp.inner.for.cond: 3092 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3093 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3094 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 3095 // CHECK4-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 3096 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3097 // CHECK4: omp.inner.for.body: 3098 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3099 // CHECK4-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 3100 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3101 // CHECK4-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 3102 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 3103 // CHECK4-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP20]] to i8* 3104 // CHECK4-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8 3105 // CHECK4-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 3106 // CHECK4-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP22]] to i8* 3107 // CHECK4-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8 3108 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 3109 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast i32* [[CONV]] to i8* 3110 // CHECK4-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8 3111 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 3112 // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP2]] to i8* 3113 // CHECK4-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8 3114 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4 3115 // CHECK4-NEXT: [[TMP32:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3116 // CHECK4-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 8 3117 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 5 3118 // CHECK4-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[C_ON_STACK]] to i8* 3119 // CHECK4-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 8 3120 // CHECK4-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 6 3121 // CHECK4-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3122 // CHECK4-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 8 3123 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP2]], align 4 3124 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0 3125 // CHECK4-NEXT: [[TMP38:%.*]] = zext i1 [[TOBOOL]] to i32 3126 // CHECK4-NEXT: [[TMP39:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3127 // CHECK4-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 3128 // CHECK4-NEXT: [[TMP41:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 3129 // CHECK4-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP40]], i32 [[TMP38]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP41]], i64 7) 3130 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3131 // CHECK4: omp.inner.for.inc: 3132 // CHECK4-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3133 // CHECK4-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3134 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP42]], [[TMP43]] 3135 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 3136 // CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3137 // CHECK4-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3138 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 3139 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 3140 // CHECK4-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3141 // CHECK4-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3142 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 3143 // CHECK4-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 3144 // CHECK4-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3145 // CHECK4-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3146 // CHECK4-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP48]], [[TMP49]] 3147 // CHECK4-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 3148 // CHECK4: cond.true12: 3149 // CHECK4-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3150 // CHECK4-NEXT: br label [[COND_END14:%.*]] 3151 // CHECK4: cond.false13: 3152 // CHECK4-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3153 // CHECK4-NEXT: br label [[COND_END14]] 3154 // CHECK4: cond.end14: 3155 // CHECK4-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP50]], [[COND_TRUE12]] ], [ [[TMP51]], [[COND_FALSE13]] ] 3156 // CHECK4-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 3157 // CHECK4-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3158 // CHECK4-NEXT: store i32 [[TMP52]], i32* [[DOTOMP_IV]], align 4 3159 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3160 // CHECK4: omp.inner.for.end: 3161 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3162 // CHECK4: omp.loop.exit: 3163 // CHECK4-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3164 // CHECK4-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4 3165 // CHECK4-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) 3166 // CHECK4-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3167 // CHECK4-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 3168 // CHECK4-NEXT: br i1 [[TMP56]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3169 // CHECK4: .omp.lastprivate.then: 3170 // CHECK4-NEXT: [[TMP57:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 3171 // CHECK4-NEXT: [[TMP58:%.*]] = bitcast [10 x i32]* [[C_ON_STACK]] to i8* 3172 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP57]], i8* align 4 [[TMP58]], i64 40, i1 false) 3173 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3174 // CHECK4: .omp.lastprivate.done: 3175 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 3176 // CHECK4: omp.precond.end: 3177 // CHECK4-NEXT: call void @__kmpc_free_shared(i8* [[C1]], i64 40) 3178 // CHECK4-NEXT: ret void 3179 // 3180 // 3181 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__1 3182 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR1]] { 3183 // CHECK4-NEXT: entry: 3184 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3185 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3186 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3187 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3188 // CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 3189 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3190 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 3191 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 3192 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 3193 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3194 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3195 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3196 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3197 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3198 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3199 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3200 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3201 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3202 // CHECK4-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 3203 // CHECK4-NEXT: [[C5:%.*]] = alloca [10 x i32], align 4 3204 // CHECK4-NEXT: [[I6:%.*]] = alloca i32, align 4 3205 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3206 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3207 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3208 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3209 // CHECK4-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 3210 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3211 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 3212 // CHECK4-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 3213 // CHECK4-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 3214 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 3215 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3216 // CHECK4-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 3217 // CHECK4-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 3218 // CHECK4-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 3219 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3220 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3221 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3222 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 3223 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3224 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3225 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3226 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 3227 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3228 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 3229 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3230 // CHECK4: omp.precond.then: 3231 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3232 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3233 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3234 // CHECK4-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3235 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 3236 // CHECK4-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3237 // CHECK4-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP10]] to i32 3238 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3239 // CHECK4-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 3240 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3241 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3242 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3243 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 3244 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 40, i1 false) 3245 // CHECK4-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3246 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 3247 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3248 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3249 // CHECK4-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3250 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3251 // CHECK4: omp.inner.for.cond: 3252 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3253 // CHECK4-NEXT: [[CONV7:%.*]] = sext i32 [[TMP16]] to i64 3254 // CHECK4-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3255 // CHECK4-NEXT: [[CMP8:%.*]] = icmp ule i64 [[CONV7]], [[TMP17]] 3256 // CHECK4-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3257 // CHECK4: omp.inner.for.body: 3258 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3259 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3260 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3261 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 3262 // CHECK4-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[I6]]) #[[ATTR7:[0-9]+]] 3263 // CHECK4-NEXT: [[CALL9:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[TMP1]]) #[[ATTR7]] 3264 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[CALL]], [[CALL9]] 3265 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 3266 // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 3267 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B4]], i64 0, i64 [[IDXPROM]] 3268 // CHECK4-NEXT: [[CALL11:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[ARRAYIDX]]) #[[ATTR7]] 3269 // CHECK4-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD10]], [[CALL11]] 3270 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4 3271 // CHECK4-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP20]] to i64 3272 // CHECK4-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C5]], i64 0, i64 [[IDXPROM13]] 3273 // CHECK4-NEXT: [[CALL15:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[ARRAYIDX14]]) #[[ATTR7]] 3274 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD12]], [[CALL15]] 3275 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4 3276 // CHECK4-NEXT: [[IDXPROM17:%.*]] = sext i32 [[TMP21]] to i64 3277 // CHECK4-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i64 0, i64 [[IDXPROM17]] 3278 // CHECK4-NEXT: [[CALL19:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[ARRAYIDX18]]) #[[ATTR7]] 3279 // CHECK4-NEXT: [[ADD20:%.*]] = add nsw i32 [[ADD16]], [[CALL19]] 3280 // CHECK4-NEXT: store i32 [[ADD20]], i32* [[TMP1]], align 4 3281 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3282 // CHECK4: omp.body.continue: 3283 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3284 // CHECK4: omp.inner.for.inc: 3285 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3286 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3287 // CHECK4-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 3288 // CHECK4-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 3289 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3290 // CHECK4: omp.inner.for.end: 3291 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3292 // CHECK4: omp.loop.exit: 3293 // CHECK4-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3294 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 3295 // CHECK4-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]]) 3296 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3297 // CHECK4-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 3298 // CHECK4-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3299 // CHECK4: .omp.lastprivate.then: 3300 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3301 // CHECK4-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C5]] to i8* 3302 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 40, i1 false) 3303 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3304 // CHECK4: .omp.lastprivate.done: 3305 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 3306 // CHECK4: omp.precond.end: 3307 // CHECK4-NEXT: ret void 3308 // 3309 // 3310 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l19 3311 // CHECK5-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[C:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[ARGC:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 3312 // CHECK5-NEXT: entry: 3313 // CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3314 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3315 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3316 // CHECK5-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3317 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3318 // CHECK5-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 3319 // CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 3320 // CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 3321 // CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3322 // CHECK5-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3323 // CHECK5-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3324 // CHECK5-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3325 // CHECK5-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3326 // CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3327 // CHECK5-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3328 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3329 // CHECK5-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3330 // CHECK5-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false, i1 false) 3331 // CHECK5-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP4]], -1 3332 // CHECK5-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] 3333 // CHECK5: user_code.entry: 3334 // CHECK5-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]]) 3335 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3336 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[ARGC_CASTED]], align 4 3337 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 3338 // CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 3339 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4 3340 // CHECK5-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP7]], [10 x i32]* [[TMP3]]) #[[ATTR5:[0-9]+]] 3341 // CHECK5-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) 3342 // CHECK5-NEXT: ret void 3343 // CHECK5: worker.exit: 3344 // CHECK5-NEXT: ret void 3345 // 3346 // 3347 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__ 3348 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[C:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[ARGC:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR1:[0-9]+]] { 3349 // CHECK5-NEXT: entry: 3350 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3351 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3352 // CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3353 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3354 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3355 // CHECK5-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3356 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3357 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3358 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3359 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3360 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3361 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3362 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3363 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3364 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3365 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3366 // CHECK5-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 3367 // CHECK5-NEXT: [[I5:%.*]] = alloca i32, align 4 3368 // CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 3369 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3370 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3371 // CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3372 // CHECK5-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3373 // CHECK5-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3374 // CHECK5-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3375 // CHECK5-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3376 // CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3377 // CHECK5-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3378 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3379 // CHECK5-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3380 // CHECK5-NEXT: [[C1:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i32 40) 3381 // CHECK5-NEXT: [[C_ON_STACK:%.*]] = bitcast i8* [[C1]] to [10 x i32]* 3382 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3383 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3384 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3385 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3386 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3387 // CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3388 // CHECK5-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3389 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 3390 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3391 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3392 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3393 // CHECK5: omp.precond.then: 3394 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3395 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3396 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 3397 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3398 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3399 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3400 // CHECK5-NEXT: [[TMP9:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 3401 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP8]], i8* align 4 [[TMP9]], i32 40, i1 false) 3402 // CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() 3403 // CHECK5-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3404 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3405 // CHECK5-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 3406 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3407 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3408 // CHECK5-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3409 // CHECK5-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3410 // CHECK5: cond.true: 3411 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3412 // CHECK5-NEXT: br label [[COND_END:%.*]] 3413 // CHECK5: cond.false: 3414 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3415 // CHECK5-NEXT: br label [[COND_END]] 3416 // CHECK5: cond.end: 3417 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3418 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3419 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3420 // CHECK5-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3421 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3422 // CHECK5: omp.inner.for.cond: 3423 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3424 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3425 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 3426 // CHECK5-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 3427 // CHECK5-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3428 // CHECK5: omp.inner.for.body: 3429 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3430 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3431 // CHECK5-NEXT: [[TMP21:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 3432 // CHECK5-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP19]] to i8* 3433 // CHECK5-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4 3434 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 3435 // CHECK5-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP20]] to i8* 3436 // CHECK5-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4 3437 // CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 3438 // CHECK5-NEXT: [[TMP26:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 3439 // CHECK5-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4 3440 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 3441 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP2]] to i8* 3442 // CHECK5-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4 3443 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 3444 // CHECK5-NEXT: [[TMP30:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3445 // CHECK5-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4 3446 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 3447 // CHECK5-NEXT: [[TMP32:%.*]] = bitcast [10 x i32]* [[C_ON_STACK]] to i8* 3448 // CHECK5-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4 3449 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 3450 // CHECK5-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3451 // CHECK5-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4 3452 // CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP2]], align 4 3453 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP35]], 0 3454 // CHECK5-NEXT: [[TMP36:%.*]] = zext i1 [[TOBOOL]] to i32 3455 // CHECK5-NEXT: [[TMP37:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3456 // CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP37]], align 4 3457 // CHECK5-NEXT: [[TMP39:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 3458 // CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP38]], i32 [[TMP36]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP39]], i32 7) 3459 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3460 // CHECK5: omp.inner.for.inc: 3461 // CHECK5-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3462 // CHECK5-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3463 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]] 3464 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 3465 // CHECK5-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3466 // CHECK5-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3467 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]] 3468 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 3469 // CHECK5-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3470 // CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3471 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 3472 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 3473 // CHECK5-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3474 // CHECK5-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3475 // CHECK5-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP46]], [[TMP47]] 3476 // CHECK5-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 3477 // CHECK5: cond.true12: 3478 // CHECK5-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3479 // CHECK5-NEXT: br label [[COND_END14:%.*]] 3480 // CHECK5: cond.false13: 3481 // CHECK5-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3482 // CHECK5-NEXT: br label [[COND_END14]] 3483 // CHECK5: cond.end14: 3484 // CHECK5-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP48]], [[COND_TRUE12]] ], [ [[TMP49]], [[COND_FALSE13]] ] 3485 // CHECK5-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 3486 // CHECK5-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3487 // CHECK5-NEXT: store i32 [[TMP50]], i32* [[DOTOMP_IV]], align 4 3488 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3489 // CHECK5: omp.inner.for.end: 3490 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3491 // CHECK5: omp.loop.exit: 3492 // CHECK5-NEXT: [[TMP51:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3493 // CHECK5-NEXT: [[TMP52:%.*]] = load i32, i32* [[TMP51]], align 4 3494 // CHECK5-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP52]]) 3495 // CHECK5-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3496 // CHECK5-NEXT: [[TMP54:%.*]] = icmp ne i32 [[TMP53]], 0 3497 // CHECK5-NEXT: br i1 [[TMP54]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3498 // CHECK5: .omp.lastprivate.then: 3499 // CHECK5-NEXT: [[TMP55:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 3500 // CHECK5-NEXT: [[TMP56:%.*]] = bitcast [10 x i32]* [[C_ON_STACK]] to i8* 3501 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP55]], i8* align 4 [[TMP56]], i32 40, i1 false) 3502 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3503 // CHECK5: .omp.lastprivate.done: 3504 // CHECK5-NEXT: br label [[OMP_PRECOND_END]] 3505 // CHECK5: omp.precond.end: 3506 // CHECK5-NEXT: call void @__kmpc_free_shared(i8* [[C1]], i32 40) 3507 // CHECK5-NEXT: ret void 3508 // 3509 // 3510 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__1 3511 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR1]] { 3512 // CHECK5-NEXT: entry: 3513 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3514 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3515 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3516 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3517 // CHECK5-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 3518 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3519 // CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3520 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3521 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3522 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3523 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3524 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3525 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3526 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3527 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3528 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3529 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3530 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3531 // CHECK5-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 3532 // CHECK5-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 3533 // CHECK5-NEXT: [[I5:%.*]] = alloca i32, align 4 3534 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3535 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3536 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3537 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3538 // CHECK5-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 3539 // CHECK5-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3540 // CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3541 // CHECK5-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3542 // CHECK5-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3543 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 3544 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3545 // CHECK5-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3546 // CHECK5-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3547 // CHECK5-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3548 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3549 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3550 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3551 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 3552 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3553 // CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3554 // CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3555 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 3556 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3557 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 3558 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3559 // CHECK5: omp.precond.then: 3560 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3561 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3562 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3563 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3564 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3565 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 3566 // CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 3567 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3568 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3569 // CHECK5-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 3570 // CHECK5-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 3571 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 3572 // CHECK5-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3573 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 3574 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3575 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3576 // CHECK5-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3577 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3578 // CHECK5: omp.inner.for.cond: 3579 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3580 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3581 // CHECK5-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 3582 // CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3583 // CHECK5: omp.inner.for.body: 3584 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3585 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3586 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3587 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 3588 // CHECK5-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[I5]]) #[[ATTR7:[0-9]+]] 3589 // CHECK5-NEXT: [[CALL7:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[TMP1]]) #[[ATTR7]] 3590 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 3591 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 3592 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 3593 // CHECK5-NEXT: [[CALL9:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[ARRAYIDX]]) #[[ATTR7]] 3594 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 3595 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 3596 // CHECK5-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 3597 // CHECK5-NEXT: [[CALL12:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[ARRAYIDX11]]) #[[ATTR7]] 3598 // CHECK5-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 3599 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 3600 // CHECK5-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 3601 // CHECK5-NEXT: [[CALL15:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[ARRAYIDX14]]) #[[ATTR7]] 3602 // CHECK5-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 3603 // CHECK5-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 3604 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3605 // CHECK5: omp.body.continue: 3606 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3607 // CHECK5: omp.inner.for.inc: 3608 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3609 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3610 // CHECK5-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 3611 // CHECK5-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 3612 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3613 // CHECK5: omp.inner.for.end: 3614 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3615 // CHECK5: omp.loop.exit: 3616 // CHECK5-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3617 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 3618 // CHECK5-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]]) 3619 // CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3620 // CHECK5-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 3621 // CHECK5-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3622 // CHECK5: .omp.lastprivate.then: 3623 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3624 // CHECK5-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 3625 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 3626 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3627 // CHECK5: .omp.lastprivate.done: 3628 // CHECK5-NEXT: br label [[OMP_PRECOND_END]] 3629 // CHECK5: omp.precond.end: 3630 // CHECK5-NEXT: ret void 3631 // 3632 // 3633 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l19 3634 // CHECK6-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[C:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[ARGC:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 3635 // CHECK6-NEXT: entry: 3636 // CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3637 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3638 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3639 // CHECK6-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3640 // CHECK6-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3641 // CHECK6-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 3642 // CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 3643 // CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 3644 // CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3645 // CHECK6-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3646 // CHECK6-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3647 // CHECK6-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3648 // CHECK6-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3649 // CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3650 // CHECK6-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3651 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3652 // CHECK6-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3653 // CHECK6-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false, i1 false) 3654 // CHECK6-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP4]], -1 3655 // CHECK6-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] 3656 // CHECK6: user_code.entry: 3657 // CHECK6-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]]) 3658 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3659 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[ARGC_CASTED]], align 4 3660 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 3661 // CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 3662 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4 3663 // CHECK6-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP7]], [10 x i32]* [[TMP3]]) #[[ATTR5:[0-9]+]] 3664 // CHECK6-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) 3665 // CHECK6-NEXT: ret void 3666 // CHECK6: worker.exit: 3667 // CHECK6-NEXT: ret void 3668 // 3669 // 3670 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__ 3671 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[C:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[ARGC:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR1:[0-9]+]] { 3672 // CHECK6-NEXT: entry: 3673 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3674 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3675 // CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3676 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3677 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3678 // CHECK6-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3679 // CHECK6-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3680 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3681 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3682 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3683 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3684 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 3685 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3686 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3687 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3688 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3689 // CHECK6-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 3690 // CHECK6-NEXT: [[I5:%.*]] = alloca i32, align 4 3691 // CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 3692 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3693 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3694 // CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3695 // CHECK6-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3696 // CHECK6-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3697 // CHECK6-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3698 // CHECK6-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3699 // CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3700 // CHECK6-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3701 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3702 // CHECK6-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3703 // CHECK6-NEXT: [[C1:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i32 40) 3704 // CHECK6-NEXT: [[C_ON_STACK:%.*]] = bitcast i8* [[C1]] to [10 x i32]* 3705 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3706 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3707 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3708 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3709 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3710 // CHECK6-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3711 // CHECK6-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3712 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 3713 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3714 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3715 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3716 // CHECK6: omp.precond.then: 3717 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3718 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3719 // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 3720 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3721 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3722 // CHECK6-NEXT: [[TMP8:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3723 // CHECK6-NEXT: [[TMP9:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 3724 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP8]], i8* align 4 [[TMP9]], i32 40, i1 false) 3725 // CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() 3726 // CHECK6-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3727 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3728 // CHECK6-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 3729 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3730 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3731 // CHECK6-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3732 // CHECK6-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3733 // CHECK6: cond.true: 3734 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3735 // CHECK6-NEXT: br label [[COND_END:%.*]] 3736 // CHECK6: cond.false: 3737 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3738 // CHECK6-NEXT: br label [[COND_END]] 3739 // CHECK6: cond.end: 3740 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3741 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3742 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3743 // CHECK6-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3744 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3745 // CHECK6: omp.inner.for.cond: 3746 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3747 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3748 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 3749 // CHECK6-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 3750 // CHECK6-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3751 // CHECK6: omp.inner.for.body: 3752 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3753 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3754 // CHECK6-NEXT: [[TMP21:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 3755 // CHECK6-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP19]] to i8* 3756 // CHECK6-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4 3757 // CHECK6-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 3758 // CHECK6-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP20]] to i8* 3759 // CHECK6-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4 3760 // CHECK6-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 3761 // CHECK6-NEXT: [[TMP26:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 3762 // CHECK6-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4 3763 // CHECK6-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 3764 // CHECK6-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP2]] to i8* 3765 // CHECK6-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4 3766 // CHECK6-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 3767 // CHECK6-NEXT: [[TMP30:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3768 // CHECK6-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4 3769 // CHECK6-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 3770 // CHECK6-NEXT: [[TMP32:%.*]] = bitcast [10 x i32]* [[C_ON_STACK]] to i8* 3771 // CHECK6-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4 3772 // CHECK6-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 3773 // CHECK6-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3774 // CHECK6-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4 3775 // CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP2]], align 4 3776 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP35]], 0 3777 // CHECK6-NEXT: [[TMP36:%.*]] = zext i1 [[TOBOOL]] to i32 3778 // CHECK6-NEXT: [[TMP37:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3779 // CHECK6-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP37]], align 4 3780 // CHECK6-NEXT: [[TMP39:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 3781 // CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP38]], i32 [[TMP36]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP39]], i32 7) 3782 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3783 // CHECK6: omp.inner.for.inc: 3784 // CHECK6-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3785 // CHECK6-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3786 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]] 3787 // CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 3788 // CHECK6-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3789 // CHECK6-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3790 // CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]] 3791 // CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 3792 // CHECK6-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3793 // CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3794 // CHECK6-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 3795 // CHECK6-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 3796 // CHECK6-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3797 // CHECK6-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3798 // CHECK6-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP46]], [[TMP47]] 3799 // CHECK6-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 3800 // CHECK6: cond.true12: 3801 // CHECK6-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3802 // CHECK6-NEXT: br label [[COND_END14:%.*]] 3803 // CHECK6: cond.false13: 3804 // CHECK6-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3805 // CHECK6-NEXT: br label [[COND_END14]] 3806 // CHECK6: cond.end14: 3807 // CHECK6-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP48]], [[COND_TRUE12]] ], [ [[TMP49]], [[COND_FALSE13]] ] 3808 // CHECK6-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 3809 // CHECK6-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3810 // CHECK6-NEXT: store i32 [[TMP50]], i32* [[DOTOMP_IV]], align 4 3811 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 3812 // CHECK6: omp.inner.for.end: 3813 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3814 // CHECK6: omp.loop.exit: 3815 // CHECK6-NEXT: [[TMP51:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3816 // CHECK6-NEXT: [[TMP52:%.*]] = load i32, i32* [[TMP51]], align 4 3817 // CHECK6-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP52]]) 3818 // CHECK6-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3819 // CHECK6-NEXT: [[TMP54:%.*]] = icmp ne i32 [[TMP53]], 0 3820 // CHECK6-NEXT: br i1 [[TMP54]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3821 // CHECK6: .omp.lastprivate.then: 3822 // CHECK6-NEXT: [[TMP55:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 3823 // CHECK6-NEXT: [[TMP56:%.*]] = bitcast [10 x i32]* [[C_ON_STACK]] to i8* 3824 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP55]], i8* align 4 [[TMP56]], i32 40, i1 false) 3825 // CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3826 // CHECK6: .omp.lastprivate.done: 3827 // CHECK6-NEXT: br label [[OMP_PRECOND_END]] 3828 // CHECK6: omp.precond.end: 3829 // CHECK6-NEXT: call void @__kmpc_free_shared(i8* [[C1]], i32 40) 3830 // CHECK6-NEXT: ret void 3831 // 3832 // 3833 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__1 3834 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR1]] { 3835 // CHECK6-NEXT: entry: 3836 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3837 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3838 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3839 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3840 // CHECK6-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 3841 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3842 // CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3843 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3844 // CHECK6-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3845 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3846 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3847 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3848 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3849 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 3850 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3851 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3852 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3853 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3854 // CHECK6-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 3855 // CHECK6-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 3856 // CHECK6-NEXT: [[I5:%.*]] = alloca i32, align 4 3857 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3858 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3859 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3860 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3861 // CHECK6-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 3862 // CHECK6-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3863 // CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3864 // CHECK6-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3865 // CHECK6-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3866 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 3867 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3868 // CHECK6-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3869 // CHECK6-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3870 // CHECK6-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3871 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3872 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3873 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3874 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 3875 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3876 // CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3877 // CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3878 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 3879 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3880 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 3881 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3882 // CHECK6: omp.precond.then: 3883 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3884 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3885 // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3886 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3887 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3888 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 3889 // CHECK6-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 3890 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3891 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3892 // CHECK6-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 3893 // CHECK6-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 3894 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 3895 // CHECK6-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3896 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 3897 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3898 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3899 // CHECK6-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3900 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3901 // CHECK6: omp.inner.for.cond: 3902 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3903 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3904 // CHECK6-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 3905 // CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3906 // CHECK6: omp.inner.for.body: 3907 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3908 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3909 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3910 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 3911 // CHECK6-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[I5]]) #[[ATTR7:[0-9]+]] 3912 // CHECK6-NEXT: [[CALL7:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[TMP1]]) #[[ATTR7]] 3913 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 3914 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 3915 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 3916 // CHECK6-NEXT: [[CALL9:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[ARRAYIDX]]) #[[ATTR7]] 3917 // CHECK6-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 3918 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 3919 // CHECK6-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 3920 // CHECK6-NEXT: [[CALL12:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[ARRAYIDX11]]) #[[ATTR7]] 3921 // CHECK6-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 3922 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 3923 // CHECK6-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 3924 // CHECK6-NEXT: [[CALL15:%.*]] = call noundef i32 @_Z3fooPi(i32* noundef [[ARRAYIDX14]]) #[[ATTR7]] 3925 // CHECK6-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 3926 // CHECK6-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 3927 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3928 // CHECK6: omp.body.continue: 3929 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3930 // CHECK6: omp.inner.for.inc: 3931 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3932 // CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3933 // CHECK6-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 3934 // CHECK6-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 3935 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 3936 // CHECK6: omp.inner.for.end: 3937 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3938 // CHECK6: omp.loop.exit: 3939 // CHECK6-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3940 // CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 3941 // CHECK6-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]]) 3942 // CHECK6-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3943 // CHECK6-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 3944 // CHECK6-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3945 // CHECK6: .omp.lastprivate.then: 3946 // CHECK6-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3947 // CHECK6-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 3948 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 3949 // CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3950 // CHECK6: .omp.lastprivate.done: 3951 // CHECK6-NEXT: br label [[OMP_PRECOND_END]] 3952 // CHECK6: omp.precond.end: 3953 // CHECK6-NEXT: ret void 3954 // 3955