1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test target codegen - host bc file has to be created first. 3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc 4 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns -fopenmp-cuda-parallel-target-regions | FileCheck %s --check-prefix=CHECK2 6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc 7 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK3 8 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK4 9 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns -fopenmp-cuda-parallel-target-regions | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns -fopenmp-cuda-parallel-target-regions | FileCheck %s --check-prefix=CHECK6 11 12 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc 13 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK7 14 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns -fopenmp-cuda-parallel-target-regions | FileCheck %s --check-prefix=CHECK8 15 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK10 18 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns -fopenmp-cuda-parallel-target-regions | FileCheck %s --check-prefix=CHECK11 19 // RUN: %clang_cc1 -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns -fopenmp-cuda-parallel-target-regions | FileCheck %s --check-prefix=CHECK12 20 21 // expected-no-diagnostics 22 #ifndef HEADER 23 #define HEADER 24 25 int a; 26 27 int foo(int *a); 28 29 int main(int argc, char **argv) { 30 int b[10], c[10], d[10]; 31 #pragma omp target teams map(tofrom:a) 32 #pragma omp distribute parallel for firstprivate(b) lastprivate(c) if(a) 33 for (int i= 0; i < argc; ++i) 34 a = foo(&i) + foo(&a) + foo(&b[i]) + foo(&c[i]) + foo(&d[i]); 35 return 0; 36 } 37 38 #endif 39 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 40 // CHECK1-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 41 // CHECK1-NEXT: entry: 42 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 43 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 44 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 45 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 46 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 47 // CHECK1-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 48 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 49 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 50 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 51 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 52 // CHECK1-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 53 // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 54 // CHECK1-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 55 // CHECK1-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 56 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 57 // CHECK1-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 58 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 59 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 60 // CHECK1-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 61 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 62 // CHECK1-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 63 // CHECK1-NEXT: br label [[DOTEXECUTE:%.*]] 64 // CHECK1: .execute: 65 // CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 66 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV]], align 8 67 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32* 68 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 69 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8 70 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 71 // CHECK1-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i64 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 72 // CHECK1-NEXT: br label [[DOTOMP_DEINIT:%.*]] 73 // CHECK1: .omp.deinit: 74 // CHECK1-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 75 // CHECK1-NEXT: br label [[DOTEXIT:%.*]] 76 // CHECK1: .exit: 77 // CHECK1-NEXT: ret void 78 // 79 // 80 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__ 81 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 82 // CHECK1-NEXT: entry: 83 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 84 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 85 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 86 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 87 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 88 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 89 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 90 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 91 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 92 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 93 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 94 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 95 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 96 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 97 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 98 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 99 // CHECK1-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 100 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 101 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 8 102 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 103 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 104 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 105 // CHECK1-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 106 // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 107 // CHECK1-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 108 // CHECK1-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 109 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 110 // CHECK1-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 111 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 112 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 113 // CHECK1-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 114 // CHECK1-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 115 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8 116 // CHECK1-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 117 // CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 118 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i64 0 119 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 120 // CHECK1-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 121 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 122 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 123 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 124 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 125 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 126 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 127 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 128 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 129 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 130 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 131 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 132 // CHECK1: omp.precond.then: 133 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 134 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 135 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 136 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 137 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 138 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 139 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 140 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 40, i1 false) 141 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 142 // CHECK1-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 143 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 144 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 145 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 146 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 147 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 148 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 149 // CHECK1: cond.true: 150 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 151 // CHECK1-NEXT: br label [[COND_END:%.*]] 152 // CHECK1: cond.false: 153 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 154 // CHECK1-NEXT: br label [[COND_END]] 155 // CHECK1: cond.end: 156 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 157 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 158 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 159 // CHECK1-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 160 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 161 // CHECK1: omp.inner.for.cond: 162 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 163 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 164 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 165 // CHECK1-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 166 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 167 // CHECK1: omp.inner.for.body: 168 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 169 // CHECK1-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 170 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 171 // CHECK1-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64 172 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 173 // CHECK1-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP25]] to i8* 174 // CHECK1-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8 175 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 176 // CHECK1-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP27]] to i8* 177 // CHECK1-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8 178 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 179 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast i32* [[CONV]] to i8* 180 // CHECK1-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 8 181 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 182 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i32* [[TMP2]] to i8* 183 // CHECK1-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 8 184 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4 185 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 186 // CHECK1-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 8 187 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 5 188 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 189 // CHECK1-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 8 190 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 6 191 // CHECK1-NEXT: [[TMP41:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 192 // CHECK1-NEXT: store i8* [[TMP41]], i8** [[TMP40]], align 8 193 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP2]], align 4 194 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP42]], 0 195 // CHECK1-NEXT: [[TMP43:%.*]] = zext i1 [[TOBOOL]] to i32 196 // CHECK1-NEXT: [[TMP44:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 197 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[TMP44]], align 4 198 // CHECK1-NEXT: [[TMP46:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 199 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP45]], i32 [[TMP43]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP46]], i64 7) 200 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 201 // CHECK1: omp.inner.for.inc: 202 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 203 // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 204 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 205 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 206 // CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 207 // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 208 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 209 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 210 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 211 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 212 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP51]], [[TMP52]] 213 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 214 // CHECK1-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 215 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 216 // CHECK1-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP53]], [[TMP54]] 217 // CHECK1-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 218 // CHECK1: cond.true12: 219 // CHECK1-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 220 // CHECK1-NEXT: br label [[COND_END14:%.*]] 221 // CHECK1: cond.false13: 222 // CHECK1-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 223 // CHECK1-NEXT: br label [[COND_END14]] 224 // CHECK1: cond.end14: 225 // CHECK1-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP55]], [[COND_TRUE12]] ], [ [[TMP56]], [[COND_FALSE13]] ] 226 // CHECK1-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 227 // CHECK1-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 228 // CHECK1-NEXT: store i32 [[TMP57]], i32* [[DOTOMP_IV]], align 4 229 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 230 // CHECK1: omp.inner.for.end: 231 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 232 // CHECK1: omp.loop.exit: 233 // CHECK1-NEXT: [[TMP58:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 234 // CHECK1-NEXT: [[TMP59:%.*]] = load i32, i32* [[TMP58]], align 4 235 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP59]]) 236 // CHECK1-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 237 // CHECK1-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 238 // CHECK1-NEXT: br i1 [[TMP61]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 239 // CHECK1: .omp.lastprivate.then: 240 // CHECK1-NEXT: [[TMP62:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 241 // CHECK1-NEXT: [[TMP63:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 242 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP62]], i8* align 4 [[TMP63]], i64 40, i1 false) 243 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 244 // CHECK1: .omp.lastprivate.done: 245 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 246 // CHECK1: omp.precond.end: 247 // CHECK1-NEXT: [[TMP64:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 248 // CHECK1-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP64]]) 249 // CHECK1-NEXT: ret void 250 // 251 // 252 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1 253 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 254 // CHECK1-NEXT: entry: 255 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 256 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 257 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 258 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 259 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 260 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 261 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 262 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 263 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 264 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 265 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 266 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 267 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 268 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 269 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 270 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 271 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 272 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 273 // CHECK1-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 274 // CHECK1-NEXT: [[C5:%.*]] = alloca [10 x i32], align 4 275 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4 276 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 277 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 278 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 279 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 280 // CHECK1-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 281 // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 282 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 283 // CHECK1-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 284 // CHECK1-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 285 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 286 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 287 // CHECK1-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 288 // CHECK1-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 289 // CHECK1-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 290 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 291 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 292 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 293 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 294 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 295 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 296 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 297 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 298 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 299 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 300 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 301 // CHECK1: omp.precond.then: 302 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 303 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 304 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 305 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 306 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 307 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 308 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP10]] to i32 309 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 310 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 311 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 312 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 313 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 314 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 315 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 40, i1 false) 316 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 317 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 318 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 319 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 320 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 321 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 322 // CHECK1: omp.inner.for.cond: 323 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 324 // CHECK1-NEXT: [[CONV7:%.*]] = sext i32 [[TMP16]] to i64 325 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 326 // CHECK1-NEXT: [[CMP8:%.*]] = icmp ule i64 [[CONV7]], [[TMP17]] 327 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 328 // CHECK1: omp.inner.for.body: 329 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 330 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 331 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 332 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 333 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I6]]) #[[ATTR5:[0-9]+]] 334 // CHECK1-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 335 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[CALL]], [[CALL9]] 336 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 337 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 338 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B4]], i64 0, i64 [[IDXPROM]] 339 // CHECK1-NEXT: [[CALL11:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 340 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD10]], [[CALL11]] 341 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4 342 // CHECK1-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP20]] to i64 343 // CHECK1-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C5]], i64 0, i64 [[IDXPROM13]] 344 // CHECK1-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 345 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD12]], [[CALL15]] 346 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4 347 // CHECK1-NEXT: [[IDXPROM17:%.*]] = sext i32 [[TMP21]] to i64 348 // CHECK1-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i64 0, i64 [[IDXPROM17]] 349 // CHECK1-NEXT: [[CALL19:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX18]]) #[[ATTR5]] 350 // CHECK1-NEXT: [[ADD20:%.*]] = add nsw i32 [[ADD16]], [[CALL19]] 351 // CHECK1-NEXT: store i32 [[ADD20]], i32* [[TMP1]], align 4 352 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 353 // CHECK1: omp.body.continue: 354 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 355 // CHECK1: omp.inner.for.inc: 356 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 357 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 358 // CHECK1-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 359 // CHECK1-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 360 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 361 // CHECK1: omp.inner.for.end: 362 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 363 // CHECK1: omp.loop.exit: 364 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 365 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 366 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 367 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 368 // CHECK1-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 369 // CHECK1-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 370 // CHECK1: .omp.lastprivate.then: 371 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 372 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C5]] to i8* 373 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 40, i1 false) 374 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 375 // CHECK1: .omp.lastprivate.done: 376 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 377 // CHECK1: omp.precond.end: 378 // CHECK1-NEXT: ret void 379 // 380 // 381 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 382 // CHECK2-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 383 // CHECK2-NEXT: entry: 384 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 385 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 386 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 387 // CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 388 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 389 // CHECK2-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 390 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 391 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 392 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 393 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 394 // CHECK2-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 395 // CHECK2-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 396 // CHECK2-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 397 // CHECK2-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 398 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 399 // CHECK2-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 400 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 401 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 402 // CHECK2-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 403 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 404 // CHECK2-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 405 // CHECK2-NEXT: br label [[DOTEXECUTE:%.*]] 406 // CHECK2: .execute: 407 // CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 408 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV]], align 8 409 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32* 410 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 411 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8 412 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 413 // CHECK2-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i64 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 414 // CHECK2-NEXT: br label [[DOTOMP_DEINIT:%.*]] 415 // CHECK2: .omp.deinit: 416 // CHECK2-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 417 // CHECK2-NEXT: br label [[DOTEXIT:%.*]] 418 // CHECK2: .exit: 419 // CHECK2-NEXT: ret void 420 // 421 // 422 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__ 423 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 424 // CHECK2-NEXT: entry: 425 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 426 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 427 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 428 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 429 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 430 // CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 431 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 432 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 433 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 434 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 435 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 436 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 437 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 438 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 439 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 440 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 441 // CHECK2-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 442 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4 443 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 8 444 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 445 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 446 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 447 // CHECK2-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 448 // CHECK2-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 449 // CHECK2-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 450 // CHECK2-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 451 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 452 // CHECK2-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 453 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 454 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 455 // CHECK2-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 456 // CHECK2-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i64 40, i16 1) 457 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty* 458 // CHECK2-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0 459 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 460 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4 461 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 462 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 463 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 464 // CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 465 // CHECK2-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 466 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 467 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 468 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 469 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 470 // CHECK2: omp.precond.then: 471 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 472 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 473 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 474 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 475 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 476 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 477 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 478 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 40, i1 false) 479 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 480 // CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 481 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 482 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 483 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 484 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 485 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 486 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 487 // CHECK2: cond.true: 488 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 489 // CHECK2-NEXT: br label [[COND_END:%.*]] 490 // CHECK2: cond.false: 491 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 492 // CHECK2-NEXT: br label [[COND_END]] 493 // CHECK2: cond.end: 494 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 495 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 496 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 497 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 498 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 499 // CHECK2: omp.inner.for.cond: 500 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 501 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 502 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], 1 503 // CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP19]], [[ADD]] 504 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 505 // CHECK2: omp.inner.for.body: 506 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 507 // CHECK2-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 508 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 509 // CHECK2-NEXT: [[TMP24:%.*]] = zext i32 [[TMP23]] to i64 510 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 511 // CHECK2-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP22]] to i8* 512 // CHECK2-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8 513 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 514 // CHECK2-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP24]] to i8* 515 // CHECK2-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8 516 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 517 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i32* [[CONV]] to i8* 518 // CHECK2-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8 519 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 520 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast i32* [[TMP2]] to i8* 521 // CHECK2-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 8 522 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4 523 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 524 // CHECK2-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 8 525 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 5 526 // CHECK2-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 527 // CHECK2-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 8 528 // CHECK2-NEXT: [[TMP37:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 6 529 // CHECK2-NEXT: [[TMP38:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 530 // CHECK2-NEXT: store i8* [[TMP38]], i8** [[TMP37]], align 8 531 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[TMP2]], align 4 532 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP39]], 0 533 // CHECK2-NEXT: [[TMP40:%.*]] = zext i1 [[TOBOOL]] to i32 534 // CHECK2-NEXT: [[TMP41:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 535 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP41]], align 4 536 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 537 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP42]], i32 [[TMP40]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP43]], i64 7) 538 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 539 // CHECK2: omp.inner.for.inc: 540 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 541 // CHECK2-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 542 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 543 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 544 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 545 // CHECK2-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 546 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 547 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 548 // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 549 // CHECK2-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 550 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP48]], [[TMP49]] 551 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 552 // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 553 // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 554 // CHECK2-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP50]], [[TMP51]] 555 // CHECK2-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 556 // CHECK2: cond.true12: 557 // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 558 // CHECK2-NEXT: br label [[COND_END14:%.*]] 559 // CHECK2: cond.false13: 560 // CHECK2-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 561 // CHECK2-NEXT: br label [[COND_END14]] 562 // CHECK2: cond.end14: 563 // CHECK2-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP52]], [[COND_TRUE12]] ], [ [[TMP53]], [[COND_FALSE13]] ] 564 // CHECK2-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 565 // CHECK2-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 566 // CHECK2-NEXT: store i32 [[TMP54]], i32* [[DOTOMP_IV]], align 4 567 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 568 // CHECK2: omp.inner.for.end: 569 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 570 // CHECK2: omp.loop.exit: 571 // CHECK2-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 572 // CHECK2-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4 573 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP56]]) 574 // CHECK2-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 575 // CHECK2-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 576 // CHECK2-NEXT: br i1 [[TMP58]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 577 // CHECK2: .omp.lastprivate.then: 578 // CHECK2-NEXT: [[TMP59:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 579 // CHECK2-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 580 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP59]], i8* align 4 [[TMP60]], i64 40, i1 false) 581 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 582 // CHECK2: .omp.lastprivate.done: 583 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 584 // CHECK2: omp.precond.end: 585 // CHECK2-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP4]]) 586 // CHECK2-NEXT: ret void 587 // 588 // 589 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1 590 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 591 // CHECK2-NEXT: entry: 592 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 593 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 594 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 595 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 596 // CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 597 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 598 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 599 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 600 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 601 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 602 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 603 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 604 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 605 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 606 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 607 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 608 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 609 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 610 // CHECK2-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 611 // CHECK2-NEXT: [[C5:%.*]] = alloca [10 x i32], align 4 612 // CHECK2-NEXT: [[I6:%.*]] = alloca i32, align 4 613 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 614 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 615 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 616 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 617 // CHECK2-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 618 // CHECK2-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 619 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 620 // CHECK2-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 621 // CHECK2-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 622 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 623 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 624 // CHECK2-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 625 // CHECK2-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 626 // CHECK2-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 627 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 628 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 629 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 630 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 631 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 632 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 633 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 634 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 635 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 636 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 637 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 638 // CHECK2: omp.precond.then: 639 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 640 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 641 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 642 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 643 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 644 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 645 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP10]] to i32 646 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 647 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 648 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 649 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 650 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 651 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 652 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 40, i1 false) 653 // CHECK2-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 654 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 655 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 656 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 657 // CHECK2-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 658 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 659 // CHECK2: omp.inner.for.cond: 660 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 661 // CHECK2-NEXT: [[CONV7:%.*]] = sext i32 [[TMP16]] to i64 662 // CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 663 // CHECK2-NEXT: [[CMP8:%.*]] = icmp ule i64 [[CONV7]], [[TMP17]] 664 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 665 // CHECK2: omp.inner.for.body: 666 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 667 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 668 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 669 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 670 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I6]]) #[[ATTR5:[0-9]+]] 671 // CHECK2-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 672 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[CALL]], [[CALL9]] 673 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 674 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 675 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B4]], i64 0, i64 [[IDXPROM]] 676 // CHECK2-NEXT: [[CALL11:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 677 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD10]], [[CALL11]] 678 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4 679 // CHECK2-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP20]] to i64 680 // CHECK2-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C5]], i64 0, i64 [[IDXPROM13]] 681 // CHECK2-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 682 // CHECK2-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD12]], [[CALL15]] 683 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4 684 // CHECK2-NEXT: [[IDXPROM17:%.*]] = sext i32 [[TMP21]] to i64 685 // CHECK2-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i64 0, i64 [[IDXPROM17]] 686 // CHECK2-NEXT: [[CALL19:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX18]]) #[[ATTR5]] 687 // CHECK2-NEXT: [[ADD20:%.*]] = add nsw i32 [[ADD16]], [[CALL19]] 688 // CHECK2-NEXT: store i32 [[ADD20]], i32* [[TMP1]], align 4 689 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 690 // CHECK2: omp.body.continue: 691 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 692 // CHECK2: omp.inner.for.inc: 693 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 694 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 695 // CHECK2-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 696 // CHECK2-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 697 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 698 // CHECK2: omp.inner.for.end: 699 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 700 // CHECK2: omp.loop.exit: 701 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 702 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 703 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 704 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 705 // CHECK2-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 706 // CHECK2-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 707 // CHECK2: .omp.lastprivate.then: 708 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 709 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C5]] to i8* 710 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 40, i1 false) 711 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 712 // CHECK2: .omp.lastprivate.done: 713 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 714 // CHECK2: omp.precond.end: 715 // CHECK2-NEXT: ret void 716 // 717 // 718 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 719 // CHECK3-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 720 // CHECK3-NEXT: entry: 721 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 722 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 723 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 724 // CHECK3-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 725 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 726 // CHECK3-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 727 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 728 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 729 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 730 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 731 // CHECK3-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 732 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 733 // CHECK3-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 734 // CHECK3-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 735 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 736 // CHECK3-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 737 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 738 // CHECK3-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 739 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 740 // CHECK3-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 741 // CHECK3-NEXT: br label [[DOTEXECUTE:%.*]] 742 // CHECK3: .execute: 743 // CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 744 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 745 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 746 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 747 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 748 // CHECK3-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 749 // CHECK3-NEXT: br label [[DOTOMP_DEINIT:%.*]] 750 // CHECK3: .omp.deinit: 751 // CHECK3-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 752 // CHECK3-NEXT: br label [[DOTEXIT:%.*]] 753 // CHECK3: .exit: 754 // CHECK3-NEXT: ret void 755 // 756 // 757 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__ 758 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 759 // CHECK3-NEXT: entry: 760 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 761 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 762 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 763 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 764 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 765 // CHECK3-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 766 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 767 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 768 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 769 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 770 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 771 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 772 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 773 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 774 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 775 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 776 // CHECK3-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 777 // CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 4 778 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 779 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 780 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 781 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 782 // CHECK3-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 783 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 784 // CHECK3-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 785 // CHECK3-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 786 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 787 // CHECK3-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 788 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 789 // CHECK3-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 790 // CHECK3-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 791 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4 792 // CHECK3-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 793 // CHECK3-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4 794 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i32 0 795 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 796 // CHECK3-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 797 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 798 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 799 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 800 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 801 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 802 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 803 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 804 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 805 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 806 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 807 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 808 // CHECK3: omp.precond.then: 809 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 810 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 811 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 812 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 813 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 814 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 815 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 816 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 40, i1 false) 817 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 818 // CHECK3-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 819 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 820 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 821 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 822 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 823 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 824 // CHECK3-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 825 // CHECK3: cond.true: 826 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 827 // CHECK3-NEXT: br label [[COND_END:%.*]] 828 // CHECK3: cond.false: 829 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 830 // CHECK3-NEXT: br label [[COND_END]] 831 // CHECK3: cond.end: 832 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 833 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 834 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 835 // CHECK3-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 836 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 837 // CHECK3: omp.inner.for.cond: 838 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 839 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 840 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 841 // CHECK3-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 842 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 843 // CHECK3: omp.inner.for.body: 844 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 845 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 846 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 847 // CHECK3-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP24]] to i8* 848 // CHECK3-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4 849 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 850 // CHECK3-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP25]] to i8* 851 // CHECK3-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4 852 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 853 // CHECK3-NEXT: [[TMP31:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 854 // CHECK3-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4 855 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 856 // CHECK3-NEXT: [[TMP33:%.*]] = bitcast i32* [[TMP2]] to i8* 857 // CHECK3-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 4 858 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 859 // CHECK3-NEXT: [[TMP35:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 860 // CHECK3-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 4 861 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 862 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 863 // CHECK3-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 4 864 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 865 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 866 // CHECK3-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 4 867 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP2]], align 4 868 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP40]], 0 869 // CHECK3-NEXT: [[TMP41:%.*]] = zext i1 [[TOBOOL]] to i32 870 // CHECK3-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 871 // CHECK3-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4 872 // CHECK3-NEXT: [[TMP44:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 873 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP43]], i32 [[TMP41]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP44]], i32 7) 874 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 875 // CHECK3: omp.inner.for.inc: 876 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 877 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 878 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP45]], [[TMP46]] 879 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 880 // CHECK3-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 881 // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 882 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 883 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 884 // CHECK3-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 885 // CHECK3-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 886 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 887 // CHECK3-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 888 // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 889 // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 890 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP51]], [[TMP52]] 891 // CHECK3-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 892 // CHECK3: cond.true12: 893 // CHECK3-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 894 // CHECK3-NEXT: br label [[COND_END14:%.*]] 895 // CHECK3: cond.false13: 896 // CHECK3-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 897 // CHECK3-NEXT: br label [[COND_END14]] 898 // CHECK3: cond.end14: 899 // CHECK3-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP53]], [[COND_TRUE12]] ], [ [[TMP54]], [[COND_FALSE13]] ] 900 // CHECK3-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 901 // CHECK3-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 902 // CHECK3-NEXT: store i32 [[TMP55]], i32* [[DOTOMP_IV]], align 4 903 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 904 // CHECK3: omp.inner.for.end: 905 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 906 // CHECK3: omp.loop.exit: 907 // CHECK3-NEXT: [[TMP56:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 908 // CHECK3-NEXT: [[TMP57:%.*]] = load i32, i32* [[TMP56]], align 4 909 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP57]]) 910 // CHECK3-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 911 // CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 912 // CHECK3-NEXT: br i1 [[TMP59]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 913 // CHECK3: .omp.lastprivate.then: 914 // CHECK3-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 915 // CHECK3-NEXT: [[TMP61:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 916 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP60]], i8* align 4 [[TMP61]], i32 40, i1 false) 917 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 918 // CHECK3: .omp.lastprivate.done: 919 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 920 // CHECK3: omp.precond.end: 921 // CHECK3-NEXT: [[TMP62:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 922 // CHECK3-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP62]]) 923 // CHECK3-NEXT: ret void 924 // 925 // 926 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1 927 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 928 // CHECK3-NEXT: entry: 929 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 930 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 931 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 932 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 933 // CHECK3-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 934 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 935 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 936 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 937 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 938 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 939 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 940 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 941 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 942 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 943 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 944 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 945 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 946 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 947 // CHECK3-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 948 // CHECK3-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 949 // CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 4 950 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 951 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 952 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 953 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 954 // CHECK3-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 955 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 956 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 957 // CHECK3-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 958 // CHECK3-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 959 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 960 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 961 // CHECK3-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 962 // CHECK3-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 963 // CHECK3-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 964 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 965 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 966 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 967 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 968 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 969 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 970 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 971 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 972 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 973 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 974 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 975 // CHECK3: omp.precond.then: 976 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 977 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 978 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 979 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 980 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 981 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 982 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 983 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 984 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 985 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 986 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 987 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 988 // CHECK3-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 989 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 990 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 991 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 992 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 993 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 994 // CHECK3: omp.inner.for.cond: 995 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 996 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 997 // CHECK3-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 998 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 999 // CHECK3: omp.inner.for.body: 1000 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1001 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1002 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1003 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 1004 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 1005 // CHECK3-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 1006 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 1007 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 1008 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 1009 // CHECK3-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 1010 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 1011 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 1012 // CHECK3-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 1013 // CHECK3-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 1014 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 1015 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 1016 // CHECK3-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 1017 // CHECK3-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 1018 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 1019 // CHECK3-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 1020 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1021 // CHECK3: omp.body.continue: 1022 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1023 // CHECK3: omp.inner.for.inc: 1024 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1025 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1026 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 1027 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 1028 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1029 // CHECK3: omp.inner.for.end: 1030 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1031 // CHECK3: omp.loop.exit: 1032 // CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1033 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1034 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1035 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1036 // CHECK3-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 1037 // CHECK3-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1038 // CHECK3: .omp.lastprivate.then: 1039 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1040 // CHECK3-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 1041 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 1042 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1043 // CHECK3: .omp.lastprivate.done: 1044 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1045 // CHECK3: omp.precond.end: 1046 // CHECK3-NEXT: ret void 1047 // 1048 // 1049 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 1050 // CHECK4-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 1051 // CHECK4-NEXT: entry: 1052 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1053 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1054 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1055 // CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1056 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1057 // CHECK4-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 1058 // CHECK4-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 1059 // CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1060 // CHECK4-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 1061 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1062 // CHECK4-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1063 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1064 // CHECK4-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1065 // CHECK4-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1066 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1067 // CHECK4-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1068 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1069 // CHECK4-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1070 // CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1071 // CHECK4-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 1072 // CHECK4-NEXT: br label [[DOTEXECUTE:%.*]] 1073 // CHECK4: .execute: 1074 // CHECK4-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 1075 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1076 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 1077 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 1078 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 1079 // CHECK4-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 1080 // CHECK4-NEXT: br label [[DOTOMP_DEINIT:%.*]] 1081 // CHECK4: .omp.deinit: 1082 // CHECK4-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 1083 // CHECK4-NEXT: br label [[DOTEXIT:%.*]] 1084 // CHECK4: .exit: 1085 // CHECK4-NEXT: ret void 1086 // 1087 // 1088 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__ 1089 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1090 // CHECK4-NEXT: entry: 1091 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1092 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1093 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1094 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1095 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1096 // CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1097 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1098 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1099 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1100 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1101 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1102 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1103 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1104 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1105 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1106 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1107 // CHECK4-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 1108 // CHECK4-NEXT: [[I5:%.*]] = alloca i32, align 4 1109 // CHECK4-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 1110 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1111 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1112 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1113 // CHECK4-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1114 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1115 // CHECK4-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1116 // CHECK4-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1117 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1118 // CHECK4-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1119 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1120 // CHECK4-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1121 // CHECK4-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 1122 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4 1123 // CHECK4-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 1124 // CHECK4-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4 1125 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i32 0 1126 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 1127 // CHECK4-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 1128 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1129 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 1130 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1131 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 1132 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1133 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1134 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1135 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1136 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1137 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 1138 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1139 // CHECK4: omp.precond.then: 1140 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1141 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1142 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 1143 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1144 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1145 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1146 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 1147 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 40, i1 false) 1148 // CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1149 // CHECK4-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1150 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1151 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 1152 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1153 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1154 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 1155 // CHECK4-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1156 // CHECK4: cond.true: 1157 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1158 // CHECK4-NEXT: br label [[COND_END:%.*]] 1159 // CHECK4: cond.false: 1160 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1161 // CHECK4-NEXT: br label [[COND_END]] 1162 // CHECK4: cond.end: 1163 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 1164 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1165 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1166 // CHECK4-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 1167 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1168 // CHECK4: omp.inner.for.cond: 1169 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1170 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1171 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 1172 // CHECK4-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 1173 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1174 // CHECK4: omp.inner.for.body: 1175 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1176 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1177 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 1178 // CHECK4-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP24]] to i8* 1179 // CHECK4-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4 1180 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 1181 // CHECK4-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP25]] to i8* 1182 // CHECK4-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4 1183 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 1184 // CHECK4-NEXT: [[TMP31:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 1185 // CHECK4-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4 1186 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 1187 // CHECK4-NEXT: [[TMP33:%.*]] = bitcast i32* [[TMP2]] to i8* 1188 // CHECK4-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 4 1189 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 1190 // CHECK4-NEXT: [[TMP35:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1191 // CHECK4-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 4 1192 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 1193 // CHECK4-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1194 // CHECK4-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 4 1195 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 1196 // CHECK4-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1197 // CHECK4-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 4 1198 // CHECK4-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP2]], align 4 1199 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP40]], 0 1200 // CHECK4-NEXT: [[TMP41:%.*]] = zext i1 [[TOBOOL]] to i32 1201 // CHECK4-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1202 // CHECK4-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4 1203 // CHECK4-NEXT: [[TMP44:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 1204 // CHECK4-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP43]], i32 [[TMP41]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP44]], i32 7) 1205 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1206 // CHECK4: omp.inner.for.inc: 1207 // CHECK4-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1208 // CHECK4-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1209 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP45]], [[TMP46]] 1210 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1211 // CHECK4-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1212 // CHECK4-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1213 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 1214 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 1215 // CHECK4-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1216 // CHECK4-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1217 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 1218 // CHECK4-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 1219 // CHECK4-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1220 // CHECK4-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1221 // CHECK4-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP51]], [[TMP52]] 1222 // CHECK4-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 1223 // CHECK4: cond.true12: 1224 // CHECK4-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1225 // CHECK4-NEXT: br label [[COND_END14:%.*]] 1226 // CHECK4: cond.false13: 1227 // CHECK4-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1228 // CHECK4-NEXT: br label [[COND_END14]] 1229 // CHECK4: cond.end14: 1230 // CHECK4-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP53]], [[COND_TRUE12]] ], [ [[TMP54]], [[COND_FALSE13]] ] 1231 // CHECK4-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 1232 // CHECK4-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1233 // CHECK4-NEXT: store i32 [[TMP55]], i32* [[DOTOMP_IV]], align 4 1234 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1235 // CHECK4: omp.inner.for.end: 1236 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1237 // CHECK4: omp.loop.exit: 1238 // CHECK4-NEXT: [[TMP56:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1239 // CHECK4-NEXT: [[TMP57:%.*]] = load i32, i32* [[TMP56]], align 4 1240 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP57]]) 1241 // CHECK4-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1242 // CHECK4-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 1243 // CHECK4-NEXT: br i1 [[TMP59]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1244 // CHECK4: .omp.lastprivate.then: 1245 // CHECK4-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 1246 // CHECK4-NEXT: [[TMP61:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1247 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP60]], i8* align 4 [[TMP61]], i32 40, i1 false) 1248 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1249 // CHECK4: .omp.lastprivate.done: 1250 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1251 // CHECK4: omp.precond.end: 1252 // CHECK4-NEXT: [[TMP62:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 1253 // CHECK4-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP62]]) 1254 // CHECK4-NEXT: ret void 1255 // 1256 // 1257 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__1 1258 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1259 // CHECK4-NEXT: entry: 1260 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1261 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1262 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1263 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1264 // CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 1265 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1266 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1267 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1268 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1269 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1270 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1271 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1272 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1273 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1274 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1275 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1276 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1277 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1278 // CHECK4-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 1279 // CHECK4-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 1280 // CHECK4-NEXT: [[I5:%.*]] = alloca i32, align 4 1281 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1282 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1283 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1284 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1285 // CHECK4-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 1286 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1287 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1288 // CHECK4-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1289 // CHECK4-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1290 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 1291 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1292 // CHECK4-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1293 // CHECK4-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1294 // CHECK4-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1295 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1296 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1297 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1298 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 1299 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1300 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1301 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1302 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 1303 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1304 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1305 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1306 // CHECK4: omp.precond.then: 1307 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1308 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1309 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 1310 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1311 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1312 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 1313 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 1314 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1315 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1316 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 1317 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 1318 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 1319 // CHECK4-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1320 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1321 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1322 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1323 // CHECK4-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1324 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1325 // CHECK4: omp.inner.for.cond: 1326 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1327 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1328 // CHECK4-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 1329 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1330 // CHECK4: omp.inner.for.body: 1331 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1332 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1333 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1334 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 1335 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 1336 // CHECK4-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 1337 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 1338 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 1339 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 1340 // CHECK4-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 1341 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 1342 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 1343 // CHECK4-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 1344 // CHECK4-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 1345 // CHECK4-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 1346 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 1347 // CHECK4-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 1348 // CHECK4-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 1349 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 1350 // CHECK4-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 1351 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1352 // CHECK4: omp.body.continue: 1353 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1354 // CHECK4: omp.inner.for.inc: 1355 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1356 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1357 // CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 1358 // CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 1359 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1360 // CHECK4: omp.inner.for.end: 1361 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1362 // CHECK4: omp.loop.exit: 1363 // CHECK4-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1364 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1365 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1366 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1367 // CHECK4-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 1368 // CHECK4-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1369 // CHECK4: .omp.lastprivate.then: 1370 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1371 // CHECK4-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 1372 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 1373 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1374 // CHECK4: .omp.lastprivate.done: 1375 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1376 // CHECK4: omp.precond.end: 1377 // CHECK4-NEXT: ret void 1378 // 1379 // 1380 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 1381 // CHECK5-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 1382 // CHECK5-NEXT: entry: 1383 // CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1384 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1385 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1386 // CHECK5-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1387 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1388 // CHECK5-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 1389 // CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 1390 // CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1391 // CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 1392 // CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1393 // CHECK5-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1394 // CHECK5-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1395 // CHECK5-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1396 // CHECK5-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1397 // CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1398 // CHECK5-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1399 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1400 // CHECK5-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1401 // CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1402 // CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 1403 // CHECK5-NEXT: br label [[DOTEXECUTE:%.*]] 1404 // CHECK5: .execute: 1405 // CHECK5-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 1406 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1407 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 1408 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 1409 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 1410 // CHECK5-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 1411 // CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]] 1412 // CHECK5: .omp.deinit: 1413 // CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 1414 // CHECK5-NEXT: br label [[DOTEXIT:%.*]] 1415 // CHECK5: .exit: 1416 // CHECK5-NEXT: ret void 1417 // 1418 // 1419 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__ 1420 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1421 // CHECK5-NEXT: entry: 1422 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1423 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1424 // CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1425 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1426 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1427 // CHECK5-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1428 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1429 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1430 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1431 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1432 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1433 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1434 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1435 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1436 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1437 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1438 // CHECK5-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 1439 // CHECK5-NEXT: [[I5:%.*]] = alloca i32, align 4 1440 // CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 1441 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1442 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1443 // CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1444 // CHECK5-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1445 // CHECK5-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1446 // CHECK5-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1447 // CHECK5-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1448 // CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1449 // CHECK5-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1450 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1451 // CHECK5-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1452 // CHECK5-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 40, i16 1) 1453 // CHECK5-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty* 1454 // CHECK5-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0 1455 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1456 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4 1457 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1458 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1459 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1460 // CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1461 // CHECK5-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1462 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 1463 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1464 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 1465 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1466 // CHECK5: omp.precond.then: 1467 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1468 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1469 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 1470 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1471 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1472 // CHECK5-NEXT: [[TMP10:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1473 // CHECK5-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 1474 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 40, i1 false) 1475 // CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1476 // CHECK5-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1477 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1478 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 1479 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1480 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1481 // CHECK5-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 1482 // CHECK5-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1483 // CHECK5: cond.true: 1484 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1485 // CHECK5-NEXT: br label [[COND_END:%.*]] 1486 // CHECK5: cond.false: 1487 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1488 // CHECK5-NEXT: br label [[COND_END]] 1489 // CHECK5: cond.end: 1490 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1491 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1492 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1493 // CHECK5-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 1494 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1495 // CHECK5: omp.inner.for.cond: 1496 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1497 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1498 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], 1 1499 // CHECK5-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP19]], [[ADD]] 1500 // CHECK5-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1501 // CHECK5: omp.inner.for.body: 1502 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1503 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1504 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 1505 // CHECK5-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP21]] to i8* 1506 // CHECK5-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4 1507 // CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 1508 // CHECK5-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP22]] to i8* 1509 // CHECK5-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4 1510 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 1511 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 1512 // CHECK5-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4 1513 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 1514 // CHECK5-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP2]] to i8* 1515 // CHECK5-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4 1516 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 1517 // CHECK5-NEXT: [[TMP32:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1518 // CHECK5-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4 1519 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 1520 // CHECK5-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1521 // CHECK5-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4 1522 // CHECK5-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 1523 // CHECK5-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1524 // CHECK5-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 4 1525 // CHECK5-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP2]], align 4 1526 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0 1527 // CHECK5-NEXT: [[TMP38:%.*]] = zext i1 [[TOBOOL]] to i32 1528 // CHECK5-NEXT: [[TMP39:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1529 // CHECK5-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 1530 // CHECK5-NEXT: [[TMP41:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 1531 // CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP40]], i32 [[TMP38]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP41]], i32 7) 1532 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1533 // CHECK5: omp.inner.for.inc: 1534 // CHECK5-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1535 // CHECK5-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1536 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP42]], [[TMP43]] 1537 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1538 // CHECK5-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1539 // CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1540 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 1541 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 1542 // CHECK5-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1543 // CHECK5-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1544 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 1545 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 1546 // CHECK5-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1547 // CHECK5-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1548 // CHECK5-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP48]], [[TMP49]] 1549 // CHECK5-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 1550 // CHECK5: cond.true12: 1551 // CHECK5-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1552 // CHECK5-NEXT: br label [[COND_END14:%.*]] 1553 // CHECK5: cond.false13: 1554 // CHECK5-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1555 // CHECK5-NEXT: br label [[COND_END14]] 1556 // CHECK5: cond.end14: 1557 // CHECK5-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP50]], [[COND_TRUE12]] ], [ [[TMP51]], [[COND_FALSE13]] ] 1558 // CHECK5-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 1559 // CHECK5-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1560 // CHECK5-NEXT: store i32 [[TMP52]], i32* [[DOTOMP_IV]], align 4 1561 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1562 // CHECK5: omp.inner.for.end: 1563 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1564 // CHECK5: omp.loop.exit: 1565 // CHECK5-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1566 // CHECK5-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4 1567 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP54]]) 1568 // CHECK5-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1569 // CHECK5-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 1570 // CHECK5-NEXT: br i1 [[TMP56]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1571 // CHECK5: .omp.lastprivate.then: 1572 // CHECK5-NEXT: [[TMP57:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 1573 // CHECK5-NEXT: [[TMP58:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1574 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP57]], i8* align 4 [[TMP58]], i32 40, i1 false) 1575 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1576 // CHECK5: .omp.lastprivate.done: 1577 // CHECK5-NEXT: br label [[OMP_PRECOND_END]] 1578 // CHECK5: omp.precond.end: 1579 // CHECK5-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP4]]) 1580 // CHECK5-NEXT: ret void 1581 // 1582 // 1583 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__1 1584 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1585 // CHECK5-NEXT: entry: 1586 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1587 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1588 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1589 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1590 // CHECK5-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 1591 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1592 // CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1593 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1594 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1595 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1596 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1597 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1598 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1599 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1600 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1601 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1602 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1603 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1604 // CHECK5-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 1605 // CHECK5-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 1606 // CHECK5-NEXT: [[I5:%.*]] = alloca i32, align 4 1607 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1608 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1609 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1610 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1611 // CHECK5-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 1612 // CHECK5-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1613 // CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1614 // CHECK5-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1615 // CHECK5-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1616 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 1617 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1618 // CHECK5-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1619 // CHECK5-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1620 // CHECK5-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1621 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1622 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1623 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1624 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 1625 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1626 // CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1627 // CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1628 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 1629 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1630 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1631 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1632 // CHECK5: omp.precond.then: 1633 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1634 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1635 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 1636 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1637 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1638 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 1639 // CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 1640 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1641 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1642 // CHECK5-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 1643 // CHECK5-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 1644 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 1645 // CHECK5-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1646 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1647 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1648 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1649 // CHECK5-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1650 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1651 // CHECK5: omp.inner.for.cond: 1652 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1653 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1654 // CHECK5-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 1655 // CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1656 // CHECK5: omp.inner.for.body: 1657 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1658 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1659 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1660 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 1661 // CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 1662 // CHECK5-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 1663 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 1664 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 1665 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 1666 // CHECK5-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 1667 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 1668 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 1669 // CHECK5-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 1670 // CHECK5-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 1671 // CHECK5-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 1672 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 1673 // CHECK5-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 1674 // CHECK5-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 1675 // CHECK5-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 1676 // CHECK5-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 1677 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1678 // CHECK5: omp.body.continue: 1679 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1680 // CHECK5: omp.inner.for.inc: 1681 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1682 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1683 // CHECK5-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 1684 // CHECK5-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 1685 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1686 // CHECK5: omp.inner.for.end: 1687 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1688 // CHECK5: omp.loop.exit: 1689 // CHECK5-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1690 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1691 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 1692 // CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1693 // CHECK5-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 1694 // CHECK5-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1695 // CHECK5: .omp.lastprivate.then: 1696 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1697 // CHECK5-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 1698 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 1699 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1700 // CHECK5: .omp.lastprivate.done: 1701 // CHECK5-NEXT: br label [[OMP_PRECOND_END]] 1702 // CHECK5: omp.precond.end: 1703 // CHECK5-NEXT: ret void 1704 // 1705 // 1706 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 1707 // CHECK6-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 1708 // CHECK6-NEXT: entry: 1709 // CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1710 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1711 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1712 // CHECK6-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1713 // CHECK6-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1714 // CHECK6-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 1715 // CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 1716 // CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1717 // CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 1718 // CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1719 // CHECK6-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1720 // CHECK6-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1721 // CHECK6-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1722 // CHECK6-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1723 // CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1724 // CHECK6-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1725 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1726 // CHECK6-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1727 // CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1728 // CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 1729 // CHECK6-NEXT: br label [[DOTEXECUTE:%.*]] 1730 // CHECK6: .execute: 1731 // CHECK6-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 1732 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1733 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 1734 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 1735 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 1736 // CHECK6-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 1737 // CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]] 1738 // CHECK6: .omp.deinit: 1739 // CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 1740 // CHECK6-NEXT: br label [[DOTEXIT:%.*]] 1741 // CHECK6: .exit: 1742 // CHECK6-NEXT: ret void 1743 // 1744 // 1745 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__ 1746 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1747 // CHECK6-NEXT: entry: 1748 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1749 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1750 // CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1751 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1752 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1753 // CHECK6-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1754 // CHECK6-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1755 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1756 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 1757 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1758 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1759 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 1760 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1761 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1762 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1763 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1764 // CHECK6-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 1765 // CHECK6-NEXT: [[I5:%.*]] = alloca i32, align 4 1766 // CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 1767 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1768 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1769 // CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1770 // CHECK6-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1771 // CHECK6-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1772 // CHECK6-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1773 // CHECK6-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1774 // CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1775 // CHECK6-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1776 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1777 // CHECK6-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1778 // CHECK6-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 40, i16 1) 1779 // CHECK6-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty* 1780 // CHECK6-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0 1781 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1782 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4 1783 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1784 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1785 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1786 // CHECK6-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1787 // CHECK6-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1788 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 1789 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1790 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 1791 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1792 // CHECK6: omp.precond.then: 1793 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1794 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1795 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 1796 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1797 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1798 // CHECK6-NEXT: [[TMP10:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1799 // CHECK6-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 1800 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 40, i1 false) 1801 // CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 1802 // CHECK6-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1803 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1804 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 1805 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1806 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1807 // CHECK6-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 1808 // CHECK6-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1809 // CHECK6: cond.true: 1810 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1811 // CHECK6-NEXT: br label [[COND_END:%.*]] 1812 // CHECK6: cond.false: 1813 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1814 // CHECK6-NEXT: br label [[COND_END]] 1815 // CHECK6: cond.end: 1816 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1817 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1818 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1819 // CHECK6-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 1820 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1821 // CHECK6: omp.inner.for.cond: 1822 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1823 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1824 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], 1 1825 // CHECK6-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP19]], [[ADD]] 1826 // CHECK6-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1827 // CHECK6: omp.inner.for.body: 1828 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1829 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1830 // CHECK6-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 1831 // CHECK6-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP21]] to i8* 1832 // CHECK6-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4 1833 // CHECK6-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 1834 // CHECK6-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP22]] to i8* 1835 // CHECK6-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4 1836 // CHECK6-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 1837 // CHECK6-NEXT: [[TMP28:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 1838 // CHECK6-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4 1839 // CHECK6-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 1840 // CHECK6-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP2]] to i8* 1841 // CHECK6-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4 1842 // CHECK6-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 1843 // CHECK6-NEXT: [[TMP32:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 1844 // CHECK6-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4 1845 // CHECK6-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 1846 // CHECK6-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1847 // CHECK6-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4 1848 // CHECK6-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 1849 // CHECK6-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 1850 // CHECK6-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 4 1851 // CHECK6-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP2]], align 4 1852 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0 1853 // CHECK6-NEXT: [[TMP38:%.*]] = zext i1 [[TOBOOL]] to i32 1854 // CHECK6-NEXT: [[TMP39:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1855 // CHECK6-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 1856 // CHECK6-NEXT: [[TMP41:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 1857 // CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP40]], i32 [[TMP38]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP41]], i32 7) 1858 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1859 // CHECK6: omp.inner.for.inc: 1860 // CHECK6-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1861 // CHECK6-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1862 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP42]], [[TMP43]] 1863 // CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1864 // CHECK6-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1865 // CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1866 // CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 1867 // CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 1868 // CHECK6-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1869 // CHECK6-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1870 // CHECK6-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 1871 // CHECK6-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 1872 // CHECK6-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1873 // CHECK6-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1874 // CHECK6-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP48]], [[TMP49]] 1875 // CHECK6-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 1876 // CHECK6: cond.true12: 1877 // CHECK6-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1878 // CHECK6-NEXT: br label [[COND_END14:%.*]] 1879 // CHECK6: cond.false13: 1880 // CHECK6-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1881 // CHECK6-NEXT: br label [[COND_END14]] 1882 // CHECK6: cond.end14: 1883 // CHECK6-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP50]], [[COND_TRUE12]] ], [ [[TMP51]], [[COND_FALSE13]] ] 1884 // CHECK6-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 1885 // CHECK6-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1886 // CHECK6-NEXT: store i32 [[TMP52]], i32* [[DOTOMP_IV]], align 4 1887 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 1888 // CHECK6: omp.inner.for.end: 1889 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1890 // CHECK6: omp.loop.exit: 1891 // CHECK6-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1892 // CHECK6-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4 1893 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP54]]) 1894 // CHECK6-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1895 // CHECK6-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 1896 // CHECK6-NEXT: br i1 [[TMP56]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1897 // CHECK6: .omp.lastprivate.then: 1898 // CHECK6-NEXT: [[TMP57:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 1899 // CHECK6-NEXT: [[TMP58:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 1900 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP57]], i8* align 4 [[TMP58]], i32 40, i1 false) 1901 // CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1902 // CHECK6: .omp.lastprivate.done: 1903 // CHECK6-NEXT: br label [[OMP_PRECOND_END]] 1904 // CHECK6: omp.precond.end: 1905 // CHECK6-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP4]]) 1906 // CHECK6-NEXT: ret void 1907 // 1908 // 1909 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__1 1910 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 1911 // CHECK6-NEXT: entry: 1912 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1913 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1914 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1915 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1916 // CHECK6-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 1917 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1918 // CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 1919 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 1920 // CHECK6-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 1921 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1922 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 1923 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1924 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1925 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 1926 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1927 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1928 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1929 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1930 // CHECK6-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 1931 // CHECK6-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 1932 // CHECK6-NEXT: [[I5:%.*]] = alloca i32, align 4 1933 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1934 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1935 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1936 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1937 // CHECK6-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 1938 // CHECK6-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1939 // CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 1940 // CHECK6-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 1941 // CHECK6-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 1942 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 1943 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1944 // CHECK6-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 1945 // CHECK6-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 1946 // CHECK6-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 1947 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1948 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1949 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1950 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 1951 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1952 // CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1953 // CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1954 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 1955 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1956 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1957 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1958 // CHECK6: omp.precond.then: 1959 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1960 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1961 // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 1962 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1963 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1964 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 1965 // CHECK6-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 1966 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1967 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1968 // CHECK6-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 1969 // CHECK6-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 1970 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 1971 // CHECK6-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1972 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1973 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1974 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1975 // CHECK6-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1976 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1977 // CHECK6: omp.inner.for.cond: 1978 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1979 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1980 // CHECK6-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 1981 // CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1982 // CHECK6: omp.inner.for.body: 1983 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1984 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1985 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1986 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 1987 // CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 1988 // CHECK6-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 1989 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 1990 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 1991 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 1992 // CHECK6-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 1993 // CHECK6-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 1994 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 1995 // CHECK6-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 1996 // CHECK6-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 1997 // CHECK6-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 1998 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 1999 // CHECK6-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 2000 // CHECK6-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 2001 // CHECK6-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 2002 // CHECK6-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 2003 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2004 // CHECK6: omp.body.continue: 2005 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2006 // CHECK6: omp.inner.for.inc: 2007 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2008 // CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2009 // CHECK6-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2010 // CHECK6-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 2011 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 2012 // CHECK6: omp.inner.for.end: 2013 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2014 // CHECK6: omp.loop.exit: 2015 // CHECK6-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2016 // CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2017 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 2018 // CHECK6-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2019 // CHECK6-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 2020 // CHECK6-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2021 // CHECK6: .omp.lastprivate.then: 2022 // CHECK6-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2023 // CHECK6-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 2024 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 2025 // CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2026 // CHECK6: .omp.lastprivate.done: 2027 // CHECK6-NEXT: br label [[OMP_PRECOND_END]] 2028 // CHECK6: omp.precond.end: 2029 // CHECK6-NEXT: ret void 2030 // 2031 // 2032 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 2033 // CHECK7-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 2034 // CHECK7-NEXT: entry: 2035 // CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 2036 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 2037 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2038 // CHECK7-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 2039 // CHECK7-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 2040 // CHECK7-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 2041 // CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2042 // CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 2043 // CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 2044 // CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 2045 // CHECK7-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 2046 // CHECK7-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2047 // CHECK7-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 2048 // CHECK7-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 2049 // CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 2050 // CHECK7-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 2051 // CHECK7-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2052 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 2053 // CHECK7-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 2054 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2055 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 2056 // CHECK7-NEXT: br label [[DOTEXECUTE:%.*]] 2057 // CHECK7: .execute: 2058 // CHECK7-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 2059 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV]], align 8 2060 // CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32* 2061 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 2062 // CHECK7-NEXT: [[TMP6:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8 2063 // CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 2064 // CHECK7-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i64 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 2065 // CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]] 2066 // CHECK7: .omp.deinit: 2067 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 2068 // CHECK7-NEXT: br label [[DOTEXIT:%.*]] 2069 // CHECK7: .exit: 2070 // CHECK7-NEXT: ret void 2071 // 2072 // 2073 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__ 2074 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2075 // CHECK7-NEXT: entry: 2076 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2077 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2078 // CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 2079 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 2080 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2081 // CHECK7-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 2082 // CHECK7-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 2083 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2084 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 2085 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2086 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2087 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 2088 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2089 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2090 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2091 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2092 // CHECK7-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 2093 // CHECK7-NEXT: [[I5:%.*]] = alloca i32, align 4 2094 // CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 8 2095 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2096 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2097 // CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 2098 // CHECK7-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 2099 // CHECK7-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2100 // CHECK7-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 2101 // CHECK7-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 2102 // CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 2103 // CHECK7-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 2104 // CHECK7-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2105 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 2106 // CHECK7-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 2107 // CHECK7-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 2108 // CHECK7-NEXT: [[TMP5:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8 2109 // CHECK7-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 2110 // CHECK7-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 2111 // CHECK7-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i64 0 2112 // CHECK7-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 2113 // CHECK7-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 2114 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 2115 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 2116 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2117 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 2118 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2119 // CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2120 // CHECK7-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2121 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 2122 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2123 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 2124 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2125 // CHECK7: omp.precond.then: 2126 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2127 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2128 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 2129 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2130 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2131 // CHECK7-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2132 // CHECK7-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 2133 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 40, i1 false) 2134 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2135 // CHECK7-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2136 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2137 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 2138 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2139 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2140 // CHECK7-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 2141 // CHECK7-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2142 // CHECK7: cond.true: 2143 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2144 // CHECK7-NEXT: br label [[COND_END:%.*]] 2145 // CHECK7: cond.false: 2146 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2147 // CHECK7-NEXT: br label [[COND_END]] 2148 // CHECK7: cond.end: 2149 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 2150 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2151 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2152 // CHECK7-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 2153 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2154 // CHECK7: omp.inner.for.cond: 2155 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2156 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2157 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 2158 // CHECK7-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 2159 // CHECK7-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2160 // CHECK7: omp.inner.for.body: 2161 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2162 // CHECK7-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 2163 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2164 // CHECK7-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64 2165 // CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 2166 // CHECK7-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP25]] to i8* 2167 // CHECK7-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8 2168 // CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 2169 // CHECK7-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP27]] to i8* 2170 // CHECK7-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8 2171 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 2172 // CHECK7-NEXT: [[TMP33:%.*]] = bitcast i32* [[CONV]] to i8* 2173 // CHECK7-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 8 2174 // CHECK7-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 2175 // CHECK7-NEXT: [[TMP35:%.*]] = bitcast i32* [[TMP2]] to i8* 2176 // CHECK7-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 8 2177 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4 2178 // CHECK7-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2179 // CHECK7-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 8 2180 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 5 2181 // CHECK7-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2182 // CHECK7-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 8 2183 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 6 2184 // CHECK7-NEXT: [[TMP41:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2185 // CHECK7-NEXT: store i8* [[TMP41]], i8** [[TMP40]], align 8 2186 // CHECK7-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP2]], align 4 2187 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP42]], 0 2188 // CHECK7-NEXT: [[TMP43:%.*]] = zext i1 [[TOBOOL]] to i32 2189 // CHECK7-NEXT: [[TMP44:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2190 // CHECK7-NEXT: [[TMP45:%.*]] = load i32, i32* [[TMP44]], align 4 2191 // CHECK7-NEXT: [[TMP46:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 2192 // CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP45]], i32 [[TMP43]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP46]], i64 7) 2193 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2194 // CHECK7: omp.inner.for.inc: 2195 // CHECK7-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2196 // CHECK7-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2197 // CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 2198 // CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2199 // CHECK7-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2200 // CHECK7-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2201 // CHECK7-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 2202 // CHECK7-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 2203 // CHECK7-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2204 // CHECK7-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2205 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP51]], [[TMP52]] 2206 // CHECK7-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 2207 // CHECK7-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2208 // CHECK7-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2209 // CHECK7-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP53]], [[TMP54]] 2210 // CHECK7-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 2211 // CHECK7: cond.true12: 2212 // CHECK7-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2213 // CHECK7-NEXT: br label [[COND_END14:%.*]] 2214 // CHECK7: cond.false13: 2215 // CHECK7-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2216 // CHECK7-NEXT: br label [[COND_END14]] 2217 // CHECK7: cond.end14: 2218 // CHECK7-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP55]], [[COND_TRUE12]] ], [ [[TMP56]], [[COND_FALSE13]] ] 2219 // CHECK7-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 2220 // CHECK7-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2221 // CHECK7-NEXT: store i32 [[TMP57]], i32* [[DOTOMP_IV]], align 4 2222 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 2223 // CHECK7: omp.inner.for.end: 2224 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2225 // CHECK7: omp.loop.exit: 2226 // CHECK7-NEXT: [[TMP58:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2227 // CHECK7-NEXT: [[TMP59:%.*]] = load i32, i32* [[TMP58]], align 4 2228 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP59]]) 2229 // CHECK7-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2230 // CHECK7-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 2231 // CHECK7-NEXT: br i1 [[TMP61]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2232 // CHECK7: .omp.lastprivate.then: 2233 // CHECK7-NEXT: [[TMP62:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 2234 // CHECK7-NEXT: [[TMP63:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2235 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP62]], i8* align 4 [[TMP63]], i64 40, i1 false) 2236 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2237 // CHECK7: .omp.lastprivate.done: 2238 // CHECK7-NEXT: br label [[OMP_PRECOND_END]] 2239 // CHECK7: omp.precond.end: 2240 // CHECK7-NEXT: [[TMP64:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 2241 // CHECK7-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP64]]) 2242 // CHECK7-NEXT: ret void 2243 // 2244 // 2245 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__1 2246 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2247 // CHECK7-NEXT: entry: 2248 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2249 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2250 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2251 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2252 // CHECK7-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 2253 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2254 // CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 2255 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 2256 // CHECK7-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 2257 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2258 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 2259 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2260 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2261 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 2262 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2263 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2264 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2265 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2266 // CHECK7-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 2267 // CHECK7-NEXT: [[C5:%.*]] = alloca [10 x i32], align 4 2268 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4 2269 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2270 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2271 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2272 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2273 // CHECK7-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 2274 // CHECK7-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2275 // CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 2276 // CHECK7-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 2277 // CHECK7-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 2278 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 2279 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2280 // CHECK7-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 2281 // CHECK7-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 2282 // CHECK7-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 2283 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2284 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2285 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2286 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 2287 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2288 // CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2289 // CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2290 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 2291 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2292 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 2293 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2294 // CHECK7: omp.precond.then: 2295 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2296 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2297 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 2298 // CHECK7-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2299 // CHECK7-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 2300 // CHECK7-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2301 // CHECK7-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP10]] to i32 2302 // CHECK7-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2303 // CHECK7-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 2304 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2305 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2306 // CHECK7-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2307 // CHECK7-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 2308 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 40, i1 false) 2309 // CHECK7-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2310 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2311 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2312 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2313 // CHECK7-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 2314 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2315 // CHECK7: omp.inner.for.cond: 2316 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2317 // CHECK7-NEXT: [[CONV7:%.*]] = sext i32 [[TMP16]] to i64 2318 // CHECK7-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2319 // CHECK7-NEXT: [[CMP8:%.*]] = icmp ule i64 [[CONV7]], [[TMP17]] 2320 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2321 // CHECK7: omp.inner.for.body: 2322 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2323 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2324 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2325 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 2326 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I6]]) #[[ATTR5:[0-9]+]] 2327 // CHECK7-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 2328 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[CALL]], [[CALL9]] 2329 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 2330 // CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2331 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B4]], i64 0, i64 [[IDXPROM]] 2332 // CHECK7-NEXT: [[CALL11:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 2333 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD10]], [[CALL11]] 2334 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4 2335 // CHECK7-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP20]] to i64 2336 // CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C5]], i64 0, i64 [[IDXPROM13]] 2337 // CHECK7-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 2338 // CHECK7-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD12]], [[CALL15]] 2339 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4 2340 // CHECK7-NEXT: [[IDXPROM17:%.*]] = sext i32 [[TMP21]] to i64 2341 // CHECK7-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i64 0, i64 [[IDXPROM17]] 2342 // CHECK7-NEXT: [[CALL19:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX18]]) #[[ATTR5]] 2343 // CHECK7-NEXT: [[ADD20:%.*]] = add nsw i32 [[ADD16]], [[CALL19]] 2344 // CHECK7-NEXT: store i32 [[ADD20]], i32* [[TMP1]], align 4 2345 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2346 // CHECK7: omp.body.continue: 2347 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2348 // CHECK7: omp.inner.for.inc: 2349 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2350 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2351 // CHECK7-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2352 // CHECK7-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 2353 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 2354 // CHECK7: omp.inner.for.end: 2355 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2356 // CHECK7: omp.loop.exit: 2357 // CHECK7-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2358 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2359 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 2360 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2361 // CHECK7-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 2362 // CHECK7-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2363 // CHECK7: .omp.lastprivate.then: 2364 // CHECK7-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2365 // CHECK7-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C5]] to i8* 2366 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 40, i1 false) 2367 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2368 // CHECK7: .omp.lastprivate.done: 2369 // CHECK7-NEXT: br label [[OMP_PRECOND_END]] 2370 // CHECK7: omp.precond.end: 2371 // CHECK7-NEXT: ret void 2372 // 2373 // 2374 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 2375 // CHECK8-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 2376 // CHECK8-NEXT: entry: 2377 // CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 2378 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 2379 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2380 // CHECK8-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 2381 // CHECK8-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 2382 // CHECK8-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 2383 // CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2384 // CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 2385 // CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 2386 // CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 2387 // CHECK8-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 2388 // CHECK8-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2389 // CHECK8-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 2390 // CHECK8-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 2391 // CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 2392 // CHECK8-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 2393 // CHECK8-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2394 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 2395 // CHECK8-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 2396 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2397 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 2398 // CHECK8-NEXT: br label [[DOTEXECUTE:%.*]] 2399 // CHECK8: .execute: 2400 // CHECK8-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 2401 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV]], align 8 2402 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32* 2403 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 2404 // CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8 2405 // CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 2406 // CHECK8-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i64 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 2407 // CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]] 2408 // CHECK8: .omp.deinit: 2409 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 2410 // CHECK8-NEXT: br label [[DOTEXIT:%.*]] 2411 // CHECK8: .exit: 2412 // CHECK8-NEXT: ret void 2413 // 2414 // 2415 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__ 2416 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2417 // CHECK8-NEXT: entry: 2418 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2419 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2420 // CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 2421 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 2422 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2423 // CHECK8-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 2424 // CHECK8-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 2425 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2426 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 2427 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2428 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2429 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 2430 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2431 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2432 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2433 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2434 // CHECK8-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 2435 // CHECK8-NEXT: [[I5:%.*]] = alloca i32, align 4 2436 // CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 8 2437 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2438 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2439 // CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 2440 // CHECK8-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 2441 // CHECK8-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2442 // CHECK8-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8 2443 // CHECK8-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 2444 // CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 2445 // CHECK8-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 2446 // CHECK8-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2447 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32* 2448 // CHECK8-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 2449 // CHECK8-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i64 40, i16 1) 2450 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty* 2451 // CHECK8-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0 2452 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8 2453 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4 2454 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2455 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2456 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2457 // CHECK8-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2458 // CHECK8-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2459 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 2460 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2461 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 2462 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2463 // CHECK8: omp.precond.then: 2464 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2465 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2466 // CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 2467 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2468 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2469 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2470 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 2471 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 40, i1 false) 2472 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2473 // CHECK8-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2474 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2475 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 2476 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2477 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2478 // CHECK8-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 2479 // CHECK8-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2480 // CHECK8: cond.true: 2481 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2482 // CHECK8-NEXT: br label [[COND_END:%.*]] 2483 // CHECK8: cond.false: 2484 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2485 // CHECK8-NEXT: br label [[COND_END]] 2486 // CHECK8: cond.end: 2487 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 2488 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2489 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2490 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 2491 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2492 // CHECK8: omp.inner.for.cond: 2493 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2494 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2495 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], 1 2496 // CHECK8-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP19]], [[ADD]] 2497 // CHECK8-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2498 // CHECK8: omp.inner.for.body: 2499 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2500 // CHECK8-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 2501 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2502 // CHECK8-NEXT: [[TMP24:%.*]] = zext i32 [[TMP23]] to i64 2503 // CHECK8-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 2504 // CHECK8-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP22]] to i8* 2505 // CHECK8-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8 2506 // CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 2507 // CHECK8-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP24]] to i8* 2508 // CHECK8-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8 2509 // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 2510 // CHECK8-NEXT: [[TMP30:%.*]] = bitcast i32* [[CONV]] to i8* 2511 // CHECK8-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8 2512 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 2513 // CHECK8-NEXT: [[TMP32:%.*]] = bitcast i32* [[TMP2]] to i8* 2514 // CHECK8-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 8 2515 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4 2516 // CHECK8-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2517 // CHECK8-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 8 2518 // CHECK8-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 5 2519 // CHECK8-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2520 // CHECK8-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 8 2521 // CHECK8-NEXT: [[TMP37:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 6 2522 // CHECK8-NEXT: [[TMP38:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2523 // CHECK8-NEXT: store i8* [[TMP38]], i8** [[TMP37]], align 8 2524 // CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[TMP2]], align 4 2525 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP39]], 0 2526 // CHECK8-NEXT: [[TMP40:%.*]] = zext i1 [[TOBOOL]] to i32 2527 // CHECK8-NEXT: [[TMP41:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2528 // CHECK8-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP41]], align 4 2529 // CHECK8-NEXT: [[TMP43:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 2530 // CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP42]], i32 [[TMP40]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP43]], i64 7) 2531 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2532 // CHECK8: omp.inner.for.inc: 2533 // CHECK8-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2534 // CHECK8-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2535 // CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 2536 // CHECK8-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2537 // CHECK8-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2538 // CHECK8-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2539 // CHECK8-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 2540 // CHECK8-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 2541 // CHECK8-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2542 // CHECK8-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2543 // CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP48]], [[TMP49]] 2544 // CHECK8-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 2545 // CHECK8-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2546 // CHECK8-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2547 // CHECK8-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP50]], [[TMP51]] 2548 // CHECK8-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 2549 // CHECK8: cond.true12: 2550 // CHECK8-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2551 // CHECK8-NEXT: br label [[COND_END14:%.*]] 2552 // CHECK8: cond.false13: 2553 // CHECK8-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2554 // CHECK8-NEXT: br label [[COND_END14]] 2555 // CHECK8: cond.end14: 2556 // CHECK8-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP52]], [[COND_TRUE12]] ], [ [[TMP53]], [[COND_FALSE13]] ] 2557 // CHECK8-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 2558 // CHECK8-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2559 // CHECK8-NEXT: store i32 [[TMP54]], i32* [[DOTOMP_IV]], align 4 2560 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 2561 // CHECK8: omp.inner.for.end: 2562 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2563 // CHECK8: omp.loop.exit: 2564 // CHECK8-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2565 // CHECK8-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4 2566 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP56]]) 2567 // CHECK8-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2568 // CHECK8-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 2569 // CHECK8-NEXT: br i1 [[TMP58]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2570 // CHECK8: .omp.lastprivate.then: 2571 // CHECK8-NEXT: [[TMP59:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 2572 // CHECK8-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2573 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP59]], i8* align 4 [[TMP60]], i64 40, i1 false) 2574 // CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2575 // CHECK8: .omp.lastprivate.done: 2576 // CHECK8-NEXT: br label [[OMP_PRECOND_END]] 2577 // CHECK8: omp.precond.end: 2578 // CHECK8-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP4]]) 2579 // CHECK8-NEXT: ret void 2580 // 2581 // 2582 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__1 2583 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2584 // CHECK8-NEXT: entry: 2585 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2586 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2587 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2588 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2589 // CHECK8-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 2590 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2591 // CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8 2592 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 8 2593 // CHECK8-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 8 2594 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2595 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 2596 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2597 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2598 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 2599 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2600 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2601 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2602 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2603 // CHECK8-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 2604 // CHECK8-NEXT: [[C5:%.*]] = alloca [10 x i32], align 4 2605 // CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4 2606 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2607 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2608 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2609 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2610 // CHECK8-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 2611 // CHECK8-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2612 // CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8 2613 // CHECK8-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 8 2614 // CHECK8-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 8 2615 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 2616 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2617 // CHECK8-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8 2618 // CHECK8-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 8 2619 // CHECK8-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 8 2620 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2621 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2622 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2623 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 2624 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2625 // CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2626 // CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2627 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 2628 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2629 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 2630 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2631 // CHECK8: omp.precond.then: 2632 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2633 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2634 // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 2635 // CHECK8-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2636 // CHECK8-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 2637 // CHECK8-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2638 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP10]] to i32 2639 // CHECK8-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2640 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 2641 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2642 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2643 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2644 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 2645 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 40, i1 false) 2646 // CHECK8-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2647 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2648 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2649 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2650 // CHECK8-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 2651 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2652 // CHECK8: omp.inner.for.cond: 2653 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2654 // CHECK8-NEXT: [[CONV7:%.*]] = sext i32 [[TMP16]] to i64 2655 // CHECK8-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2656 // CHECK8-NEXT: [[CMP8:%.*]] = icmp ule i64 [[CONV7]], [[TMP17]] 2657 // CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2658 // CHECK8: omp.inner.for.body: 2659 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2660 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2661 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2662 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 2663 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I6]]) #[[ATTR5:[0-9]+]] 2664 // CHECK8-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 2665 // CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 [[CALL]], [[CALL9]] 2666 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 2667 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2668 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B4]], i64 0, i64 [[IDXPROM]] 2669 // CHECK8-NEXT: [[CALL11:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 2670 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD10]], [[CALL11]] 2671 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4 2672 // CHECK8-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP20]] to i64 2673 // CHECK8-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C5]], i64 0, i64 [[IDXPROM13]] 2674 // CHECK8-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 2675 // CHECK8-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD12]], [[CALL15]] 2676 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4 2677 // CHECK8-NEXT: [[IDXPROM17:%.*]] = sext i32 [[TMP21]] to i64 2678 // CHECK8-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i64 0, i64 [[IDXPROM17]] 2679 // CHECK8-NEXT: [[CALL19:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX18]]) #[[ATTR5]] 2680 // CHECK8-NEXT: [[ADD20:%.*]] = add nsw i32 [[ADD16]], [[CALL19]] 2681 // CHECK8-NEXT: store i32 [[ADD20]], i32* [[TMP1]], align 4 2682 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2683 // CHECK8: omp.body.continue: 2684 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2685 // CHECK8: omp.inner.for.inc: 2686 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2687 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2688 // CHECK8-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 2689 // CHECK8-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 2690 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 2691 // CHECK8: omp.inner.for.end: 2692 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2693 // CHECK8: omp.loop.exit: 2694 // CHECK8-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2695 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2696 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 2697 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2698 // CHECK8-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 2699 // CHECK8-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2700 // CHECK8: .omp.lastprivate.then: 2701 // CHECK8-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2702 // CHECK8-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C5]] to i8* 2703 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 40, i1 false) 2704 // CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2705 // CHECK8: .omp.lastprivate.done: 2706 // CHECK8-NEXT: br label [[OMP_PRECOND_END]] 2707 // CHECK8: omp.precond.end: 2708 // CHECK8-NEXT: ret void 2709 // 2710 // 2711 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 2712 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 2713 // CHECK9-NEXT: entry: 2714 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2715 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2716 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2717 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2718 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2719 // CHECK9-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 2720 // CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 2721 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 2722 // CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 2723 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2724 // CHECK9-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2725 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2726 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2727 // CHECK9-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2728 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2729 // CHECK9-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2730 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2731 // CHECK9-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2732 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2733 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 2734 // CHECK9-NEXT: br label [[DOTEXECUTE:%.*]] 2735 // CHECK9: .execute: 2736 // CHECK9-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 2737 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2738 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 2739 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 2740 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 2741 // CHECK9-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 2742 // CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]] 2743 // CHECK9: .omp.deinit: 2744 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 2745 // CHECK9-NEXT: br label [[DOTEXIT:%.*]] 2746 // CHECK9: .exit: 2747 // CHECK9-NEXT: ret void 2748 // 2749 // 2750 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__ 2751 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2752 // CHECK9-NEXT: entry: 2753 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2754 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2755 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2756 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2757 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2758 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2759 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2760 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2761 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2762 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2763 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2764 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2765 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2766 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2767 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2768 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2769 // CHECK9-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 2770 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 2771 // CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 2772 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2773 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2774 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2775 // CHECK9-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2776 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2777 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2778 // CHECK9-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2779 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2780 // CHECK9-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2781 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2782 // CHECK9-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2783 // CHECK9-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 2784 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4 2785 // CHECK9-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 2786 // CHECK9-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4 2787 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i32 0 2788 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 2789 // CHECK9-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 2790 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2791 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 2792 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2793 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 2794 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2795 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2796 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2797 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 2798 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2799 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 2800 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2801 // CHECK9: omp.precond.then: 2802 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2803 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2804 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 2805 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2806 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2807 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2808 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 2809 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 40, i1 false) 2810 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 2811 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2812 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2813 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 2814 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2815 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2816 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 2817 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2818 // CHECK9: cond.true: 2819 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2820 // CHECK9-NEXT: br label [[COND_END:%.*]] 2821 // CHECK9: cond.false: 2822 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2823 // CHECK9-NEXT: br label [[COND_END]] 2824 // CHECK9: cond.end: 2825 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 2826 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2827 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2828 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 2829 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2830 // CHECK9: omp.inner.for.cond: 2831 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2832 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2833 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 2834 // CHECK9-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 2835 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2836 // CHECK9: omp.inner.for.body: 2837 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2838 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2839 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 2840 // CHECK9-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP24]] to i8* 2841 // CHECK9-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4 2842 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 2843 // CHECK9-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP25]] to i8* 2844 // CHECK9-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4 2845 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 2846 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 2847 // CHECK9-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4 2848 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 2849 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast i32* [[TMP2]] to i8* 2850 // CHECK9-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 4 2851 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 2852 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 2853 // CHECK9-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 4 2854 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 2855 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2856 // CHECK9-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 4 2857 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 2858 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 2859 // CHECK9-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 4 2860 // CHECK9-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP2]], align 4 2861 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP40]], 0 2862 // CHECK9-NEXT: [[TMP41:%.*]] = zext i1 [[TOBOOL]] to i32 2863 // CHECK9-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2864 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4 2865 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 2866 // CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP43]], i32 [[TMP41]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP44]], i32 7) 2867 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2868 // CHECK9: omp.inner.for.inc: 2869 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2870 // CHECK9-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2871 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP45]], [[TMP46]] 2872 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 2873 // CHECK9-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2874 // CHECK9-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2875 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 2876 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 2877 // CHECK9-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2878 // CHECK9-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2879 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 2880 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 2881 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2882 // CHECK9-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2883 // CHECK9-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP51]], [[TMP52]] 2884 // CHECK9-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 2885 // CHECK9: cond.true12: 2886 // CHECK9-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2887 // CHECK9-NEXT: br label [[COND_END14:%.*]] 2888 // CHECK9: cond.false13: 2889 // CHECK9-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2890 // CHECK9-NEXT: br label [[COND_END14]] 2891 // CHECK9: cond.end14: 2892 // CHECK9-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP53]], [[COND_TRUE12]] ], [ [[TMP54]], [[COND_FALSE13]] ] 2893 // CHECK9-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 2894 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2895 // CHECK9-NEXT: store i32 [[TMP55]], i32* [[DOTOMP_IV]], align 4 2896 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2897 // CHECK9: omp.inner.for.end: 2898 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2899 // CHECK9: omp.loop.exit: 2900 // CHECK9-NEXT: [[TMP56:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2901 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[TMP56]], align 4 2902 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP57]]) 2903 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2904 // CHECK9-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 2905 // CHECK9-NEXT: br i1 [[TMP59]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2906 // CHECK9: .omp.lastprivate.then: 2907 // CHECK9-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 2908 // CHECK9-NEXT: [[TMP61:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 2909 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP60]], i8* align 4 [[TMP61]], i32 40, i1 false) 2910 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2911 // CHECK9: .omp.lastprivate.done: 2912 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2913 // CHECK9: omp.precond.end: 2914 // CHECK9-NEXT: [[TMP62:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 2915 // CHECK9-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP62]]) 2916 // CHECK9-NEXT: ret void 2917 // 2918 // 2919 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__1 2920 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 2921 // CHECK9-NEXT: entry: 2922 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2923 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2924 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2925 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2926 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 2927 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2928 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 2929 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 2930 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 2931 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2932 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2933 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2934 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2935 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2936 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2937 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2938 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2939 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2940 // CHECK9-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 2941 // CHECK9-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 2942 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 2943 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2944 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2945 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2946 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2947 // CHECK9-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 2948 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2949 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 2950 // CHECK9-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 2951 // CHECK9-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 2952 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 2953 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2954 // CHECK9-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 2955 // CHECK9-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 2956 // CHECK9-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 2957 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2958 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2959 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2960 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 2961 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2962 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2963 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2964 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 2965 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2966 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 2967 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2968 // CHECK9: omp.precond.then: 2969 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2970 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2971 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 2972 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2973 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2974 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 2975 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 2976 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2977 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2978 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 2979 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 2980 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 2981 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2982 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2983 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2984 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2985 // CHECK9-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 2986 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2987 // CHECK9: omp.inner.for.cond: 2988 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2989 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2990 // CHECK9-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 2991 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2992 // CHECK9: omp.inner.for.body: 2993 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2994 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2995 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2996 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 2997 // CHECK9-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 2998 // CHECK9-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 2999 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 3000 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 3001 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 3002 // CHECK9-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 3003 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 3004 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 3005 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 3006 // CHECK9-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 3007 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 3008 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 3009 // CHECK9-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 3010 // CHECK9-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 3011 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 3012 // CHECK9-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 3013 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3014 // CHECK9: omp.body.continue: 3015 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3016 // CHECK9: omp.inner.for.inc: 3017 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3018 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3019 // CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 3020 // CHECK9-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 3021 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 3022 // CHECK9: omp.inner.for.end: 3023 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3024 // CHECK9: omp.loop.exit: 3025 // CHECK9-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3026 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 3027 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 3028 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3029 // CHECK9-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 3030 // CHECK9-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3031 // CHECK9: .omp.lastprivate.then: 3032 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3033 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 3034 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 3035 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3036 // CHECK9: .omp.lastprivate.done: 3037 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 3038 // CHECK9: omp.precond.end: 3039 // CHECK9-NEXT: ret void 3040 // 3041 // 3042 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 3043 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 3044 // CHECK10-NEXT: entry: 3045 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3046 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3047 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3048 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3049 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3050 // CHECK10-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 3051 // CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 3052 // CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 3053 // CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 3054 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3055 // CHECK10-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3056 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3057 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3058 // CHECK10-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3059 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3060 // CHECK10-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3061 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3062 // CHECK10-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3063 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 3064 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 3065 // CHECK10-NEXT: br label [[DOTEXECUTE:%.*]] 3066 // CHECK10: .execute: 3067 // CHECK10-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 3068 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3069 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 3070 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 3071 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 3072 // CHECK10-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 3073 // CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]] 3074 // CHECK10: .omp.deinit: 3075 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 3076 // CHECK10-NEXT: br label [[DOTEXIT:%.*]] 3077 // CHECK10: .exit: 3078 // CHECK10-NEXT: ret void 3079 // 3080 // 3081 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__ 3082 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 3083 // CHECK10-NEXT: entry: 3084 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3085 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3086 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3087 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3088 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3089 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3090 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3091 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3092 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3093 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3094 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3095 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3096 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3097 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3098 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3099 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3100 // CHECK10-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 3101 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4 3102 // CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 3103 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3104 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3105 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3106 // CHECK10-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3107 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3108 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3109 // CHECK10-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3110 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3111 // CHECK10-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3112 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3113 // CHECK10-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3114 // CHECK10-NEXT: [[TMP4:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 3115 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4 3116 // CHECK10-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP5]], i16 [[TMP4]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) 3117 // CHECK10-NEXT: [[TMP6:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4 3118 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP6]], i32 0 3119 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct._globalized_locals_ty* 3120 // CHECK10-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP8]], i32 0, i32 0 3121 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3122 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_]], align 4 3123 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3124 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 3125 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3126 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3127 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3128 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 3129 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3130 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]] 3131 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3132 // CHECK10: omp.precond.then: 3133 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3134 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3135 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_COMB_UB]], align 4 3136 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3137 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3138 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3139 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 3140 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 40, i1 false) 3141 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 3142 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3143 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 3144 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP16]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 3145 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3146 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3147 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 3148 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3149 // CHECK10: cond.true: 3150 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3151 // CHECK10-NEXT: br label [[COND_END:%.*]] 3152 // CHECK10: cond.false: 3153 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3154 // CHECK10-NEXT: br label [[COND_END]] 3155 // CHECK10: cond.end: 3156 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 3157 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3158 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3159 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 3160 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3161 // CHECK10: omp.inner.for.cond: 3162 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3163 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3164 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1 3165 // CHECK10-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP22]], [[ADD]] 3166 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3167 // CHECK10: omp.inner.for.body: 3168 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3169 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3170 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 3171 // CHECK10-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP24]] to i8* 3172 // CHECK10-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4 3173 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 3174 // CHECK10-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP25]] to i8* 3175 // CHECK10-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4 3176 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 3177 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 3178 // CHECK10-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4 3179 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 3180 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast i32* [[TMP2]] to i8* 3181 // CHECK10-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 4 3182 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 3183 // CHECK10-NEXT: [[TMP35:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3184 // CHECK10-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 4 3185 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 3186 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 3187 // CHECK10-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 4 3188 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 3189 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3190 // CHECK10-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 4 3191 // CHECK10-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP2]], align 4 3192 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP40]], 0 3193 // CHECK10-NEXT: [[TMP41:%.*]] = zext i1 [[TOBOOL]] to i32 3194 // CHECK10-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3195 // CHECK10-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4 3196 // CHECK10-NEXT: [[TMP44:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 3197 // CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP43]], i32 [[TMP41]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP44]], i32 7) 3198 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3199 // CHECK10: omp.inner.for.inc: 3200 // CHECK10-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3201 // CHECK10-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3202 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP45]], [[TMP46]] 3203 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 3204 // CHECK10-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3205 // CHECK10-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3206 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] 3207 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 3208 // CHECK10-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3209 // CHECK10-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3210 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] 3211 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 3212 // CHECK10-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3213 // CHECK10-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3214 // CHECK10-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP51]], [[TMP52]] 3215 // CHECK10-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 3216 // CHECK10: cond.true12: 3217 // CHECK10-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3218 // CHECK10-NEXT: br label [[COND_END14:%.*]] 3219 // CHECK10: cond.false13: 3220 // CHECK10-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3221 // CHECK10-NEXT: br label [[COND_END14]] 3222 // CHECK10: cond.end14: 3223 // CHECK10-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP53]], [[COND_TRUE12]] ], [ [[TMP54]], [[COND_FALSE13]] ] 3224 // CHECK10-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 3225 // CHECK10-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3226 // CHECK10-NEXT: store i32 [[TMP55]], i32* [[DOTOMP_IV]], align 4 3227 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3228 // CHECK10: omp.inner.for.end: 3229 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3230 // CHECK10: omp.loop.exit: 3231 // CHECK10-NEXT: [[TMP56:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3232 // CHECK10-NEXT: [[TMP57:%.*]] = load i32, i32* [[TMP56]], align 4 3233 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP57]]) 3234 // CHECK10-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3235 // CHECK10-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 3236 // CHECK10-NEXT: br i1 [[TMP59]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3237 // CHECK10: .omp.lastprivate.then: 3238 // CHECK10-NEXT: [[TMP60:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 3239 // CHECK10-NEXT: [[TMP61:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 3240 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP60]], i8* align 4 [[TMP61]], i32 40, i1 false) 3241 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3242 // CHECK10: .omp.lastprivate.done: 3243 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 3244 // CHECK10: omp.precond.end: 3245 // CHECK10-NEXT: [[TMP62:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2 3246 // CHECK10-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP62]]) 3247 // CHECK10-NEXT: ret void 3248 // 3249 // 3250 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__1 3251 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 3252 // CHECK10-NEXT: entry: 3253 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3254 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3255 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3256 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3257 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 3258 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3259 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3260 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3261 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3262 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3263 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3264 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3265 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3266 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3267 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3268 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3269 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3270 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3271 // CHECK10-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 3272 // CHECK10-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 3273 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4 3274 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3275 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3276 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3277 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3278 // CHECK10-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 3279 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3280 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3281 // CHECK10-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3282 // CHECK10-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3283 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 3284 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3285 // CHECK10-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3286 // CHECK10-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3287 // CHECK10-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3288 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3289 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3290 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3291 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 3292 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3293 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3294 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3295 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 3296 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3297 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 3298 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3299 // CHECK10: omp.precond.then: 3300 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3301 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3302 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3303 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3304 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3305 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 3306 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 3307 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3308 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3309 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 3310 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 3311 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 3312 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3313 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 3314 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3315 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3316 // CHECK10-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3317 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3318 // CHECK10: omp.inner.for.cond: 3319 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3320 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3321 // CHECK10-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 3322 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3323 // CHECK10: omp.inner.for.body: 3324 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3325 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3326 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3327 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 3328 // CHECK10-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 3329 // CHECK10-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 3330 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 3331 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 3332 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 3333 // CHECK10-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 3334 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 3335 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 3336 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 3337 // CHECK10-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 3338 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 3339 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 3340 // CHECK10-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 3341 // CHECK10-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 3342 // CHECK10-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 3343 // CHECK10-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 3344 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3345 // CHECK10: omp.body.continue: 3346 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3347 // CHECK10: omp.inner.for.inc: 3348 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3349 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3350 // CHECK10-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 3351 // CHECK10-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 3352 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3353 // CHECK10: omp.inner.for.end: 3354 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3355 // CHECK10: omp.loop.exit: 3356 // CHECK10-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3357 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 3358 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 3359 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3360 // CHECK10-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 3361 // CHECK10-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3362 // CHECK10: .omp.lastprivate.then: 3363 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3364 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 3365 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 3366 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3367 // CHECK10: .omp.lastprivate.done: 3368 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 3369 // CHECK10: omp.precond.end: 3370 // CHECK10-NEXT: ret void 3371 // 3372 // 3373 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 3374 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 3375 // CHECK11-NEXT: entry: 3376 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3377 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3378 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3379 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3380 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3381 // CHECK11-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 3382 // CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 3383 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 3384 // CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 3385 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3386 // CHECK11-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3387 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3388 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3389 // CHECK11-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3390 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3391 // CHECK11-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3392 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3393 // CHECK11-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3394 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 3395 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 3396 // CHECK11-NEXT: br label [[DOTEXECUTE:%.*]] 3397 // CHECK11: .execute: 3398 // CHECK11-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 3399 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3400 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 3401 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 3402 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 3403 // CHECK11-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 3404 // CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]] 3405 // CHECK11: .omp.deinit: 3406 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 3407 // CHECK11-NEXT: br label [[DOTEXIT:%.*]] 3408 // CHECK11: .exit: 3409 // CHECK11-NEXT: ret void 3410 // 3411 // 3412 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__ 3413 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 3414 // CHECK11-NEXT: entry: 3415 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3416 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3417 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3418 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3419 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3420 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3421 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3422 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3423 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3424 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3425 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3426 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3427 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3428 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3429 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3430 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3431 // CHECK11-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 3432 // CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4 3433 // CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 3434 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3435 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3436 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3437 // CHECK11-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3438 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3439 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3440 // CHECK11-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3441 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3442 // CHECK11-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3443 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3444 // CHECK11-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3445 // CHECK11-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 40, i16 1) 3446 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty* 3447 // CHECK11-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0 3448 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3449 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4 3450 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3451 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 3452 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3453 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3454 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3455 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 3456 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3457 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 3458 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3459 // CHECK11: omp.precond.then: 3460 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3461 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3462 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 3463 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3464 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3465 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3466 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 3467 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 40, i1 false) 3468 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 3469 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3470 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 3471 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 3472 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3473 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3474 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 3475 // CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3476 // CHECK11: cond.true: 3477 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3478 // CHECK11-NEXT: br label [[COND_END:%.*]] 3479 // CHECK11: cond.false: 3480 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3481 // CHECK11-NEXT: br label [[COND_END]] 3482 // CHECK11: cond.end: 3483 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 3484 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3485 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3486 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 3487 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3488 // CHECK11: omp.inner.for.cond: 3489 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3490 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3491 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], 1 3492 // CHECK11-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP19]], [[ADD]] 3493 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3494 // CHECK11: omp.inner.for.body: 3495 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3496 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3497 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 3498 // CHECK11-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP21]] to i8* 3499 // CHECK11-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4 3500 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 3501 // CHECK11-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP22]] to i8* 3502 // CHECK11-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4 3503 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 3504 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 3505 // CHECK11-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4 3506 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 3507 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP2]] to i8* 3508 // CHECK11-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4 3509 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 3510 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3511 // CHECK11-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4 3512 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 3513 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 3514 // CHECK11-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4 3515 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 3516 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3517 // CHECK11-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 4 3518 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP2]], align 4 3519 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0 3520 // CHECK11-NEXT: [[TMP38:%.*]] = zext i1 [[TOBOOL]] to i32 3521 // CHECK11-NEXT: [[TMP39:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3522 // CHECK11-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 3523 // CHECK11-NEXT: [[TMP41:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 3524 // CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP40]], i32 [[TMP38]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP41]], i32 7) 3525 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3526 // CHECK11: omp.inner.for.inc: 3527 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3528 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3529 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP42]], [[TMP43]] 3530 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 3531 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3532 // CHECK11-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3533 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 3534 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 3535 // CHECK11-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3536 // CHECK11-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3537 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 3538 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 3539 // CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3540 // CHECK11-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3541 // CHECK11-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP48]], [[TMP49]] 3542 // CHECK11-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 3543 // CHECK11: cond.true12: 3544 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3545 // CHECK11-NEXT: br label [[COND_END14:%.*]] 3546 // CHECK11: cond.false13: 3547 // CHECK11-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3548 // CHECK11-NEXT: br label [[COND_END14]] 3549 // CHECK11: cond.end14: 3550 // CHECK11-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP50]], [[COND_TRUE12]] ], [ [[TMP51]], [[COND_FALSE13]] ] 3551 // CHECK11-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 3552 // CHECK11-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3553 // CHECK11-NEXT: store i32 [[TMP52]], i32* [[DOTOMP_IV]], align 4 3554 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3555 // CHECK11: omp.inner.for.end: 3556 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3557 // CHECK11: omp.loop.exit: 3558 // CHECK11-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3559 // CHECK11-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4 3560 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP54]]) 3561 // CHECK11-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3562 // CHECK11-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 3563 // CHECK11-NEXT: br i1 [[TMP56]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3564 // CHECK11: .omp.lastprivate.then: 3565 // CHECK11-NEXT: [[TMP57:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 3566 // CHECK11-NEXT: [[TMP58:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 3567 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP57]], i8* align 4 [[TMP58]], i32 40, i1 false) 3568 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3569 // CHECK11: .omp.lastprivate.done: 3570 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3571 // CHECK11: omp.precond.end: 3572 // CHECK11-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP4]]) 3573 // CHECK11-NEXT: ret void 3574 // 3575 // 3576 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__1 3577 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 3578 // CHECK11-NEXT: entry: 3579 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3580 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3581 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3582 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3583 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 3584 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3585 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3586 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3587 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3588 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3589 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3590 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3591 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3592 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3593 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3594 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3595 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3596 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3597 // CHECK11-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 3598 // CHECK11-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 3599 // CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4 3600 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3601 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3602 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3603 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3604 // CHECK11-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 3605 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3606 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3607 // CHECK11-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3608 // CHECK11-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3609 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 3610 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3611 // CHECK11-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3612 // CHECK11-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3613 // CHECK11-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3614 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3615 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3616 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3617 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 3618 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3619 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3620 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3621 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 3622 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3623 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 3624 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3625 // CHECK11: omp.precond.then: 3626 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3627 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3628 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3629 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3630 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3631 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 3632 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 3633 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3634 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3635 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 3636 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 3637 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 3638 // CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3639 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 3640 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3641 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3642 // CHECK11-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3643 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3644 // CHECK11: omp.inner.for.cond: 3645 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3646 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3647 // CHECK11-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 3648 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3649 // CHECK11: omp.inner.for.body: 3650 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3651 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3652 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3653 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 3654 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 3655 // CHECK11-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 3656 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 3657 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 3658 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 3659 // CHECK11-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 3660 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 3661 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 3662 // CHECK11-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 3663 // CHECK11-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 3664 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 3665 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 3666 // CHECK11-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 3667 // CHECK11-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 3668 // CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 3669 // CHECK11-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 3670 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3671 // CHECK11: omp.body.continue: 3672 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3673 // CHECK11: omp.inner.for.inc: 3674 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3675 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3676 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 3677 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 3678 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3679 // CHECK11: omp.inner.for.end: 3680 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3681 // CHECK11: omp.loop.exit: 3682 // CHECK11-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3683 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 3684 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 3685 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3686 // CHECK11-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 3687 // CHECK11-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3688 // CHECK11: .omp.lastprivate.then: 3689 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3690 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 3691 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 3692 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3693 // CHECK11: .omp.lastprivate.done: 3694 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3695 // CHECK11: omp.precond.end: 3696 // CHECK11-NEXT: ret void 3697 // 3698 // 3699 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l31 3700 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0:[0-9]+]] { 3701 // CHECK12-NEXT: entry: 3702 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3703 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3704 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3705 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3706 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3707 // CHECK12-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4 3708 // CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 3709 // CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 3710 // CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 3711 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3712 // CHECK12-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3713 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3714 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3715 // CHECK12-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3716 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3717 // CHECK12-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3718 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3719 // CHECK12-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3720 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 3721 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0) 3722 // CHECK12-NEXT: br label [[DOTEXECUTE:%.*]] 3723 // CHECK12: .execute: 3724 // CHECK12-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 3725 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3726 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[ARGC_CASTED]], align 4 3727 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4 3728 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTTHREADID_TEMP_]], align 4 3729 // CHECK12-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]], [10 x i32]* [[TMP1]], i32* [[TMP2]], i32 [[TMP6]], [10 x i32]* [[TMP3]]) #[[ATTR4:[0-9]+]] 3730 // CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]] 3731 // CHECK12: .omp.deinit: 3732 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0) 3733 // CHECK12-NEXT: br label [[DOTEXIT:%.*]] 3734 // CHECK12: .exit: 3735 // CHECK12-NEXT: ret void 3736 // 3737 // 3738 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__ 3739 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[ARGC:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 3740 // CHECK12-NEXT: entry: 3741 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3742 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3743 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3744 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3745 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3746 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3747 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3748 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3749 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3750 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3751 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3752 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3753 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3754 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3755 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3756 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3757 // CHECK12-NEXT: [[B4:%.*]] = alloca [10 x i32], align 4 3758 // CHECK12-NEXT: [[I5:%.*]] = alloca i32, align 4 3759 // CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x i8*], align 4 3760 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3761 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3762 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3763 // CHECK12-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3764 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3765 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3766 // CHECK12-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3767 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3768 // CHECK12-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3769 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3770 // CHECK12-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3771 // CHECK12-NEXT: [[TMP4:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 40, i16 1) 3772 // CHECK12-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty* 3773 // CHECK12-NEXT: [[C1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0 3774 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3775 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4 3776 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3777 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 3778 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3779 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3780 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3781 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 3782 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3783 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 3784 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3785 // CHECK12: omp.precond.then: 3786 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3787 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3788 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 3789 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3790 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3791 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3792 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* 3793 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 40, i1 false) 3794 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 3795 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3796 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 3797 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) 3798 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3799 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3800 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 3801 // CHECK12-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3802 // CHECK12: cond.true: 3803 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3804 // CHECK12-NEXT: br label [[COND_END:%.*]] 3805 // CHECK12: cond.false: 3806 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3807 // CHECK12-NEXT: br label [[COND_END]] 3808 // CHECK12: cond.end: 3809 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 3810 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3811 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3812 // CHECK12-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 3813 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3814 // CHECK12: omp.inner.for.cond: 3815 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3816 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3817 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], 1 3818 // CHECK12-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP19]], [[ADD]] 3819 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3820 // CHECK12: omp.inner.for.body: 3821 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3822 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3823 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 3824 // CHECK12-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP21]] to i8* 3825 // CHECK12-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4 3826 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 3827 // CHECK12-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP22]] to i8* 3828 // CHECK12-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4 3829 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 3830 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast i32* [[ARGC_ADDR]] to i8* 3831 // CHECK12-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4 3832 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 3833 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP2]] to i8* 3834 // CHECK12-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4 3835 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 3836 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast [10 x i32]* [[B4]] to i8* 3837 // CHECK12-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4 3838 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 5 3839 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 3840 // CHECK12-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4 3841 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i8*], [7 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 6 3842 // CHECK12-NEXT: [[TMP36:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 3843 // CHECK12-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 4 3844 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP2]], align 4 3845 // CHECK12-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0 3846 // CHECK12-NEXT: [[TMP38:%.*]] = zext i1 [[TOBOOL]] to i32 3847 // CHECK12-NEXT: [[TMP39:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3848 // CHECK12-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 3849 // CHECK12-NEXT: [[TMP41:%.*]] = bitcast [7 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** 3850 // CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP40]], i32 [[TMP38]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [10 x i32]*, [10 x i32]*, [10 x i32]*)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP41]], i32 7) 3851 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3852 // CHECK12: omp.inner.for.inc: 3853 // CHECK12-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3854 // CHECK12-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3855 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP42]], [[TMP43]] 3856 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 3857 // CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3858 // CHECK12-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3859 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP44]], [[TMP45]] 3860 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 3861 // CHECK12-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3862 // CHECK12-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3863 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP46]], [[TMP47]] 3864 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 3865 // CHECK12-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3866 // CHECK12-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3867 // CHECK12-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP48]], [[TMP49]] 3868 // CHECK12-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 3869 // CHECK12: cond.true12: 3870 // CHECK12-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3871 // CHECK12-NEXT: br label [[COND_END14:%.*]] 3872 // CHECK12: cond.false13: 3873 // CHECK12-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3874 // CHECK12-NEXT: br label [[COND_END14]] 3875 // CHECK12: cond.end14: 3876 // CHECK12-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP50]], [[COND_TRUE12]] ], [ [[TMP51]], [[COND_FALSE13]] ] 3877 // CHECK12-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 3878 // CHECK12-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3879 // CHECK12-NEXT: store i32 [[TMP52]], i32* [[DOTOMP_IV]], align 4 3880 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3881 // CHECK12: omp.inner.for.end: 3882 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3883 // CHECK12: omp.loop.exit: 3884 // CHECK12-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3885 // CHECK12-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4 3886 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP54]]) 3887 // CHECK12-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3888 // CHECK12-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0 3889 // CHECK12-NEXT: br i1 [[TMP56]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3890 // CHECK12: .omp.lastprivate.then: 3891 // CHECK12-NEXT: [[TMP57:%.*]] = bitcast [10 x i32]* [[TMP1]] to i8* 3892 // CHECK12-NEXT: [[TMP58:%.*]] = bitcast [10 x i32]* [[C1]] to i8* 3893 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP57]], i8* align 4 [[TMP58]], i32 40, i1 false) 3894 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3895 // CHECK12: .omp.lastprivate.done: 3896 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 3897 // CHECK12: omp.precond.end: 3898 // CHECK12-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP4]]) 3899 // CHECK12-NEXT: ret void 3900 // 3901 // 3902 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__1 3903 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[C:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[D:%.*]]) #[[ATTR0]] { 3904 // CHECK12-NEXT: entry: 3905 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3906 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3907 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3908 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3909 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4 3910 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3911 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4 3912 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x i32]*, align 4 3913 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca [10 x i32]*, align 4 3914 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3915 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3916 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3917 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3918 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3919 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3920 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3921 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3922 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3923 // CHECK12-NEXT: [[B3:%.*]] = alloca [10 x i32], align 4 3924 // CHECK12-NEXT: [[C4:%.*]] = alloca [10 x i32], align 4 3925 // CHECK12-NEXT: [[I5:%.*]] = alloca i32, align 4 3926 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3927 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3928 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3929 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3930 // CHECK12-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4 3931 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3932 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4 3933 // CHECK12-NEXT: store [10 x i32]* [[C]], [10 x i32]** [[C_ADDR]], align 4 3934 // CHECK12-NEXT: store [10 x i32]* [[D]], [10 x i32]** [[D_ADDR]], align 4 3935 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4 3936 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3937 // CHECK12-NEXT: [[TMP2:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4 3938 // CHECK12-NEXT: [[TMP3:%.*]] = load [10 x i32]*, [10 x i32]** [[C_ADDR]], align 4 3939 // CHECK12-NEXT: [[TMP4:%.*]] = load [10 x i32]*, [10 x i32]** [[D_ADDR]], align 4 3940 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3941 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3942 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3943 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 3944 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3945 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3946 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3947 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 3948 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3949 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 3950 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3951 // CHECK12: omp.precond.then: 3952 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3953 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3954 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 3955 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3956 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3957 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4 3958 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4 3959 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3960 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3961 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast [10 x i32]* [[B3]] to i8* 3962 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast [10 x i32]* [[TMP2]] to i8* 3963 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 40, i1 false) 3964 // CHECK12-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3965 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 3966 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP14]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3967 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3968 // CHECK12-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3969 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3970 // CHECK12: omp.inner.for.cond: 3971 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3972 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3973 // CHECK12-NEXT: [[CMP6:%.*]] = icmp ule i32 [[TMP16]], [[TMP17]] 3974 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3975 // CHECK12: omp.inner.for.body: 3976 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3977 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3978 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3979 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 3980 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I5]]) #[[ATTR5:[0-9]+]] 3981 // CHECK12-NEXT: [[CALL7:%.*]] = call i32 @_Z3fooPi(i32* [[TMP1]]) #[[ATTR5]] 3982 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL]], [[CALL7]] 3983 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4 3984 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[B3]], i32 0, i32 [[TMP19]] 3985 // CHECK12-NEXT: [[CALL9:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX]]) #[[ATTR5]] 3986 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD8]], [[CALL9]] 3987 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[I5]], align 4 3988 // CHECK12-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[C4]], i32 0, i32 [[TMP20]] 3989 // CHECK12-NEXT: [[CALL12:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX11]]) #[[ATTR5]] 3990 // CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD10]], [[CALL12]] 3991 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I5]], align 4 3992 // CHECK12-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP4]], i32 0, i32 [[TMP21]] 3993 // CHECK12-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[ARRAYIDX14]]) #[[ATTR5]] 3994 // CHECK12-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD13]], [[CALL15]] 3995 // CHECK12-NEXT: store i32 [[ADD16]], i32* [[TMP1]], align 4 3996 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3997 // CHECK12: omp.body.continue: 3998 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3999 // CHECK12: omp.inner.for.inc: 4000 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4001 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4002 // CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 4003 // CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 4004 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 4005 // CHECK12: omp.inner.for.end: 4006 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4007 // CHECK12: omp.loop.exit: 4008 // CHECK12-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4009 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 4010 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 4011 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4012 // CHECK12-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 4013 // CHECK12-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 4014 // CHECK12: .omp.lastprivate.then: 4015 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [10 x i32]* [[TMP3]] to i8* 4016 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast [10 x i32]* [[C4]] to i8* 4017 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 40, i1 false) 4018 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 4019 // CHECK12: .omp.lastprivate.done: 4020 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 4021 // CHECK12: omp.precond.end: 4022 // CHECK12-NEXT: ret void 4023 // 4024