1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s
3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - < %s | FileCheck %s
4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s | FileCheck %s --check-prefix=TERM_DEBUG
5 
6 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s
7 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s
8 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s
9 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s
10 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
11 // expected-no-diagnostics
12 #ifndef HEADER
13 #define HEADER
14 
15 long long get_val() { return 0; }
16 double *g_ptr;
17 
18 // CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
19 void simple(float *a, float *b, float *c, float *d) {
20   #pragma omp for simd
21 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
22 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
23 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 5
24 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
25 // CHECK: [[TRUE]]:
26 // CHECK: br label %[[SWITCH:[^,]+]]
27 // CHECK: [[FALSE]]:
28 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
29 // CHECK: br label %[[SWITCH]]
30 // CHECK: [[SWITCH]]:
31 // CHECK: [[UP:%.+]] = phi i32 [ 5, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
32 // CHECK: store i32 [[UP]], i32* [[UB]],
33 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
34 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]],
35 
36 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
37 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
38 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
39 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
40   for (int i = 3; i < 32; i += 5) {
41 // CHECK: [[SIMPLE_LOOP1_BODY]]:
42 // Start of body: calculate i from IV:
43 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
44 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
45 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]
46 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
47 // ... loop body ...
48 // End of body: store into a[i]:
49 // CHECK: store float [[RESULT:%.+]], float*
50     a[i] = b[i] * c[i] * d[i];
51 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]
52 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
53 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
54 // br label %{{.+}}, !llvm.loop !{{.+}}
55   }
56 // CHECK: [[SIMPLE_LOOP1_END]]:
57 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
58 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
59 
60   long long k = get_val();
61 
62   #pragma omp for simd linear(k : 3) schedule(simd, nonmonotonic: dynamic)
63 // CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val
64 // CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]]
65 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR]]
66 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
67 
68 // CHECK: call void @__kmpc_dispatch_init_4(%ident_t* {{.+}}, i32 %{{.+}}, i32 1073741859, i32 0, i32 8, i32 1, i32 1)
69 // CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(%ident_t* {{.+}}, i32 %{{.+}}, i32* %{{.+}}, i32* [[LB:%.+]], i32* [[UB:%.+]], i32* %{{.+}})
70 // CHECK: [[COND:%.+]] = icmp ne i32 [[NEXT]], 0
71 // CHECK: br i1 [[COND]], label %[[CONT:.+]], label %[[END:.+]]
72 // CHECK: [[CONT]]:
73 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
74 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV2:%[^,]+]],
75 
76 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID:[0-9]+]]
77 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
78 // CHECK-NEXT: [[CMP2:%.+]] = icmp sle i32 [[IV2]], [[UB_VAL]]
79 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
80   for (int i = 10; i > 1; i--) {
81 // CHECK: [[SIMPLE_LOOP2_BODY]]:
82 // Start of body: calculate i from IV:
83 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
84 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
85 // CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1
86 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]
87 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
88 //
89 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
90 // CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
91 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3
92 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
93 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
94 // Update of the privatized version of linear variable!
95 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
96     a[k]++;
97     k = k + 3;
98 // CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
99 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
100 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
101 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
102   }
103 // CHECK: [[SIMPLE_LOOP2_END]]:
104 //
105 // Update linear vars after loop, as the loop was operating on a private version.
106 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
107 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
108 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_VAR]]
109 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
110 
111   int lin = 12;
112   #pragma omp for simd linear(lin : get_val()), linear(g_ptr)
113 
114 // Init linear private var.
115 // CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]]
116 // CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]]
117 // CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]]
118 // Remember linear step.
119 // CHECK: [[CALL_VAL:%.+]] = invoke
120 // CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]]
121 
122 // CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:@[^,]+]]
123 // CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]]
124 
125 // CHECK: call void @__kmpc_for_static_init_8u(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
126 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
127 // CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3
128 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
129 // CHECK: [[TRUE]]:
130 // CHECK: br label %[[SWITCH:[^,]+]]
131 // CHECK: [[FALSE]]:
132 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
133 // CHECK: br label %[[SWITCH]]
134 // CHECK: [[SWITCH]]:
135 // CHECK: [[UP:%.+]] = phi i64 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
136 // CHECK: store i64 [[UP]], i64* [[UB]],
137 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
138 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV3:%[^,]+]],
139 
140 // CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]]
141 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
142 // CHECK-NEXT: [[CMP3:%.+]] = icmp ule i64 [[IV3]], [[UB_VAL]]
143 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
144   for (unsigned long long it = 2000; it >= 600; it-=400) {
145 // CHECK: [[SIMPLE_LOOP3_BODY]]:
146 // Start of body: calculate it from IV:
147 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]
148 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
149 // CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]
150 // CHECK-NEXT: store i64 [[LC_IT_2]], i64*
151 //
152 // Linear start and step are used to calculate current value of the linear variable.
153 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
154 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
155 // CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]],
156 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
157 // CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]]
158 // CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1
159 // CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]
160 // CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]]
161     *g_ptr++ = 0.0;
162 // CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]]
163 // CHECK: store double{{.*}}[[GEP_VAL]]
164     a[it + lin]++;
165 // CHECK: [[FLT_INC:%.+]] = fadd float
166 // CHECK-NEXT: store float [[FLT_INC]],
167 // CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]]
168 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
169 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]
170   }
171 // CHECK: [[SIMPLE_LOOP3_END]]:
172 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
173 //
174 // Linear start and step are used to calculate final value of the linear variables.
175 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
176 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
177 // CHECK: store i32 {{.+}}, i32* [[LIN_VAR]],
178 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
179 // CHECK: store double* {{.*}}[[GLIN_VAR]]
180 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
181 
182   #pragma omp for simd
183 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
184 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
185 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 3
186 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
187 // CHECK: [[TRUE]]:
188 // CHECK: br label %[[SWITCH:[^,]+]]
189 // CHECK: [[FALSE]]:
190 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
191 // CHECK: br label %[[SWITCH]]
192 // CHECK: [[SWITCH]]:
193 // CHECK: [[UP:%.+]] = phi i32 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
194 // CHECK: store i32 [[UP]], i32* [[UB]],
195 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
196 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV4:%[^,]+]],
197 
198 // CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]]
199 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
200 // CHECK-NEXT: [[CMP4:%.+]] = icmp sle i32 [[IV4]], [[UB_VAL]]
201 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
202   for (short it = 6; it <= 20; it-=-4) {
203 // CHECK: [[SIMPLE_LOOP4_BODY]]:
204 // Start of body: calculate it from IV:
205 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]
206 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
207 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]
208 // CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16
209 // CHECK-NEXT: store i16 [[LC_IT_3]], i16*
210 
211 // CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]]
212 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
213 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]
214   }
215 // CHECK: [[SIMPLE_LOOP4_END]]:
216 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
217 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
218 
219   #pragma omp for simd
220 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
221 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
222 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 25
223 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
224 // CHECK: [[TRUE]]:
225 // CHECK: br label %[[SWITCH:[^,]+]]
226 // CHECK: [[FALSE]]:
227 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
228 // CHECK: br label %[[SWITCH]]
229 // CHECK: [[SWITCH]]:
230 // CHECK: [[UP:%.+]] = phi i32 [ 25, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
231 // CHECK: store i32 [[UP]], i32* [[UB]],
232 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
233 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV5:%[^,]+]],
234 
235 // CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]]
236 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
237 // CHECK-NEXT: [[CMP5:%.+]] = icmp sle i32 [[IV5]], [[UB_VAL]]
238 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
239   for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
240 // CHECK: [[SIMPLE_LOOP5_BODY]]:
241 // Start of body: calculate it from IV:
242 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]
243 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
244 // CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]
245 // CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8
246 // CHECK-NEXT: store i8 [[LC_IT_2]], i8*
247 
248 // CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]]
249 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
250 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]
251   }
252 // CHECK: [[SIMPLE_LOOP5_END]]:
253 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
254 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
255 
256 // CHECK-NOT: mul i32 %{{.+}}, 10
257   #pragma omp for simd
258   for (unsigned i=100; i<10; i+=10) {
259   }
260 
261   int A;
262   #pragma omp parallel
263   {
264   // CHECK: store i32 -1, i32* [[A:%.+]],
265   A = -1;
266   #pragma omp for simd lastprivate(A)
267 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
268 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
269 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
270 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
271 // CHECK: [[TRUE]]:
272 // CHECK: br label %[[SWITCH:[^,]+]]
273 // CHECK: [[FALSE]]:
274 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
275 // CHECK: br label %[[SWITCH]]
276 // CHECK: [[SWITCH]]:
277 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
278 // CHECK: store i64 [[UP]], i64* [[UB]],
279 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
280 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV7:%[^,]+]],
281 
282 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
283 // CHECK: [[SIMD_LOOP7_COND]]:
284 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]
285 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
286 // CHECK-NEXT: [[CMP7:%.+]] = icmp sle i64 [[IV7]], [[UB_VAL]]
287 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
288   for (long long i = -10; i < 10; i += 3) {
289 // CHECK: [[SIMPLE_LOOP7_BODY]]:
290 // Start of body: calculate i from IV:
291 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]
292 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
293 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
294 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],
295 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]
296 // CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32
297 // CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]],
298     A = i;
299 // CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]]
300 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
301 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]
302   }
303 // CHECK: [[SIMPLE_LOOP7_END]]:
304 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
305 // CHECK: load i32, i32*
306 // CHECK: icmp ne i32 %{{.+}}, 0
307 // CHECK: br i1 %{{.+}}, label
308 // CHECK: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]],
309 // CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* %{{.+}},
310 // CHECK-NEXT: br label
311 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
312   }
313   int R;
314   #pragma omp parallel
315   {
316   // CHECK: store i32 -1, i32* [[R:%[^,]+]],
317   R = -1;
318 // CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]],
319   #pragma omp for simd reduction(*:R)
320 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
321 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
322 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
323 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
324 // CHECK: [[TRUE]]:
325 // CHECK: br label %[[SWITCH:[^,]+]]
326 // CHECK: [[FALSE]]:
327 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
328 // CHECK: br label %[[SWITCH]]
329 // CHECK: [[SWITCH]]:
330 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
331 // CHECK: store i64 [[UP]], i64* [[UB]],
332 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
333 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV8:%[^,]+]],
334 
335 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
336 // CHECK: [[SIMD_LOOP8_COND]]:
337 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]
338 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
339 // CHECK-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]]
340 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
341   for (long long i = -10; i < 10; i += 3) {
342 // CHECK: [[SIMPLE_LOOP8_BODY]]:
343 // Start of body: calculate i from IV:
344 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]
345 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
346 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
347 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],
348 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]
349 // CHECK: store i32 %{{.+}}, i32* [[R_PRIV]],
350     R *= i;
351 // CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]]
352 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
353 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]
354   }
355 // CHECK: [[SIMPLE_LOOP8_END]]:
356 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
357 // CHECK: call i32 @__kmpc_reduce(
358 // CHECK: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
359 // CHECK: [[RED:%.+]] = mul nsw i32 %{{.+}}, [[R_PRIV_VAL]]
360 // CHECK-NEXT: store i32 [[RED]], i32* %{{.+}},
361 // CHECK-NEXT: call void @__kmpc_end_reduce(
362 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
363   }
364 }
365 
366 template <class T, unsigned K> T tfoo(T a) { return a + K; }
367 
368 template <typename T, unsigned N>
369 int templ1(T a, T *z) {
370   #pragma omp for simd collapse(N) schedule(simd: static, N)
371   for (int i = 0; i < N * 2; i++) {
372     for (long long j = 0; j < (N + N + N + N); j += 2) {
373       z[i + j] = a + tfoo<T, N>(i + j);
374     }
375   }
376   return 0;
377 }
378 
379 // Instatiation templ1<float,2>
380 // CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}})
381 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 45, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 2)
382 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
383 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15
384 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
385 // CHECK: [[TRUE]]:
386 // CHECK: br label %[[SWITCH:[^,]+]]
387 // CHECK: [[FALSE]]:
388 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
389 // CHECK: br label %[[SWITCH]]
390 // CHECK: [[SWITCH]]:
391 // CHECK: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
392 // CHECK: store i64 [[UP]], i64* [[UB]],
393 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
394 // CHECK: store i64 [[LB_VAL]], i64* [[T1_OMP_IV:%[^,]+]],
395 
396 // ...
397 // CHECK: icmp sle i64
398 // CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]
399 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
400 // CHECK-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
401 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
402 // CHECK: [[T1_BODY]]:
403 // Loop counters i and j updates:
404 // CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]
405 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
406 // CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1
407 // CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]
408 // CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32
409 // CHECK-NEXT: store i32 [[I_2]], i32*
410 // CHECK: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]]
411 // CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4
412 // CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2
413 // CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]
414 // CHECK-NEXT: store i64 [[J_2_ADD0]], i64*
415 // simd.for.inc:
416 // CHECK: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]]
417 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
418 // CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]]
419 // CHECK-NEXT: br label {{%.+}}
420 // CHECK: [[T1_END]]:
421 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
422 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
423 // CHECK: ret i32 0
424 //
425 void inst_templ1() {
426   float a;
427   float z[100];
428   templ1<float,2> (a, z);
429 }
430 
431 
432 typedef int MyIdx;
433 
434 class IterDouble {
435   double *Ptr;
436 public:
437   IterDouble operator++ () const {
438     IterDouble n;
439     n.Ptr = Ptr + 1;
440     return n;
441   }
442   bool operator < (const IterDouble &that) const {
443     return Ptr < that.Ptr;
444   }
445   double & operator *() const {
446     return *Ptr;
447   }
448   MyIdx operator - (const IterDouble &that) const {
449     return (MyIdx) (Ptr - that.Ptr);
450   }
451   IterDouble operator + (int Delta) {
452     IterDouble re;
453     re.Ptr = Ptr + Delta;
454     return re;
455   }
456 
457   ///~IterDouble() {}
458 };
459 
460 // CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}
461 void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
462 //
463 // Calculate number of iterations before the loop body.
464 // CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}
465 // CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1
466 // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1
467 // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1
468 // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1
469 // CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}}
470   #pragma omp for simd
471 
472 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
473 // CHECK-DAG: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
474 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
475 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
476 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
477 // CHECK: [[TRUE]]:
478 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
479 // CHECK: br label %[[SWITCH:[^,]+]]
480 // CHECK: [[FALSE]]:
481 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
482 // CHECK: br label %[[SWITCH]]
483 // CHECK: [[SWITCH]]:
484 // CHECK: [[UP:%.+]] = phi i32 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
485 // CHECK: store i32 [[UP]], i32* [[UB]],
486 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
487 // CHECK: store i32 [[LB_VAL]], i32* [[IT_OMP_IV:%[^,]+]],
488 
489 // CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]]
490 // CHECK-NEXT: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
491 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
492 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
493   for (IterDouble i = ia; i < ib; ++i) {
494 // CHECK: [[IT_BODY]]:
495 // Start of body: calculate i from index:
496 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]
497 // Call of operator+ (i, IV).
498 // CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}
499 // ... loop body ...
500    *i = *ic * 0.5;
501 // Float multiply and save result.
502 // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01
503 // CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}
504 // CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]]
505    ++ic;
506 //
507 // CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]]
508 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1
509 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]
510 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
511   }
512 // CHECK: [[IT_END]]:
513 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
514 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
515 // CHECK: ret void
516 }
517 
518 
519 // CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}
520 void collapsed(float *a, float *b, float *c, float *d) {
521   int i; // outer loop counter
522   unsigned j; // middle loop couter, leads to unsigned icmp in loop header.
523   // k declared in the loop init below
524   short l; // inner loop counter
525 // CHECK: call void @__kmpc_for_static_init_4u(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
526 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
527 // CHECK: [[CMP:%.+]] = icmp ugt i32 [[UB_VAL]], 119
528 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
529 // CHECK: [[TRUE]]:
530 // CHECK: br label %[[SWITCH:[^,]+]]
531 // CHECK: [[FALSE]]:
532 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
533 // CHECK: br label %[[SWITCH]]
534 // CHECK: [[SWITCH]]:
535 // CHECK: [[UP:%.+]] = phi i32 [ 119, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
536 // CHECK: store i32 [[UP]], i32* [[UB]],
537 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
538 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]],
539 //
540   #pragma omp for simd collapse(4)
541 
542 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
543 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
544 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB_VAL]]
545 // CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]
546   for (i = 1; i < 3; i++) // 2 iterations
547     for (j = 2u; j < 5u; j++) //3 iterations
548       for (int k = 3; k <= 6; k++) // 4 iterations
549         for (l = 4; l < 9; ++l) // 5 iterations
550         {
551 // CHECK: [[COLL1_BODY]]:
552 // Start of body: calculate i from index:
553 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]
554 // Calculation of the loop counters values.
555 // CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60
556 // CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1
557 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]
558 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
559 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]
560 // CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2]], 20
561 // CHECK-NEXT: [[CALC_J_2:%.+]] = urem i32 [[CALC_J_1]], 3
562 // CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1
563 // CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]
564 // CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]]
565 // CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]]
566 // CHECK-NEXT: [[CALC_K_1:%.+]] = udiv i32 [[IV1_3]], 5
567 // CHECK-NEXT: [[CALC_K_2:%.+]] = urem i32 [[CALC_K_1]], 4
568 // CHECK-NEXT: [[CALC_K_2_MUL1:%.+]] = mul i32 [[CALC_K_2]], 1
569 // CHECK-NEXT: [[CALC_K_3:%.+]] = add i32 3, [[CALC_K_2_MUL1]]
570 // CHECK-NEXT: store i32 [[CALC_K_3]], i32* [[LC_K:.+]]
571 // CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]]
572 // CHECK-NEXT: [[CALC_L_1:%.+]] = urem i32 [[IV1_4]], 5
573 // CHECK-NEXT: [[CALC_L_1_MUL1:%.+]] = mul i32 [[CALC_L_1]], 1
574 // CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[CALC_L_1_MUL1]]
575 // CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16
576 // CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]]
577 // ... loop body ...
578 // End of body: store into a[i]:
579 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]
580     float res = b[j] * c[k];
581     a[i] = res * d[l];
582 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]]
583 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
584 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]
585 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
586 // CHECK: [[COLL1_END]]:
587   }
588 // i,j,l are updated; k is not updated.
589 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
590 // CHECK: br i1
591 // CHECK: store i32 3, i32*
592 // CHECK-NEXT: store i32 5,
593 // CHECK-NEXT: store i32 7,
594 // CHECK-NEXT: store i16 9, i16*
595 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
596 // CHECK: ret void
597 }
598 
599 extern char foo();
600 extern double globalfloat;
601 
602 // CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}
603 void widened(float *a, float *b, float *c, float *d) {
604   int i; // outer loop counter
605   short j; // inner loop counter
606   globalfloat = 1.0;
607   int localint = 1;
608 // CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]]
609 // Counter is widened to 64 bits.
610 // CHECK:     [[MUL:%.+]] = mul nsw i64 2, %{{.+}}
611 // CHECK-NEXT: [[SUB:%.+]] = sub nsw i64 [[MUL]], 1
612 // CHECK-NEXT: store i64 [[SUB]], i64* [[OMP_LAST_IT:%[^,]+]],
613 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
614 // CHECK-DAG: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
615 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
616 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
617 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
618 // CHECK: [[TRUE]]:
619 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
620 // CHECK: br label %[[SWITCH:[^,]+]]
621 // CHECK: [[FALSE]]:
622 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
623 // CHECK: br label %[[SWITCH]]
624 // CHECK: [[SWITCH]]:
625 // CHECK: [[UP:%.+]] = phi i64 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
626 // CHECK: store i64 [[UP]], i64* [[UB]],
627 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
628 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV:%[^,]+]],
629 //
630   #pragma omp for simd collapse(2) private(globalfloat, localint)
631 
632 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
633 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
634 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
635 // CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]
636   for (i = 1; i < 3; i++) // 2 iterations
637     for (j = 0; j < foo(); j++) // foo() iterations
638   {
639 // CHECK: [[WIDE1_BODY]]:
640 // Start of body: calculate i from index:
641 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]
642 // Calculation of the loop counters values...
643 // CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]]
644 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]
645 // CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]]
646 // ... loop body ...
647 //
648 // Here we expect store into private double var, not global
649 // CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]]
650     globalfloat = (float)j/i;
651     float res = b[j] * c[j];
652 // Store into a[i]:
653 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]
654     a[i] = res * d[i];
655 // Then there's a store into private var localint:
656 // CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]]
657     localint = (int)j;
658 // CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]]
659 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1
660 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]
661 //
662 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
663 // CHECK: [[WIDE1_END]]:
664   }
665 // i,j are updated.
666 // CHECK: store i32 3, i32* [[I:%[^,]+]]
667 // CHECK: store i16
668 //
669 // Here we expect store into original localint, not its privatized version.
670 // CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]]
671   localint = (int)j;
672 // CHECK: ret void
673 }
674 
675 // TERM_DEBUG-LABEL: bar
676 int bar() {return 0;};
677 
678 // TERM_DEBUG-LABEL: parallel_simd
679 void parallel_simd(float *a) {
680 #pragma omp parallel
681 #pragma omp for simd
682   // TERM_DEBUG-NOT: __kmpc_global_thread_num
683   // TERM_DEBUG:     invoke i32 {{.*}}bar{{.*}}()
684   // TERM_DEBUG:     unwind label %[[TERM_LPAD:.+]],
685   // TERM_DEBUG-NOT: __kmpc_global_thread_num
686   // TERM_DEBUG:     [[TERM_LPAD]]
687   // TERM_DEBUG:     call void @__clang_call_terminate
688   // TERM_DEBUG:     unreachable
689   for (unsigned i = 131071; i <= 2147483647; i += 127)
690     a[i] += bar();
691 }
692 // TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],
693 #endif // HEADER
694